Bottom-up glass through-via plating using coated liquid adhesive on a glass substrate

Abstract

Bottom-up plated glass through-vias, as well as related packages, equipment, systems, and manufacturing methods, are discussed. [Solution] The glass substrate of the package has a first surface, a second surface on the opposite side, and an opening extending between the first and second surfaces. The polymer material is located within the opening and on a first portion of the sidewall of the glass substrate defined by the opening. The via metallization is also located within the opening and extends from the first surface to the second surface, so that the polymer material is between a portion of the via metallization and the sidewall, and another portion of the via metallization is directly adjacent to the sidewall.

Description

[Technical Field]

[0001] The present invention relates to bottom-up plated glass through-vias, as well as related packages, devices, systems, and manufacturing methods. [Background technology]

[0002] Higher performance, lower cost, further miniaturization, greater packaging density, and greater product flexibility of integrated circuit (IC) elements are ongoing goals of the electronics industry. IC packaging is a stage in semiconductor or IC device manufacturing where an IC, monolithically manufactured on a chip (or die), is assembled into a package that protects the IC chip from physical damage and connects the IC to other packaged IC chips and / or scaled host components such as a package substrate or printed circuit board. Multiple chips can be assembled together, for example, in a multi-die package. Some package architectures involve IC dies mounted on a glass substrate and coupled to conductive through-glass vias (TGVs) extending through the glass substrate. Glass substrates offer advantages such as low dielectric loss, high thermal stability, and improved surface flatness and surface quality. However, due to high stress in the TGVs from the copper seed / glass interface during heat treatment, fracture of the glass core, such as cracking, is observed. Improvements to the present invention are needed in relation to these and other considerations. Such improvements can become important as the demand for high-performance IC packages in a variety of devices and systems grows. [Overview of the project]

[0003] The glass substrate of the package has a first surface, a second surface on the opposite side, and an opening extending between the first and second surfaces. The polymer material is located within the opening and on the first portion of the sidewall of the glass substrate defined by the opening. The via metallization is also located within the opening and extends from the first surface to the second surface, so that the polymer material is between a portion of the via metallization and the sidewall, and another portion of the via metallization is directly adjacent to the sidewall. [Brief explanation of the drawing]

[0004] The materials described in this specification are shown in the accompanying drawings as examples, not as limitations. For simplicity and clarity, the elements shown in the drawings are not necessarily drawn to scale. For example, the dimensions of some elements may be exaggerated relative to others for clarity. Furthermore, where appropriate, reference numerals are repeated between drawings to indicate corresponding or similar elements. The drawings are as follows: [Figure 1] This flowchart illustrates an exemplary method for manufacturing and assembling a glass substrate structure with bottom-up plated glass through-vias. [Figure 2] Figure 1 is a cross-sectional side view of a glass substrate structure when the method is implemented to form bottom-up plated glass through vias. [Figure 3] Figure 1 is a cross-sectional side view of a glass substrate structure when the method is implemented to form bottom-up plated glass through vias. [Figure 4] Figure 1 is a cross-sectional side view of a glass substrate structure when the method is implemented to form bottom-up plated glass through vias. [Figure 5] Figure 1 is a cross-sectional side view of a glass substrate structure when the method is implemented to form bottom-up plated glass through vias. [Figure 6] Figure 1 is a cross-sectional side view of a glass substrate structure when the method is implemented to form bottom-up plated glass through vias. [Figure 7]Figure 1 is a cross-sectional side view of a glass substrate structure when the method is implemented to form bottom-up plated glass through vias. [Figure 8] Figure 1 is a cross-sectional side view of a glass substrate structure when the method is implemented to form bottom-up plated glass through vias. [Figure 9] Figure 1 is a cross-sectional side view of a glass substrate structure when the method is implemented to form bottom-up plated glass through vias. [Figure 10] Figure 1 is a cross-sectional side view of a glass substrate structure when the method is implemented to form bottom-up plated glass through vias. [Figure 11] Figure 1 is a cross-sectional side view of a glass substrate structure when the method is implemented to form bottom-up plated glass through vias. [Figure 12] Figure 1 is a cross-sectional side view of a glass substrate structure when the method is implemented to form bottom-up plated glass through vias. [Figure 13] Figure 1 is a cross-sectional side view of a package structure when the method is implemented to assemble a package assembly having a glass substrate with bottom-up plated glass through vias. [Figure 14] Figure 1 is a cross-sectional side view of a package structure when the method is implemented to assemble a package assembly having a glass substrate with bottom-up plated glass through vias. [Figure 15] Figure 1 is a cross-sectional side view of a package structure when the method is implemented to assemble a package assembly having a glass substrate with bottom-up plated glass through vias. [Figure 16] This exhibits an exemplary system employing an IC assembly that includes a glass core substrate with bottom-up plated glass through-vias. [Figure 17] This is a block diagram of a computing device, all configured according to at least some implementations of the present disclosure. [Modes for carrying out the invention]

[0005] One or more embodiments or implementations are described herein with reference to the accompanying drawings. While specific configurations and arrangements are described, it should be understood that these are for illustrative purposes only. Those skilled in the art will recognize that other configurations and arrangements may be adopted without departing from the spirit and scope of the description. It will be apparent to those skilled in the art that the technologies and / or configurations described herein may also be used in a variety of other systems and applications not described herein.

[0006] The following detailed description refers to the attached drawings that form part of this specification. In the drawings, similar numbers may be used to designate similar parts throughout to indicate corresponding or similar elements. For simplicity and / or clarity of explanation, it should be understood that the elements shown in the drawings are not necessarily drawn to scale. For example, the dimensions of some elements may be exaggerated relative to others for clarity. Furthermore, it should be understood that other embodiments may be used, and structural and / or logical modifications may be made without departing from the scope of the claimed subject matter. Also, it should be noted that directions and references, such as up, down, top, bottom, above, below, etc., may be used to facilitate the description of the drawings and embodiments and are not intended to limit the application of the claimed subject matter. Therefore, the following detailed description should not be interpreted restrictively, and the scope of the claimed subject matter is defined by the attached claims and their equivalents.

[0007] Numerous details are described in the following description. However, it will be apparent to those skilled in the art that the present invention can be implemented without these specific details. In some examples, well-known methods and apparatus are shown in block diagram form rather than in detail, so as not to obscure the present invention. Throughout this specification, any reference to “embodiment” or “one embodiment” means that a particular feature, structure, function, or characteristic described in relation to the embodiment is included in at least one embodiment of the present invention. Thus, where the phrases “in an embodiment” or “in one embodiment” appear in various places throughout this specification, they do not necessarily refer to the same embodiment of the present invention. Furthermore, a particular feature, structure, function, or characteristic may be combined in any suitable way in one or more embodiments. For example, the first embodiment may be combined with the second embodiment if the particular features, structure, function, or characteristic related to the two embodiments are not mutually exclusive.

[0008] As used in the description of this invention and in the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural form unless the context explicitly indicates otherwise. Furthermore, the terms “and / or” as used in this specification will be understood to refer to and encompass any and all possible combinations of one or more of the related enumerated items. In this specification, the term “primarily” indicates 50% or more of a particular material or component, the term “substantially pure” indicates 99% or more of a particular material or component, and the term “pure” indicates 99.9% or more of a particular material or component. Unless otherwise specified, such percentages of material are based on atomic percentages. In this specification, the term “concentration” is used interchangeably with percentages of material and, unless otherwise indicated, refers to atomic percentages.

[0009] The terms "coupled" and "connected" and their derivatives may be used herein to describe a structural relationship between components. It should be understood that these terms are not intended to be synonymous with each other. Rather, in certain embodiments, "connected" may be used to indicate that two or more elements are in direct physical or electrical contact with each other. "Coupled" may be used to indicate that two or more elements are in physical or electrical contact with each other, either directly or indirectly (with other intervening elements between them), and / or that two or more elements cooperate or interact with each other (e.g., as in a causal relationship).

[0010] As used herein, terms such as "above", "below", "between", "on" refer to the relative position of one material layer or material component with respect to another layer or other component. For example, one layer disposed above or below another layer may be in direct contact with the other layer or may have one or more intervening layers. Further, one layer disposed between two layers may be in direct contact with the two layers or may have one or more intervening layers. In contrast, the first layer "on" the second layer is in direct contact with the second layer. Similarly, unless otherwise specified, one feature disposed between two features may be in direct contact with the adjacent features or may have one or more intervening features. The term "directly adjacent" indicates that such features are in direct contact. Further, the terms "substantially", "near", "approximately", "close", and "about" generally refer to within + / - 10% of the target value. The term "layer" as used herein may include a single material or multiple materials. When used throughout this specification and the claims, the term "at least one of" or "one or more of" in connection with a list of items can mean any combination of the listed terms. For example, the phrase "at least one of A, B, or C" can mean A; B; C; A and B; A and C; B and C; or A and B and C;

[0011] Devices, systems, and methods are described herein for bottom-up plating of glass through-vias within openings of a glass core substrate using a foil adhered to a liquid adhesive formed on the surface of the glass core substrate such that the liquid adhesive leaves the openings exposed for plating.

[0012] As described above, current package architectures include an IC die attached to a glass substrate and coupled to conductive through-glass vias (TGVs) that extend through the glass substrate. However, current manufacturing techniques have difficulties including breakage of the glass core due to high mechanical stress at the copper seed / glass interface during heat treatment, and other reliability issues. In particular, the mismatch in the coefficient of thermal expansion (CTE) between via metallization and the glass core causes difficulties when typical copper seed and plating techniques are used. Embodiments discussed herein enable the use of bottom-up plating, such as bottom-up copper plating, to at least partially separate the TGVs from the sidewalls of the glass substrate by not having a seed layer directly deposited on the sidewalls. This reduces the CTE mismatch between the via metallization and the glass and reduces the stress between them. This can reduce defects such as cracks in the glass core substrate.

[0013] In particular, via metallization within an opening in a glass core does not have a seed layer, and the seed layer may be a different material from the bulk (e.g., a titanium copper seed layer for bulk copper) or a different microstructure (e.g., a seed layer with a different particle size than the bulk metal). In some embodiments, the entire via metallization disclosed herein is a substantially pure (99%+) or pure (99.9%+) metal, such as substantially pure copper or pure copper, having a constant microstructure throughout. As used herein, the term microstructure refers to the microscopic structure of a material and refers to the arrangement of material components such as particles, defects, and grain boundaries. The term constant throughout is used to indicate that each part of the material has the same or similar microstructure in each of its regions. In some embodiments, the via metallization is physically separated at least partially (e.g., at several locations) from the sidewall of the opening in the glass so that an air gap is evident between the via metallization and the sidewall. The term air gap refers to a gap filled with any relevant ambient gas. Ambient gas may be present during gap formation (i.e., when the air gap is pinched off), or it may be provided at any subsequent time. In particular, the term air gap does not necessarily refer to a gap filled with air, but rather, according to its use in the art, refers to a gap filled with ambient gas.

[0014] In some embodiments, via metallization is formed by coating a glass substrate with a thin liquid adhesive, such as a polymer liquid, which covers the flat surface of the glass substrate but does not bridge or block openings extending through the glass substrate. A foil, such as copper foil, is bonded to the liquid adhesive, and the TGV is plated from the bottom up, starting from the copper foil which is eventually removed. The glass substrates and techniques discussed, including bottom-up plated TGVs, offer various advantages, as discussed, including stress reduction, preventing opening blockage for improved performance to enable high aspect ratio TGVs, and reducing the risk of plating voids within high aspect ratio TGVs. For example, conventional seed plating methods start plating from all surfaces with a seed layer, which carries the risk of closing from the sidewalls first and leaving voids within the openings.

[0015] Figure 1 is a flowchart illustrating exemplary method 100 for manufacturing and assembling a glass substrate structure having bottom-up plated glass through vias, arranged according to at least some implementation forms of the present disclosure. For example, method 100 may be carried out to manufacture any glass substrate structure, package structure, or assembly discussed in this specification. In the illustrated embodiment, method 100 comprises one or more steps, as shown by steps 101 to 112. However, embodiments of this specification may include additional steps, certain steps may be omitted, or steps may be performed out of the order provided. Figures 2 to 15 show the structure and components when method 100 is carried out.

[0016] Figures 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, and 12 are cross-sectional side views of a glass substrate structure when Method 100 is performed to form bottom-up plated glass through vias, arranged according to at least some of the implementation configurations of this disclosure. Figures 9 and 11 further include top views of the bottom-up plated glass through via features, arranged according to at least some of the implementation configurations of this disclosure. Figures 13, 14, and 15 are cross-sectional side views of a package structure when Method 100 is performed to assemble a package assembly having a glass substrate with bottom-up plated glass through vias, arranged according to at least some of the implementation configurations of this disclosure. Method 100 provides a process flow for bottom-up plating of TGV by coating a glass substrate with a liquid adhesive such that openings in the glass substrate remain open for bottom-up plating from a metal foil attached to the adhesive.

[0017] Method 100 begins in step 101 and receives a workpiece such as a glass substrate, which includes the thickness of the glass and any number of holes or openings extending through the thickness of the glass. The workpiece may be prepared upstream of Method 100 and may be in the form of a large panel, a wafer, etc. In addition to the thickness of the glass, the workpiece received in step 101 may include one or more materials on which an electrical routing structure can be formed.

[0018] Figure 2 is an example of a cross-sectional side view of a glass substrate structure 200 including a material to be received for processing, such as a glass substrate 201 having a first surface 202, an opposite second surface 203, and a thickness TG extending between the first surface 202 and the second surface 203 and perpendicular to both. Since the control of the flatness and / or thickness of the glass preform is superior to the control of the flatness and / or thickness of the starting substrate based on an organic material (e.g., epoxy), and the cost can be significantly lower than that of a single-crystal material (e.g., silicon), IC device package structures can be advantageously manufactured on the glass substrate 201.

[0019] The glass substrate 201 is a solid bulk material layer that may be pre-formed in any shape in a plan view (e.g., the x-y plane) suitable for a packaging workpiece, such as a rectangular shape. The glass substrate 201 has a thickness TG that can vary according to the implementation, while maintaining a thickness sufficient to enable the formation of glass vias and restricting warping. In some embodiments, the thickness TG is 200 μm or more and 2000 μm or less. In some embodiments, the thickness TG is preferably 350 μm or more and 500 μm or less, for example, a thickness of 400 μm.

[0020] In some embodiments, the glass substrate 201 consists mainly of silicon and oxygen. In some embodiments, the glass substrate 201 contains at least 23 weight percent (i.e., wt.%) of silicon and at least 26 weight percent of oxygen. The glass substrate 201 may further contain one or more additives such as aluminum, boron, magnesium, calcium, barium, tin, sodium, potassium, strontium, phosphorus, zirconium, lithium, titanium, or zinc. In embodiments where the glass substrate 201 contains at least 23 wt.% of Si and at least 26 wt.% of O, the glass substrate 201 may further contain at least 5 wt.% of Al. The additives in the glass substrate 201 can form sub-oxides (A2O), monoxides (AO), binary oxides (AO2), ternary oxides (ABO3), and mixtures thereof. For example, the glass substrate 201 is AlO x Al2O3), BO x (e.g., B2O3), MgO x (e.g., MgO), CaO x (e.g., CaO), SrO x (e.g., SrO), BaO x (e.g., BaO), SnO x (e.g., SnO2), NaO x (e.g., Na2O), KO x (e.g., K2O), PO x (e.g., P2O3), ZrO x (e.g., ZrO2), LiO x (e.g., Li2O), TiOx (e.g., TiO2) or ZnO x It may contain (e.g., ZnO2). In some embodiments, the glass substrate is BF33 glass. Therefore, depending on the chemical composition, the glass substrate 201 may be called, for example, silica, fused silica, aluminosilicate, borosilicate, or aluminoborosilicate.

[0021] In some embodiments, the glass substrate 201 is a bulk material of substantially homogeneous composition, as opposed to composite materials that may simply contain glass fillers and / or fibers. In some embodiments, the glass substrate 201 is substantially amorphous, but the glass substrate 201 may have other forms or microstructures, such as polycrystalline (e.g., nanocrystalline). In some embodiments, the glass substrate 201 has a rectangular shape in plan view. However, other shapes may be used. In some embodiments, the glass substrate 201 is a layer of glass having a thickness of 50 μm or more, a first length of 10 mm or more, and a second length of 10 mm or more perpendicular to the first length. In some embodiments, the glass substrate 201 does not contain organic adhesives or other organic materials. Although not shown, one or more material layers may coat either or both of the first surface 202 and the second surface 203 of the glass substrate 201 so that the glass substrate 201 becomes a bulk layer or core layer of a multilayer substrate. An example coating material is silicon nitride (SiN x ) or silicon oxynitride (SiO x N y This includes inorganic materials such as ). In other embodiments, a silicon layer (polycrystalline or monocrystalline) may cover one or both sides of the glass substrate 201. An organic material layer, such as a polymer dielectric material, may also cover one or more surfaces of the glass substrate 201. Thus, the glass substrate 201 is advantageously substantially free of organic materials (e.g., free of adhesives), but the workpiece may contain organic materials within the substrate stack including the glass substrate 201. Such coatings or build-up layers may be fabricated on the glass substrate 201 as described below.

[0022] As shown in the figure, the holes, through-holes, or openings 204 in the glass substrate 201 extend from the first surface 202 to the second surface 203, through the thickness TG of the glass substrate 201. Furthermore, the openings 204 define the sidewalls 205 of the glass substrate 201, which also extend from the first surface 202 to the second surface 203. The openings 204 may be formed using any suitable technique, such as laser-assisted etching techniques, which involve double-sided etching (as shown in the figure) to form a double tapered profile, or single-sided etching to form a single tapered profile.

[0023] The opening 204 may have any suitable cross-sectional shape, such as circular or elliptical, in the xy plane (see Figures 9 and 11). The opening 204 may have a diameter or cross-sectional width w1 (the longest distance across the opening 204 in the xy plane) and an arbitrary taper defining a taper width tw1 and a corresponding taper angle. As used in this specification, the taper width represents the difference between the outer edge of the opening 204 at its maximum width w1 (i.e., on the first surface 202 and / or the second surface 203) and the outer edge of the opening 204 at its minimum width (not shown). In the case of a double-tapered opening 204, the minimum width is typically at the center of the thickness TG of the glass substrate 201, while in the case of a single taper, the minimum width is typically on one of the first surface 202 and / or the second surface 203 opposite to the maximum width.

[0024] The aperture 204 may have any suitable cross-sectional width w1, such as a width w1 in the range of about 15 to 105 μm, depending on the thickness TG of the glass substrate 201. For example, with a thicker glass substrate 201 (e.g., TG of about 750 μm), the width w1 may be in the range of about 95 to 105 μm. The tapered width tw1 may be any suitable percentage of the width w1, such as 10% or less of the width w1, 20% or less of the width w1, or 30% or less of the width w1. Furthermore, the thickness TG of the glass substrate 201 across the width w1 of the aperture 204 determines the aspect ratio of the aperture 204. In particular, the techniques discussed in this specification enable the filling of apertures 204 with higher aspect ratios. In some embodiments, the aspect ratio of the aperture 204 (AR = TG / w1) is 5 or greater (i.e., for a thickness TG of 400 μm, the aperture width w1 is 80 μm or less). In some embodiments, the aspect ratio of the opening 204 is 10 or greater (i.e., for a thickness TG of 400 μm, the opening width w1 is 40 μm or less). In some embodiments, the aspect ratio of the opening 204 is 20 or greater (i.e., for a thickness TG of 400 μm, the opening width w1 is 20 μm or less). Via metallizations with other aspect ratios may be used. Note that the described dimensions of the opening 204 are inherited by the resulting via metallization formed within the opening 204, and the via metallizations described below in this specification may have the same dimensions, shape, and characteristics.

[0025] Returning to Figure 1, Method 100 proceeds to step 102, in which a backing film is laminated or otherwise attached to the first side surface of the glass substrate. The backing film may have any suitable composition and may have any suitable thickness and rigidity so that the backing film seals the first side surface of the aforementioned opening of the glass substrate. Furthermore, the backing film may be attached to the glass substrate using any suitable one or more techniques such as removable adhesive or peelable tape.

[0026] Figure 3 is a cross-sectional side view of a glass substrate structure 300 similar to the glass substrate structure 200 after a backing film or material layer 301 has been attached that substantially covers the first surface 202 and seals one side of each of the openings 204 on the first surface 202. The material layer 301 may be any material that provides a seal for the openings 204 and has sufficient mechanical strength to withstand the subsequent adhesive coating treatment described below in this specification. In some embodiments, the material layer 301 is a polymer material. As described above, the material layer 301 may be attached to the first surface 202 using any suitable technique such as lamination technique. In some embodiments, the material layer 301 may be peelable, for example, using a UV peelable film.

[0027] Returning to Figure 1, Method 100 proceeds to step 103, in which a liquid adhesive is coated onto the second surface opposite to the backing film or material layer attached to the first surface in step 102. In particular, the liquid adhesive is a material that substantially covers the second surface but does not completely bridge or clog the openings, and is deposited to a specific thickness. For example, by adjusting the formulation of the liquid adhesive and optimizing coating parameters (e.g., coating rate, dispensing rate, vacuum pressure, and ramp-down rate), a thin liquid adhesive can be formed on a planar area of ​​the glass substrate without bridging or clogging the openings of the glass substrate.

[0028] Figure 4 is a cross-sectional side view of a glass substrate structure 400 similar to the glass substrate structure 300, after the polymer material or adhesive material 401 has been deposited on the second surface 203 of the glass substrate 201 such that the adhesive material 401 covers the second surface 203, but at least a portion 412 of the opening 204 remains exposed. Furthermore, a portion of the adhesive material 401 extends into the opening 204 such that a portion of the adhesive material 401 is on a region or portion of the side wall 205, while another region or portion of the side wall 205 is exposed.

[0029] As shown in the figure, the adhesive material 401 is deposited on the second surface 203 of the glass substrate 201 such that the glass substrate 201 includes an opening 204 extending from the first surface 202 to the opposite second surface 203, and the application of the adhesive material 401 leaves at least a portion 412 of each of the openings 204 exposed. The adhesive material 401 may be deposited using any suitable one or more techniques. In some embodiments, the adhesive material 401 is deposited by slit coating of a polymer material. The polymer material may be any suitable material that covers the second surface 203, leaves each portion 412 of the openings 204 exposed, and provides sufficient adhesion to the subsequent metal foil. In some embodiments, the adhesive material 401 is one of epoxy materials, polyimide materials, benzocyclobutene-based materials, polyethylene terephthalate-based materials, high-density polyethylene materials, or polyethylene-based materials. The adhesive material 401 or a portion thereof remains within the resulting package formed using the glass substrate 201, providing additional adhesive properties to the resulting via metallization or other components, thereby improving insulation.

[0030] As shown in enlarged figure 411, the adhesive material 401 is coated onto the second surface 203 to an arbitrary appropriate thickness TC (coating thickness). The portion of the adhesive material 401 on the second surface 203 may be characterized as a planar portion or a top portion 406. The adhesive material 401 further has an extension portion 405 that extends along the side wall 205 into the opening 204 by a specific length LE (extension length). Within the opening 204, the adhesive material 401 may have the same thickness TC as the top portion 406, or the adhesive material 401 may have a thinner thickness TE (extension thickness). As shown, the extension portion 405 is on a region or portion 402 of the side wall 205, the region or portion 403 of the side wall 205 is exposed, and the portion 402 and region 403 are in contact at the boundary 404 between them.

[0031] The thickness TC of the upper portion 406 is perpendicular to the second surface 203 (i.e., the thickness TC is in the z-dimension) and may be any appropriate value. In some embodiments, the thickness TC of the upper portion 406 is 2 μm or more and 20 μm or less. In some embodiments, the thickness TC of the upper portion 406 is 5 μm or more and 10 μm or less. In some embodiments, the thickness TC of the upper portion 406 is 2 μm or more and 8 μm or less. In some embodiments, the thickness TC of the upper portion 406 is 5 μm or less. The thickness TE of the extension portion 405 is perpendicular to the side wall 205 of the opening 204 and may be any appropriate thickness. In some embodiments, the thickness TE of the extension portion 405 is 0.5 μm or more and 5 μm or less. In some embodiments, the thickness TE of the extension portion 405 is 1 μm or more and 3 μm or less. In some embodiments, the thickness TE of the extension portion 405 is 0.5 μm or more and 2 μm or less. In some embodiments, the thickness TE of the extension 405 is 1 μm or more. The length LE of the extension 405 is along the side wall 205 of the opening 204 and may be any appropriate value. In some embodiments, the length LE of the extension 405 is 5 μm or more and 20 μm or less. In some embodiments, the length LE of the extension 405 is 10 μm or more and 15 μm or less. In some embodiments, the length LE of the extension 405 is 5 μm or more and 8 μm or less. In some embodiments, the length LE of the extension 405 is 10 μm or more. Other thicknesses TC, TE and lengths LE may also be used.

[0032] As described above, the material of the adhesive material 401 is selected to substantially cover the second surface 203 but not to completely bridge or close the opening 204, and is deposited to a specific thickness under selected conditions. In some embodiments, the deposition of the adhesive material 401 includes drawing a vacuum 413 over the workpiece (e.g., including the second surface 203) while depositing the adhesive material 401. In some embodiments, deposition includes drawing a vacuum 413 during slit coating. Although not bound by theory, the application of a vacuum 413 helps to leave a portion 412 of the opening 204, allowing the adhesive material 401 to be drawn toward the second surface 203 and the sidewalls.

[0033] Returning to Figure 1, Method 100 proceeds to step 104, in which the backing film applied in step 102 is removed, the metal foil is attached to the liquid adhesive applied in step 103, and the liquid adhesive is cured. The liquid adhesive may be cured before or after the metal foil lamination, depending on the material selected for the liquid adhesive. The backing film may be removed using any one or more suitable techniques, such as UV peeling or peeling. The surface may optionally be cleaned after the backing film removal. The metal foil may be attached to the liquid adhesive using any one or more suitable techniques, such as roll-on techniques or lamination techniques. In some embodiments, a curing step is performed after the attachment of the metal foil, thereby ensuring a more secure bond between the metal foil and the workpiece. In some embodiments, curing is performed before the metal foil bonding.

[0034] Figure 5 is a side cross-sectional view of a glass substrate structure 500 similar to the glass substrate structure 400 after the backing film or material layer 301 has been removed and the metal foil 501 has been attached. The metal foil 501 may be any suitable material or multilayer material stack that provides a seed for bottom-up via metallization plating. In some embodiments, the metal foil 501 is copper metal foil. However, other material systems may be used. As shown in the figure, a portion of the metal foil 501 is exposed within at least a portion 412 of the opening 204. It should also be noted that a portion 403 of the side wall 205 of the opening 204 is also exposed, and as a result, advantageously, the seed material is not tightly bonded to the portion 403 of the side wall 205. This reduces stress by the via metallization that is subsequently formed. As described above, the curing or annealing process may be performed before or after the attachment of the metal foil 501, depending on the material selected for the adhesive material 401.

[0035] Returning to Figure 1, Method 100 proceeds to step 105, where a non-plated film is applied to the metal foil, and the appropriate metal is plated from the metal foil applied in step 104 in a bottom-up manner to fill the opening. The non-plated film limits the current supply for bottom-up plating compared to plating from the surface metal foil. In some embodiments, the plating is copper plating starting from the copper foil applied to the bottom of the opening. In some embodiments, the plating is carried out in a bottom-up manner through the opening until over-plating is evident on the upper surface. The resulting plated material consistently has a consistent microstructure and morphology. In particular, it is evident that there is no seed material on the sidewalls of the plated opening (i.e., no other seed material, nor different microstructure and morphology). Furthermore, if bottom-up plating proceeds without a seed layer on the sidewalls of the opening, one or more air gaps may exist between the plated metal and the sidewalls of the opening. In some embodiments, the air gaps are not evident, but even in such situations, there is no seed layer in the via metallization, and therefore there is no direct seed layer bonded to the glass substrate.

[0036] Figure 6 is a cross-sectional side view of a glass substrate structure 600 similar to glass substrate structure 500, after the application of the unplated film 606 and during and after the bottom-up plating 601 of the via metallizations 602, 603, 604 in the opening 204. As described above, the bottom-up plating 601 proceeds upward from the metal foil 501, filling the opening 204 until the excess coating 605 of the via metallizations 602, 603, 604 becomes apparent. The via metallizations 602, 603, 604 may be substantially pure copper or any suitable material such as pure copper. The resulting via metallizations 602, 603, 604 or metallization structure may be characterized as through-substrate vias (TSV) or glass vias (TGV). As described above, the unplated film 606 restricts plating from the surface of the metal foil 501 opposite the opening 204.

[0037] Returning to Figure 1, method 100 proceeds to step 106, where any excess coating from bottom-up plating may be removed as necessary, and the unplated film applied in step 105 is removed. For example, the plated via metallization may be planarized or polished to remove any excess coating associated with the plating process and / or to provide a flat surface for continuous processing. Furthermore, the unplated film may be removed using any suitable one or more techniques such as UV peeling or peeling.

[0038] Figure 7 is a cross-sectional side view of a glass substrate structure 700 similar to glass substrate structure 600 after planarization to form via metallizations 602, 603, and 604 having a first surface 202 and a substantially flat surface adjacent to the first surface 202, and after removal of the non-plated film 606. As shown in the figure, after planarization, the via metallizations 602, 603, and 604 remain only adjacent to the side wall 205 of the opening 204 on the first surface 202.

[0039] Returning to Figure 1, Method 100 proceeds to step 107, in which a protective film is laminated or otherwise attached to the surface of the glass substrate planarized in step 106. The protective film may have any suitable composition and may have any suitable thickness and rigidity so that the protective film protects the surface during subsequent processing. The protective film may be attached to the glass substrate using any suitable one or more techniques such as removable adhesive or peelable tape. In some embodiments, the protective film is a UV-peelable protective film attached to the polished side or surface of the glass substrate.

[0040] Figure 8 is a cross-sectional side view of a glass substrate structure 800 similar to the glass substrate structure 800 after a protective film or material layer 801 has been attached that substantially covers the first surface 202 and protects the first surface 202, including the surfaces of via metallization 602, 603, and 604. The material layer 801 may be any material that provides protection and mechanical support during the subsequent metal foil and / or etching process described below. In some embodiments, the material layer 801 is a polymer material. As described above, the material layer 801 may be attached to the first surface 202 using any suitable technique such as lamination technique. In some embodiments, the material layer 801 is peelable, for example, using a UV peelable film.

[0041] Returning to Figure 1, Method 100 proceeds to step 108, in which the metal foil applied in step 104 is removed and optionally a portion of the adhesive applied in step 103 is removed. The metal foil can be removed using any one or more suitable techniques, such as a bulk metal etching process. In some embodiments, the metal foil is copper, and the removal involves removing the foil by performing bulk copper wet etching. At least a portion of the adhesive material layer can then be removed using any one or more suitable techniques. In some embodiments, a portion of the adhesive material layer is removed using a polishing technique, a dry etching technique, or a wet etching technique. For example, the polishing step can favorably planarize the adhesive by via metallization plated in the openings.

[0042] Figure 9 is a side cross-sectional view of a glass substrate structure 900 similar to the glass substrate structure 800 after the metal foil 501 and a portion of the adhesive material 401 have been removed. As described above, the metal foil 501 may be removed using wet etching techniques, and a portion of the adhesive material 401 may be removed using dry and / or wet techniques, while the other components of the glass substrate structure 900 are protected by the material layer 801.

[0043] As shown, the glass substrate structure 900 includes a glass substrate 201 having a thickness TG extending between a first surface 202 and a second surface 203; an opening 204 extending from the first surface 202 through the thickness TG of the glass substrate 201 to the second surface 203, defining a side wall 205 of the glass substrate 201 within the opening 204; an extension 405 of a polymer material or adhesive material 401 on a portion 402 of the side wall 205 within the opening 204; and via metallizations 602, 603, 604 located within the opening and extending from the first surface through the thickness TG of the glass substrate to the second surface, wherein the via metallizations 602, 603, 604 have a portion 901 directly on the extension 405 within the opening 204 and a portion 902 directly on a portion 403 of the side wall 205 of the glass substrate 201 within the opening 204.

[0044] As described above, the bottom-up manufacturing of via metallizations 602, 603, and 604 prevents the via metallizations 602, 603, and 604 from being firmly attached to the sidewall 205 of the glass substrate 201. In subsequent heat treatment, the mismatch in CTE between the via metallizations 602, 603, and 604 and the glass substrate 201 does not cause cracks and other failures due to mechanical separation of the via metallizations from the glass substrate 201. As shown in enlarged figure 912, in some embodiments, the glass substrate structure 900 includes one or more air gaps 904 between portions 903 of the via metallizations 602, 603, and 604 and portions 905 of the sidewall 205 of the glass substrate 201. As described above, the air gaps 904 may be filled with any suitable ambient gas according to its use in the art. The air gaps 904 may be characterized as gaps, voids, spans, etc.

[0045] The air gap 904 may have any appropriate distance DAG (distance air gap) between the portion 903 of the via metallization 602, 603, 604 and the portion 905 of the sidewall 205. In some embodiments, the distance DAG between the portion 903 of the via metallization 602, 603, 604 and the portion 905 of the sidewall 205 is between 10 nm and 100 nm. In some embodiments, the distance DAG between the portion 903 of the via metallization 602, 603, 604 and the portion 905 of the sidewall 205 is between 20 nm and 75 nm. In some embodiments, the distance DAG between the portion 903 of the via metallization 602, 603, 604 and the portion 905 of the sidewall 205 is between 25 nm and 50 nm. In some embodiments, the distance DAG between portions 903 of via metallizations 602, 603, 604 and portions 905 of the sidewall 205 is 30 nm or more. Other distances may be used. Furthermore, the air gap 904 can be dispersed in any way through the via metallizations 602, 603, 604. In some embodiments, portions of the via metallizations 602, 603, 604 are directly on the sidewall 205 at some locations (i.e., in physical contact with the sidewall 210), while at other locations there is an air gap 904. In some embodiments, the ratio of the area of ​​the air gap 904 to the total area in the opening 204 is 50% or more. In some embodiments, the ratio of the area of ​​the air gap 904 to the total area in the opening 204 is 75% or more. Other air gap ratios may be used.

[0046] As described above, by bottom-up plating of via metallizations 602, 603, and 604, each whole of via metallizations 602, 603, and 604 is made of the same material and has the same properties. The same material and properties include material composition, microstructure, and morphology and extend throughout the opening 204. In some embodiments, via metallizations 602, 603, and 604 are each substantially pure copper. In some embodiments, via metallizations 602, 603, and 604 are each pure copper. In particular, the whole of metallizations 602, 603, and 604 includes portions 901, 902, and 903 of via metallizations 602, 603, and 604, and these portions have the same composition and have the same properties. In some embodiments, the whole of via metallizations 602, 603, and 604 is substantially pure copper having a shared or constant microstructure as described above.

[0047] As shown in enlarged figure 913, the polymer material of the extension 405 extends completely around the inner cross-sectional shape 906 of the opening 204 on the second surface 203. That is, the extension 405 is adjacent to the rim of the glass substrate 201 that defines the inner cross-sectional shape 906. The inner cross-sectional shape 906 may be any suitable shape, such as circular (as shown), elliptical, etc. In some embodiments, the upper surface of the extension 405, the upper surfaces of the via metallizations 602, 603, 604, and the upper surface of the glass substrate define a flat surface as shown by the second surface 203.

[0048] Returning to Figure 1, Method 100 proceeds to step 109, where the protective film applied in step 107 is removed, and the workpiece is optionally cleaned in preparation for further processing. The protective film can be removed using any suitable one or more techniques such as UV peeling, peeling, or heat treatment. The surface may optionally be cleaned after the removal of the protective film.

[0049] Figure 10 is a side cross-sectional view of a glass substrate structure 1000 similar to glass substrate structure 900 after the protective film or material layer 801 has been removed. As described above, the material layer 801 may be removed using one or more suitable techniques of any choice, such as UV peeling, peeling, or heat treatment, and the glass substrate structure 1000 may be cleaned using one or more suitable techniques of any choice before the subsequent processing, as will be described below with respect to process 110 and Figures 13-15.

[0050] As described above, in some embodiments, at least a portion of the adhesive material 401 (i.e., the extension 405) remains. In some embodiments, all or most of the adhesive material 401 applied in step 102 remains after the copper foil is removed. Referring to the glass substrate structure 800 in Figure 8, the metal foil 501 can be removed, but all or most of the adhesive material 401 remains.

[0051] Figure 11 is a cross-sectional side view of a glass substrate structure 1100 similar to the glass substrate structure 800 after the metal foil 501 has been removed using one or more suitable techniques, such as wet etching. In the context of the glass substrate structure 1100, as shown with respect to enlarged figures 1111 and 1113, in some embodiments the glass substrate structure 900 includes an upper portion 406 and an extension 405 of the adhesive material 401. Such components may have any properties described elsewhere in this specification. For example, in the context of Figure 11, the polymer material includes an extension 405 that extends entirely around the inner cross-sectional shape 906 of the opening 204 on the second surface 203, and the polymer material includes an upper portion 406 that extends across the second surface 203. The extension 405 is adjacent to the rim of the glass substrate 201 defining the inner cross-sectional shape 906, and the upper portion extends from the extension 405 across the second surface 203 into adjacent openings of the opening 204.

[0052] As shown in Figure 11, the adhesive material 401 thereby includes extensions 1101, 1103 and an upper portion 1102, the extensions 1101, 1103 and the upper portion 1102 becoming part of a continuous material having substantially the same composition and properties. As shown, extension 1101 lies between a portion of the via metallization 602 and the first opening 204, and extension 1103 lies between a portion of the via metallization 603 and the second opening 204. The upper portion 1102 extends between extensions 1101 and 1103 onto the second surface 203 of the glass substrate 201.

[0053] Figure 12 is a side cross-sectional view of a glass substrate structure 1200 similar to the glass substrate structure 1100 after the protective film or material layer 801 has been removed. The material layer 801 can be removed using any one or more suitable techniques such as UV peeling, peeling, or heat treatment, and the glass substrate structure 1200 can be cleaned using any one or more suitable techniques before further processing, as described below.

[0054] Returning to Figure 1, Method 100 proceeds to step 110, where the electrical routing structure may be constructed above at least one side of the glass substrate before assembly with the integrated die. The electrical routing structure may be electrically coupled to glass through vias and may include, for example, one or more levels of metallization features embedded in any suitable dielectric material. The electrical routing structure formed in step 110 may interconnect one or more IC dies with each other and / or couple one or more of the IC dies with conductive through vias. Thus, the metallization feature pitch of the routing structure is favorably minimized for the best interconnection density.

[0055] Figure 13 is a side cross-sectional view of a package structure 1300 similar to the glass substrate structure 1000 after the glass substrate structure 1000 has been attached to a handle or carrier 1301 and the routing structure 1302 has been manufactured or attached. Although the incorporation of the glass substrate structure 1000 into package structures 1300, 1400, and 1500 is illustrated, any glass substrate structure discussed in this specification, such as glass substrate structure 1200, may be placed within the package structures 1300, 1400, and 1500. The carrier 1301 may have any suitable composition and any suitable thickness. Furthermore, the glass substrate structure 1000 may be attached to the carrier 1301 using any suitable one or more techniques, such as removable adhesive or peelable tape.

[0056] In some embodiments, the routing structure 1302 is constructed on a second surface 203. In some embodiments, the routing structure 1302 is constructed on a first surface 202, or the routing structure is constructed on both the first surface 202 and the second surface 203. As shown, the routing structure 1302 includes one or more levels of redistribution layer (RDL) metallization feature portions 1303 embedded within one or more layers of dielectric material 1304. The RDL metallization feature portions 1303 may include any suitable metal, such as copper. In some embodiments, a portion of the RDL metallization feature portions 1303 preferably electrically bridges two or more IC dies with a fine metallization feature pitch, which is made possible by the improved flatness profile of the glass substrate 201 compared to a conventional organic preform core. Furthermore, a portion of the routing structure 1302 further includes metallization feature portions 1303 for interconnecting the IC dies to conductive glass through-vias 602, 603, 604.

[0057] The dielectric material 1304 may be any suitable material such as a molding compound, a spin-on material, or a dry film laminate material. In some embodiments, the dielectric material 1304 is applied to a cast in a wet or uncured state and then dried or cured. Alternatively, the dielectric material 1304 may be applied as a semi-cured dry film that is fully cured after application to the glass substrate 201. The composition of the dielectric material 1304 may include one or more organic dielectric materials such as epoxy resins, phenolic glass, or resin films such as the GX series films commercially available from Ajinomoto Fine-Techno Co., Inc. (ABF). Exemplary epoxy resins for placement in the dielectric material 1304 include novolac acrylates such as epoxy phenol novolacs (EPN) or epoxy cresol novolacs (ECN)). In some embodiments, the dielectric material 1304 is, for example, a bisphenol A epoxy resin containing epichlorohydrin. In some embodiments, the dielectric material 1304 includes an aliphatic epoxy resin.

[0058] Returning to Figure 1, Method 100 follows step 111 in which at least one IC die is assembled into a workpiece. In some embodiments, one or more IC dies are mounted to an electrical wiring structure formed in step 110. Each of the one or more IC dies assembled in step 111 may include any electrical circuit. In some embodiments, one or more of the IC dies include a logic circuit including a logic gate. The one or more IC dies assembled in step 111 may also include any photonic circuit suitable for detecting, emitting, or processing (e.g., filtering, multiplexing, and demultiplexing) optical signals.

[0059] Figure 14 is a cross-sectional side view of a package structure 1400 similar to package structure 1300 after any number of IC dies, such as IC dies 1401 and 1402, have been attached to the routing structure 1302 using an intervening electrical interconnect 1403. As shown, the IC dies 1401 and 1402 are assembled to interconnect the interfaces within the upper metallization level of the routing structure 1302 of the assembled package structure 1400. Although illustrated using two IC dies 1401 and 1402, the package structure 1400 may contain any number of IC dies. In some embodiments, the IC dies 1401 and 1402 are first-level dies of a packaged multi-die IC device package structure. The IC dies 1401 and 1402 may be directly bonded to the routing structure 1302, or they may be electrically coupled via an intervening electrical interconnect 1403 which may contain solder of any suitable composition. In the illustrated example, IC dies 1401 and 1402 are flip-chip connected to integrated circuits within each die, which are adjacent to the top surface of the routing structure 1302. In an alternative embodiment, IC dies 1401 and 1402 include through-die vias (not shown) having integrated circuits distal to the top surface of the routing structure 1302.

[0060] The IC dies 1401 and 1402 may include any suitable circuitry. In some embodiments, at least one of the IC dies 1401 and 1402 is a fully functional ASIC. In some embodiments, the IC dies 1401 and 1402 include chiplets or tiles having more limited functionality that complement one or more other functions of the IC dies 1401 and 1402, which should be part of the same multi-die device. The chiplets or tiles may be, for example, wireless circuits, microprocessor cores, electronic memory circuits, floating-point gate arrays (FPGAs), power management and / or power supply circuits, or MEMS devices. In some examples, one or more of the IC dies 1401 and 1402 include one or more banks of active repeater circuits to improve multi-die interconnects (e.g., network-on-chip architectures). In other examples, one or more of the IC dies 1401 and 1402 include clock generator circuits or temperature sensing circuits. In other examples, one or more of the IC dies 1401, 1402, together with the other IC dies 1401, 1402, include logic circuits that implement a multichiplet set logic circuit (e.g., a mesh network on-chip architecture). In some specific examples, at least one of the IC dies 1401, 1402 includes a microprocessor core circuit, for example, one or more shift registers. The IC dies 1401, 1402 may include field-effect transistors (FETs) having a device pitch of 80 nm or less. The FETs may be of any architecture (e.g., planar, non-planar, single-gate, multi-gate, multilayer nanosheet, etc.). Additionally or alternatively, the IC dies 1401, 1402 may include active devices other than FETs, such as magnetic tunnel junctions (MTJs) and capacitors. In some embodiments, the IC dies 1401, 1402 include one or more IC die metallization levels embedded in an insulator.

[0061] Returning to Figure 1, Method 100 proceeds to step 112, where the final device is packaged, assembled, and output, for example, by attaching the package to a host component. The assembly or package can be installed in any suitable electronic device such as a laptop, netbook, notebook, ultrabook, smartphone, tablet, personal digital assistant (PDA), ultramobile PC, mobile phone, desktop computer, server, printer, scanner, monitor, set-top box, entertainment control unit, digital camera, portable music player, or digital video recorder.

[0062] Figure 15 is an example of a cross-sectional side view of a package structure 1500 similar to package structure 1400 after attachment to the host component 1503 and deployment of one or more heat spreaders and / or heat sinks 1502. As shown, a package structure 1500 that can be characterized as a system includes a package structure 1400 attached to the host component 1503 using interconnects 1504. In some embodiments, the interconnects 1504 are solder (e.g., SAC) microbumps, but other interconnect features may be used. In some embodiments, the host component 1503 is primarily silicon. The host component 1503 may also include one or more alternative materials known to be suitable as interposers or package substrates (e.g., epoxy preforms, cored or coreless laminates, etc.). In some embodiments, the host component 1503 is a printed circuit board (PCB). In some embodiments, the host component 1503 includes one or more metallization redistribution levels (not shown) embedded in a dielectric material. The host component 1503 may include one or more IC dies, one or more passive or active components, or similar components embedded therein.

[0063] The host component 1503 may include an interconnect 1505 which may include solder (e.g., balls, bumps, etc.) suitable for a given host board architecture (e.g., surface mount FR4). Also, as shown in the figure, one or more heat spreaders and / or heat sinks 1502 may be coupled to the package structure 1400, which may be advantageous, for example, if the IC dies 1401, 1402 include one or more CPU cores or other circuits of similar power density. Any package dielectric 1501, such as molding material, may surround the side walls of the IC dies 1401, 1402. Although not shown, the package dielectric 1501 may be ground down to the top surface of the IC dies 1401, 1402 so that the heat spreader / sink 1502 can make closer contact with the IC dies 1401, 1402.

[0064] Figure 16 shows an exemplary system employing an IC assembly including a glass core substrate having bottom-up plated glass through-vias, arranged according to at least some of the implementation forms of this disclosure. The system may be, for example, a mobile computing platform 1605 and / or a data server machine 1606. Either can use a component assembly including an IC assembly including a glass core substrate having bottom-up plated glass through-vias, as described elsewhere in this specification. The server machine 1606 may be, for example, any commercial server including any number of high-performance computing platforms arranged in a rack and networked together for electronic data processing, and in an exemplary embodiment includes an IC die assembly 1650 having a glass core substrate having bottom-up plated glass through-vias, as described elsewhere in this specification. The mobile computing platform 1605 may be any portable device configured for electronic data display, electronic data processing, wireless electronic data transmission, etc., respectively. For example, the mobile computing platform 1605 may be a tablet, smartphone, or laptop computer, and may include a display screen (e.g., capacitive, inductive, resistive, or optical touchscreen), a chip-level or package-level integrated system 1610, and a battery 1615 and / or power supply circuitry. While illustrated with respect to the mobile computing platform 1605, in other examples, the chip-level or package-level integrated system 1610 and battery 1615 may be implemented in desktop computing platforms, automotive computing platforms, Internet of Things platforms, and the like. As described below, in some examples, the disclosed system may include subsystems 1660, such as a system-on-a-chip (SOC) or an integrated system of multiple ICs, which is shown with respect to the mobile computing platform 1605.

[0065] Whether located within the integrated system 1610 shown in enlarged figure 1620 or as a standalone package device within the data server machine 1606, the subsystem 1660 may include memory and / or processor circuits 1640 (e.g., RAM, microprocessor, multicore microprocessor, graphics processor, etc.), a power management integrated circuit (PMIC) 1630, a controller 1635, and a radio frequency integrated circuit (RFIC) 1625 (e.g., including a broadband RF transmitter and / or receiver (TX / RX)). As shown, one or more IC dies, such as the memory and / or processor circuit 1640, may be assembled and mounted such that one or more have an IC assembly including a glass core substrate with bottom-up plated glass through-vias as described herein. In some embodiments, the RFIC 1625 includes a digital baseband and an analog front-end module further including a power amplifier on the transmit path and a low-noise amplifier on the receive path. Functionally, the PMIC 1630 can perform battery power regulation, DC-DC conversion, etc., and therefore has an input coupled to the battery 1615 and an output that provides current to other functional modules. As further shown in Figure 16, in an exemplary embodiment, the RFIC 1625 has an output coupled to an antenna (not shown) to implement any of several radio standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 family), WiMAX (IEEE 802.16 family), IEEE 802.20, Long-Term Evolution (LTE), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM®, GPRS, CDMA, TDMA, DECT, Bluetooth®, their derivatives, and any other radio protocols designated as 3G, 4G, 5G, and later. The memory circuit and / or processor circuit 1640 may provide memory functions for subsystem 1660, high-level control for subsystem 1660, data processing, etc. In alternative mounting configurations, each SOC module may be integrated onto a separate IC coupled to a package substrate, interposer, or board.

[0066] Figure 17 is a block diagram of a computing device 1700 according to several embodiments. For example, one or more components of the computing device 1700 may include either a package structure or assembly having a glass core substrate with bottom-up plated glass through-vias, as described elsewhere in this specification. Numerous components are shown in Figure 17, but any one or more of these components may be omitted or replicated as suitable for the application. In some embodiments, some of the components included in the computing device 1700 may be mounted on one or more printed circuit boards (e.g., a motherboard). In some embodiments, various of these components may be manufactured on a single system-on-chip (SoC) die, or implemented in a plurality of disassembled chiplets or tiles packaged together. Any of such packaged components may include vertically aligned photonic vias implemented in an assembly having non-aggregated PIC functionality, as described, for example, in this specification. Furthermore, in various embodiments, the computing device 1700 may not include one or more of the components shown in Figure 17, but it may include interface circuits for coupling with one or more components. For example, the computer device 1700 may not include the display device 1703, but it may include a display device interface circuit (e.g., a connector and driver circuit) to which the display device 1703 can be coupled.

[0067] The computing device 1700 may include a processing unit 1701 (for example, one or more processing units). As used in this specification, the term processing unit or processor refers to a device that processes electronic data from registers and / or memory and converts that electronic data into other electronic data that can be stored in registers and / or memory. The processing unit 1701 may include a memory 1721, a communication device 1722, a refrigeration / active cooling device 1723, a battery / power regulator 1724, a logic device 1725, an interconnect 1726, a thermal regulator 1727, and a hardware security device 1728.

[0068] The processing unit 1701 may include one or more digital signal processors (DSPs), application-specific integrated circuits (ASICs), central processing units (CPUs), graphics processing units (GPUs), cryptographic processors (dedicated processors that execute cryptographic algorithms in hardware), server processors, or any other suitable computing units.

[0069] The processing unit 1701 may include a memory 1702, which itself may include one or more memory devices such as volatile memory (e.g., dynamic random access memory (DRAM)), non-volatile memory (e.g., read-only memory (ROM)), flash memory, solid-state memory, and / or a hard drive. In some embodiments, the processing unit 1701 shares a package with the memory 1702. This memory may be used as a cache memory and may include embedded dynamic random access memory (eDRAM) or spin-transfer torque magnetic random access memory (STT-MRAM).

[0070] The computing device 1700 may include a thermal control / cooling device 1706. The thermal control / cooling device 1706 can maintain the processing unit 1701 (and / or other components of the computing device 1700) at a predetermined low temperature during operation. This predetermined low temperature may be any temperature described elsewhere in this specification.

[0071] In some embodiments, the computing device 1700 may include a communication chip 1707 (e.g., one or more communication chips). For example, the communication chip 1707 may be configured to manage wireless communication for transferring data to and from the computing device 1700. The term “wireless” and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communication channels, etc., that can communicate data by using modulated electromagnetic radiation over a non-solid medium.

[0072] The computing device 1700 may include, for example, any photonic structure discussed in this specification that can facilitate communication between one or more instances of the processing unit 1701 and / or one or more instances of the memory 1702.

[0073] The computing device 1700 may include a battery / power supply circuit 1708. The battery / power supply circuit 1708 may include one or more energy storage devices (e.g., batteries or capacitors) and / or a circuit for coupling components of the computing device 1700 to an energy source separate from the computing device 1700 (e.g., AC trunk power).

[0074] The computing device 1700 may include a display device 1703 (or, as described above, a corresponding interface circuit). The display device 1703 may include any visual indicator such as a head-up display, computer monitor, projector, touchscreen display, liquid crystal display (LCD), light-emitting diode display, or flat panel display.

[0075] The computing device 1700 may include an audio output device 1704 (or, as described above, a corresponding interface circuit). The audio output device 1704 may include any device that generates an audible indicator, such as a speaker, headset, or earphones.

[0076] The computing device 1700 may include an audio input device 1710 (or, as described above, a corresponding interface circuit). The audio input device 1710 may include any device that generates a signal representing sound, such as a microphone, a microphone array, or a digital instrument (e.g., an instrument with a Musical Instrument Digital Interface (MIDI) output).

[0077] The computing device 1700 may include a Global Positioning System (GPS) device 1709 (or, as described above, a corresponding interface circuit). The GPS device 1709 may communicate with a satellite-based system and receive the position of the computing device 1700, as is known in the art.

[0078] The computing device 1700 may include another output device 1705 (or, as described above, a corresponding interface circuit). Examples include an audio codec, a video codec, a printer, a wired or wireless transmitter for providing information to other devices, or additional storage devices.

[0079] The computing device 1700 may include another input device 1711 (or, as described above, a corresponding interface circuit). Examples include an accelerometer, gyroscope, compass, image capture device, keyboard, cursor control device such as a mouse, stylus, touchpad, barcode reader, quick response (QR) code reader, any sensor, or radio frequency identification (RFID) reader.

[0080] The computing device 1700 may include a security interface device 1712. The security interface device 1712 may include any device that provides security measures for the computing device 1700, such as intrusion detection, biometric verification, security encoding or decoding, access list management, malware detection, or spyware detection.

[0081] The computing device 1700 may include an antenna 1713. The antenna 1713 may include any device that converts electric current to radio waves and / or radio waves to electric current.

[0082] The computing device 1700, or a subset of its components, may have any suitable form factor, such as a server or other networked computing component, a mobile device, a printer, a scanner, a monitor, a set-top box, an entertainment control unit, a vehicle control unit, a digital camera, a digital video recorder, or a wearable computing device.

[0083] While certain features described in this specification are explained with reference to various embodiments, this explanation is not intended to be constrained. Therefore, various modifications of the implementations described in this specification, as well as other implementations, which would be obvious to those skilled in the art to whom this disclosure pertains, are considered to be within the spirit and scope of this disclosure.

[0084] It will be recognized that the present invention is not limited to the embodiments described and can be implemented with modifications and changes without departing from the scope of the appended claims. For example, the embodiments described above may include certain combinations of features as further provided below.

[0085] The following relates to exemplary embodiments.

[0086] In one or more first embodiments, the device is: A glass substrate having a thickness extending between the first surface and the opposing second surface, An opening extending from the first surface through the thickness of the glass substrate to the second surface, wherein the opening defines the side wall of the glass substrate within the opening, A polymer material on the first portion of the side wall in the opening directly adjacent to the first surface, via metallization within the opening, comprising a first portion extending from the first surface through the thickness of the glass substrate to the second surface and directly on the polymer material within the opening, and a second portion directly on the second portion of the side wall of the glass substrate within the opening, Equipment including.

[0087] The apparatus according to the first embodiment, wherein in one or more second embodiments, the apparatus further includes an air gap between the third portion of the via metallization and the third portion of the side wall of the glass substrate in the opening.

[0088] In one or more third embodiments, the apparatus according to the first or second embodiment, wherein the air gap extends over a distance of 30 nm or more perpendicular to the third portion of the side wall of the glass substrate, between the third portion of the via metallization and the third portion of the side wall of the glass substrate.

[0089] The apparatus according to the first to fourth embodiments, wherein in one or more fourth embodiments, the entire via metallization comprises the first part, the second part, and the third part, and the entire via metallization is substantially pure copper.

[0090] In one or more fifth embodiments, the apparatus according to the first to fourth embodiments, wherein the polymer material comprises one of an epoxy material, a polyimide material, a benzocyclobutene-based material, a polyethylene terephthalate-based material, or a polyethylene-based material.

[0091] In one or more sixth embodiments, the polymer material has a thickness of 0.5 μm or more perpendicular to the first portion of the sidewall, and the polymer material has a length of 10 μm or more along the first portion of the sidewall, as described in the first to fifth embodiments of the apparatus.

[0092] In one or more seventh embodiments, the via metallization has an aspect ratio of 10 or more, defined by the thickness of the glass substrate relative to the cross-sectional width of the via metallization on the first surface, as described in the apparatus of the first to sixth embodiments.

[0093] In one or more eighth embodiments, the apparatus according to the first to seventh embodiments, the polymer material extends entirely on the first surface around the inner cross-sectional shape of the opening, extends across a portion of the first surface, and contacts a second via metallization in the second opening that extends from the first surface through the thickness of the glass substrate to the second surface.

[0094] The apparatus according to the first to eighth embodiments, in one or more of the ninth embodiments, further comprising an integrated circuit (IC) die on the first or second surface of the glass substrate, wherein the IC is electrically coupled to the via metallization, and the glass substrate is a layer of glass having a thickness of 50 μm or more, a first length of 10 mm or more, and a second length of 10 mm or more perpendicular to the first length.

[0095] In one or more tenth embodiments, the system includes a package substrate by any of the devices described in the first to eighth embodiments, and the system further includes an IC die and / or power supply coupled to a glass substrate.

[0096] In one or more eleventh embodiments, the device is: A glass substrate having an opening extending from a first surface to an opposing second surface, via metallization located within the opening and extending from the first surface to the second surface, A polymer material between the first portion of the via metallization and the first portion of the sidewall of the glass substrate defined by the opening, wherein the first portion of the sidewall extends from the first surface to the first depth of the opening, and the second portion of the via metallization is directly adjacent to the second portion of the sidewall extending from the first depth to the second surface, Equipment including.

[0097] In one or more of the twelfth embodiments, the apparatus according to the eleventh embodiment further includes an air gap between the via metallization and the second portion of the side wall.

[0098] The apparatus according to the 11th or 12th embodiment, wherein in one or more 13th embodiments, the entire via metallization comprises the first and second portions, and the entire via metallization is substantially pure copper having a shared microstructure.

[0099] In one or more of the fourteenth embodiments, the apparatus according to the eleventh to thirteenth embodiments, wherein the polymer material has a thickness of 0.5 μm or more perpendicular to the first portion of the sidewall, the polymer material has a length of 10 μm or more along the first portion of the sidewall, and the via metallization has an aspect ratio of 10 or more defined by the length of the via metallization perpendicular to the first surface across the cross-sectional width of the via metallization on the first surface.

[0100] In one or more of the 15th embodiment, the apparatus according to the 11th to 14th embodiments, wherein the polymer material extends completely around the inner cross-sectional shape of the opening on the first surface, extends across a portion of the first surface, and contacts a second via metallization in the second opening that extends from the first surface to the second surface.

[0101] The apparatus according to the 11th to 15th embodiments, in one or more of the 16th embodiments, further comprising an integrated circuit (IC) die on the first or second surface of the glass substrate, wherein the IC is electrically coupled to the via metallization, and the glass substrate is a layer of glass having a thickness of 50 μm or more, a first length of 10 mm or more, and a second length of 10 mm or more perpendicular to the first length.

[0102] In one or more of the 17th embodiments, the system includes a package substrate by any of the devices described in the 11th to 15th embodiments, the system further including an IC die and / or power supply coupled to a glass substrate.

[0103] In one or more of the eighteenth embodiments, a method, A step of depositing an adhesive material onto a first surface of a glass substrate, wherein the glass substrate includes a plurality of openings extending from the first surface to an opposing second surface of the glass substrate, and the application of the adhesive material leaves at least a portion of each of the openings exposed. The steps include applying a metal foil to the adhesive material on the first surface, The steps include: plating each of the openings with a metal that extends from the metal foil on the first surface to the second surface to form via metallation within the openings; A method that includes this.

[0104] In one or more of the 19th embodiments, the method according to the 18th embodiment, wherein the step of depositing the adhesive material includes a slit coating of one of the following: epoxy material, polyimide material, benzocyclobutene-based material, polyethylene terephthalate-based material, or polyethylene-based material.

[0105] The method according to the 18th or 19th embodiment, wherein in one or more of the 20th embodiments, the adhesive material is deposited on the first surface of the glass substrate to a thickness of 10 μm or less.

[0106] In one or more of the 21st embodiments, the method according to the 18th to 20th embodiments, wherein the step of depositing the adhesive material includes the step of attaching the second surface of the glass substrate to the material layer and drawing the first surface into a vacuum while depositing the adhesive material.

[0107] In one or more of the 22nd embodiment, the method according to the 18th to 21st embodiments further includes the step of attaching the second surface of the glass substrate to the material layer, etching the adhesive material, and peeling off the material layer to remove at least a portion of the adhesive material.

[0108] It will be recognized that the present invention is not limited to the embodiments described and can be implemented with modifications and changes without departing from the scope of the appended claims. For example, the embodiments described above may include specific combinations of features. However, the embodiments described above are not limited in this respect, and in various implementations, the embodiments described above may include undertaking only a subset of such features, undertaking a different order of such features, undertaking a different combination of such features, and / or undertaking additional features other than those explicitly enumerated. Accordingly, the scope of the present invention should be determined by reference to the appended claims, together with the entire scope of equivalents to which such claims are granted.

Claims

1. It is a device, A glass substrate having a thickness extending between the first surface and the opposing second surface, An opening extending from the first surface through the thickness of the glass substrate to the second surface, wherein the opening defines the side wall of the glass substrate within the opening, A polymer material on the first portion of the side wall in the opening directly adjacent to the first surface, via metallization within the opening, comprising a first portion extending from the first surface through the thickness of the glass substrate to the second surface and directly on the polymer material within the opening, and a second portion directly on the second portion of the side wall of the glass substrate within the opening, Equipment including.

2. The apparatus according to claim 1, further comprising an air gap between the third portion of the via metallization and the third portion of the side wall of the glass substrate in the opening.

3. The apparatus according to claim 2, wherein the air gap extends over a distance of 30 nm or more perpendicular to the third portion of the side wall of the glass substrate, between the third portion of the via metallization and the third portion of the side wall of the glass substrate.

4. The apparatus according to claim 2, wherein the entire via metallization comprises the first part, the second part, and the third part, and the entire via metallization is substantially pure copper.

5. The apparatus according to claim 4, wherein the entire via metallization has a shared microstructure.

6. The apparatus according to claim 1, wherein the polymer material comprises one of an epoxy material, a polyimide material, a benzocyclobutene-based material, a polyethylene terephthalate-based material, or a polyethylene-based material.

7. The apparatus according to claim 1, wherein the polymer material has a thickness of 0.5 μm or more perpendicular to the first portion of the side wall, and the polymer material has a length of 10 μm or more along the first portion of the side wall.

8. The apparatus according to claim 1, wherein the via metallization has an aspect ratio of 10 or more, defined by the thickness of the glass substrate relative to the cross-sectional width of the via metallization on the first surface.

9. The apparatus according to claim 1, wherein the polymer material extends completely around the inner cross-sectional shape of the opening on the first surface, extends across a portion of the first surface, and contacts a second via metallization in the second opening that extends from the first surface through the thickness of the glass substrate to the second surface.

10. The apparatus according to any one of claims 1 to 9, further comprising an integrated circuit (IC) die on the first surface or the second surface of the glass substrate, wherein the IC die is electrically coupled to the via metallization, and the glass substrate is a layer of glass having a thickness of 50 μm or more, a first length of 10 mm or more, and a second length of 10 mm or more perpendicular to the first length.

11. It is a device, A glass substrate having an opening extending from a first surface to an opposing second surface, via metallization located within the opening and extending from the first surface to the second surface, A polymer material between the first portion of the via metallization and the first portion of the sidewall of the glass substrate defined by the opening, wherein the first portion of the sidewall extends from the first surface to the first depth of the opening, and the second portion of the via metallization is directly adjacent to the second portion of the sidewall extending from the first depth to the second surface, Equipment including.

12. The apparatus according to claim 11, further comprising an air gap between the via metallization and the second portion of the side wall.

13. The apparatus according to claim 12, wherein the air gap extends over a distance of 30 nm or more perpendicular to the second portion of the side wall of the glass substrate, between the second portion of the via metallization and the second portion of the side wall of the glass substrate.

14. The apparatus according to claim 11, wherein the entire via metallization includes the first part and the second part, and the entire via metallization is substantially pure copper.

15. The apparatus according to claim 14, wherein the entire via metallization has a shared microstructure.

16. The apparatus according to claim 11, wherein the polymer material comprises one of an epoxy material, a polyimide material, a benzocyclobutene-based material, a polyethylene terephthalate-based material, or a polyethylene-based material.

17. The apparatus according to claim 11, wherein the polymer material has a thickness of 0.5 μm or more perpendicular to the first portion of the side wall, and the polymer material has a length of 10 μm or more along the first portion of the side wall.

18. The apparatus according to claim 11, wherein the via metallization has an aspect ratio of 10 or more, defined by the length of the via metallization perpendicular to the first surface with respect to the cross-sectional width of the via metallization on the first surface.

19. The apparatus according to claim 11, wherein the polymer material extends completely around the inner cross-sectional shape of the opening on the first surface, extends over a portion of the first surface, and contacts the second via metallization in the second opening that extends from the first surface to the second surface.

20. The apparatus according to any one of claims 11 to 19, further comprising an integrated circuit (IC) die on the first surface or the second surface of the glass substrate, wherein the IC die is electrically coupled to the via metallization, and the glass substrate is a layer of glass having a thickness of 50 μm or more, a first length of 10 mm or more, and a second length of 10 mm or more perpendicular to the first length.

21. It is a method, A step of depositing an adhesive material onto a first surface of a glass substrate, wherein the glass substrate includes a plurality of openings extending from the first surface to an opposing second surface of the glass substrate, and the application of the adhesive material leaves at least a portion of each of the openings exposed. The steps include applying a metal foil to the adhesive material on the first surface, The steps include: plating each of the openings with a metal that extends from the metal foil on the first surface to the second surface, thereby forming via metallation within the openings; A method that includes this.

22. The method according to claim 21, wherein the step of depositing the adhesive material includes a slit coating of one of the following: epoxy material, polyimide material, benzocyclobutene-based material, polyethylene terephthalate-based material, or polyethylene-based material.

23. The method according to claim 21, wherein the adhesive material is deposited on the first surface of the glass substrate to a thickness of 10 μm or less.

24. The method according to claim 21, wherein the step of depositing the adhesive material includes the step of attaching the second surface of the glass substrate to the material layer and drawing the first surface into a vacuum while depositing the adhesive material.

25. The method according to any one of claims 21 to 24, further comprising the steps of attaching the second surface of the glass substrate to the material layer, etching the adhesive material, and peeling off the material layer to remove at least a portion of the adhesive material.

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