Photosensitive chip, method for manufacturing the same, and photosensitive module

Abstract

The present invention provides a photosensitive chip, a method for manufacturing the same, and a photosensitive module. [Solution] A method for manufacturing a photosensitive chip 100, comprising the steps of: providing a wafer 250; cutting the wafer in a straight line to form a plurality of parallel first cutting lines 210 on the wafer; cutting the wafer in a straight line to form a plurality of parallel second cutting lines 220 on the wafer to cut the wafer into a plurality of parallelogram units 200; and cutting the parallelogram units to form a plurality of isosceles trapezoidal bodies.

Description

Technical Field

[0001] The present invention relates to a photosensitive chip, a method for manufacturing the same, and a photosensitive module. In particular, it relates to a photosensitive chip with an increased photosensitive area and easy production, a method for manufacturing the same, and a photosensitive module.

Background Art

[0002] A photosensitive chip is a photoelectric conversion element. When light irradiates the photosensitive chip, the photosensitive chip correspondingly generates a change in current or voltage. Photosensitive chips are widely used in various optical devices such as optical communication, photoelectric detection, automatic brightness adjustment, spectral analysis, photosensitive circuits, photodetectors, and cameras. These chips are usually used to detect the intensity of light, measure the spectrum, or detect optical signals.

[0003] The performance of the photosensitive chip is affected by many factors including materials, structure, manufacturing process, and spectral characteristics. FIG. 1 shows a photosensitive module 10 applied to a wearable device. This photosensitive module 10 is configured by arranging six regular hexagonal photosensitive chips 20 in a ring. An appropriate engineering distance is provided between adjacent chips. Thereby, the photosensitive chip 20 is arranged with the maximum area on the circuit board 30 in the wearable device. The light-emitting chip 40 of this conventional photosensitive module 10 mainly emits light upward. The light is diffusely reflected on the surface of the object to be detected, returns to the photosensitive chip 20, and is absorbed by the photosensitive chip 20 and converted into an electronic signal. This conventional light-emitting photosensitive module is applied to a smart watch or the like and can provide real-time physiological signals to the user.

[0004] Figure 2 shows a layout in which a photosensitive chip 20 with a hexagonal outline is placed on a wafer 50 using conventional technology. Because the photosensitive chip has a polygonal outline, it cannot be connected in a long straight line. Therefore, after the chip growth process is complete, it cannot be cut with a conventional low-cost dicing saw, or after drawing lines with laser light, the wafer cannot be cut with a conventional cutting process. Instead, it is necessary to cut it using a plasma etching process. However, when processing wafers with a thickness of 100 to 300 micrometers (μm) with plasma etching, the plasma process has the disadvantages of being costly, time-consuming, and resulting in a low product yield. These disadvantages need to be improved urgently. [Overview of the project]

[0005] The main objective of this invention is to provide an innovative photosensitive chip, a method for manufacturing the same, and a photosensitive module. This photosensitive chip has the structural characteristics of an isosceles trapezoidal body and can be applied to conventional linear cutting processes for cutting wafers. This allows it to replace the plasma etching process, which requires long processing times and large amounts of etching material. Furthermore, the photosensitive module utilizing this photosensitive chip has a larger light-receiving area and can save power. It also offers advantages such as design flexibility that allows the area to be adjusted according to demand. It is particularly advantageous for applications in smart wearable devices.

[0006] To achieve the above objective, the present invention provides a photosensitive chip comprising an isosceles trapezoidal body, a positive electrode, and a negative electrode. The isosceles trapezoidal body has an N-type semiconductor layer and a P-type semiconductor layer. The P-type semiconductor layer is installed adjacent to the N-type semiconductor layer. The positive electrode is electrically connected to the P-type semiconductor layer. The negative electrode is electrically connected to the N-type semiconductor layer.

[0007] In embodiments of the present invention, in the photosensitive chip, the two non-parallel sides of the isosceles trapezoidal body and the longer side of the two parallel sides form an angle. The angle is between 50° and 70°.

[0008] In an embodiment of the present invention, the angle in the photosensitive chip is 60°.

[0009] In embodiments of the present invention, the height of the isosceles trapezoidal body of the photosensitive chip is 0.87 to 5.22 times the shorter side of the two parallel sides.

[0010] In an embodiment of the present invention, the height of the isosceles trapezoidal body of the photosensitive chip is 1.44 times the shorter side of the two parallel sides.

[0011] In embodiments of the present invention, the photosensitive chip is a silicon-based photosensitive chip.

[0012] In embodiments of the present invention, the photosensitive chip is a photosensitive diode or a photosensitive transistor.

[0013] In embodiments of the present invention, the positive electrode and the negative electrode are located on two opposing sides of the isosceles trapezoidal body of the photosensitive chip.

[0014] In embodiments of the present invention, the positive electrode and the negative electrode are located on the same side of the isosceles trapezoidal body in the photosensitive chip.

[0015] In embodiments of the present invention, in a photosensitive chip, a P-type semiconductor layer is placed on top of an N-type semiconductor layer, or an N-type semiconductor layer is placed on top of a P-type semiconductor layer.

[0016] To achieve the above objective, the present invention provides a method for manufacturing a photosensitive chip. The manufacturing method includes the steps of: providing a wafer; cutting the wafer in a straight line to form a plurality of parallel first cutting lines on the wafer; cutting the wafer in a straight line to form a plurality of parallel second cutting lines on the wafer to cut the wafer into a plurality of parallelogram units; and cutting the parallelogram units to form a plurality of isosceles trapezoidal bodies.

[0017] In an embodiment of the present invention, a method for manufacturing a photosensitive chip includes a step of rearranging the parallelogram units before the step of cutting the parallelogram units such that the medians of vertically adjacent parallelogram units are aligned and connected to each other to form a plurality of planned cutting lines. The medians of the parallelogram units are lines that divide the parallelogram units into two isosceles trapezoidal bodies connected in opposite directions.

[0018] In an embodiment of the present invention, in the method for manufacturing a photosensitive chip, the process of cutting a parallelogram unit involves cutting it with a dicing saw along the planned cutting line.

[0019] In an embodiment of the present invention, in a method for manufacturing a photosensitive chip, the wafer is cut in a straight line using a dicing saw.

[0020] In an embodiment of the present invention, in a method for manufacturing a photosensitive chip, the process of cutting the parallelogram unit is performed by cutting with a laser.

[0021] To achieve the above objective, the present invention provides a photosensitive module comprising a conductive circuit board and six of the photosensitive chips. The conductive circuit board has a central part and an outer periphery, with the outer periphery surrounding the central part. Each photosensitive chip is arranged in a ring on the outer periphery, and the photosensitive chips are spaced approximately 60° apart from each other.

[0022] In embodiments of the present invention, the photosensitive module further comprises at least one active chip located in the center.

[0023] In embodiments of the present invention, in a photosensitive module, the active chip is a light-emitting chip that emits light of at least one wavelength. This light is diffusely reflected from the surface of the object under test, returns to the photosensitive chip, is absorbed, and converted into an electronic signal.

[0024] In embodiments of the present invention, the photosensitive module includes a light-emitting chip which is a green light-emitting diode, a red light-emitting diode, a short-wavelength infrared light-emitting diode, a long-wavelength infrared light-emitting diode, or a combination thereof.

[0025] In an embodiment of the present invention, in the photosensitive module, the height of the isosceles trapezoid body is adjustable, whereby the area of each photosensitive chip is adjustable.

[0026] In an embodiment of the present invention, in the photosensitive module, there is a gap between adjacent photosensitive chips.

[0027] In an embodiment of the present invention, in the photosensitive module, the gap is about 20 mils.

[0028] Those skilled in the art can understand other objects of the present invention, as well as the technical means and embodiments of the present invention, by referring to the drawings and the embodiments described below.

Brief Description of the Drawings

[0029] [Figure 1] Schematic diagram of a conventional photosensitive module applied to a wearable device [Figure 2] Schematic diagram showing a layout in which photosensitive chips having a conventional hexagonal outer shape are arranged on a wafer [Figure 3A] Top view showing a photosensitive chip in an embodiment of the present invention [Figure 3B] Side view showing a photosensitive chip in an embodiment of the present invention [Figure 4] Schematic diagram showing the wafer arrangement before cutting of a photosensitive chip having an isosceles trapezoid outer shape in an embodiment of the present invention [Figure 5A] Schematic diagram after removing the incomplete chips on the outer periphery of the wafer shown in FIG. 4 after cutting the wafer [Figure 5B] Schematic diagram after rearranging the parallelogram units after cutting the wafer [Figure 6] Schematic diagram of a photosensitive module in an embodiment of the present invention [Figure 7] Schematic diagram for comparing the photosensitive module of the present invention with a conventional photosensitive module

Modes for Carrying Out the Invention

[0030] The present invention will be described below through examples. These examples illustrate the embodiments of the present invention and are not intended to limit the invention to any particular environment, application, or specific configuration described therein. Therefore, while the examples illustrate the present invention, they do not limit it. Components not directly related to the present invention are omitted and not shown in the embodiments and drawings. The dimensional relationships of the components in the drawings are for ease of understanding and do not limit the actual dimensions.

[0031] The following explanation will be given with reference to Figures 3A and 3B. Figure 3A is a top view showing a photosensitive chip 100 in an embodiment of the present invention. Figure 3B is a side view showing a photosensitive chip 100 in the present invention. In terms of appearance, the photosensitive chip 100 has an isosceles trapezoidal body. The lengths of the two non-parallel sides of the isosceles trapezoidal body are substantially equal, and the two non-parallel sides and the longer side of the two parallel sides form an angle of 50° to 70°. Preferably, the angle is 60°. The height of the isosceles trapezoidal body is 0.87 to 5.22 times the shorter side of the two parallel sides. Preferably, the height of the isosceles trapezoidal body is 1.44 times the shorter side of the two parallel sides. In a preferred embodiment, the height of the isosceles trapezoidal body is approximately 144 mils, the length of the shorter side of the two parallel sides is approximately 100 mils, the length of the longer side of the two parallel sides is approximately 267 mils, and the thickness is approximately 8 mils.

[0032] The explanation will be given with reference to Figures 3A and 3B. In terms of function, the photosensitive chip 100 has an isosceles trapezoidal body and includes an N-type semiconductor layer 120 and a P-type semiconductor layer 140. The photosensitive chip 100 further includes a positive electrode 160 and a negative electrode 180. The P-type semiconductor layer 140 is a P-type semiconductor diffusion layer, and the N-type semiconductor layer 120 is a substrate layer. The P-type semiconductor layer 140 is installed adjacent to the N-type semiconductor layer 120. The positive electrode 160 is electrically connected to the P-type semiconductor layer 140. The negative electrode 180 is electrically connected to the N-type semiconductor layer 120. The photosensitive chip 100 is a chip type in which the positive electrode is connected by wire bonding. That is, as shown in Figure 3B, the positive electrode 160 and the negative electrode 180 are installed on two opposing sides of the N-type semiconductor layer 120 (isosceles trapezoidal body). However, it is not limited to this. For example, the photosensitive chip 100 may be in the form of a flip chip. In other words, the positive electrode 160 and the negative electrode 180 may be placed on the same side of the isosceles trapezoidal body, that is, on the side of the P-type semiconductor layer 140. The photosensitive chip 100 may be a photosensitive diode or a photosensitive transistor. For example, the photosensitive chip 100 is a silicon-based photosensitive diode chip that absorbs photons to generate a photocurrent and converts it into an electronic signal.

[0033] Figure 4 shows the layout in which the photosensitive chip 100 having the aforementioned isosceles trapezoidal shape is placed on the wafer 250 before cutting. As shown in Figure 4, the wafer layout forms parallelogram units 200 by connecting the isosceles trapezoidal bodies of two adjacent photosensitive chips 100 in inverted orientations. That is, one of the two non-parallel sides of adjacent isosceles trapezoidal bodies overlaps with the other, and the two parallel sides of adjacent isosceles trapezoidal bodies connect with the other. The multiple parallelogram units 200 thus formed are arranged on the wafer 250 parallel to each other and as close together as possible. In this way, the parallel sides of adjacent parallelogram units 200 horizontally and vertically form multiple parallel first cutting lines 210 and multiple parallel second cutting lines 220 that are to be cut on the wafer 250.

[0034] The present invention's method for manufacturing a photosensitive chip involves first forming a semiconductor element layout on a wafer 250 as shown in Figure 4, then performing straight cuts along the parallel sides of the multiple parallelogram units that are connected to each other to form multiple parallel first cutting lines 210 on the wafer 250. Next, performing straight cuts along other parallel sides of the multiple parallelogram units that are connected to each other to form multiple parallel second cutting lines 220 on the wafer 250. After these cuts, the wafer 250 becomes multiple parallelogram units 200, each independently separated. Specifically, since the first cutting lines 210 and the second cutting lines 220 on the wafer 250 are long, parallel straight lines, the two cutting steps can be performed using a low-cost dicing saw.

[0035] After removing imperfect chips from the outer edge of the wafer, the cut wafer becomes a plurality of arranged parallelogram chips, as shown in Figure 5A. Next, the parallelogram units are moved horizontally using equipment such as a sorter or die bonder, and the parallelogram units are rearranged and fixed to the blue film. The arrangement of these parallelogram units is to align the medians of vertically adjacent parallelogram units with each other to form a plurality of planned cutting lines 230, as shown in Figure 5B. The medians of the parallelogram units are formed by the overlapping of one of the non-parallel sides of the two oppositely connected isosceles trapezoidal bodies in the parallelogram unit described above. In other words, the medians of the parallelogram units are lines that divide the parallelogram unit into two oppositely connected isosceles trapezoidal bodies. Next, the plurality of parallelogram units 200 on the blue film are cut along the plurality of planned cutting lines 230 to form a plurality of isosceles trapezoidal bodies and form the photosensitive chip 100 of the present invention. As shown in Figure 5B, the planned cutting line 230 is a long straight line formed by aligning and connecting the medians of adjacent parallelogram units vertically, so cutting can be done along the planned cutting line 230 using a conventional dicing saw. In the conventional technique, special plasma etching is required to separate chips of special shapes, whereas in the present invention, the chip cutting process can be performed using a conventional dicing saw. This not only significantly reduces manufacturing time and cost, but also improves manufacturing yield and overcomes the various problems of the conventional technique described above.

[0036] In addition to the cutting process described above, after obtaining the parallelogram-shaped chips arranged as shown in Figure 5A, laser cutting can be used to form the median lines of the parallelogram units (i.e., the non-parallel sides where the isosceles trapezoidal bodies overlap). In other words, the chips are cut after drawing lines with laser light. These two wafer cutting processes can significantly reduce production costs and manufacturing time compared to conventional techniques using plasma etching, and do not require the purchase of expensive plasma etching equipment or large quantities of etching materials.

[0037] Figure 6 shows the photosensitive module 110 of the present invention. The photosensitive module 110 comprises a conductive circuit board 130, at least one active chip 150, and six of the aforementioned photosensitive chips 100. The conductive circuit board 130 has a central part 132 and an outer peripheral part 134. The outer peripheral part 134 surrounds the central part 132. Specifically, the conductive circuit board 130 is a substantially circular conductive circuit board (PCB) with a diameter of approximately 568 mils. The central part 132 of the conductive circuit board is a light-emitting chip fixing region and houses at least one active chip 150. The active chip 150 functions as an active element that emits light or signals in a smart wearable device. In this embodiment, the active chip 150 is a light-emitting chip that emits light of at least one wavelength. The light is diffusely reflected from the surface of the object under test, returns to the photosensitive chip 100, is absorbed, and converted into an electronic signal. Specifically, the Active Chip 150 consists of a green light-emitting diode (LED) chip with a size of 20 mils and a wavelength of 495-570 nanometers (nm), a red light-emitting diode (LED) chip with a wavelength of 620-750 nanometers (nm), an infrared light-emitting diode (LED) chip with a wavelength of 940 nanometers (nm), or a combination thereof.

[0038] The outer periphery 134 of the conductive circuit board 130 is the photosensitive chip fixing region. In this embodiment, six isosceles trapezoidal photosensitive chips 100, as shown in Figure 3, are fixed to the outer periphery 134. These six isosceles trapezoidal photosensitive chips are arranged in a ring shape on the outer periphery 134. The photosensitive chips are spaced approximately 60° apart. Specifically, as shown in Figure 6, the shorter of the two parallel sides of the isosceles trapezoidal body of the photosensitive chip 100 is close to the center 132. The angle between adjacent chips is 60 degrees. There is a predetermined gap b between adjacent chips. This gap b may be 20 mils, but is not limited to this. This arrangement allows the chips to cover the outer periphery 134 of the conductive circuit board 130 to the maximum extent. Compared to a photosensitive module using a regular hexagonal chip in the prior art, when using a conductive circuit board of the same diameter as a reference, as shown in Figure 7, the total area of ​​the photosensitive chips in the photosensitive module of the present invention increases by approximately 2%, and the light-receiving area increases. For wearable devices, a larger light-receiving area means greater power savings. Therefore, in addition to the cost reduction and yield improvement advantages of the photosensitive chip mentioned above, the photosensitive module of the present invention also offers the advantages of power saving and improved performance.

[0039] As shown in Figure 6, another feature of the photosensitive module 110 of the present invention is that the height h of the isosceles trapezoidal body of the photosensitive chip 100 within the module can be adjusted according to the actual demand, thereby adjusting the area of ​​the photosensitive chip. This feature increases the flexibility of the photosensitive module in actual applications. In contrast, conventional hexagonal chips cannot have their size and area adjusted. Specifically, the height of the photosensitive chip in the photosensitive module 110 of the present invention is substantially 0.87 to 5.22 times the shorter side of its parallel sides. The angle between the non-parallel sides and the longer sides of the parallel sides is 50 to 70 degrees. This allows for the achievement of a high light-receiving rate.

[0040] The conductive circuit board of the photosensitive module of the present invention includes one conductive circuit (not shown) and an insulating substrate (with the same area as the conductive circuit board) on which the circuit is mounted. The conductive circuit board has circuits on both sides (i.e., conductive circuits are arranged on opposing sides of the insulating substrate), and these circuits are interconnected. Most of the circuits are located on the opposite side of the active chip and the photosensitive chip, electrically connecting the electrodes of the active chip and the six photosensitive chips in the module to the conductive circuit board, and electrically connecting to the outside (not shown) through the conductive circuit board. The insulating substrate is substantially circular, mounts the aforementioned conductive circuit, is housed within the wearable device, and is used to fix the photosensitive module to the wearable device.

[0041] The above-described embodiments illustrate embodiments of the present invention and describe the characteristic configuration of the present invention. The present invention is not limited to the above embodiments. Modifications or equivalent arrangements that can be easily made by those skilled in the art are also within the scope of the present invention. The scope of protection of the rights of the present invention shall be based on the claims. [Explanation of symbols]

[0042] 10 Photosensitive Modules 20 photosensitive chips 30 Conductive circuit boards 40 light-emitting chips 50 wafers 100 photosensitive chips 110 Photosensitive Module 120 N-type semiconductor layer 130 Conductive circuit board 132 Center 134 Outer periphery 140 P-type semiconductor layer 150 Active Chips 160 Positive electrode 170 negative electrode 200 parallelogram units 210 1st cutting line 220 2nd cutting line 230 Cutting line 250 wafers b interval h height

Claims

1. A method for manufacturing a photosensitive chip, The process of providing wafers, The process of cutting the wafer in a straight line to form a plurality of parallel first cutting lines on the wafer, The process involves cutting the wafer in a straight line to form a plurality of parallel second cutting lines on the wafer, and cutting the wafer into a plurality of parallelogram units. A method for manufacturing a photosensitive chip, comprising the step of cutting the parallelogram unit to form a plurality of isosceles trapezoidal bodies.

2. A method for manufacturing a photosensitive chip, The process of providing wafers, The process of cutting the wafer in a straight line to form a plurality of parallel first cutting lines on the wafer, The process involves cutting the wafer in a straight line to form a plurality of parallel second cutting lines on the wafer, and cutting the wafer into a plurality of parallelogram units. The process includes cutting the aforementioned parallelogram unit to form a plurality of isosceles trapezoidal bodies, Prior to the step of cutting the parallelogram units, the process includes a step of rearranging the parallelogram units so that the medians of adjacent parallelogram units are aligned and connected to each other to form multiple cutting lines. A method for manufacturing a photosensitive chip, characterized in that the median line of the parallelogram unit is a line that divides the parallelogram unit into two isosceles trapezoidal bodies connected in opposite directions.

3. The method for manufacturing a photosensitive chip according to claim 2, characterized in that the parallelogram unit is cut along the planned cutting line with a dicing saw in the step of cutting the parallelogram unit.

4. The method for manufacturing a photosensitive chip according to claim 1, characterized in that the wafer is cut with a dicing saw in the step of cutting the wafer in a straight line.

5. The method for manufacturing a photosensitive chip according to claim 1, characterized in that the process of cutting the parallelogram unit is performed by cutting with a laser.

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