Image sensor

Abstract

The image quality of the image sensor is improved by providing one transistor for each column to clamp the signal output from the pixel to a predetermined voltage level. [Solution] The image sensor comprises a first substrate having a first pixel that outputs a first signal based on the charge converted by a first photoelectric conversion unit, a second pixel that outputs a second signal based on the charge converted by a second photoelectric conversion unit arranged in the column direction alongside the first photoelectric conversion unit, a first supply unit that controls the voltage of a first signal line to which the first signal read out from the first pixel is output, and a second supply unit that controls the voltage of a second signal line to which the second signal read out from the second pixel is output, and a second substrate laminated with the first substrate having a first processing unit that performs signal processing on the first signal output to the first signal line and a second processing unit that performs signal processing on the second signal output to the second signal line.

Description

Technical Field

[0001] The present invention relates to an imaging device.

Background Art

[0002] There is known an imaging device in which transistors for clamping signals output from pixels to a predetermined voltage level are provided one by one for each column (Patent Document 1). Conventionally, improvement of image quality has been demanded.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

[0004] According to a first aspect, an imaging device includes a first photoelectric conversion unit that converts light into charges, a first pixel that outputs a first signal based on the charges converted by the first photoelectric conversion unit, a photoelectric conversion unit that converts light into charges, the photoelectric conversion unit including a second photoelectric conversion unit arranged side by side with the first photoelectric conversion unit in a column direction, a second pixel that outputs a second signal based on the charges converted by the second photoelectric conversion unit, a first supply unit that controls a voltage of a first signal line to which the first signal read from the first pixel is output, and a second supply unit that controls a voltage of a second signal line to which the second signal read from the second pixel is output, a first substrate having the first supply unit and the second supply unit, and a second substrate laminated on the first substrate, the second substrate having a first processing unit that performs signal processing on the first signal output to the first signal line and a second processing unit that performs signal processing on the second signal output to the second signal line.

Brief Description of the Drawings

[0005] [Figure 1] It is a diagram showing a configuration example of an imaging device according to a first embodiment. [Figure 2] It is a block diagram showing a configuration example of an imaging device according to a first embodiment. [Figure 3] This figure shows an example of a partial cross-sectional structure of an image sensor according to the first embodiment. [Figure 4] This figure shows an example of a partial configuration of the image sensor according to the first embodiment. [Figure 5] This is a timing chart showing an example of the operation of the image sensor according to the first embodiment. [Figure 6] This is a timing chart showing an example of the operation of the image sensor according to the first embodiment. [Figure 7] This figure shows an example of a partial layout of the image sensor according to the first embodiment. [Figure 8] This figure shows an example of a partial layout of an image sensor related to a modified example. [Figure 9] This figure shows another example of the layout of a part of the image sensor related to a modified example. [Modes for carrying out the invention]

[0006] (First Embodiment) Figure 1 shows an example configuration of a camera 1, which is an example of an imaging device according to the first embodiment. The camera 1 comprises an imaging optical system (imaging optical system) 2, an image sensor 3, a control unit 4, a memory 5, a display unit 6, and an operation unit 7. The imaging optical system 2 has a plurality of lenses, including a focus adjustment lens (focus lens), and an aperture diaphragm, and forms an image of the subject on the image sensor 3. The imaging optical system 2 may be detachable from the camera 1.

[0007] The image sensor 3 is an image sensor such as a CMOS image sensor or a CCD image sensor. The image sensor 3 receives the light beam that has passed through the imaging optical system 2 and captures the subject image formed by the imaging optical system 2. Multiple pixels, each having a photoelectric conversion unit, are arranged in a two-dimensional manner (row and column directions) on the image sensor 3. The photoelectric conversion unit is composed of photodiodes (PDs). The image sensor 3 generates a signal by photoelectric conversion of the received light and outputs the generated signal to the control unit 4.

[0008] Memory 5 is a recording medium such as a memory card. Image data, control programs, etc., are stored in Memory 5. Writing data to and reading data from Memory 5 is controlled by the control unit 4. The display unit 6 displays images based on image data, shooting-related information such as shutter speed and aperture value, and menu screens, etc. The operation unit 7 includes a release button, a power switch, various setting switches such as switches for switching between various modes, and outputs signals based on each operation to the control unit 4.

[0009] The control unit 4 is composed of a processor such as a CPU, FPGA, or ASIC, and memory such as ROM or RAM, and controls each part of the camera 1 based on a control program. The control unit 4 supplies signals to the image sensor 3 to control its operation. When taking still images, taking video, or displaying a live view image of the subject on the display unit 6, the control unit 4 causes the image sensor 3 to capture an image of the subject and outputs a signal.

[0010] The control unit 4 generates image data by performing various image processing operations on the signal output from the image sensor 3. The control unit 4 also functions as an image data generation unit 4, generating still image data and moving image data based on the signal output from the image sensor 3. Image processing includes image processing such as grayscale conversion and color interpolation.

[0011] Figure 2 is a block diagram showing an example of the configuration of an image sensor according to the first embodiment. The image sensor 3 is constructed by stacking a first substrate 111 on which a plurality of pixels 10 are provided and a second substrate 112 on which a readout unit 60 is provided. The first substrate 111 and the second substrate 112 are each made of semiconductor substrates. The circuits provided on the first substrate 111 and the circuits provided on the second substrate 112 are electrically connected by connection parts such as electrodes and bumps.

[0012] The first substrate 111 has multiple regions 20, each of which contains multiple pixels 10. In the example shown in Figure 2, four regions 20 are illustrated. These four regions 20 each represent one region obtained by dividing the region on the first substrate 111 where the pixels 10 are placed into regions containing a predetermined number of pixels. Note that each region 20 may or may not partially overlap. The number of pixels in each region 20 may be 4 pixels (2 pixels × 2 pixels), 16 pixels (4 pixels × 4 pixels), or any other number. Hereafter, each region 20 will be referred to as a pixel block 20.

[0013] The first substrate 111 is provided with a signal line 22 and a supply unit 30 (described later) for each pixel block 20. Furthermore, as will be described later, the first substrate 111 is also provided with a pixel control unit and a supply control unit for each pixel block 20. The signal line 22 is a signal line connecting the pixel block 20 and the readout unit 60, and signals are output from the pixels 10. The signal line 22 is a signal line using connection parts such as electrodes and bumps.

[0014] The readout unit 60 has a processing unit 50 that includes an analog-to-digital conversion unit (AD conversion unit) 40. A processing unit 50 is provided for each pixel block 20. In the image sensor 3 according to this embodiment, the signals of pixels from multiple pixel blocks 20 are read out in parallel using signal lines 22 provided for each pixel block 20. The readout unit 60 outputs the signals of pixels from each pixel block 20 simultaneously (in parallel) to the processing unit 50 provided for each pixel block 20, so that each processing unit 50 can process the pixel signals simultaneously. Since each processing unit 50 processes the signals output from each pixel block 20 simultaneously, the readout unit 60 can perform high-speed signal processing.

[0015] The AD conversion unit 40 of the processing unit 50 converts the pixel signals, which are analog signals input from each pixel 10 of the pixel block 20 via the signal line 22, into digital signals. The processing unit 50 may also have an amplifier unit that amplifies the pixel signals input via the signal line 22 with a predetermined gain (amplification ratio). In this case, the AD conversion unit 40 converts the pixel signals amplified by the amplifier unit into digital signals.

[0016] The pixel signals, converted into digital signals, are subjected to signal processing such as correlated double sampling (CDS) and signal intensity correction in the processing unit 50 before being output to the control unit 4 of the camera 1. Alternatively, signal processing such as correlated double sampling on the pixel signals may be performed in a signal processing unit (not shown). In this case, the processing unit 50 outputs the pixel signals, converted into digital signals by the AD conversion unit 40, to the signal processing unit. The signal processing unit performs signal processing such as correlated double sampling on the input pixel signals and then outputs the processed pixel signals to the control unit 4.

[0017] On the first substrate 111, a plurality of electrodes (pads) 200 are provided around the area where each pixel 10 is arranged, to which the power supply voltage VDD is supplied (applied). The electrodes 200 are connected to the plurality of pixels 10 arranged on the first substrate 111 and the supply unit 30 via wiring (power lines) 121. The power supply voltage VDD is supplied to the pixels 10 and the supply unit 30 via the power lines 121. The electrodes 200 are common electrodes for the plurality of pixels 10 and the supply unit 30, and are arranged on one side of the first substrate 111 as shown in Figure 2. The configuration of the image sensor 3 according to this embodiment will be further described below with reference to the drawings.

[0018] FIG. 3 is a diagram showing an example of a cross-sectional structure of a part of an image sensor according to the first embodiment. FIG. 4 is a diagram showing an example of a configuration of a part of the image sensor according to the first embodiment. The image sensor 3 shown in FIG. 3 is a back-illuminated type image sensor. The image sensor 3 includes a first substrate 111, a wiring layer 101 provided by being laminated on the first substrate 111, a second substrate 112, and a wiring layer 102 provided by being laminated on the second substrate 112. The wiring layer 101 and the wiring layer 102 are each wiring layers including a conductor film (metal film) and an insulating film, and a plurality of wirings, vias, interlayer insulating films, etc. are arranged.

[0019] Light from the subject is incident in the +Z-axis direction in FIG. 3. Also, as shown in the coordinate axes of FIG. 3, the right direction on the paper surface orthogonal to the Z-axis is the +X-axis direction, and the front direction on the paper surface orthogonal to the Z-axis and the X-axis is the +Y-axis direction. In the following figures, the coordinate axes may be displayed based on the coordinate axes of FIG. 3 so that the orientation of each figure can be understood. In the first substrate 111 and the wiring layer 101, a plurality of pixel blocks 20 including a plurality of pixels 10 and a supply unit 30 are arranged in the X-axis direction and the Y-axis direction. In the second substrate 112 and the wiring layer 102, a plurality of processing units 50 are arranged in the X-axis direction and the Y-axis direction.

[0020] FIG. 4 shows a part of the plurality of pixels 10 provided in the image sensor 3, a part of the current sources 25 and the supply unit 30, a part of the pixel control unit 35 and the supply control unit 36, and the readout control unit 70. The current sources 25 and the supply unit 30 are provided with respect to the signal line 22. The pixel control unit 35 and the supply control unit 36 are each arranged for each pixel block 20. In FIG. 4, for the sake of simplifying the figure, only one pixel 10 is shown for each pixel block 20.

[0021] The pixel 10 has a photoelectric conversion unit 11, a transfer unit 12, a floating diffusion (FD) 13, a reset unit 14, an amplification unit 15, and a selection unit 16. The photoelectric conversion unit 11 is a photodiode PD, which converts the incident light into charges and accumulates the photoelectrically converted charges.

[0022] The transfer unit 12 consists of a transistor M1 controlled by the signal TX, and transfers the charge photoelectrically converted in the photoelectric conversion unit 11 to the FD13. Transistor M1 is a transfer transistor. The FD13 stores (holds) the charge transferred to it and converts it into a voltage by dividing it by its capacitance value. The FD13 is a storage unit 13 that stores the charge generated in the photoelectric conversion unit 11.

[0023] The amplification unit 15 consists of a transistor M3 whose gate (terminal) is connected to FD13, and amplifies and outputs the signal based on the charge accumulated in FD13. The drain (terminal) of transistor M3 is connected to electrode 200 (see Figure 2) via power line 121, and the power supply voltage VDD is supplied. The source (terminal) of transistor M3 is connected to signal line 22 via selection unit 16. The amplification unit 15 functions as part of a source follower circuit with current source 25 as the load current source. Transistor M3 is an amplifying transistor. The amplification unit 15 and selection unit 16 constitute an output unit that generates and outputs a signal based on the charge generated by the photoelectric conversion unit 11.

[0024] The reset unit 14 consists of a transistor M2 controlled by the signal RST, and electrically connects or disconnects the FD13 and the power line 121. The reset unit 14 resets the charge accumulated by the FD13. The reset unit 14 discharges the charge accumulated in the FD13 and resets the voltage of the FD13. Transistor M2 is a reset transistor. The selection unit 16 consists of a transistor M4 controlled by the signal SEL, and electrically connects or disconnects the amplifier unit 15 and the signal line 22. When the transistor M4 of the selection unit 16 is ON, it outputs the signal from the amplifier unit 15 to the signal line 22. Transistor M4 is a selection transistor.

[0025] The current source 25 includes a transistor M5 to which the signal VB is input. The current source 25 is connected to each pixel 10 of the pixel block 20 and the supply unit 30 via the signal line 22. The current source 25 generates current based on the signal level of the signal VB and supplies the generated current to the signal line 22, the pixels 10, and the supply unit 30. The current source 25 may also be composed of two transistors connected in a cascode. The signal VB is generated by a signal generation unit (not shown). The signal generation unit is commonly connected to the current sources 25 provided for each signal line 22 and supplies the signal VB to each current source 25. The gates of the transistor M5 of each current source 25 are electrically connected to each other and receive the signal VB from the signal generation unit.

[0026] The signal line 22 sequentially outputs the signal when the voltage of FD13 is reset (dark signal) and the signal based on the charge transferred from the photoelectric conversion unit 11 to FD13 by the transfer unit 12 (photoelectric conversion signal). The dark signal is used to remove noise contained in the photoelectric conversion signal. The dark signal can also be described as an analog signal indicating a reference level for the photoelectric conversion signal and is used to correct the photoelectric conversion signal. The photoelectric conversion signal is an analog signal generated based on the charge photoelectrically converted by the photoelectric conversion unit 11. The dark signal and the photoelectric conversion signal are input to the processing unit 50 (see Figure 2) of the readout unit 60 via the signal line 22. In this embodiment, the processing unit 50 has an arithmetic unit that subtracts the photoelectric conversion signal and the dark signal, and performs CDS by subtracting the photoelectric conversion signal and the dark signal to remove noise components from the photoelectric conversion signal.

[0027] As shown in Figure 4, the supply unit 30 has a signal output unit 31 and a switch unit 32, and has the function of supplying voltage to the signal line 22. The signal output unit 31 consists of a transistor M11 to which the signal CLIP is input, and generates and outputs a voltage level signal based on the signal CLIP. The drain of transistor M11 is connected to the electrode 200 (see Figure 2) via the power line 121, and the power supply voltage VDD is supplied. The source of transistor M11 is connected to the signal line 22 via the switch unit 32.

[0028] The switch unit 32 consists of a transistor M12 controlled by the signal CLIP_SW, and electrically connects or disconnects the signal output unit 31 and the signal line 22. When the transistor M12 of the switch unit 32 is ON, it can output a signal from the signal output unit 31 to the signal line 22. In this embodiment, when the switch unit 32 is ON, the voltage (potential) of the signal line 22 is limited by the signal output unit 31 to a value within a range with the voltage based on the signal CLIP as the lower limit. The supply unit 30 supplies voltage to the signal line 22 so that the voltage of the signal line 22 does not fall below a predetermined voltage. The supply unit 30 can also be said to be a limiting unit 30 that limits the voltage of the signal line 22. The supply unit 30 supplies voltage to the signal line 22 so that the voltage of the signal line 22 is between the power supply voltage VDD and the voltage based on the signal CLIP, and can also be said to control (adjust) the voltage of the signal line 22.

[0029] The pixel control unit 35 includes switches and buffers and is controlled by the readout control unit 70. The pixel control unit 35 supplies signals such as the above-mentioned signals TX, RST, and SEL to the pixels 10 of the pixel block 20 to control the operation of each pixel 10. The pixel control unit 35 supplies signals to the gates of each transistor of the pixel 10 to set the transistors to an ON state (connected state, conducting state, short circuit state) or an OFF state (disconnected state, non-conducting state, open state, cutoff state).

[0030] The readout control unit 70 and the pixel control unit 35 control the period during which charge is accumulated in the pixel block 20 and the timing of reading out the pixel signal by controlling the signals TX and SEL input to the pixel 10. The pixel control unit 35, which is provided for each pixel block 20, can control the pixel 10 so that the charge accumulation time differs for each pixel block 20, or it can control the pixel 10 so that the charge accumulation time is the same for all pixel blocks 20. In addition, each pixel control unit 35 can control the pixel 10 so that the timing of reading out the pixel signal differs for each pixel block 20, or it can control the pixel 10 so that the timing of reading out the pixel signal is the same for all pixel blocks 20. By controlling the pixel 10 so that the charge accumulation time differs for each pixel block 20, the pixel control unit 35 can capture images according to the brightness of each subject, even if there are multiple subjects. Also, by controlling the pixel 10 so that the timing of reading out the pixel signal differs for each pixel block 20, the pixel control unit 35 can capture images according to the speed at which each subject is moving, even if there are multiple subjects.

[0031] The supply control unit 36 ​​includes switches and buffers and is controlled by the readout control unit 70. As described above, the pixel control unit 35 can control the pixels 10 so that the charge storage time differs for each pixel block 20, and so that the timing for reading out the pixel signals differs for each pixel block 20. In that case, since the timing at which the signal is output to the signal line 22 differs for each block 20, the supply control unit 36 ​​must control the operation of each switch unit 32 for each pixel block 20. The supply control unit 36 ​​supplies the signal CLIP_SW described above to the switch unit 32 of the pixel block 20 to control the operation of each switch unit 32. The supply control unit 36 ​​controls the on / off operation of the switch unit 32 to start and stop the supply of voltage from the signal output unit 31 to the signal line 22. In this embodiment, the supply control unit 36 ​​provided for each pixel block 20 adjusts the timing at which voltage is supplied from the signal output unit 31 to the signal line 22 in the pixel block 20 based on the timing at which the dark signal and the photoelectric conversion signal are read out in the pixel block 20. For example, the supply control unit 36 ​​of each pixel block 20 controls the switch unit 32 so that it is possible to supply voltage to the signal line 22 provided for one pixel block 20 and the signal line 22 provided for another pixel block 20 at different timings. Alternatively, each supply control unit 36 ​​may control each switch unit 32 so that it is possible to supply voltage to all pixel blocks 20 at the same timing.

[0032] The readout control unit 70 is provided in common to multiple pixel blocks 20. The readout control unit 70 is composed of multiple circuits, including a timing generator, and is located on the second board 112. The readout control unit 70 is controlled by the control unit 4 of the camera 1. The readout control unit 70 controls the operation of the pixel 10 by controlling signals such as the TX signal, RST signal, and SEL signal that are input to the pixel 10 via the pixel control unit 35. The readout control unit 70 also controls the operation of the supply unit 30 by controlling the CLIP_SW signal that is input to the supply unit 30 via the supply control unit 36.

[0033] The pixel control unit 35 and the supply control unit 36 ​​described above may be placed on either the first substrate 111 or the second substrate 112, or they may be placed separately on the first substrate 111 and the second substrate 112. The pixel control unit 35 and the supply control unit 36 ​​may be placed on substrates different from the first substrate 111 and the second substrate 112. The readout control unit 70 may be placed separately on the first substrate 111 and the second substrate 112, or it may be placed on the first substrate 111. The readout control unit 70 may be placed on substrates different from the first substrate 111 and the second substrate 112.

[0034] When the selection unit 16 of the pixel 10 and the switch unit 32 of the supply unit 30 are turned ON, the source of the amplification unit 15 and the source of the signal output unit 31 are electrically connected to the signal line 22. In this case, the path through which the current flows from the current source 25 connected to the signal line 22 changes based on the relative magnitudes of the gate voltage of the amplification unit 15 (i.e., the voltage of FD13) and the gate voltage of the supply unit 30 (i.e., the voltage of signal CLIP).

[0035] When the voltage of FD13 is higher than the voltage of signal CLIP, the current from the current source 25 flows mainly to the amplifier 15 via the signal line 22 and the selection unit 16. The amplifier 15 outputs a signal based on the voltage of FD13 to the signal line 22. As a result, the voltage of signal line 22 becomes the voltage corresponding to the voltage of FD13. When the voltage of FD13 is lower than the voltage of signal CLIP, the current from the current source 25 flows mainly to the signal output unit 31 via the signal line 22 and the switch unit 32. In this case, the signal output unit 31 outputs a signal based on the voltage of signal CLIP to the signal line 22, thereby limiting the voltage of signal line 22 to the voltage corresponding to the voltage of signal CLIP. The voltage of signal line 22 becomes the voltage corresponding to the voltage of signal CLIP.

[0036] Thus, when the switch unit 32 is ON, the supply unit (limiting unit) 30 limits the voltage of the signal line 22 according to the voltage of FD13 and the voltage of the signal CLIP. The transistor M11 of the supply unit 30 is a transistor that limits (clips) the voltage of the signal line 22, and is sometimes called a clipping transistor or clamping transistor. When the voltage of FD13 is relatively low, the voltage of the signal line 22 is limited to the voltage based on the signal CLIP. This prevents the voltage of the signal line 22 from dropping and causing the current source 25 to malfunction. As a result, it is possible to prevent the current source 25 from being cut off. In addition, it is possible to prevent the voltage of the signal line 22 from being outside the expected range and being input to the readout unit 60.

[0037] Furthermore, in the image sensor 3 according to this embodiment, different signal levels of CLIP are input to the supply unit 30 depending on whether the dark signal is being read out or the photoelectric conversion signal is being read out. As a result, the supply unit 30 can supply different voltages to the signal line 22 depending on whether the dark signal is being read out or the photoelectric conversion signal is being read out.

[0038] When reading out the dark signal, a first voltage V1 is supplied to the gate of transistor M11 in the signal output unit 31. In this case, the voltage of the signal line 22 is limited so that the voltage based on the first voltage V1 becomes the lower limit. This limits the voltage of the signal output to the readout unit 60 as the dark signal. When reading out the photoelectric conversion signal, a second voltage V2, lower than the first voltage V1, is supplied to the gate of transistor M11. In this case, the voltage of the signal line 22 is limited so that the voltage based on the second voltage V2 becomes the lower limit. This limits the voltage of the signal output to the readout unit 60 as the photoelectric conversion signal.

[0039] In some cases, a charge can accumulate in FD13 due to pixel defects, causing a decrease in the dark signal voltage. When photographing high-brightness subjects, a charge can accumulate in FD13, leading to a decrease in the dark signal voltage. In such cases, the difference between the dark signal and the photoelectric conversion signal becomes small, which can degrade the image quality of the image generated using the signal after CDS processing. In this embodiment, as described above, the dark signal voltage can be limited to ensure a difference between the signal level of the dark signal and the signal level of the photoelectric conversion signal. Therefore, it is possible to suppress the degradation of image quality caused by a small difference between the dark signal and the photoelectric conversion signal.

[0040] The second voltage V2 described above is determined so that the voltage of the signal line 22 does not fall below the voltage required for the operation of the transistor M5 of the current source 25, and so that the voltage of the signal line 22 can take the lowest possible voltage. This suppresses interference with the voltage change of the signal line 22 that occurs when the charge generated in the photoelectric conversion unit 11 is transferred to FD13. It also suppresses fluctuations in the current of the current source 25 and prevents noise from being mixed into the photoelectric conversion signal output to the signal line 22.

[0041] Figures 5 and 6 are timing charts showing examples of operation of the image sensor 3 according to the first embodiment, respectively. In the timing charts shown in Figures 5 and 6, the vertical axis represents the voltage level of the signal, and the horizontal axis represents time. FD represents the signal (voltage signal) of FD13, and VOUT represents the signal output to the signal line 22. In the examples shown in Figures 5 and 6, the signal CLIP_SW is set to a high level, and the switch unit 32 of the supply unit 30 is in the ON state. In Figures 5 and 6, transistors to which high-level (e.g., power supply voltage VDD) control signals (signals SEL, RST, TX) are input are in the ON state, and transistors to which low-level (e.g., ground voltage) control signals are input are in the OFF state.

[0042] At time t1 shown in Figure 5, the signal RST becomes high, turning on transistor M2 of the reset unit 14 of pixel 10, and electrically connecting FD13 and the power line 121. This resets the charge of FD13, and the voltage of FD13 becomes the reset voltage. Also at time t1, the signal SEL becomes high, turning on transistor M4 of the selection unit 16. This allows the amplification unit 15 and the selection unit 16 to output a signal based on the reset voltage of pixel 10, i.e., the signal after resetting the charge of FD13 of pixel 10, to the signal line 22. At time t2, the signal RST becomes low, turning off transistor M2 of the reset unit 14.

[0043] The signal output unit 31 of the supply unit 30 has received the signal CLIP with a first voltage V1 as input and is in a state where it can supply a voltage based on the first voltage V1 (the clip voltage Vc1 shown by the dashed line in Figure 5) to the signal line 22. In the example shown in Figure 5, during the period from time t2 to time t3, the voltage of FD13 (the voltage of FD shown in Figure 5) is higher than the first voltage V1, which is the voltage of the signal CLIP. Therefore, the voltage of the signal VOUT output to the signal line 22 is a voltage based on the voltage of FD13, that is, a voltage based on the reset voltage after the charge accumulated in FD13 has been reset.

[0044] At time t3, the processing unit 50 of the readout unit 60 samples the signal VOUT, which is a voltage based on the reset voltage, as a dark signal. It can also be said that the voltage of the dark signal is determined at time t3. The AD conversion unit 40 of the processing unit 50 converts the dark signal into a digital signal. At time t4, the signal output unit 31 receives the signal CLIP, which is a second voltage V2 that is lower than the first voltage V1. The voltage of the signal CLIP changes from the first voltage V1 to the second voltage V2, and the signal output unit 31 becomes ready to supply a voltage based on the second voltage V2 (the clip voltage Vc2 shown by the dashed line in Figure 5) to the signal line 22.

[0045] At time t5, the signal TX becomes high level, causing transistor M1 in the transfer unit 12 to turn on, and the charge photoelectrically converted in the photoelectric conversion unit 11 is transferred to FD13. As a result, the voltage of FD13 becomes the voltage based on the charge transferred from the photoelectric conversion unit 11. Also, because the signal SEL is high level, the amplification unit 15 and the selection unit 16 are in a state where they can output a signal based on the charge generated in the photoelectric conversion unit 11 to the signal line 22. At time t6, the signal TX becomes low level, causing transistor M1 in the transfer unit 12 to turn off.

[0046] In the example shown in Figure 5, the voltage of FD13 is higher than the second voltage V2, which is the voltage of the signal CLIP, during the period from time t6 to time t7. Therefore, the voltage of the signal VOUT output to the signal line 22 is a voltage based on the voltage of FD13, that is, a voltage based on the charge photoelectrically converted by the photoelectric conversion unit 11.

[0047] At time t7, the processing unit 50 samples the signal VOUT, which is a voltage based on the charge photoelectrically converted by the photoelectric conversion unit 11, as the photoelectric conversion signal. It can also be said that the voltage of the photoelectric conversion signal is determined at time t7. The AD conversion unit 40 of the processing unit 50 converts the photoelectric conversion signal into a digital signal. The processing unit 50 performs CDS (Cardion Differential Score) on the dark signal and the photoelectric conversion signal that have been converted into digital signals, performing difference processing between the dark signal and the photoelectric conversion signal. After performing signal processing such as CDS processing, the processing unit 50 outputs the processed signal to the control unit 4.

[0048] Next, with reference to Figure 6, another example of the operation of the image sensor 3 will be described. At time t11 shown in Figure 6, the signal RST becomes high level, causing transistor M2 of the reset unit 14 of pixel 10 to turn on. This resets the charge of FD13, and the voltage of FD13 becomes the reset voltage. Also at time t11, the signal SEL becomes high level, causing transistor M4 of the selection unit 16 to turn on. This allows the amplification unit 15 and the selection unit 16 to output a signal based on the reset voltage of pixel 10 to the signal line 22. At time t12, the signal RST becomes low level, causing transistor M2 of the reset unit 14 to turn off.

[0049] The signal output unit 31 of the supply unit 30 has received the CLIP signal with a first voltage V1 as input and is in a state where it can supply a voltage based on the first voltage V1 (clip voltage Vc1) to the signal line 22. In the example shown in Figure 6, during the period from time t12 to time t13, the voltage of FD13 is higher than the first voltage V1, which is the voltage of the CLIP signal. Therefore, the voltage of the signal VOUT output to the signal line 22 is a voltage based on the reset voltage of FD13.

[0050] At time t13, the processing unit 50 of the readout unit 60 samples the signal VOUT, which is a voltage based on the reset voltage, as a dark signal. The processing unit 50 converts the dark signal into a digital signal. At time t14, the signal output unit 31 receives a signal CLIP, which is a second voltage V2 lower than the first voltage V1, and becomes ready to supply a voltage based on the second voltage V2 (clip voltage Vc2) to the signal line 22.

[0051] At time t15, the signal TX becomes high level, causing transistor M1 in the transfer unit 12 to turn on, and the charge photoelectrically converted in the photoelectric conversion unit 11 is transferred to FD13. As a result, the voltage of FD13 becomes the voltage based on the charge transferred from the photoelectric conversion unit 11. Also, because the signal SEL is high level, the amplification unit 15 and the selection unit 16 are in a state where they can output a signal based on the charge generated in the photoelectric conversion unit 11 to the signal line 22. At time t16, the signal TX becomes low level, causing transistor M1 in the transfer unit 12 to turn off.

[0052] In the example shown in Figure 6, during the period from time t16 to time t17, the voltage of FD13 is lower than the second voltage V2, which is the voltage of the CLIP signal. Therefore, the voltage of the signal VOUT output to signal line 22 is limited to the voltage based on the second voltage V2, i.e., the clipping voltage Vc2.

[0053] At time t17, the processing unit 50 samples the signal VOUT, which is the clipping voltage Vc2, as a photoelectric conversion signal. The processing unit 50 converts the photoelectric conversion signal into a digital signal. After performing signal processing such as CDS processing using the dark signal converted into a digital signal and the photoelectric conversion signal, the processing unit 50 outputs the processed signal to the control unit 4. Thus, in this embodiment, the supply unit 30 receives signals CLIP with different signal levels depending on whether it is reading out the dark signal or reading out the photoelectric conversion signal. The supply unit 30 can limit the voltage of the signal line 22 by supplying voltage to the signal line 22 according to the voltage of the signal CLIP and the voltage of FD13.

[0054] As shown in Figure 4, the gates of the transistors M5 of each current source 25, which are provided for each signal line 22, are commonly connected to the signal line into which the signal VB is input. In addition, parasitic capacitance (load capacitance) may be added between the signal line 22, which outputs the pixel signal, and the gate of the transistor M5 connected to that signal line 22. Due to the effect of this parasitic capacitance, fluctuations in the voltage of the signal line 22 can cause fluctuations in the voltage of the signal VB, and thus the magnitude of the current flowing through each current source 25 can fluctuate. If the image sensor 3 does not have a supply unit 30, a large drop in the voltage of the signal line 22 will cause a large drop in the voltage of the signal VB, which may result in a decrease in the current supplied from the current source 25, or even a complete lack of current supply from the current source 25. If the voltage of the signal line 22 provided for a certain pixel block 20 fluctuates, the voltage of the signal VB supplied commonly to each current source 25 will fluctuate, causing the voltages of the signal lines 22 provided for other pixel blocks 20 to fluctuate as well.

[0055] On the other hand, the image sensor 3 according to this embodiment is provided with a supply unit 30 for each pixel block 20. The supply unit 30 can supply a voltage based on the signal CLIP to the signal line 22 when the switch unit 32 is ON, and can limit the voltage of the signal line 22. Therefore, the image sensor 3 can suppress fluctuations in the voltage of the signal VB by limiting the voltage of the signal line 22. This makes it possible to suppress noise caused by fluctuations in the voltage of the signal VB from being mixed into the signal (photoelectric conversion signal, dark signal) output to the signal line 22.

[0056] In this embodiment, when the voltage of FD13 is relatively low, the voltage of the signal line 22 is limited (clipping operation), and when the voltage of FD13 is relatively high, the clipping operation is not performed. The path through which the current flows from the current source 25 changes depending on whether the clipping operation is performed or not, as described above. When the clipping operation is performed, the current from the current source 25 flows between the power line 121 and the wiring (ground wire) 131 shown in Figure 4, via the signal output section 31 of the supply section 30. When the clipping operation is not performed, the current from the current source 25 flows between the power line 121 and the ground wire (ground wiring) 131, via the amplification section 15 of the pixel 10. Since wiring resistance is added to the power line 121 and the ground wire 131 as schematically shown in Figure 4, a voltage drop (IR drop) due to the wiring resistance occurs.

[0057] Due to the effects of the current path changes described above, the voltage drop in the power line 121 and the ground line 131 changes depending on whether clipping is performed or not, which can cause a difference in the value of the power supply voltage VDD supplied to each pixel 10 via the power line 121. When reading signals from multiple pixel blocks 20 simultaneously, differences in the pixel signals due to fluctuations in the power supply voltage VDD occur between pixel blocks 20 in which clipping is performed during signal reading and pixel blocks 20 in which clipping is not performed during signal reading. Furthermore, if fluctuations in the power supply voltage VDD occur when reading the photoelectric conversion signal, the signal level of the reset voltage of FD13, i.e., the signal level that serves as the reference for voltage changes that occur in accordance with the charge transferred from the photoelectric conversion unit 11, may fluctuate. If there is a difference in the signal level of the reset voltage between the dark signal reading period and the photoelectric conversion signal reading period, CDS processing will be performed using a dark signal with a different signal level than the signal level that should be used as the reference for the photoelectric conversion signal, and the image generated using the signal after CDS processing will exhibit, for example, black levels or streaking. In particular, when the power supply voltage is supplied to the pixel 10 and the supply unit 30 from separate electrodes via separate power lines, it is thought that the difference in the value of the power supply voltage supplied to the pixel 10 between the cases in which clipping is performed and the cases in which clipping is not performed will be large.

[0058] In this embodiment, the pixel 10 and the supply unit 30 are arranged on the same first substrate 111. Furthermore, the pixel 10 and the supply unit 30 are supplied with a power supply voltage VDD from a common electrode 200 via a common power line 121. This reduces the difference in the power supply voltage VDD supplied to the pixel 10 between when clipping is performed and when it is not. Therefore, it is possible to suppress differences in the signal of each pixel caused by fluctuations in the power supply voltage. As a result, it is possible to prevent blackouts and streaking in the image generated using the pixel signals.

[0059] Figure 7 shows an example of a partial layout of an image sensor according to the first embodiment. Each of the multiple pixel blocks 20 of the image sensor 3 has multiple pixels 10, including a photoelectric conversion unit 11, arranged in the row direction (X direction), which is the first direction, and in the column direction (Y direction), which is the second direction intersecting the first direction. In the example shown in Figure 7, the pixel block 20 is provided with four pixels 10, four switch units 32, and one signal output unit 31. On the first substrate 111 of the image sensor 3, multiple pixel blocks 20, each containing four pixels 10, are arranged in the row direction (horizontal direction) and the column direction (vertical direction). The four switch units 32 and the one signal output unit 31 constitute a supply unit 30. Note that Figure 7 schematically shows a part of the wiring provided in the pixel block 20.

[0060] In the example shown in Figure 7, the signal output unit 31 is connected to each of the four switch units 32 and supplies voltage to each of the four switch units 32. Clipping is performed using one signal output unit 31 provided for each pixel block 20. Therefore, compared to the case where multiple signal output units 31 are provided within the pixel block 20, the light-receiving area of ​​the photoelectric conversion unit 11 can be increased. This prevents a decrease in the aperture ratio of the pixels. Furthermore, clipping can be performed without increasing the chip area, and a decrease in the image quality of the image generated using the pixel signals can be suppressed.

[0061] According to the above-described embodiment, the following effects and advantages can be obtained. (1) The image sensor 3 comprises a first substrate 111 on which a photoelectric conversion unit 11 that generates electric charge by photoelectric conversion, a signal line 22 on which a signal based on the charge generated by the photoelectric conversion unit 11 is output, and a supply unit 30 that supplies voltage to the signal line 22 is provided, and a second substrate 112 which is stacked on the first substrate 111 and on which a processing unit 50 that processes the signal output to the signal line 22 is provided. In this embodiment, the pixel 10 having the photoelectric conversion unit 11 and the supply unit 30 are arranged on the same first substrate 111. Therefore, fluctuations in the power supply voltage associated with the operation of the supply unit 30 can be reduced, and a deterioration in the quality of the pixel signal can be prevented. As a result, a deterioration in the image quality of the image generated using the pixel signal can be suppressed. (2) In this embodiment, the readout unit 60 having a plurality of processing units 50 is arranged on the second substrate 112. Therefore, multiple circuits for processing pixel signals can be arranged without increasing the chip area. In addition, a decrease in the aperture ratio of the pixels can be suppressed.

[0062] The following modifications are also within the scope of the present invention, and it is possible to combine one or more of these modifications with the embodiments described above.

[0063] (Variation 1) Figure 8 shows an example of a partial layout of the image sensor according to Modification 1. As shown in Figure 8, the pixel block 20 may be configured without a switch unit 32. The signal output unit 31 is electrically connected to the signal line 22 without going through the switch unit 32, and can supply voltage to the signal line 22 in both the case of reading out the dark signal and the case of reading out the photoelectric conversion signal. In this modification, the switch unit 32 can be reduced, and the chip area can be reduced. It is also possible to increase the light-receiving area of ​​the photoelectric conversion unit 11.

[0064] (Modification 2) Figure 9 shows an example of a partial layout of the image sensor according to Modification 2. As shown in Figure 9, a signal output unit 31 may be provided for each pixel 10. In the example shown in Figure 9, four signal output units 31 and four switch units 32 are arranged for each pixel block 20.

[0065] The signal CLIP may be supplied to each signal output unit 31 or to each of the multiple signal output units 31 using separate wiring. In this case, the number of signal output units 31 connected to a single wire can be reduced, and the signal level switching of the signal CLIP can be performed at high speed.

[0066] (Variation 3) In the embodiment described above, an example was described in which a signal line 22 and a supply unit 30 are provided for each pixel block 20. However, a signal line 22 may be provided for each pixel 10, and a supply unit 30 may be provided for each signal line 22. In this case, a pixel control unit 35 may be provided for each pixel 10, and a supply control unit 36 ​​may be provided for each supply unit 30. Each supply control unit 36 ​​may control the supply unit 30 provided for each signal line 22 so that voltage can be supplied to each signal line 22 at different timings.

[0067] (Modification 4) The pixels 10 and the supply unit 30 are composed of analog circuits using MOS transistors. The analog circuits are provided on the first substrate 111, and the digital circuits, such as the AD conversion unit 40, are provided on the second substrate 112. The first substrate 111 can be processed using a process optimized for analog circuits, and the second substrate 112 can be processed using a process optimized for digital circuits. Furthermore, if the pixels 10 and the supply unit 30 are composed of the same NMOS transistor (or PMOS transistor), well separation becomes unnecessary. Also, by using the same NMOS transistor for the pixels 10 and the supply unit 30, the manufacturing process for the image sensor can be shortened.

[0068] The pixel 10 and the supply unit 30 may be configured using NMOS transistors or PMOS transistors. The pixel 10 and the supply unit 30 may also be configured using both NMOS transistors and PMOS transistors. When the amplification unit 15 and the signal output unit 31 are configured using NMOS transistors, when reading out the photoelectric conversion signal, a signal CLIP with a lower voltage than when reading out the dark signal may be supplied to the signal output unit 31, as described above. When the amplification unit 15 and the signal output unit 31 are configured using PMOS transistors, when reading out the photoelectric conversion signal, a signal CLIP with a higher voltage than when reading out the dark signal may be supplied to the signal output unit 31. The supply unit 30 supplies voltage to the signal line 22 so that the voltage of the signal line 22 is between the power supply voltage (or ground voltage) and the voltage based on the signal CLIP. The voltage of the signal line 22 is limited by the supply unit 30 to be within a range where the voltage based on the signal CLIP is the upper or lower limit.

[0069] (Variation 5) In the embodiment described above, an example was described in which the image sensor 3 is constructed by stacking a first substrate 111 and a second substrate 112. However, the first substrate 111 and the second substrate 112 do not necessarily have to be stacked.

[0070] (Experimental variation 6) In the embodiment described above, an example was described in which the image sensor 3 is a back-illuminated type. However, the image sensor 3 may also be a front-illuminated type in which the wiring layer 101 is provided on the incident surface side into which light enters.

[0071] (Example 7) In the embodiments and modifications described above, examples were given in which a photodiode was used as the photoelectric conversion unit. However, a photoelectric conversion film (organic photoelectric film) may also be used as the photoelectric conversion unit.

[0072] (Variation 8) The image sensor and imaging device described in the above embodiments and modifications may be applied to cameras, smartphones, tablets, cameras built into PCs, in-vehicle cameras, cameras mounted on unmanned aerial vehicles (drones, radio-controlled aircraft, etc.).

[0073] Although various embodiments and modifications have been described above, the present invention is not limited to these. Other embodiments conceivable within the scope of the technical idea of ​​the present invention are also included within the scope of the present invention.

[0074] The disclosures of the following priority application are incorporated herein by reference. Japanese Patent Application No. 2019-180780 (filed September 30, 2019) [Explanation of symbols]

[0075] 1...Imaging device, 3...Image sensor, 4...Control unit, 10...Pixel, 11...Photoelectric conversion unit, 20...Pixel block, 30...Supply unit, 35...Pixel control unit, 36...Supply control unit, 40...AD conversion unit, 50...Processing unit, 60...Readout unit, 70...Readout control unit, 111...First substrate, 112...Second substrate

Claims

[Claim 1] A first substrate having: a first photoelectric conversion unit that converts light into electric charge and outputs a first signal based on the charge converted by the first photoelectric conversion unit; a second photoelectric conversion unit that converts light into electric charge and is arranged in the column direction alongside the first photoelectric conversion unit and outputs a second signal based on the charge converted by the second photoelectric conversion unit; a first supply unit that controls the voltage of a first signal line on which the first signal read from the first pixel is output; and a second supply unit that controls the voltage of a second signal line on which the second signal read from the second pixel is output. A second substrate laminated with the first substrate, the second substrate having a first processing unit that performs signal processing on the first signal output on the first signal line, and a second processing unit that performs signal processing on the second signal output on the second signal line. An image sensor equipped with the following features.

Images