Method for receiving data 1 and data 0 signals transmitted from LTE and WiMAX base stations via microwave carrier phase modulation on a mobile terminal.

Abstract

This invention provides a receiving method and a clock synchronization method for a mobile terminal that enables high-speed transmission of microwave wireless communication. [Solution] A method for synchronizing the clock of a mobile terminal receiving a microwave carrier wave phase-modulated signal sent from a base station, comprising an oscillator A that generates a microwave sinusoidal carrier wave and an oscillator B that generates an inverse-phase carrier wave, wherein after L consecutive wavelengths of the carrier wave from oscillator A, the signals of (mL) consecutive wavelengths of the inverse-phase carrier wave from oscillator B are set as bit 1, and after a delimiter, the signals of (m) consecutive wavelengths of the carrier wave are set, wherein the carrier frequency clock is counted up, and at t1,i when a positively convex voltage peak is detected in the amplitude of the L consecutive carrier wave wavelengths received by the antenna, if there is a positively convex peak in the wavelength amplitude value approximately 1.5 wavelengths after the peak detection position, all flipflops of the synchronization counter are cleared and obtained as the output clock, and it is determined to be bit 1 of the received data.

Description

Technical Field

[0001] The present invention relates to a method for a mobile terminal to receive data 1 and data 0 signals by micro-carrier phase modulation sent from an LTE or WiMAX base station that is resistant to fading and does not use OFDMA.

[0002] Conventional LTE handovers (Non-Patent Documents 1 and 2) performed data packet transmission after selecting a radio channel, similar to IEEE 802.11b handovers. Since access from a mobile node to an LTE base station is transmitted by CSMA / CD, a delay time occurred due to collisions. Therefore, the number of mobile terminals during LTE base station switching was limited. After switching, communication was performed in a time slot given by the channel, so there were no collisions like CSMA / CD, and the channel number limitation was determined only by speed. In the OFDMA of Non-Patent Document 1, since the time frame for performing FFT is long, relatively high harmonics higher than the fundamental wave do not occur.

Prior Art Documents

Non-Patent Documents

[0003]

Non-Patent Document 1

Non-Patent Document 2

Summary of the Invention

[0004] Non-patent documents 1 and 2 are robust against fading due to the integration effect of the FFT, but they have the drawback of large handover delays when a mobile terminal accesses a new base station because they use CSMA / CD for L2 handover LTE access. OFMDA in Non-patent document 1 has the drawback that when the mobile terminal moves at high speed, the sampling points for the FFT cannot be determined, which can cause errors. Also, when there are many subcarriers, the computational complexity of the FFT increases. Furthermore, since only 2 bits can be transmitted per 20MHz subcarrier, it has the drawback of not being able to transmit high-speed bits. In addition, it has the drawback that the boundaries of the FFT window frame in the mobile terminal are difficult to determine.

[0005] The object of the present invention is to provide a microwave 10 signal transmission method that is resistant to fading, which involves phase-modulating a continuous carrier wave of microwaves, sending it to a mobile terminal, and reconstructing the data at the receiving end without using FFT. [Means for solving the problem]

[0006] The present invention has been made in view of the problems of the prior art described above, and the means of the present invention are shown from the first aspect to the fifteenth aspect of the present invention. A first aspect of the present invention is a method for receiving data 1 and data 0 signals transmitted by microwave carrier phase modulation from an LTE or WiMAX base station, comprising an oscillator A that generates a microwave sine carrier and an oscillator B that generates an inverse sine carrier, wherein, after a guard time or without a guard time, after L (L: a natural number) consecutive wavelengths of the carrier wave from oscillator A, a signal of (mL) (m: a natural number) consecutive wavelengths of the inverse carrier wave from oscillator B is transmitted as bit 1 of the data, and a signal of (m) consecutive wavelengths of the carrier wave from oscillator A is transmitted as bit 0 of the data, and after a delimiter such as a repetition of bits 1 and 0, the transmitted data or fixed-length frame is transmitted as data 1 and data 0 signals transmitted by microwave carrier phase modulation from an LTE or WiMAX base station, wherein the method is provided for receiving data 1 and data 0 signals transmitted by microwave carrier phase modulation from an LTE or WiMAX base station. A self-operating synchronous counter, which counts up to (m)*J with a clock that is J times the carrier frequency clock and outputs an output clock at the count value Y, is used when a positively convex voltage peak is detected at bit 1 of the beginning of the delimiter of the first L consecutive carriers at t1,i, when the output of a one-stage or two-stage amplifier of the microwave received by the antenna, the entire flipflop of the counter that outputs a 1.5 wavelength counter value is cleared. If there is a positively convex peak in the wavelength amplitude value approximately (1.5) wavelengths after the peak detection position, the entire flipflop of the synchronous counter is cleared, the clock of the received data is obtained as the output clock of the synchronous counter, and it is determined that bit 1 of the received data is the first bit. A method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, characterized by having a step of determining that if bit 1 of the received data is not at the output clock position, it is bit 0 of the received data.

[0007] A second aspect of the present invention relates to a method for receiving data 1 and data 0 signals transmitted by microwave carrier phase modulation from an LTE or WiMAX base station as described in the first aspect of the present invention, This method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation is characterized in that, when a positively convex voltage peak is detected in the amplitude of the wavelengths of the L continuous carriers, the capacitor output signal of the bandpass LCR filter of the signal received by the antenna after the guard time is applied as Vin to the positive input terminal of the operational amplifier, the ground voltage is applied to the negative input terminal of the operational amplifier via resistor R1, and a resistor R2 is used between the negative input terminal and the output of the operational amplifier, and the output voltage of a single-stage amplifier configured with R2 / R1 being increased is (Vin-0v)*R2 / R1+Vin, and the voltage of the signal obtained by delaying the signal, which is initially simply the amplitude value of the first L wavelength signals, by a delay line or delay circuit for a certain period of time, changes from a state where the voltage of the signal is lower than the voltage of the signal before the delay line or delay circuit to a state where it is higher than the voltage of the signal before the delay line or delay circuit, after the guard time, is the position t1,i (i: current position).

[0008] A third aspect of the present invention relates to a method for receiving data 1 and data 0 signals transmitted by microwave carrier phase modulation from an LTE or WiMAX base station as described in the first aspect of the present invention, When detecting the positive voltage peak of the amplitude of the wavelength of the L continuous carrier waves, the first stage amplifier of the input signal inversion with a zero bias voltage, which is either pre-filtered with a carrier frequency filter, a low-pass filter, or a high-pass filter, or left as is, is used to invert the signal received by the antenna after the guard time. In each case, a resistor and capacitor are connected in parallel to ground at the emitter, a resistor and capacitor are connected in parallel to the positive power supply at the collector, a resistor and capacitor are connected in parallel to ground at the emitter, and a resistor and capacitor are connected in parallel to the positive power supply at the collector, and the collector output of an NPN transistor is used. This is a method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, characterized in that the second stage amplifier is simply connected directly to the base of a PNP transistor, the collector of the PNP transistor is connected to earth via a collector resistor, and the voltage at the collector connection point is at position t1,i (i: current position), where t1,i is the time when the voltage of the signal obtained by delaying the amplitude values ​​of the initial L wavelength signals by a delay line or delay circuit for a certain period of time after a guard time changes from a state where it is lower to a state where it is higher than the voltage of the signal before the delay line or delay circuit.

[0009] A fourth aspect of the present invention relates to a method for receiving data 1 and data 0 signals transmitted by microwave carrier phase modulation from an LTE or WiMAX base station as described in the first aspect of the present invention, This method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation is characterized in that, when detecting the positive voltage peak of the amplitude of the wavelengths of the L continuous carriers, a resistor and a capacitor are connected in parallel between the emitter of the first-stage amplifier, which has a 0 bias voltage of the input signal inverted by the signal received by the antenna after the guard time, and the collector output of an NPN transistor, which has a resistor and a capacitor connected in parallel between the collector and the positive power supply, is directly connected to the base of a PNP transistor of the second-stage amplifier, and the collector of the PNP transistor is connected to ground via a collector resistor, and the voltage at the collector connection point is the position t1,i (i: current position) when the voltage of the signal obtained by delaying the signal obtained by delaying the amplitude values ​​of the first L wavelengths by a delay line or delay circuit for a certain period of time after the guard time changes from a state where it is lower to a state where it is higher than the voltage of the signal before the delay line or delay circuit.

[0010] A fifth aspect of the present invention relates to a method for receiving data 1 and data 0 signals transmitted by microwave carrier phase modulation from an LTE or WiMAX base station as described in the first aspect of the present invention, This method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation is characterized in that, when detecting a positive voltage peak in the amplitude of the L-th wavelength of the L continuous carrier waves, the voltage of the LCR capacitor grounded to the ground of the LCR resonator of the signal received by the antenna after the guard time is applied to the gate of the NMOS of the first-stage amplifier with a 0 bias voltage, the drain output of the NMOS is directly connected to the gate of the PMOS of the second-stage amplifier, the drain of the PMOS transistor is connected to ground via a drain resistor, and the voltage at the drain connection point is at the position t1,i (i: current position), where t1,i is the time when the voltage of the signal obtained by delaying the amplitude values ​​of the first L wavelength signals by a delay line or delay circuit for a certain period of time after the guard time changes from a state where it is lower to a state where it is higher than the voltage of the signal before the delay line or delay circuit.

[0011] A sixth aspect of the present invention relates to a method for receiving data 1 and data 0 signals transmitted by microwave carrier phase modulation from an LTE or WiMAX base station as described in the first aspect of the present invention, This method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation is characterized in that, when detecting a positive voltage peak in the amplitude of the L-th wavelength of the L continuous carrier waves, the voltage of the LCR capacitor grounded to the ground of the LCR resonator of the signal received by the antenna after the guard time is added to the source of the npn transistor of the first-stage amplifier with a 0 bias voltage, the collector output of the npn transistor is directly connected to the gate of the PMOS of the second-stage amplifier, the drain of the PMOS transistor is connected to ground via a drain resistor, and the voltage at the drain connection point is at the position t1,i (i: current position), where t1,i is the time when the voltage of the signal, which is initially simply the amplitude value of the first L wavelength signals, delayed for a certain period of time by a delay line or delay circuit, changes from a state where it is lower to a state where it is higher than the voltage of the signal before the delay line or delay circuit.

[0012] A seventh aspect of the present invention is a method for synchronizing the clock of a mobile terminal's receiving circuit with data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, comprising an oscillator A that generates a microwave sine carrier and an oscillator B that generates an inverse sine carrier, wherein after a guard time, after L (L: natural number) consecutive wavelengths of the carrier wave from oscillator A, a signal of (mL) (m: natural number) consecutive wavelengths of the inverse carrier wave from oscillator B is used as bit 1 of the transmitted data, and a signal of (m) consecutive wavelengths of the carrier wave from oscillator A is used as bit 0 of the transmitted data, and after a delimiter in which bits 1 and bit 0 are repeated, the transmitted data is... This is a method for synchronizing the clock of data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, characterized in that a synchronous counter that operates autonomously when there is no clear signal input, counts up to (m)*J with a clock that is J times the carrier frequency clock and outputs an output clock at the count value Y, and when a positively convex voltage peak of the amplitude of the wavelength of the L continuous carriers at the output of a one-stage or two-stage amplifier of microwaves received by an antenna is detected at t1,i, a peak of positively convex wavelength amplitude value is found approximately 1.5 wavelengths after the peak detection position, and if there is a peak of positively convex wavelength amplitude value, all flipflops of the synchronous counter are cleared to obtain the clock of the received data as the output clock, and it is determined that the received data is bit 1.

[0013] The eighth aspect of the present invention relates to a method for receiving data 1 and data 0 signals transmitted by microwave carrier phase modulation from an LTE or WiMAX base station as described in the first aspect of the present invention, This method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation is characterized in that the counter value Y of the output clock output at the aforementioned counter value Y is ((m*J-2*J).

[0014] The ninth aspect of the present invention relates to a method for receiving data 1 and data 0 signals transmitted by microwave carrier phase modulation from an LTE or WiMAX base station as described in the first aspect of the present invention, The method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation is characterized in that J is 8.

[0015] A tenth aspect of the present invention relates to a method for receiving data 1 and data 0 signals transmitted by microwave carrier phase modulation from an LTE or WiMAX base station as described in the first aspect of the present invention, This method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation is characterized in that m is 4 and L is 2.

[0016] The 11th aspect of the present invention is a method for a mobile terminal to receive data 1 and data 0 signals by microwave carrier wave phase modulation sent from the LTE and WIMAX base stations described in the 1st aspect of the present invention, wherein L is 3, and m is 4 or 5, and it is a method for a mobile terminal to receive data 1 and data 0 signals by microwave carrier wave phase modulation sent from an LTE and WIMAX base station.

[0017] The 12th aspect of the present invention is a method for clock synchronization of a mobile terminal for data 1 and data 0 signals by microwave carrier wave phase modulation sent from the LTE and WIMAX base stations described in the 7th aspect of the present invention, wherein the counter value Y of the output clock output by the counter value Y is ((m*J - 2*J)), and it is a method for clock synchronization of a mobile terminal for data 1 and data 0 signals by microwave carrier wave phase modulation sent from an LTE and WIMAX base station.

[0018] The 13th aspect of the present invention is a method for clock synchronization of a mobile terminal for data 1 and data 0 signals by microwave carrier wave phase modulation sent from the LTE and WIMAX base stations described in the 7th aspect of the present invention, wherein J is 8, and it is a method for clock synchronization of a mobile terminal for data 1 and data 0 signals by microwave carrier wave phase modulation sent from an LTE and WIMAX base station.

[0019] The 14th aspect of the present invention is a method for clock synchronization of a mobile terminal for data 1 and data 0 signals by microwave carrier wave phase modulation sent from the LTE and WIMAX base stations described in the 7th aspect of the present invention, wherein )]]m is 4, and L is 2, and it is a method for clock synchronization of a mobile terminal for data 1 and data 0 signals by microwave carrier wave phase modulation sent from an LTE and WIMAX base station according to claim 1.

[0020] The 15th aspect of the present invention is a method for clock synchronization of a mobile terminal for data 1 and data 0 signals by microwave carrier phase modulation transmitted from an LTE or WiMAX base station as described in the 7th aspect of the present invention. In the method for clock synchronization of a mobile terminal for data 1 and data 0 signals by microwave carrier phase modulation transmitted from an LTE or WiMAX base station, L is 3, and m is 4 or 5.

Advantages of the Invention

[0021] As described above, the present invention includes a transmitter A that generates a sin carrier wave of microwave and a transmitter B that generates a sin carrier wave of opposite phase. After the guard time or without the guard time, after L (L: natural number) consecutive wavelengths of the carrier wave from the transmitter A, a signal of (m - L) (m: natural number) consecutive wavelengths of the opposite-phase carrier wave from the transmitter B is used as bit 1 of the transmission data, and a signal of m consecutive wavelengths of the carrier wave from the transmitter A is used as bit 0 of the transmission data. After a delimiter such as the repetition of bit 1 and bit 0, it is a method for receiving data 1 and data 0 signals by microwave carrier phase modulation transmitted from an LTE or WiMAX base station of the transmission data or a fixed-length frame. Count up to (m)*J at a clock that is J times the carrier wave frequency clock and output the output clock with the count value Y. When there is no clear signal input, a self-running synchronous counter. At the time t1,i of detecting the voltage peak convex to the plus of the amplitude of the first L consecutive carrier wave wavelengths at the beginning of the bit 1 of the delimiter of the output of a one-stage amplifier or a two-stage amplifier of the microwave received by the antenna, clear all flip-flops of a counter that outputs a 1.5 wavelength count value. After a delay of about (1.5) wavelengths from the peak detection position, if there is a peak convex to the plus of the wavelength amplitude value, clear all flip-flops of the synchronous counter, obtain the clock of the received data as the output clock of the synchronous counter, and determine it as bit 1 of the received data. This method is characterized by having a step of determining that bit 1 of the received data is bit 0 if bit 1 of the received data is not at the output clock position, thus having the advantage of being resistant to fading. It also has the advantage of being able to transmit bits at high speed. [Brief explanation of the drawing]

[0022] [Figure 1] This figure illustrates an example of a microwave phase-modulated transmission circuit that transmits bit 1 of transmission data with different microwave frequencies for each base station, transmitted from an LTE (WiMAX) station according to the first embodiment of the present invention, using a positive-phase digital sine carrier generation circuit A and an inverted-phase digital sine carrier generation circuit B. [Figure 2] This figure illustrates an example of a microwave phase-modulated transmission circuit that transmits bit 1 of transmission data with a different microwave frequency for each base station, transmitted from an LTE (WiMAX) station according to the first embodiment of the present invention, using an analog sine carrier generation circuit and a 1 / 2 wavelength delayed coaxial cable. [Figure 3] This figure illustrates an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data with a different microwave frequency for each base station, transmitted from an LTE (WiMAX) station according to the first embodiment of the present invention. [Figure 4] This figure illustrates an example of the operation of a receiving circuit in a mobile terminal that receives bit 1 of transmission data with a different microwave frequency for each base station, transmitted from an LTE (WiMAX) station according to the first embodiment of the present invention. [Figure 5] This figure illustrates an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data with a different microwave frequency for each base station, transmitted from an LTE (WiMAX) station according to the first embodiment of the present invention. [Figure 6] This figure illustrates an example of the operation of a receiving circuit in a mobile terminal that receives bit 1 of transmission data with a different microwave frequency for each base station, transmitted from an LTE (WiMAX) station according to the first embodiment of the present invention. [Figure 7]This figure illustrates an example of the operation of receiving data playback using a synchronous counter synchronized with the received data clock, which receives signals that have passed through different wavelength filters for each microfrequency received by the antenna of the first embodiment of the present invention. [Figure 8] This figure illustrates an example of operational amplifier operation in which the maximum voltage time position of the input wavelength amplitude for peak detection of the wavelength amplitude of the microwave receiving circuit of a mobile terminal in the first embodiment of the present invention is set to the point in time when the output signal changes from a negative voltage to a positive voltage by delaying the input signal of the operational amplifier. [Figure 9] This figure illustrates an example of operational amplifier operation in which the maximum voltage time position of the input wavelength amplitude for peak detection of the wavelength amplitude of the microwave receiving circuit of a mobile terminal in the first embodiment of the present invention is set to the point in time when the output signal changes from a negative voltage to a positive voltage by delaying the input signal of the operational amplifier. [Figure 10] A diagram illustrating an example of the operation of two comparators to determine the maximum voltage time position of the input wavelength amplitude for peak detection of the wavelength amplitude of the microwave receiving circuit of a mobile terminal in the first embodiment of the present invention, by delaying the input signal of the comparator so that it becomes the point in time when the output signal changes from a negative voltage to a positive voltage. [Figure 11] This figure illustrates an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data with a different microwave frequency for each base station, transmitted from an LTE (WiMAX) station according to a second embodiment of the present invention. [Figure 12] This figure illustrates an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data with a different microwave frequency for each base station, transmitted from an LTE (WiMAX) station according to a third embodiment of the present invention. [Modes for carrying out the invention]

[0023] A first embodiment of the present invention will be explained with reference to Figures 1, 2, 3, 4, 5, 6, 7, 8, 9, and 10. First, the microwave transmission circuit of the LTE station in Figure 1 of Example 1 will be described. In Figure 1, 215-1 is a digital sine carrier oscillator A, 215-2 is an inverse-phase digital sine carrier oscillator B, 223-3 is a circuit that outputs a high-level signal only between the two positive-phase wavelengths at the front of the four-carrier wavelength frame that transmits data bit 1 and between the four consecutive positive-phase carriers that transmit data bit 0, 223-4 is a circuit that outputs a high-level signal only between the two inverse-phase wavelengths at the rear of the four-carrier wavelength frame that transmits data bit 1, 222-2 is an AND circuit of the high output signal of 223-3 and the multi-level output of circuit 215-1, and 222-4 is the high output signal of 223-4 218 is a high-power emitter-follower npn bipolar transistor, 227 is a coaxial cable that transmits the signal to the antenna, 224 is a clock that is 8 times the carrier frequency, 225 is a 1 / 8 frequency divider, and 226 is the carrier frequency clock. After a guard time, multiple bits 1 are sent, then a delimiter consisting of repeating bits 1 and 0 is sent, and then the data is sent.

[0024] Next, the operation of Figure 1 will be explained. Digital sine wave generation memory circuits A and 215-1 repeatedly generate a single-wavelength digital sine wave. Digital sine wave generation memory circuits B and 215-2 repeatedly generate an inverted-phase digital sine wave. The AND circuit 222-2 sends the multi-level signals of the guard time and the two-wavelength interval of bit 1 and the four-wavelength interval of bit 0, excluding the two inverted-phase intervals of bit 1, to the adder circuit 234. The AND circuit 222-4 sends the multi-level signals of the guard time and the two inverted-phase intervals of bit 1, excluding the two-wavelength interval of bit 1 and the four-wavelength interval of bit 0, to the adder circuit 234. The multi-level adder circuit 234 sends the AC amplitude with the DC component of the bias voltage of transistor 218 added to it to the DA converter 235. The output of the DA converter 235 is directly input to the base of the high-power bipolar transistor 218 and supplied as the emitter output between the transmitting antenna and ground via coaxial cable 227. In some cases, bit 1 of the transmitted data is a signal consisting of three positive-phase wavelengths followed by two negative-phase wavelengths, and bit 0 of the transmitted data is a signal consisting of five positive-phase wavelengths. This operation is the same as in Figure 1.

[0025] Next, we will describe the microwave transmission circuit of the LTE station shown in Figure 2 of Example 1. Figure 2 differs from Figure 1 in that it uses an analog sine carrier generation circuit, whereas Figure 1 uses a digital sine carrier generation circuit. In Figure 3, 520 is a carrier oscillator, 522 and 523 are bipolar NPN transistors, 526 is a coaxial cable that delays the carrier wave by half a wavelength, 528 and 530 are analog switches, 524, 525 and 527 are NMOS transistors, 540 is a high-power bipolar NPN transistor, 141 is a coaxial cable for transmitting the signal to the antenna, 532 is a binary counter that counts up on the rising edge of the output signal of oscillator 520, 533 is a circuit that obtains the differential signals of the rising and falling edges of the output of circuit 532 and outputs a carrier frequency clock, 540 is a signal that switches on analog switch 528 for only the last two out-of-phase wavelengths of the four wavelengths indicating transmit data bit 1, and 541 is a signal that switches on analog switch 530 for only the first two wavelengths of the four wavelengths indicating transmit data bit 1 and for the four wavelength interval of transmit data bit 0.

[0026] Next, the circuit operation of Figure 2 will be explained. The oscillator's output signal is applied to the gate of NMOS524 as an inverted-phase carrier wave delayed by half a wavelength via analog switch 528 and coaxial cable 526. On the other hand, the oscillator's output signal is applied to the gate of NMOS525 as a carrier wave with no delay via analog switch 530. If the gate voltage of NMOS524 is v1 and the gate voltage of NMOS525 is v2, then a current of v1*gm + v2*gm flows through the gate resistor R of NMOS527, so the two signals are added together over time to obtain the gate voltage of NMOS527. When the analog switch is OFF, the ground voltage is applied to the gate through the resistor 150Ω. The bias resistors of NMOS524, 525, and 527 are not shown in the figure. The emitter output of NMOS527 is input to the biased base of the high-power transistor 540, so the output signal is supplied between the antenna and ground.

[0027] Next, Figure 3 shows the receiving circuit for the microwave bit 1 and bit 0 signals transmitted from an LTE or WiMAX base station of a mobile terminal or tablet terminal. In Figure 3, 20 is the antenna, 21 is an NMOS transistor preceded by an LCR resonant filter, 22 is a PMOS transistor, R20, R9, and R10 are resistors, c20 is a capacitor, L20 is an inductance, 28 is another branch signal line, and 102 is the output signal to the peak detection circuit of the drain voltage of PMOS transistor 22.

[0028] The operation shown in Figure 3 is explained below. The carrier wave received by antenna 20 is input to the gate of NMOS transistor 21 as the voltage across capacitor C20 in the resonant state of a carrier frequency resonator composed of L20, R20, and C20. The drain of the 0-bias NMOS transistor 21 is directly connected to the gate of PMOS transistor 22. The drain voltage of the PMOS transistor is as shown in waveform 102 in the figure. The output signal 102 becomes the output signal 102 to the peak detection circuit. A coupling capacitor may be used between the NMOS transistor and the PMOS transistor, but in that case DC balance is required, so a bias voltage must be applied to the NMOS transistor so that the AC signal oscillating up and down through the coupling capacitor can pass through.The drain voltage of the PMOS transistor is as shown in waveform 102 in the figure. In the two-wavelength section of data bit 1 after the guard time, only the positive voltage of the wavelength signal received by the antenna appears with a 90-degree phase delay at capacitor C20 (indicated as Vs1 and Vs2 in the figure). In the following two-wavelength section, since it is an inverted-phase carrier wave, only the latter half of the wavelength appears as a positive signal (indicated as Vr1 and Vr2 in the figure). The positive signal of the second wavelength in inverted phase is delayed by 90 degrees at capacitor C20, resulting in a signal with the latter half of the half-wave missing. This point is unstable because the subsequent positive-phase signal affects the charge of capacitor C20, making peak detection impossible. In relation to this point, Figure 4 shows the precise voltage change diagram of capacitor C20. Figure 4 shows the relationship between the signal 700 received by the antenna and the voltage 701 due to the positive-phase antenna received wavelength signal and the voltage 702 due to the inverted-phase antenna received wavelength signal applied to the gate of NMOS21 of capacitor C20. Point P is the positively convex peak point of capacitor C20, and point P' is the same peak point as P, but the amplitude is attenuated by the LCR filter, making it difficult to confirm the peak. The 1.5 wavelength time indicated by the arrow at 704 is the time difference from the peak point of the positive-sequence signal to the peak point of the negative-sequence signal. 706 indicates the positive-sequence 2-wavelength section, and 707 indicates the negative-sequence (180-degree phase-shifted signal) 2-wavelength section. 703 indicates the bit 1 signal section of the transmitted data, and 708 indicates the transmit data bit 0 signal section. The voltage across capacitor C20 due to the second wavelength signal in the negative-sequence 2-wavelength section peaks (let's call it point Y) 90 degrees later than the antenna-received signal due to the integration effect of the capacitor, and this peak point Y is the boundary point of the second wavelength. For the next positive-sequence signal, the voltage source is positive, but since the voltage at the gate connection point of the NMOS21 capacitor C20 is the same or higher, no current flows through LCR. The charge in capacitor C20 does not flow to the NMOS21 side because the gate of the NMOS21 has high impedance, and the charge does not discharge. Instead, it is further positively charged by the antenna power supply voltage, or its potential is maintained until a negative power supply voltage is applied to capacitor C20.Therefore, peak Y is not reduced and is maintained until the negative power supply voltage is applied to capacitor C20. As a result, the peak detection circuit does not determine point Y to be a peak, but determines it to be a peak at the point where the voltage drops. Since there is no peak point at a point 1.5 wavelengths later than that point, the synchronous counter 45 is not cleared. On the other hand, point 705 is the point where a peak is detected at a time position 1.5 wavelengths later than the peak detection point, and it is a clear signal for all flip-flops of the synchronous counter 45 from the peak detection circuit. 709 indicates that the peak detection circuit clears the counter that outputs a counter value with a 1.5 wavelength delay time each time a peak is detected, and within the signal of transmitted data bit 0, the peak does not occur at the 1.5 wavelength delay position.

[0029] Section (8) in Figure 3 represents the negative current section of the wavelength signal received by the antenna. The maximum voltage position of the peak for each wavelength amplitude is indicated as P in the figure. The clear position (57) of the entire flipflop of the synchronous counter 45 shown in Figure 8 is the position where peak P falls within the time range from (1.5J-5) to (1.5J+6) of the counter value of the output of the 4J counter shown in Figures 8, 9, and 10, at a position (point Vr1 in the figure) that is delayed by 1.5 wavelengths (indicated as δ in the figure) from point P (Vs2), the maximum voltage position of the second wavelength amplitude of the two wavelengths, as shown in (3) in the figure. There is also a peak in the positive-sequence two-wavelength signal 1.5 wavelengths after the peak point of Vr1, but more precisely, as shown in Figure 4, the potential is the same from the previous peak to that peak point.

[0030] Next, Figure 5 shows another example of a receiving circuit for microwave bit 1 and bit 0 signals transmitted from an LTE or WiMAX base station of a mobile or tablet device. In Figure 5, the circuit is the same as in Figure 3 except that a bipolar npn transistor 21 is used instead of the NMOS 21, so the explanation of the operation of parts not related to the npn transistor will be omitted. The difference between the bipolar npn transistor 21 and the NMOS 21 in Figure 3 is that the source input impedance is about 1000Ω, which is lower than the high input impedance of the gate of the NMOS 21. As a result, the charge of capacitor C20 discharges. Consequently, as shown in Figure 6, the potential at peak Y shown in Figure 3 decreases due to the discharge. Consequently, a peak exists at a point 1.5 wavelengths delayed from point Y in Figure 6, which corresponds to point Y in Figure 3. This means that there are two points within bit 1 of the signal that clear all the flip-flops of the synchronous counter 45. Therefore, a circuit is needed to eliminate the signal that clears all the flip-flops of the synchronous counter 45, which occurs within 4 wavelengths of the first point that clears all the flip-flops of the synchronous counter 45.

[0031] Next, Figure 7 shows an example of the operation of a synchronous counter that is clock-synchronized to the wavelength signal of the collector output signal 102 of the PMOS transistor 22 in Figure 3. In Figure 7, 102 is the input signal, 41 is a clock with a carrier frequency f multiplied by J (J=8), 45 is a synchronous counter with a self-propelled counter value of 4J if there is no clear signal, 55 is a peak detection circuit that detects the peak of the maximum voltage value of the input signal wavelength using an operational amplifier, 48 is the output clock (data clock) of the synchronous counter 45 (counter value 4J-2J), 47 is the five bit lines indicating the counter value of the synchronous counter 45, 57 is a signal that clears all flip-flops constituting the synchronous counter, 54 is an 8-bit data clock, 51 is bit 1 or bit 0 of the regenerated data, 52 is a packet data detection circuit, 59 and 60 are AND gates, 61 is an OR gate, 58 is a set-reset flip-flop, 64 is the guard time, 62 is a signal that clears all flip-flops of the synchronous counter 45 and is the signal for received data bit 1, and 63 is a signal that goes high when the counter value of the synchronous counter 45 is (from 4J-5 to 4J+7). The peak detection circuit 55 determines the guard time by observing that the sampling value of the drain voltage of the NMOS22 of the amplified signal of the antenna received signal is at ground voltage for a certain period of time or longer. The guard time is set to a value such that the wavelength signal immediately following the guard time is not affected by fading of about 1 μsec. After the guard time, the first wavelength must identify the beginning of the transmitted data, so either multiple consecutive bits 1 before the delimiter signal containing the wavelength signal, or the first bit 1 of the delimiter, is used. The system clock is an example of a 2.4G J multiplier clock with a frequency of approximately 4G microcarrier. Figure 8 shows an example where the synchronous counter 45 is used for a data signal with a length of 4 wavelengths. Upon guard time detection, the set-reset flip-flop 48 is set, and the output of the AND circuit 59 of the Q output and the synchronous counter 45 clear signal 57 clears all the flip-flops of the synchronous counter 45. After a certain delay, the set-reset flip-flop is reset, and the output of the AND circuit 60 of the Q output NOT signal, the synchronous counter clear signal 57, and the signal 63 which becomes high when the counter value of the synchronous counter 45 is between 4J-5 and 4J+7 clears all the flip-flops of the synchronous counter 45. This is the circuit configuration corresponding to the circuit in Figure 5, which clears the synchronous counter 45 only at the 4J period position.

[0032] The output signal of the synchronous clock-generating asynchronous counter 45 is synchronized with the clock component of the input signal. If counter 45 is configured with a D-type flip-flop that can be cleared, it will count down from 4J-1 with a clock input, but for the sake of simplicity, it is explained as counting up. The circuit in Figure 8 is cleared every time there is a certain wavelength of the input signal at the 4J counter period, so there is no problem even if the mobile terminal moves at very high speeds.

[0033] Unlike OFMDA, Figure 7 has the advantage of high-speed bit transmission because it quickly corrects the phase shift of the synchronization clock caused by the movement of the mobile terminal. Figure 7 considers the effect of fading when a direct wave is present. In Rayleigh fading without a direct wave, if we lock onto the fading with the shortest delay, if the wavelength amplitude of the second fading is added to the wavelength amplitude of the first fading in opposite phase, the signal will disappear and an error will occur. Therefore, when added in opposite phase, interpolation is used for audio and video signals. The system identifies an Ethernet frame from the playback data in Figure 7, reads the base station MAC address from the frame header, and if the MAC address is equal to the MAC address of a neighboring base station advertised by the source base station, the mobile terminal sends the base station MAC address to the source base station as the MAC address of the candidate destination base station.

[0034] Next, Figure 8 shows a detailed operation diagram example of the peak detection circuit 55 in Figure 7. In Figure 8, 102 is the connection point of the drain resistor of the PMOS transistor 22 in Figure 3, and the voltage signal that appears between the drain resistor R10 and ground when a positive-sequence signal is input to the PMOS transistor 22 in Figure 3, R1 of 101 is a resistor that sets the amplification value of the op-amp 100 to -1, 70 is a delay line with a constant delay time, Rh of 71 and 73 is a high resistance that allows the input voltage Vin to pass through the delay line 70 and add Vin / 2 to the positive terminal of the op-amp 100, and 104 is the output of the op-amp 100 at the wavelength of the input signal. When the voltage decreases from its peak maximum value, the output voltage changes from negative to positive, so at that time, a comparator whose output changes from HIGH to LOW, 307 is a differentiating circuit, 310 is a 4*J (J=8) counter, 313 is a set-reset flip-flop set with the counter value of counter 310 of 1.5*J-5 (J=8) (321) and reset with the counter value of 1.5*J+6 (322), 319 is an AND circuit, and 57 is a signal that clears all the flip-flops of the synchronous counter 45 in Figure 7.

[0035] Next, let's explain the operation shown in Figure 8. The input voltage 102 is applied to the positive terminal of the op-amp 100 with a delay of a certain time via the delay line 70. Therefore, if the voltage at the left input point of R1 before the delay line is higher than the voltage before the delay (the current voltage at the positive terminal), the output of op-amp 100 will be a negative differential voltage. Two resistors of the same resistance value Rh apply Vin1 / 2, which is half of the voltage Vin1 before the delay line 70, to the positive input terminal of the op-amp. If the voltage of the input voltage 102 at that time is Vin2, then (Vin1 / 2-Vin2)*1+Vin1 / 2 will appear at the output of op-amp 100. The comparator 104 outputs a signal that changes from HIGH to LOW, which is the inverted signal of the output signal of op-amp 100, indicating the point where the drain voltage of NMOS22 becomes a positive peak, and the output voltage of op-amp 100 changes from negative to positive. The output 331 of the differentiating circuit 307, which differentiates the falling edge signal of the output of comparator 104, clears all the flip-flops of the 4*J counter 310. When the output of the differentiating circuit 307 is within the range of (1.5*J-5) to (1.5*J+6) of the counter value of the 4*J counter 310, the output of the AND circuit 319 becomes high, which is the clear signal 57 for all the flip-flops of the synchronous counter 45 in Figure 7.

[0036] Next, Figure 9 shows a different detailed operation diagram example of the peak detection circuit 55 from Figure 7, distinct from Figure 8. In Figure 9, 78 is an operational amplifier, R2 of 76 and R2 / 3 of 75 are resistors that supply Vin / 2 (1 / 4 of the output voltage of operational amplifier 78, which is twice the input voltage Vin) to the positive terminal of operational amplifier 100, and 77 is a resistor that sets the output voltage of operational amplifier 78 to 2Vin. The operation of Figure 9 is the same as in Figure 8 except for operational amplifier 78, so the explanation is omitted.

[0037] Next, Figure 10 shows a different detailed operation diagram example of the peak detection circuit 55 in Figure 7, distinct from Figures 8 and 9. Figure 10 is an example in which the time position at which the drain voltage of the PMOS transistor 22 in Figure 3 peaks is detected using two comparators and a delay line or delay circuit instead of an operational amplifier. In Figure 10, 301 and 302 are comparators, 300 and 303 are delay circuits, and 304 is an AND gate. The rest are the same as in Figure 8, so the operation explanation of the same parts is omitted.

[0038] Next, the operation of Figure 10 will be explained. The input signal 102 of the drain voltage of the PMOS transistor 22 in Figure 3 is applied to the negative input terminal of comparator 301 and the positive input terminal of comparator 302. The output of the delay circuit 300 is applied to the positive input terminal of comparator 301 and the negative input terminal of comparator 302. Now, if the voltage of the wavelength amplitude value, which is the input signal 102 of the drain voltage of the PMOS transistor 22 in Figure 3, is increasing, the positive input terminal voltage of comparator 302 becomes greater than the negative input terminal voltage, and the output of comparator 302 becomes positive. On the other hand, if the voltage of the wavelength amplitude value, which is the input signal 102 of the drain voltage of the PMOS transistor 22 in Figure 3, is increasing, the positive input terminal voltage of comparator 301 becomes less than the negative input terminal voltage, and the output of comparator 302 becomes negative. When the voltage of the wavelength amplitude value, which is the input signal 102 of the drain voltage of the PMOS transistor 22 in Figure 3, exceeds its peak and is decreasing, the positive input terminal voltage of comparator 301 becomes greater than the negative input terminal voltage, and the output of comparator 301 becomes positive. Therefore, by delaying the output of comparator 302 and applying the positive signals of the two comparators to the AND circuit 304, both signals become high on either side of the peak, so the output of the AND circuit 304 becomes high, and the time position of the peak of the signal wavelength amplitude value can be detected.

[0039] Next, Figure 11 shows the receiving circuit for the microwave bit 1 and bit 0 signals transmitted from the LTE / WiMAX base station of the mobile terminal or tablet terminal in Example 2. The difference from Figure 3 of Example 1 is that the signal for bit 1 of the transmitted data sent from the transmitting side consists of three positive-phase wavelengths followed by two negative-phase wavelengths. Bit 0 of the transmitted data is a five-wavelength positive-phase carrier wave. Figure 11 operates similarly to Figure 3, so its explanation is omitted.

[0040] Next, Figure 12 shows the receiving circuit for the microwave bit 1 and bit 0 signals transmitted from the LTE / WiMAX base station of the mobile terminal or tablet terminal in Example 3. The difference from Figure 3 of Example 1 is that in this example, the signal for bit 1 of the transmitted data sent from the transmitting side consists of three wavelengths of positive phase followed by one wavelength of negative phase, and bit 0 of the transmitted data is a four-wavelength positive-phase carrier wave. In this example, the transistor is replaced with an NMOS transistor, and the antenna received signal is terminated with a resistor, and the voltage of that resistance is input to the base of the npn transistor. In Figure 12, a resistance value that does not lag in phase is used instead of the capacitor C20 in Figure 3, so the waveform of 102 is as shown in Figure 12, which is different from Figure 3. Other operations are the same as in Example 1, so the explanation is omitted. [Explanation of Symbols]

[0041] 215-1 Digital sine carrier oscillator A 215-2 Inverted-Phase Digital Sine Carrier Oscillator B 223-3 A circuit that outputs a high-level output signal only between the two positive-phase wavelengths in the leading position of the four carrier wavelength frame used to transmit data bit 1, and between the four consecutive positive-phase carrier wavelengths used to transmit data bit 0. 223-4 A circuit that outputs a high-level output signal only during the last two out-of-phase wavelengths within the four-carrier wavelength frame used to transmit data bit 1. AND circuit between the high output signal of 222-2 and 223-3 and the multi-level output of circuit 215-1 AND circuit between the high output signal of 222-4 and 223-4 and the multi-level output of the inverted-phase oscillator circuit 215-2 234 Time summing circuit without amplitude summing of two multi-level input signals 235 DA conversion circuit for a multi-level signal of a two-wavelength continuous carrier with the cut-off transmit data bit 1 and a four-wavelength multi-level signal of transmit data bit 0 from the output of a digital sine carrier oscillator A, and the inverse phase of the two-wavelength continuous carrier with the transmit data bit 1. 218 High-power emitter-follower NPN bipolar transistor 227 Coaxial cable that transmits signals to an antenna 224 A clock with a frequency 8 times that of the carrier. 225 1 / 8 frequency divider 226 Carrier frequency clock 20 antennas R20, R9, R10 resistors c20 Capacitor L20 Inductance 28 Other branch signal lines 102 Output signal to the peak detection circuit of the drain voltage of PMOS transistor 22 41. A clock with a carrier frequency f multiplied by J (J=8). 45. Synchronized counter value of the self-propelled 4J if no clear signal is present. 55 Peak detection circuit using an operational amplifier to detect the peak of the maximum voltage value of the input signal wavelength 48 Output clock (data clock) of synchronous counter 45 (counter value 4J-2J) 47 Five bit lines indicating the counter value of the synchronization counter 45 57 A signal to clear all flip-flops that make up the synchronous counter. 54 8-bit data clock 51 Bit 1 or bit 0 of the playback data 52 Packet data detection circuit 59, 60 AND gate 61 OR circuits 58 Set Reset Flip-Flops 64 Guard Time 62 A signal to clear all flip-flops in the synchronous counter 45. 63. A signal that goes high when the counter value of the synchronous counter 45 is between 4J-5 and 4J+7.

Claims

1. A method for receiving data 1 and data 0 signals transmitted by microwave carrier phase modulation from an LTE or WiMAX base station, comprising an oscillator A that generates a microwave sine carrier and an oscillator B that generates an inverse sine carrier, wherein after a guard time, or without a guard time, after L (L: natural number) consecutive wavelengths of the carrier wave from oscillator A, a signal of (m-L) (m: natural number) consecutive wavelengths of the inverse carrier wave from oscillator B is transmitted as bit 1 of the data, and a signal of (m) consecutive wavelengths of the carrier wave from oscillator A is transmitted as bit 0 of the data, and after a delimiter such as a repetition of bits 1 and 0, the transmitted data or a fixed-length frame is transmitted, and the data 1 and data 0 signals are transmitted. A self-operating synchronous counter, which counts up to (m)*J with a clock frequency J times the carrier frequency clock and outputs an output clock at the count value Y, is used when a positively convex voltage peak is detected at bit 1 of the delimiter at the beginning of the first L continuous carrier wavelengths at t1,i, when the output of a one-stage or two-stage amplifier of the microwave received by the antenna, the entire flipflop of the counter that outputs a 1.5 wavelength counter value is cleared. If a positively convex peak of the wavelength amplitude value is present approximately (1.5) wavelengths after the peak detection position, the entire flipflop of the synchronous counter is cleared, the clock of the received data is obtained as the output clock of the synchronous counter, and it is determined that bit 1 of the received data is the first bit. A method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, characterized by having a step of determining that if bit 1 of the received data is not at the output clock position, it is bit 0 of the received data.

2. The method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, as described in claim 1, is characterized in that when a positively convex voltage peak is detected in the amplitude of the wavelengths of the L continuous carriers, the capacitor output signal of the bandpass LCR filter of the signal received by the antenna after the guard time is applied as Vin to the positive input terminal of the operational amplifier, the ground voltage is applied to the negative input terminal of the operational amplifier via resistor R1, and a resistor R2 is used between the negative input terminal and the output of the operational amplifier, and the output voltage of a single-stage amplifier configured to increase R2 / R1 is (Vin-0v) * R2 / R1 + Vin, and the voltage of the signal obtained by delaying the signal, which is initially simply the amplitude value of the first L wavelength signals, by a delay line or delay circuit for a certain period of time, changes from a state where the voltage of the signal is lower than the voltage of the signal before the delay line or delay circuit to a state where it is higher than the voltage of the signal before the delay line or delay circuit, after the guard time, and this occurs at the position t1,i (i: current position).

3. When detecting a positive voltage peak in the amplitude of the wavelength of the L continuous carrier waves, the first stage amplifier of the zero bias voltage of the input signal inversion, which is either pre-filtered with a carrier frequency filter, a low-pass filter, or a high-pass filter, or left as is, is used to invert the input signal of the signal received by the antenna after the guard time. In each case, a resistor and a capacitor are connected in parallel to ground at the emitter, a resistor and a capacitor are connected in parallel to the positive power supply at the collector, a resistor and a capacitor are connected in parallel to ground at the emitter, and a resistor and a capacitor are connected in parallel to the positive power supply at the collector. The collector output of an NPN transistor is then used. A method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, as described in claim 1, characterized in that the second stage amplifier is simply directly connected to the base of a PNP transistor, the collector of the PNP transistor is connected to earth via a collector resistor, and the voltage at the collector connection point changes from a state where the voltage of the signal obtained by delaying the amplitude values ​​of the first L wavelength signals by a delay line or delay circuit for a certain period of time after a guard time is lower than the voltage of the signal before the delay line or delay circuit, to a state where it is higher than the position of the signal before the delay line or delay circuit, which is the position of t1,i.

4. The method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station according to claim 1, characterized in that when detecting a positive voltage peak in the amplitude of the wavelengths of the L continuous carrier waves, a resistor and a capacitor are connected in parallel between the emitter of the first-stage amplifier to ground, the input signal inversion of the signal received by the antenna after the guard time, and the collector output of an NPN transistor, which has a resistor and a capacitor connected in parallel between the collector to the positive power supply, is directly connected to the base of a PNP transistor of the second-stage amplifier, the collector of the PNP transistor is connected to ground via a collector resistor, and the voltage at the collector connection point is at the position t1,i (i: current position) when the voltage of the signal obtained by delaying the signal obtained by delaying the amplitude values ​​of the initial L wavelength signals by a delay line or delay circuit for a certain period of time after the guard time changes from a state where it is lower to a state where it is higher than the voltage of the signal before the delay line or delay circuit.

5. The method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, as described in claim 1, is characterized in that when detecting a positive voltage peak in the amplitude of the L-th wavelength of the L continuous carrier waves, the voltage of the LCR capacitor grounded to the ground of the LCR resonator of the signal received by the antenna after the guard time is applied to the gate of the NMOS of the first-stage amplifier with a 0 bias voltage, the drain output of the NMOS is directly connected to the gate of the PMOS of the second-stage amplifier, the drain of the PMOS transistor is connected to ground via a drain resistor, and the voltage at the drain connection point is at the position t1,i (i: current position) when the voltage of the signal obtained by delaying the signal obtained by delaying the amplitude values ​​of the first L wavelength signals by a delay line or delay circuit for a certain period of time after the guard time changes from a state where it is lower than the voltage of the signal before the delay line or delay circuit.

6. The method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, as described in claim 1, is characterized in that when a positive voltage peak of the amplitude of the L-th wavelength of the L continuous carrier waves is detected, the voltage of the LCR capacitor grounded to the ground of the LCR resonator of the signal received by the antenna after the guard time is added to the source of the npn transistor of the first-stage amplifier with a 0 bias voltage, the collector output of the npn transistor is directly connected to the gate of the PMOS of the second-stage amplifier, the drain of the PMOS transistor is connected to ground via a drain resistor, and the voltage at the drain connection point is at the position t1,i (i: current position) when the voltage of the signal obtained by delaying the signal obtained by delaying the amplitude values ​​of the first L wavelength signals by a delay line or delay circuit for a certain period of time after the guard time changes from a state where it is lower to a state where it is higher than the voltage of the signal before the delay line or delay circuit.

7. A method for synchronizing the clock of a mobile terminal's receiving circuit with data 1 and data 0 signals transmitted from an LTE / WiMAX base station by microwave carrier phase modulation, comprising an oscillator A that generates a microwave sine carrier wave and an oscillator B that generates an inverse sine carrier wave, wherein after a guard time, after L (L: natural number) consecutive wavelengths of the carrier wave from oscillator A, a signal of (m-L) (m: natural number) consecutive wavelengths of the inverse carrier wave from oscillator B is transmitted as bit 1 of the data, and a signal of (m) consecutive wavelengths of the carrier wave from oscillator A is transmitted as bit 0 of the data, and after a delimiter in which bits 1 and 0 are repeated, the transmitted data is transmitted as data 1 and data 0 signals transmitted by microwave carrier phase modulation from an LTE / WiMAX base station. A method for synchronizing the clock of data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, characterized in that a synchronous counter that operates autonomously when there is no clear signal input, counts up to (m)*J with a clock that is J times the carrier frequency clock and outputs an output clock at the count value Y, and when a positively convex voltage peak of the amplitude of the wavelength of the L continuous carriers at the output of a one-stage or two-stage amplifier of microwaves received by an antenna is detected at t1,i, a positively convex peak of the wavelength amplitude value is cleared approximately 1.5 wavelengths after the peak detection position if there is a peak of positively convex wavelength amplitude value, thereby obtaining the clock of the received data as the output clock and determining that it is bit 1 of the received data.

8. The method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, as described in claim 1, characterized in that the counter value Y of the output clock output at the aforementioned counter value Y is ((m*J-2*J).

9. The method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, as described in claim 1, characterized in that J is 8. 。

10. A method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, as described in claim 1, characterized in that m is 4 and L is 2.

11. A method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, as described in claim 1, characterized in that L is 3 and m is 4 or 5.

12. The method for synchronizing the clock of data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, as described in claim 7, characterized in that the counter value Y of the output clock output with the aforementioned counter value Y is ((m*J-2*J).

13. The method for synchronizing the clock of data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, as described in claim 7, wherein J is 8. 。

14. A method for synchronizing the clock of data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, as described in claim 7, characterized in that m is 4 and L is 2.

15. A method for synchronizing the clock of data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier phase modulation, as described in claim 7, characterized in that L is 3 and m is 4 or 5.

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