Battery pack and control method

Abstract

Obtain a battery pack that can improve its lifespan. [Solution] A battery pack according to one embodiment of the present disclosure comprises a plurality of first battery cell units connected in series, a plurality of second battery cell units the same number as the plurality of first battery cell units, a plurality of switch circuits capable of selectively connecting each of the plurality of second battery cell units to a different battery cell unit among the plurality of first battery cell units, and a control circuit capable of calculating the degree of degradation of each of the plurality of first battery cell units and the plurality of second battery cell units, and controlling the operation of the plurality of switch circuits based on the calculation results. The control circuit can control the operation of the plurality of switch circuits so as to connect the battery cell unit with the greatest degree of degradation among the plurality of second battery cell units to a battery cell unit among the plurality of first battery cell units other than the battery cell unit with the greatest degree of degradation.

Description

Technical Field

[0001] The present disclosure relates to a battery pack including a storage battery and a method for controlling such a battery pack.

Background Art

[0002] A battery pack is provided with a plurality of battery cells. For example, Patent Document 1 discloses a battery pack capable of disconnecting a series module including a battery cell in which an abnormality has occurred when an abnormality occurs in one of the plurality of battery cells.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, in some battery packs, when the battery cells are deteriorated to a certain extent, the subsequent use of the battery pack is restricted. Therefore, it is desirable that the battery pack can improve its lifespan by extending the period of available use.

[0005] It is desirable to provide a battery pack and a control method capable of improving the lifespan.

Means for Solving the Problems

[0006] A battery pack in one embodiment of the present disclosure comprises a plurality of first battery cell units, a plurality of second battery cell units, a plurality of switch circuits, and a control circuit. The plurality of first battery cell units are connected in series. Each of the plurality of first battery cell units contains a battery cell. The number of the plurality of second battery cell units is the same as the number of the plurality of first battery cell units. Each of the plurality of second battery cell units contains a battery cell. The plurality of switch circuits are provided corresponding to each of the plurality of second battery cell units, and each of the plurality of second battery cell units can be selectively connected to a different battery cell unit from among the plurality of first battery cell units. The control circuit can monitor the state of the plurality of first battery cell units and the state of the plurality of second battery cell units, calculate the degree of degradation of each of the plurality of first battery cell units and the plurality of second battery cell units based on the monitoring results, and control the operation of the plurality of switch circuits based on the calculation results. The control circuit can control the operation of multiple switch circuits so that the battery cell unit with the greatest degree of degradation among multiple second battery cell units is connected to the battery cell units other than the battery cell unit with the greatest degree of degradation among multiple first battery cell units.

[0007] A control method in one embodiment of the present disclosure includes monitoring the state of a plurality of first battery cell units and a plurality of second battery cell units in a battery pack having a plurality of first battery cell units, each containing a battery cell and connected in series; a plurality of second battery cell units, each containing a battery cell and in the same number as the plurality of first battery cell units; and a plurality of switch circuits provided corresponding to each of the plurality of second battery cell units, which can selectively connect each of the plurality of second battery cell units to a different battery cell unit among the plurality of first battery cell units; calculating the degree of degradation of each of the plurality of first battery cell units and the plurality of second battery cell units based on the monitoring results; and controlling the operation of the plurality of switch circuits so that the battery cell unit with the greatest degree of degradation among the plurality of second battery cell units is connected to a battery cell unit among the plurality of first battery cell units other than the battery cell unit with the greatest degree of degradation.

[0008] According to one embodiment of the battery pack and control method of this disclosure, the lifespan can be improved. [Brief explanation of the drawing]

[0009] [Figure 1] Figure 1 is a block diagram showing an example configuration of a battery pack according to one embodiment of the present disclosure. [Figure 2] Figure 2 is a circuit diagram showing one example configuration of the switch circuit shown in Figure 1. [Figure 3] Figure 3 is a table illustrating one example of operation of the switch circuit shown in Figure 2. [Figure 4A] Figure 4A is an explanatory diagram illustrating one of the operating states of the battery pack shown in Figure 1. [Figure 4B] Figure 4B is an explanatory diagram illustrating another operating state of the battery pack shown in Figure 1. [Figure 5] Figure 5 is a flowchart illustrating one example of the operation of the battery pack shown in Figure 1. [Figure 6]Figure 6 is an explanatory diagram illustrating another operating state of the battery pack shown in Figure 1. [Figure 7A] Figure 7A is a table showing an example of the degree of degradation of multiple battery cells shown in Figure 1. [Figure 7B] Figure 7B is a table showing another example of the degree of degradation of the multiple battery cells shown in Figure 1. [Figure 8] Figure 8 is a block diagram showing one example configuration of a modified battery pack. [Figure 9] Figure 9 is a block diagram showing one example configuration of a battery pack related to another modification. [Figure 10] Figure 10 is a block diagram showing one example configuration of a battery pack related to another modification. [Figure 11] Figure 11 is a block diagram showing one example configuration of a battery pack related to another modification. [Figure 12] Figure 12 is a flowchart illustrating one example of the operation of the battery pack shown in Figure 11. [Modes for carrying out the invention]

[0010] The embodiments of this disclosure will be described in detail below with reference to the drawings.

[0011] <Embodiment> [Example Configuration] Figure 1 shows an example configuration of a battery pack (battery pack 1) according to one embodiment. Battery pack 1 includes a positive terminal TP, a negative terminal TN, four battery cells BA (battery cells BA1 to BA4), four battery cells BB (battery cells BB1 to BB4), four switch circuits SW (switch circuits SW1 to SW4), transistors CFET and DFET, a resistor element 11, and a control circuit 12.

[0012] The positive terminal TP and the negative terminal TN are configured to exchange power between the battery pack 1 and the device to which the battery pack 1 is installed.

[0013] Four battery cells BA (battery cells BA1 to BA4) are provided in a path connecting the positive terminal TP and the negative terminal TN and are configured to store electric power. Each of the four battery cells BA is configured using a lithium-ion secondary battery in this example. The positive electrode of battery cell BA1 is connected to node N0, and the negative electrode is connected to node N1. The positive electrode of battery cell BA2 is connected to node N1, and the negative electrode is connected to node N2. The positive electrode of battery cell BA3 is connected to node N2, and the negative electrode is connected to node N3. The positive electrode of battery cell BA4 is connected to node N3, and the negative electrode is connected to node N4. The battery cells BA constitute a battery cell unit UA. Specifically, battery cell BA1 constitutes battery cell unit UA1, battery cell BA2 constitutes battery cell unit UA2, battery cell BA3 constitutes battery cell unit UA3, and battery cell BA4 constitutes battery cell unit UA4.

[0014] Four battery cells BB (battery cells BB1 to BB4) are configured to store electric power. Each of the four battery cells BB is configured using a lithium-ion secondary battery in the same manner as the battery cells BA in this example. Battery cell BB1 is connected in parallel to any one of the four battery cells BA via a switch circuit SW1. Battery cell BB2 is connected in parallel to any one of the four battery cells BA via a switch circuit SW2. Battery cell BB3 is connected in parallel to any one of the four battery cells BA via a switch circuit SW3. Battery cell BB4 is connected in parallel to any one of the four battery cells BA via a switch circuit SW4. Each of these four battery cells BB is configured to be connected in parallel to a different one of the four battery cells BA. The battery cells BB constitute a battery cell unit UB. Specifically, battery cell BB1 constitutes battery cell unit UB1, battery cell BB2 constitutes battery cell unit UB2, battery cell BB3 constitutes battery cell unit UB3, and battery cell BB4 constitutes battery cell unit UB4.

[0015] The four switch circuits SW (switch circuits SW1 to SW4) are provided corresponding to the four battery cells BB respectively, and are configured to connect each of the four battery cells BB in parallel to different battery cells BA among the four battery cells BA based on the control signals CTL1 to CTL4 supplied from the control circuit 12. The switch circuit SW1 is configured to connect the battery cell BB1 in parallel to any one of the four battery cells BA1 to BA4 based on the control signal CTL1. The switch circuit SW2 is configured to connect the battery cell BB2 in parallel to any one of the four battery cells BA1 to BA4 based on the control signal CTL2. The switch circuit SW3 is configured to connect the battery cell BB3 in parallel to any one of the four battery cells BA1 to BA4 based on the control signal CTL3. The switch circuit SW4 is configured to connect the battery cell BB4 in parallel to any one of the four battery cells BA1 to BA4 based on the control signal CTL4.

[0016] Each of the four switch circuits SW has switches SWA and SWB. For example, the switch SWA of the switch circuit SW1 connects the positive electrode of the battery cell BB1 to any one of the nodes N0 to N3, and the switch SWB connects the negative electrode of the battery cell BB1 to any one of the nodes N1 to N4.

[0017] FIG. 2 shows a configuration example of the switch circuit SW1. In FIG. 2, for convenience of explanation, the battery cell BB1 is also illustrated. The control signal CTL1 includes four control signals CTLA to CTLD.

[0018] Switch SWA includes four switches SWA0, SWA1, SWA2, and SWA3. Each of these four switches SWA0, SWA1, SWA2, and SWA3 may be constructed using, for example, a transistor, a photoMOS relay, or a mechanical relay. Switch SWA0 is switched on and off based on the control signal CTLA, with one end connected to node N0 and the other end connected to the positive terminal of battery cell BB1. Switch SWA1 is switched on and off based on the control signal CTLB, with one end connected to node N1 and the other end connected to the positive terminal of battery cell BB1. Switch SWA2 is switched on and off based on the control signal CTLC, with one end connected to node N2 and the other end connected to the positive terminal of battery cell BB1. Switch SWA3 is switched on and off based on the control signal CTLD, with one end connected to node N3 and the other end connected to the positive terminal of battery cell BB1.

[0019] Switch SWB, like switch SWA, includes four switches SWB1, SWB2, SWB3, and SWB4. Switch SWB1 is switched on and off based on the control signal CTLA, with one end connected to node N1 and the other end connected to the negative terminal of battery cell BB1. Switch SWB2 is switched on and off based on the control signal CTLB, with one end connected to node N2 and the other end connected to the negative terminal of battery cell BB1. Switch SWB3 is switched on and off based on the control signal CTLC, with one end connected to node N3 and the other end connected to the negative terminal of battery cell BB1. Switch SWB4 is switched on and off based on the control signal CTLD, with one end connected to node N4 and the other end connected to the negative terminal of battery cell BB1.

[0020] Figure 3 shows an example of the operation of switch circuit SW1. In this example, switches SWA0 and SWB1 are turned on when the control signal CTLA is at a high level (H), and turned off when the control signal CTLA is at a low level (L). The same applies to switches SWA1 and SWB2, switches SWA2 and SWB3, and switches SWA3 and SWB4.

[0021] For example, if the control signal CTLA is at a high level and the control signals CTLB~CTLD are at a low level, switches SWA0 and SWB1 will be turned on, and switches SWA1, SWA2, SWA3, SWB2, SWB3, and SWB4 will be turned off. As a result, the positive terminal of battery cell BB1 will be connected to node N0, and the negative terminal of battery cell BB1 will be connected to node N1. Consequently, battery cell BB1 will be connected in parallel with battery cell BA1.

[0022] For example, if the control signal CTLB is at a high level and the control signals CTLA, CTLC, and CTLD are at a low level, switches SWA1 and SWB2 will be turned on, and switches SWA0, SWA2, SWA3, SWB1, SWB3, and SWB4 will be turned off. As a result, the positive terminal of battery cell BB1 will be connected to node N1, and the negative terminal of battery cell BB1 will be connected to node N2. Consequently, battery cell BB1 will be connected in parallel with battery cell BA2.

[0023] For example, if the control signal CTLC is at a high level and the control signals CTLA, CTLB, and CTLD are at a low level, switches SWA2 and SWB3 will be turned on, and switches SWA0, SWA1, SWA3, SWB1, SWB2, and SWB4 will be turned off. As a result, the positive terminal of battery cell BB1 will be connected to node N2, and the negative terminal of battery cell BB1 will be connected to node N3. Consequently, battery cell BB1 will be connected in parallel with battery cell BA3.

[0024] For example, if the control signal CTLD is at a high level and the control signals CTLA, CTLB, and CTLC are at a low level, switches SWA3 and SWB4 will be turned on, and switches SWA0, SWA1, SWA2, SWB1, SWB2, and SWB3 will be turned off. As a result, the positive terminal of battery cell BB1 will be connected to node N3, and the negative terminal of battery cell BB1 will be connected to node N4. Consequently, battery cell BB1 will be connected in parallel with battery cell BA4.

[0025] Furthermore, for example, if all control signals CTLA~CTLD are at a low level, all switches SWA0~SWA3 and SWB1~SWB4 will be turned off. As a result, battery cell BB1 is disconnected from battery cells BA1~BA4.

[0026] The above explanation used switch circuit SW1 as an example, but the same principles apply to switch circuits SW2 to SW4.

[0027] The transistor CFET (Figure 1) is an N-channel field-effect transistor configured to be switchable on and off based on a control signal supplied from the control circuit 12. The drain of the transistor CFET is connected to the drain of the transistor DFET, the source is connected to node N0, and the gate is to which the control signal supplied from the control circuit 12 is applied. The transistor CFET has a body diode, as shown in Figure 1. The anode of this body diode is connected to the source of the body of the transistor CFET, and the cathode is connected to the drain of the body of the transistor CFET. The transistor CFET is turned off based on the control signal supplied from the control circuit 12, for example, when the battery pack 1 should not be charged or when a malfunction occurs in the battery pack 1 and it should be permanently unusable thereafter. In this way, the transistor CFET is configured to interrupt the charging current in the battery pack 1.

[0028] The DFET transistor is an N-channel field-effect transistor configured to be switchable on and off based on a control signal supplied from the control circuit 12. The drain of the DFET transistor is connected to the drain of the CFET transistor, the source is connected to the positive terminal TP of the battery pack 1, and the gate is to which the control signal supplied from the control circuit 12 is applied. The DFET transistor, like the CFET transistor, has a body diode, as shown in Figure 1. The DFET transistor is turned off based on the control signal supplied from the control circuit 12, for example, when the battery pack 1 should not be discharged or when a malfunction occurs in the battery pack 1 and it should be permanently unusable thereafter. In this way, the DFET transistor is configured to interrupt the discharge current in the battery pack 1.

[0029] One end of the resistor 11 is connected to node N4, and the other end is connected to the negative terminal TN of the battery pack 1. A voltage difference corresponding to the current flowing through the battery pack 1 is generated across the ends of the resistor 11. This resistor 11 is used to detect the current flowing through the battery pack 1.

[0030] The control circuit 12 is configured to monitor the state of the battery pack 1 and to control its operation. The control circuit 12 includes, for example, a microcontroller.

[0031] The control circuit 12 detects cell voltages VA1 to VA4 based on the voltages at nodes N0 to N4. Cell voltage VA1 is the voltage at node N0 relative to the voltage at node N1. Cell voltage VA2 is the voltage at node N1 relative to the voltage at node N2. Cell voltage VA3 is the voltage at node N2 relative to the voltage at node N3. Cell voltage VA4 is the voltage at node N3 relative to the voltage at node N4. The control circuit 12 also detects the current flowing through the battery pack 1 based on the voltage difference across the resistor element 11. The control circuit 12 is configured to monitor the state of the battery pack 1 based on these detection results.

[0032] Furthermore, the control circuit 12 calculates the impedance of each battery cell BA1-BA4 and BB1-BB4, for example during charging, and calculates the degree of degradation of each battery cell BA1-BA4 and BB1-BB4 based on these impedances. In other words, as a storage battery degrades, its impedance generally increases. Therefore, the control circuit 12 calculates the degree of degradation of each battery cell BA1-BA4 and BB1-BB4 based on their respective impedances. The control circuit 12 then controls the operation of the switch circuits SW1-SW4 based on these calculated degrees of degradation. Specifically, the control circuit 12 controls the operation of the switch circuits SW1-SW4 so that the battery cell BB with the greatest degree of degradation among the battery cells BB1-BB4 is connected to the battery cells BA other than the battery cell BA with the greatest degree of degradation among the battery cells BA1-BA4.

[0033] Figures 4A and 4B illustrate an example of the operation of battery pack 1. In Figures 4A and 4B, (A) shows the state of switch circuits SW1 to SW4, and (B) schematically shows the connection relationship between battery cells BA1 to BA4 and battery cells BB1 to BB4. In Figures 4A(B) and 4B(B), switch circuits SW1 to SW4 are shown in a simplified form.

[0034] For example, in the example shown in Figure 4A, battery cells BA1 and BB1 are connected in parallel to each other, battery cells BA2 and BB2 are connected in parallel to each other, battery cells BA3 and BB3 are connected in parallel to each other, and battery cells BA4 and BB4 are connected in parallel to each other. In this case, battery cells BA1 and BB1 constitute cell block BL1, battery cells BA2 and BB2 constitute cell block BL2, battery cells BA3 and BB3 constitute cell block BL3, and battery cells BA4 and BB4 constitute cell block BL4.

[0035] For example, if the battery cells BA2 and BB2 that make up cell block BL2 deteriorate, the impedances RA1 to RA4 of battery cells BA1 to BA4 and the impedances RB1 to RB4 of battery cells BB1 to BB4 may have the following relationship. RA2 > RA3 ≈ RA4 > RA1 RB2 > RB3 ≈ RB4 > RB1

[0036] In this case, as shown in Figure 4B, the control circuit 12 controls the operation of switch circuits SW1 to SW4 so that battery cell BA2, which has the highest impedance among battery cells BA1 to BA4, is connected to battery cell BB1, which has the lowest impedance among battery cells BB1 to BB4, and battery cell BB2, which has the highest impedance among battery cells BB1 to BB4, is connected to battery cell BA1, which has the lowest impedance among battery cells BA1 to BA4.

[0037] Therefore, in the example shown in Figure 4B, battery cells BA1 and BB2 are connected in parallel to each other, and battery cells BA2 and BB1 are connected in parallel to each other. That is, battery cells BA1 and BB2 constitute cell block BL1, and battery cells BA2 and BB1 constitute cell block BL2. As a result, in battery pack 1, the degree of degradation can be equalized using cell block BL as the unit.

[0038] Furthermore, the control circuit 12 monitors whether the cell voltages VA1 to VA4 are approximately the same. If the cell voltages VA1 to VA4 are unbalanced, overcharging or over-discharging may occur in battery cells BA1 to BA4 and BB1 to BB4. Therefore, if the cell voltages VA1 to VA4 are unbalanced, the control circuit 12 fixes the transistors CFET and DFET to the off state. This causes the battery pack 1 to become unusable thereafter.

[0039] In this way, battery pack 1 can equalize the degree of degradation using cell block BL as the unit. This improves the balance of cell voltages VA1 to VA4. As a result, battery pack 1 can extend its usable period, thus improving its lifespan.

[0040] Here, battery cell units UA1 to UA4 correspond to one specific example of the "multiple first battery cell units" in this disclosure. Battery cell units UB1 to UB4 correspond to one specific example of the "multiple second battery cell units" in this disclosure. Battery cells BA1 to BA4 and BB1 to BB4 each correspond to one specific example of the "battery cell" in this disclosure. Switch circuits SW1 to SW4 correspond to one specific example of the "multiple switch circuits" in this disclosure. Control circuit 12 corresponds to one specific example of the "control circuit" in this disclosure. Cell block BL corresponds to one specific example of the "cell block" in this disclosure. Switch SWA corresponds to one specific example of the "first switch" in this disclosure. Switch SWB corresponds to one specific example of the "second switch" in this disclosure.

[0041] [Action and function] Next, the operation and function of the battery pack 1 of this embodiment will be described.

[0042] (Overview of overall operation) First, with reference to Figure 1, the overall operation of battery pack 1 will be explained. Four battery cells BA and four battery cells BB store power. Four switch circuits SW connect each of the four battery cells BB in parallel to a different battery cell BA from the four battery cells BA, based on control signals CTL1 to CTL4 supplied from control circuit 12. Transistor CFET is switched on and off based on control signals supplied from control circuit 12. Transistor DFET is switched on and off based on control signals supplied from control circuit 12. Control circuit 12 monitors the cell voltages VA1 to VA4 and the current flowing through battery pack 1. Control circuit 12 also calculates the degree of degradation of each of the battery cells BA1 to BA4 and BB1 to BB4, and controls the operation of switch circuits SW1 to SW4 based on these degradation levels. Control circuit 12 also monitors whether the cell voltages VA1 to VA4 are approximately the same.

[0043] (Detailed operation) Figure 5 shows an example of the operation of battery pack 1. Battery pack 1 periodically performs the following process. By performing this process, in this example, battery pack 1 equalizes the degree of degradation in units of cell block BL each time charging is started.

[0044] In this example, as shown in Figure 4A, in battery pack 1, battery cells BA1 and BB1 are connected in parallel to each other, battery cells BA2 and BB2 are connected in parallel to each other, battery cells BA3 and BB3 are connected in parallel to each other, and battery cells BA4 and BB4 are connected in parallel to each other. That is, battery cells BA1 and BB1 constitute cell block BL1, battery cells BA2 and BB2 constitute cell block BL2, battery cells BA3 and BB3 constitute cell block BL3, and battery cells BA4 and BB4 constitute cell block BL4.

[0045] First, the control circuit 12 checks whether charging has started (step S101). When charging starts, current flows from the positive terminal TP to the negative terminal TN. A voltage difference corresponding to the charging current is generated across the resistor element 11. The control circuit 12 checks whether charging has started based on this voltage difference across the resistor element 11. If charging has not yet started ("N" in step S101), this process ends.

[0046] In step S101, if charging is initiated ("Y" in step S101), the control circuit 12 detects the cell voltage and charging current of cell blocks BL1 to BL4 (step S102). Battery cells BA1 to BA4 and BB1 to BB4 are connected as shown in Figure 4A. Therefore, cell voltage VA1 is the voltage of cell block BL1 consisting of battery cells BA1 and BB1 connected in parallel, cell voltage VA2 is the voltage of cell block BL2 consisting of battery cells BA2 and BB2 connected in parallel, cell voltage VA3 is the voltage of cell block BL3 consisting of battery cells BA3 and BB3 connected in parallel, and cell voltage VA4 is the voltage of cell block BL4 consisting of battery cells BA4 and BB4 connected in parallel. Therefore, the control circuit 12 detects the cell voltages of cell blocks BL1 to BL4 by detecting cell voltages VA1 to VA4.

[0047] Next, the control circuit 12 calculates the impedances R1 to R4 of cell blocks BL1 to BL4 (step S103). Specifically, the control circuit 12 calculates impedance R1 by dividing the cell voltage of cell block BL1, detected in step S102, by the charging current, also detected in step S102. Impedance R1 is the combined impedance of battery cells BA1 and BB1 connected in parallel. Similarly, the control circuit 12 calculates impedance R2 by dividing the cell voltage of cell block BL2 by the charging current. Impedance R2 is the combined impedance of battery cells BA2 and BB2 connected in parallel. The control circuit 12 calculates impedance R3 by dividing the cell voltage of cell block BL3 by the charging current. Impedance R3 is the combined impedance of battery cells BA3 and BB3 connected in parallel. The control circuit 12 calculates impedance R4 by dividing the cell voltage of cell block BL4 by the charging current. Impedance R4 is the combined impedance of battery cells BA4 and BB4 connected in parallel.

[0048] Next, the control circuit 12 turns off the switch circuits SW1 to SW4 (step S104).

[0049] Figure 6 shows the states of switch circuits SW1 to SW4. Switch circuit SW1 disconnects battery cell BB1 from battery cells BA1 to BA4, switch circuit SW2 disconnects battery cell BB2 from battery cells BA1 to BA4, switch circuit SW3 disconnects battery cell BB3 from battery cells BA1 to BA4, and switch circuit SW4 disconnects battery cell BB4 from battery cells BA1 to BA4.

[0050] Next, the control circuit 12 detects the cell voltage and charging current of battery cells BA1 to BA4 (step S105). As shown in Figure 6, each of the battery cells BB1 to BB4 is isolated from the battery cells BA1 to BA4. Therefore, cell voltage VA1 is the voltage of battery cell BA1, cell voltage VA2 is the voltage of battery cell BA2, cell voltage VA3 is the voltage of battery cell BA3, and cell voltage VA4 is the voltage of battery cell BA4. Thus, the control circuit 12 detects the cell voltages of battery cells BA1 to BA4 by detecting cell voltages VA1 to VA4.

[0051] Next, the control circuit 12 calculates the impedances RA1 to RA4 of battery cells BA1 to BA4 (step S106). Specifically, the control circuit 12 calculates the impedance RA1 of battery cell BA1 by dividing the cell voltage of battery cell BA1, which was detected in step S105, by the charging current, which was also detected in step S105. Similarly, the control circuit 12 calculates the impedance RA2 of battery cell BA2 by dividing the cell voltage of battery cell BA2 by the charging current. The control circuit 12 calculates the impedance RA3 of battery cell BA3 by dividing the cell voltage of battery cell BA3 by the charging current. The control circuit 12 calculates the impedance RA4 of battery cell BA4 by dividing the cell voltage of battery cell BA4 by the charging current.

[0052] Next, the control circuit 12 calculates the impedances RB1 to RB4 of battery cells BB1 to BB4 based on the impedances R1 to R4 obtained in step S103 and the impedances RA1 to RA4 obtained in step S106 (step S107). For example, the impedance R1 obtained in step S103 is the combined impedance of battery cells BA1 and BB1 connected in parallel. Also, the impedance RA1 obtained in step S106 is the impedance of battery cell BA1. Therefore, the impedance RB1 of battery cell BB1 can be calculated using the following formula. RB1 = R1 × RA1 / (RA1 - R1) The same applies to the impedance RB2 of battery cell BB2, the impedance RB3 of battery cell BB3, and the impedance RB4 of battery cell BB4.

[0053] Next, the control circuit 12 calculates the degree of degradation of each battery cell BA1-BA4 and BB1-BB4 based on the impedances RA1-RA4 obtained in step S106 and the impedances RB1-RB4 obtained in step S107 (step S108). The degradation value increases as the degradation progresses. In this example, the degree of degradation is proportional to the impedance.

[0054] Figure 7A shows an example of the degradation levels of battery cells BA1-BA4 and BB1-BB4. As shown in Figure 4A, cell block BL1 contains battery cells BA1 and BB1, cell block BL2 contains battery cells BA2 and BB2, cell block BL3 contains battery cells BA3 and BB3, and cell block BL4 contains battery cells BA4 and BB4. In this example, the degradation level of battery cell BA1 is 10, the degradation level of battery cell BA2 is 30, the degradation level of battery cell BA3 is 20, and the degradation level of battery cell BA4 is 20. Also, the degradation level of battery cell BB1 is 10, the degradation level of battery cell BB2 is 30, the degradation level of battery cell BB3 is 20, and the degradation level of battery cell BB4 is 20.

[0055] Figure 7A also shows the degree of degradation obtained based on the combined impedance. These degrees of degradation can be calculated, for example, based on the impedances R1 to R4 obtained in step S103. The degree of degradation of cell block BL1, consisting of battery cells BA1 and BB1, is 5 (=10 × 10 / (10 + 10)), the degree of degradation of cell block BL2, consisting of battery cells BA2 and BB2, is 15 (=30 × 30 / (30 + 30)), the degree of degradation of cell block BL3, consisting of battery cells BA3 and BB3, is 10 (=20 × 20 / (20 + 20)), and the degree of degradation of cell block BL4, consisting of battery cells BA4 and BB4, is 10 (=20 × 20 / (20 + 20)).

[0056] Next, the control circuit 12 controls the operation of switch circuits SW1 to SW4 so that the degree of degradation is equalized using cell block BL as a unit (step S109). Specifically, the control circuit 12 controls the operation of switch circuits SW1 to SW4 so that the battery cell BB with the greatest degree of degradation among battery cells BB1 to BB4 is connected to the battery cell BA with the least degree of degradation among battery cells BA1 to BA4. The control circuit 12 also controls the operation of switch circuits SW1 to SW4 so that the battery cell BB with the second greatest degree of degradation among battery cells BB1 to BB4 is connected to the battery cell BA with the second least degree of degradation among battery cells BA1 to BA4. Furthermore, the control circuit 12 controls the operation of switch circuits SW1 to SW4 so that the battery cell BA with the third greatest degree of degradation among battery cells BB1 to BB4 is connected to the battery cell BA with the third least degree of degradation among battery cells BA1 to BA4. Furthermore, the control circuit 12 controls the operation of switch circuits SW1 to SW4 so that battery cell BB, which has the least degree of degradation among battery cells BB1 to BB4, is connected to battery cell BA, which has the most degree of degradation among battery cells BA1 to BA4.

[0057] In the example shown in Figure 7A, among the degradation levels of battery cells BB1 to BB4, battery cell BB2 has the greatest degradation, and among the degradation levels of battery cells BA1 to BA4, battery cell BA1 has the least degradation. Also, among the degradation levels of battery cells BB1 to BB4, battery cell BB1 has the least degradation, and among the degradation levels of battery cells BA1 to BA4, battery cell BA2 has the greatest degradation. Therefore, the control circuit 12 controls the operation of switch circuits SW1 to SW4 to connect battery cell BB1 to battery cell BA2 and battery cell BB2 to battery cell BA1.

[0058] As a result, in battery pack 1, as shown in Figure 4B, battery cells BA1 and BB2 are connected in parallel to each other, battery cells BA2 and BB1 are connected in parallel to each other, battery cells BA3 and BB3 are connected in parallel to each other, and battery cells BA4 and BB4 are connected in parallel to each other. In other words, battery cells BA1 and BB2 constitute cell block BL1, battery cells BA2 and BB1 constitute cell block BL2, battery cells BA3 and BB3 constitute cell block BL3, and battery cells BA4 and BB4 constitute cell block BL4.

[0059] Figure 7B shows an example of the degree of degradation of battery cells BA1-BA4 and BB1-BB4 after the state of switch circuits SW1-SW4 has changed. In other words, Figure 7B corresponds to Figure 4B.

[0060] Cell block BL1 contains battery cell BA1 with a low degree of degradation and battery cell BB2 with a high degree of degradation. Therefore, the degree of degradation of cell block BL1, consisting of battery cells BA1 and BB2, is 7.5 (=10 × 30 / (10 + 30)). Similarly, cell block BL2 contains battery cell BA1 with a high degree of degradation and battery cell BB1 with a low degree of degradation. Therefore, the degree of degradation of cell block BL2, consisting of battery cells BA2 and BB1, is 7.5 (=10 × 30 / (10 + 30)). In this way, the degree of degradation of cell block BL is normalized on a cell block BL basis compared to before the state of switch circuits SW1 to SW4 changed (Figure 7A).

[0061] This completes the process.

[0062] In this example, the degradation of battery pack 1 was equalized each time charging began, but this is not the only way. Alternatively, for example, battery pack 1 could equalize the degradation each time discharging began.

[0063] Thus, in the battery pack 1, there are multiple first battery cell units (battery cell units UA1 to UA4) each containing a battery cell BA and connected in series, and multiple second battery cell units (battery cell units UB1 to UB4) each containing a battery cell BB, in the same number as the multiple first battery cell units (battery cell units UA1 to UA4), and each of the multiple second battery cell units (battery cell units UB1 to UB4) is provided corresponding to each of the multiple second battery cell units (battery cell units UB1 to UB4), and each of the multiple second battery cell units (battery cell units UB1 to UB4) is connected to a different part of the multiple first battery cell units (battery cell units UA1 to UA4). The system includes a plurality of switch circuits (switch circuits SW1 to SW4) that can be selectively connected to a battery cell unit, and a control circuit 12 that can monitor the status of a plurality of first battery cell units (battery cell units UA1 to UA4) and a plurality of second battery cell units (battery cell units UB1 to UB4), calculate the degree of degradation of each of the plurality of first battery cell units (battery cell units UA1 to UA4) and a plurality of second battery cell units (battery cell units UB1 to UB4) based on the monitoring results, and control the operation of the plurality of switch circuits (switch circuits SW1 to SW4) based on the calculation results. The control circuit 12 is configured to control the operation of the plurality of switch circuits SW1 to SW4 so that the battery cell unit UB with the greatest degree of degradation among the plurality of second battery cell units (battery cell units UB1 to UB4) is connected to a battery cell unit UA other than the battery cell unit UA with the greatest degree of degradation among the plurality of first battery cell units (battery cell units UA1 to UA4). As a result, the battery cell units with the greatest degree of degradation are not connected to each other, so the degradation levels of the four cell blocks BL1 to BL4 can be close to each other. In other words, the degradation levels of cell blocks BL are equalized. Consequently, the usable period of battery pack 1 can be extended, thus improving its lifespan.

[0064] Furthermore, in battery pack 1, the control circuit 12 is configured to control the operation of multiple switch circuits SW1 to SW4 so that, among the multiple second battery cell units (battery cell units UB1 to UB4), the battery cell unit UB with the greatest degree of degradation is connected to the battery cell unit UA with the least degree of degradation among the multiple first battery cell units (battery cell units UA1 to UA4), and the battery cell unit UB with the least degree of degradation among the multiple second battery cell units (battery cell units UB1 to UB4) is connected to the battery cell unit UA with the greatest degree of degradation among the multiple first battery cell units (battery cell units UA1 to UA4). As a result, the degradation degree of the cell block BL is equalized in battery pack 1, thereby improving its lifespan.

[0065] Furthermore, in battery pack 1, the control circuit 12 is configured to control the operation of multiple switch circuits (switch circuits SW1 to SW4) so ​​that, among the multiple second battery cell units (battery cell units UB1 to UB4), the battery cell unit UB with the second greatest degree of degradation is connected to the battery cell unit UA with the second least degree of degradation among the multiple first battery cell units (battery cell units UA1 to UA4), and the battery cell unit UB with the second least degree of degradation among the multiple second battery cell units (battery cell units UB1 to UB4) is connected to the battery cell unit UA with the second greatest degree of degradation among the multiple first battery cell units (battery cell units UA1 to UA4). As a result, the degradation of the cell block BL is equalized in battery pack 1, thereby improving its lifespan.

[0066] Furthermore, in battery pack 1, the control circuit 12 is configured to calculate the degree of degradation of each of the multiple first battery cell units (battery cell units UA1 to UA4) and the multiple second battery cell units (battery cell units UB1 to UB4) based on the impedance of each of the multiple first battery cell units (battery cell units UA1 to UA4) and the impedance of each of the multiple second battery cell units (battery cell units UB1 to UB4) during the period when battery pack 1 is being charged or discharged. In other words, since the impedance of a storage battery generally increases as it degrades, the control circuit 12 can calculate the degree of degradation of each of the battery cell units UA1 to UA4 and UB1 to UB4 based on the impedance of each of the battery cell units UA1 to UA4 and UB1 to UB4. Based on these degrees of degradation, battery pack 1 equalizes the degree of degradation of the cell block BL. As a result, the lifespan of battery pack 1 can be improved.

[0067] Furthermore, in the battery pack 1, one of the multiple first battery cell units (battery cell units UA1 to UA4) and one of the multiple second battery cell units (battery cell units UB1 to UB4), which are connected via multiple switch circuits (switch circuits SW1 to SW4), constitute a cell block BL. The control circuit 12 detects the current flowing through the battery pack 1 and the cell voltage of each of the multiple cell blocks (cell blocks BL1 to BL4) during the first period in which the multiple switch circuits (switch circuits SW1 to SW4) connect each of the multiple second battery cell units (battery cell units UB1 to UB4) to a different battery cell unit from the multiple first battery cell units (battery cell units UA1 to UA4), thereby enabling the detection of the impedance of each of the multiple cell blocks (cell blocks BL1 to BL4). The multiple switch circuits (switch circuits SW1 to SW4) connect the multiple second battery cell units (battery cell units UB1 to UB4) to the multiple first battery During a second period when the battery pack 1 is disconnected from the cell units (battery cell units UA1 to UA4), the current flowing through the battery pack 1 and the cell voltage of each of the multiple first battery cell units (battery cell units UA1 to UA4) can be detected. This makes it possible to detect the impedance of each of the multiple first battery cell units (battery cell units UA1 to UA4), and based on the impedances of the multiple cell blocks (cell blocks BL1 to BL4) and the impedances of the multiple first battery cell units (battery cell units UA1 to UA4), it is possible to detect the impedance of each of the multiple second battery cell units (battery cell units UB1 to UB4). As a result, the battery pack 1 can individually obtain the impedances of each of the battery cell units UA1 to UA4 and each of the battery cell units UB1 to UB4, and thus obtain the degree of degradation of each of the battery cell units UA1 to UA4 and UB1 to UB4 individually. Based on these degrees of degradation, the battery pack 1 equalizes the degree of degradation of cell block BL. As a result, the battery life of battery pack 1 can be improved.

[0068] Furthermore, in battery pack 1, each of the multiple switch circuits (switch circuits SW1 to SW4) has a first switch (switch SWA) that can connect the positive terminal of the battery cell unit UB corresponding to the switch circuit SW among the multiple second battery cell units (battery cell units UB1 to UB4) to one of the positive terminals of the multiple first battery cell units (battery cell units UA1 to UA4), and a second switch (switch SWB) that can connect the negative terminal of the battery cell unit UB corresponding to the switch circuit SW among the multiple second battery cell units (battery cell units UB1 to UB4) to one of the negative terminals of the multiple first battery cell units (battery cell units UA1 to UA4). As a result, each of the switch circuits SW1 to SW4 can connect each of the battery cell units UB1 to UB4 to any one of the battery cell units UA1 to UA4. For example, among the battery cell units UB1 to UB4, the battery cell unit UB with the greatest degree of degradation is connected to the battery cell unit UA with the least degree of degradation among the battery cell units UA1 to UA4, and the battery cell unit UB with the least degree of degradation among the battery cell units UB1 to UB4 is connected to the battery cell unit UA with the greatest degree of degradation among the battery cell units UA1 to UA4. As a result, the degree of degradation of the cell block BL in the battery pack 1 is equalized, thereby improving its lifespan.

[0069] [effect] As described above, this embodiment includes a plurality of first battery cell units, each containing a battery cell and connected in series; a plurality of second battery cell units, each containing a battery cell and in the same number as the plurality of first battery cell units; a plurality of switch circuits provided corresponding to each of the plurality of second battery cell units, which can selectively connect each of the plurality of second battery cell units to a different battery cell unit among the plurality of first battery cell units; and a control circuit that can monitor the state of the plurality of first battery cell units and the state of the plurality of second battery cell units, calculate the degree of degradation of each of the plurality of first battery cell units and the plurality of second battery cell units based on the monitoring results, and control the operation of the plurality of switch circuits based on the calculation results. The control circuit is capable of controlling the operation of the plurality of switch circuits so as to connect the battery cell unit with the greatest degree of degradation among the plurality of second battery cell units to a battery cell unit among the plurality of first battery cell units other than the battery cell unit with the greatest degree of degradation. This improves the lifespan.

[0070] In this embodiment, the control circuit is configured to control the operation of multiple switch circuits so that the battery cell unit with the greatest degree of degradation among the multiple second battery cell units is connected to the battery cell unit with the least degree of degradation among the multiple first battery cell units, and the battery cell unit with the least degree of degradation among the multiple second battery cell units is connected to the battery cell unit with the greatest degree of degradation among the multiple first battery cells. This improves the battery life.

[0071] In this embodiment, the control circuit is configured to control the operation of multiple switch circuits so that the battery cell unit with the second highest degree of degradation among the multiple second battery cell units is connected to the battery cell unit with the second lowest degree of degradation among the multiple first battery cell units, and the battery cell unit with the second lowest degree of degradation among the multiple second battery cell units is connected to the battery cell unit with the second highest degree of degradation among the multiple first battery cell units. This improves the battery life.

[0072] In this embodiment, the control circuit is configured to calculate the degree of degradation of each of the multiple first battery cell units and the multiple second battery cell units based on the impedance of each of the multiple first battery cell units and the impedance of each of the multiple second battery cell units during the period when the battery pack is being charged or discharged. This improves the battery life.

[0073] In this embodiment, one of a plurality of first battery cell units and one of a plurality of second battery cell units, connected via a plurality of switch circuits, constitute a cell block. The control circuit can detect the impedance of each of the plurality of cell blocks by detecting the current flowing through the battery pack and the cell voltage of each of the plurality of cell blocks during a first period when the plurality of switch circuits are connected to each of the plurality of second battery cell units to a different battery cell unit from the plurality of first battery cell units; it can detect the impedance of each of the plurality of first battery cell units by detecting the current flowing through the battery pack and the cell voltage of each of the plurality of first battery cells during a second period when the plurality of switch circuits are disconnected from the plurality of first battery cell units; and it can detect the impedance of each of the plurality of second battery cell units based on the impedance of each of the plurality of cell blocks and the impedance of each of the plurality of first battery cell units. This improves the lifespan.

[0074] In battery pack 1, each of the multiple switch circuits has a first switch that can connect the positive terminal of the battery cell unit corresponding to that switch circuit from among the multiple second battery cell units to one of the positive terminals of the multiple first battery cell units, and a second switch that can connect the negative terminal of the battery cell unit corresponding to that switch circuit from among the multiple second battery cell units to one of the negative terminals of the multiple first battery cell units. This improves the battery life.

[0075] [Example 1] In the above embodiment, battery cells BA1 to BA4 and battery cells BB1 to BB4 are provided as shown in Figure 1, but the embodiment is not limited to this. For example, as shown in the battery pack 1A in Figure 8, multiple (two in this example) battery cells BA1, multiple (two in this example) battery cells BA2, multiple (two in this example) battery cells BA3, and multiple (two in this example) battery cells BA4 connected in parallel may be provided. Two battery cells BA1 constitute battery cell unit UA1, two battery cells BA2 constitute battery cell unit UA2, two battery cells BA3 constitute battery cell unit UA3, and two battery cells BA4 constitute battery cell unit UA4. In this case, for example, the impedance R1 obtained in step S103 in Figure 5 is the combined impedance of two battery cells BA1 and battery cell BB1 connected in parallel. Also, for example, the impedance RA1 obtained in step S106 in Figure 5 is the combined impedance of two battery cells BA1 connected in parallel.

[0076] Similarly, as shown in Figure 9, for example, a battery pack 1B may be provided with multiple (two in this example) battery cells BB1 connected in parallel, multiple (two in this example) battery cells BB2 connected in parallel, multiple (two in this example) battery cells BB3 connected in parallel, and multiple (two in this example) battery cells BB4 connected in parallel. Two battery cells BB1 constitute battery cell unit UB1, two battery cells BB2 constitute battery cell unit UB2, two battery cells BB3 constitute battery cell unit UB3, and two battery cells BB4 constitute battery cell unit UB4. In this case, for example, the impedance R1 obtained in step S103 of Figure 5 is the combined impedance of battery cell BA1 and the two battery cells BB1 connected in parallel. Also, for example, the impedance RB1 obtained in step S107 of Figure 5 is the combined impedance of the two battery cells BB1 connected in parallel.

[0077] Furthermore, these can be combined to form a battery pack 1C as shown in Figure 10, which may consist of multiple (two in this example) battery cells BA1 connected in parallel, multiple (two in this example) battery cells BA2 connected in parallel, multiple (two in this example) battery cells BA3 connected in parallel, multiple (two in this example) battery cells BA4 connected in parallel, multiple (two in this example) battery cells BB1 connected in parallel, multiple (two in this example) battery cells BB2 connected in parallel, multiple (two in this example) battery cells BB3 connected in parallel, and multiple (two in this example) battery cells BB4 connected in parallel. Two battery cells BA1 constitute a battery cell unit UA1, two battery cells BA2 constitute a battery cell unit UA2, two battery cells BA3 constitute a battery cell unit UA3, and two battery cells BA4 constitute a battery cell unit UA4. Two battery cells BB1 constitute battery cell unit UB1, two battery cells BB2 constitute battery cell unit UB2, two battery cells BB3 constitute battery cell unit UB3, and two battery cells BB4 constitute battery cell unit UB4.

[0078] [Differentiation 2] In the above embodiment, the degree of degradation of each battery cell was calculated based on the impedance of each battery cell BA1-BA4 and BB1-BB4, but the method is not limited to this. Alternatively, for example, the degree of degradation of each battery cell may be calculated based on the cell voltage of each battery cell BA1-BA4 and BB1-BB4. The battery pack 2 according to this modified example will be described in detail below.

[0079] Figure 11 shows an example configuration of the battery pack 2 according to this modified example. The battery pack 2 is equipped with a control circuit 22. Similar to the control circuit 12 in the above embodiment, the control circuit 22 is configured to monitor the state of the battery pack 2 and to control the operation of the battery pack 2. During periods when charging or discharging is not performed, the control circuit 22 detects the cell voltages VA1 to VA4 of battery cells BA1 to BA4 and the cell voltages VB1 to VB4 of battery cells BB1 to BB4, and calculates the degree of degradation of each battery cell BA1 to BA4 and BB1 to BB4 based on these cell voltages VA1 to VA4 and VB1 to VB4. In other words, generally, when a storage battery degrades, the cell voltage when no current is flowing decreases. Therefore, the control circuit 22 calculates the degree of degradation of each battery cell BA1 to BA4 and BB1 to BB4 based on the cell voltages VA1 to VA4 of battery cells BA1 to BA4 and the cell voltages VB1 to VB4 of battery cells BB1 to BB4. Then, the control circuit 22 controls the operation of the switch circuits SW1 to SW4 based on the calculated degradation levels.

[0080] Figure 12 shows an example of the operation of battery pack 2. Battery pack 2 periodically performs the following process. By performing this process, battery pack 2 equalizes the degree of degradation in units of cell block BL during periods when it is not charging or discharging, for example, once a day.

[0081] First, the control circuit 22 checks whether a leveling process to equalize the degree of degradation has been performed within a predetermined number of days (step S201). Specifically, the control circuit 22 checks, for example, whether a leveling process has been performed during the period from one day ago to the present. If a leveling process has been performed within the predetermined number of days ("Y" in step S201), this process is terminated.

[0082] In step S201, if the leveling process has not been performed within a predetermined number of days ("N" in step S201), the control circuit 22 checks whether the battery pack 2 is charging or discharging (step S202). If the battery pack 2 is charging or discharging ("Y" in step S202), this process ends.

[0083] In step S202, if the battery pack 2 is neither charging nor discharging ("N" in step S202), the control circuit 22 turns off the switch circuits SW1 to SW4 (step S203). Switch circuit SW1 disconnects battery cell BB1 from battery cells BA1 to BA4, switch circuit SW2 disconnects battery cell BB2 from battery cells BA1 to BA4, switch circuit SW3 disconnects battery cell BB3 from battery cells BA1 to BA4, and switch circuit SW4 disconnects battery cell BB4 from battery cells BA1 to BA4.

[0084] Next, the control circuit 22 detects the cell voltages of battery cells BA1 to BA4 (step S204). The control circuit 22 detects the cell voltages of battery cells BA1 to BA4 by detecting the cell voltages VA1 to VA4.

[0085] Next, the control circuit 22 detects the cell voltages of battery cells BB1 to BB4 (step S205). The control circuit 22 detects the cell voltages of battery cells BB1 to BB4 by detecting the cell voltages VB1 to VB4.

[0086] Next, the control circuit 22 calculates the degree of degradation of each battery cell BA1-BA4 and BB1-BB4 based on the cell voltages of battery cells BA1-BA4 obtained in step S204 and the cell voltages of battery cells BB1-BB4 obtained in step S205 (step S206). The degradation value increases as the degradation progresses.

[0087] Next, the control circuit 22 controls the operation of switch circuits SW1 to SW4 so that the degree of degradation is equalized, using cell block BL as the unit (step S207).

[0088] This completes the process.

[0089] Thus, in the battery pack 2, the control circuit 22 is capable of detecting the degree of degradation of each of the multiple first battery cell units (battery cell units UA1 to UA4) and the multiple second battery cell units (battery cell units UB1 to UB4) based on the cell voltages of each of the multiple first battery cell units (battery cell units UA1 to UA4) and the multiple second battery cell units (battery cell units UB1 to UB4) during periods different from the periods when the battery pack 2 is being charged or discharged. In other words, as a storage battery generally degrades, the cell voltage when no current is flowing decreases, so the control circuit 22 can calculate the degree of degradation of each of the battery cell units UA1 to UA4 and UB1 to UB4 based on the cell voltages of each of the battery cell units UA1 to UA4 and UB1 to UB4. Based on these degrees of degradation, the battery pack 2 equalizes the degree of degradation of the cell block BL. As a result, the lifespan of the battery pack 2 can be improved.

[0090] Furthermore, in battery pack 2, the control circuit 22 is configured to detect the cell voltages of each of the multiple first battery cell units (battery cell units UA1 to UA4) and each of the multiple second battery cell units (battery cell units UB1 to UB4) during the period when multiple switch circuits (switch circuits SW1 to SW4) are disconnecting multiple second battery cell units (battery cell units UB1 to UB4) from multiple first battery cell units (battery cell units UA1 to UA4). As a result, battery pack 2 can individually obtain the cell voltages of each of the battery cell units UA1 to UA4 and each of the battery cell units UB1 to UB4, and thus obtain the degree of degradation of each of the battery cell units UA1 to UA4 and UB1 to UB4 individually. Based on these degrees of degradation, battery pack 2 equalizes the degree of degradation of the cell block BL. As a result, the lifespan of battery pack 2 can be improved.

[0091] Although the present technology has been described above with reference to embodiments, the present technology is not limited to these embodiments and various modifications are possible.

[0092] In the above embodiment, as shown in Figure 1, four battery cells BA connected in series are provided, but the embodiment is not limited to this. Alternatively, for example, the battery pack 1 may have two or three battery cells BA connected in series, or five or more battery cells BA connected in series. For example, if five battery cells BA connected in series are provided, five switch circuits SW and five battery cells BB can be provided.

[0093] The effects described herein are illustrative only, and the effects of this disclosure are not limited to those described herein. Therefore, other effects may be obtained with respect to this disclosure. [Explanation of Symbols]

[0094] 1, 1A, 1B, 1C, 2…Battery pack, 11…Resistor element, 12, 22…Control circuit, BA, BA1~BA4…Battery cell, BB, BB1~BB4…Battery cell, BL, BL1~BL4…Cell block, CFET…Transistor, CTL1~CTL4…Control signal, CTLA~CTLD…Control signal, DFET…Transistor, R1~R4, RA1~RA4, RB1~RB4, SW, SW1~SW4…Switch circuit, SWA, SWB…Switch, SWA0~SWA3…Switch, SWB1~SWB4…Switch, TN…Negative terminal, TP…Positive terminal, UA, UA1~UA4…Battery cell unit, UB, UB1~UB4…Battery cell unit, VA1~VA4…Cell voltage, VB1~VB4…Cell voltage.

Claims

1. Each of the first battery cell units includes a battery cell and is connected in series with a plurality of other battery cell units, Each of the following includes a battery cell, and there are a plurality of second battery cell units in the same number as the plurality of first battery cell units, A plurality of switch circuits are provided corresponding to each of the plurality of second battery cell units, and each of the plurality of second battery cell units is capable of selectively connecting to a different battery cell unit from among the plurality of first battery cell units, A control circuit capable of monitoring the state of the plurality of first battery cell units and the state of the plurality of second battery cell units, calculating the degree of degradation of each of the plurality of first battery cell units and the plurality of second battery cell units based on the monitoring results, and controlling the operation of the plurality of switch circuits based on the calculation results. Equipped with, The control circuit can control the operation of the plurality of switch circuits so that the battery cell unit with the greatest degree of degradation among the plurality of second battery cell units is connected to the battery cell units other than the battery cell unit with the greatest degree of degradation among the plurality of first battery cell units. Battery pack.

2. The control circuit can control the operation of the plurality of switch circuits so that, among the plurality of second battery cell units, the battery cell unit with the greatest degree of degradation is connected to the battery cell unit with the least degree of degradation among the plurality of first battery cell units, and the battery cell unit with the least degree of degradation among the plurality of second battery cell units is connected to the battery cell unit with the greatest degree of degradation among the plurality of first battery cell units. The battery pack according to claim 1.

3. The control circuit can control the operation of the plurality of switch circuits so that, among the plurality of second battery cell units, the battery cell unit with the second greatest degree of degradation is connected to the battery cell unit with the second least degree of degradation is connected to the battery cell unit with the second greatest degree of degradation is connected to the battery cell unit with the second greatest degree of degradation is connected to the plurality of first battery cell units. The battery pack according to claim 2.

4. The control circuit can detect the degree of degradation of each of the multiple first battery cell units and the multiple second battery cell units based on the impedance of each of the multiple first battery cell units and the impedance of each of the multiple second battery cell units during the period when the battery pack is being charged or discharged. The battery pack according to any one of claims 1 to 3.

5. One of the plurality of first battery cell units and one of the plurality of second battery cell units, connected via the plurality of switch circuits, constitute a cell block. The aforementioned control circuit is During a first period in which each of the plurality of switch circuits is connected to a different battery cell unit from among the plurality of first battery cell units, the impedance of each of the plurality of cell blocks can be detected by detecting the current flowing through the battery pack and the cell voltage of each of the plurality of cell blocks. During a second period in which the plurality of switch circuits are disconnected from the plurality of first battery cell units, the impedance of each of the plurality of first battery cell units can be detected by detecting the current flowing through the battery pack and the cell voltage of each of the plurality of first battery cell units. Based on the impedance of each of the plurality of cell blocks and the impedance of each of the plurality of first battery cell units, the impedance of each of the plurality of second battery cell units can be detected. The battery pack according to claim 4.

6. The control circuit can detect the degree of degradation of each of the multiple first battery cell units and the multiple second battery cell units based on the cell voltages of each of the multiple first battery cell units and each of the multiple second battery cell units during a period different from the period in which the battery pack is being charged or discharged. The battery pack according to any one of claims 1 to 3.

7. The control circuit is capable of detecting the cell voltage of each of the multiple first battery cell units and the cell voltage of each of the multiple second battery cell units during the period when the multiple switch circuits are disconnecting the multiple second battery cell units from the multiple first battery cell units. The battery pack according to claim 6.

8. Each of the above-mentioned multiple switch circuits is A first switch is provided that can connect the positive terminal of a battery cell unit corresponding to its switch circuit among the plurality of second battery cell units to one of the positive terminals of the plurality of first battery cell units. The negative terminal of the battery cell unit corresponding to the switch circuit among the plurality of second battery cell units is connected to a second switch that can be connected to one of the negative terminals of the plurality of first battery cell units. has A battery pack according to any one of claims 1 to 7.

9. Each of the plurality of first battery cell units includes a single battery cell or a plurality of battery cells connected in parallel with one another. A battery pack according to any one of claims 1 to 8.

10. Each of the plurality of second battery cell units includes a single battery cell or a plurality of battery cells connected in parallel with one another. A battery pack according to any one of claims 1 to 9.

11. A battery pack having a plurality of first battery cell units, each containing a battery cell and connected in series; a plurality of second battery cell units, each containing a battery cell and in the same number as the plurality of first battery cell units; and a plurality of switch circuits provided corresponding to each of the plurality of second battery cell units, each capable of selectively connecting each of the plurality of second battery cell units to a different battery cell unit among the plurality of first battery cell units, wherein the state of the plurality of first battery cell units and the state of the plurality of second battery cell units are monitored, Based on the monitoring results, the degree of degradation of each of the plurality of first battery cell units and the plurality of second battery cell units is calculated. The operation of the plurality of switch circuits is controlled so that the battery cell unit with the greatest degree of degradation among the plurality of second battery cell units is connected to the battery cell units other than the battery cell unit with the greatest degree of degradation among the plurality of first battery cell units. A control method including

Images