Modules, equipment

Abstract

We provide modules with excellent mechanical properties. [Solution] The width Dc of the intermediate portion 33 restricted by the semiconductor elements 10 and 20 is less than the sum of the thickness Ta of the lower portion 31 and the thickness Tb of the lower portion 32, and the distance Da from at least a portion of the contour 10 of the projection region from the semiconductor element 10 to the mounting surface 2 to at least a portion of the outer edge 311 of the substrate bonding surface, which is the bonding surface 300 to the wiring substrate 1 in the adhesive material 30, is less than the width Dc.

Description

Technical Field

[0004] ,

[0006] , ,

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[0001] The technology according to the present disclosure relates to a module including a wiring substrate, a semiconductor element, and an adhesive.

Background Art

[0002] Citation Document 1 discloses a semiconductor device in which a plurality of semiconductor elements are face-down mounted on a circuit board via bumps, and an underfill resin is filled in a gap between the lower surface of the semiconductor element and the upper surface of the circuit board.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the relevant art, there are problems with the mechanical characteristics of the module.

Means for Solving the Problems

[0005] One object of the technology according to the present disclosure is to provide a module having excellent mechanical characteristics.

[0006] One aspect of the technology relating to this disclosure comprises a wiring board having a mounting surface, a first semiconductor element and a second semiconductor element electrically connected to the wiring board, overlapping the wiring board in a first direction perpendicular to the mounting surface, and aligned in a second direction along the mounting surface, and an adhesive bonded to the wiring board, the first semiconductor element and the second semiconductor element on the mounting surface, wherein the adhesive has a first portion located between the wiring board and the first semiconductor element in the first direction, a second portion located between the wiring board and the second semiconductor element in the first direction, and a portion located in the second direction The module includes a third portion located between a first semiconductor element and a second semiconductor element, wherein the width Dc of the third portion in the second direction restricted by the first and second semiconductor elements is less than the sum of the thickness Ta of the first portion in the first direction and the thickness Tb of the second portion in the first direction, and the distance Da from at least a portion of the first contour of the projection region from the first semiconductor element to the mounting surface in the first direction to at least a portion of the outer edge of the substrate bonding surface, which is the bonding surface of the adhesive material to the wiring substrate, is less than the width Dc. [Effects of the Invention]

[0007] The technology described herein is advantageous in providing modules with superior mechanical properties. [Brief explanation of the drawing]

[0008] [Figure 1] A schematic diagram illustrating the module. [Figure 2] A schematic diagram illustrating the module. [Figure 3] A schematic diagram illustrating the module. [Figure 4] A schematic diagram illustrating the module. [Figure 5] A schematic diagram illustrating the module. [Figure 6] A schematic diagram illustrating the module. [Figure 7] A schematic diagram illustrating the module. [Figure 8]A schematic diagram illustrating equipment and systems. [Figure 9] A schematic diagram illustrating the module. [Modes for carrying out the invention]

[0009] The embodiments for carrying out the invention will be described below with reference to the drawings. In the following description and drawings, common components are denoted by the same reference numerals across multiple drawings. Therefore, common components will be described by referring to multiple drawings, and the description of components denoted by the same reference numerals will be omitted as appropriate.

[0010] A first embodiment of this model will be described with reference to Figures 1 and 2. Figure 1 shows the main parts of the module according to the first embodiment. Figure 1(a) is a top view of module 400, and Figure 1(b) is a cross-sectional view of module 400 along line II shown in Figure 1(a).

[0011] Module 400 comprises a wiring board 1, a semiconductor element 10 (first semiconductor element), a semiconductor element 20 (second semiconductor element), and an adhesive 30.

[0012] The wiring board 1 has a mounting surface 2. The wiring board 1 further has an opposite surface 3 on the side opposite to the mounting surface 2, and an end surface 4 connecting the mounting surface 2 and the opposite surface 3. As will be described later, the opposite surface 3 may also be a mounting surface.

[0013] The semiconductor element 10 is electrically connected to the wiring board 1 and overlaps the wiring board 1 in the Z direction perpendicular to the mounting surface 2. The semiconductor element 20 is electrically connected to the wiring board 1 and overlaps the wiring board 1 in the Z direction perpendicular to the mounting surface 2. The semiconductor elements 10 and 20 are aligned in the X direction along the mounting surface 2.

[0014] Figure 1(a) shows the contour 100 of the projection region from the semiconductor element 10 to the plane including the mounting surface 2 in the Z direction with a thick line, and the contour 200 of the projection region from the semiconductor element 20 to the plane including the mounting surface 2 in the Z direction with a thick line.

[0015] The electrical connection between the semiconductor element 10 and the wiring board 1 is made by a plurality of conductive members 14. The plurality of conductive members 14 can be conductive balls or conductive bumps disposed between the semiconductor element 10 and the wiring board 1. The plurality of conductive members 14 are metal bumps, solder balls, or conductive resins, and these may be used in combination. It is not essential that the plurality of conductive members 14 are disposed between the semiconductor element 10 and the wiring board 1. As the plurality of conductive members 14, conductive wires can be used to form an electrical connection between the semiconductor element 10 and the wiring board 1 outside the space between the semiconductor element 10 and the wiring board 1. In this case, the plurality of conductive members 14 which are conductive wires are wire-bonded to the semiconductor element 10 and the wiring board 1.

[0016] The electrical connection between the semiconductor element 20 and the wiring board 1 is made by a plurality of conductive members 24. The plurality of conductive members 2 are conductive balls or conductive bumps disposed between the semiconductor element 20 and the wiring board 1. The plurality of conductive members 24 are metal bumps, solder balls, or conductive resins, and these may be used in combination. It is not essential that the plurality of conductive members 24 are disposed between the semiconductor element 20 and the wiring board 1. As the plurality of conductive members 24, conductive wires can be used to form an electrical connection between the semiconductor element 20 and the wiring board 1 outside the space between the semiconductor element 20 and the wiring board 1. In this case, the plurality of conductive members 24 which are conductive wires are wire-bonded to the semiconductor element 20 and the wiring board 1.

[0017] The adhesive 30 adheres to the wiring board 1, the semiconductor element 10, and the semiconductor element 20 on the mounting surface 2. The adhesive 30 is formed by solidifying a liquid adhesive by drying and / or curing by polymerization. The adhesive 30 typically consists of resin and functions as a reinforcing material, a sealing material, an underfill material, etc.

[0018] FIG. 1(a) shows a contour 300 which is the contour of the projection area of the adhesive 30 onto the plane including the mounting surface 2 in the Z direction. Although the area surrounded by the contour 300 is hatched, the adhesive 30 does not necessarily exist throughout the inside of this contour 300. Typically, the adhesive 30 does not exist in the portions within the contour 300 where the conductive members 14 and 24 are present.

[0019] As shown in FIG. 1(b), the adhesive 30 includes a lower portion 31, a lower portion 32, and an intermediate portion 33. The lower portion 31 is located between the wiring board 1 and the semiconductor element 10 in the Z direction. The lower portion 32 is located between the wiring board 1 and the semiconductor element 20 in the Z direction. The intermediate portion 33 is located between the semiconductor element 10 and the semiconductor element 20 in the X direction. Further, the adhesive 30 includes an end portion 36 forming the contour 300 in the vicinity of the semiconductor element 10 and an end portion 37 forming the contour 300 in the vicinity of the semiconductor element 20. FIG. 1(a) also shows the intermediate portion 33 and the end portions 36 and 37.

[0020] The end portions 36 and 37 are exposed to a non-solid space. The non-solid space is typically a gas space such as air, but may also be a vacuum space or a liquid space. By exposing the end portions 36 and 37 to the non-solid space, the mechanical characteristics of the module 400 can be controlled according to the shapes of the end portions 36 and 37.

[0021] The problems that this embodiment aims to solve will be explained using Figure 9. In the module 401 according to the reference embodiment shown in Figure 9, semiconductor elements 10 and 20 are mounted on a wiring board 1 and an adhesive 30 is provided. When the liquid adhesive used to form the adhesive 30 solidifies and / or hardens, shrinkage may occur. Also, when the adhesive 30 changes temperature during the manufacturing or use of the module 400, expansion or contraction occurs depending on the thermal expansion coefficient of the adhesive 30. In particular, if the volume of the intermediate portion 33 and the end portions 36 and 37 of the adhesive 30 is large, such expansion or contraction of the adhesive 30 may cause deformation such as warping W in the wiring board 1. Figure 9 shows warping W when the adhesive 30 expands, but when the adhesive 30 contracts, warping in the opposite direction may occur. Such deformation has undesirable effects during manufacturing or use. Specifically, it can lead to a decrease in module yield, a decrease in reliability, a decrease in performance, and a decrease in lifespan. For example, this could include the reliability of the connection between the wiring board 1 and the semiconductor elements 10 and 20, as well as damage to the semiconductor elements 10 and 20. It also affects the connection relationship between components in the module (not shown) and the wiring board 1 or the semiconductor elements 10 and 20.

[0022] Therefore, this embodiment suppresses deformation of the wiring board 1 by reducing the volume of the intermediate portion 33 and the end portions 36 and 37, thereby providing a module with excellent mechanical properties. The following describes preferred methods for reducing the volume of the intermediate portion 33 and the end portions 36 and 37.

[0023] Figure 2(a) is an enlarged view of the cross-sectional view of module 400, including the intermediate portion 33. Figure 2(b) is an enlarged view of the cross-sectional view of module 400, including the end portion 36 or end portion 37. For the sake of simplicity, Figure 2(b) will be used to explain that the objects associated with semiconductor element 10 and the objects associated with semiconductor element 20 are the same. In Figure 2(b), the reference numerals of objects associated with semiconductor element 10 (for example, the end portion 36 that forms the contour 300 in the vicinity of semiconductor element 10) are shown without parentheses. The reference numerals of objects associated with semiconductor element 20 (for example, the end portion 37 that forms the contour 300 in the vicinity of semiconductor element 20) are shown with parentheses.

[0024] The semiconductor element 10 has a lower surface 101 which is the surface facing the wiring substrate 1, an upper surface 102 which is the opposite surface to the lower surface 101, and a side surface 103 of the semiconductor element 10 that faces the semiconductor element 20.

[0025] The semiconductor element 20 has a lower surface 201 which is the surface facing the wiring substrate 1, an upper surface 202 which is the opposite surface from the lower surface 201, and a side surface 203 of the semiconductor element 20 that faces the semiconductor element 10.

[0026] The adhesive 30 has an adhesive surface 301 which is the adhesive surface of the adhesive 30 to the semiconductor element 10. The adhesive surface 301 includes an adhesive region of the adhesive 30 to the lower surface 101 of the semiconductor element 10 and an adhesive region of the adhesive 30 to the opposing surface 103 of the semiconductor element 10. The end of the adhesive surface 301 near the opposing surface 103 is the inner end 313. The inner end 313 is preferably located on the opposing surface 103 as in the example in Figure 2(a), but the inner end 313 may also be on the upper surface 102.

[0027] The adhesive 30 has an adhesive surface 302 which is the adhesive surface of the adhesive 30 to the semiconductor element 20. The adhesive surface 302 includes an adhesive region of the adhesive 30 to the lower surface 201 of the semiconductor element 20 and an adhesive region of the adhesive 30 to the opposing surface 203 of the semiconductor element 20. The end of the adhesive surface 302 near the opposing surface 203 is the inner end 323. The inner end 323 is preferably located on the opposing surface 203 as in the example in Figure 2(a), but the inner end 323 may also be on the upper surface 202.

[0028] The intermediate portion 33 of the adhesive 30 has an upper surface 34 which is the opposite side from the wiring board 1. Typically, the upper surface 34 is concave.

[0029] The adhesive 30 has a relay portion 35 located between the intermediate portion 33 and the wiring board 1 in the Z direction. The relay portion 35 is not located between the semiconductor element 10 and the semiconductor element 20 in the X direction, nor between the semiconductor element 10 and the wiring board 1 in the Z direction, nor between the semiconductor element 20 and the wiring board 1 in the Z direction. The intermediate portion 33 and the lower portion 31 are continuous via the relay portion 35, and the intermediate portion 33 and the lower portion 32 are continuous via the relay portion 35.

[0030] The adhesive material 30 has an adhesive surface 303 which is the surface of the adhesive material 30 that adheres to the wiring board 1. The adhesive surface 303 is located at the lower portions 31 and 32 of the adhesive material 30, the intermediate portion 35, and the end portions 36 and 37.

[0031] As shown in Figure 2(b), the semiconductor element 10 has a non-opposing surface 104 on one of its sides that does not face the semiconductor element 20. This non-opposing surface 104 may be any of the three sides of the semiconductor element 10 other than the opposing surface 103, but it is typically the side opposite the opposing surface 103.

[0032] As shown in Figure 2(b), the semiconductor element 20 has a non-opposing surface 204 on one of its sides that does not face the semiconductor element 10. This non-opposing surface 204 may be any of the three sides of the semiconductor element 20 other than the opposing surface 203, but it is typically the side opposite the opposing surface 203.

[0033] In other words, typically, in the X direction, the opposing surface 103 and the opposing surface 203 are located between the non-opposing surface 104 and the non-opposing surface 204.

[0034] The end of the adhesive surface 301 near the non-opposing surface 104 is the outer end 312. The outer end 312 is preferably located on the non-opposing surface 104 or on the bottom surface 101, as in the example in Figure 2(b), but may also be located on the top surface 102. When the outer end 312 is located on the non-opposing surface 104, the adhesive surface 301 includes the adhesive region of the adhesive material 30 to the non-opposing surface 104 of the semiconductor element 10. It is preferable that the adhesive material 30 does not adhere to at least a portion of the top surface 102.

[0035] The end of the adhesive surface 302 near the non-opposing surface 204 is the outer end 322. The outer end 322 is preferably located on the non-opposing surface 204 or on the bottom surface 201, as in the example in Figure 2(b), but may also be located on the top surface 202. When the outer end 322 is located on the non-opposing surface 204, the adhesive surface 302 includes the adhesive region of the adhesive material 30 to the non-opposing surface 204 of the semiconductor element 20. It is preferable that the adhesive material 30 does not adhere to at least a portion of the top surface 202. The outer end 312 is part of the end portion 36 and is exposed to space. The outer end 322 is part of the end portion 37 and is exposed to non-solid space.

[0036] The edge of the adhesive surface 303 near the non-opposing surface 104 is the outer edge 311. The edge of the adhesive surface 303 near the non-opposing surface 204 is the outer edge 321. The outer edge 311 is part of the end portion 36 and is exposed to a non-solid space. The outer edge 321 is part of the end portion 37 and is exposed to a non-solid space.

[0037] The portion of the exposed surface of the adhesive 30 to the non-solid space that connects the outer edge 311 and the outer end 312 is the end face of the end portion 36. The portion of the exposed surface of the adhesive 30 to the non-solid space that connects the outer edge 321 and the outer end 322 is the end face of the end portion 37. The exposed surface of the adhesive 30 to the non-solid space may include the upper surface 34 of the intermediate portion 33, but the upper surface 34 does not have to be exposed to the non-solid space.

[0038] Figures 2(a) and 2(b) show a portion of the contour 100 of the projection region from the semiconductor element 10 onto the plane including the mounting surface 2 in the Z direction (a portion of contours 100 and 200 in a certain cross-section). The inner ends 313 and 323 shown in Figure 2(a) are also in a certain cross-section and are a portion of the inner ends 313 and 323. The outer ends 312 and 322 shown in Figure 2(b) are also a portion of the outer ends 312 and 322 in a certain cross-section. The outer edges 311 and 321 shown in Figure 2(b) are also a portion of the outer edges 311 and 321 in a certain cross-section.

[0039] Figure 2(a) shows the width Dc of the intermediate portion 33 in the X direction, which is restricted by semiconductor elements 10 and 20. The width Dc of the intermediate portion 33 may correspond to the distance between semiconductor element 10 and semiconductor element 20 in the X direction. More specifically, the width Dc of the intermediate portion 33 may correspond to the distance between the side surface 103 of semiconductor element 10 facing semiconductor element 20 and the side surface 203 of semiconductor element 20 facing semiconductor element 10.

[0040] Figures 2(a) and (b) show the thickness Ta of the lower portion 31 and the thickness Tb of the lower portion 32 in the Z direction.

[0041] Figures 2(a) and (b) show the thickness Tc of semiconductor element 10 and the thickness Td of semiconductor element 20 in the Z direction. The thicknesses Tc and Td can be, for example, 100 μm or more, 300 μm or more, 500 μm or more, 5 mm or less, 3 mm or less, 2 mm or less, and 1 mm or less.

[0042] Figures 2(a) and (b) show the thickness Te of the wiring board 1 in the Z direction. The thickness Te can be, for example, 100 μm or more, 300 μm or more, 500 μm or more, 5 mm or less, 3 mm or less, 2 mm or less, or 1 mm or less.

[0043] Figure 2(a) shows the distance in the Z direction from the adhesive surface 303 to the inner end 313 as height Hc. Also, Figure 2(a) shows the distance in the Z direction from the adhesive surface 303 to the inner end 323 as height Hd.

[0044] Figure 2(a) shows the distance in the Z direction from mounting surface 2 to top surface 102 as height He. Also, Figure 2(a) shows the distance in the Z direction from mounting surface 2 to top surface 202 as height Hf.

[0045] Figure 2(b) shows the distance in the Z direction from the adhesive surface 303 to the outer end 312 as height Ha. Also in Figure 2(b), the distance in the Z direction from the adhesive surface 303 to the outer end 322 is shown as height Hb.

[0046] Figure 2(b) shows the distance Da from the portion of contour 100 corresponding to the non-opposing surface 104 to the outer edge 311. Figure 2(b) also shows the distance Db from the portion of contour 200 corresponding to the non-opposing surface 204 to the outer edge 321.

[0047] Figure 2(b) shows the range Roa, which extends outward from the portion of contour 100 corresponding to the non-opposing surface 104, at a distance of Oa. Figure 2(b) also shows the range Ria, which extends inward from the portion of contour 100 corresponding to the non-opposing surface 104, at a distance of Ia. The combined range of range Roa and range Ria is shown as range Ra. Figure 2(b) also shows the range Rob, which extends outward from the portion of contour 200 corresponding to the non-opposing surface 204, at a distance of Ob. Figure 2(b) also shows the range Rib, which extends inward from the portion of contour 200 corresponding to the non-opposing surface 204, at a distance of Ib. The combined range of range Rob and range Rib is shown as range Rb.

[0048] Figure 2(b) shows the straight-line distance La from the outer end 312 to the outer edge 311. Figure 2(b) shows the straight-line distance Lb from the outer end 322 to the outer edge 321.

[0049] Figure 2(b) shows the distance Ea from the portion corresponding to the non-opposing surface 104 of the contour 100 to the end face 4. Figure 2(b) shows the distance Eb from the portion corresponding to the non-opposing surface 204 of the contour 200 to the end face 4.

[0050] Figure 2(b) shows the position at a distance Ga outward from the portion corresponding to the non-opposing surface 104 of the contour 100. Figure 2(b) shows the position at a distance Gb outward from the portion corresponding to the non-opposing surface 204 of the contour 200. The distances Ga and Gb can be 5 mm or less, 3 mm or less, 2 mm or less, and 1 mm or less. The distance Ga may be equal to or greater than the height He or less than the height He. The distance Gb may be equal to or greater than the height Hf or less than the height Hf.

[0051] This embodiment is characterized in that the width Dc is small. For example, the width Dc is smaller than the sum of the thickness Ta and the thickness Tb (Dc < Ta + Tb). The lower part 31 and the lower part 32 are formed by the penetration of the liquid adhesive with capillary action. That is, the thickness Ta and the thickness Tb are thicknesses that allow capillary action. The gap between the semiconductor element 10 and the semiconductor element 20 is set so that Dc < Ta + Tb is satisfied. Thereby, the intermediate part 33 between the semiconductor element 10 and the semiconductor element 20 can be formed by the capillary action of the liquid adhesive between the semiconductor element 10 and the semiconductor element 20. The liquid surface of the adhesive formed at this time forms a concave meniscus, and the concave meniscus may be the origin of the concave surface of the upper surface 34.

[0052] The width Dc can be, for example, 1 mm or less, 500 μm or less, 300 μm or less, 250 μm or less, 200 μm or less, 150 μm or less. The width Dc can be, for example, 10 μm or more, 20 μm or more, 50 μm or more. The thicknesses Ta and Tb can be, for example, 500 μm or less, 250 μm or less, 150 μm or less, 100 μm or less, 75 μm or less. The thicknesses Ta and Tb can be, for example, 10 μm or more, 20 μm or more, 50 μm or more.

[0053] The outer edge 311 preferably exists within the range Ra. In the example shown in Fig. 2(b), the outer edge 311 exists within the range Roa, but it may also exist within the range Ria. When the outer edge 311 exists within the range Roa, the non-opposing surface 104 overlaps with the bonding surface 303 of the adhesive 30 to the wiring board 1 in the Z direction. When the outer edge 311 exists within the range Ria, at least a part of the portion of the contour 100 corresponding to the non-opposing surface 104 does not overlap with the bonding surface 303 of the adhesive 30 to the wiring board 1 in the Z direction.

[0054] The distance Oa defining the range Roa is preferably smaller than the distance Dc (Oa < Dc). Also, the distance Ia defining the range Ria is preferably smaller than the distance Dc (Ia < Dc). That is, the distance Da from the portion of the contour 100 corresponding to the non-opposing surface 104 to the outer edge 311 is preferably smaller than the width Dc (Da < Dc).

[0055] The outer edge 321 preferably exists within the range Rb. In the example shown in Fig. 2(b), the outer edge 321 exists within the range Rob, but it may also exist within the range Rib.

[0056] When the outer edge 321 exists within the range Rob, the non-opposing surface 204 overlaps with the bonding surface 303 of the adhesive 30 to the wiring board 1 in the Z direction. When the outer edge 321 exists within the range Rib, at least a part of the portion of the contour 200 corresponding to the non-opposing surface 204 does not overlap with the bonding surface 303 of the adhesive 30 to the wiring board 1 in the Z direction.

[0057] The distance Ob that defines the range Rob is preferably smaller than the distance Dc (Ob < Dc). Also, the distance Ib that defines the range Rib is preferably smaller than the distance Dc (Ib < Dc). That is, the distance Db from the portion corresponding to the non-opposing surface 204 of the contour 100 to the outer edge 321 is preferably smaller than the width Dc (Db < Dc).

[0058] The distances Da and Db can be, for example, less than 1000 μm, less than 500 μm, less than 300 μm, less than 250 μm, less than 200 μm, less than 150 μm, 20 μm or more, and 50 μm or more.

[0059] The height Ha is preferably smaller than the height Hc (Ha < Hc). The height Hb is preferably smaller than the height Hd (Hb < Hd).

[0060] The height Hc is preferably less than or equal to the height He (Hc ≤ He). The height Hd is preferably less than or equal to the height Hf (Hd ≤ Hf).

[0061] The length in the Z direction of the adhesive surface between the adhesive 30 and the non-opposing surface 104 is preferably small. The length in the Z direction of the adhesive surface between the adhesive 30 and the non-opposing surface 104 can be represented by the difference between the height Ha and the thickness Ta. The difference between the height Ha and the thickness Ta is preferably smaller than the thickness Tc (Ha - Ta < Tc). The difference between the height Ha and the thickness Ta is preferably smaller than the width Dc (Ha - Ta < Dc). The difference between the height Ha and the thickness Ta is preferably smaller than the thickness Ta (Ha - Ta < Ta).

[0062] It is preferable that the length in the Z direction of the bonding surface between the connecting member 30 and the non-opposing surface 204 is small. The length in the Z direction of the bonding surface between the bonding material 30 and the non-opposing surface 204 can be represented by the difference between the height Hb and the thickness Tb. The difference between the height Hb and the thickness Tb is preferably smaller than the thickness Td (Hb - Tb < Td). The difference between the height Hb and the thickness Tb is preferably smaller than the width Dc (Hb - Tb < Dc). The difference between the height Hb and the thickness Tb is preferably smaller than the thickness Tb (Hb - Tb < Tb).

[0063] The height Ha is preferably smaller than the width Dc (Ha < Dc). The height Hb is preferably smaller than the width Dc (Hb < Dc).

[0064] The straight-line distance La is preferably smaller than √2 times the width Dc (La < √2 × Dc). The straight-line distance Lb is preferably smaller than √2 times the width Dc (Lb < √2 × Dc). This is based on the fact that when the lengths of the two adjacent sides of a right-angled isosceles triangle are Ha (Hb) = Dc and Da (Db) = Dc respectively, the length of the hypotenuse of the right-angled isosceles triangle is √2 × Dc. The straight-line distances La and Lb are preferably smaller than the width Dc.

[0065] In the example of FIG. 2(b), the distances Ea and Eb are larger than the width Dc (Ea, Eb > Dc). In such a case, the warp of the wiring board 1 tends to be large, so the effect of this embodiment is more remarkable. On the other hand, in order to reduce the warp of the wiring board 1, the distances Ea and Eb are preferably smaller than the width Dc (Ea, Eb < Dc).

[0066] In the example of FIG. 2(b), the thickness Te is smaller than the thicknesses Tc and Td (Te < Tc, Tb). In such a case, the wiring board 1 is prone to warp, so the effect of this embodiment is more remarkable. On the other hand, in order to suppress the warp of the wiring board 1, the thickness Te is preferably larger than the thicknesses Tc and Td (Te > Tc, Td).

[0067] The wiring board 1 will now be described. The wiring board 1 includes a base material and wiring material. If the wiring board 1 is a printed circuit board, the base material is a resin base material such as glass epoxy, and the wiring material is printed wiring or vias made of copper or other materials. The base material of the wiring board 1 is not limited to a resin base material, but may also be a ceramic base material, a silicon base material, a glass base material (glass core), a metal base material, etc., and an insulating layer, a wiring layer, and vias can be formed on these base materials to make the wiring board 1. The wiring board 1 may be a motherboard or an interposer. If the wiring board 1 is an interposer, the opposite side 3 of the wiring board 1 may be connected to a motherboard. The wiring board 1 as an interposer may be a silicon interposer or a glass interposer, and a silicon interposer may have TSVs (through-silicon vias), and a glass interposer may have TGVs (through-glass vias).

[0068] The semiconductor elements 10 and 20 will now be described. The semiconductor element 10(20) shown in Figure 1(b) is a package-type semiconductor element. The semiconductor element 10(20) includes a semiconductor layer 11(21), a support substrate 12(22) that supports the semiconductor layer 11(21), and a sealing resin 13(23) that seals the semiconductor layer 11(21). Electrodes and wiring are provided on the support substrate 12(22). The semiconductor layer 11(21) is electrically connected to the support substrate 12(22) by wire bonding or flip-chip bonding. The thickness of the sealing resin 13(23) on the semiconductor layer 11 is approximately 100 μm to 1 mm. In that case, the distance between the top surface 102(202) and the semiconductor layer 11(21) can be approximately 100 μm to 1 mm. The semiconductor layer 11 and the semiconductor layer 21 may consist of a group IV semiconductor or a compound semiconductor. Semiconductor layers 11 and 21 can consist of single-crystal or polycrystalline semiconductors. Typical semiconductor layers 11 and 21 are single-crystal silicon layers.

[0069] It is preferable that the outer edge of the adhesive surface 303 is located in the preferred range Ra, Rb for, for example, 25% or more, preferably 50% or more, more preferably 75% or more, and even more preferably 90% or more of the portion corresponding to one side surface that is a non-opposing surface of the contour 100.

[0070] In the example shown in Figure 1, two semiconductor elements 10 and 20 are arranged opposite each other with an intermediate portion 33 in a row in the X direction and two columns in the Y direction, but this is not the only example. A total of M × N semiconductor elements can be arranged opposite each other with an intermediate portion, with M rows in the X direction (M≧1) and N columns in the Y direction (N>1). In this case, of the M × N semiconductor elements, one of the two semiconductor elements arranged opposite each other can be considered semiconductor element 10 and the other semiconductor element 20.

[0071] For example, four semiconductor elements can be arranged facing each other in a 2x2 configuration with an intermediate portion 33 in between. In this case, two of the four sides of each semiconductor element may be facing surfaces with other semiconductor elements, and the remaining two sides may be non-facing surfaces. In this case, less than 50% of the contour of each semiconductor element may be the portion corresponding to the non-facing surface. Therefore, it is preferable that the outer edge of the bonding surface 303 is located in the preferred range Ra, Rb for, for example, 12.5% ​​or more, preferably 25% or more, more preferably 37.5% or more, and even more preferably 45% or more of the contour of each semiconductor element.

[0072] For example, a total of nine semiconductor elements can be arranged in a 3x3 grid, facing each other via an intermediate section 33. In this case, the semiconductor element in the 2nd row, 2nd column does not have a non-facing surface. The four semiconductor elements located in the 1st row, 2nd column, 2nd row, 1st column, 2nd row, 3rd column, and 3rd row, 2nd column may have three of their four sides facing each other, and the remaining one side may be a non-facing surface with other semiconductor elements. The four semiconductor elements located in the 1st row, 1st column, 1st row, 3rd column, 3rd row, 1st column, and 3rd row, 3rd column may have two of their four sides facing each other, and the remaining two sides may be non-facing surfaces.

[0073] A second embodiment of this model will be described with reference to Figure 3. Points not described regarding the second embodiment may be the same as those in the other embodiments.

[0074] Figure 3(a) is a top view of module 400, and Figure 3(b) is a cross-sectional view of module 400 along the line III-III shown in Figure 3(a).

[0075] The semiconductor device 10(20) may include a semiconductor layer 11(21), a connection structure 15(25) formed on the surface of the semiconductor layer 11(21), and an insulating film 16(26) formed on the back surface of the semiconductor layer 11(21). The semiconductor layer 11(21) is the same as in the first embodiment. The connection structure 15(25) includes an insulator such as an interlayer insulating film and a conductor such as wiring or electrodes. The insulating film 16(26) functions as a protective film and includes an inorganic insulating layer and / or an organic insulating layer. The inorganic insulating layer may include the native oxide of the semiconductor layer 11(21). The upper surface 102(202) of the semiconductor device 10(20) may be composed of the insulating film 16(26). The thickness of the insulating film 16(26) on the semiconductor layer 11(21) is about 1 nm to 100 μm. In that case, the distance between the upper surface 102(202) and the semiconductor layer 11(21) may be 100 μm or less. The insulating film 16(26) can be omitted, in which case the upper surface 102(202) of the semiconductor element 10(20) may be composed of the semiconductor layer 11(21).

[0076] In the second embodiment, the configuration Te > Tc, Td is adopted. Also in the second embodiment, the configuration Ea > Dc is adopted for the three non-opposing surfaces 104, and the configuration Eb > Dc is adopted for the three non-opposing surfaces 204. More than 40% (more than 80% in this example) of the outer edge 311 is in range Roa, and more than 40% (more than 80% in this example) of the outer edge 311 is in range Rob.

[0077] On the mounting surface 2 of the wiring board 1, a plurality of electronic components 40 are mounted. The plurality of electronic components 40 include electronic components 41, 42, 43, and 44. The electronic components 40 are passive components and are typically chip components. The electronic components 40 are resistors, capacitors, inductors, etc. The electronic components 40 are used to realize the good operation of the semiconductor elements 10 and 20, and are, for example, termination resistors, bypass capacitors, ferrite beads, etc. Some of these electronic components 40 can be arranged closer to the semiconductor element 10 (20) than the position where the distance Ga (Gb) is located, as described using FIG. 2(b). In the present embodiment, since the amount of the adhesive 30 existing closer to the semiconductor element 10 (20) than the position where the distance Ga (Gb) is located can be reduced, the constraint on the arrangement of the electronic components 40 by the adhesive 30 is small, and the electronic components 40 can be mounted at high density. Also, since the distance between the electronic components 40 and the semiconductor elements 10 and 20 can be made closer, the impedance between the electronic components 40 and the semiconductor elements 10 and 20 is reduced, contributing to the improvement of the operation of the semiconductor elements 10 and 20.

[0078] The third embodiment of the present embodiment will be described using FIG. 4. Points not described regarding the third embodiment may be the same as those in other embodiments.

[0079] FIG. 4(a) is a top view of the module 400, and FIG. 4(b) is a cross-sectional view of the module 400 along the line IV-IV shown in FIG. 4(a).

[0080] In the third embodiment, a configuration where Te < Tc, Td is adopted. Also, in the third embodiment, regarding the three non-opposing surfaces 104, a configuration where Ea < Dc is adopted, and regarding the three non-opposing surfaces 204, a configuration where Eb < Dc is adopted. More than 40% (in this example, more than 80%) of the outer edge 311 exists in the range Roa, and more than 40% (in this example, more than 80%) of the outer edge 311 exists in the range Rob.

[0081] The fourth embodiment of the present embodiment will be described using FIG. 5. Points not described regarding the fourth embodiment may be the same as those in other embodiments.

[0082] FIG. 5(a) is a top view of the module 400, and FIG. 5(b) is a cross-sectional view of the module 400 taken along the line V-V shown in FIG. 5(a).

[0083] In the fourth embodiment, a configuration where Te < Tc, Td is adopted. Also, in the fourth embodiment, for the three non-opposing surfaces 104, a configuration where Ea < Dc is adopted, and for the three non-opposing surfaces 204, a configuration where Eb < Dc is adopted. More than 40% (in this example, 80% or more) of the outer edge 311 exists in the range Ria, and more than 40% (in this example, 80% or more) of the outer edge 311 exists in the range Rib.

[0084] The fifth embodiment of the present embodiment will be described with reference to FIGS. 6(a) and (b). Points not described regarding the fifth embodiment may be the same as those in other embodiments.

[0085] FIGS. 6(a) and (b) are cross-sectional views showing the manufacturing process of another module 400 of the fifth embodiment.

[0086] As shown in FIG. 6(a), a plurality of connection members 5 are provided on the opposite surface 3 of the wiring board 1. A circuit board 6 is disposed on the side opposite to the mounting surface 2 side with respect to the wiring board 1. An electronic component 50 is mounted on the mounting surface 8 of the circuit board 6. The electronic component 50 may be a semiconductor element or a passive element. For example, the semiconductor elements 10 and 20 may be memories, and the electronic component 50 may be a processor.

[0087] As shown in FIG. 6(b), the wiring board 1 and the circuit board 6 are electrically connected by a plurality of connection members 5. According to the present embodiment, since the warpage of the wiring board 1 is suppressed, the reliability of the electrical connection by the plurality of connection members 5 between the circuit board 6 and the wiring board 1 is good. Specifically, open failures and short failures of the connection members 5 that may occur due to the warpage of the wiring board 1 are suppressed.

[0088] Furthermore, the electronic component 50 provided between the wiring board 1 and the circuit board 6 may be mounted on the opposite side 3 of the wiring board 1 instead of the mounting side 8 of the circuit board 6. In Figures 6(a) and (b), a BGA (Ball Grid Array) is shown as an example of the connecting member 5, but a PGA (Pin Grid Array), LGA (Land Grid Array), or a combination thereof may also be used. If the circuit board 6 is a motherboard having a PGA socket, an LGA-type CPU including semiconductor elements 10 and 20 which are processors and a wiring board 1 having an LGA on the opposite side 3 can be mounted on the circuit board 6. In addition, the configurations disclosed in Japanese Patent Publication No. 2024-127762 and Japanese Patent Publication No. 2023-80425 can also be used for the connection between the wiring board 1 and the circuit board 6.

[0089] A sixth embodiment of this model will be described with reference to Figure 6(c). Points not described regarding the sixth embodiment may be the same as those in the other embodiments.

[0090] Figure 6(c) is a cross-sectional view showing module 400 of the sixth embodiment.

[0091] Module 400 includes a plate-shaped member 60 positioned on the side opposite to the wiring board 1 relative to the semiconductor elements 10 and 20. Preferably, the distance between the plate-shaped member 60 and the semiconductor element 10 is less than the thickness Tc, and more preferably less than the thickness Ta. Preferably, the distance between the plate-shaped member 60 and the semiconductor element 20 is less than the thickness Td, and more preferably less than the thickness Tb. The plate-shaped member 60 is fixed to the wiring board 1 by a fixing member 61. There may be an air gap between the plate-shaped member 60 and the semiconductor elements 10 and 20, but an intermediate member 62 may be provided, as shown in Figure 6(c). The plate-shaped member 60 is a member having at least one of thermal, electrical, optical, and mechanical functions. An example of a plate-shaped member 60 having a thermal function is a heat spreader. In that case, the intermediate member 62 may be a heat-conducting paste or a heat-conducting sheet. An example of a plate-shaped member 60 having an electrical function is an electromagnetic shield. The plate-shaped member 60 having optical functions can be an optical filter or an optical cover. The intermediate member 62 used with respect to the plate-shaped member 60 having optical functions can be a light-transmitting bonding material. The intermediate member 62 may be in contact with the upper surface 34 of the intermediate portion 33. In any case of the plate-shaped member 60, according to this embodiment, warping of the wiring board 1 is suppressed, so the positional control of the semiconductor elements 10 and 20 and the plate-shaped member 60 can be appropriately performed, and the function of the plate-shaped member 60 can be fully obtained. For example, if the plate-shaped member 60 is a heat spreader, warping of the wiring board 1 will create a gap between the semiconductor elements 10 and 20 and the plate-shaped member 60, reducing thermal conductivity. By suppressing the warping of the wiring board 1, the upper surface 102 of the semiconductor element 10 and the upper surface 202 of the semiconductor element 20 can be arranged in substantially the same plane, thereby reducing the gap between the semiconductor elements 10 and 20 and the plate-shaped member 60 and improving thermal conductivity. If the plate-shaped member 60 has an optical function, mismatches in the optical paths between the plate-shaped member 60 and the semiconductor elements 10 and 20 can be suppressed.

[0092] A seventh embodiment of this model will be described with reference to Figure 7. Points not described regarding the seventh embodiment may be the same as those in the other embodiments.

[0093] Figures 7(a) to 7(d) show the manufacturing method of module 400.

[0094] As shown in Figure 7(a), semiconductor elements 10 and 20 are mounted on the wiring board 1 with a gap Gc between them. Masking tapes 391 and 392 are attached to the sides of the semiconductor elements 10 and 20 and to the surface of the wiring board 1 to prevent adhesive 30 from adhering to them. These masking tapes 391 and 392 have high oil repellency. For the masking tapes 391 and 392, it is preferable to use film tapes made of fluororesins such as PTFE (PolyTetraFluoroEthylene) or PFA (PerFluoroalkoxy Alkane). The distance Ga between the semiconductor elements 10 and 20 and the masking tape 392 attached to the wiring board 1 is shorter than the gap Gc between the semiconductor elements 10 and 20. Similarly, masking tape 391 is attached to the sides of the semiconductor elements 10 and 20 to prevent adhesive 30 from adhering to them. The distance Gb between the edge of the masking tape 391 and the lower edge of the semiconductor elements 10 and 20 is shorter than the distance Gc between the semiconductor elements 10 and 20.

[0095] Figure 7(b) shows the process of injecting adhesive 390 into the underside of semiconductor elements 10 and 20. Adhesive 390 is a thermosetting resin called underfill. By applying adhesive 390, filled in syringe 380, to the edges of semiconductor elements 10 and 20 between the semiconductor elements 10 and 20 and the wiring board 1, the adhesive 390 penetrates under the semiconductor elements 10 and 20 by capillary action, and adhesive portions 310 and 320 are formed. Similarly, adhesive 390 also penetrates into the gap formed between semiconductor elements 10 and 20 by capillary action, and adhesive portion 330 is formed. When adhesive 390 has penetrated the entire underside of semiconductor elements 10 and 20, it can be confirmed that it has penetrated the entire underside by seeing the adhesive 390 seep out onto an edge other than the edge on which it was applied. At this time, the adhesive 390 adhering to the masking tape 391 flows off due to the oil-repellent properties of the masking tape 391. Therefore, the contact length of the adhesive 390 adhering to the sides of the semiconductor elements 10 and 20 is less than or equal to the distance Gb between the exposed area from the masking tape 391, that is, the distance between the edge of the masking tape 391 and the bottom edge of the semiconductor elements 10 and 20.

[0096] Figure 7(c) shows the state after the adhesive 390 has been cured by heating. The adhesive 390 that has flowed out from outside the mounting area of ​​the semiconductor elements 10 and 20 and spread onto the masking tape 392 forms droplets due to the oil-repellent properties of the masking tape 392, forming a residue 393, which then hardens. Therefore, the contact length of the adhesive 390 adhering to the wiring board 1 is less than or equal to the distance Ga between the semiconductor elements 10 and 20 and the masking tape 392.

[0097] Figure 7(d) shows the state after the adhesive 390 has hardened and the masking tapes 391 and 321 have been peeled off. The granular resin formed from the hardened droplet-shaped residue 393 can be removed at the same time as the masking tapes 391 and 321 are peeled off. Furthermore, the length of the adhesive 390 that contacts the wiring board 1 outside the electronic component mounting area is equal to or less than the distance Ga between the semiconductor elements 10 and 20 and the masking tape 392, that is, less than or equal to the distance Gc between the semiconductor elements 10 and 20.

[0098] The method for controlling the shape of the end portions 36 and 37 is not limited to the use of the masking tapes 391 and 392 described above. For example, excess adhesive may be wiped off. Alternatively, the portion where excess adhesive has been formed may be separated by methods such as cutting the wiring board 1.

[0099] An eighth embodiment of this model will be described with reference to Figure 8. Points not described regarding the eighth embodiment may be the same as those in the other embodiments.

[0100] The module 400 of this embodiment can be used in various electronic modules for various devices or systems. Figure 8 shows a camera system 1000 comprising an electronic device 800 which is a camera body and an optical device 900 which is an interchangeable lens. The electronic device 800 comprises an imaging module 600, a processing module 400, and a display module 830. Module 600 is electrically connected to module 400. Module 830 is electrically connected to module 400. For example, the electronic device 800 includes a flexible wiring member 500 that connects module 400 and module 600. For example, the electronic device 800 includes a flexible wiring member 700 that connects module 400 and module 830.

[0101] Module 600 includes an image sensor 610 and a wiring board 620 on which the image sensor 610 is mounted. Module 400 includes a circuit board 6, a wiring board 1, and semiconductor elements 10 and 20. Module 830 includes a display element such as an LCD or OLED.

[0102] The circuit board 6 is equipped with a control element 70. The video signal obtained from the image sensor 610 is transmitted via the flexible wiring member 500 and processed by the module 400. The display element of the module 830 displays an image corresponding to the video signal. The control element 70 controls these operations.

[0103] The electronic device 800 is equipped with a mount 890, to which an optical device 900 is attached. The optical device 900 comprises a lens optical system 910 and a lens barrel 920 that houses it.

[0104] Here, a camera system in which the electronic device is a video device has been used as an example, but the module of this embodiment can be used in a variety of devices. For example, the electronic device equipped with the module may be an information device such as a smartphone or personal computer, or a communication device such as a modem or router. Alternatively, the module may be used in office equipment or printing equipment such as printers, copiers or scanners, medical equipment such as X-ray machines or endoscopes, industrial equipment such as robots or semiconductor manufacturing equipment, or transportation equipment such as vehicles, airplanes or ships.

[0105] The functions of the semiconductor elements 10 and 20 in the module 400 of this embodiment are diverse, and the functions of semiconductor element 10 and semiconductor element 20 may be the same or different. For example, semiconductor elements 10 and 20 may be any of memory, processor, sensor, and display. Alternatively, semiconductor elements 10 and 20 may be communication elements, control elements, power supply elements, etc.

[0106] Memory (storage elements) include, for example, DRAM (Dynamic Random Access Memory) and flash memory. Processors (processing elements) include, for example, CPU (Central Processing Unit), GPU (Graphics Processing Unit), NPU (Neural Processing Unit), DSP (digital signal processor), and ISP (Image Signal Processor). Sensors (detection elements) include, for example, CMOS image sensors, SPAD (Single Photon Avalanche Diode) sensors, and MEMS (Micro Electro Mechanical Systems) sensors. Display elements include, for example, liquid crystal displays and organic light-emitting diode (OLED) displays.

[0107] Modules with multiple semiconductor elements mounted on a single printed circuit board can be incorporated into a variety of electronic devices. For example, there is a semiconductor packaging structure called PoP (Package On Package) where semiconductor packages such as memory and ASICs are stacked vertically. In PoP, the ASIC is often used in the lower semiconductor package and the memory in the upper semiconductor package. In this PoP, some structures involve mounting multiple semiconductor packages to be mounted in the upper layer onto a single printed circuit board to create a module, which is then stacked on top of the lower semiconductor package. This allows for the mounting of multiple semiconductor packages in the upper layer by creating multiple modules, thus improving the performance of the PoP.

[0108] Furthermore, a semiconductor module called a chiplet is one in which multiple semiconductor chips are mounted on a single printed circuit board. A chiplet is constructed by separately manufacturing semiconductor chips with different process nodes, such as a CPU (Central Processing Unit) and memory, and mounting them on a single printed circuit board to form a single semiconductor module. By manufacturing these multiple semiconductor chips separately, it is possible to select good quality chips from each and mount them on the printed circuit board, thereby increasing the yield of the semiconductor package. Similarly, in optical sensor modules, there are also modules in which multiple semiconductor elements are mounted on a single printed circuit board and function as a single sensor module. In this sensor module as well, by manufacturing small semiconductor elements, selecting good quality chips, and then modularizing them with multiple semiconductor elements, it is possible to manufacture a sensor module with a large light-receiving area without using large optical sensors with low yield.

[0109] Next, we will explain the structure by which semiconductor elements and printed circuit boards are connected when these semiconductor packages, semiconductor chips, and semiconductor elements are mounted on a printed circuit board. For semiconductor packages used in the upper layer of a Point of Purchase (PoP), BGA (Ball Grid Array) type semiconductor packages with a small mounting area are used, and they are connected to the printed circuit board via solder balls provided on the underside of the BGA. For semiconductor chips used in chiplets, multiple semiconductors are mounted in close proximity, making wire bonding impossible. Therefore, they are flip-chip mounted to the printed circuit board via bumps or Cu pillars.

[0110] Furthermore, in optical sensors, similar to chiplets, flip-chip mounting is used to mount sensor chips in close proximity. In the mounting structure of these semiconductor modules, in order to ensure the reliability of the connection, a resin called underfill is injected and cured between the semiconductor element and the printed circuit board to reinforce the connection. Reinforcement structures like underfill, which seal only the space between the semiconductor element and the printed circuit board with resin, have the advantage of making it easier to manage heat by allowing heat dissipation materials such as heat sinks to be directly attached to the semiconductor element, compared to methods that seal the entire semiconductor element with molded resin. In addition, in sensor modules, the optical characteristics can be guaranteed because the light-receiving surface is not sealed with resin.

[0111] In the underfill reinforcement process, liquid resin is first applied to the vicinity of the semiconductor elements on the printed circuit board. The applied resin penetrates between the semiconductor elements and the printed circuit board by capillary action, and after penetrating the entire underside of the semiconductor elements, the excess flows out of the area where the semiconductor elements are mounted, wetting and spreading on the printed circuit board and the sides of the semiconductor elements. After the resin has penetrated the entire underside of the semiconductor elements, the reinforcement process is completed by heating the entire module in an oven or the like to harden the resin. However, the aforementioned excess resin, that is, the resin on the printed circuit board outside the area where the semiconductor elements are mounted, also hardens. This excess resin that hardens outside the area where the semiconductor elements are mounted expands and contracts with changes in ambient temperature, which has the problem of affecting the thermal deformation of the entire module.

[0112] For example, if a module mounted on the upper layer of a PoP warps significantly, the risk of solder joint failure in the intermediate part increases during the stacking process with the semiconductor package below. Similarly, if a chiplet-type semiconductor module warps significantly, the risk of solder joint failure increases when mounting the chiplet to the motherboard. Furthermore, in optical sensor modules, misalignment of the parallelism of the surfaces of multiple semiconductor sensors arranged side by side can occur, resulting in a degradation of the optical sensor's characteristics. This embodiment, through its effect, can suppress mounting defects due to thermal deformation during the process of mounting the module to other printed circuit boards. It can also suppress the degradation of optical sensor module characteristics due to thermal deformation.

[0113] This embodiment has been made in view of the above problems, and provides a structure that suppresses thermal deformation of a module in which a plurality of semiconductor elements are mounted on a printed circuit board and the space between the semiconductor elements and the printed circuit board is sealed with resin.

[0114] According to this embodiment, the amount of thermal deformation of the module can be reduced by making the length of the resin in contact with the printed circuit board outside the semiconductor element mounting area smaller than the distance between semiconductor elements. Furthermore, the thermal deformation of the module can be further reduced by making the length of the resin in contact with the side surface of the semiconductor element smaller than the distance between semiconductor elements. In addition, if the distance between semiconductor elements is 200 μm or less, the effect of suppressing this thermal deformation can be further enhanced.

[0115] This effect suppresses mounting defects caused by thermal deformation during the process of mounting the module onto other printed circuit boards. It also suppresses the degradation of the optical sensor module's characteristics due to thermal deformation.

[0116] The embodiments described above can be modified as appropriate without departing from the technical concept. For example, multiple embodiments can be combined. Furthermore, some aspects of at least one embodiment can be deleted or replaced. Furthermore, new aspects can be added to at least one embodiment.

[0117] Furthermore, the disclosures in this specification include not only what is explicitly stated herein, but also all matters that can be understood from this specification and the drawings attached thereto. In addition, the disclosures in this specification include the complement of the individual concepts described herein. That is, if this specification states, for example, "A is B," then even if the description of the case where "A is not B" is omitted, this specification can be said to disclose the case where "A is not B." This is because the statement "A is B" presupposes that the case where "A is not B" is being considered.

[0118] Furthermore, in the specific numerical ranges exemplified in this specification, the notation e~f (where e and f are numbers) means e or greater and / or f or less. Also, in the specific numerical ranges exemplified, when ranges i~j and m~n are given together (where i, j, m, and n are numbers), the lower and upper limit pairs are not limited to the pair i and j or the pair m and n. For example, multiple pairs of lower and upper limits may be combined for consideration. That is, when ranges i~j and m~n are given together, the consideration may be carried out using the range i~n or the range m~j, as long as no contradiction arises. Also, being e or greater means either e or greater than e (greater than e), and a value greater than e may be adopted instead of e. Also, being f or less means either f or less than f (less than f), and a value less than f may be adopted instead of f.

[0119] This disclosure includes the following aspects 1 to 25.

[0120] [Aspect 1] A wiring board having a mounting surface, A first semiconductor element and a second semiconductor element are electrically connected to the aforementioned wiring board, overlapping the wiring board in a first direction perpendicular to the mounting surface, and aligned in a second direction along the mounting surface. The mounting surface comprises an adhesive bonded to the wiring board, the first semiconductor element, and the second semiconductor element, The adhesive includes a first portion located between the wiring substrate and the first semiconductor element in the first direction, a second portion located between the wiring substrate and the second semiconductor element in the first direction, and a third portion located between the first semiconductor element and the second semiconductor element in the second direction. The width Dc of the third portion in the second direction, which is restricted by the first semiconductor element and the second semiconductor element, is less than the sum of the thickness Ta of the first portion in the first direction and the thickness Tb of the second portion in the first direction. A module characterized in that the distance Da from at least a portion of the first contour of the projection region from the first semiconductor element to the mounting surface in the first direction to at least a portion of the outer edge of the substrate-side adhesive surface, which is the adhesive surface of the adhesive material to the wiring substrate, is smaller than the width Dc.

[0121] [Aspect 2] The distance in the first direction from the substrate-side bonding surface to at least a portion of the outer edge of the bonding surface of the adhesive material to the first semiconductor element is defined as height Ha. The distance in the first direction from the substrate-side bonding surface to at least a portion of the inner end of the bonding surface of the adhesive material to the first semiconductor element is defined as height Hc. The module according to embodiment 1, wherein the height Ha is smaller than the height Hc.

[0122] [Aspect 3] The first semiconductor element has a first opposing surface facing the mounting surface and a first opposite surface on the opposite side of the first opposing surface. The distance in the first direction from the substrate-side bonding surface to at least a portion of the inner end of the bonding surface of the adhesive material to the first semiconductor element is defined as height Hc. The distance in the first direction from the substrate-side adhesive surface to the first opposite surface is defined as the height He. The module according to embodiment 1 or 2, wherein the height Hc is less than or equal to the height He.

[0123] [Aspect 4] The module according to any one of embodiments 1 to 3, wherein the straight-line distance La from at least a portion of the edge of the first bonding surface of the adhesive material to the first semiconductor element to at least a portion of the outer edge of the substrate bonding surface is less than √2 times the width Dc.

[0124] [Aspect 5] The distance in the first direction from the substrate bonding surface to at least a portion of the outer end of the first bonding surface of the adhesive material to the first semiconductor element is defined as height Ha. The module according to any one of embodiments 1 to 4, wherein the difference between the height Ha and the thickness Ta is smaller than the width Dc.

[0125] [Aspect 6] The distance in the first direction from the substrate bonding surface to at least a portion of the outer end of the first bonding surface of the adhesive material to the first semiconductor element is defined as height Ha. The module according to any one of embodiments 1 to 5, wherein the height Ha is smaller than the width Dc.

[0126] [Aspect 7] The distance in the first direction from the substrate bonding surface to at least a portion of the outer end of the first bonding surface of the adhesive material to the first semiconductor element is defined as height Ha. The module according to any one of embodiments 1 to 6, wherein the difference between the height Ha and the thickness Ta is smaller than the thickness Ta.

[0127] [Aspect 8] The module according to any one of embodiments 1 to 7, wherein the distance Ea from at least a portion of the first contour to at least a portion of the end face of the wiring board is smaller than the width Dc.

[0128] [Aspect 9] The module according to any one of embodiments 1 to 8, wherein the thickness of the wiring board in the first direction is smaller than the thickness of the first semiconductor element and the second semiconductor element in the first direction.

[0129] [Aspect 10] The module according to any one of embodiments 1 to 9, wherein the side of the third portion opposite to the mounting surface is concave.

[0130] [Aspect 11] The module according to any one of embodiments 1 to 10, wherein the distance Db from at least a portion of the second contour of the projection region from the second semiconductor element to the mounting surface in the first direction to at least a portion of the outer edge of the substrate-side adhesive surface, which is the adhesive surface of the adhesive material to the wiring substrate, is smaller than the width Dc.

[0131] [Aspect 12] The distance in the first direction from the substrate-side bonding surface to at least a portion of the outer edge of the bonding surface of the adhesive material to the second semiconductor element is defined as the height Hb. The distance in the first direction from the substrate-side adhesive surface to at least a portion of the inner end of the adhesive surface to the second semiconductor element in the adhesive material is defined as the height Hd. A module according to any one of embodiments 1 to 11, wherein the height Hb is smaller than the height Hd.

[0132] [Aspect 13] The second semiconductor element has a second opposing surface facing the mounting surface and a second opposing surface on the opposite side of the second opposing surface. The distance in the first direction from the substrate-side adhesive surface to at least a portion of the inner end of the adhesive surface to the second semiconductor element in the adhesive material is defined as the height Hd. The distance in the first direction from the substrate-side adhesive surface to the second opposite surface is defined as the height Hf. A module according to any one of embodiments 1 to 12, wherein the height Hd is less than or equal to the height Hf.

[0133] [Aspect 14] The module according to any one of embodiments 1 to 13, wherein the straight-line distance Lb from at least a portion of the edge of the second bonding surface of the adhesive material to the second semiconductor element to at least a portion of the outer edge of the substrate bonding surface is less than √2 times the width Dc.

[0134] [Aspect 15] A module according to any one of embodiments 1 to 14, wherein the width Dc is 200 μm or less, the thickness Ta and the thickness Tb are 100 μm or less, and the distance Da is 100 μm or less.

[0135] [Aspect 16] The first semiconductor element has a first opposing surface facing the mounting surface and a first opposite surface on the opposite side from the first opposing surface. The second semiconductor element has a second opposing surface facing the mounting surface and a second opposing surface on the opposite side of the second opposing surface. The module according to any one of embodiments 1 to 15, wherein the adhesive does not adhere to at least a portion of the first opposite surface and at least a portion of the second opposite surface.

[0136] [Aspect 17] The first opposite surface is composed of a first semiconductor layer included in the first semiconductor element, and the second opposite surface is composed of a second semiconductor layer included in the second semiconductor element. The first opposite surface is composed of a first insulating film covering the first semiconductor layer included in the first semiconductor device, and the distance between the first opposite surface and the first semiconductor layer is 100 μm or less, and The module according to embodiment 16, wherein the second opposite surface is composed of a second insulating film covering a second semiconductor layer included in the second semiconductor element, and the distance between the second opposite surface and the first semiconductor layer is 100 μm or less, satisfying at least one of these conditions.

[0137] [Aspect 18] The mounting surface includes electronic components, The module according to any one of embodiments 1 to 17, wherein the distance from the first semiconductor element to the electronic component is smaller than the distance from the mounting surface to the first opposite surface.

[0138] [Aspect 19] The module according to any one of embodiments 1 to 18, wherein the first semiconductor element and the second semiconductor element are one of a memory, a processor, a sensor, and a display.

[0139] [Aspect 20] The circuit board is further arranged on the side opposite to the mounting surface of the aforementioned wiring board, The module according to any one of embodiments 1 to 19, wherein the wiring board and the circuit board are electrically connected.

[0140] [Aspect 21] The module according to embodiment 20, wherein an electronic component is provided between the wiring board and the circuit board.

[0141] [Aspect 22] A module according to any one of embodiments 1 to 21, comprising a plate-shaped member disposed on the opposite side from the wiring substrate side to the first semiconductor element and the second semiconductor element, wherein the distance between the plate-shaped member and the first semiconductor element is less than the thickness Tc of the first semiconductor element, and the distance between the plate-shaped member and the second semiconductor element is less than the thickness Td of the first semiconductor element.

[0142] [Aspect 23] A first module which is a module described in any one of the descriptions in Actuals 1 to 22, A second module electrically connected to the first module, Equipment equipped with the following features.

[0143] [Aspect 24] The apparatus according to embodiment 23, further comprising a flexible wiring member for connecting the first module and the second module.

[0144] [Pattern 25] The equipment according to embodiment 23 or 24, which is one of the following: video equipment, printing equipment, medical equipment, and industrial equipment. [Examples]

[0145] An example of the module 400 according to the third embodiment described with reference to Figure 4 will be explained. The mounting surface 2 of the wiring board 1 has a long side length of 38 mm and a short side length of 18 mm. The thickness Te of the wiring board 1 is 1 mm. The contours of the semiconductor elements 10 and 20 have a long side length of 14 mm and a short side length of 8 mm, and the thicknesses Tc and Td of the semiconductor elements 10 and 20 are 2 mm. The semiconductor elements 10 and 20 are arranged with a distance of 100 μm between them so that their short sides face each other. The distances Ea and Eb are 5 mm. For the adhesive 30, the thicknesses Ta and Tb are 80 μm, the width Dc is 100 μm, the distances Da and Db are 50 μm, the heights Ha and Hb are 100 μm, and the heights Hc and Hf are approximately 2 mm. Such a module has little warping of the wiring board 1 and good mechanical properties. [Explanation of Symbols]

[0146] 1 Wiring board 10, 20 semiconductor devices 30 Adhesive 31, 32 Lower part 33. Intermediate part 400 modules

Claims

1. A wiring board having a mounting surface, A first semiconductor element and a second semiconductor element are electrically connected to the wiring board, overlapping the wiring board in a first direction perpendicular to the mounting surface, and aligned in a second direction along the mounting surface. The mounting surface comprises an adhesive bonded to the wiring board, the first semiconductor element, and the second semiconductor element, The adhesive includes a first portion located between the wiring substrate and the first semiconductor element in the first direction, a second portion located between the wiring substrate and the second semiconductor element in the first direction, and a third portion located between the first semiconductor element and the second semiconductor element in the second direction. The width Dc of the third portion in the second direction, which is restricted by the first semiconductor element and the second semiconductor element, is smaller than the sum of the thickness Ta of the first portion in the first direction and the thickness Tb of the second portion in the first direction. A module characterized in that the distance Da from at least a portion of the first contour of the projection region from the first semiconductor element to the mounting surface in the first direction to at least a portion of the outer edge of the substrate adhesive surface, which is the adhesive surface of the adhesive material to the wiring substrate, is smaller than the width Dc.

2. The distance in the first direction from the substrate bonding surface to at least a portion of the outer end of the bonding surface of the adhesive material to the first semiconductor element is defined as height Ha. The distance in the first direction from the substrate bonding surface to at least a portion of the inner end of the bonding surface of the adhesive material to the first semiconductor element is defined as the height Hc. The module according to claim 1, wherein the height Ha is smaller than the height Hc.

3. The first semiconductor element has a first opposing surface facing the mounting surface and a first opposite surface on the opposite side of the first opposing surface. The distance in the first direction from the substrate bonding surface to at least a portion of the inner end of the bonding surface of the adhesive material to the first semiconductor element is defined as the height Hc. The distance in the first direction from the substrate bonding surface to the first opposite surface is defined as the height He. The module according to claim 1, wherein the height Hc is less than or equal to the height He.

4. The module according to claim 1, wherein the straight-line distance La from at least a portion of the edge of the first bonding surface of the adhesive material to the first semiconductor element to at least a portion of the outer edge of the substrate bonding surface is less than √2 times the width Dc.

5. The distance in the first direction from the substrate bonding surface to at least a portion of the outer end of the first bonding surface of the adhesive material to the first semiconductor element is defined as height Ha. The module according to claim 1, wherein the difference between the height Ha and the thickness Ta is smaller than the width Dc.

6. The distance in the first direction from the substrate bonding surface to at least a portion of the outer end of the first bonding surface of the adhesive material to the first semiconductor element is defined as height Ha. The module according to claim 1, wherein the height Ha is smaller than the width Dc.

7. The distance in the first direction from the substrate bonding surface to at least a portion of the outer end of the first bonding surface of the adhesive material to the first semiconductor element is defined as height Ha. The module according to claim 1, wherein the difference between the height Ha and the thickness Ta is smaller than the thickness Ta.

8. The module according to claim 1, wherein the distance Ea from at least a portion of the first contour to at least a portion of the end face of the wiring board is smaller than the width Dc.

9. The module according to claim 1, wherein the thickness of the wiring board in the first direction is smaller than the thickness of the first semiconductor element and the second semiconductor element in the first direction.

10. The module according to claim 1, wherein the surface of the third portion opposite to the mounting surface is concave.

11. The module according to claim 1, wherein the distance Db from at least a portion of the second contour of the projection region from the second semiconductor element to the mounting surface in the first direction to at least a portion of the outer edge of the substrate adhesive surface, which is the adhesive surface of the adhesive material to the wiring substrate, is smaller than the width Dc.

12. The distance in the first direction from the substrate bonding surface to at least a portion of the outer edge of the bonding surface of the adhesive material to the second semiconductor element is defined as height Hb. The height HD is defined as the distance in the first direction from the substrate bonding surface to at least a portion of the inner end of the bonding surface of the adhesive material to the second semiconductor element. The module according to claim 1, wherein the height Hb is smaller than the height Hd.

13. The second semiconductor element has a second opposing surface facing the mounting surface and a second opposite surface on the opposite side of the second opposing surface. The height HD is defined as the distance in the first direction from the substrate bonding surface to at least a portion of the inner end of the bonding surface of the adhesive material to the second semiconductor element. The distance in the first direction from the substrate bonding surface to the second opposite surface is defined as the height Hf. The module according to claim 1, wherein the height Hd is less than or equal to the height Hf.

14. The module according to claim 1, wherein the linear distance Lb from at least a portion of the edge of the second bonding surface of the adhesive material to the second semiconductor element to at least a portion of the outer edge of the substrate bonding surface is less than √2 times the width Dc.

15. The module according to claim 1, satisfying at least one of the following: the width Dc is 200 μm or less, the thickness Ta and the thickness Tb are 100 μm or less, and the distance Da is 100 μm or less.

16. The first semiconductor element has a first opposing surface facing the mounting surface and a first opposite surface on the opposite side from the first opposing surface. The second semiconductor element has a second opposing surface facing the mounting surface and a second opposing surface on the opposite side of the second opposing surface. The module according to claim 1, wherein the adhesive does not adhere to at least a portion of the first opposite surface and at least a portion of the second opposite surface.

17. The first opposite surface is composed of a first semiconductor layer included in the first semiconductor element, and the second opposite surface is composed of a second semiconductor layer included in the second semiconductor element. The first opposite surface is composed of a first insulating film covering the first semiconductor layer included in the first semiconductor element, and the distance between the first opposite surface and the first semiconductor layer is 100 μm or less, The module according to claim 16, wherein the second opposite surface is composed of a second insulating film covering a second semiconductor layer included in the second semiconductor element, and the distance between the second opposite surface and the first semiconductor layer is 100 μm or less, satisfying at least one of these conditions.

18. The mounting surface includes electronic components, The module according to claim 1, wherein the distance from the first semiconductor element to the electronic component is 2 mm or less.

19. The module according to claim 1, wherein the first semiconductor element and the second semiconductor element are any of a memory, a processor, a sensor, and a display.

20. The circuit board is further arranged on the side opposite to the mounting surface of the aforementioned wiring board, The module according to claim 1, wherein the wiring board and the circuit board are electrically connected.

21. The module according to claim 20, wherein an electronic component is provided between the wiring board and the circuit board.

22. The module according to claim 1, comprising a plate-shaped member disposed on the opposite side from the wiring substrate side to the first semiconductor element and the second semiconductor element, wherein the distance between the plate-shaped member and the first semiconductor element is less than the thickness Tc of the first semiconductor element, and the distance between the plate-shaped member and the second semiconductor element is less than the thickness Td of the first semiconductor element.

23. A first module which is a module according to any one of claims 1 to 22, A second module electrically connected to the first module, Equipment equipped with the following features.

24. The apparatus according to claim 23, further comprising a flexible wiring member for connecting the first module and the second module.

25. The apparatus according to claim 23, which is any of the video equipment, printing equipment, medical equipment, and industrial equipment.

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