Semiconductor equipment

Abstract

The present invention provides a semiconductor device that can suppress the increase in on-resistance. [Solution] The first source electrode section 14 comprises a first source electrode 141, a plurality of first sources FP142 which are field plates, and a first source connection section 143 which connects the first source electrode 141 and the first sources FP142. The second source electrode section 15 comprises a second source electrode 151, a plurality of second sources FP152 which are field plates, and a second source connection section 153 which connects the second source electrode 151 and the second sources FP152. Some of the plurality of first sources FP142 are positioned closer to the substrate 10 or further away from the substrate than some of the plurality of second sources FP152.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device.

Background Art

[0002] A lateral switching element such as a HEMT (High Electron Mobility Transistor) includes a drain electrode, a gate electrode, a source electrode disposed on the upper surface side of a substrate, and an insulating film covering each electrode. Then, the breakdown voltage of the device is ensured by the distance between the drain electrode and the gate electrode and the distance between the drain electrode and the substrate.

[0003] Furthermore, by extending an FP (Field Plate) from the source electrode and the gate electrode toward the drain electrode, electric field lines extend from the drain electrode to the FP and the electric field spreads, so that the electric field concentration is alleviated and the breakdown voltage is improved (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In a HEMT, two source electrodes are provided, two gate electrodes are provided between the two source electrodes, and by appropriately switching the applied voltage to each electrode, either one or the other source electrode can be used as the drain electrode in a bidirectional manner.

[0006] In such a bidirectional HEMT, consider the case where FPs are formed on each source electrode and each FP is placed in the same layer. In this case, if each FP is extended beyond the center of the HEMT element, interference between the FPs will occur, so each FP can only be extended up to just before the center. Also, in order to ensure the dielectric strength of the insulating film is sufficient for the rated voltage, the distance between FPs must be increased to a certain extent. Therefore, the distance between the two source electrodes must be increased in accordance with the arrangement of the two FPs, which increases the on-resistance.

[0007] In view of the above, this disclosure aims to provide a semiconductor device that can suppress an increase in on-resistance. [Means for solving the problem]

[0008] To achieve the above objective, according to one aspect of this disclosure, the semiconductor device comprises a substrate (10), two gate electrodes (16) disposed on the upper surface of the substrate, a first source electrode portion (14) disposed on the upper surface of the substrate, and a second source electrode portion (15) disposed on the upper surface of the substrate, separated from the first source electrode portion, wherein the first source electrode portion comprises a first source electrode (141), a plurality of first source FPs (142) which are field plates, and a first source connection portion (143) connecting the first source electrode and the first source FP, wherein the second source electrode portion comprises a second source electrode (151), a plurality of second source FPs (152) which are field plates, and a second source connection portion (153) connecting the second source electrode and the second source FP, wherein some of the plurality of first source FPs are located closer to or further from the substrate than some of the plurality of second source FPs.

[0009] In this way, some of the multiple first source FPs are positioned closer to or further from the substrate than some of the multiple second source FPs. This makes it possible to position the first and second source FPs beyond the center of the element from the first and second source electrodes without interfering with each other, and suppresses the increase in on-resistance that occurs with increasing distance between the first and second source electrodes.

[0010] The reference numerals in parentheses attached to each component indicate an example of the correspondence between that component and the specific components described in the embodiments described later. [Brief explanation of the drawing]

[0011] [Figure 1] This is a top view of a semiconductor device according to the first embodiment. [Figure 2] This is a cross-sectional view taken along line II-II in Figure 1. [Figure 3] This is a cross-sectional view of the comparative example. [Figure 4] This is a top view of a semiconductor device according to a second embodiment. [Figure 5] Figure 4 is a VV cross-sectional view. [Modes for carrying out the invention]

[0012] The embodiments of this disclosure will be described below with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other will be denoted by the same reference numerals.

[0013] (First Embodiment) A first embodiment will be described. The semiconductor device 1 of this embodiment, shown in Figures 1 and 2, is equipped with a lateral GaN (gallium nitride)-HEMT element using a WBG (wide bandgap) material. Multiple GaN-HEMT elements are formed on the semiconductor device 1. In Figures 1 and 2, two adjacent GaN-HEMT elements are shown among the multiple GaN-HEMT elements provided on the semiconductor device 1.

[0014] Although Figure 1 is not a cross-sectional view, hatching has been applied to the first source electrode section 14, the second source electrode section 15, and the gate electrode section 16, which will be described later, for ease of understanding. In Figure 1, the first insulating film 18 and the second insulating film 19, which will be described later, are not shown.

[0015] As shown in FIG. 2, the semiconductor device 1 includes a substrate 10. The substrate 10 is made of GaN. On the upper surface of the substrate 10, a buffer layer 11 made of GaN is laminated. On the upper surface of the buffer layer 11, an electron traveling layer 12 and an electron supply layer 13 are laminated in this order.

[0016] The electron traveling layer 12 is made of a GaN-based semiconductor material, and the electron supply layer 13 is made of a GaN-based semiconductor material having a larger bandgap energy than the material of the electron traveling layer 12. And, a heterojunction structure is formed by the electron traveling layer 12 and the electron supply layer 13, and 2DEG (two-dimensional electron gas) carriers are formed on the electron traveling layer 12 side.

[0017] In the present embodiment, the electron traveling layer 12 is made of GaN, and the electron supply layer 13 is made of AlGaN (aluminum gallium nitride). Two directions that are parallel to the upper surfaces of the substrate 10 to the electron supply layer 13 and perpendicular to each other are defined as the x direction and the y direction, respectively, and the thickness direction or the stacking direction of the substrate 10 to the electron supply layer 13 that is perpendicular to the x direction and the y direction is defined as the z direction.

[0018] As shown in FIGS. 1 and 2, a first source electrode portion 14 and a second source electrode portion 15 are formed on the upper surface of the electron supply layer 13. The first source electrode portion 14 and the second source electrode portion 15 are arranged in a state of being separated from each other with a first insulating film 18 and a second insulating film 19, which will be described later, interposed therebetween, and are electrically insulated.

[0019] The first source electrode portion 14 includes a first source electrode 141, a plurality of first source FPs 142, and a first source connection portion 143. The second source electrode portion 15 includes a second source electrode 151, a plurality of second source FPs 152, and a second source connection portion 153. The first source electrode 141 and the second source electrode 151 are made of Al (aluminum) or the like and are formed on the upper surface of the electron supply layer 13.

[0020] As described above, the semiconductor device 1 includes a plurality of HEMT elements, and each HEMT element includes one first source electrode 141 and one second source electrode 151. The plurality of first source electrodes 141 and second source electrodes 151 included in the semiconductor device 1 are alternately arranged in the x direction with a gap on the upper surface of the electron supply layer 13, and two adjacent HEMT elements share the first source electrode 141 or the second source electrode 151. The two HEMT elements shown in FIGS. 1 and 2 share the second source electrode 151.

[0021] Two gate electrodes 16 are formed between the first source electrode 141 and the second source electrode 151. A p-GaN layer 17 is formed on the upper surface of the electron supply layer 13, and the gate electrodes 16 are formed on the upper surface of the p-GaN layer 17. The gate electrodes 16 are made of Al or the like. Of the two gate electrodes 16, the one closer to the first source electrode 141 in the x direction is the first gate electrode 161, and the one closer to the second source electrode 151 is the second gate electrode 162.

[0022] The first source FP142 and the second source FP152 are for relaxing the electric field concentration between the first source electrode 141, the second source electrode 151 and the gate electrode 16, and are made of Al or the like. A part of the plurality of first source FPs 142 is arranged closer to or farther from the substrate 10 than a part of the plurality of second source FPs 152 in the z direction.

[0023] Specifically, the plurality of first source FPs 142 include a first lower-layer source FP142a and a first upper-layer source FP142b arranged above the first lower-layer source FP142a. The plurality of second source FPs 152 include a second lower-layer source FP152a and a second upper-layer source FP152b arranged above the second lower-layer source FP152a.

[0024] In this embodiment, in each HEMT element, the first source FP142 is composed of one first lower layer source FP142a and one first upper layer source FP142b. In addition, in each HEMT element, the second source FP152 is composed of one second lower layer source FP152a and one second upper layer source FP152b.

[0025] A first insulating film 18 is formed on the upper surface of the electron supply layer 13, covering the gate electrode 16 and the p-GaN layer 17. The first insulating film 18 is made of SiN (silicon nitride) or the like. The first source electrode 141 and the second source electrode 151 penetrate the first insulating film 18 and are in contact with the upper surface of the electron supply layer 13, with the upper surface portions of the first source electrode 141 and the second source electrode 151 protruding from the upper surface of the first insulating film 18. On the upper surface of the first insulating film 18, a first lower layer source FP142a and a second lower layer source FP152a are arranged between the first source electrode 141 and the second source electrode 151.

[0026] A second insulating film 19 is formed on the upper surface of the first insulating film 18, covering the first source electrode 141, the first lower layer source FP142a, the second source electrode 151, and the second lower layer source FP152a. The second insulating film 19 is made of SiO2 (silicon oxide) or the like. On the upper surface of the second insulating film 19, the first upper layer source FP142b and the second upper layer source FP152b are arranged between the first source electrode 141 and the second source electrode 151.

[0027] In other words, the first lower layer source FP142a, which is part of the multiple first source FP142, is positioned closer to the substrate 10 in the z-direction than the second upper layer source FP152b, which is part of the multiple second source FP152. Also, the first upper layer source FP142b, which is part of the multiple first source FP142, is positioned further from the substrate 10 in the z-direction than the second lower layer source FP152a, which is part of the multiple second source FP152.

[0028] The upper surfaces of the first source electrode 141, the first lower layer source FP142a, the first upper layer source FP142b, the second source electrode 151, the second lower layer source FP152a, the second upper layer source FP152b, and the gate electrode 16 are rectangular in shape with the y-direction as the longitudinal direction.

[0029] Of the multiple first sources FP142, the first source FP142 located furthest from the first source electrode 141 is located closer to the second source electrode 151 than the multiple second sources FP152. Also, of the multiple second sources FP152, the second source FP152 located furthest from the second source electrode 151 is located closer to the first source electrode 141 than the multiple first sources FP142.

[0030] Specifically, in the xy-plane, the first upper source FP142b is located between the second lower source FP152a and the second source electrode 151, and the second upper source FP152b is located between the first lower source FP142a and the first source electrode 141. That is, we assume that the first source electrode 141, the first lower source FP142a, the first upper source FP142b, the second source electrode 151, the second lower source FP152a, and the second upper source FP152b are projected onto the upper surface of the substrate 10 in the direction normal to the upper surface of the substrate 10. In this case, the projected first upper source FP142b is located between the projected second lower source FP152a and the projected second source electrode 151. Also, the projected second upper source FP152b is located between the projected first lower source FP142a and the projected first source electrode 141. In the x-direction, the first source electrode 141, the second upper source FP152b, the first lower source FP142a, the second lower source FP152a, the first upper source FP142b, and the second source electrode 151 are arranged in this order. Also, in the xy-plane, the first gate electrode 161 is located between the first source electrode 141 and the second upper source FP152b, and the second gate electrode 162 is located between the second source electrode 151 and the first upper source FP142b.

[0031] In other words, the distance between the first upper layer source FP142b, which is the furthest from the first source electrode 141 among the multiple first sources FP142, and the second source electrode 151 is shorter than the distance between the first upper layer source FP142b and the first source electrode 141. Also, the distance between the second upper layer source FP152b, which is the furthest from the second source electrode 151 among the multiple second sources FP152, and the first source electrode 141 is shorter than the distance between the second upper layer source FP152b and the second source electrode 151.

[0032] The first source electrode 141 and the first source FP 142 are connected by a first source connection portion 143. The first source connection portion 143 includes a first lower source wiring 144a formed on the upper surface of the first insulating film 18 and a first upper source wiring 144b formed on the upper surface of the second insulating film 19. The first lower source wiring 144a and the first upper source wiring 144b are made of Al or the like.

[0033] The active region R1 is defined as the region within the substrate 10 to the second insulating film 19 that constitutes the current path between the first source electrode 141 and the second source electrode 151, and the region located below or above this region. The y-side end of the first source electrode 141, the first lower layer source FP142a, the first upper layer source FP142b, the second source electrode 151, the second lower layer source FP152a, and the second upper layer source FP152b extends outside the active region R1.

[0034] The first lower layer source wiring 144a extends in the x-direction outside the active region R1, and one end of the first lower layer source wiring 144a is connected to one end in the y-direction of the first source electrode 141. The other end of the first lower layer source wiring 144a extends to the lower part of one end in the y-direction of the first upper layer source FP142b.

[0035] Outside the active region R1, vias 145a, 145b, and 145c are formed, penetrating the second insulating film 19. Inside vias 145a to 145c, a conductive layer is formed by filling with Cu (copper), Al, etc. The first source connection portion 143 consists of a first lower source wiring 144a, a first upper source wiring 144b, and the conductive layer formed inside vias 145a to 145c. The end of the first lower source wiring 144a, which extends to the bottom of the first upper source FP142b, is electrically connected to the first upper source FP142b by via 145a.

[0036] The first upper source wiring 144b extends in the y-direction from the top of one end of the first lower source FP 142a in the y-direction to the top of the first lower source wiring 144a. One end of the first upper source wiring 144b is connected to the first lower source FP 142a by via 145b, and the other end is connected to the first lower source wiring 144a by via 145c. The first lower source FP 142a and the first lower source wiring 144a are electrically connected by the first upper source wiring 144b and vias 145b and 145c.

[0037] The second source electrode 151 and the second source FP 152 are connected by a second source connection portion 153. The second source connection portion 153 includes a second source wiring 154 formed on the upper surface of the first insulating film 18. The second source wiring 154 is made of Al or the like.

[0038] The second source wiring 154 extends in the x-direction outside the active region R1. One end of the second source wiring 154 extends under the y-side end of the second upper source FP152b, and the other end is connected to the y-side end of the second source electrode 151.

[0039] Outside the active region R1, vias 155 are formed that penetrate the second insulating film 19. Inside the vias 155, a conductive layer is formed by filling with Cu, Al, etc. The second source connection portion 153 consists of the second source wiring 154 and the conductive layer formed inside the vias 155.

[0040] Via 155 is formed on the upper part of one end of the second source wiring 154, and the second source wiring 154 is electrically connected by via 155 to one end in the y direction of the second upper layer source FP152b.

[0041] The second source wiring 154 is connected to one end of the second lower source FP152a in the y-direction, in the portion between the portion connected to the second upper source FP152b and the portion connected to the second source electrode 151.

[0042] With this configuration of the first source electrode 141, first source FP142, first source connection part 143, second source electrode 151, second source FP152, and second source connection part 153, the upper surfaces of the first source electrode section 14 and the second source electrode section 15 are comb-shaped. The first source connection part 143 connects the first source electrode 141 and the first source FP142 outside the active region R1, and the second source connection part 153 connects the second source electrode 151 and the second source FP152 outside the active region R1. The first source electrode section 14 and the second source electrode section 15 intersect in a three-dimensional manner outside the active region R1, at a distance greater than that which ensures voltage resistance reliability.

[0043] As mentioned above, the two adjacent HEMT elements shown in Figures 1 and 2 share a second source electrode 151. These two HEMT elements are symmetrical in the xy-plane with respect to the central axis of the second source electrode 151. The end of the first lower layer source wiring 144a of each HEMT element opposite to the first source electrode 141 extends to the end of the first upper layer source FP142b and is connected in the vicinity of the second source electrode 151. In addition, the second source wiring 154 of each HEMT element is connected in the vicinity of the second source electrode 151.

[0044] Furthermore, vias (not shown) are formed on the upper parts of the first source electrode portion 14 and the second source electrode portion 15, penetrating the second insulating film 19. The first source electrode portion 14 and the second source electrode portion 15 are connected to an external circuit by a conductive layer formed on these vias and a wiring layer (not shown) formed on the upper surface of the second insulating film 19.

[0045] A method for manufacturing the semiconductor device 1 will now be described. First, a substrate 10 made of GaN is prepared, and a buffer layer 11, an electron transport layer 12, an electron supply layer 13, and a p-GaN layer 17 are epitaxially grown in order. A gate electrode 16 is formed on the upper surface of the electron supply layer 13 using sputtering or the like. A first insulating film 18 is formed using CVD (Chemical Vapor Deposition) or the like, covering the upper surface of the electron supply layer 13, the gate electrode 16, and the p-GaN layer 17.

[0046] Next, a portion of the first insulating film 18 is removed using dry etching or the like. A layer made of Al or the like is formed on this removed portion and the upper surface of the first insulating film 18 using sputtering or the like. This forms the first source electrode 141, the first lower layer source FP142a, the first lower layer source wiring 144a, the second source electrode 151, the second lower layer source FP152a, and the second source wiring 154. The second insulating film 19 is formed using CVD or the like, covering the upper surface of the first insulating film 18, the first source electrode 141, the first lower layer source FP142a, the first lower layer source wiring 144a, the second source electrode 151, the second lower layer source FP152a, and the second source wiring 154.

[0047] Furthermore, a portion of the second insulating film 19 is removed using dry etching or the like to form vias 145a to 145c and 155. Layers made of Al or the like are formed inside the vias 145a to 145c and 155 and on the upper surface of the second insulating film 19 using sputtering or the like. This forms the conductive layer inside the vias 145a to 145c and 155, the first upper source FP142b, the first upper source wiring 144b, and the second upper source FP152b. In this way, the semiconductor device 1 shown in Figures 1 and 2 is formed.

[0048] The operation of the semiconductor device 1 will now be described. In the semiconductor device 1, switching operation is performed by controlling the voltage applied to the two gate electrodes 16. In the semiconductor device 1, the first source electrode 141 or the second source electrode 151 is used as the drain electrode by appropriately switching the voltage applied to each electrode.

[0049] When the first source electrode 141 is used as the drain electrode, a high voltage is applied to the first source electrode 141, and a voltage lower than that applied to the second source electrode 151 is applied to the second source electrode 151, or the second source electrode 151 is set to ground potential.

[0050] 2DEG (two-dimensional electron gas) carriers are induced in the upper surface layer of the electron transport layer 12 due to the piezoelectric and polarization effects. However, because a p-GaN layer 17 is formed on the upper surface of the electron supply layer 13, when no voltage is applied to the gate electrode 16, carriers are depleted below the p-GaN layer 17, and no current flows between the first source electrode 141 and the second source electrode 151. In other words, the semiconductor device 1 operates in normally-off mode.

[0051] To turn on the semiconductor device 1, a voltage equal to the voltage of the first source electrode 141 plus a predetermined threshold voltage is applied to the first gate electrode 161, and a voltage equal to the voltage of the second source electrode 151 plus a predetermined threshold voltage is applied to the second gate electrode 162. This eliminates carrier depletion in the lower part of the p-GaN layer 17, and current flows from the first source electrode 141 to the second source electrode 151.

[0052] When the second source electrode 151 is used as the drain electrode, a high voltage is applied to the second source electrode 151, and a voltage lower than that of the second source electrode 151 is applied to the first source electrode 141, or the first source electrode 141 is set to ground potential. Then, by applying a voltage to the first gate electrode 161 that is the voltage of the first source electrode 141 plus a predetermined threshold voltage, and by applying a voltage to the second gate electrode 162 that is the voltage of the second source electrode 151 plus a predetermined threshold voltage, the semiconductor device 1 is turned ON.

[0053] The effects of this embodiment will now be explained. Assume that the entirety of the first source FP142 and the second source FP152 are formed on the upper surface of the first insulating film 18 and extend in the x direction from the first source electrode 141 and the second source electrode 151. In this case, if the first source FP142 and the second source FP152 are extended beyond the center of the HEMT element, interference between the first source FP142 and the second source FP152 will occur. Therefore, as shown in Figure 3, the first source FP142 and the second source FP152 can only be extended up to just before the center.

[0054] Furthermore, in order to ensure sufficient voltage resistance, the distance L between the tip of the first source FP142 and the tip of the second source FP152 needs to be increased to a certain extent. Therefore, depending on the arrangement of the first source FP142 and the second source FP152, the distance between the first source electrode 141 and the second source electrode 151 needs to be increased, which increases the on-resistance. In addition, electric field lines extend between the tip of the first source FP142 and the tip of the second source FP152, and a new electric field concentration occurs.

[0055] In contrast, in this embodiment, the first source electrode 141 and the first source FP142 are connected outside the active region R1, and the second source electrode 151 and the second source FP152 are connected outside the active region R1. Furthermore, the first source FP142 and the second source FP152 are arranged three-dimensionally, separated on the upper surface of the first insulating film 18 and the upper surface of the second insulating film 19. This makes it possible to position the first source FP142 and the second source FP152 beyond the center of the HEMT element shown by the dashed line L1 in Figure 2, relative to the first source electrode 141 and the second source electrode 151. Therefore, it is possible to suppress the increase in on-resistance that occurs with increasing distance between the first source electrode 141 and the second source electrode 151 while ensuring sufficient breakdown voltage.

[0056] Furthermore, by arranging the first source FP142 and the second source FP152 three-dimensionally, it becomes possible to arrange them symmetrically. This allows for the relaxation of the electric field between multiple FPs in both cases: when the first source electrode 141 is used as the drain electrode, and when the second source electrode 151 is used as the drain electrode.

[0057] In other words, when the first source electrode 141 is used as the drain electrode and the first upper layer source FP142b reaches a high potential, the electric field concentration between the first upper layer source FP142b and the second gate electrode 162 can be dispersed and mitigated in the direction of the second lower layer source FP152a. Also, when the second source electrode 151 is used as the drain electrode and the second upper layer source FP152b reaches a high potential, the electric field concentration between the second upper layer source FP152b and the first gate electrode 161 can be dispersed and mitigated in the direction of the first lower layer source FP142a.

[0058] As described above, in this embodiment, some of the multiple first source FP142s are positioned closer to the substrate 10 or further away from the substrate 10 than some of the multiple second source FP152s. This makes it possible to position the first source FP142s and second source FP152s beyond the center of the HEMT element from the first source electrode 141 and second source electrode 151 without interfering with each other. Therefore, it is possible to suppress the increase in on-resistance that occurs with increasing distance between the first source electrode 141 and the second source electrode 151.

[0059] Furthermore, according to the above embodiment, the following effects can be obtained.

[0060] (1) Of the multiple first sources FP142, the first source FP142 furthest from the first source electrode 141 is located closer to the second source electrode 151 than the multiple second sources FP152. Also, of the multiple second sources FP152, the second source FP152 furthest from the second source electrode 151 is located closer to the first source electrode 141 than the multiple first sources FP142. When the FP closest to the source electrode is at the same potential as the source electrode, the effect of mitigating the electric field applied to the source electrode in the direction of the FP decreases. In contrast, by arranging the first source FP142 and second source FP152 as described above, it becomes possible to mitigate the high electric field applied to the first source electrode 141 in the direction of the second source FP152 closest to the first source electrode 141. Also, it becomes possible to mitigate the high electric field applied to the second source electrode 151 in the direction of the first source FP142 closest to the second source electrode 151.

[0061] (2) The distance between the first source FP142 that is furthest from the first source electrode 141 and the second source electrode 151 is shorter than the distance between the first source FP142 and the first source electrode 141. Also, the distance between the second source FP152 that is furthest from the second source electrode 151 and the first source electrode 141 is shorter than the distance between the second source FP152 and the second source electrode 151. As a result, the FPs are placed beyond the center of the HEMT element, and the high electric field applied to the first source electrode 141 and the second source electrode 151 can be more efficiently mitigated using a wide area of ​​the first insulating film 18.

[0062] (3) The multiple first source FP142 includes a first lower layer source FP142a and a first upper layer source FP142b positioned above the first lower layer source FP142a. Similarly, the multiple second source FP152 includes a second lower layer source FP152a and a second upper layer source FP152b positioned above the second lower layer source FP152a. By arranging the first source FP142 and the second source FP152 in multiple layers in this way, the first source FP142 and the second source FP152 can be arranged symmetrically with respect to the center of the HEMT element shown by the dashed line L1 in Figure 2. Therefore, the same characteristics regarding the relaxation of the electric field by FP can be obtained whether the first source electrode 141 is used as the drain electrode or the second source electrode 151 is used as the drain electrode.

[0063] (4) In the xy plane, the first upper source FP142b is located between the second lower source FP152a and the second source electrode 151, and the second upper source FP152b is located between the first lower source FP142a and the first source electrode 141. According to this, the first upper source FP142b can mitigate the electric field from the second source electrode 151 and the second lower source FP152a. In addition, the second upper source FP152b can mitigate the electric field from the first source electrode 141 and the first lower source FP142a.

[0064] (5) The first source connection section 143 connects the first source electrode 141 and the first source FP142 outside the active region R1, and the second source connection section 153 connects the second source electrode 151 and the second source FP152 outside the active region R1. In addition, the first source electrode section 14 and the second source electrode section 15 intersect in a three-dimensional manner outside the active region R1. This allows the first source FP142 and the second source FP152 to be arranged symmetrically within the active region R1. Therefore, it is possible to obtain the same characteristics regarding the relaxation of the electric field by FP whether the first source electrode 141 is used as the drain electrode or the second source electrode 151 is used as the drain electrode. Furthermore, compared to the case where the first source electrode 141 and the first source FP142 are connected within the active region R1, the electrode area of ​​the parallel plate capacitor with the gate electrode 16 and the first source FP142 as electrodes is reduced. Furthermore, compared to the case where the second source electrode 151 and the second source FP152 are connected within the active region R1, the electrode area of ​​the parallel plate capacitor with the gate electrode 16 and the second source FP152 as electrodes is reduced. Therefore, the gate-source capacitance can be reduced.

[0065] (Second Embodiment) A second embodiment will now be described. This embodiment is the same as the first embodiment except that the number of first source FP142 and second source FP152 has been changed. Therefore, only the differences from the first embodiment will be described.

[0066] In the first embodiment, a case was described in which one HEMT element comprises two first sources FP142 and two second sources FP152. However, within the range in which the breakdown voltage of the first insulating film 18 and the second insulating film 19 between the first source electrode portion 14 and the second source electrode portion 15 is maintained, three or more of either or both of the first sources FP142 and the second sources FP152 may be formed.

[0067] In other words, at least one of the first lower layer source FP142a, first upper layer source FP142b, second lower layer source FP152a, and second upper layer source FP152b may be formed in multiple quantities and arranged in the x direction. In the example shown in Figures 4 and 5, in the xy plane, two first lower layer sources FP142a and two second lower layer sources FP152a are arranged between the first upper layer source FP142b and the second upper layer source FP152b.

[0068] Although Figure 4 is not a cross-sectional view, hatching has been applied to the first source electrode portion 14, the second source electrode portion 15, and the gate electrode portion 16 for ease of understanding. In Figure 4, the first insulating film 18 and the second insulating film 19 are not shown.

[0069] This embodiment, with the same configuration and operation as the first embodiment, can obtain the same effects as the first embodiment.

[0070] Furthermore, according to the above embodiment, the following effects can be obtained.

[0071] (1) At least one of the first lower layer source FP142a, first upper layer source FP142b, second lower layer source FP152a, and second upper layer source FP152b is formed in multiples and arranged in the x direction. By increasing the number of first source FP142 and second source FP152, electric field concentration is further reduced and the breakdown voltage of semiconductor device 1 is further improved.

[0072] (Other embodiments) Furthermore, this disclosure is not limited to the embodiments described above and can be modified as appropriate. It goes without saying that, in each of the embodiments described above, the elements constituting the embodiment are not necessarily essential unless explicitly stated to be particularly essential or considered fundamentally essential. Also, in each of the embodiments described above, if numerical values ​​such as the number, numerical values, quantities, or ranges of the components of the embodiment are mentioned, the embodiments are not limited to those specific numbers unless explicitly stated to be particularly essential or considered fundamentally limited to those specific numbers. Furthermore, in each of the embodiments described above, if the shape, positional relationship, etc., of the components are mentioned, the embodiments are not limited to those shapes, positional relationships, etc., unless explicitly stated or considered fundamentally limited to those specific shapes, positional relationships, etc.

[0073] For example, the entirety of multiple first sources FP142 may be positioned above or below the entirety of multiple second sources FP152. Also, the FP closest to the first source electrode 141 may be the first source FP142, or the FP closest to the second source electrode 151 may be the second source FP152.

[0074] Furthermore, the distance between the first source FP142, which is furthest from the first source electrode 141, and the second source electrode 151 may be longer than the distance between the first source FP142 and the first source electrode 141. Also, the distance between the second source FP152, which is furthest from the second source electrode 151, and the first source electrode 141 may be longer than the distance between the second source FP152 and the second source electrode 151.

[0075] Furthermore, multiple first sources FP142 may be formed entirely in the same layer, or multiple second sources FP152 may be formed entirely in the same layer. Also, the first source FP142 closest to the second source electrode 151 may be the first lower layer source FP142a, or the second source FP152 closest to the first source electrode 141 may be the second lower layer source FP152a.

[0076] Furthermore, parts of the first source connection portion 143 and the second source connection portion 153 may be included in the active region R1. Also, the first source electrode portion 14 and the second source electrode portion 15 may intersect in three dimensions within the active region R1.

[0077] Furthermore, the semiconductor device 1 may include HEMT elements other than GaN-HEMT elements. That is, the semiconductor device 1 may include HEMT elements having a substrate 10, etc., made of a WBG material other than a GaN-based material. Also, the semiconductor device 1 may include bidirectional lateral elements other than HEMTs. For example, the semiconductor device 1 may include Lateral MOS (Metal Oxide Semiconductor). Also, the p-GaN layer 17 may not be formed, and the gate electrode 16 may be formed on the upper surface of the electron supply layer 13. [Explanation of symbols]

[0078] 10 circuit boards 14. First source electrode section 141 First Source Electrode 142 First Source FP 143 First Source Connection Section 15. Second source electrode section 151 Second source electrode 152 Second Source FP 153 Second Source Connection Section 16 Guard Station

Claims

1. A semiconductor device, The substrate (10) and Two gate electrodes (16) are arranged on the upper surface side of the substrate, The first source electrode portion (14) is located on the upper surface side of the substrate, The substrate comprises a second source electrode portion (15) positioned on the upper surface side, separated from the first source electrode portion, The first source electrode section comprises a first source electrode (141), a plurality of first source FPs (142) which are field plates, and a first source connection section (143) which connects the first source electrode and the first source FPs. The second source electrode section comprises a second source electrode (151), a plurality of second source FPs (152) which are field plates, and a second source connection section (153) which connects the second source electrode and the second source FPs. A semiconductor device in which a portion of the plurality of first source FPs is located closer to or further from the substrate than a portion of the plurality of second source FPs.

2. The first source FP located furthest from the first source electrode among the multiple first source FPs is located closer to the second source electrode than the multiple second source FPs. The semiconductor device according to claim 1, wherein the second source FP located furthest from the second source electrode among the plurality of second source FPs is located closer to the first source electrode than the plurality of first source FPs.

3. The distance between the first source FP located furthest from the first source electrode and the second source electrode is shorter than the distance between the first source FP and the first source electrode. The semiconductor device according to claim 2, wherein the distance between the second source FP located furthest from the second source electrode and the first source electrode is shorter than the distance between the second source FP and the second source electrode.

4. The plurality of first source FPs include a first lower source FP (142a) and a first upper source FP (142b) positioned above the first lower source FP. The semiconductor device according to claim 2, wherein the plurality of second source FPs include a second lower layer source FP (152a) and a second upper layer source FP (152b) positioned above the second lower layer source FP.

5. When the first source electrode, the first lower layer source FP, the first upper layer source FP, the second source electrode, the second lower layer source FP, and the second upper layer source FP are projected onto the upper surface of the substrate in the direction normal to the upper surface of the substrate, The projected first upper source FP is located between the projected second lower source FP and the projected second source electrode. The semiconductor device according to claim 4, wherein the projected second upper source FP is located between the projected first lower source FP and the projected first source electrode.

6. The semiconductor device according to claim 4, wherein at least one of the first lower layer source FP, the first upper layer source FP, the second lower layer source FP, and the second upper layer source FP is formed in multiples and arranged in a direction parallel to the upper surface of the substrate.

7. The region constituting the current path between the first source electrode and the second source electrode is defined as the active region (R1), The first source connection section connects the first source electrode and the first source FP outside the active region. The second source connection section connects the second source electrode and the second source FP outside the active region. The semiconductor device according to claim 1, wherein the first source electrode portion and the second source electrode portion intersect in a three-dimensional manner outside the active region.

8. The electron transport layer (12) formed on the upper surface side of the substrate, The electron supply layer (13) is formed on the upper surface of the electron transport layer, The semiconductor device according to claim 1, wherein the two gate electrodes, the first source electrode portion, and the second source electrode portion are formed on the upper surface side of the electron supply layer.

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