Multilayer ceramic electronic components

Abstract

The present invention provides a multilayer ceramic electronic component that can reduce the occurrence of short circuits caused by contact between external electrodes. [Solution] A multilayer ceramic electronic component comprising: a plurality of ceramic layers stacked in a first axial direction; a first internal electrode layer and a second internal electrode layer, each alternately stacked via the ceramic layers; a laminate having a first side surface perpendicular to the second axial direction and orthogonal to the first axial direction; and a second side surface opposite to the first side surface; a first side margin portion covering the first side surface and having a first opening formed therein that reaches a first region of the first side surface; and a second side margin portion covering the second side surface, wherein the first internal electrode layer has a first surface to which at least a portion is located on the first side surface, the second internal electrode layer has a second surface to which at least a portion is located on the first side surface, the first surface includes the first region, and the second surface is separated from the first region.

Description

Technical Field

[0001] The present invention relates to a multilayer ceramic electronic component.

Background Art

[0002] In recent years, with the high-capacity requirements from the market, multilayer ceramic capacitors in various forms such as high multilayer type and thin layer type have been used.

[0003] As an example, Patent Document 1 discloses a multi-terminal multilayer ceramic capacitor having three or more external electrode terminals for reducing ESR (Equivalent Series Resistance).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In recent years, there has been a demand for the development of a multilayer ceramic capacitor in which the occurrence of a short circuit due to the contact between external electrodes arranged adjacent to the surface of the multilayer ceramic capacitor is reduced.

[0006] An object of the present invention is to provide a multilayer ceramic electronic component capable of reducing the occurrence of a short circuit due to the contact between external electrodes.

Means for Solving the Problems

[0007] According to one aspect of the present invention, the multilayer ceramic electronic component is A laminate comprising: a plurality of ceramic layers stacked in the first axial direction; a first internal electrode layer and a second internal electrode layer, each alternately stacked via the ceramic layers; a first side surface perpendicular to the second axial direction and orthogonal to the first axial direction; and a second side surface opposite to the first side surface. A first side margin portion that covers the first side surface and has a first opening formed that reaches a first region of the first side surface, It comprises a second side margin portion that covers the second side surface, The first internal electrode layer has a first surface, at least a portion of which is located on the first side surface, The second internal electrode layer has a second surface, at least a portion of which is located on the first side surface. The first surface includes the first region, The second surface is separate from the first region. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide a multilayer ceramic electronic component that can reduce the occurrence of short circuits due to contact between external electrodes. [Brief explanation of the drawing]

[0009] [Figure 1] This is a schematic perspective view showing a multilayer ceramic electronic component 100 according to the first embodiment of the present invention. [Figure 2] Figure 1 shows a schematic cross-sectional view of the multilayer ceramic electronic component 100 when cut along line AA'. [Figure 3] Figure 1 shows a schematic cross-sectional view of the multilayer ceramic electronic component 100 when cut along the BB' line. [Figure 4A] Figure 1 is a schematic plan view of the first internal electrode layer 12 in the multilayer ceramic electronic component 100, as seen from the first axial direction. [Figure 4B] Figure 1 is a schematic plan view of the second internal electrode layer 13 in the multilayer ceramic electronic component 100, as seen from the first axial direction. [Figure 4C]This is a schematic plan view of the first internal electrode layer 12 in Figure 4A, the ceramic layer 11, and the second internal electrode layer 13 in Figure 4B, when stacked in order and viewed through from the first axis direction. [Figure 4D] This is a schematic plan view of the first side margin portion 171 located on the first side surface of the laminate 16 in the multilayer ceramic electronic component 100 shown in Figure 1, as viewed from the Y-axis direction. [Figure 4E] This is a schematic plan view of the second side margin portion 172 located on the second side surface of the laminate 16 in the multilayer ceramic electronic component 100 shown in Figure 1, as viewed from the Y-axis direction. [Figure 5] This is a schematic plan view taken from the first axial direction after sequentially stacking the first internal electrode layer 12 in Figure 4A, the ceramic layer 11, and the second internal electrode layer 13 in Figure 4B, and arranging the first side margin portion 171 and the second side margin portion 172 on the first side surface 16a and the second side surface 16b, respectively. [Figure 6] This is a schematic perspective view showing a multilayer ceramic electronic component 101 according to a second embodiment of the present invention. [Figure 7A] Figure 6 is a schematic plan view of the first internal electrode layer 12 in the multilayer ceramic electronic component 101, as seen from the first axial direction. [Figure 7B] Figure 6 is a schematic plan view of the second internal electrode layer 13 in the multilayer ceramic electronic component 101, as seen from the first axial direction. [Figure 7C] This is a schematic plan view of the first internal electrode layer 12 in Figure 7A, the ceramic layer 11, and the second internal electrode layer 13 in Figure 7B, when stacked in order and viewed through from the first axis direction. [Figure 7D] Figure 6 is a schematic plan view of the first side margin portion 171 located on the first side surface of the laminate 16 in the multilayer ceramic electronic component 101, as seen from the Y-axis direction. [Figure 7E] This is a schematic plan view of the second side margin portion 172 located on the second side surface of the laminate 16 in the multilayer ceramic electronic component 101 shown in Figure 1, as viewed from the Y-axis direction. [Figure 8]The first internal electrode layer 12 in FIG. 7A, the ceramic layer 11, and the second internal electrode layer 13 in FIG. 7B are laminated in this order, and after arranging the first side margin portion 171 and the second side margin portion 172 with respect to the first side surface 16a and the second side surface 16b, respectively, it is a schematic plan view when viewed in perspective from the first axial direction. [Figure 9A] It is a schematic perspective view showing a multilayer ceramic capacitor 1000 according to a third embodiment of the present invention. [Figure 9B] It is a schematic perspective view showing a multilayer ceramic capacitor 1001 according to a fourth embodiment of the present invention. [Figure 10] It is a flowchart showing a method for manufacturing a multilayer ceramic capacitor according to the present invention.

Embodiments for Carrying Out the Invention

[0010] Conventionally, short-circuiting of external electrodes in multilayer ceramic capacitors has been prevented by increasing the viscosity of the paste for forming external electrodes or improving the coating accuracy of the paste for forming external electrodes during the manufacturing process of the multilayer ceramic capacitors. On the other hand, in recent years, in multilayer ceramic capacitors that are becoming smaller, further coating accuracy of the paste for forming external electrodes has been required, and it has been necessary to control the wet spreading of the paste for forming external electrodes.

[0011] The inventors have found that the above means alone are insufficient as means for preventing short-circuiting of external electrodes in multilayer ceramic capacitors that are becoming smaller in recent years, and as a result of intensive studies to prevent problems caused by such short-circuiting, they have come up with the following embodiments.

[0012] (Multilayer Ceramic Electronic Component) The multilayer ceramic electronic component of the present invention includes a laminate, a first side margin portion, and a second side margin portion, and may include other parts as necessary.

[0013] The first embodiment of the present invention will be described in detail below, but the present invention is not limited thereto. In this specification and drawings, components having substantially the same functional configuration are denoted by the same reference numerals to avoid redundant descriptions. In addition, the drawings show mutually orthogonal X, Y, and Z axes as appropriate. In the first embodiment of the present invention, the X axis corresponds to the third axis, the Y axis corresponds to the second axis, and the Z axis corresponds to the first axis.

[0014] [Figures 1-5] Figure 1 is a schematic perspective view showing a multilayer ceramic electronic component 100 according to a first embodiment of the present invention. Figure 2 is a schematic cross-sectional view of the multilayer ceramic electronic component 100 of Figure 1 when cut along line AA'. Figure 3 is a schematic cross-sectional view of the multilayer ceramic electronic component 100 of Figure 1 when cut along line BB'. Figure 4A is a schematic plan view of the first internal electrode layer 12 of the multilayer ceramic electronic component 100 of Figure 1, viewed from the first axis direction. Figure 4B is a schematic plan view of the second internal electrode layer 13 of the multilayer ceramic electronic component 100 of Figure 1, viewed from the first axis direction. Figure 4C is a schematic plan view of the first internal electrode layer 12 of Figure 4A, the ceramic layer 11, and the second internal electrode layer 13 of Figure 4B stacked in order and viewed through from the first axis direction. Figure 4D is a schematic plan view of the first side margin portion 171 located on the first side surface of the laminate 16 of the multilayer ceramic electronic component 100 of Figure 1, viewed from the Y axis direction. Figure 4E is a schematic plan view of the second side margin portion 172 located on the second side surface of the laminate 16 in the multilayer ceramic electronic component 100 of Figure 1, as seen from the Y-axis direction. Figure 5 is a schematic plan view of the first internal electrode layer 12 of Figure 4A, the ceramic layer 11, and the second internal electrode layer 13 of Figure 4B, as seen through from the first axis direction, after the first side margin portion 171 and the second side margin portion 172 have been sequentially laminated and the first side surface 16a and the second side surface 16b, respectively.

[0015] As shown in Figures 1 to 3, the multilayer ceramic electronic component 100 of the first embodiment comprises a laminate 16, a first side margin portion 171, and a second side margin portion 172.

[0016] <Laminate> As shown in Figures 1 to 3, the laminate 16 has a plurality of ceramic layers 11 stacked in the first axial direction (Z-axis direction in the figures), a first internal electrode layer 12 and a second internal electrode layer 13 which are stacked alternately via the ceramic layers 11, a third side margin portion 173, and a fourth side margin portion 174.

[0017] The laminate 16 comprises a capacitance forming section 18 consisting of a ceramic layer 11, a first internal electrode layer 12, and a second internal electrode layer 13. In other words, the first internal electrode layer 12 and the second internal electrode layer 13 in the capacitance forming section 18 are arranged to face each other in the first axial direction with the ceramic layer 11 in between.

[0018] With this configuration, when a voltage is applied between the external electrode connected to the first internal electrode layer 12 and the external electrode connected to the second internal electrode layer 13, a voltage is applied to the ceramic layer 11 between the first internal electrode layer 12 and the second internal electrode layer 13, and a charge corresponding to that voltage is stored in the capacitance forming section 18.

[0019] As shown in Figures 1 to 3, the laminate 16 has a first side surface 16a perpendicular to the second axis direction (Y axis direction in the figure) which is orthogonal to the first axis direction (Z axis direction in the figure), and a second side surface 16b opposite to the first side surface 16a. The laminate 16 may also have a third side surface 16c perpendicular to the third axis direction (X axis direction in the figure) which is orthogonal to the first and second axis directions, a fourth side surface 16d opposite to the third side surface 16c, a fifth side surface 16e perpendicular to the first axis direction, and a sixth side surface 16f opposite to the fifth side surface 16e.

[0020] In this specification, the side designated as the first side surface 16a from a pair of sides perpendicular to the second axial direction can be arbitrarily selected. Similarly, the side designated as the third side surface 16c from a pair of sides perpendicular to the third axial direction can be arbitrarily selected, and the side designated as the fifth side surface 16e from a pair of sides perpendicular to the first axial direction can be arbitrarily selected.

[0021] The first to sixth sides 16a to 16f of the laminate 16 are all configured as flat surfaces. In this invention, a flat surface does not have to be strictly planar as long as it is perceived as flat when viewed as a whole, and includes, for example, surfaces with minute irregularities on the surface or gently curved shapes within a predetermined range.

[0022] <<Ceramic layer>> In the ceramic layer 11, it is preferable to use a dielectric ceramic with a high dielectric constant from the viewpoint of increasing the capacitance of each ceramic layer in the capacitance forming section 18. There are no particular restrictions on the dielectric ceramic with a high dielectric constant, and it can be appropriately selected according to the purpose. Examples include perovskite materials containing barium (Ba) and titanium (Ti), such as barium titanate (BaTiO3).

[0023] There are no particular restrictions on the ceramic layer 11, and it can be appropriately selected according to the purpose. For example, it may be composed of a composition system such as strontium titanate (SrTiO3), calcium titanate (CaTiO3), magnesium titanate (MgTiO3), calcium zirconate (CaZrO3), calcium zirconate titanate (Ca(Zr,Ti)O3), barium zirconate (BaZrO3), or titanium dioxide (TiO2).

[0024] <<First internal electrode layer and second internal electrode layer>> As shown in Figure 4A, the first internal electrode layer 12 has a first surface 120a, at least a portion of which is located on the first side surface 16a. Here, the first surface 120a refers to the edge of the first internal electrode 120 of the first internal electrode layer 12 on the side of the first side surface 16a.

[0025] As shown in Figure 4A, the first surface 120a includes the first region 121. Here, the first region 121 refers to a part of the region (part of the surface) included in the first surface 120a. More specifically, it refers to the region where the external electrode formed on the first side surface 16a side and the first internal electrode 120 come into contact.

[0026] As shown in Figure 4B, the second internal electrode layer 13 has a second surface 130a, at least a portion of which is located on the first side surface 16a. Here, the second surface 130a refers to the edge of the second internal electrode 130 of the second internal electrode layer 13 on the side of the first side surface 16a.

[0027] As shown in Figure 4C, when the first internal electrode layer 12 in Figure 4A, the ceramic layer 11, and the second internal electrode layer 13 in Figure 4B are stacked in order and viewed through from the first axis direction, the second surface 130a is separated from the first region 121.

[0028] As shown in Figure 4A, the first internal electrode layer 12 may have a third surface 120b, at least a portion of which is located on the second side surface 16b. Here, the third surface 120b refers to the edge of the first internal electrode 120 of the first internal electrode layer 12 on the side of the second side surface 16b.

[0029] As shown in Figure 4A, the third surface 120b may include the second region 122. Here, the second region 122 refers to a part of the third surface 120b (a part of the surface). More specifically, it refers to the region where the external electrode formed on the second side surface 16b contacts the first internal electrode 120.

[0030] As shown in Figure 4B, the second internal electrode layer 13 may have a fourth surface 130b, at least a portion of which is located on the second side surface 16b. Here, the fourth surface 130b refers to the edge of the second internal electrode 130 of the second internal electrode layer 13 on the side of the second side surface 16b.

[0031] When the first internal electrode layer 12 and the second internal electrode layer 13 each have a third surface 120b and a fourth surface 130b, respectively, as shown in Figure 4C, when the first internal electrode layer 12 of Figure 4A, the ceramic layer 11, and the second internal electrode layer 13 of Figure 4B are stacked in order and viewed through from the first axial direction, it is preferable that the fourth surface 130b is separated from the second region 122.

[0032] The distance between the second surface 130a and the first region 121, and the distance between the fourth surface 130b and the second region 122 are not particularly limited and can be appropriately selected according to the purpose. For example, they can be appropriately set according to the amount of external electrode forming paste added, as described later.

[0033] The first internal electrode layer 12 and the second internal electrode layer 13 are preferably formed of a good electrical conductor. There are no particular restrictions on the good electrical conductor that forms the first internal electrode layer 12 and the second internal electrode layer 13, and can be appropriately selected according to the purpose. Examples include metals or alloys mainly composed of nickel (Ni), copper (Cu), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), etc.

[0034] As shown in Figure 4A, the first internal electrode layer 12 may have a fifth surface 120c located on the third side surface 16c, or a sixth surface 120d located on the fourth side surface 16d.

[0035] As shown in Figures 2-3, the laminate 16 may have cover margin portions 19 provided on both sides of the first axial direction of the volume forming portion 18. The pair of cover margin portions 19 constitute the fifth side surface 16e and the sixth side surface 16f.

[0036] The composition of the cover margin portion 19 is not particularly limited and can be appropriately selected depending on the purpose. For example, it may be formed of insulating ceramics and may contain dielectric ceramics similar to those of the ceramic layer 11. This suppresses internal stress that may occur between the cover margin portion 19 and the capacitance forming portion 18. In this specification, the pair of cover margin portions 19 are also included in the ceramic layer 11.

[0037] <Side margin section> As shown in Figures 1, 3, 4D, 4E, and 5, the multilayer ceramic electronic component 100 comprises a first side margin portion 171 that covers the first side surface 16a of the laminate 16 and has a first opening 141 formed therein that reaches a first region 121 of the first side surface 16a, and a second side margin portion 172 that covers the second side surface 16b.

[0038] As shown in Figures 4D and 5, a first opening 141 is formed in the first side margin portion 171 so as to cover the first side surface 16a of the laminate 16 and reach the first region 121 of the first side surface 16a, that is, so as to expose the first region 121 of the first side surface 16a. In other words, the first opening 141 is formed in the first side margin portion 171 at a location corresponding to the position where the first region 121 of the first side surface 16a is formed.

[0039] As shown in Figures 4E and 5, a second opening 142 may be formed in the second side margin portion 172 so as to cover the second side surface 16b of the laminate 16 and reach the second region 122 of the second side surface 16b, that is, so that the second region 122 of the second side surface 16b is exposed. In other words, a second opening 142 may be formed in the second side margin portion 172 at a location corresponding to the position where the second region 122 of the second side surface 16b is formed.

[0040] Having the first side margin portion 171 and the second side margin portion 172 in this configuration makes it possible to suppress the wetting and spreading of the paste for forming external electrodes during external electrode formation, thereby eliminating problems such as short circuits caused by contact between external electrodes. Furthermore, it eliminates problems such as external electrodes being formed in undesirable positions, resulting in deviations from specifications and mounting defects. In addition, since the first side margin portion 171 and the second side margin portion 172 are attached to the laminate 16 afterward, the cross-area loss due to lamination accuracy can be reduced, and the capacity can be maximized.

[0041] The composition of the first side margin portion 171 and the second side margin portion 172 is not particularly limited as long as the Si content is higher than that of the ceramic layer 11, and can be appropriately selected according to the purpose, however, it is preferable that the main component be a polycrystalline ceramic. In this specification, "main component" refers to the component with the highest content ratio.

[0042] The polycrystalline material preferably contains dispersed glass particles whose total volume fraction relative to the polycrystalline material is 1% to 20%. There are no particular restrictions on the median diameter of the glass particles, and they can be appropriately selected depending on the purpose, but it is preferably 0.20 μm or more and less than 0.75 μm. Furthermore, it is preferable that the proportion of glass particles with a diameter of 0.20 μm or more and less than 0.75 μm among the glass particles constituting the polycrystalline material be 90% or more.

[0043] Width d of the first opening 141 of the first side margin portion 171 SM1 There are no particular restrictions, and it can be appropriately selected according to the purpose, but from the viewpoint of suppressing the wetting and spreading of the paste for forming the external electrode and suppressing misalignment of the coating, it is preferable to make it 2% or more smaller than the width d1 of the first region 121 corresponding to the first opening 141.

[0044] Width d of the second opening 142 of the second side margin portion 172 SM2 There are no particular restrictions, and it can be appropriately selected according to the purpose, but from the viewpoint of suppressing the wetting and spreading of the paste for forming the external electrode and suppressing misalignment of the coating, it is preferable to make it 2% or more smaller than the width d2 of the second region 122 corresponding to the second opening 142.

[0045] The following describes a second embodiment of the present invention in detail, but the present invention is not limited thereto.

[0046] [Figures 6-8] Figure 6 is a schematic perspective view showing a multilayer ceramic electronic component 101 according to a second embodiment of the present invention. Figure 7A is a schematic plan view of the first internal electrode layer 12 in the multilayer ceramic electronic component 101 of Figure 6, as viewed from the first axis direction. Figure 7B is a schematic plan view of the second internal electrode layer 13 in the multilayer ceramic electronic component 101 of Figure 6, as viewed from the first axis direction. Figure 7C is a schematic plan view of the first internal electrode layer 12 of Figure 7A, the ceramic layer 11, and the second internal electrode layer 13 of Figure 7B stacked in order and viewed through from the first axis direction. Figure 7D is a schematic plan view of the first side margin portion 171 located on the first side surface of the laminate 16 in the multilayer ceramic electronic component 101 of Figure 6, as viewed from the Y axis direction. Figure 7E is a schematic plan view of the second side margin portion 172 located on the second side surface of the laminate 16 in the multilayer ceramic electronic component 101 of Figure 1, as viewed from the Y axis direction. Figure 8 is a schematic plan view taken from the first axial direction after sequentially stacking the first internal electrode layer 12 of Figure 7A, the ceramic layer 11, and the second internal electrode layer 13 of Figure 7B, and arranging the first side margin portion 171 and the second side margin portion 172 on the first side surface 16a and the second side surface 16b, respectively.

[0047] As shown in Figure 6, the multilayer ceramic electronic component 101 of the second embodiment comprises a laminate 16, a first side margin portion 171, a second side margin portion 172, a third side margin portion 173, and a fourth side margin portion 174. In the description of the second embodiment, configurations that overlap with those of the first embodiment will be omitted.

[0048] <<First internal electrode layer and second internal electrode layer>> As shown in Figure 7A, the first surface 120a includes multiple first regions 121, and the third surface 120b includes multiple second regions 122. While the multilayer ceramic electronic component 101 of the second embodiment has two first regions 121 and two second regions 122, the number of such first regions 121 and second regions 122 is not limited to these.

[0049] As shown in Figure 7A, the first internal electrode layer 12 has a fifth surface 120c located on the third side surface 16c and a sixth surface 120d located on the fourth side surface 16d. The fifth surface 120c and the sixth surface 120d may have specific regions, similar to the first surface 120a and the third surface 120b.

[0050] As shown in Figure 7B, the second surface 130a includes the third region 133, and the fourth surface 130b includes the fourth region 134. Here, the third region 133 refers to a part of the second surface 130a that is separate from the first region 121. More specifically, it refers to the region where the external electrode formed on the first side surface 16a contacts the second internal electrode 130. The fourth region 134 refers to a part of the fourth surface 130b that is separate from the second region 122. More specifically, it refers to the region where the external electrode formed on the second side surface 16b contacts the second internal electrode 130.

[0051] As shown in Figure 7B, the second internal electrode layer 13 has a seventh surface 130c located on the third side surface 16c and an eighth surface 130d located on the fourth side surface 16d. The seventh surface 130c and the eighth surface 130d may have specific regions, similar to the second surface 130a and the fourth surface 130b.

[0052] As shown in Figure 7C, when the first internal electrode layer 12 in Figure 7A, the ceramic layer 11, and the second internal electrode layer 13 in Figure 7B are stacked in order and viewed through from the first axis direction, the second surface 130a is separated from the first region 121, and the first surface 120a is separated from the third region 133.

[0053] As shown in Figure 7C, when the first internal electrode layer 12 in Figure 7A, the ceramic layer 11, and the second internal electrode layer 13 in Figure 7B are stacked in order and viewed through from the first axis direction, the fourth surface 130b is separated from the second region 122, and the third surface 120b is separated from the fourth region 134.

[0054] The distances between the first surface 120a and the third region 133, the distance between the second surface 130a and the first region 121, the distance between the third surface 120b and the fourth region 134, and the distance between the fourth surface 130b and the second region 122 are not particularly limited and can be appropriately selected according to the purpose. For example, they can be appropriately set according to the amount of paste added for forming the external electrode.

[0055] <Side margin section> As shown in Figures 6 and 8, the multilayer ceramic electronic component 101 comprises a first side margin portion 171, a second side margin portion 172, a third side margin portion 173, and a fourth side margin portion 174.

[0056] The first side margin portion 171 covers the first side surface 16a of the laminate 16 and has a first opening 141 that reaches the first region 121 of the first side surface 16a and a third opening 143 that reaches the third region 133.

[0057] The second side margin portion 172 covers the second side surface 16b of the laminate 16 and has a second opening 142 that reaches the second region 122 of the second side surface 16b, and a fourth opening 144 that reaches the fourth region 134.

[0058] Width d of the third opening 143 of the first side margin portion 171 SM3 There are no particular restrictions, and it can be appropriately selected according to the purpose, but from the viewpoint of suppressing the wetting and spreading of the paste for forming the external electrode and suppressing misalignment of the application, it is preferable to make it 2% or more smaller than the width d3 of the third region 133 corresponding to the third opening 143.

[0059] Width d of the fourth opening 144 of the second side margin portion 172 SM4 There are no particular restrictions, and it can be appropriately selected according to the purpose, but from the viewpoint of suppressing the wetting and spreading of the paste for forming the external electrode and suppressing misalignment of the coating, it is preferable to make it 2% or more smaller than the width d4 of the fourth region 134 corresponding to the fourth opening 144.

[0060] The third side margin portion 173 covers the third side surface 16c of the laminate 16. The third side margin portion 173 may also have openings at positions corresponding to specific regions of the laminate, similar to the first side margin portion 171 and the second side margin portion 172.

[0061] The fourth side margin portion 174 covers the fourth side surface 16d of the laminate 16. The fourth side margin portion 174 may have openings at positions corresponding to specific regions of the laminate, similar to the first side margin portion 171 and the second side margin portion 172.

[0062] (Multilayer ceramic capacitor) The multilayer ceramic capacitor according to the present invention comprises the multilayer ceramic electronic component described above and an external electrode, and may have other parts as needed.

[0063] [Figures 9A and 9B] Figure 9A is a schematic perspective view showing a multilayer ceramic capacitor 1000 according to a third embodiment of the present invention. Figure 9B is a schematic perspective view showing a multilayer ceramic capacitor 1001 according to a fourth embodiment of the present invention.

[0064] As shown in Figure 9A, the multilayer ceramic capacitor 1000 comprises a multilayer ceramic electronic component 100 and an external electrode 21, and may also comprise other parts as needed. As shown in Figure 9B, the multilayer ceramic capacitor 1001 comprises a multilayer ceramic electronic component 101 and an external electrode 21, and may also comprise other parts as needed.

[0065] <External electrode> The shape of the external electrode 21 is not particularly limited, as long as it covers each region on the first side surface 16a of the laminate 16 (first region 121 and third region 133) and each region on the second side surface 16b of the laminate 16 (second region 122 and fourth region 134), as shown in Figures 9A and 9B. It can be appropriately selected according to the purpose.

[0066] The external electrode 21 is preferably formed of a good electrical conductor. There are no particular restrictions on the good electrical conductor used to form the external electrode 21, and it can be appropriately selected depending on the purpose. Examples include metals or alloys mainly composed of copper (Cu), nickel (Ni), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), and gold (Au).

[0067] Next, we will explain the manufacturing method of multilayer ceramic capacitors.

[0068] Figure 10 is a flowchart showing a method for manufacturing a multilayer ceramic capacitor according to the present invention.

[0069] (Step S01: Preparation of the laminate) In step S01, an unfired laminate 16 is prepared. The unfired laminate 16 can be made using a laminate sheet in which multiple large ceramic sheets (ceramic layers 11) are stacked in the first axial direction. A conductive paste for forming the first internal electrode layer 12 and the second internal electrode layer 13 is patterned on the ceramic sheet corresponding to the volume forming section 18.

[0070] The unfired laminate 16 is obtained by cutting the laminated sheet along the XZ plane and the YZ plane. For cutting the laminated sheet, a cutting device equipped with, for example, a push-cutting blade or a rotary blade can be used. As a result, in the unfired laminate 16, a pair of side surfaces are obtained as cut surfaces where both ends in the Y-axis direction of the first internal electrode layer 12 and the second internal electrode layer 13 are aligned.

[0071] (Step S02: Formation of side margins) In step S02, unfired first side margins 171 to fourth side margins 174 are provided on one or two pairs of sides of the unfired laminate 16 fabricated in step S01. This results in an unfired multilayer ceramic electronic component 100 or multilayer ceramic electronic component 101 in which one or two pairs of sides are formed by unfired side margins.

[0072] For each unfired side margin, a ceramic slurry mixed with an organosilicon compound as a sintering aid is used. Silicone resin and silicon oligomers can be used as organosilicon compounds. The ceramic slurry can be prepared as follows: First, a dispersion of the organosilicon compound and a binder is prepared. Polyvinyl butyral (PVB) can be used as the binder. Next, the slurry of the dielectric ceramic constituting the side margin, such as barium titanate, is dispersed in the dispersion and then emulsified. In this way, a ceramic slurry for the side margin, in which the organosilicon compound is uniformly dispersed, can be prepared.

[0073] Each side margin can be formed by any method. Each side margin can be formed, for example, using a ceramic sheet formed from a ceramic slurry. In this case, the ceramic sheet can be punched out on the side of the laminate 16, or pre-cut and attached to the side of the laminate 16.

[0074] Furthermore, instead of using pre-formed ceramic sheets to create each side margin, an unformed ceramic slurry can be used as is. In this case, the ceramic slurry can be applied to the sides of the laminate 16 by, for example, immersing the sides of the laminate 16.

[0075] (Step S03: Firing) In step S03, the unfired multilayer ceramic electronic component 100 or multilayer ceramic electronic component 101 obtained in step S02 is fired to produce a multilayer ceramic electronic component 10 or multilayer ceramic electronic component 101.

[0076] (Step S04: Formation of external electrodes) In step S04, a multilayer ceramic capacitor 1000 or multilayer ceramic capacitor 1001 is manufactured by introducing an external electrode forming paste into the openings formed in each side margin of the multilayer ceramic electronic component 100 or multilayer ceramic electronic component 101 that was fired in step S03, and curing it. Alternatively, the external electrodes 21 may be formed on the unfired multilayer ceramic electronic component 100 or multilayer ceramic electronic component 101 and then fired simultaneously.

[0077] Based on the above steps, the multilayer ceramic capacitor 1000 shown in Figure 9A, or the multilayer ceramic capacitor 1001 shown in Figure 9B, is completed.

[0078] (Examples) Various evaluations were performed using a standard multilayer ceramic electronic component (a three-terminal multilayer ceramic capacitor component described in the embodiment of Japanese Patent Publication No. 2023-153569), the multilayer ceramic electronic component 100 shown in Figure 1, and the multilayer ceramic electronic component 101 shown in Figure 6. The results are shown in Table 1.

[0079] <Evaluation of wetness spread> Using a microscope, the external electrode coating width after coating was measured, and the ratio of the maximum wetting spread width to the designed external electrode coating width (a ratio with the designed electrode width set to 100) was calculated and evaluated.

[0080] <Short-circuit evaluation> A tester was used to check the resistance between adjacent electrodes, and if the resistance value was 60Ω or less, it was determined to be a short circuit.

[0081] <Capacity Evaluation> The capacitance was measured using an LCR meter under the conditions of 1kHz-0.5V.

[0082] [Table 1]

[0083] From the above results, it can be seen that if the multilayer ceramic electronic component of this embodiment has a specific structure in the internal electrode layer and side margin portion, the wetting spread of the paste for forming the external electrodes can be suppressed, and the occurrence of short circuits due to contact between external electrodes can be reduced. Furthermore, since the side margin portion is formed on the side surface of the laminate after it has been formed, the intersection area loss due to the lamination accuracy is eliminated, and the capacity can be maximized.

[0084] [Other embodiments] Although embodiments have been described in detail above, the present invention is not limited to any particular embodiment, and various modifications and changes are possible within the scope described in the claims.

[0085] For example, in the above embodiment, a multilayer ceramic capacitor was described as an example of a multilayer ceramic electronic component, but the present invention is applicable to multilayer ceramic electronic components in general. Examples of such multilayer ceramic electronic components include chip varistors, chip thermistors, and multilayer inductors.

[0086] Examples of the present invention are as follows: <1> A laminate comprising: a plurality of ceramic layers stacked in the first axial direction; a first internal electrode layer and a second internal electrode layer, each alternately stacked via the ceramic layers; a first side surface perpendicular to the second axial direction and orthogonal to the first axial direction; and a second side surface opposite to the first side surface. A first side margin portion that covers the first side surface and has a first opening formed that reaches a first region of the first side surface, It comprises a second side margin portion that covers the second side surface, The first internal electrode layer has a first surface, at least a portion of which is located on the first side surface, The second internal electrode layer has a second surface, at least a portion of which is located on the first side surface. The first surface includes the first region, The multilayer ceramic electronic component is characterized in that the second surface is separated from the first region. <2> The first side has a plurality of first regions, Multiple first openings are formed in the first side margin portion. <1> This is a multilayer ceramic electronic component as described above. <3> A third opening is formed in the first side margin portion, which extends to a third region that is separated from the first region of the first side surface. The first surface is separate from the third region, and the second surface includes the third region. <1> or <2> This is a multilayer ceramic electronic component as described above. <4> A second opening is formed in the second side margin portion, which reaches the second region of the second side surface. The first internal electrode layer has a third surface located on the second side surface, The second internal electrode layer has a fourth surface located on the second side surface, The third surface includes the second region, and the fourth surface is separate from the second region. <1> from <3> It is a multilayer ceramic electronic component as described in any of the following. <5> The second side has a plurality of second regions, Multiple second openings are formed in the second side margin portion. <4> This is a multilayer ceramic electronic component as described above. <6> A fourth opening is formed in the second side margin portion, reaching a fourth region that is separated from the second region of the second side surface. The third surface is separate from the fourth region, and the fourth surface includes the fourth region. <5> This is a multilayer ceramic electronic component as described above. <7> The laminate has a third side perpendicular to the first and second sides, The first internal electrode layer has a fifth surface located on the third side surface, <1> from <6> It is a multilayer ceramic electronic component as described in any of the following. <8> The laminate has a third surface perpendicular to the third axis direction which is perpendicular to the first axis direction and the second axis direction, and a fourth surface opposite to the third surface. The multilayer ceramic electronic component comprises a third side margin portion covering the third side surface and a fourth side margin portion covering the fourth side surface. <1> from <7> It is a multilayer ceramic electronic component as described in any of the following. <9> The first side margin portion and the second side margin portion have a higher Si content than the ceramic layer. <1> from <8> It is a multilayer ceramic electronic component as described in any one of the items. [Explanation of Symbols]

[0087] 100 Multilayer Ceramic Electronic Components 101 Multilayer ceramic electronic components 11 Ceramic layer 12 First internal electrode layer 120 1st internal electrode 120a 1st page 120b 3rd page 120c side 5 120d 6th page 121 1st area 122 Second area 13 Second internal electrode layer 130 2nd internal electrode 130a 2nd side 130b Page 4 130c page 7 130d Page 8 133 Third area 134 4th area 141 First opening 142 Second opening 143 Third opening 144 Fourth opening 16 Laminate 16a 1st side 16b Second side 16c 3rd side 16d 4th side 16e 5th aspect 16f 6th side 171 First Side Margin Section 172 Second Side Margin Section 173 Third Side Margin Section 174 Fourth Side Margin Section 18 Capacity forming part 19 Cover margin section 21 External electrode 1000 Multilayer Ceramic Capacitors 1001 Multilayer ceramic capacitor

Claims

1. A laminate comprising: a plurality of ceramic layers stacked in the first axial direction; a first internal electrode layer and a second internal electrode layer, each alternately stacked via the ceramic layers; a first side surface perpendicular to the second axial direction and orthogonal to the first axial direction; and a second side surface opposite to the first side surface. A first side margin portion that covers the first side surface and has a first opening formed therein that reaches a first region of the first side surface, It comprises a second side margin portion that covers the second side surface, The first internal electrode layer has a first surface, at least a portion of which is located on the first side surface, The second internal electrode layer has a second surface, at least a portion of which is located on the first side surface, The first surface includes the first region, A multilayer ceramic electronic component characterized in that the second surface is separated from the first region.

2. The first side surface has a plurality of first regions, The multilayer ceramic electronic component according to claim 1, wherein a plurality of the first openings are formed in the first side margin portion.

3. A third opening is formed in the first side margin portion, which extends to a third region that is separated from the first region of the first side surface. The multilayer ceramic electronic component according to claim 1, wherein the first surface is separate from the third region and the second surface includes the third region.

4. A second opening is formed in the second side margin portion, reaching the second region of the second side surface. The first internal electrode layer has a third surface located on the second side surface, The second internal electrode layer has a fourth surface located on the second side surface, The multilayer ceramic electronic component according to any one of claims 1 to 3, wherein the third surface includes the second region and the fourth surface is separate from the second region.

5. The second side has a plurality of the second regions, The multilayer ceramic electronic component according to claim 4, wherein a plurality of the second openings are formed in the second side margin portion.

6. A fourth opening is formed in the second side margin portion, extending to a fourth region that is separated from the second region of the second side surface. The multilayer ceramic electronic component according to claim 5, wherein the third surface is separated from the fourth region and the fourth surface includes the fourth region.

7. The laminate has a third side perpendicular to the first side and the second side, The multilayer ceramic electronic component according to any one of claims 1 to 3, wherein the first internal electrode layer has a fifth surface located on the third side surface.

8. The laminate has a third surface perpendicular to the third axis direction which is perpendicular to the first axis direction and the second axis direction, and a fourth surface opposite to the third surface. The multilayer ceramic electronic component according to any one of claims 1 to 3, comprising a third side margin portion covering the third side surface and a fourth side margin portion covering the fourth side surface.

9. The multilayer ceramic electronic component according to any one of claims 1 to 3, wherein the first side margin portion and the second side margin portion have a higher Si content than the ceramic layer.

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