Manufacturing method for semiconductor devices

Abstract

This suppresses the decline in the reliability of the gate insulating film. [Solution] The method comprises the steps of preparing a semiconductor substrate 10 containing GaN, forming a gate insulating film 21 on the semiconductor substrate 10, and forming a gate electrode on the gate insulating film 21, wherein the step of forming the gate insulating film 21 includes forming a nitride film 210, and then radical oxidizing the nitride film 210 in a heated atmosphere to form an oxide film to form the gate insulating film 21.

Description

Technical Field

[0001] The present disclosure relates to a method for manufacturing a semiconductor device including gallium nitride (hereinafter also simply referred to as GaN).

Background Art

[0002] Conventionally, a semiconductor device has been proposed in which a gate electrode is disposed on a semiconductor substrate including GaN via a gate insulating film made of an oxide film (see, for example, Patent Document 1). In this semiconductor device, the gate insulating film is formed as follows in order to suppress the formation of gallium oxide between the gate insulating film and the semiconductor substrate. Note that gallium oxide reduces carrier mobility and degrades the characteristics of the semiconductor device.

[0003] Specifically, in this semiconductor device, when forming the gate insulating film, a silicon film is formed on the semiconductor substrate by a CVD method or the like, and then the silicon film is oxidized to form a gate insulating film made of an oxide film. According to this, it is possible to suppress the formation of gallium oxide on the semiconductor substrate as compared with the case where an oxide film is directly disposed on the semiconductor substrate.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] However, when forming the silicon film, the silicon film may contain impurities such as a precursor. When this silicon film is oxidized to form a gate insulating film made of an oxide film, impurities remain in the gate insulating film. Therefore, in the above manufacturing method, the reliability of the gate insulating film may be degraded.

[0006] This disclosure aims to provide a method for manufacturing a semiconductor device that can suppress the deterioration of the reliability of the gate insulating film. [Means for solving the problem]

[0007] According to one aspect of this disclosure, a method for manufacturing a semiconductor device comprises the steps of: preparing a semiconductor substrate (10) comprising GaN; forming a gate insulating film (21) on the semiconductor substrate; and forming a gate electrode (22) on the gate insulating film, wherein the step of forming the gate insulating film includes forming a nitride film (210), and then radical oxidizing the nitride film in a heated atmosphere to form an oxide film to form the gate insulating film.

[0008] According to this method, a nitride film is formed, and radical oxidation is performed under a heated atmosphere to create a gate insulating film composed of an oxide film. During this process, impurities contained in the nitride film are removed by heat and by the movement of nitrogen. Therefore, the retention of impurities within the gate insulating film can be suppressed.

[0009] The reference numerals in parentheses attached to each component indicate an example of the correspondence between that component and the specific components described in the embodiments described later. [Brief explanation of the drawing]

[0010] [Figure 1] This is a cross-sectional view of the semiconductor device in the first embodiment. [Figure 2A] Figure 1 is a cross-sectional view showing the manufacturing process of a semiconductor device. [Figure 2B] This is a cross-sectional view showing the manufacturing process of a semiconductor device, following Figure 2A. [Figure 2C] This is a cross-sectional view showing the manufacturing process of a semiconductor device, following Figure 2B. [Figure 3A] Figure 2B is a cross-sectional view showing the manufacturing process of the gate insulating film. [Figure 3B] This is a cross-sectional view showing the manufacturing process of the gate insulating film, following Figure 3A. [Figure 3C] This is a cross-sectional view showing the manufacturing process of the gate insulating film, following Figure 3B. [Figure 4] This is a cross-sectional view of the semiconductor device in the second embodiment. [Figure 5A] Figure 4 is a cross-sectional view showing the manufacturing process of a semiconductor device. [Figure 5B] This is a cross-sectional view showing the manufacturing process of a semiconductor device, following Figure 5A. [Figure 5C] This is a cross-sectional view showing the manufacturing process of a semiconductor device, following Figure 5B. [Modes for carrying out the invention]

[0011] The embodiments of this disclosure will be described below with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other will be denoted by the same reference numerals.

[0012] (First Embodiment) The first embodiment will be described with reference to the drawings. In this embodiment, a semiconductor device in which a planar gate type MOSFET is formed will be described. Note that MOSFET is an abbreviation for metal oxide semiconductor field effect transistor.

[0013] First, the configuration of the semiconductor device manufactured by the semiconductor device manufacturing method of this embodiment will be described. As shown in Figure 1, the semiconductor device is n + The substrate 11 is made of n-type GaN. In this embodiment, the drain layer is formed on the substrate 11. A drift layer 12 is formed on the substrate 11, which is made of n-type GaN and has a lower n-type impurity concentration than the substrate 11. The surface layer of the drift layer 12 is made of p - A base layer 13 of type n is selectively formed. This base layer 13 is a layer that constitutes the channel of the MOSFET. The surface layer of the base layer 13 has n + It is a type with a higher impurity concentration than the drift layer 12. + A source region 14 of type 14 is formed.

[0014] Note that the drift layer 12 is formed by epitaxially growing a GaN layer on the substrate 11. The base layer 13 and the source region 14 are formed by ion-implanting impurities into the drift layer 12 and then performing a heat treatment.

[0015] In this embodiment, the semiconductor substrate 10 is composed of the substrate 11, the drift layer 12, the base layer 13, the source region 14, etc. That is, the semiconductor substrate 10 is composed of GaN. Hereinafter, the surface of the semiconductor substrate 10 on the substrate 11 side will be described as the other surface 10b of the semiconductor substrate 10, and the surface of the semiconductor substrate 10 on the source region 14 side will be described as the one surface 10a.

[0016] On the one surface 10a of the semiconductor substrate 10, a gate insulation 20 is formed so as to include a position between the drift layer 12 and the source region 14 in the base layer 13. And a gate electrode 22 is formed on the gate insulation film 21. Note that the gate insulation film 21 is composed of a silicon oxide film (that is, SiO2).

[0017] A contact hole 21a for exposing a part of the source region 14 and the base layer 13 is formed in the gate insulation film 21. And a source electrode 31 electrically connected to the source region 14 and the base layer 13 through the contact hole 21a is formed on the one surface 10a of the semiconductor substrate 10. Although not particularly shown, an interlayer insulation film is disposed between the gate electrode 22 and the source electrode 31. And the gate electrode 22 and the source electrode 31 are insulated by the interlayer insulation film. [[ID=I7]]

[0018] On the other surface 10b side of the semiconductor substrate 10, a drain electrode 32 electrically connected to the substrate 11 is formed.

[0019] The above describes the configuration of the semiconductor device in this embodiment. In this embodiment, the n-type can also be referred to as the first conductivity type, and the p-type can also be referred to as the second conductivity type. Next, the method for manufacturing the semiconductor device will be described with reference to Figures 2A to 2C.

[0020] First, a semiconductor substrate 10 is prepared, as shown in Figure 2A, with a substrate 11, a drift layer 12, a base layer 13, and a source region 14 formed on it, and a drain electrode 32 placed on the other side 10b. The drain electrode 32 may be formed when forming the source electrode 31, etc., which will be described later.

[0021] Next, as shown in Figure 2B, a gate insulating film 21 is placed on one surface 10a of the semiconductor substrate 10. The method for forming the gate insulating film 21 will be described later. Subsequently, as shown in Figure 2C, a predetermined semiconductor manufacturing process is performed to place a gate electrode 22 on the gate insulating film 21 and to form a source electrode 31 that is connected to the source region 14 and the base layer 13 through a contact hole 21a formed in the gate insulating film 21, thereby manufacturing the semiconductor device described above.

[0022] Next, the manufacturing method for the gate insulating film 21 will be explained with reference to Figures 3A to 3C. Note that in Figures 3A to 3C, the base layer 13 and source region 14, etc., are omitted.

[0023] First, as shown in Figure 3A, a silicon nitride film (i.e., SiN) 210 is formed on one surface 10a of the semiconductor substrate 10. The silicon nitride film 210 contains impurities 300, such as precursors, used in its formation. In this embodiment, the silicon nitride film 210 is formed by an ALD method under conditions of 500-600°C. However, the specific film formation method is not particularly limited, and the silicon nitride film 210 may be formed by a CVD method or the like. Furthermore, the precursors and gas types used in forming the silicon nitride film 210 can be changed as appropriate. In this embodiment, the silicon nitride film 210 corresponds to the nitride film.

[0024] Next, as shown in Figure 3B, radical oxidation is performed under heating conditions of 500-800°C. In this embodiment, radical oxidation is performed using radical 400, which includes hydroxyl radicals (i.e., OH radicals), hydrogen radicals (i.e., H radicals), and oxygen radicals (i.e., O radicals). Note that GaN decomposes at temperatures above 800°C, so the heating atmosphere is kept below 800°C.

[0025] As a result, as shown in Figure 3C, nitrogen is removed by heat and oxygen is supplied, causing the silicon nitride film 210 to change into a silicon oxide film and form the gate insulating film 21. In this embodiment, the silicon oxide film corresponds to the oxide film.

[0026] Here, radical oxidation is performed, causing impurities 300 to be removed by heat. Furthermore, since the removed nitrogen moves within the silicon nitride film 210 (i.e., the gate insulating film 21), impurities 300 are also removed by the movement of nitrogen within the silicon nitride film 210. In other words, in this embodiment, impurities 300 are removed by both heat and nitrogen movement. Therefore, compared to, for example, the case in which impurities 300 are removed by heat treatment alone, it is possible to remove impurities 300 more easily. The removed impurities 300 are then released from the silicon nitride film 210 (i.e., the gate insulating film 21). Thus, it is possible to suppress the remaining impurities 300 within the gate insulating film 21.

[0027] The oxidation reaction of the silicon nitride film 210 occurs sequentially from the surface opposite to the semiconductor substrate 10 towards the semiconductor substrate 10. The time required for radical oxidation of the silicon nitride film 210 depends on the thickness of the silicon nitride film 210, etc. Therefore, the relationship between the thickness of the silicon nitride film 210, etc., and the radical oxidation time required to completely change the silicon nitride film 210 into a silicon oxide film should be determined in advance through experiments, etc. By controlling the radical oxidation time based on the thickness of the silicon nitride film 210, etc., it is possible to suppress the generation of gallium oxide at the interface between the semiconductor substrate 10 and the gate insulating film 21 when the silicon nitride film 210 is changed into a silicon oxide film to form the gate insulating film 21.

[0028] Furthermore, in this embodiment, radical oxidation is performed using radical 400 containing hydroxyl radicals (i.e., OH radicals) and hydrogen radicals (i.e., H radicals). Therefore, in radical oxidation, nitrogen and impurities 300 contained in the silicon nitride film 210 are also removed by reduction. Consequently, the remaining impurities 300 in the gate insulating film 21 can be further suppressed.

[0029] Furthermore, the desorbed nitrogen is released from the silicon nitride film 210 (i.e., the gate insulating film 21) and also moves to the semiconductor substrate 10 side. The nitrogen that moves to the semiconductor substrate 10 side terminates the dangling bonds of GaN present on one surface 10a of the semiconductor substrate 10. This further suppresses the formation of gallium oxide at the interface between the semiconductor substrate 10 and the gate insulating film 21. Note that Figure 3C exaggerates the state in which the dangling bonds are terminated with nitrogen. The above describes the method for manufacturing the gate insulating film 21 in this embodiment.

[0030] In this embodiment, after forming the silicon nitride film 210, the silicon nitride film 210 is radically oxidized to form a gate insulating film 21 composed of a silicon oxide film. This is for the following reason: If the gate insulating film 21 is composed of a silicon nitride film 210, the band offset with the GaN constituting the semiconductor substrate 10 will be small, and the leakage current may increase. For this reason, in this embodiment, the gate insulating film 21 is composed of a silicon oxide film so that the band offset between the gate insulating film 21 and the GaN constituting the semiconductor substrate 10 can be increased.

[0031] According to the embodiment described above, a silicon nitride film 210 is formed, and a gate insulating film 21 composed of a silicon oxide film is formed by performing radical oxidation under a heated atmosphere. At this time, impurities 300 contained in the silicon nitride film 210 are desorbed by heat and also by the movement of nitrogen. Therefore, the remaining impurities 300 in the gate insulating film 21 can be suppressed. In addition, as nitrogen moves, the nitrogen terminates the dangling bonds of GaN present on the surface of the semiconductor substrate 10. Therefore, oxidation of the semiconductor substrate 10 can be suppressed, and the generation of gallium oxide between the semiconductor substrate 10 and the gate insulating film 21 can be further suppressed.

[0032] (1) In this embodiment, radical oxidation is performed using radicals 400 containing droxyl radicals (i.e., OH radicals) and hydrogen radicals (i.e., H radicals). Therefore, impurities 300 contained in the silicon nitride film 210 are also removed by reduction. Furthermore, the impurities 300 contained in the silicon nitride film 210 are further removed because the nitrogen contained in the silicon nitride film 210 is reduced, making it easier for nitrogen to move. Therefore, it is possible to further suppress the remaining impurities 300 in the gate insulating film 21.

[0033] (2) In this embodiment, when the silicon nitride film 210 is radically oxidized, the radical oxidation time is adjusted based on the thickness of the silicon nitride film 210. This suppresses oxidation of the semiconductor substrate 10 and further suppresses the generation of gallium oxide between the semiconductor substrate 10 and the gate insulating film 21.

[0034] (Second Embodiment) A second embodiment will now be described. This embodiment is a trench-gate type MOSFET formed in comparison to the first embodiment. Other aspects are the same as the first embodiment, so further explanation will be omitted here.

[0035] In this embodiment, as shown in Figure 4, a trench 15 is formed in the semiconductor substrate 10 so as to penetrate the source region 14 and the base layer 13 and reach the drift layer 12. The source region 14 is in contact with one side surface 10a of the trench 15, and the base layer 13 is in contact with the other side surface 10b of the trench 15. The bottom surface of the trench 15 terminates within the drift layer 12.

[0036] The gate insulating film 21 is formed along the wall surface of the trench 15. In this embodiment, the gate insulating film 21 is also formed on one surface 10a of the semiconductor substrate 10, extending from the wall surface of the trench 15. The gate insulating film 21 has contact holes 21a that expose the source region 14 and the base layer 13.

[0037] The source electrode 31 is formed to be connected to the source region 14 and the base layer 13 through a contact hole 21a, similar to the first embodiment. Although not specifically shown, an interlayer insulating film is placed between the gate electrode 22 and the source electrode 31. The gate electrode 22 and the source electrode 31 are insulated from each other by the interlayer insulating film.

[0038] The above describes the configuration of the semiconductor device in this embodiment. Next, the method for manufacturing the semiconductor device will be explained with reference to Figures 5A to 5C.

[0039] First, a semiconductor substrate 10 is prepared, as shown in Figure 5A, with a substrate 11, a drift layer 12, a base layer 13, a source region 14, and a trench 15 formed therein, and a drain electrode 32 positioned on the other side 10b. Note that the drain electrode 32 may be formed when the source electrode 31, etc., are formed.

[0040] Next, as shown in Figure 5B, a gate insulating film 21 is placed on one surface 10a of the semiconductor substrate 10 and on the wall surface of the trench 15. The method for forming the gate insulating film 21 is the same as in the first embodiment described above. That is, a silicon nitride film 210 is first formed, and the gate insulating film 21 is formed by radical oxidation of this silicon nitride film 210. Then, as shown in Figure 5C, a predetermined semiconductor manufacturing process is performed to place a gate electrode 22 on the gate insulating film 21 and to form a source electrode 31 that is connected to the source region 14 and the base layer 13 through a contact hole 21a, thereby manufacturing the semiconductor device described above.

[0041] As described above in this embodiment, the method for forming the gate insulating film 21 of the first embodiment can also be applied to a trench gate type gate insulating film 21.

[0042] (Other embodiments) This disclosure is described in accordance with embodiments, but it is understood that this disclosure is not limited to such embodiments or structures. This disclosure also includes various modifications and variations within the scope of equivalents. In addition, various combinations and forms, as well as other combinations and forms that include only one, more, or fewer of those elements, fall within the scope and idea of ​​this disclosure.

[0043] For example, in each of the above embodiments, a method for manufacturing a semiconductor device in which an n-channel type MOSFET is formed, in which the first conductivity type is n-type and the second conductivity type is p-type, was described. However, each of the above embodiments can also be applied to a method for manufacturing a semiconductor device in which a p-channel type MOSFET is formed, in which the conductivity types of each component are reversed compared to the n-channel type. Furthermore, each of the above embodiments can also be applied to a method for manufacturing a semiconductor device in which an IGBT with a similar structure is formed, in addition to a MOSFET. Note that when a semiconductor device in which an IGBT is formed is used, the n in each of the above embodiments is used. + The substrate 11 of type p + Aside from changing to the type substrate 11, the embodiments are the same as described above.

[0044] Furthermore, in the above embodiments, an example was described in which a silicon nitride film 210 is placed and the gate insulating film 21 composed of a silicon oxide film is constructed by radical oxidation of the silicon nitride film 210. However, the following is also possible. That is, instead of the silicon nitride film 210, an aluminum nitride (i.e., AlN) film is placed and the gate insulating film 21 composed of an aluminum oxide (i.e., Al2O3) film is constructed by radical oxidation of the aluminum nitride film. In this configuration, the aluminum nitride film corresponds to the nitride film and the aluminum oxide film corresponds to the oxide film. Alternatively, instead of the silicon nitride film 210, a magnesium nitride (i.e., Mg3N2) film is placed and the gate insulating film 21 composed of a magnesium oxide (MgO) film is constructed by radical oxidation of the magnesium nitride film. In this configuration, the magnesium nitride film corresponds to the nitride film and the magnesium oxide film corresponds to the oxide film. Aluminum oxide and magnesium oxide are materials that can achieve a band offset with GaN constituting the semiconductor substrate 10 that is sufficiently larger than that of silicon nitride, and can suppress the generation of leakage current.

[0045] Furthermore, in each of the above embodiments, a method was described for forming a silicon nitride film 210 and then radically oxidizing the silicon nitride film 210 to form a gate insulating film 21 composed of a silicon oxide film. However, the gate insulating film 21 may also be formed by repeatedly forming the silicon nitride film 210 and radically oxidizing the silicon nitride film 210. According to this, since the formation of the silicon nitride film 210 and radical oxidation of the silicon nitride film 210 are repeated, the silicon nitride film 210 formed in a single step can be made thinner. Therefore, impurities 300 can be more easily removed during radical oxidation, and the remaining impurities 300 in the gate insulating film 21 can be further suppressed. In addition, since the thickness of the silicon nitride film 210 to be oxidized becomes thinner during radical oxidation, the time of radical oxidation can be easily adjusted, and oxidation of the semiconductor substrate 10 can be suppressed.

[0046] Furthermore, in each of the above embodiments, the semiconductor substrate 10 may be composed of GaN, and for example, it may be composed of AlGaN. [Explanation of Symbols]

[0047] 10 Semiconductor substrates 21 Gate insulating film 22 Grid cells 210 Nitride film

Claims

1. A method for manufacturing a semiconductor device, A step of preparing a semiconductor substrate (10) that contains gallium nitride, The process of forming a gate insulating film (21) on the semiconductor substrate, The process includes forming a gate electrode (22) on the gate insulating film, The step of forming the gate insulating film is, A method for manufacturing a semiconductor device, comprising forming a nitride film (210), and then radical oxidizing the nitride film in a heated atmosphere to form an oxide film, thereby forming the gate insulating film.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the step of forming the gate insulating film is to perform radical oxidation using a radical (400) containing at least one of a hydrogen radical and a hydroxyl radical.

3. The method for manufacturing a semiconductor device according to claim 1, wherein the step of forming the gate insulating film is adjusted according to the time of radical oxidation according to the thickness of the nitride film.

4. The method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the step of forming the gate insulating film is to repeatedly form the nitride film and perform radical oxidation.

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