Improvements to DC voltage control in power transmission networks

Abstract

This provides improvements to DC voltage controllers in power transmission networks using SGFM. [Solution] A method is provided which is carried out by a DC voltage controller for an HVDC converter, comprising generating a synchronous phase angle from a DC voltage error, wherein the DC voltage error is generated from a measured DC voltage and a requested DC voltage; generating an AC grid phase angle from an AC grid signal; generating a DC power compensation function based at least in part on the measured DC voltage; and generating a phase angle request value for the HVDC converter based on at least one of the synchronous phase angle, the AC grid phase angle, and the DC power compensation function.

Description

Technical Field

[0001] The subject matter of this specification generally relates to the field of power transmission networks, and more specifically to DC (direct current) voltage control in power transmission networks.

Background Art

[0002] In high voltage direct current (HVDC) power transmission networks, alternating current (AC) power is typically converted to direct current (DC) power for transmission via overhead lines, submarine cables, and / or underground cables. This conversion eliminates the need to compensate for the AC reactive / capacitive loading effects imposed by the power transmission medium, i.e., the transmission line or cable, reduces the cost per kilometer of the line and / or cable, and thus is cost-effective when power needs to be transmitted over long distances. DC power can also be transmitted directly, for example, from an offshore wind farm to an onshore AC power transmission network.

[0003] The conversion between DC power and AC power is utilized when it is necessary to interconnect a DC network and an AC network. In any such power transmission network, power conversion means, also known as converters (e.g., power converters in converter stations or HVDC converters), are required at each interface between AC power and DC power to perform the necessary conversion from AC to DC or from DC to AC.

[0004] A power transmission network can be operated using synchronous grid forming (SGFM). In SGFM, the power converter behaves as a three-phase positive sequence AC voltage source behind impedance operating at a frequency synchronized with an SGFM source connected to the power transmission network.

[0005] The selection of the most appropriate HVDC power transmission network or scheme depends on specific applications and the characteristics of the scheme. Examples of power transmission networks include monopole power transmission networks and bipolar power transmission networks.

[0006] The HVDC power transmission network can be equipped with a DC voltage controller for adjusting and maintaining the DC voltage level for stable and efficient operation of the system.

[0007] The DC voltage controller is typically implemented in a converter station and manages the DC voltage of the DC power by compensating for increases and decreases caused by fluctuations in load or disturbances in the network.

[0008] The examples described herein tend to provide improvements related to DC voltage controllers in power transmission networks using SGFM.

Summary of the Invention

[0009] A method implemented by a DC voltage controller for an HVDC converter, comprising generating a synchronous phase angle from a DC voltage error, wherein the DC voltage error is generated from a measured DC voltage and a required DC voltage; generating an AC grid phase angle from an AC grid signal; generating a DC power compensation function based at least in part on the measured DC voltage; and generating a phase angle requirement value for the HVDC converter based on at least one of the synchronous phase angle, the AC grid phase angle, and the DC power compensation function.

[0010] A DC voltage controller for an HVDC converter is also provided, comprising at least one memory and at least one processor coupled to the memory, which is configured to cause the DC voltage controller to generate a synchronous phase angle from a DC voltage error for the HVDC converter, the DC voltage error being generated from measured DC voltages and requested DC voltages of a DC network, to generate an AC grid phase angle from an AC grid signal, to generate a DC power compensation function based at least partially on the measured DC voltage, and to generate a phase angle request value for the HVDC converter based on at least one of the synchronous phase angle, the AC grid phase angle, and the DC power compensation function.

[0011] Within the scope of this application, the various aspects, embodiments, examples, and alternative forms described in the preceding paragraph, as well as in the claims and / or the following description and drawings, in particular their individual features, are expressly intended to be interpreted independently or in any combination. That is, all embodiments, and all features of any embodiment, can be combined in any way and / or combination, provided that such features are not incompatible.

[0012] Herein, embodiments of the present invention will be described with reference to the accompanying drawings, merely as examples. [Brief explanation of the drawing]

[0013] [Figure 1] This diagram schematically shows an example of a power transmission network. [Figure 2] This figure shows one embodiment of a controller for a power converter. [Figure 3] This figure shows a DC voltage controller according to an aspect of the present disclosure. [Figure 4] This figure shows a DC voltage controller according to an aspect of the present disclosure. [Figure 5] This is a plot showing the DC voltage from a DC voltage controller according to an aspect of this disclosure. [Figure 6]This is a plot showing the DC voltage from a DC voltage controller according to an aspect of this disclosure. [Figure 7] This figure shows an example of a processor according to the embodiments of this disclosure. [Figure 8] This figure shows an example of a DC voltage controller according to an aspect of the present disclosure. [Figure 9] This is a flowchart of a method implemented by a DC voltage controller in a power transmission network according to an aspect of the present disclosure. [Modes for carrying out the invention]

[0014] Figure 1 schematically illustrates an example of a power transmission network 100. The example is not intended to be limited to representing a specific power transmission system, such as a monopole or bipole HVDC transmission network, but is further provided as a general example illustrating the operating principles of a power transmission network useful for understanding the present invention. Thus, the power transmission network 100 can generally represent a monopole or bipole system, or, for example, a multi-terminal power transmission system. Therefore, while certain features in the example are shown connected to one another by a certain number of connections, this is not intended to be limiting, but rather to illustrate general connections between features / components. Related to this, the relative dimensions or distances between components perceived in the example are also not intended to be limiting. Therefore, it will be understood that the network 100 and the principles and features described herein can be applied, for example, to a network comprising the controller 200 in Figure 2. Furthermore, method 1000 in Figure 10.

[0015] The power transmission network 100 includes a first power conversion means 110 (also known as a converter station) and a second power conversion means 120. The power conversion means 110, 120 convert AC power to DC power (and vice versa) and essentially act as a rectifier (when converting AC power to DC power for transmission) and an inverter (when receiving DC power and converting it to AC power). Each of the power conversion means 110, 120 may comprise a single converter in the case of a monopole system or two converters in the case of a bipole system. The power conversion means 110, 120 may represent multiple converter stations arranged as a multi-terminal power transmission system. Generally, the first power conversion means 110 comprises a first AC side 110a and a first DC side 110b. Generally, the second power conversion means 120 comprises a second AC side 120a and a second DC side 120b.

[0016] The first power conversion means 110 is connected to the first AC network 140. The first AC network 140 is connected to the first AC side 110a of the first power conversion means 110.

[0017] The second power conversion means 120 is connected to the second AC network 150. The second AC network 150 is connected to the second AC side 120a of the second power conversion means 120. The first AC network 140 and / or the second AC network 150 may be a power transmission system comprising a power generator, a power transmission device, a power distribution device, and an electrical load. The first AC network 140 and / or the second AC network 150 may comprise a renewable power generation network such as a wind power network, a solar power network, or a bio-power generation network. The first AC network 140 or the second AC network 150 may be a consumer network. As a non-limiting example, for example, the first AC network 140 may be a power generation network and the second AC network 150 may be a consumer network.

[0018] Also shown is a power transmission medium 130 that interconnects the first power conversion means 110 and the second power conversion means 120. The power transmission medium 130 is connected between the first DC side 110b of the first power conversion means 110 and the second DC side 120b of the second power conversion means 120. The power transmission medium 130 may include electrical cables and other electrical components that interconnect the first and second power conversion means 110, 120. For example, the power transmission medium 130 may include a conductor providing a first electrode and / or a conductor providing a second electrode. A neutral configuration may also be provided that interconnects the first and second power conversion means 110, 120. The power transmission medium 130 is a medium for transmitting DC power between the power conversion means 110, 120.

[0019] The operation of the power transmission system 100 can be schematically described as follows: The first AC power generation network 140 generates AC power which is supplied to the first power conversion means 110 on the first AC side 110a. The first power conversion means 110 converts the received AC power into DC power and transmits it to the second power conversion means 120. The DC power is transmitted from the first DC side 110b to the second DC side 120b of the second power conversion means 120 via the power transmission medium 130. The second power conversion means 120 converts the received DC power back into AC power. The AC power is then supplied, for example, from the second AC side 120a to the second AC network 150 for consumption. In a particular example, the power conversion means 110 and 120 may be geographically separated. For example, the first power conversion means 110 may be located at an offshore wind power plant, and the second power conversion means 120 may be located on land.

[0020] In Example 100, it will be understood that various other electrical components may be located in any particular place or with any particular feature / component. These may include switches, transformers, resistors, reactors, surge arresters, harmonic filters, and other components well known in the art.

[0021] It will be understood that converters or power conversion means can include several different technologies, such as voltage-supply converters (e.g., those using insulated-gate bipolar transistor (IGBT) valves). Such converters can generally be thought of as using "power electronics." Power electronics converters can include, for example, multilevel voltage-supply converters.

[0022] It will be understood that cables used as power transmission media may include the following non-limiting examples of cross-linked polyethylene (XLPE) and / or mass-impregnated (MI) insulated cables. Such cables may comprise a conductor (such as copper or aluminum) surrounded by an insulating layer. The dimensions of the cable and its associated layers may vary depending on the specific application (in particular, the operating voltage requirements). The cable may further include reinforcement or "armor" in applications such as underwater installation. The cable may further comprise a sheath / screen grounded at one or more locations.

[0023] Furthermore, it will be understood that the power transmission network 100 may be used in conjunction with a three-phase power system. In a three-phase power system, three conductors each supply the first, second, and third phases of AC power to the consumer. Each of the first, second, and third phases typically has a voltage or current of equal magnitude, with a phase difference of 120° from one another.

[0024] In a three-phase power system, phase currents and voltages can be represented by three single-phase components: a positive sequence component, a negative sequence component, and a zero sequence component. Depending on the power system, it is the positive sequence component that rotates in phase. Therefore, in an ideal scenario, only positive sequence voltages / currents exist. It will be understood that imbalances in the magnitude or phase angle of voltages or currents between the first, second, and third phases of a three-phase system can result in undesirable negative or zero sequence components. Such imbalances can be caused, for example, by fault conditions in AC networks 140, 150.

[0025] The power transmission network 100 can be operated using methods such as synchronous gridforming (SGFM), and either or both of the power converters 110, 120 behave as three-phase positive-sequence sequence AC voltage sources behind impedance, operating at a frequency synchronized with other SGFM sources connected to the power transmission network 100.

[0026] The power transmission network 100 may further include controllers for controlling the operation of its components. For example, a controller may be provided for performing the method described herein. Such a controller may, for example, control power conversion means 110, 120. Such a controller may be referred to as a controller means or control means. The controller may be the controller 200 in Figure 2.

[0027] Figure 2 shows one embodiment of the controller 200 that can be used when carrying out the present invention as described herein.

[0028] The controller 200 comprises a memory 210 and at least one processor 220. The memory 210, when executed by at least one processor 220, includes computer-readable instructions that cause the controller 200 to perform the methods described herein.

[0029] The controller 200 is shown to include a transceiver arrangement 230 which may comprise separate transmitters 231 and receivers 232. The transceiver arrangement 230 can be used to operably communicate with other components or features of the embodiments described herein, either directly or via a further interface such as a network interface. The transceiver arrangement 230 can, for example, send and receive control signals using the transmitters 231 and receivers 232. The control signals may include or define electrical control parameters such as a reference current or a reference voltage.

[0030] At least one processor 220 is capable of executing computer-readable instructions and / or performing logical operations. The at least one processor 220 may be a microcontroller, microprocessor, central processing unit (CPU), field-programmable gate array (FPGA), or similar programmable controller. The controller may further include user input devices and / or output devices. The processor 220 is communicatively coupled to memory 210 and, in certain embodiments, may be coupled to transceiver 230.

[0031] The memory 210 may be a computer-readable storage medium. For example, the memory 210 may include a non-volatile computer storage medium. For example, the memory 210 may include a hard disk drive, flash memory, etc.

[0032] Although not shown, the controller 200 may further include user input device interfaces and / or user output device interfaces that can enable visual, auditory, or tactile input / output. Examples include interfaces to electronic displays, touchscreens, keyboards, mice, speakers, and microphones.

[0033] FIG. 3 shows a DC voltage controller 300 according to an aspect of the present disclosure.

[0034] The DC voltage controller 300 includes a DC voltage controller module 310 that receives a DC voltage error signal and outputs a synchronous angular velocity Δω. The synchronous angular velocity Δω passes through an integrator 334 to generate a synchronous phase angle δ ,

[0037] , , dc , Rmin , , c , ,

[0038] , , Rmax The synchronous phase angle δ c is added to the AC grid phase angle δ PLL to generate a phase angle requirement value δ m for adjusting the DC voltage signal of a HVDC converter (not shown).

[0035] The DC voltage error signal is generated by subtracting the required DC voltage signal u dc from the measured DC voltage signal u dc *. The AC grid phase angle δ PLL is generated by processing the AC grid signal V q using a phase-locked loop (PLL) 320.

[0036] The integrator 334 is defined by a base frequency ω c a minimum phase angle δ Rmin a maximum phase angle δ Rmax and an integrator defined by 1 / s in the s domain.

[0037] The HVDC power transmission network (or HVDC system) tends to include at least one DC voltage controller 300 that maintains the DC voltage by adjusting its active power output to compensate for any imbalance in DC energy. This function can be implemented by the DC voltage controlled SGFM feature of the DC voltage controller 300. The SGFM feature can include generating a phase angle from a DC voltage regulator.

[0038] The bandwidth of the DC voltage controller module 310 is the DC voltage signal u dcThis can be adjusted and determined to compensate for AC or DC disturbances. The PLL320 may have a higher bandwidth than the DC voltage controller module 310 to reduce interactions and instability. However, the bandwidth of the PLL320 is limited by the AC grid signal V q It may be restricted to avoid high-speed AC voltage fluctuations and high-speed frequency and angular deviations associated with voltage noise amplification.

[0039] In a typical point-to-point HVDC configuration connecting an onshore AC grid to an offshore AC grid, the onshore station tends to be responsible for maintaining the DC voltage, while the second station tends to be responsible for generating the synchronous AC voltage to the Power Park Module (PPM) that injects active power. Using a SGFM feature to control the DC voltage on the onshore side tends to improve the stability of the AC system. However, the stabilization effect of the SGFM feature is mainly related to the dynamics of its slow controller. This mode of operation tends to be unsuitable for the stability of the HVDC system if the onshore HVDC station is a DC voltage controlled SGFM. Implementing a grid angle estimation function on the DC voltage loop tends to be beneficial because it tends to compensate for disturbances on the AC side, but disturbances on the DC side tend not to be adequately compensated by the DC voltage controller. This tends to result in significant deviations in the DC voltage and therefore undesirable engagement with system protection.

[0040] Figure 4 shows a DC voltage controller 400 according to an embodiment of the present disclosure. The DC voltage controller 400 proposes a DC power compensation function to avoid significant DC voltage drift during high-speed DC power ramp-up.

[0041] The DC voltage controller 400 includes a DC voltage controller module 410 that receives a DC voltage error signal and outputs a synchronous angular velocity Δω. The synchronous angular velocity Δω passes through the integrator 434 to obtain the synchronous phase angle δ c Generates.

[0042] The DC voltage error signal is the measured DC voltage signal u dc DC voltage signal u requested from dc Generated by subtracting *. AC grid phase angle δ PLL This uses the PLL420 to obtain the AC grid signal V q It is generated by processing it.

[0043] The integrator 434 is used for the base frequency ω c , minimum phase angle δ Rmin , maximum phase angle δ Rmax , and defined by an integrator defined by 1 / s in the s domain.

[0044] Synchronous phase angle δ c The AC grid phase angle δ PLL This is added to the DC power compensation function 440 and the phase angle requirement δ for adjusting the DC voltage signal of the HVDC converter (not shown). m Generates.

[0045] The DC power compensation function 440 tends to limit the DC voltage deviation during DC power changes. This tends to be particularly beneficial in the case of fast DC power changes. The DC power compensation function 440 derives the DC voltage and then the overall HVDC link C eq8 This includes multiplying by an estimated capacitance of 440. Overall HVDC link C eq8 The estimated capacitance of 440 can include the estimated capacitance of the DC cable and the capacitance of the HVDC converter.

[0046] The DC power compensation function 440 is used for AC active power P ac The DC power compensation function 440 further includes function 444, which is function 444, where valve X v The impedance of transformer X T It includes the reactance of . Function 444 is,

number

[0047] The DC power compensation function 440 further includes using a static active power formula to generate a phase angle for compensating for DC power changes. The DC power compensation function 440 includes an asin function 446 that modifies the phase angle requirement to determine the phase angle for compensating for DC power changes in the DC network.

[0048] The DC power compensation function 440 further includes filtering the phase angle. Filtering the phase angle tends to avoid introducing DC voltage noise into the DC control loop. Phase angle filtering includes a low-pass filter 448. The low-pass filter 448 has a time constant T P It is a function of . Time constant T P This is a function of the cutoff frequency. The low-pass filter 448 is given by the equation.

number

[0049] HVDC power transmission networks (or HVDC systems) tend to include at least one DC voltage controller 400 that maintains the DC voltage by adjusting its DC active power output to compensate for any DC energy imbalance. This function can be achieved by a DC voltage control SGFM feature of the DC voltage controller 400. The SGFM feature may include generating a phase angle from the DC voltage regulator.

[0050] The bandwidth of the DC voltage controller module 410 is the DC voltage signal u dc This can be adjusted and determined to compensate for AC or DC disturbances. The PLL420 may include a higher bandwidth than the DC voltage controller module 410 to reduce interactions and instability. However, the bandwidth of the PLL420 is limited by the AC grid signal V qIt may be restricted to avoid high-speed AC voltage fluctuations and high-speed frequency and angular deviations associated with voltage noise amplification.

[0051] Figure 5 is a plot 500 showing the DC voltage from a DC voltage controller according to an embodiment of the present disclosure. Plot 500 shows the effect of the DC power compensation function on the DC voltage for 16 short-circuit ratio (SCR) values. The SCR corresponds to the amount of available power in the AC grid versus the amount of power transmitted to the DC grid.

[0052] Plot 500 shows the DC voltage u without DC power compensation function. dc This shows, for example, a DC voltage u without a DC power compensation function. dc In relation to Figure 3, which lacks a DC power compensation function, the DC voltage u of the DC voltage controller 300 described above is... dc It can handle this.

[0053] Plot 500 shows the DC voltage u with DC power compensation function. dc This is further illustrated. For example, DC voltage u dc This may be the DC voltage of a DC voltage controller 400 that uses the DC power compensation function 440 described above in relation to Figure 4.

[0054] Plot 500 is DC power P dc When the DC voltage increases from 0p.u to 0.9pu in 0.5s, the DC voltage u without DC power compensation function dc This indicates that there is a significant DC disturbance. DC voltage u without DC power compensation function dc Significant DC disturbances in this region result in a DC voltage u from 1p.u to 1.2pu~1.3pu. dc The rapid increase of the DC voltage u followed by a return to 1 p.u approximately 250 ms later. dc This includes a gradual decrease.

[0055] Also, plot 500 is DC power P dc When the DC voltage increases from 0p.u to 0.9pu in 0.5s, the DC voltage u without DC power compensation function dcCompared to DC disturbances in a DC voltage u with a DC power compensation function, dc This shows that DC disturbances are smaller in this case. DC voltage u with DC power compensation function dc A smaller DC disturbance in this case results in a DC voltage u from 1 p.u to approximately 1.05 p.u. dc The rapid increase in the DC voltage u followed by a return to 1 p.u approximately 50 ms later. dc This includes a gradual decrease.

[0056] Therefore, plot 500 shows that without a DC power compensation function, DC power significantly increases the DC voltage up to a maximum overvoltage of 25%, but with a DC power compensation function, the DC voltage is significantly limited to 8%.

[0057] Figure 6 is a plot 600 showing the DC voltage from a DC voltage controller according to an embodiment of the present disclosure. Plot 600 shows the effect of the DC power compensation function on the DC voltage for 2 SCR values. SCR corresponds to the amount of available power in the AC grid versus the amount of power transferred to the DC grid.

[0058] Plot 600 shows the DC voltage u without DC power compensation function. dc This shows, for example, a DC voltage u without a DC power compensation function. dc In relation to Figure 3, which lacks a DC power compensation function, the DC voltage u of the DC voltage controller 300 described above is... dc It can handle this.

[0059] Plot 600 shows the DC voltage u with DC power compensation function. dc This is further illustrated. For example, DC voltage u dc This may be the DC voltage of a DC voltage controller 400 that uses the DC power compensation function 440 described above in relation to Figure 4.

[0060] Plot 600 is DC power P dc When the DC voltage increases from 0p.u to 0.9pu in 0.5s, the DC voltage u without DC power compensation function dcThis indicates that there is a significant DC disturbance. DC voltage u without DC power compensation function dc Significant DC disturbances in this region result in a DC voltage u from 1p.u to 1.2pu~1.3pu. dc The rapid increase of the DC voltage u followed by a return to 1 p.u approximately 250 ms later. dc This includes a gradual decrease.

[0061] Furthermore, plot 600 is DC power P dc When the DC voltage increases from 0p.u to 0.9pu in 0.5s, the DC voltage u without DC power compensation function dc Compared to DC disturbances in a DC voltage u with a DC power compensation function, dc This shows that DC disturbances are smaller in this case. DC voltage u with DC power compensation function dc A smaller DC disturbance in this case results in a DC voltage u from 1 p.u to approximately 1.05 p.u. dc The rapid increase in the DC voltage u followed by a return to 1 p.u approximately 50 ms later. dc This includes a gradual decrease.

[0062] Therefore, plot 600 shows that without a DC power compensation function, DC power significantly increases the DC voltage up to a maximum overvoltage of 25%, but with a DC power compensation function, the DC voltage is significantly limited to 8%.

[0063] Figure 7 shows an example of a processor 700 according to an aspect of this disclosure.

[0064] The processor 700 may be an example of a processor configured to perform various operations according to the examples described herein. The processor 700 may include a controller 702 configured to perform various operations according to the examples described herein. The processor 700 may optionally include at least one memory 704, which may be, for example, an L1 / L2 / L3 cache. Additionally or alternatively, the processor 700 may optionally include one or more arithmetic logic units (ALUs) 706. One or more of these components may be coupled electronically or otherwise (for example, operationally, communicatively, functionally, electronically, electrically) via one or more interfaces (e.g., buses).

[0065] The processor 700 may be a processor chipset and includes a protocol stack (e.g., a software stack) executed by the processor chipset to perform various operations (e.g., receive, acquire, retrieve, transmit, output, transfer, store, determine, identify, access, write, read) in accordance with the examples described herein. The processor chipset may include one or more cores, one or more caches (e.g., memory local to or included in the processor chipset (e.g., processor 700)), or other memory (e.g., random access memory (RAM), read-only memory (ROM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), static RAM (SRAM), ferroelectric RAM (FeRAM), magnetic RAM (MRAM), resistive RAM (RRAM), flash memory, phase-change memory (PCM), and others).

[0066] The controller 702 can be configured to manage and coordinate various operations of the processor 700 (e.g., signaling, receiving, acquiring, searching, transmitting, outputting, transferring, storing, determining, identifying, accessing, writing, reading) in order to enable the processor 700 to support various operations according to the examples described herein. For example, the controller 702 can act as a control unit for the processor 700 and generate control signals that manage the operation of various components of the processor 700. These control signals include enabling or disabling functional units, selecting data paths, initiating memory access, and coordinating the timing of operations.

[0067] The controller 702 may be configured to fetch (e.g., acquire, retrieve, receive) instructions from memory 704 and determine subsequent instructions to be executed to enable the processor 700 to support various operations according to the examples described herein. The controller 702 may be configured to track the memory addresses of the instructions associated with memory 704. The controller 702 may be configured to decode instructions to determine the operations to be performed and the associated operands. For example, the controller 702 may be configured to interpret instructions, determine control signals to be output to other components of the processor 700, and enable the processor 700 to support various operations according to the examples described herein. Additionally or alternatively, the controller 702 may be configured to manage the flow of data within the processor 700. The controller 702 may be configured to control the transfer of data between registers, arithmetic logic units (ALUs), and other functional units of the processor 700.

[0068] The memory 704 may include one or more caches (for example, memory that is local to or included in the processor 700, or other memory such as RAM, ROM, DRAM, SDRAM, SRAM, MRAM, flash memory, etc.). In some embodiments, the memory 704 may reside in or on the processor chipset (for example, local to the processor 700). In some other embodiments, the memory 704 may reside outside the processor chipset (for example, remote from the processor 700).

[0069] Memory 704 can store computer-readable computer-executable code, which, when executed by the processor 700, causes the processor 700 to perform various functions described herein. The code may be stored in a non-temporary computer-readable medium, such as system memory or another type of memory. The controller 702 and / or the processor 700 may be configured to execute the computer-readable instructions stored in memory 704, causing the processor 700 to perform various functions. For example, the processor 700 and / or the controller 702 may be coupled to memory 704, or coupled to memory 704, and the processor 700, controller 702, and memory 704 may be configured to perform various functions described herein. In some examples, the processor 700 may include multiple processors, and memory 704 may include multiple memories. One or more of the multiple processors may be coupled to one or more of the multiple memories, and one or more of the multiple memories may be configured individually or collectively to perform various functions described herein.

[0070] One or more ALU706s can be configured to support various operations according to the examples described herein. In some embodiments, one or more ALU706s may reside within or on a processor chipset (e.g., processor 700). In some other embodiments, one or more ALU706s may reside outside of a processor chipset (e.g., processor 700). One or more ALU706s can perform one or more calculations on data, such as addition, subtraction, multiplication, and division. For example, one or more ALU706s may receive input operands and an arithmetic code that determines the operation to be performed. One or more ALU706s consist of various logic and arithmetic circuits, including adders, subtractors, shifters, and logic gates, to process and manipulate data according to the operation. Additionally or alternatively, one or more ALU706s may support logical operations such as AND, OR, exclusive OR (XOR), non-OR (NOR), and non-AND (NAND), enabling one or more ALU706s to handle conditional operations, comparisons, and bitwise operations.

[0071] The processor 700 can support DC voltage control according to the examples described herein. The processor 700 may be configured to support means for generating a synchronous phase angle from a DC voltage error, the DC voltage error being generated from a measured DC voltage and a requested DC voltage, generating an AC grid phase angle from an AC grid signal, generating a DC power compensation function based at least partially on the measured DC voltage, and for an HVDC converter, generating a phase angle request value based on at least one of the synchronous phase angle, the AC grid phase angle, and the DC power compensation function.

[0072] Figure 8 shows an example of a DC voltage controller 800 according to an embodiment of the present disclosure.

[0073] The DC voltage controller 800 may include a processor 802 and a memory 804. The processor 802 and the memory 804 or various combinations thereof or various components thereof may be examples of means for carrying out various aspects of the present disclosure as described herein. These components may be coupled via one or more interfaces (e.g., operably, communicatively, functionally, electronically, or electrically).

[0074] Various combinations of the processor 802 and memory 804, or their components, may be implemented in hardware (e.g., circuitry). The hardware may include a processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), or other programmable logic device, or any combination thereof configured as means for performing the functions described in this disclosure, or otherwise supporting means for performing the functions described in this disclosure.

[0075] The processor 802 may include intelligent hardware devices (e.g., a general-purpose processor, DSP, CPU, ASIC, FPGA, or any combination thereof). In some embodiments, the processor 802 may be configured to operate the memory 804. In some other embodiments, the memory 804 may be integrated into the processor 802. The processor 802 may be configured to execute computer-readable instructions stored in the memory 804 and to cause the DC voltage controller 800 to perform various functions of this disclosure.

[0076] Memory 804 may include volatile or non-volatile memory. Memory 804 may store computer-readable computer-executable code, which, when executed by processor 802, causes the DC voltage controller 800 to perform various functions described herein. The code may be stored in memory 804 or in a non-temporary computer-readable medium such as another type of memory. The computer-readable medium includes both non-temporary computer storage media and communication media, which include any medium that facilitates the transmission of computer programs from one place to another. The non-temporary storage media may be any available medium that can be accessed by a general-purpose or dedicated computer.

[0077] In some embodiments, the processor 802 and the memory 804 coupled to the processor 802 may be configured to cause the DC voltage controller 800 to perform one or more of the functions described herein (for example, the processor 802 executing instructions stored in the memory 804). The DC voltage controller 800 may be configured to generate a synchronous phase angle from a DC voltage error, the DC voltage error being generated from a measured DC voltage and a requested DC voltage, to generate an AC grid phase angle from an AC grid signal, to generate a DC power compensation function based at least partially on the measured DC voltage, and to support means for generating a phase angle request value for an HVDC converter based on at least one of the synchronous phase angle, the AC grid phase angle, and the DC power compensation function.

[0078] Figure 9 shows a flowchart of a method implemented by a DC voltage controller in a power transmission network according to an aspect of the present disclosure. The operation of Method 900 can be implemented by a DC voltage controller described herein. In some embodiments, the DC voltage controller can execute a set of instructions for controlling the functional elements of the DC voltage controller to perform the functions described.

[0079] In 902, method 900 may include generating a synchronous phase angle from a DC voltage error, the DC voltage error being generated from a measured DC voltage and a requested DC voltage. The operation of 902 can be carried out according to the examples described herein. In some embodiments, the operation of 902 can be carried out by a DC voltage controller as described with reference to Figure 8.

[0080] In 904, method 900 may include generating an AC grid phase angle from an AC grid signal. The operation of 904 can be carried out according to the examples described herein. In some embodiments, the operation of 904 can be carried out by a DC voltage controller as described with reference to Figure 8.

[0081] In 906, method 900 may include generating a DC power compensation function based at least in part on the measured DC voltage. The operation of 906 can be carried out according to the examples described herein. In some embodiments, the operation of 906 can be carried out by a DC voltage controller as described with reference to Figure 8.

[0082] In 908, method 900 may include generating a phase angle requirement for the HVDC converter based on at least one of the synchronous phase angle, the AC grid phase angle, and a DC power compensation function. The operation of 908 can be carried out according to the examples described herein. In some embodiments, the operation of 908 can be carried out by a DC voltage controller as described with reference to Figure 8.

[0083] It should be noted that the method described herein 900 describes possible embodiments, and the operations and steps may be rearranged or otherwise modified, and other embodiments are also possible.

[0084] Throughout this specification, any reference to an example of a particular method or apparatus, or to similar language, means that the particular features, structure, or characteristics described in relation to that example are included in at least one embodiment of the method and apparatus described herein. The terms “includes,” “equipment,” “has,” and their variations mean “includes, but not limited to,” unless otherwise specified. An enumerated list of items does not mean that any or all of the items are mutually exclusive unless otherwise specified. The terms “a,” “an,” and “the” also mean “one or more,” unless otherwise specified.

[0085] As used herein, a list containing the combination of "and / or" includes any single item in the list or any combination of items in the list. For example, the list A, B, and / or C includes A only, B only, C only, a combination of A and B, a combination of B and C, a combination of A and C, or a combination of A, B, and C. As used herein, a list using the technical term "one or more of" includes any single item in the list or any combination of items in the list. For example, one or more of A, B, and C includes A only, B only, C only, a combination of A and B, a combination of B and C, a combination of A and C, or a combination of A, B, and C. As used herein, a list using the technical term "one of" includes only one of any single items in the list. For example, "one of A, B, and C" includes A only, B only, or C only, and excludes the combination of A, B, and C. As used herein, “members selected from the group consisting of A, B, and C” includes only one of A, B, or C, and excludes combinations of A, B, and C. As used herein, “members selected from the group consisting of A, B, and C and combinations thereof” includes A only, B only, C only, a combination of A and B, a combination of B and C, a combination of A and C, or a combination of A, B, and C.

[0086] The embodiments of the disclosed methods and apparatus will be described with reference to schematic flowcharts and / or schematic block diagrams of the methods, apparatus, systems, and program products. It will be understood that each block in the schematic flowcharts and / or schematic block diagrams, as well as any combination of blocks in the schematic flowcharts and / or schematic block diagrams, can be implemented by code. This code can be provided to a processor of a general-purpose computer, a dedicated computer, or other programmable data processing device to manufacture a machine, and as a result, instructions executed via the computer or other programmable data processing device processor will create means for performing the functions / operations specified in the schematic flowcharts and / or schematic block diagrams.

[0087] The schematic flowcharts and / or schematic block diagrams in the figures illustrate the architecture, function, and operation of possible embodiments of the device, system, method, and program product. In this regard, each block in the schematic flowcharts and / or schematic block diagrams may represent a module, segment, or portion of code containing one or more executable instructions of code for implementing a specified logical function.

[0088] The numerical values ​​listed herein are intended solely to aid in illustrating the operation of the present invention and should be understood to vary depending on a given power transmission network, its components, or the requirements of the power transmission application.

[0089] Any enumeration or discussion in this specification of documents or information that are clearly previously published should not necessarily be construed as an endorsement that such documents or information are part of the latest technology or common general knowledge.

[0090] Any given aspect, feature, or parameter preference and choice of the present invention should be considered to be disclosed in conjunction with all other aspects, features, and parameter preferences and choices of the present invention, unless otherwise indicated in the context.

[0091] The disclosure herein provides a method implemented by a DC voltage controller for an HVDC converter, comprising: generating a synchronous phase angle from a DC voltage error, wherein the DC voltage error is generated from a measured DC voltage and a requested DC voltage; generating an AC grid phase angle from an AC grid signal; generating a DC power compensation function based at least in part on the measured DC voltage; and generating a phase angle request value for the HVDC converter based on at least one of the synchronous phase angle, the AC grid phase angle, and the DC power compensation function. Such a method tends to limit the effect of DC voltage deviation on the HVDC converter.

[0092] The HVDC converter may be part of a power transmission network. The power transmission network may include a first AC network connected to a power transmission medium. The first AC network may be a first AC grid. The power transmission medium may be a DC network. The DC network may be a DC grid. The power transmission network may further include a second AC network connected to the power transmission medium. The second AC network may be a second AC grid.

[0093] The HVDC converter may also be a power conversion means. The HVDC converter may be configured to convert AC power to DC power. The HVDC converter may be configured to convert DC power to AC power. The HVDC converter may be configured as a rectifier. The HVDC converter may be configured as an inverter.

[0094] The HVDC converter may operate using synchronous gridforming (SGFM). The HVDC converter may have a three-phase positive-sequence sequence AC voltage source behind the impedance. The HVDC converter may operate at a frequency synchronized with the SGFM source connected to the power transmission network.

[0095] The synchronous angular velocity may correspond to the rotor frequency of the virtual synchronous generator control unit. The synchronous angular velocity may be Δω as described herein. The synchronous phase angle may be a synchronous phase angle signal. The AC grid phase angle may be an AC grid phase angle signal. The AC grid phase angle may be δ as described herein. PLL The AC grid signal may also be an AC signal from an AC grid. The AC grid signal may be a V as described herein. q The synchronization phase angle is δ as described herein. c The DC voltage error signal may be a udc-udc* as described herein. The udc* may be a requested DC voltage signal as described herein. The udc may be a measured DC voltage signal as described herein.

[0096] The synchronization phase angle may correspond to the phase angle of the DC grid. The AC grid phase angle may correspond to the phase angle of the AC grid. The phase angle requirement may be the attenuation phase angle. The phase angle requirement may be the phase angle requirement signal.

[0097] The requested DC voltage may correspond to the desired DC voltage relative to the DC grid. The measured DC voltage may also be the DC voltage measured across the HVDC converter.

[0098] The phase angle requirement may correspond to the phase angle for adjusting the DC voltage signal of the HVDC converter. The phase angle requirement is the phase angle requirement δ described herein. m That's fine.

[0099] The DC power compensation function may compensate for DC voltage deviations in a DC network. The DC power compensation function may compensate for DC power changes in a DC network. The DC power compensation function may include a phase angle to compensate for DC power changes in a DC network by modifying the phase angle requirement. The DC power compensation function may include an asin function that determines the phase angle to compensate for DC power changes in a DC network by modifying the phase angle requirement.

[0100] The DC power compensation function is, valve X v It may also be a function of impedance. The DC power compensation function is the transformer X T It may also be a function of reactance. The DC power compensation function may include a low-pass filter. The low-pass filter may be for reducing noise in the DC power compensation function. The low-pass filter has a time constant T P It may also be a function of the time constant T. P The function of the low-pass filter may be a function of the cutoff frequency. The low-pass filter may be an first-order filter. The low-pass filter may be a second-order filter. The low-pass filter may be a third-order filter. The low-pass filter may include a transfer function. The low-pass filter may include a Laplace transform.

[0101] Generating a DC power compensation function may include generating a DC power compensation function based at least partially on an AC power signal. The AC power signal may be AC ​​active power. The AC power signal is P as described herein. ac That's fine.

[0102] Generating a DC power compensation function may include generating a DC power compensation function based at least in part on the estimated capacitance of the HVDC link. The estimated capacitance may be the estimated capacitance of the DC cable. The DC cable may be in the DC grid. The estimated capacitance may be the estimated capacitance of the HVDC converter. The estimated capacitance is as described herein. eq8That's fine.

[0103] Generating a synchronous phase angle may include generating a synchronous angular velocity. The synchronous angular velocity may correspond to the rotor frequency of the virtual synchronous generator control unit. Generating the synchronous angular velocity may include multiplying the DC voltage error by the DC gain. The DC gain may depend on the bandwidth of the HVDC converter. The DC gain may depend on the DC system capacitance.

[0104] The method may further include modulating the synchronous phase angle based on the minimum and maximum phase angles. The maximum and minimum phase angles may be based on the overcurrent capability of the converter. For example, the minimum phase angle may be -60 degrees, and the maximum phase angle may be +60 degrees.

[0105] Generating the phase angle requirement may include the sum of the AC grid phase angle, the synchronous phase angle, and the DC power compensation function. The method may further include receiving the measured DC voltage and the required DC voltage of the DC network. The method may further include receiving the AC grid signal from the AC grid.

[0106] A DC voltage controller for an HVDC converter is further provided, comprising at least one memory and at least one processor coupled to the memory, configured to cause the DC voltage controller to generate a synchronous phase angle from a DC voltage error for the HVDC converter, the DC voltage error being generated from measured DC voltages and requested DC voltages of the DC network, to generate an AC grid phase angle from an AC grid signal, to generate a DC power compensation function based at least partially on the measured DC voltage, and to generate a phase angle request value for the HVDC converter based on at least one of the synchronous phase angle, the AC grid phase angle, and the DC power compensation function. Such a DC voltage controller tends to limit the effect of DC voltage deviations on the HVDC converter.

[0107] A processor coupled to at least one memory and configured to cause a DC voltage controller to generate a DC power compensation function may further comprise at least one processor coupled to at least one memory and configured to cause a DC voltage controller to generate a DC power compensation function based at least partially on an AC power signal.

[0108] A processor coupled to at least one memory and configured to cause a DC voltage controller to generate a DC power compensation function may further comprise at least one processor coupled to at least one memory and configured to cause a DC voltage controller to generate a DC power compensation function based at least partially on the estimated capacitance of the HVDC link.

[0109] A processor coupled to at least one memory and configured to cause a DC voltage controller to generate a synchronous phase angle may further comprise at least one processor coupled to at least one memory and configured to cause a DC voltage controller to generate a synchronous angular velocity.

[0110] At least one processor coupled to at least one memory and configured to cause a DC voltage controller to generate a synchronous angular velocity may further comprise at least one processor coupled to at least one memory and further configured to cause the DC voltage controller to multiply the DC voltage error by a DC gain. The at least one processor coupled to at least one memory may further configure the DC voltage controller to modulate the synchronous phase angle based on the minimum and maximum phase angles.

[0111] The at least one processor coupled to at least one memory and configured to cause a DC voltage controller to generate a phase angle request value may further comprise at least one processor coupled to at least one memory and configured to cause a DC voltage controller to sum an AC grid phase angle, a synchronous phase angle, and a DC power compensation function.

[0112] At least one processor coupled with at least one memory may be further configured to cause the DC voltage controller to receive measured and requested DC voltages from the DC network. At least one processor coupled with at least one memory may be further configured to cause the DC voltage controller to receive AC grid signals from the AC grid. [Explanation of Symbols]

[0113] 100 Power transmission networks 110 First power conversion means 110a First AC side 110b First DC side 120 Second power conversion means 120a Second AC side 120b Second DC side 130 Power transmission medium 140 First AC Network 150 Second AC Network 200 controllers 210 memory 220 processors 230 transceiver configuration 231 Transmitter 232 Receiver 300 DC Voltage Controller 310 DC Voltage Controller Module 320 Phase-Locked Loop (PLL) 334 Integrator 400 DC Voltage Controller 410 DC Voltage Controller Module 420 PLL 434 Integrator 440 DC Power Compensation Function / HVDC Link 444 Functions 446 ASIN function 448 Low-pass filter 500 plots 600 plots 700 processor 702 Controller 704 memory 706 Arithmetic Logic Unit (ALU) 800 DC Voltage Controller 802 Processor 804 memory 900 ways 902 operation 904 operation 906 operation 908 operation

Claims

1. A method (900) implemented by a DC voltage controller (300, 400, 800) for an HVDC converter, (902) Generating a synchronous phase angle from a DC voltage error, wherein the DC voltage error is generated from a measured DC voltage and a required DC voltage. Generating the AC grid phase angle from the AC grid signal (904), (906) A DC power compensation function (440) is generated based at least partially on the measured DC voltage, For the HVDC converter, a phase angle requirement is generated based on at least one of the synchronous phase angle, the AC grid phase angle, and the DC power compensation function (440) (908) Method (900), including.

2. The method according to claim 1 (900), wherein generating the DC power compensation function (440) includes generating the DC power compensation function (440) based at least in part on an AC power signal.

3. The method according to claim 1 or 2 (900), wherein generating the DC power compensation function (440) comprises generating the DC power compensation function (440) based at least in part on the estimated capacitance of the HVDC link (440).

4. The method according to any one of claims 1 to 3 (900), wherein generating the synchronous phase angle includes generating the synchronous angular velocity.

5. The method according to any one of claims 1 to 4 (900), wherein generating the synchronous angular velocity includes multiplying the DC voltage error by the DC gain.

6. The method according to any one of claims 1 to 5 (900), further comprising modulating the synchronization phase angle based on the minimum phase angle and the maximum phase angle.

7. The method according to any one of claims 1 to 6 (900), wherein generating the phase angle requirement includes the sum of the AC grid phase angle, the synchronization phase angle, and the DC power compensation function (440).

8. The method according to any one of claims 1 to 7 (900), further comprising receiving the measured DC voltage and the requested DC voltage of the DC network.

9. The method according to any one of claims 1 to 8 (900), further comprising receiving the AC grid signal from the AC grid.

10. DC voltage controllers (300, 400, 800) for HVDC converters, At least one memory (210, 704, 804) and Coupled with at least one of the aforementioned memories (210, 704, 804), and connected to the DC voltage controller (300, 400, 800), The synchronization phase angle is generated from the DC voltage error of the HVDC converter, and the DC voltage error is generated from the measured DC voltage and the requested DC voltage of the DC network. The AC grid phase angle is generated from the AC grid signal. A DC power compensation function (440) is generated based at least partially on the measured DC voltage. For the HVDC converter, a phase angle requirement is generated based on at least one of the synchronous phase angle, the AC grid phase angle, and the DC power compensation function (440). At least one processor (220, 700, 802) configured as follows: DC voltage controllers (300, 400, 800) equipped with the following features.

11. The at least one processor (220, 700, 802), coupled to the at least one memory (210, 704, 804) and configured to cause the DC voltage controller (300, 400, 800) to generate the DC power compensation function (440), is coupled to the at least one memory (210, 704, 804) and configured to cause the DC voltage controller (300, 400, 800) to generate the DC power compensation function (440), The DC power compensation function (440) is generated based at least partially on the AC power signal. The DC voltage controller (300, 400, 800) according to claim 10, further comprising the at least one processor (220, 700, 802) configured as described above.

12. The at least one processor (220, 700, 802), coupled to the at least one memory (210, 704, 804) and configured to cause the DC voltage controller (300, 400, 800) to generate the DC power compensation function (440), is coupled to the at least one memory (210, 704, 804) and configured to cause the DC voltage controller (300, 400, 800) to generate the DC power compensation function (440), The DC power compensation function (440) is generated based at least partially on the estimated capacitance of the HVDC link (440). A DC voltage controller (300, 400, 800) according to claim 10 or 11, further comprising the at least one processor (220, 700, 802) configured as follows.

13. The at least one processor (220, 700, 802) coupled to the at least one memory (210, 704, 804) and configured to cause the DC voltage controller (300, 400, 800) to generate the synchronization phase angle, is coupled to the at least one memory (210, 704, 804) and configured to cause the DC voltage controller (300, 400, 800), Generate synchronous angular velocity A DC voltage controller (300, 400, 800) according to any one of claims 10 to 12, further comprising the at least one processor (220, 700, 802) configured as described above.

14. The at least one processor (220, 700, 802) coupled to the at least one memory (210, 704, 804) and configured to cause the DC voltage controller (300, 400, 800) to generate the synchronous angular velocity, is coupled to the at least one memory (210, 704, 804) and configured to cause the DC voltage controller (300, 400, 800), The DC voltage error is multiplied by the DC gain. A DC voltage controller (300, 400, 800) according to any one of claims 10 to 13, further comprising the at least one processor (220, 700, 802) configured as described above.

15. The at least one processor (220, 700, 802) coupled with the at least one memory (210, 704, 804) provides the DC voltage controller (300, 400, 800) The synchronization phase angle is modulated based on the minimum and maximum phase angles. A DC voltage controller (300, 400, 800) according to any one of claims 10 to 14, further configured as follows.

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