Semiconductor device with antenna, and method for manufacturing a semiconductor device with an antenna
The semiconductor device with an antenna design addresses the challenge of securing both current and heat dissipation paths by using a heat dissipation portion and strategic BGA connectors, ensuring efficient operation and miniaturization in high-frequency applications.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- 1FINITY INC
- Filing Date
- 2024-12-23
- Publication Date
- 2026-07-03
Smart Images
Figure 2026111052000001_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a semiconductor device with an antenna and a method for manufacturing the semiconductor device with an antenna.
Background Art
[0002] Conventionally, it includes a heat dissipation part mounted on a wiring board, a semiconductor chip mounted on the heat dissipation part, a through hole formed in the wiring board so as to be connected to the heat dissipation part, and a conductor ball provided on the surface of the wiring board on the side opposite to the surface on which the heat dissipation part is mounted. Some of the conductor balls are connected to the wiring of the wiring board connected to the semiconductor chip by bonding wires. Some of the other conductor balls are connected to the through hole. That is, some of the conductor balls are used as a signal transmission path, and some of the other conductor balls are used as a heat dissipation path and a ground path (see, for example, Patent Document 1).
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] By the way, in recent years, there is a semiconductor package with an antenna (Antenna in Package: AiP). A semiconductor package with an antenna (AiP) is a semiconductor device with an antenna. When the operating frequency of the antenna becomes high in a semiconductor device with an antenna, it is difficult to increase the size due to restrictions such as the pitch between antennas. Therefore, in a configuration where a bonding conductor used as a signal transmission path and a bonding conductor connected to a heat dissipation part are arranged on one surface of a semiconductor chip, it is necessary to devise to ensure a current path and a heat dissipation path.
[0005] Therefore, the objective is to provide a semiconductor device with an antenna that secures both a current path and a heat dissipation path, and a method for manufacturing a semiconductor device with an antenna. [Means for solving the problem]
[0006] The semiconductor device with an antenna according to an embodiment of the present disclosure includes a semiconductor chip having a first chip surface and a circuit surface located opposite to the first chip surface, a heat dissipation portion having a first surface and a second surface located opposite to the first surface and in contact with the first chip surface of the semiconductor chip, and a wiring substrate having a first substrate surface located on the first surface side of the heat dissipation portion and a second substrate surface located opposite to the first substrate surface, wherein a resin insulating layer and a metal wiring layer are laminated, and the heat dissipation portion covers the side surface of the semiconductor chip and the circuit surface of the semiconductor chip, and the first surface of the heat dissipation portion covers the first surface of the heat dissipation portion The wiring board has an exposed wiring board and an antenna provided on the second substrate surface of the wiring board, the wiring board having a substrate connection portion provided in a region of the first substrate surface located outside the outer edge of the semiconductor chip in a plan view, and a region of the first substrate surface located inside the outer edge of the semiconductor chip and outside the outer edge of the first surface in a plan view, a first wiring that connects the substrate connection portion to a first terminal provided on the circuit surface of the semiconductor chip, and a second wiring that connects the antenna to a second terminal provided on the circuit surface of the semiconductor chip. [Effects of the Invention]
[0007] This invention provides a semiconductor device with an antenna that secures both a current path and a heat dissipation path, as well as a method for manufacturing such a semiconductor device with an antenna. [Brief explanation of the drawing]
[0008] [Figure 1] This figure shows an example of the cross-sectional configuration of the semiconductor device 100 with an antenna according to the embodiment. [Figure 2] This is a diagram showing a magnified view of a part of the semiconductor device 100 with an antenna. [Figure 3]This is a transparent diagram showing an example of the planar configuration of a semiconductor device 100 with an antenna. [Figure 4A] This figure shows a modified arrangement of BGA150A and 150B. [Figure 4B] This figure shows a modified arrangement of BGA150A and 150B. [Figure 5A] This diagram illustrates the manufacturing process of a semiconductor device 100 with an antenna. [Figure 5B] This diagram illustrates the manufacturing process of a semiconductor device 100 with an antenna. [Figure 5C] This diagram illustrates the manufacturing process of a semiconductor device 100 with an antenna. [Figure 5D] This diagram illustrates the manufacturing process of a semiconductor device 100 with an antenna. [Figure 5E] This diagram illustrates the manufacturing process of a semiconductor device 100 with an antenna. [Figure 5F] This diagram illustrates the manufacturing process of a semiconductor device 100 with an antenna. [Figure 5G] This diagram illustrates the manufacturing process of a semiconductor device 100 with an antenna. [Figure 5H] This diagram illustrates the manufacturing process of a semiconductor device 100 with an antenna. [Figure 5I] This diagram illustrates the manufacturing process of a semiconductor device 100 with an antenna. [Figure 5J] This diagram illustrates the manufacturing process of a semiconductor device 100 with an antenna. [Figure 5K] This diagram illustrates the manufacturing process of a semiconductor device 100 with an antenna. [Figure 6A] This diagram illustrates the manufacturing process of a modified example of the semiconductor device 100 with an antenna. [Figure 6B] This diagram illustrates the manufacturing process of a modified example of the semiconductor device 100 with an antenna. [Figure 6C] This diagram illustrates the manufacturing process of a modified example of the semiconductor device 100 with an antenna. [Figure 7A] This figure shows an example of the configuration of a semiconductor device 100A with an antenna, which is a modified example of the embodiment. [Figure 7B] It is a diagram showing an example of the configuration of the semiconductor device 100B with an antenna according to a modified example of the embodiment. [Figure 8A] It is a diagram for explaining the manufacturing process of the semiconductor device 100B with an antenna. [Figure 8B] It is a diagram for explaining the manufacturing process of the semiconductor device 100B with an antenna. [Figure 8C] It is a diagram for explaining the manufacturing process of the semiconductor device 100B with an antenna. [Figure 8D] It is a diagram for explaining the manufacturing process of the semiconductor device 100B with an antenna. [Figure 8E] It is a diagram for explaining the manufacturing process of the semiconductor device 100B with an antenna. [Figure 8F] It is a diagram for explaining the manufacturing process of the semiconductor device 100B with an antenna. [Figure 8G] It is a diagram for explaining the manufacturing process of the semiconductor device 100B with an antenna. [Figure 8H] It is a diagram for explaining the manufacturing process of the semiconductor device 100B with an antenna. [Figure 8I] It is a diagram for explaining the manufacturing process of the semiconductor device 100B with an antenna.
Embodiments for Carrying Out the Invention
[0009] Hereinafter, embodiments to which the semiconductor device with an antenna of the present disclosure and the manufacturing method of the semiconductor device with an antenna are applied will be described. Hereinafter, the same elements may be denoted by the same reference numerals, and redundant descriptions may be omitted.
[0010] The following describes the XYZ coordinate system. The directions parallel to the X-axis (X direction), parallel to the Y-axis (Y direction), and parallel to the Z-axis (Z direction) are mutually orthogonal. The X direction is an example of the first axis direction, the Y direction is an example of the second axis direction, and the Z direction is an example of the third axis direction. Also, for the sake of explanation, the -Z direction side may be referred to as the lower side or bottom, and the +Z direction side as the upper side or top. Plane view refers to viewing from the XY plane. Also, in the following, the length, width, thickness, etc. of each part may be exaggerated to make the configuration easier to understand. Furthermore, the terms parallel, right angle, orthogonal, horizontal, vertical, up and down, etc., should be used with a degree of deviation that does not impair the effect of the embodiment.
[0011] Furthermore, in the following, when we refer to "millimeter wave" or "millimeter wave band," we mean to include not only the 30GHz to 300GHz frequency band but also the 24GHz to 30GHz quasi-millimeter wave band.
[0012] The radio waves transmitted or received by the antenna of the semiconductor device with an antenna in this embodiment will be described, for example, as millimeter-wave radio waves in the 40 GHz or higher frequency band, such as those used in sixth-generation mobile communication systems (6G). However, the radio waves transmitted or received by the antenna of the semiconductor device with an antenna in this embodiment may also be millimeter-wave radio waves in the 1 GHz to 30 GHz frequency band, such as those used in fifth-generation mobile communication systems (5G), or those including Sub-6.
[0013] <Embodiment> Figure 1 shows an example of the cross-sectional configuration of the semiconductor device 100 with an antenna according to the embodiment. Figure 2 is a magnified view of a part of the semiconductor device 100 with an antenna. Figure 3 is a transparent view showing an example of the planar configuration of the semiconductor device 100 with an antenna. The cross-section shown in Figure 1 is the cross-section viewed through arrow AA in Figure 3.
[0014] Figure 3 transparently shows the positional relationship between the metal layers 111, 112, and 113 of the heat dissipation section 110, the semiconductor chip 120, the wiring board 130, and the multiple BGAs (Ball Grid Arrays) 150 (150A, 150B). The antenna 140 is omitted in Figure 3. In Figure 3, the outer edges of the metal layer 111 and the semiconductor chip 120 are shown with dashed lines, and the outer edges of the metal layers 112 and 113 and the wiring board 130 are shown with solid lines.
[0015] <Semiconductor device with antenna 100> The semiconductor device with an antenna 100 includes a heat dissipation unit 110, a semiconductor chip 120, a wiring board 130, an antenna 140, and multiple BGAs (Ball Grid Arrays) 150. The semiconductor device with an antenna 100 is mounted on an RF (Radio Frequency) board 50 via BGAs 150 (150A, 150B). Hereafter, unless specifically distinguished, BGAs 150A and 150B will simply be referred to as BGA 150.
[0016] The semiconductor device with antenna 100 is an Antenna in Package (AiP) semiconductor package that incorporates an antenna 140 as an RF antenna within the package. The semiconductor device with antenna 100 is a wireless communication device that can be mounted, for example, on a radio unit (RU) at the front end of a base station, and the RF board 50 is the base station's motherboard.
[0017] The AiP has a structure in which a semiconductor chip 120 containing the signal amplifies it and radiates radio waves from the antenna 140. In recent 5G and beyond applications, the use of millimeter-wave frequencies is progressing to support ultra-high-speed communication, ultra-low latency, and a large number of simultaneous connections. In AiPs for base stations, in order to achieve high output, it is necessary to place the RF chip containing heat-generating parts such as power amplifiers near the antenna 140, so that low-loss and high-output radio waves can be radiated from the antenna 140. The semiconductor device 100 with an antenna of this embodiment meets these needs by ensuring a current path to the semiconductor chip 120 while also ensuring a heat dissipation path that efficiently releases heat from the semiconductor chip 120 to the outside.
[0018] The RF board 50 has a heat sink 51 and terminals 52. The heat sink 51 is provided on the RF board 50 and connected to the heat dissipation section 110 of the semiconductor device 100 with an antenna via a BGA 150B. The heat sink 51 is provided to dissipate heat transferred from the heat dissipation section 110 via the BGA 150B to the outside of the RF board 50. The heat sink 51 is preferably made of a metal with high thermal conductivity, and may be made of a metal such as aluminum or copper, for example.
[0019] Terminal 52 is located on the top surface of the RF board 50 and is connected to the terminal on the top surface (circuit side) of the semiconductor chip 120 via the BGA 150A and the wiring layers 132 and vias 133 of the wiring board 130. The terminal on the top surface of the semiconductor chip 120 is connected to the circuit section 120A inside the semiconductor chip 120.
[0020] <Heat dissipation section 110> The heat dissipation section 110 has metal layers 111, 112, 113, vias 114, and an insulating layer 131A. Metal layer 111 is an example of a first metal layer, and metal layer 113 is an example of a second metal layer. The insulating layer 131A is an example of an interlayer insulating layer. If the heat dissipation section 110 has metal layers 111 and 112 but not metal layer 113, then metal layer 112 is an example of a second metal layer.
[0021] The metal layer 111 is provided on the lower surface of the semiconductor chip 120 (an example of the first chip surface). That is, the upper surface of the metal layer 111 is in contact with the lower surface of the semiconductor chip 120. The upper surface of the metal layer 111 is an example of the second surface of the heat dissipation section 110.
[0022] For example, the metal layer 111 is provided over the entire underside of the semiconductor chip 120. Therefore, as shown in Figure 3, in a plan view, the outer edge of the metal layer 111 coincides with the outer edge of the semiconductor chip 120.
[0023] As an example, the metal layer 111 is provided over the entire underside of the semiconductor chip 120, allowing for efficient collection of heat generated throughout the semiconductor chip 120. However, the metal layer 111 may be provided only on a portion of the underside of the semiconductor chip 120, rather than over the entire surface.
[0024] The metal layer 112 is provided between the metal layers 111 and 113 via the insulating layer 131A. The insulating layer 131A is located between the metal layers 111 and 112 and between the metal layers 112 and 113. The areas between the metal layers 111 and 112 and between the metal layers 112 and 113 are connected by vias 114 that penetrate the insulating layer 131A in the Z direction. In other words, the areas between the metal layers 111, 112, and 113 are connected by vias 114 that penetrate the insulating layer 131A in the Z direction.
[0025] For example, the metal layer 112 is smaller than the metal layer 111 in a plan view. Here, the fact that the metal layer 112 is smaller than the metal layer 111 in a plan view means that some of the multiple BGAs 150 arranged at equal pitches in the X and Y directions in a plan view are so different in size that they are located between the outer edge of the metal layer 111 and the outer edge of the metal layer 112 in either the X or Y direction.
[0026] In a plan view, the outer edge of metal layer 112 is contained within the outer edge of metal layer 111. For example, the length of metal layer 112 in the X and Y directions is approximately half the length of metal layer 111 in the X and Y directions, and the size of metal layer 112 is approximately one-quarter the size of metal layer 111.
[0027] The metal layer 113 is located beneath the metal layer 112 via the insulating layer 131A. The metal layer 113 is exposed from the bottom surface of the wiring board 130, and the BGA 150B is connected to the bottom surface of the metal layer 113. The bottom surface of the metal layer 113 is an example of the first surface of the heat dissipation section 110.
[0028] For example, in a plan view, metal layer 113 is smaller than metal layer 111 and has the same size and shape as metal layer 112. In a plan view, the outer edge of metal layer 113 is contained within the outer edge of metal layer 111 and coincides with the outer edge of metal layer 112. In this case, the heat sink 51 of the RF board 50 has the same size and shape as metal layers 112 and 113 in a plan view, and it is sufficient that its position in a plan view is aligned with that of metal layers 112 and 113.
[0029] The metal layer 113 is connected to the heat sink 51 via the BGA 150B. Therefore, the heat dissipation section 110 functions as a heat dissipation path that transfers the heat generated by the semiconductor chip 120 to the heat sink 51.
[0030] Here, between metal layer 111, which is an example of a first metal layer, and metal layer 113, which is an example of a second metal layer, a via 114 penetrating the insulating layer 131A, a metal layer 112, and another via 114 penetrating the insulating layer 131A are provided from the metal layer 111 side to the metal layer 113 side. When we say that metal layer 111, which is an example of a first metal layer, and metal layer 113, which is an example of a second metal layer, are connected via via 114, it means that metal layers 111 and 113 are connected via via 114 through metal layer 112. This is also true even if two or more metal layers 112 are provided between metal layers 111 and 113.
[0031] The heat dissipation section 110 is covered on its sides by the wiring board 130, and its bottom surface (the bottom surface of the metal layer 113) is exposed from the bottom surface of the wiring board 130. For example, the heat dissipation section 110 is located in a position that overlaps with the matching circuit 134 located at the bottom of the wiring board 130 in the height direction (Z direction), and for example, it is formed from the same metal material as the wiring layer 132 and vias 133 that make up the matching circuit 134.
[0032] In other words, the metal layers 111, 112, and 113 are, for example, metal layers formed by the semiconductor manufacturing process together with the wiring layer 132 of the wiring board 130. Similarly, the insulating layer 131A of the heat dissipation section 110 is, for example, an insulating layer formed by the semiconductor manufacturing process together with the insulating layer 131 of the wiring board 130. The metal layers 111, 112, and 113 may be formed from a metal such as copper, for example. The material of the insulating layer 131A will be described later, along with the explanation of the insulating layer 131 of the wiring board 130.
[0033] <Semiconductor Chip 120> The semiconductor chip 120 is an RFIC manufactured by a semiconductor manufacturing process, and is manufactured on a silicon substrate as a base, for example. The semiconductor chip 120 is placed on the heat dissipation section 110 and has a lower surface in contact with the upper surface of the heat dissipation section 110, an upper surface, and a circuit section 120A provided inside. The upper surface of the semiconductor chip 120 is the circuit surface. Terminals for connecting to the wiring layer 132 of the wiring board 130 are provided on the circuit surface.
[0034] Circuit section 120A is a wireless communication circuit consisting of a power amplifier for transmission and an LNA (Low Noise Filter) for reception, and is connected to terminals on the circuit face via wiring and other connections not shown in the diagram. Multiple terminals are provided on the circuit face.
[0035] <Wiring board 130> The wiring board 130 has a bottom surface 130L, a top surface 130U, an insulating layer 131, a wiring layer 132, vias 133, and matching circuits 134. The bottom surface 130L is an example of a first substrate surface, and the top surface 130U is an example of a second substrate surface. The wiring board 130 has a configuration in which multiple insulating layers 131 and multiple wiring layers (wiring layers 132 and matching circuits 134) are alternately stacked, and vias 133 are used to connect the multiple wiring layers (wiring layers 132 and matching circuits 134). Such a wiring board 130 can be manufactured in a manufacturing process for rewiring.
[0036] As shown in Figure 3, the wiring board 130 has a larger size in plan view than the heat dissipation section 110 and the semiconductor chip 120, and its height in the Z direction is also greater than that of the heat dissipation section 110 and the semiconductor chip 120. The wiring board 130 covers the sides of the heat dissipation section 110 and the semiconductor chip 120, and the circuit side (top surface) of the semiconductor chip 120 opposite to the heat dissipation section 110, while exposing the bottom surface 130L of the metal layer 113 of the heat dissipation section 110.
[0037] Here, one insulating layer 131 that is at the same height as the semiconductor chip 120 is distinguished as insulating layer 131B. Insulating layer 131B is one of the multiple insulating layers 131 included in the wiring board 130 and is the thickest insulating layer among the multiple insulating layers 131. Insulating layers 131 other than insulating layer 131B have a structure using, for example, a film material made by mixing a filler such as alumina into epoxy resin (for example, ABF material manufactured by Ajinomoto Fine Techno Co., Ltd.), or a resin film material such as polyimide film. Insulating layer 131B can be made from a molding agent made by mixing a filler such as alumina into epoxy resin. However, insulating layer 131B may also have a structure using a film material made by mixing a filler such as alumina into epoxy resin, or a resin film material such as polyimide film, similar to insulating layers 131 other than insulating layer 131B.
[0038] The wiring layer 132 is, for example, made of copper (copper foil pattern) and comprises all of the multiple wiring layers provided on the wiring board 130. At least a portion of the wiring layer 132 provided on the bottom layer of the wiring board 130 is used as terminal 132A (see Figure 2). Terminal 132A is an example of a board connection part. A BGA 150A is connected to terminal 132A. In addition, the metal layers 111 to 113 of the heat dissipation part 110 are manufactured together with the wiring layer 132 in the manufacturing process for rewiring.
[0039] Via 133 is made of copper, for example, and connects multiple wiring layers 132. Via 133 is a small-diameter through-via. Via 114 of the heat dissipation section 110 is manufactured together with via 133 in the manufacturing process for rewiring.
[0040] The matching circuit 134 is constructed from several of the lowest wiring layers 132 among all of the wiring layers 132 provided on the wiring board 130, and vias 133. The matching circuit 134 is made of copper, for example. The matching circuit 134 is a matching circuit provided to match the impedance between the wiring layers 132 and vias 133 and the BGA 150A, and has, for example, a capacitive component and an inductance component formed by the copper foil pattern.
[0041] In the wiring board 130 with the configuration described above, the wiring (an example of the first wiring) consisting of the insulating layer 131, the wiring layer 132, the via 133, and a part of the matching circuit 134 connects the first terminal of a plurality of terminals provided on the circuit surface of the semiconductor chip 120 to the terminal 132A of the bottom layer of the wiring board 130. Terminal 132A is connected to terminal 52 of the RF board 50 via BGA 150A. The wiring, as an example of the first wiring, serves as a transmission path for control signals of the circuit section 120A and signals transmitted or received via the antenna 140, as well as a power supply path to the circuit section 120A.
[0042] Furthermore, wiring (an example of second wiring) composed of the insulating layer 131, the wiring layer 132, and a portion of the vias 133 connects the second terminal of a plurality of terminals provided on the circuit surface of the semiconductor chip 120 to a plurality of antennas 140. An example of second wiring is the feed line for the antennas 140.
[0043] <Antenna 140> The antennas 140 are patch antennas provided in multiple locations on the upper surface 130U of the wiring board 130. The antennas 140, like the wiring layers 132 and vias 133, are, for example, made of copper and can be fabricated as copper foil patterns during the rewiring manufacturing process. Here, as an example, a configuration in which the antenna-equipped semiconductor device 100 includes four antennas 140 is described, but the antenna-equipped semiconductor device 100 only needs to include at least two or more antennas 140.
[0044] The four antennas 140 are arranged in a configuration of two in the X direction and two in the Y direction, with equal pitch in both the X and Y directions. The radio waves radiated from the four antennas 140 form a single beam through beamforming, and the beam angle can be changed by controlling the phase of the radio waves radiated from the four antennas 140 by the circuit unit 120A.
[0045] <bga150> Multiple BGA150s can be divided into BGA150A and BGA150B, but BGA150A and BGA150B are, for example, the same type. "Same type" means that they have the same size and material, and can be used without distinguishing between them.
[0046] BGA150A is used for transmitting signals and power, while BGA150B is used as a heat dissipation path.
[0047] In particular, when transmitting radio waves in the millimeter wave band, such as for sixth-generation mobile communication systems (6G), with a frequency band of 40 GHz or higher, it is necessary to be able to supply a large amount of current to the power amplifier included in circuit section 120A. Since the current capacity of each BGA150A is limited, many BGA150A units are required. This is also true when transmitting radio waves in the millimeter wave band, such as for fifth-generation mobile communication systems (5G), and in the frequency band of 1 GHz to 30 GHz, including Sub-6.
[0048] Furthermore, from the perspective of ensuring proper heat dissipation, it is necessary to secure a certain number of BGA150B chips.
[0049] <Securing the current path> The semiconductor device 100 with an antenna has a configuration in which the number of BGA150A is increased in order to secure the current path.
[0050] As shown in Figure 3, BGA150A is a BGA150 that is located outside the outer edges of the metal layers 112 and 113 of the heat dissipation section 110. As shown in Figures 1 and 2, BGA150A connects terminal 132A of the wiring board 130 to terminal 52 of the RF board 50.
[0051] Of all the BGA150A, the BGA150A located towards the center of the wiring board 130 in a plan view is located inside the outer edge of the semiconductor chip 120 and outside the outer edges of the metal layers 112 and 113 in a plan view. The BGA150A located inside the outer edge of the semiconductor chip 120 is located on the underside of the semiconductor chip 120. In this way, by providing BGA150A located inside the outer edge of the semiconductor chip 120, the number of BGA150A can be increased. Increasing the number of BGA150A can increase the capacity of the current path, making it possible to supply a large current to the circuit section 120A via the BGA150A.
[0052] For example, compared to the case where BGA150A is placed only on the outside of the semiconductor chip 120 in a plan view, the number of BGA150A can be significantly increased when BGA150A is also placed on the underside of the semiconductor chip 120, as in the semiconductor device with an antenna 100.
[0053] The semiconductor device 100 with an antenna secures a current path capable of handling high currents by positioning the BGA150A not only outside the outer edge of the semiconductor chip 120 in a plan view, but also inside the outer edge of the semiconductor chip 120, and outside the outer edges of the metal layers 112 and 113. High current refers to the amount of current that needs to be supplied to the power amplifier in order to increase the radiation distance of radio waves in the millimeter wave band, such as sixth-generation mobile communication systems (6G), with a frequency band of 40 GHz or higher, or in the millimeter wave band, such as fifth-generation mobile communication systems (5G), or in the frequency band of 1 GHz to 30 GHz, including Sub-6.
[0054] <Ensuring a heat dissipation path> In order to ensure a proper heat dissipation path, it is desirable to place the heat dissipation unit 110 and the heat sink plate 51 of the RF board 50 close together and connect them in a way that minimizes thermal resistance.
[0055] The semiconductor device 100 with an antenna has a heat dissipation section 110 directly beneath the semiconductor chip 120 to ensure a heat dissipation path, and the heat dissipation section 110 and the heat sink plate 51 are connected only by multiple BGA150B connectors. The heat dissipation section 110 has a configuration in which metal layers 111 to 113 are connected by a large number of vias 114.
[0056] As shown in Figure 3, BGA150B is a BGA150 among all BGA150A that is located inside the outer edges of the metal layers 112 and 113 of the heat dissipation section 110. As shown in Figures 1 and 2, BGA150B connects the lower surface of the metal layer 113 of the heat dissipation section 110 to the upper surface of the heat sink 51 of the RF board 50.
[0057] Therefore, the heat dissipation unit 110 is connected to the heat sink 51 only via the BGA150B. The heat from the heat dissipation unit 110 is transferred to the heat sink 51 via the BGA150B and dissipated into the air from the heat sink 51. In addition, some of the heat is dissipated into the air from both the heat dissipation unit 110 and the BGA150B.
[0058] In this way, the heat dissipation section 110 exposed on the underside of the semiconductor device 100 with an antenna is connected to the heat sink 51 of the RF board 50 via the shortest path by the BGA 150B connected to the underside of the metal layer 113, so that it is connected to the heat sink 51 with low thermal resistance. Therefore, the heat from the heat dissipation section 110 can be efficiently dissipated to the outside of the semiconductor device 100 with an antenna.
[0059] Furthermore, since the metal layer 111 of the heat dissipation section 110 is provided over the entire underside of the semiconductor chip 120, the heat generated throughout the semiconductor chip 120 can be efficiently transferred to the heat sink 51. The metal layer 111 is connected to the metal layer 112 by numerous vias 114, and the metal layer 112 is connected to the metal layer 113 by numerous vias 114. Therefore, even if the metal layers 112 and 113 are smaller than the metal layer 111 in plan view, sufficient heat dissipation capacity can be secured.
[0060] As an example, if metal layer 111 is square in plan view with a side length of 10 mm, and metal layer 112 is square in plan view with a side length of 5 mm, and vias 114 with a diameter of 50 μm are arranged between metal layers 111 and 112 at a pitch of 200 μm, the thermal resistance between the upper surface of metal layer 111 and the lower surface of metal layer 112 was calculated to be approximately 0.016 K / W. This value was equivalent to the thermal resistance between the upper and lower surfaces of a heat spreader made of a metal plate with a plan view size identical to that of a semiconductor chip 120. Therefore, it is considered that the thermal resistance of the heat dissipation section 110, in which metal layers 111 to 113 are connected by vias 114, is also about the same.
[0061] Thus, by using a heat dissipation unit 110 having a configuration in which metal layers 111 to 113 are connected by vias 114, and by directly connecting the heat dissipation unit 110, which is placed directly beneath the semiconductor chip 120, to the heat sink 51 with a BGA 150B, sufficient heat dissipation can be ensured for the semiconductor chip 120, which generates heat due to the supply of a large current.
[0062] <Ensuring current flow paths and heat dissipation paths> The semiconductor device 100 with an antenna, by including the heat dissipation section 110 and BGA150A and 150B having the above-described configuration, can secure a current path while maintaining heat dissipation. Furthermore, since the number of BGA150A for the current path can be increased without increasing the size of the semiconductor device 100 with an antenna, miniaturization of the semiconductor device 100 with an antenna can be achieved. In addition, increasing the number of BGA150A for the current path can increase the speed of signal transmission.
[0063] In addition, although the above description has focused on a configuration in which the heat dissipation section 110 has three metal layers 111 to 113, the heat dissipation section 110 may also be configured in which metal layers 111 and 112 are connected by vias 114, or in which four or more metal layers are connected by vias 114.
[0064] Also, in the above description, the form in which the metal layer 111 of the heat dissipation part 110 is provided on the entire lower surface of the semiconductor chip 120 has been described. However, the metal layer 111 may be smaller than the semiconductor chip 120 in plan view. As long as heat dissipation can be ensured, the size of the metal layer 111 in plan view may be the same as that of the metal layers 112 and 113, or may be smaller than the metal layers 112 and 113. In addition, the sizes of the metal layers 112 and 113 in plan view may be different.
[0065] <Modified Examples of the Arrangements of BGAs 150A and 150B> FIGS. 4A and 4B are diagrams showing modified examples of the arrangements of BGAs 150A and 150B. The arrangements of BGAs 150A and 150B shown in FIGS. 4A and 4B are different from the arrangements of BGAs 150A and 150B shown in FIG. 3. The arrangements of BGAs 150A and 150B are different because the shapes and positions of the metal layer 113 in plan view are different.
[0066] Here, the shapes and positions of the metal layers 112 and 113 are described as being equal, but they may be different. In addition, since the metal layer 111 is provided on the entire lower surface of the semiconductor chip 120 as an example, in plan view, the outer edge of the metal layer 111 coincides with the outer edge of the semiconductor chip 120.
[0067] <Configuration of FIG. 4A> The metal layers 112 and 113 shown in FIG. 4A are located inside the outer edge of the semiconductor chip 120 in plan view, but have convex-shaped portions (protrusions) that protrude outside the outer edges of the metal layers 112 and 113 shown in FIG. 3. In plan view, the tips of the protrusions at the outer edges of the metal layers 112 and 113 coincide with the outer edge of the semiconductor chip 120.
[0068] In addition, between two adjacent convex-shaped portions at the outer edges of the metal layers 112 and 113, there are concave-shaped portions (recesses). In addition, as an example, the outer edges of the metal layers 112 and 113 may have recesses in which a part of the outer edges of the metal layers 112 and 113 shown in FIG. 3 is recessed inward.
[0069] Furthermore, if the metal layers 112 and 113 have the shape shown in Figure 4A in plan view, the planar shape of the heat sink 51 of the RF board 50 may be the same.
[0070] Since the BGA150B connects the lower surface of the metal layer 113 of the heat dissipation section 110 and the upper surface of the heat sink 51 of the RF board 50, the number of BGA150Bs in Figure 4A is increased compared to Figure 3. However, even in the configuration shown in Figure 4A, compared to the configuration in which the BGA150Bs are provided only on the outer edge of the semiconductor chip 120 when viewed in plan, an additional BGA150A is located on the underside of the semiconductor chip 120.
[0071] Therefore, in the semiconductor device 100 with an antenna having the configuration shown in Figure 4A, it is possible to secure a heat dissipation path while securing a current path, similar to the semiconductor device 100 with an antenna having the configuration shown in Figure 3.
[0072] <Configuration of Figure 4B> In Figure 4B, the metal layers 112 and 113 have two of the multiple protrusions included in the outer edges of the metal layers 112 and 113 shown in Figure 4A, which, in a plan view, protrude beyond the outer edge of the semiconductor chip 120.
[0073] In this case, the heat sink 51 of the RF board 50 only needs to have the same shape and size as the metal layers 112 and 113 in a plan view, and be aligned with the metal layers 112 and 113.
[0074] The BGA150B connects the lower surface of the metal layer 113 of the heat dissipation section 110 to the upper surface of the heat sink 51 of the RF board 50, so in Figure 4B, the number of BGA150B has increased compared to Figure 3. However, even in the configuration shown in Figure 4B, compared to the configuration in plan view where the BGA150B is provided only outside the outer edge of the semiconductor chip 120, an additional BGA150A is located on the underside of the semiconductor chip 120.
[0075] Therefore, in the semiconductor device 100 with an antenna having the configuration shown in Figure 4B, it is possible to secure a heat dissipation path while securing a current path, similar to the semiconductor device 100 with an antenna having the configuration shown in Figure 3.
[0076] Furthermore, the lower end of the BGA150B, which is connected to the tip of the protrusions of the metal layers 112 and 113 shown in Figure 4B, and which is located outside the outer edge of the semiconductor chip 120 in a plan view, may be connected to the ground terminal of the RF board 50. In this case, the portion directly below the BGA150B that is connected to the portion outside the outer edge of the semiconductor chip 120 does not need to have a heat sink 51, and a ground terminal can be provided therein.
[0077] The presence of the BGA150B connected to the ground terminal of the RF board 50 ensures that the metal layers 111-113 of the heat dissipation section 110 are kept at ground potential. This improves the impedance of the BGA150A, allowing for more stable signal transmission through the BGA150A.
[0078] <Manufacturing method for semiconductor device 100 with antenna> Figures 5A through 5K illustrate the manufacturing process of the semiconductor device 100 with an antenna.
[0079] To fabricate the semiconductor device 100 with an antenna, as an example, first, as shown in Figure 5A, the portion of the wiring board 130 located on the side of the antenna 140 that is closer to the semiconductor chip 120, and the antenna 140 are fabricated. In Figure 5A, the orientation is reversed compared to Figure 1, so the antenna 140 is located on the bottom side.
[0080] Specifically, multiple insulating layers 131, multiple wiring layers 132, multiple vias 133, and an antenna 140 are manufactured by a rewiring manufacturing process (build-up manufacturing process).
[0081] Next, as shown in Figure 5B, the semiconductor chip 120 is mounted using a copper pillar by flip-chip bonding.
[0082] Next, as shown in Figure 5C, an insulating layer 131B with the same height as the semiconductor chip 120 and vias 133 within the insulating layer 131B are fabricated. If the insulating layer 131B is fabricated using a molding agent, an insulating layer 131B with the same height as the semiconductor chip 120 can be fabricated using a mold or the like. The vias 133 can be fabricated by forming an opening in the insulating layer 131B with a laser and performing a plating treatment to embed the vias in the opening.
[0083] Next, as shown in Figure 5D, a metal layer 111 and a wiring layer 132 can be fabricated on the semiconductor chip 120 and insulating layer 131B using the rewiring manufacturing process. A copper layer can be formed on the semiconductor chip 120 and insulating layer 131B by sputtering, and then the metal layer 111 and wiring layer 132 can be patterned by photolithography followed by etching.
[0084] Next, as shown in Figure 5E, an insulating layer 131 is deposited on the metal layer 111. The insulating layer 131 can be manufactured, for example, by attaching an insulating sheet and then performing a firing process.
[0085] Next, as shown in Figure 5F, the insulating layer 131A is fabricated. The insulating layer 131A can be fabricated by forming openings for the vias 114 in the insulating layer 131 fabricated in Figure 5E using a laser.
[0086] Next, as shown in Figure 5G, vias 114 and a metal layer 112 are fabricated. Vias 114 can be fabricated by embedding them in openings in the insulating layer 131A and performing a plating process. The metal layer 112 can be fabricated by forming a copper layer on the insulating layer 131A on which the vias 114 are formed using a sputtering method, performing photolithography, and then patterning with an etching process.
[0087] Next, as shown in Figure 5H, an insulating layer 131 is deposited on the metal layer 112. The insulating layer 131 can be manufactured, for example, by attaching an insulating sheet and then performing a firing process.
[0088] Next, as shown in Figure 5I, the second insulating layer 131A is fabricated. The insulating layer 131A can be fabricated by forming openings for vias 114 in the insulating layer 131 fabricated in Figure 5H using a laser.
[0089] Next, as shown in Figure 5J, vias 114 and a metal layer 113 are fabricated. Vias 114 can be fabricated by embedding them in openings in the second insulating layer 131A and performing plating. The metal layer 113 can be fabricated by forming a copper layer on the second insulating layer 131A on which the vias 114 are formed using a sputtering method, performing photolithography, and then patterning with an etching process.
[0090] Finally, as shown in Figure 5K, the semiconductor device 100 with an antenna is completed by placing the BGA150A on the wiring layer 132 and the BGA150B on the metal layer 113. At this time, the BGA150A is placed on terminal 132A of the wiring layer 132 (see Figure 2). Since the same BGA150 is used for both BGA150A and BGA150B, the placement of BGA150A and 150B is completed by placing the BGA150 at equal pitches in the X and Y directions on multiple terminals 132A of the wiring layer 132 and multiple positions on the metal layer 113.
[0091] <Modified example of manufacturing method of semiconductor device 100 with antenna> Figures 6A to 6C illustrate the manufacturing process of a modified example of the semiconductor device 100 with an antenna. The manufacturing process shown in Figures 6A to 6C is a modified version of the manufacturing process shown in Figures 5A to 5C.
[0092] First, as shown in Figure 6A, an insulating layer 131B with the same height as the semiconductor chip 120 is fabricated using a mold or the like.
[0093] Next, as shown in Figure 6B, the portion of the semiconductor chip 120 located on the antenna 140 side and the antenna 140 are fabricated. In Figure 6B, the orientation is inverted, so the antenna 140 is located on the bottom side, but in reality, with the +Z direction facing upwards, multiple insulating layers 131, multiple wiring layers 132, multiple vias 133, and the antenna 140 are fabricated on the semiconductor chip 120 and insulating layer 131B by a rewiring manufacturing process (build-up manufacturing process).
[0094] Next, as shown in Figure 6C, vias 133 are fabricated within the insulating layer 131B. Vias 133 can be fabricated by forming an opening in the insulating layer 131B with a laser and performing a plating process to embed the vias within the opening.
[0095] Once the manufacturing process shown in Figure 6C is completed, the same configuration as that obtained at the end of the manufacturing process shown in Figure 5C is obtained. Therefore, after the manufacturing process shown in Figure 6C, the semiconductor device 100 with an antenna can be manufactured by performing the manufacturing processes shown in Figures 5D to 5K.
[0096] <Modified examples of semiconductor devices with antennas 100A and 100B of the embodiment> Figures 7A and 7B show, respectively, examples of the configurations of semiconductor devices 100A and 100B with antennas, which are modified embodiments of the embodiment.
[0097] <Semiconductor device with antenna 100A (Figure 7A)> The semiconductor device 100A with an antenna shown in Figure 7A has a different configuration for its heat dissipation section 110A compared to the configuration of the heat dissipation section 110 of the semiconductor device 100 with an antenna shown in Figures 1 to 3.
[0098] The heat dissipation section 110A of the semiconductor device 100A with an antenna has a metal layer 111 and a heat sink 112A. The heat dissipation section 110A has a heat sink 112A made of a metal plate instead of the metal layers 112, 113, vias 114, and insulating layer 131A of the heat dissipation section 110 of the semiconductor device 100 with an antenna shown in Figures 1 to 3.
[0099] The heat sink 112A has a rectangular parallelepiped shape, and its size in plan view is equal to that of the metal layers 112 and 113, and its thickness is equal to the height from the bottom surface of metal layer 111 to the bottom surface of metal layer 113.
[0100] The heat sink 112A is preferably made of a metal with high thermal conductivity, similar to the heat sink 51, for example, and may be made of a metal such as aluminum or copper. Such a heat sink 112A can be joined to the lower surface of the metal layer 111 by soldering or the like. Then, the BGA 150B can be joined to the lower surface of the heat sink 112A, and the heat sink 112A and the heat sink 51 can be connected via the BGA 150B.
[0101] The heat dissipation section 110A is connected to the heat sink 51 only via the BGA 150B. Heat from the heat dissipation section 110A is transferred to the heat sink 51 via the BGA 150B and then dissipated into the air from the heat sink 51. In addition, some of the heat is dissipated into the air from both the heat dissipation section 110A and the BGA 150B.
[0102] The heat dissipation section 110A is connected to the heat sink 51 of the RF board 50 via the shortest path by the BGA 150B which is connected to the lower surface of the metal layer 113, so that it is connected to the heat sink 51 with low thermal resistance. As a result, the heat from the heat dissipation section 110A can be efficiently dissipated to the outside of the semiconductor device 100A with antenna.
[0103] The semiconductor device 100A with an antenna shown in Figure 7A can secure a heat dissipation path while ensuring a current path, similar to the semiconductor device 100 with an antenna having the configuration shown in Figure 3.
[0104] <Semiconductor device with antenna 100B (Figure 7B)> The semiconductor device 100B with an antenna shown in Figure 7B has a heat dissipation section 110B instead of the heat dissipation section 110A shown in Figure 7A. The heat dissipation section 110B has a heat dissipation plate 112B which is made of a metal plate that is inverted trapezoidal in the XZ and YZ planes, instead of the rectangular parallelepiped heat dissipation plate 112A of the heat dissipation section 110A. Note that Figure 7B shows the shape of the heat dissipation plate 112B in the XZ plane, but the shape in the YZ plane is similarly inverted trapezoidal.
[0105] The semiconductor device with antenna 100B is the same as the semiconductor device with antenna 100A shown in Figure 7A, except that the shape of the heat sink 112B is different from the heat sink 112A of the heat dissipation section 110A of the semiconductor device with antenna 100A shown in Figure 7A.
[0106] The semiconductor device 100B with an antenna shown in Figure 7B can secure a heat dissipation path while ensuring a current path, similar to the semiconductor device 100 with an antenna having the configuration shown in Figure 3.
[0107] Because the heat sink 112B has a shape resembling an inverted truncated square pyramid, extending from its upper surface which is bonded to the metal layer 111 to its lower surface where the BGA 150B is bonded, the thermal resistance between its upper and lower surfaces is lower than that of the heat sink 112A shown in Figure 7A. As a result, higher heat dissipation is achieved.
[0108] <Manufacturing method for semiconductor device 100B with antenna> Figures 8A to 8I illustrate the manufacturing process of the semiconductor device 100B with an antenna. The manufacturing process shown in Figure 8A follows the manufacturing process shown in Figure 5D. That is, the semiconductor device 100B with an antenna is manufactured, for example, by the manufacturing processes shown in Figures 5A to 5D and Figures 8A to 8I. Here, we will assume that the manufacturing process up to Figure 5D has been completed, and will explain the manufacturing process from Figure 8A onwards.
[0109] As shown in Figure 8A, a thin, truncated pyramidal metal plate 112B1 is attached to the metal layer 111. The metal plate 112B1 can be attached to the metal layer 111 by soldering or by using silver paste. The metal plate 112B1 is one of the slices obtained by slicing the final heat sink 112B in the Z direction.
[0110] Next, as shown in Figure 8B, the insulating layer 131 is deposited on the metal plate 112B1, the insulating layer 131, and the wiring layer 132. The insulating layer 131 can be manufactured, for example, by attaching an insulating sheet and then firing it.
[0111] Next, as shown in Figure 8C, the insulating layer 131 deposited in Figure 8B is polished until the upper surface of the metal plate 112B1 is exposed.
[0112] Next, as shown in Figure 8D, vias 133 and wiring layer 132 are fabricated. Vias 133 can be fabricated by forming an opening in the uppermost insulating layer 131 and performing a plating treatment to embed the vias in the opening. Wiring layer 132 can be fabricated by forming a copper layer on the insulating layer 131 on which the vias 133 are formed using a sputtering method, performing photolithography, and then patterning with an etching treatment. Note that wiring layer 132 is formed while avoiding the metal plate 112B1.
[0113] Next, as shown in Figure 8E, a thin, truncated pyramidal metal plate 112B2 is attached to the metal plate 112B1. The metal plate 112B2 can be attached to the metal plate 112B1 by soldering or by using silver paste. The metal plate 112B2 is the second slice of the final heat sink 112B obtained by slicing it in the Z direction.
[0114] Next, as shown in Figure 8F, the insulating layer 131 is deposited on the metal plate 112B2, the insulating layer 131, and the wiring layer 132. The insulating layer 131 can be manufactured, for example, by attaching an insulating sheet and then firing it.
[0115] Next, as shown in Figure 8G, the insulating layer 131 deposited in Figure 8B is polished until the upper surface of the metal plate 112B1 is exposed.
[0116] Next, as shown in Figure 8H, vias 133 and wiring layer 132 are fabricated. Vias 133 can be fabricated by forming an opening in the uppermost insulating layer 131 and performing an embedded plating treatment within the opening. Wiring layer 132 can be fabricated by forming a copper layer on the insulating layer 131 on which the vias 133 are formed using a sputtering method, performing photolithography, and then patterning with an etching treatment. Note that wiring layer 132 is formed while avoiding the metal plate 112B2.
[0117] Finally, as shown in Figure 8I, the semiconductor device 100B with an antenna is completed by placing the BGA150A on the wiring layer 132 and the BGA150B on the metal layer 113. At this time, the BGA150A is placed on terminal 132A of the wiring layer 132 (see Figure 2). The manufacturing process shown in Figure 8I is the same as the manufacturing process shown in Figure 5K.
[0118] <Effects> The semiconductor device with an antenna 100 of this disclosure includes a semiconductor chip 120 having a lower surface and a circuit surface located opposite to the lower surface, a heat dissipation portion 110 having a lower surface and an upper surface located opposite to the lower surface and in contact with the lower surface of the semiconductor chip 120, and a wiring substrate 130 having a lower surface 130L located on the lower side of the heat dissipation portion 110 and an upper surface 130U located opposite to the lower surface 130L, wherein a resin insulating layer 131 and a metal wiring layer 132 are laminated, covering the heat dissipation portion 110, the side surface of the semiconductor chip 120 and the circuit surface of the semiconductor chip 120, and exposing the lower surface of the heat dissipation portion 110 to the lower surface 130L. The wiring board 130 and the antenna 140 provided on the upper surface 130U of the wiring board 130 are provided. The wiring board 130 has terminals 132A provided in a region of the lower surface 130L that is located outside the outer edge of the semiconductor chip 120 in a plan view, and in a region of the lower surface 130L that is located inside the outer edge of the semiconductor chip 120 and outside the outer edge of the lower surface in a plan view, first wiring connecting terminals 132A to first terminals provided on the circuit surface of the semiconductor chip 120, and second wiring connecting the antenna 140 to second terminals provided on the circuit surface of the semiconductor chip 120. Thus, since there are terminals 132A provided in a region of the lower surface 130L that is located inside the outer edge of the semiconductor chip 120 and outside the outer edge of the lower surface in a plan view, terminals 132A can also be provided on the underside of the semiconductor chip 120, and a sufficient current path can be secured.
[0119] Therefore, it is possible to provide a semiconductor device 100 with an antenna that secures both a current path and a heat dissipation path.
[0120] Furthermore, the heat dissipation section 110 has a metal layer 111 provided on the lower surface of the semiconductor chip 120, and the upper surface of the semiconductor chip 120 may be a surface that is in contact with the lower surface of the metal layer 111. Since heat from the semiconductor chip 120 can be efficiently transferred to the heat dissipation section 110 via the metal layer 111, heat dissipation performance is improved.
[0121] Furthermore, the metal layer 111 may be provided over the entire lower surface of the semiconductor chip 120. Since the heat generated throughout the semiconductor chip 120 can be efficiently transferred to the heat dissipation section 110 by the metal layer 111, the heat dissipation performance is further improved.
[0122] Furthermore, the heat dissipation section 110 has a metal layer 113 provided on the lower side of the metal layer 111, an insulating layer 131A provided between the metal layer 111 and the metal layer 113, and a plurality of vias 114 that penetrate the insulating layer 131A and connect the metal layer 111 and the metal layer 113. The metal layer 111 and the metal layer 113 are formed together with the wiring layer 132 of the wiring board 130, and the insulating layer 131A may be formed together with the insulating layer 131 of the wiring board 130. The heat dissipation section 110 can be manufactured simultaneously with the wiring board 130 by the semiconductor manufacturing process.
[0123] Furthermore, the surface of the metal layer 113 that is opposite to the metal layer 111 may be the bottom surface. In a configuration where the metal layer 113 is the bottommost metal layer of the heat dissipation section 110, it is possible to secure a heat dissipation path while also securing a current path.
[0124] Furthermore, the metal layer 113 may be located inside the outer edge of the metal layer 111 in a plan view. By consolidating the metal layer 113 to which the BGA150B for the heat dissipation path is connected into a smaller area, the number of BGA150A for the current path can be increased, and the current path can be further sufficiently secured. In addition, increasing the number of BGA150A for the current path can increase the speed of signal transmission.
[0125] Furthermore, the outer edges of the metal layers 111 and 113 in plan view may be rectangular. This facilitates the arrangement of the BGA150A for the current path and the BGA150B for the heat dissipation path, simplifying the overall design of the semiconductor device 100 with an antenna.
[0126] Furthermore, the outer edge of the metal layer 113 in plan view may have a protruding portion that extends outward or a recessed portion that is recessed inward. This allows for a high degree of flexibility in the arrangement of BGA150A and 150B, corresponding to various arrangement configurations of BGA150A for the current path or BGA150B for the heat dissipation path.
[0127] At least a portion of the metal layer 113 may be located outside the outer edge of the metal layer 111 in a plan view. For example, a BGA 150B located outside the outer edge of the metal layer 111 in a plan view can be connected to ground or the like.
[0128] Furthermore, the configuration may include multiple BGA150A and 150B of the same type, and these multiple BGA150A and 150B may be provided on the terminals 132A on the lower surface 130L and on the lower surface of the heat dissipation section 110. Since multiple BGA150 of the same type can be provided on the board connection section on the lower surface 130L of the wiring board 130 and on the lower surface of the heat dissipation section 110, it is possible to provide a semiconductor device 100 with an antenna that can be miniaturized and is easy to manufacture. In addition, by using multiple BGA150 of the same type, the degree of freedom in routing wiring and vias inside the wiring board 130 is increased, making it possible to flexibly accommodate various circuit designs.
[0129] The wiring board 130 may be constructed with a redistribution layer. This allows for miniaturization of the semiconductor device 100 with an antenna, and also makes it easy to fabricate the first wiring from the first terminal on the circuit surface, which is the upper surface of the semiconductor chip 120, to the lower surface 130L of the wiring board 130.
[0130] The present disclosure relates to a method for manufacturing a semiconductor device with an antenna, comprising: a semiconductor chip 120 having a lower surface and a circuit surface located opposite to the lower surface; a heat dissipation portion 110 having a lower surface and an upper surface located opposite to the lower surface and in contact with the lower surface of the semiconductor chip 120; a wiring substrate 130 having a lower surface 130L located on the lower side of the heat dissipation portion 110 and an upper surface 130U located opposite to the lower surface 130L, wherein a resin insulating layer 131 and a metal wiring layer 132 are laminated on the wiring substrate 130, covering the heat dissipation portion 110, the side surface of the semiconductor chip 120, and the circuit surface of the semiconductor chip 120, and exposing the lower surface of the heat dissipation portion 110 to the lower surface 130L; and an antenna 14 provided on the upper surface 130U of the wiring substrate 130. A method for manufacturing a semiconductor device with an antenna, comprising the steps of: providing terminals 132A in a region of the lower surface 130L located outside the outer edge of the semiconductor chip 120 in a plan view, and in a region of the lower surface 130L located inside the outer edge of the semiconductor chip 120 and outside the outer edge of the lower surface in a plan view; creating a first wiring that connects the terminals 132A to a first terminal provided on the circuit surface of the semiconductor chip 120; and creating a second wiring that connects the antenna 140 to a second terminal provided on the circuit surface of the semiconductor chip 120. In this way, since there are terminals 132A provided in a region of the lower surface 130L located inside the outer edge of the semiconductor chip 120 and outside the outer edge of the lower surface in a plan view, terminals 132A can also be provided on the underside of the semiconductor chip 120, and a sufficient current path can be secured.
[0131] Therefore, it is possible to provide a method for manufacturing a semiconductor device with an antenna that ensures both a current path and a heat dissipation path.
[0132] Although exemplary embodiments of the present disclosure of a semiconductor device with an antenna and a method for manufacturing such a semiconductor device have been described above, the present disclosure is not limited to the specifically disclosed embodiments, and various modifications and changes are possible without departing from the scope of the claims. [Explanation of Symbols]
[0133] 50RF board 51 Heat sink 52 terminals Semiconductor devices with antennas: 100, 100A, 100B 110, 110A, 110B heat dissipation section 111, 112, 113 metal layer 114 Beer 120 semiconductor chips 120A Circuit Section 130 Wiring board 130L bottom surface 130U top 131, 131A, 131B insulating layer 132 Wiring layer 132A terminal 133 Beer 134 Matching circuit 140 Antenna 150, 150A, 150B BGA
Claims
1. A semiconductor chip having a first chip surface and a circuit surface located on the opposite side of the first chip surface, A heat dissipation section having a first surface and a second surface located on the opposite side of the first surface and in contact with the first chip surface of the semiconductor chip, A wiring substrate having a first substrate surface located on the first surface side of the heat dissipation portion and a second substrate surface located on the opposite side of the first substrate surface, wherein a resin insulating layer and a metal wiring layer are laminated, and the wiring substrate covers the heat dissipation portion and the side surface of the semiconductor chip and the circuit surface of the semiconductor chip, and exposes the first surface of the heat dissipation portion to the first substrate surface, An antenna provided on the second substrate surface of the wiring board and Includes, The aforementioned wiring board is In a plan view, a substrate connection portion is provided in a region of the first substrate surface located outside the outer edge of the semiconductor chip, and in a plan view, a region of the first substrate surface located inside the outer edge of the semiconductor chip and outside the outer edge of the first surface. A first wiring that connects the substrate connection portion and the first terminal provided on the circuit surface of the semiconductor chip, A second wiring that connects the antenna and the second terminal provided on the circuit surface of the semiconductor chip. A semiconductor device with an antenna, having the following features.
2. The heat dissipation portion has a first metal layer provided on the first chip surface of the semiconductor chip, The semiconductor device with an antenna according to claim 1, wherein the second surface is a surface that contacts the first chip surface of the first metal layer.
3. The semiconductor device with an antenna according to claim 2, wherein the first metal layer is provided over the entire surface of the first chip of the semiconductor chip.
4. The heat dissipation section is A second metal layer provided on the first surface side of the first metal layer, An interlayer insulating layer provided between the first metal layer and the second metal layer, A plurality of vias that penetrate the interlayer insulating layer and connect the first metal layer and the second metal layer It has, The first metal layer and the second metal layer are formed together with the wiring layer of the wiring substrate, The semiconductor device with an antenna according to claim 2, wherein the interlayer insulating layer is formed together with the insulating layer of the wiring substrate.
5. The semiconductor device with an antenna according to claim 4, wherein the surface of the second metal layer located on the side opposite to the first metal layer is the first surface.
6. The semiconductor device with an antenna according to claim 4, wherein the second metal layer is located inside the outer edge of the first metal layer in a plan view.
7. The semiconductor device with an antenna according to claim 6, wherein the outer edges of the first metal layer and the second metal layer in a plan view are rectangular in shape.
8. The semiconductor device with an antenna according to claim 6, wherein the outer edge of the second metal layer in a plan view has a convex portion protruding outward or a concave portion recessed inward.
9. The semiconductor device with an antenna according to claim 5, wherein at least a portion of the second metal layer is located outside the outer edge of the first metal layer in a plan view.
10. It further includes multiple connectors of the same type, The semiconductor device with an antenna according to claim 1, wherein the plurality of connecting terminals are provided on the substrate connection portion of the first substrate surface and on the first surface of the heat dissipation portion.
11. The semiconductor device with an antenna according to any one of claims 1 to 10, wherein the wiring board is constructed by a rewiring layer.
12. A semiconductor chip having a first chip surface and a circuit surface located on the opposite side of the first chip surface, A heat dissipation section having a first surface and a second surface located on the opposite side of the first surface and in contact with the first chip surface of the semiconductor chip, A wiring substrate having a first substrate surface located on the first surface side of the heat dissipation portion and a second substrate surface located on the opposite side of the first substrate surface, wherein a resin insulating layer and a metal wiring layer are laminated, and the wiring substrate covers the heat dissipation portion and the side surface of the semiconductor chip and the circuit surface of the semiconductor chip, and exposes the first surface of the heat dissipation portion to the first substrate surface, An antenna provided on the second substrate surface of the wiring board and A method for manufacturing a semiconductor device with an antenna, including, The process of manufacturing the wiring board by laminating the resin insulating layer and the metal wiring layer is as follows: A step of providing substrate connection portions in a region of the first substrate surface located outside the outer edge of the semiconductor chip in a plan view, and in a region of the first substrate surface located inside the outer edge of the semiconductor chip and outside the outer edge of the first surface in a plan view, A step of manufacturing a first wiring that connects the substrate connection portion and the first terminal provided on the circuit surface of the semiconductor chip, A step of manufacturing a second wiring that connects the antenna and the second terminal provided on the circuit surface of the semiconductor chip. A method for manufacturing a semiconductor device with an antenna.