Switching circuit
A switching circuit design with narrower busbars and inverted semiconductor relays enables miniaturization and bidirectional current flow in electric vehicles, addressing the space constraints of existing designs.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- YAZAKI CORP
- Filing Date
- 2024-12-25
- Publication Date
- 2026-07-07
AI Technical Summary
The miniaturization of switching circuit bodies used in electric vehicles is hindered by the need to arrange semiconductor relays in pairs, doubling the width of connected bus bars.
A switching circuit design that includes a first circuit body with a narrower second busbar and a second circuit body with a narrower fourth busbar, connected via a connecting busbar, allowing for miniaturization while maintaining bidirectional current flow capability.
The design achieves a miniaturized switching circuit capable of bidirectional current flow, reducing the overall width and enhancing space efficiency without compromising functionality.
Smart Images
Figure 2026112534000001_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present invention relate to a switching circuit body.
Background Art
[0002] For vehicles such as electric vehicles (EVs), hybrid electric vehicles (HEVs), and plug-in hybrid electric vehicles (PHEVs), for example, those equipped with a semiconductor relay in a vehicle current detection device are known (see, for example, Patent Document 1).
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] By the way, for vehicles such as electric vehicles (EVs), hybrid electric vehicles (HEVs), and plug-in hybrid electric vehicles (PHEVs), for example, a switching circuit body equipped with a semiconductor relay or the like is used. The switching circuit body is equipped with, for example, a semiconductor relay and a bus bar. This switching circuit body may be used as a circuit that can be energized in both directions, for example.
[0005] In this case, due to the characteristics of the semiconductor relay, the switching circuit body needs to arrange the semiconductor relays in pairs by combining two circuit bodies. Specifically, the two circuit bodies are combined into the switching circuit body by connecting the bus bars of each circuit body to each other. Due to this configuration, the width of the connected bus bars is doubled in the switching circuit body, which is a factor preventing miniaturization.
[0006] One embodiment is to provide a switching circuit body that can be miniaturized.
Means for Solving the Problems
[0007] One embodiment of the switching circuit body includes a first circuit body comprising a first busbar, a second busbar having a narrower width than the first busbar, and at least one first semiconductor relay connected to the first busbar and the second busbar, and a second circuit body comprising a third busbar, a fourth busbar having a narrower width than the third busbar and connected to the second busbar, and at least one second semiconductor relay connected to the third busbar and the fourth busbar. [Effects of the Invention]
[0008] According to one embodiment, the switching circuit can be miniaturized. [Brief explanation of the drawing]
[0009] [Figure 1] A plan view showing the switching circuit body of the embodiment. [Figure 2] A plan view showing the first circuit assembly of the embodiment. [Figure 3] A circuit diagram showing the first semiconductor relay of the first circuit body in the embodiment. [Figure 4] A plan view showing the second circuit assembly of the embodiment. [Figure 5] A circuit diagram showing the second semiconductor relay of the second circuit body in the embodiment. [Figure 6] A plan view illustrating an example of connecting a second circuit to a first circuit of an embodiment. [Modes for carrying out the invention]
[0010] The embodiments will be described below with reference to the drawings. In the following description, components having the same or similar functions will be denoted by the same reference numerals. Duplication of these components may be omitted. Note that the components described below do not limit the scope of the embodiments.
[0011] <1. Switching Circuit> As shown in Figure 1, the switching circuit 1 is used in vehicles such as electric vehicles (EVs), hybrid electric vehicles (HEVs), and plug-in hybrid electric vehicles (PHEVs). The switching circuit 1 is installed, for example, between a high-voltage battery and a high-voltage load. Note that the switching circuit 1 is not limited to these vehicles and can also be used in other equipment, etc.
[0012] The switching circuit 1 comprises, for example, a first circuit 10 and a second circuit 20. Of the first circuit 10 and the second circuit 20, one of them may be, for example, a circuit for charging an on-board battery. Of the first circuit 10 and the second circuit 20, the other may be, for example, a circuit for driving an on-board motor (for an inverter). In this case, the switching circuit 1 may be able to arbitrarily select the energized state between the busbars of either the first circuit 10 or the second circuit 20.
[0013] In the first circuit 10, multiple first semiconductor relays 13 are connected in parallel to the first busbar 11 and the second busbar 12. A large current is supplied to the first busbar 11. The fourth busbar 22 of the second circuit 20 is connected to the second busbar 12 of the first circuit 10.
[0014] In the second circuit 20, multiple second semiconductor relays 23 are connected in parallel to the third busbar 21 and the fourth busbar 22. In the second circuit 20, the multiple second semiconductor relays 23 are inverted in a manner that is reversed compared to the multiple first semiconductor relays 13 in the first circuit 10. A large current is supplied to the third busbar 21.
[0015] <2.1st circuit body> The detailed configuration of the first circuit unit 10 will now be described. As shown in Figure 2, the first circuit body 10 includes, for example, a first busbar 11, a second busbar 12, and a plurality of first semiconductor relays 13. In this embodiment, three first semiconductor relays 13 are described as an example, but the number of first semiconductor relays 13 can be arbitrarily selected.
[0016] The first bus bar 11 is a conductive member formed of, for example, copper, an alloy, or the like. The first bus bar 11 has, for example, a width W1 in the direction in which the first bus bar 11 and the second bus bar 12 are arranged side by side. The first bus bar 11 has a plate shape that extends long in a direction intersecting (for example, orthogonal to) the direction in which the first bus bar 11 and the second bus bar 12 are arranged side by side. The second bus bar 12 is a conductive member formed of, for example, copper, an alloy, or the like. The second bus bar 12 has, for example, a width W2 in the direction in which the first bus bar 11 and the second bus bar 12 are arranged side by side. The second bus bar 12 has a plate shape that extends long in a direction intersecting (for example, orthogonal to) the direction in which the first bus bar 11 and the second bus bar 12 are arranged side by side. Hereinafter, the width W1 of the first bus bar 11 may be referred to as the "first bus bar width W1". Also, the width W2 of the second bus bar 12 may be referred to as the "second bus bar width W2" in the direction in which the first bus bar 11 and the second bus bar 12 are arranged side by side. Note that the direction in which the first bus bar 11 and the second bus bar 12 are arranged side by side is an example of the "one direction".
[0017] The second bus bar width W2 is narrower than the first bus bar width W1. The second bus bar width W2 may be set, for example, to half of the first bus bar width W1. A plurality of first semiconductor relays 13 are connected in parallel to the first bus bar 11 and the second bus bar 12 in a direction intersecting (for example, orthogonal to) the direction in which the first bus bar 11 and the second bus bar 12 are arranged side by side.
[0018] As shown in FIGS. 2 and 3, for example, an N-channel (N channel) MOS-FET (Metal Oxide Semiconductor Field Effect Transistor) is used for the first semiconductor relay 13. The first semiconductor relay 13 has a drain D1, a source S1, and a gate G1. The drain D1, the source S1, and the gate G1 are terminals of the first semiconductor relay 13. The drain D1 is connected to the first bus bar 11. The source S1 is connected to the second bus bar 12.
[0019] The first semiconductor relay 13 is switched to ON by applying a voltage to the gate G1. A positive (+) voltage is applied to the gate G1 with respect to the source S1. The first semiconductor relay 13 is electrically connected by being switched to ON. In such a state, in the first semiconductor relay 13, for example, current flows from the drain D1 toward the source S1 as indicated by the arrow A.
[0020] <3. Second Circuit Body> The detailed configuration of the second circuit body 20 will be described. As shown in FIG. 4, the second circuit body 20 includes, for example, a third bus bar 21, a fourth bus bar 22, and a plurality of second semiconductor relays 23. In the embodiment, three second semiconductor relays 23 will be described as an example, but the number of second semiconductor relays 23 can be arbitrarily selected.
[0021] The third bus bar 21 is, for example, a conductive member formed of copper, an alloy, or the like. The third bus bar 21 has, for example, a width W3 in the direction in which the third bus bar 21 and the fourth bus bar 22 are arranged side by side. The third bus bar 21 has a plate shape that extends long in a direction intersecting (for example, orthogonal) to the direction in which the third bus bar 21 and the fourth bus bar 22 are arranged side by side. The fourth bus bar 22 is, for example, a conductive member formed of copper, an alloy, or the like. The fourth bus bar 22 has, for example, a width W4 in the direction in which the third bus bar 21 and the fourth bus bar 22 are arranged side by side. The fourth bus bar 22 has a plate shape that extends long in a direction intersecting (for example, orthogonal) to the direction in which the third bus bar 21 and the fourth bus bar 22 are arranged side by side. Hereinafter, the width W3 of the third bus bar 21 may be referred to as the "third bus bar width W3". Also, the width W4 of the fourth bus bar 22 may be referred to as the "fourth bus bar width W4". Note that the direction in which the third bus bar 21 and the fourth bus bar 22 are arranged side by side is the same as the direction in which the first bus bar 11 and the second bus bar 12 are arranged side by side.
[0022] The fourth busbar width W4 is narrower than the third busbar width W3. The third busbar width W3 may be set to be the same as, for example, the first busbar width W1 (see Figure 2). The fourth busbar width W4 may be set to be half the width of the third busbar width W3. That is, the fourth busbar width W4 may be set to be the same as, for example, the second busbar width W2 (see Figure 2). Multiple second semiconductor relays 23 are connected in parallel to the third busbar 21 and the fourth busbar 22 in a direction that intersects (for example, orthogonal) with the direction in which the third busbar 21 and the fourth busbar 22 are aligned.
[0023] As shown in Figure 1, the second semiconductor relay 23 uses an N-channel MOS-FET, similar to the first semiconductor relay 13. The second semiconductor relay 23 is inverted, for example, with its front and back sides facing each other, relative to the first semiconductor relay 13.
[0024] Specifically, for example, the first semiconductor relay 13 is positioned so as to protrude to one side relative to the surfaces of the first busbar 11 and the second busbar 12 when connected to the first busbar 11 and the second busbar 12. Here, the second semiconductor relay 23 is inverted so as to be facing the first semiconductor relay 13. Therefore, for example, the second semiconductor relay 23 is positioned so as to protrude in the same direction as the first semiconductor relay 13 when connected to the third busbar 21 and the fourth busbar 22.
[0025] As shown in Figures 4 and 5, the second semiconductor relay 23 has a drain D2, a source S2, and a gate G2. Drain D2, source S2, and gate G2 are terminals of the second semiconductor relay 23. Drain D2 is connected to the third bus bar 21. Source S2 is connected to the fourth bus bar 22.
[0026] The second semiconductor relay 23 is switched on by applying a voltage to its gate G2. A positive (+) voltage is applied to the gate G2 relative to the source S2. The second semiconductor relay 23 is electrically connected when it is switched on. In this state, current flows through the second semiconductor relay 23, for example, from the drain D2 to the source S2 as shown by arrow B.
[0027] Here, the second semiconductor relay 23 is inverted, for example, so that its front and back sides are aligned with those of the first semiconductor relay 13. Therefore, in the second circuit body 20, for example, the second semiconductor relay 23 is inverted so that its front and back sides are aligned with those of the first semiconductor relay 13 of the first circuit body 10.
[0028] As shown in Figure 6, in the second circuit body 20, for example, the outer edge 22a of the fourth bus bar 22 is abutted against the outer edge 12a of the second bus bar 12 in the first circuit body 10 as indicated by arrow C. The outer edge 22a is connected to the outer edge 12a of the second bus bar 12 by butt welding, for example. The second bus bar 12 and the fourth bus bar 22 are integrated by being connected by butt welding, for example.
[0029] As shown in Figure 1, the switching circuit body 1 is formed by the connection of the second busbar 12 and the fourth busbar 22 by butt welding. The second busbar 12 and the fourth busbar 22 are integrated to form a connecting busbar 30. The connecting busbar 30 is formed with a width of, for example, W5. Hereinafter, the width W5 of the connecting busbar 30 may be referred to as the "connecting busbar width W5".
[0030] Here, the second busbar width W2 is set to half the width of the first busbar W1. The fourth busbar width W4 is set to half the width of the third busbar W3. Therefore, the connecting busbar width W5 is set to the same width as the first busbar width W1 and the third busbar width W3.
[0031] Furthermore, the switching circuit body 1 includes a first semiconductor relay 13 and a second semiconductor relay 23. When the first semiconductor relay 13 is switched on and electrically connected, for example, current flows from the drain D1 to the source S1 as shown by arrow A. In other words, the switching circuit body 1 is capable of allowing current to flow from the first busbar 11 to the connecting busbar 30 as shown by arrow A, by electrically connecting the first semiconductor relay 13.
[0032] Furthermore, when the second semiconductor relay 23 is switched on and electrically connected, current flows, for example, from the drain D2 to the source S2 as indicated by arrow B. In other words, the switching circuit body 1 is able to allow current to flow from the third busbar 21 to the connecting busbar 30 as indicated by arrow B when the second semiconductor relay 23 is electrically connected.
[0033] <4. Action and Effects> According to the switching circuit body 1 of the embodiment, as shown in Figure 1, in the first circuit body 10, the second busbar width W2 is narrower than the first busbar width W1. In the second circuit body 20, the fourth busbar width W4 is narrower than the third busbar width W3. Also, the fourth busbar 22 is connected to the second busbar 12. Furthermore, the fourth busbar 22 and the second busbar 12 are connected to form a connecting busbar 30.
[0034] With this configuration, for example, when the first semiconductor relay 13 is switched on and electrically connected, it is possible to supply power from the first busbar 11 to the connecting busbar 30. Also, for example, when the second semiconductor relay 23 is switched on and electrically connected, it is possible to supply power from the third busbar 21 to the connecting busbar 30. In other words, the switching circuit body 1 can arbitrarily select either the state in which power is supplied from the first busbar 11 to the connecting busbar 30, or the state in which power is supplied from the third busbar 21 to the connecting busbar 30.
[0035] Here, the switching circuit body 1 of the embodiment is compared with the switching circuit body of the comparative example. In the switching circuit body of the comparative example, for example, the width W2 of the second bus bar 12 is set to be the same as the width W1 of the first bus bar 11, and the width W4 of the fourth bus bar 22 is set to be the same as the width W3 of the third bus bar 21. Therefore, in the switching circuit body of the comparative example, the connecting bus bar width W5 is the sum of the width of the second bus bar W2 and the width of the fourth bus bar W4.
[0036] In contrast, the switching circuit body 1 of the embodiment has a second busbar width W2 that is narrower than the first busbar width W1, and a fourth busbar width W4 that is narrower than the third busbar width W3.
[0037] In other words, the width W5 of the connecting busbar in the embodiment is kept narrower than the width W5 of the connecting busbar in the comparative example. This configuration makes it possible to miniaturize the switching circuit body 1 in the embodiment.
[0038] Furthermore, multiple first semiconductor relays 13 are connected in parallel to the first busbar 11 and the second busbar 12 (i.e., the connecting busbar 30). When the multiple first semiconductor relays 13 connected in parallel are switched on, they can supply a large current to the connecting busbar 30 in response to the large current of the first busbar 11.
[0039] Furthermore, the second semiconductor relay 23 is connected in parallel to the third busbar 21 and the fourth busbar 22 (i.e., the connecting busbar 30). Multiple second semiconductor relays 23 connected in parallel can supply a large current to the connecting busbar 30 in response to the large current of the third busbar 21 when the electrical connection state is switched on.
[0040] Furthermore, the first semiconductor relay 13 can be switched on by applying a voltage to the gate G1. In this state, the first semiconductor relay 13 can, for example, allow current to flow from the drain D1 to the source S1 as shown by arrow A. That is, the first circuit body 10 is energized from the first busbar 11 to the connecting busbar 30.
[0041] Furthermore, the second semiconductor relay 23 can be switched on by applying a voltage to the gate G2. In this state, the second semiconductor relay 23 can, for example, allow current to flow from the drain D2 to the source S2 as shown by arrow B. That is, the second circuit body 20 is energized from the third busbar 21 to the connecting busbar 30.
[0042] With this configuration, the switching circuit 1 can arbitrarily select either a state in which power is supplied from the first busbar 11 to the connecting busbar 30, or a state in which power is supplied from the third busbar 21 to the connecting busbar 30. Therefore, the switching circuit 1 is capable of supplying power in both directions.
[0043] Furthermore, the second circuit assembly 20 has the second semiconductor relay 23 inverted so that it is facing the first semiconductor relay 13 of the first circuit assembly 10 with its front and back sides facing each other. Therefore, the second semiconductor relay 23 is positioned in the same orientation as the first semiconductor relay 13 when the fourth bus bar 22 is connected to the second bus bar 12.
[0044] With this configuration, the switching circuit 1 can be appropriately implemented in vehicles such as electric vehicles (EVs), hybrid electric vehicles (HEVs), and plug-in hybrid electric vehicles (PHEVs).
[0045] Several embodiments and modifications have been described above. However, the embodiments and modifications are not limited to the examples described above. For example, multiple embodiments may be implemented in combination with each other. [Explanation of Symbols]
[0046] 1. Switching circuit 10 1st circuit body 11 First Bus Bar 12 Second Bus Bar 13. First Semiconductor Relay 20 Second circuit body 21 Third Bus Bar 22. Bus Bar No. 4 23. Second Semiconductor Relay 30 connecting busbars D1, D2 drains G1, G2 Gates S1, S2 Source G1, G2 Gates W1 Width of the first busbar (First busbar width) W2 Second busbar width (second busbar width) W3 Third busbar width (Third busbar width) W4 Width of the 4th busbar (4th busbar width) W5 Connection busbar width (connection busbar width)
Claims
1. First bus bar and A second busbar having a narrower width than the first busbar, At least one first semiconductor relay connected to the first busbar and the second busbar, A first circuit body including, Third bus bar and A fourth busbar having a narrower width than the third busbar and connected to the second busbar, At least one second semiconductor relay connected to the third busbar and the fourth busbar, A second circuit body including, Switching circuit assembly.
2. The at least one first semiconductor relay includes a plurality of first semiconductor relays connected in parallel to the first busbar and the second busbar, The at least one second semiconductor relay includes a plurality of second semiconductor relays connected in parallel to the third busbar and the fourth busbar. The switching circuit body according to claim 1.
3. The at least one first semiconductor relay is A MOS-FET having a drain connected to the first busbar and a source connected to the second busbar, The at least one second semiconductor relay is This is a MOS-FET having a drain connected to the third busbar and a source connected to the fourth busbar. The switching circuit body according to claim 1.
4. The second circuit is configured such that the at least one second semiconductor relay is inverted with respect to the at least one first semiconductor relay of the first circuit, with the front and back sides facing each other. A switching circuit body according to any one of claims 1 to 3.