Anomaly monitoring system and anomaly monitoring method

Abstract

This technology provides control that minimizes the power required for analysis. [Solution] The abnormality monitoring system comprises an A / D converter that samples and digitizes the output signal from a sensor that outputs the result of measuring a predetermined physical quantity as an analog electrical signal at a sampling frequency corresponding to a predetermined operating mode; a processor that performs predetermined processing on the digital signal output by the A / D converter at a processing clock corresponding to a predetermined operating mode; and an abnormal signal detection unit that monitors the output signal from the sensor and sets one of the operating modes according to the output period of an abnormal value in the output signal.

Description

Technical Field

[0001] The present invention relates to an abnormality monitoring system and an abnormality monitoring method.

Background Art

[0002] In recent years, for the purpose of long-term stable operation of high-performance and highly reliable electronic devices and industrial equipment, the need for real-time state monitoring of industrial equipment and the like has been increasing. In particular, with the development of digital and IoT (Internet of Things) technologies, high-performance sensors, analog-digital converters (ADCs), and high-speed signal processing function blocks are mounted on substrates and devices to obtain real-time monitoring data from electronic devices and industrial equipment, and analyze it to grasp the operating state, and the cases where it is utilized for maintenance and failure monitoring are increasing.

[0003] Furthermore, in order to ensure the reliability of a system for monitoring the operating state of electronic devices, the need for the performance to accurately monitor various abnormal signals has also been increasing. In order to cope with a wide band from low-period signals to high-period signals, it can be said that ADCs and digital signal processing blocks (DSPs (Digital Signal Processors) such as FPGAs, microcontrollers, and CPUs (Central Processing Units)) that operate at high speed tend to be used. Along with this, the power consumption of the abnormality monitoring system increases. On the other hand, in order to reduce the environmental load, the demand for low power consumption of electronic devices and apparatuses is also increasing.

[0004] Patent Document 1 discloses a vibration monitoring system including a circuit that transmits only specific frequency components from an input signal from a vibration detection sensor by an analog signal processing method, a circuit that detects the signal, a circuit that outputs a value proportional to the root mean square value of the vibration acceleration of a specific frequency using a low-pass filter, a controller that changes and controls the center frequency of the circuit that transmits only the specific frequency components, and means for converting a value proportional to the root mean square value of the vibration acceleration of a specific frequency into a digital signal.

Prior Art Documents

[0005] [Patent Document 1] Japanese Patent Publication No. 2019-35666 [Overview of the project] [Problems that the invention aims to solve]

[0006] The technology described in Patent Document 1 allows for the acquisition of frequency-analyzed vibration data using a small, inexpensive, battery-powered device. However, it is not possible to control power consumption appropriately according to the analysis target when performing frequency analysis. For example, when analyzing vibrations detected by a sensor, the sampling frequency of the A / D (analog-to-digital) conversion and the processing clock of the analysis process in the DSP that minimize power consumption for analysis differ depending on whether the vibration frequency is high or low. However, the technology described in Patent Document 1 does not disclose any consideration of such points. The object of the present invention is to enable control that minimizes the power required for analysis. [Means for solving the problem]

[0007] This application includes several means for solving at least part of the above problems, but an example thereof is as follows. An abnormality monitoring system according to one aspect of the present invention that solves the above problems comprises: an A / D converter that samples and digitizes an output signal from a sensor that outputs the result of measuring a predetermined physical quantity as an analog electrical signal at a predetermined sampling frequency according to the operating mode; a processor that performs predetermined processing on the digital signal output by the A / D converter at a processing clock according to the predetermined operating mode; and an abnormality signal detection unit that monitors the output signal from the sensor and sets one of the operating modes according to the output period of an abnormal value in the output signal. [Effects of the Invention]

[0008] According to the present invention, it is possible to reduce the overall power consumption of the system by avoiding high-speed operation for abnormality monitoring that is not necessary. Problems, configurations, and effects other than those described above will be clarified by the following description of embodiments for carrying out the invention. [Brief explanation of the drawing]

[0009] [Figure 1] This figure shows an example configuration of an anomaly monitoring system. [Figure 2] This figure shows an example of the configuration of the signal change period detection unit. [Figure 3] This figure shows an example of the operating mode settings. [Figure 4] This figure shows an example of a low-frequency monitored signal. [Figure 5] This figure shows an example of a high-frequency monitored signal. [Figure 6] This figure shows an example of how to deal with low-period abnormal fluctuations. [Figure 7] This figure shows an example of how to deal with high-period abnormal fluctuations. [Figure 8] This figure shows a modified example of an anomaly monitoring system. [Figure 9] This figure shows another modified example of an anomaly monitoring system. [Figure 10] This figure shows another example configuration of an anomaly monitoring system. [Modes for carrying out the invention]

[0010] Embodiments of the present invention will be described below with reference to the drawings. The embodiments are illustrative examples for explaining the present invention, and have been omitted and simplified as appropriate for clarity of explanation. The present invention can also be implemented in various other forms. Unless otherwise specified, each component may be singular or plural.

[0011] The positions, sizes, shapes, and ranges of the components shown in the drawings may not represent their actual positions, sizes, shapes, and ranges in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the positions, sizes, shapes, and ranges disclosed in the drawings.

[0012] Examples of various types of information may be described using expressions such as "table," "list," and "queue," but these types of information may also be represented by data structures other than these. For example, various types of information such as "XX table," "XX list," and "XX queue" may be referred to as "XX information." When describing identification information, expressions such as "identification information," "identifier," "name," "ID," and "number" are used, but these are interchangeable. Furthermore, the identification information described using these expressions may be represented using symbols, numbers, natural language, or combinations thereof in the embodiment, but the identification information may also be in other formats.

[0013] When there are multiple components with the same or similar function, they may be described using the same symbol but with different subscripts. Furthermore, if it is not necessary to distinguish between these multiple components, the subscripts may be omitted in the description.

[0014] In embodiments, processing performed by executing a program may be described. Here, the computer executes the program using a processor (e.g., CPU, GPU) and performs processing defined by the program using memory resources (e.g., memory) and interface devices (e.g., communication ports). Therefore, the main entity performing the processing by executing the program may be the processor. Similarly, the main entity performing the processing by executing the program may be a controller, device, system, computer, or node having a processor. The main entity performing the processing by executing the program may be an arithmetic unit, and may include dedicated circuits that perform specific processing. Here, dedicated circuits include, for example, FPGAs (Field Programmable Gate Arrays), ASICs (Application Specific Integrated Circuits), CPLDs (Complex Programmable Logic Devices), etc.

[0015] The program may be installed on the computer from the program source. The program source may be, for example, a program distribution server or a storage medium readable by the computer. If the program source is a program distribution server, the program distribution server includes a processor and storage resources for storing the program to be distributed, and the processor of the program distribution server may distribute the program to other computers. In addition, in some embodiments, two or more programs may be implemented as a single program, or one program may be implemented as two or more programs.

[0016] In this embodiment, the abnormality monitoring system 1 contributes to power saving by setting the operating mode of the DSP 400, which performs abnormality monitoring, and the ADC (analog-to-digital converter) 300, which supplies a digital signal obtained by digitizing the sensor output to the DSP 400, to a dormant state when normal. On the other hand, the abnormality monitoring system 1 ensures the accuracy of abnormality monitoring by quickly setting the operating mode of the DSP 400 and ADC 300 to low frequency (slow speed) or high frequency (high speed) by detecting the initial reaction observed when monitoring is required using the abnormality signal detection unit 100.

[0017] Regarding the distinction between low speed / high speed of the operation mode and their further fine levels, there are various implementations depending on the industrial equipment, IoT devices, etc. to be implemented, so it is not limited here. Therefore, in the following embodiments, the operation modes of the ADC 300 and the DSP 400 will be described by taking, for the sake of convenience, the standby mode, the low-frequency mode, and the high-frequency mode that operates at a frequency higher than the low-frequency mode as examples, but it is not limited to this, and it is only necessary to be pre-divided into a plurality of levels including the standby mode in which the operation is paused.

[0018] Also, the ADC 300 can set the operation mode from the outside by an operation mode setting signal. For example, in this embodiment, when receiving the setting of the low-frequency mode, the sampling frequency is set low (for example, a cycle longer than about several tens of Hz (hertz), 1 Hz or less in the case of detecting temperature, vibration, etc., and once every few weeks to several months in the case of changes over time such as drift), and when receiving the setting of the high-frequency mode, the sampling frequency is set high (for example, a cycle shorter than several tens of kHz (kilohertz) to several hundreds of kHz of external disturbance noise). The ADC 300 with a high sampling frequency samples the input analog waveform at a high frequency and can detect finer changes than the ADC 300 with a low sampling frequency. Also, the ADC 300 has increasing power consumption in the order of standby mode, low-frequency mode, and high-frequency mode.

[0019] Similarly, the DSP 400 can set the operation mode from the outside by an operation mode setting signal. For example, when receiving the setting of the low-frequency mode, the frequency of the processing clock is set low according to the mode, and when receiving the setting of the high-frequency mode, the clock frequency is set high according to the mode. The DSP 400 with a high clock frequency digitally processes the input digital waveform at a high clock and can detect finer changes than the DSP 400 with a low setting. Also, the DSP 400 has increasing power consumption in the order of standby mode, low-frequency mode, and high-frequency mode.

[0020] The ADC300 and DSP400 may also be configured to allow for more precise setting of the sampling frequency and clock frequency, respectively, via external setting signals.

[0021] Figure 1 shows an example of the configuration of an anomaly monitoring system. The anomaly monitoring system 1 is implemented as an analog circuit system or module provided for internal monitoring for each piece of equipment to be monitored for anomalies, or for each of multiple units to be monitored for anomalies. The anomaly monitoring system 1 includes an anomaly signal detection unit 100, a sensor 200, an ADC 300, and a DSP 400.

[0022] Sensor 200 is one of several sensors that measure and detect various physical quantities, such as a voltage sensor, current sensor, temperature sensor, rotation sensor, or vibration sensor. Sensor 200 outputs the detected physical quantity as an analog electrical signal (monitored signal 210), such as a predetermined voltage or current. In this embodiment, sensor 200 outputs the monitored signal 210 as an output signal to the abnormal signal detection unit 100.

[0023] The abnormal signal detection unit 100 receives the monitored signal 210 output from the sensor 200 as input, passes the monitored signal 210 to the ADC 300, and outputs an operation mode setting signal 150 to the ADC 300 and an operation mode setting signal 160 to the DSP 400. The abnormal signal detection unit 100 includes a signal change period detection unit 110 that analyzes and detects the signal change period (output period) of abnormal values ​​in the input monitored signal 210, and an operation mode setting unit 120 that receives a flag signal output from the signal change period detection unit 110.

[0024] Figure 2 shows an example of the configuration of the signal change period detection unit. The signal change period detection unit 110 detects the presence or absence of abnormal values ​​in the input monitored signal 210 and inputs the output value of the integration circuit 111 for detecting low-frequency (long-period abnormal waves) abnormal values ​​to the comparator 112. If the value is below a predetermined low-period threshold, it outputs a low-period signal flag 113. The signal change period detection unit 110 also inputs the output value of the differentiation circuit 116 for detecting high-frequency (short-period abnormal waves) abnormal values ​​in the input monitored signal 210 to the comparator 117. If a predetermined high-period threshold abnormality is detected, it outputs a high-period signal flag 118.

[0025] The operation mode setting unit 120 outputs an operation mode setting signal 150 to specify the sampling frequency for the ADC300 and an operation mode setting signal 160 to specify the clock frequency for the DSP400, according to the flag signal. The operation mode setting unit 120 may be an analog or digital logic circuit, and may be implemented using an FPGA, for example.

[0026] Figure 3 shows an example of an operating mode setting. The operating mode setting 121 is a table that determines the operating modes of the ADC300 and DSP400 according to the combination of the low-period signal flag 113 and the high-period signal flag 118 output by the signal change period detection unit 110. Although it is described as a table for convenience, the operating mode setting 121 may be implemented as an analog circuit to obtain the same results, or as a digital circuit to obtain the same results.

[0027] For example, in the operation mode setting 121, when neither the low-period signal flag 113 nor the high-period signal flag 118 is output (in the case of "0"), the operation mode is defined to be "Hibernation Mode". Also, in the operation mode setting 121, when both the low-period signal flag 113 and the high-period signal flag 118 are output (in the case of "1"), the operation mode is defined to be "High-Frequency (High-Resolution) Mode".

[0028] Furthermore, in the operation mode setting 121, when the low-period signal flag 113 is output and the high-period signal flag 118 is not output (when they are "1" and "0" respectively), the operation mode is defined to be "low-frequency mode". Also, in the operation mode setting 121, when the low-period signal flag 113 is not output and the high-period signal flag 118 is output (when they are "0" and "1" respectively), the operation mode is defined to be "high-frequency mode".

[0029] Figure 4 shows an example of a low-period monitored signal. The low-period monitored signal 211 is a signal that occurs when low-period waveform abnormalities are observed due to the generation of low-period noise components (for example, with a frequency of 100 Hz or less) such as drift, temperature fluctuations, and mechanical vibrations, relative to a normal signal without abnormal fluctuations. In the abnormal signal detection unit 100 according to this embodiment, such a signal is detected by the integrating circuit 111 and a low-period signal flag 113 is generated.

[0030] Figure 5 shows an example of a high-frequency monitored signal. The high-frequency monitored signal 212 is a signal that occurs when a high-frequency waveform abnormality is observed due to the generation of high-frequency noise components (for example, with a frequency of 10 kHz or higher) such as electrical noise or electromagnetic interference noise, relative to a normal signal without abnormal fluctuations. In the abnormal signal detection unit 100 according to this embodiment, such a signal is detected by the differentiating circuit 116 and a high-frequency signal flag 118 is generated.

[0031] Figure 6 shows an example of how to handle low-period abnormal fluctuations. To handle low-period abnormal fluctuations, when a low-period abnormal fluctuation is detected by the signal change period detection unit 110 of the abnormal signal detection unit 100, the operation mode setting unit 120 outputs an operation mode setting signal 150 for "low frequency mode" that specifies a low-period sampling frequency to the ADC 300, and an operation mode setting signal 160 for "low frequency mode" that specifies a low-period clock frequency to the DSP 400, if no high-period abnormal fluctuations are detected.

[0032] When the ADC300 receives the "low frequency mode" setting signal 150, it starts sampling at a low speed (sampling at a low sampling frequency). Similarly, when the DSP400 receives the "low frequency mode" setting signal 160, it starts operating at a low clock speed.

[0033] Figure 7 shows an example of how to handle high-period abnormal fluctuations. To handle high-period abnormal fluctuations, when a high-period abnormal fluctuation is detected by the signal change period detection unit 110 of the abnormal signal detection unit 100, the operation mode setting unit 120 outputs an "high-frequency mode" operation mode setting signal 150 to specify a high-period sampling frequency to the ADC 300, and an "high-frequency mode" operation mode setting signal 160 to specify a high-period clock frequency to the DSP 400.

[0034] When the ADC300 receives the "high frequency mode" setting signal 150, it starts high-speed sampling (sampling at a high sampling frequency). Similarly, when the DSP400 receives the "high frequency mode" setting signal 160, it starts operating at a high-speed clock.

[0035] As described above, the abnormal signal detection unit 100 according to this embodiment can specify the operating mode stages of the ADC300 and DSP400 to synchronize with the high and low periods of the abnormal waveform. Therefore, it is possible to maintain the accuracy of abnormality detection while suspending the ADC300 and DSP400 during normal operation, and when an abnormality is detected, it is possible to control the power required for analysis to be minimized according to the abnormal waveform.

[0036] The above is an example of an anomaly monitoring system according to the first embodiment. According to the anomaly monitoring system 1 of the first embodiment, it is possible to reduce the overall power consumption of the system by avoiding high-speed operation for anomaly monitoring that is not necessary.

[0037] It should be noted that the present invention is not limited to the embodiments described above, and various modifications are included. For example, the embodiments described above are explained in detail to make the present invention easier to understand, and are not necessarily limited to those having all the configurations described.

[0038] For example, in the abnormal signal detection unit 100, the monitored signal 210 is passed to the ADC 300, but the timing of this transmission may be varied.

[0039] Figure 8 shows a modified example of the abnormality monitoring system. In the abnormality monitoring system 1', the abnormality signal detection unit 100' is configured to receive the monitored signal 210 by passing it through a delay circuit 130. The delay circuit 130 is composed of, for example, an analog delay circuit or a filter circuit, and delays the monitored signal 210 to synchronize with the processing delay of the signal change period detection unit 110 and the operation mode setting unit 120. The presence of this delay circuit 130 makes it possible to synchronize with the processing delay of the signal change period detection unit 110 and the operation mode setting unit 120.

[0040] Figure 9 shows another modified example of the abnormality monitoring system. As shown in Figure 9, in another modified example 1'' of the abnormality monitoring system, a preamplifier 220 may be provided before the abnormality signal detection unit 100 or the abnormality signal detection unit 100'' to amplify the monitored signal 210 with an amplification circuit. In this way, even if the change in the detected amount output from the sensor 200 is minute, it becomes possible to detect it with high accuracy.

[0041] Figure 10 shows another example configuration of the abnormality monitoring system. In another example configuration of the abnormality monitoring system, an abnormality signal detection unit 500 is provided instead of the abnormality signal detection unit 100 or abnormality signal detection unit 100'. The abnormality signal detection unit 500 includes multiple filter circuits (LPF510 (Low Pass Filter), BPF-A511 (Band Pass Filter-A), BPF-B512 (Band Pass Filter-B), HPF513 (High Pass Filter)) that extract signals of different bandwidths in parallel from the input monitored signal 210. The abnormality signal detection unit 500 also includes a decoder 520 that receives the signals that have passed through each filter circuit, and an operating mode setting unit 530.

[0042] The decoder 520 receives the signal that has passed through the filter circuit and receives an external signal to determine whether or not to pass it to the ADC 300 for each predetermined bandwidth, and passes the signal to the ADC 300 according to the signal. The operation mode setting unit 530 detects the bandwidth in which an abnormal waveform has been detected in the filter circuit and sends a signal to the decoder 520 to pass the signal in the bandwidth in which the abnormal waveform was detected (the signal that has passed through any of the LPF 510, BPF-A511, BPF-B512, and HPF 513) to the ADC 300. In addition, the operation mode setting unit 530 outputs an operation mode setting signal 150 to specify the sampling frequency according to the operation mode to the ADC 300 and an operation mode setting signal 160 to specify the clock frequency according to the operation mode to the DSP 400, according to the bandwidth in which the abnormal waveform was detected.

[0043] For example, if the combination of bandwidths in which an abnormal waveform is detected is a signal in the bandwidth that has passed through the LPF 510, the operating mode setting unit 530 outputs an operating mode setting signal 150 for "low frequency mode" that specifies a low-period sampling frequency to the ADC 300, and an operating mode setting signal 160 for "low frequency mode" that specifies a low-period clock frequency to the DSP 400, and also sends a signal to the decoder 520 to pass the signal in the bandwidth that has passed through the LPF 510 to the ADC 300.

[0044] For example, if the combination of bandwidths in which an abnormal waveform is detected is a signal in the bandwidth that has passed through BPF-B512 and HPF513, the operation mode setting unit 530 outputs an "high frequency mode" operation mode setting signal 150 to specify a high-frequency sampling frequency to the ADC300, and an "high frequency mode" operation mode setting signal 160 to specify a high-frequency clock frequency to the DSP400, and also sends a signal to the decoder 520 to pass the signal in the bandwidth that has passed through BPF-B512 and HPF513 to the ADC300.

[0045] The above is another example of an anomaly monitoring system configuration. According to this other example of an anomaly monitoring system configuration, detection can be performed across multiple frequency bands, and signals can be sent only to the ACD and DSP processing stages in the frequency band containing the anomaly waveform, thereby further reducing power consumption.

[0046] Furthermore, in another configuration example 2 of the abnormality monitoring system, a delay circuit may be provided in the output stage of the filter circuit of the abnormality signal detection unit 500. The presence of this delay circuit makes it possible to match the processing delay of the operation mode setting unit 530.

[0047] It is possible to replace some of the configurations of the above-described embodiment with other configurations, and it is also possible to add configurations from other embodiments to the configuration of this embodiment. Furthermore, it is possible to delete some of the configurations of this embodiment.

[0048] Each of the above-mentioned parts, configurations, functions, and processing units may be implemented in hardware, either partially or entirely, by designing them as an integrated circuit, for example. Furthermore, each of the above-mentioned parts, configurations, and functions may be configured as a chiplet, including the sensor 200 and the abnormal signal detection unit 100, or as a chiplet, including the sensor 200, the abnormal signal detection unit 100, and the ADC 300.

[0049] It should be noted that the control lines and information lines in the embodiments described above are those deemed necessary for explanation and do not necessarily represent all control lines and information lines in the actual product. In practice, it can be assumed that almost all components are interconnected. The present invention has now been described, focusing on its embodiments. [Explanation of symbols]

[0050] 1: Anomaly monitoring system, 100: Anomaly signal detection unit, 110: Signal change period detection unit, 120: Operation mode setting unit, 150, 160: Operation mode setting signal, 200: Sensor, 210: Monitored signal, 300: ADC, 400: DSP.

Claims

1. An A / D converter that samples the output signal from a sensor that outputs the result of measuring a predetermined physical quantity as an analog electrical signal at a sampling frequency corresponding to a predetermined operating mode and digitizes it, A processor that performs predetermined processing on the digital signal output by the A / D converter at a processing clock corresponding to the predetermined operating mode, An abnormal signal detection unit monitors the output signal from the sensor and sets one of the operating modes according to the output cycle of an abnormal value in the output signal. An anomaly monitoring system equipped with the following features.

2. An anomaly monitoring system according to claim 1, The aforementioned operating mode is divided into several stages in advance, including a pause mode in which the operation is suspended. The abnormal signal detection unit sets one of the operation modes. An anomaly monitoring system characterized by the following features.

3. An anomaly monitoring system according to claim 1, The aforementioned operating mode is divided into several stages in advance, including a pause mode in which the operation is suspended. The abnormal signal detection unit analyzes the output period of the abnormal value of the output signal, identifies the combination of the presence or absence of low-frequency abnormal values ​​and the presence or absence of high-frequency abnormal values ​​with a frequency higher than the low-frequency abnormal values, and sets one of the operating modes according to the combination. An anomaly monitoring system characterized by the following features.

4. An anomaly monitoring system according to claim 1, The aforementioned operating mode is divided into several stages in advance, including a pause mode in which the operation is suspended. The abnormal signal detection unit analyzes the output period of the abnormal values ​​in the output signal, identifies the combination of the presence or absence of low-frequency abnormal values ​​and the presence or absence of high-frequency abnormal values ​​with a frequency higher than the low-frequency abnormal values, and sets one of the operating modes according to the combination. If neither the low-frequency abnormal value nor the high-frequency abnormal value is detected, the pause mode is set. An anomaly monitoring system characterized by the following features.

5. An anomaly monitoring system according to claim 1, The aforementioned operating modes are pre-divided into multiple stages, including a pause mode in which operation is suspended, a low-frequency mode, and a high-frequency mode in which operation occurs at a higher frequency than the low-frequency mode. The abnormal signal detection unit analyzes the output period of the abnormal values ​​in the output signal, identifies the combination of the presence or absence of low-frequency abnormal values ​​and the presence or absence of high-frequency abnormal values ​​with a frequency higher than the low-frequency abnormal values, and sets one of the operating modes according to the combination. If the aforementioned low-frequency abnormal value is detected and the aforementioned high-frequency abnormal value is not detected, the low-frequency mode is set. An anomaly monitoring system characterized by the following features.

6. An anomaly monitoring system according to claim 1, The aforementioned operating modes are pre-divided into multiple stages, including a pause mode in which operation is suspended, a low-frequency mode, and a high-frequency mode in which operation occurs at a higher frequency than the low-frequency mode. The abnormal signal detection unit analyzes the output period of the abnormal values ​​in the output signal, identifies the combination of the presence or absence of low-frequency abnormal values ​​and the presence or absence of high-frequency abnormal values ​​with a frequency higher than the low-frequency abnormal values, and sets one of the operating modes according to the combination. If no abnormal values ​​are detected at low frequency, but abnormal values ​​are detected at high frequency, the high-frequency mode is set. An anomaly monitoring system characterized by the following features.

7. An anomaly monitoring system according to claim 1, The aforementioned operating modes are pre-divided into multiple stages, including a pause mode in which operation is suspended, a low-frequency mode, and a high-frequency mode in which operation occurs at a higher frequency than the low-frequency mode. The abnormal signal detection unit analyzes the output period of the abnormal values ​​in the output signal, identifies the combination of the presence or absence of low-frequency abnormal values ​​and the presence or absence of high-frequency abnormal values ​​with a frequency higher than the low-frequency abnormal values, and sets one of the operating modes according to the combination. If both the low-frequency abnormal value and the high-frequency abnormal value are detected, the stage is set to the high-frequency mode. An anomaly monitoring system characterized by the following features.

8. An anomaly monitoring system according to claim 1, The system includes a delay circuit that adds a delay to the output signal passed from the sensor to the A / D converter. An anomaly monitoring system characterized by the following features.

9. An anomaly monitoring system according to claim 1, The system includes an amplification circuit that amplifies the output signal passed from the sensor to the A / D converter. An anomaly monitoring system characterized by the following features.

10. An anomaly monitoring system according to claim 1, The abnormal signal detection unit monitors the output signal in parallel using multiple filters that extract components from different frequency bands, and sets one of the operating modes according to the output period of the abnormal value in the output signal. An anomaly monitoring system characterized by the following features.

11. An A / D converter that samples the output signal from a sensor that outputs the result of measuring a predetermined physical quantity as an analog electrical signal at a sampling frequency corresponding to a predetermined operating mode and digitizes it, An abnormality monitoring system comprising: a processor that performs predetermined processing on a digital signal output by the A / D converter at a processing clock corresponding to a predetermined operating mode, The abnormal signal detection unit, An abnormal signal detection step for detecting an abnormal value in the output signal from the sensor, A setting step to set one of the operating modes according to the output period of the abnormal value of the output signal, An anomaly monitoring method that implements this.

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