Multilayer ceramic capacitor

Abstract

To provide a multilayer ceramic capacitor that can reduce noise from circuit boards while also reducing manufacturing burden. [Solution] The multilayer ceramic capacitor 1 comprises a laminate 2, a first external electrode 31, and a second external electrode 32. The laminate 2 has a capacitance portion 4 formed by laminating a plurality of dielectric layers 7 and a plurality of internal electrodes 8, and a first covering portion 5 and a second covering portion 6 located at both ends of the capacitance portion 4 in the lamination direction. The first external electrode 31 and the second external electrode 32 each have a first portion 31a, 32a located on the capacitance portion 4, and a second portion 31b, 32b located on the first covering portion 5. When viewed in the lamination direction, the second portions 31b, 32b have a longer length along the outer circumference of the laminate 2 than the first portions 31a, 32a.

Description

Technical Field

[0001] This disclosure relates to multilayer ceramic capacitors.

Background Art

[0002] A multilayer ceramic capacitor includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated, and external electrodes. Multilayer ceramic capacitors are usually used by being soldered and mounted on a circuit board. When a voltage is applied between the external electrodes, the dielectric layer expands and contracts due to the electrostriction effect according to the applied voltage, causing the laminate to expand and contract and vibrate. When the expansion and contraction vibration of the laminate is transmitted to the circuit board, audible sound may be generated from the circuit board, and a phenomenon called "buzzing" may occur.

[0003] Patent Document 1 discloses a technique for reducing the transmission of the expansion and contraction vibration of the laminate to the circuit board and suppressing the buzzing of the circuit board by forming a solder resist film on the surface of the external electrode and making a part of the surface of the external electrode a solder non-adhesive part where solder does not adhere.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] Forming a solder resist film on the external electrode may increase the manufacturing burden of the multilayer ceramic capacitor and raise the manufacturing cost.

Means for Solving the Problems

[0006] The multilayer ceramic capacitor of this disclosure is a laminate having a capacitance portion formed by alternately stacking a plurality of dielectric layers and a plurality of internal electrodes, and a first covering portion and a second covering portion located at both ends of the capacitance portion in the stacking direction, wherein the laminate has a first surface and a second surface facing each other in the stacking direction, a first end surface and a second end surface facing each other in the length direction perpendicular to the stacking direction, and a first side surface and a second side surface facing each other in the width direction perpendicular to the stacking direction and the length direction, the first covering portion includes the first surface, and the second covering portion includes the second surface. A first external electrode and a second external electrode located on the laminate are respectively connected to different internal electrodes among the plurality of internal electrodes, Equipped with, The first external electrode and the second external electrode each have a first portion located on the capacitance portion and a second portion located on the first coating portion and connected to the first portion, wherein the second portion has a longer length along the outer circumference of the laminate than the first portion when viewed from the lamination direction. [Effects of the Invention]

[0007] According to this disclosure, it is possible to reduce noise from circuit boards and reduce the increased manufacturing burden of multilayer ceramic capacitors. [Brief explanation of the drawing]

[0008] [Figure 1] This is a perspective view showing an example of a multilayer ceramic capacitor according to the first embodiment. [Figure 2] Figure 1 is a perspective view showing the laminated structure of a multilayer ceramic capacitor. [Figure 3A] This figure shows an example of a cross-section obtained by cutting along the line III-III in Figure 1. [Figure 3B] This figure shows another example of a cross-section cut along the line III-III in Figure 1. [Figure 4A] This figure shows a cross-section obtained by cutting along the line IVA-IVA in Figure 3A. [Figure 4B]It is a diagram showing a cross section cut along the cutting plane line IVB-IVB of FIG. 3A. [Figure 4C] It is a diagram showing a cross section cut along the cutting plane line IVC-IVC of FIG. 3A. [Figure 5] It is a perspective view showing a mounting structure including the multilayer ceramic capacitor of FIG. 1. [Figure 6] It is a diagram showing a cross section cut along the cutting plane line VI-VI of FIG. 5. [Figure 7] It is a perspective view showing another example of the multilayer ceramic capacitor according to the first embodiment. [Figure 8] It is a perspective view showing the laminate of the multilayer ceramic capacitor of FIG. 7. [Figure 9] It is a diagram showing a cross section cut along the cutting plane line IX-IX of FIG. 7. [Figure 10] It is a diagram showing a cross section cut along the cutting plane line X-X of FIG. 9. [Figure 11] It is a perspective view showing an example of the multilayer ceramic capacitor according to the second embodiment. [Figure 12] It is a perspective view showing the laminate of the multilayer ceramic capacitor of FIG. 11. [Figure 13] It is a diagram showing an example of a cross section cut along the cutting plane line XIII-XIII of FIG. 11. [Figure 14A] It is a diagram showing a cross section cut along the cutting plane line XIVA-XIVA of FIG. 13. [Figure 14B] It is a diagram showing a cross section cut along the cutting plane line XIVB-XIVB of FIG. 13. [Figure 14C] It is a diagram showing a cross section cut along the cutting plane line XIVC-XIVC of FIG. 13. [Figure 15] It is a perspective view showing another example of the multilayer ceramic capacitor according to the second embodiment. [Figure 16] It is a perspective view showing the laminate of the multilayer ceramic capacitor of FIG. 15. [Figure 17] It is a diagram showing a cross section cut along the cutting plane line XVII-XVII of FIG. 15. [Figure 18]It is a figure showing a cross section cut along the cutting plane line XVIII-XVIII of FIG. 17. [Figure 19] It is a perspective view showing an example of a multilayer ceramic capacitor according to the third embodiment. [Figure 20] It is a perspective view showing the laminate of the multilayer ceramic capacitor of FIG. 19. [Figure 21] It is a figure showing an example of a cross section cut along the cutting plane line XXI-XXI of FIG. 19. [Figure 22A] It is a figure showing a cross section cut along the cutting plane line XXIIA-XXIIA of FIG. 21. [Figure 22B] It is a figure showing a cross section cut along the cutting plane line XXIIB-XXIIB of FIG. 21. [Figure 22C] It is a figure showing a cross section cut along the cutting plane line XXIIC-XXIIC of FIG. 21. [Figure 23] It is a perspective view showing another example of a multilayer ceramic capacitor according to the third embodiment. [Figure 24] It is a perspective view showing the laminate of the multilayer ceramic capacitor of FIG. 23. [Figure 25] It is a figure showing a cross section cut along the cutting plane line XXV-XXV of FIG. 23. [Figure 26] It is a figure showing a cross section cut along the cutting plane line XXVI-XXVI of FIG. 25. [Figure 27] It is a perspective view showing an example of a multilayer ceramic capacitor according to the fourth embodiment. [Figure 28] It is a perspective view showing the laminate of the multilayer ceramic capacitor of FIG. 27. [Figure 29] It is a figure showing an example of a cross section cut along the cutting plane line XXIX-XXIX of FIG. 27. [Figure 30A] It is a figure showing a cross section cut along the cutting plane line XXXA-XXXA of FIG. 29. [Figure 30B] It is a figure showing a cross section cut along the cutting plane line XXXB-XXXB of FIG. 29. [Figure 30C] It is a figure showing a cross section cut along the cutting plane line XXXC-XXXC of FIG. 29. [Figure 31]This is a perspective view showing another example of a multilayer ceramic capacitor according to the fourth embodiment. [Figure 32] Figure 31 is a perspective view showing the laminated structure of a multilayer ceramic capacitor. [Figure 33] This figure shows a cross-section obtained by cutting along the cutting line XXXIII-XXXIII in Figure 31. [Figure 34] This figure shows a cross-section obtained by cutting along the cutting line XXXIV-XXXIV in Figure 33. [Figure 35] This is a perspective view showing an example of a multilayer ceramic capacitor according to the fifth embodiment. [Figure 36] Figure 35 is a perspective view showing the laminated structure of a multilayer ceramic capacitor. [Figure 37] This figure shows a cross-section obtained by cutting along the cutting line XXXVII-XXXVII in Figure 35. [Figure 38A] This figure shows a cross-section obtained by cutting along the cutting line XXXVIIIA-XXXVIIIA in Figure 37. [Figure 38B] This figure shows a cross-section obtained by cutting along the cutting line XXXVIIIB-XXXVIIIB in Figure 37. [Figure 38C] This figure shows a cross-section obtained by cutting along the cutting line XXXVIIIC-XXXVIIIC in Figure 37. [Figure 39] This figure shows another example of a cross-section cut along the cross-section line XXXVIIIA-XXXVIIIA in Figure 37. [Figure 40] This is a perspective view showing another example of a multilayer ceramic capacitor according to the fifth embodiment. [Figure 41] Figure 40 is a perspective view showing the laminated structure of a multilayer ceramic capacitor. [Figure 42] This figure shows a cross-section obtained by cutting along the line XLII-XLII in Figure 40. [Figure 43] This figure shows a cross-section obtained by cutting along the line XLIII-XLIII in Figure 42. [Figure 44] This is a perspective view illustrating the fabrication of the matrix laminate. [Figure 45] This is a perspective view showing an example of a matrix. [Figure 46] This is a perspective view showing an example of a laminate obtained by cutting a parent laminate. [Modes for carrying out the invention]

[0009] Embodiments of the multilayer ceramic capacitor of this disclosure will be described below with reference to the drawings. The figures used in the following description are schematic, and the dimensional ratios etc. on the drawings do not necessarily correspond to those of reality. In this specification, in some drawings, a Cartesian coordinate system xyz is defined for convenience. In the multilayer ceramic capacitor according to the embodiment, either direction may be considered upward or downward, but in the following description, the positive side in the z-axis direction is considered upward, and terms such as upper surface or lower surface may be used. In a mounting structure in which a multilayer ceramic capacitor is mounted on a circuit board, the direction of the main surface opposite to the mounting surface of the multilayer ceramic capacitor is considered the positive side in the z-axis direction. In the multilayer ceramic capacitor of this disclosure, the stacking direction is the z-axis direction. The x-axis direction is also referred to as the first direction or length direction. The y-axis direction is also referred to as the second direction or width direction. The z-axis direction is also referred to as the third direction, height direction or stacking direction. In this specification, "plan view" means viewing the object in the third direction (z-axis direction). In this specification, in some drawings, hatching is used to indicate the exposed portions on the surface of the laminate in the internal electrodes, dummy electrodes, and anchor electrodes, as well as the electrode patterns formed on the ceramic green sheet, for the purpose of facilitating illustration.

[0010] <First Embodiment> Figure 1 is a perspective view showing an example of a multilayer ceramic capacitor according to the first embodiment. Figure 2 is a perspective view showing the laminate of the multilayer ceramic capacitor of Figure 1. Figure 3A is a diagram showing an example of a cross-section cut along the cutting line III-III in Figure 1, and Figure 3B is a diagram showing another example of a cross-section cut along the cutting line III-III in Figure 1. Figure 4A is a diagram showing a cross-section cut along the cutting line IVA-IVA in Figure 3A, Figure 4B is a diagram showing a cross-section cut along the cutting line IVB-IVB in Figure 3A, and Figure 4C is a diagram showing a cross-section cut along the cutting line IVC-IVC in Figure 3A. Figure 5 is a perspective view showing a mounting structure including the multilayer ceramic capacitor of Figure 1. Figure 6 is a diagram showing a cross-section cut along the cutting line VI-VI in Figure 5. Figure 7 is a perspective view showing another example of a multilayer ceramic capacitor according to the first embodiment. Figure 8 is a perspective view showing the laminate of the multilayer ceramic capacitor of Figure 7. Figure 9 is a diagram showing a cross-section cut along the cutting line IX-IX in Figure 7. Figure 10 shows a cross-section obtained by cutting along the cutting line XX in Figure 9.

[0011] The multilayer ceramic capacitor 1 of the first embodiment includes a laminate 2 and a first external electrode 31 and a second external electrode 32, as shown in Figure 1. Hereinafter, when the first external electrode 31 and the second external electrode 32 are not distinguished, they may simply be referred to as "external electrodes 31, 32".

[0012] As shown in Figure 2, the laminate 2 has a first face 2a and a second face 2b facing each other in the third direction (z-axis direction), a first end face 2c and a second end face 2d facing each other in the first direction (x-axis direction), and a first side face 2e and a second side face 2f facing each other in the second direction (y-axis direction). The laminate 2 may be substantially rectangular parallelepiped. The first face 2a and the second face 2b may be substantially perpendicular to the third direction. The first end face 2c and the second end face 2d may be substantially perpendicular to the first direction. The first side face 2e and the second side face 2f may be substantially perpendicular to the second direction. Hereafter, when the first face 2a and the second face 2b are not distinguished, they may simply be referred to as "main faces 2a, 2b". Also, when the first end face 2c and the second end face 2d are not distinguished, they may simply be referred to as "end faces 2c, 2d". Furthermore, when the first side 2e and the second side 2f are not distinguished, they may simply be written as "sides 2e, 2f".

[0013] As shown in Figure 3, the laminate 2 has a capacitance portion 4, a first coating portion 5, and a second coating portion 6. The capacitance portion 4 is constructed by alternately stacking a plurality of dielectric layers 7 and a plurality of internal electrodes 8 in the stacking direction (z-axis direction). The capacitance portion 4 forms a capacitance.

[0014] The dielectric layer 7 is composed of an insulating material. The dielectric layer 7 may be composed of a ceramic material mainly composed of, for example, barium titanate (BaTiO3), calcium titanate (CaTiO3), strontium titanate (SrTiO3), barium zirconate (BaZrO3), calcium zirconate (CaZrO3), etc. The dielectric layer 7 may have a thickness of, for example, 0.1 μm or more and 10 μm or less.

[0015] The internal electrode 8 is made of a conductive material. The internal electrode 8 may be made of a metallic material mainly composed of metals or alloys thereof, such as Ni (nickel), Cu (copper), Sn (tin), Pt (platinum), Pd (palladium), Ag (silver), Au (gold), etc. The internal electrode 8 may have a thickness of, for example, 1.5 μm or less. In this case, internal defects caused by internal stress can be reduced during the manufacturing process of the multilayer ceramic capacitor 1 (the firing process described later) and when voltage is applied, and as a result, the reliability of the multilayer ceramic capacitor 1 can be improved.

[0016] The multiple internal electrodes 8 include multiple first internal electrodes 81 and multiple second internal electrodes 82. The multiple first internal electrodes 81 and the multiple second internal electrodes 82 have opposite polarities. The first internal electrodes 81 and the second internal electrodes 82 are positioned alternately on either side of the dielectric layer 7.

[0017] As shown in Figure 4A, the first internal electrode 81 has a first opposing portion 81a and a first leading portion 81b. The first opposing portion 81a and the first leading portion 81b are connected to each other. As shown in Figure 4B, the second internal electrode 82 has a second opposing portion 82a and a second leading portion 82b. The second opposing portion 82a and the second leading portion 82b are connected to each other.

[0018] The first opposing portion 81a and the second opposing portion 82a face each other via a dielectric layer 7, and when a voltage is applied to the external electrodes 31 and 32, capacitance is generated in the dielectric layer 7. The first opposing portion 81a and the second opposing portion 82a may have substantially the same external shape in a plan view. In this case, it is possible to reduce the risk of the laminate 2 becoming larger while ensuring the desired capacitance. The widths of the first opposing portion 81a and the second opposing portion 82a may be approximately 0.7 to 0.9 times the width of the laminate 2. In this case, it becomes easier to ensure the desired capacitance. Furthermore, it becomes easier to form a sufficient margin between the ends of the first opposing portion 81a and the second opposing portion 82a and the sides 2e and 2f in the width direction, making it possible to protect the internal electrodes 8 from external environmental factors such as humidity. In this specification, "width" refers to the dimensions of the object in the second direction (y-axis direction) unless otherwise specified.

[0019] The end of the first lead-out portion 81b is exposed to the first end face 2c, and the end of the second lead-out portion 82b is exposed to the second end face 2d. The first external electrode 31 is connected to the end of the first lead-out portion 81b that is exposed to the first end face 2c, and the second external electrode 32 is connected to the end of the second lead-out portion 82b that is exposed to the second end face 2d. The width of the first lead-out portion 81b may be approximately the same as the width of the first opposing portion 81a, and the width of the second lead-out portion 82b may be approximately the same as the width of the second opposing portion 82a.

[0020] The first covering portion 5 and the second covering portion 6 are located at both ends of the capacity portion 4 in the third direction, as shown in Figures 3A and 3B. The first covering portion 5 includes the first surface 2a, as well as parts of the end surfaces 2c and 2d and parts of the side surfaces 2e and 2f. The second covering portion 6 includes the second surface 2b, as well as parts of the end surfaces 2c and 2d and parts of the side surfaces 2e and 2f. The thickness of the first covering portion 5 may be approximately 0.05 to 0.1 times the thickness of the laminate 2. The same applies to the thickness of the second covering portion 6.

[0021] The first coating portion 5, which consists of the dielectric portion 9, the dummy electrode 10, and the anchor electrode 13, is preferable to be as thick as possible. This is because it reduces the electrostrictive vibrations of the capacitance portion 4 transmitted to the circuit board 16 (see Figures 5 and 6). On the other hand, the thickness of the second coating portion 6, which does not have the dummy electrode 10 and the anchor electrode 13 and does not have the external electrodes 31 and 32, should be as thin as possible without affecting electrical characteristics or reliability, so as to maximize the area of ​​the capacitance portion 4 within the predetermined thickness of the laminate 2. For example, the thickness of the first coating portion 5 with the dummy electrode 10 and the anchor electrode 13 may be about 20 to 100 μm. On the other hand, the thickness of the second coating portion 6 without the external electrodes 31 and 32 may be about 5 to 40 μm. In this specification, "thickness" refers to the dimensions of the object in the height direction (z-axis direction) unless otherwise specified.

[0022] As shown in Figures 3A and 3B, the first coating portion 5 includes a dielectric portion 9 and a plurality of dummy electrodes 10.

[0023] The dielectric portion 9 is composed of an insulating material. The dielectric portion 9 may be composed of a ceramic material mainly composed of, for example, BaTiO3, CaTiO3, SrTiO3, BaZrO3, CaZrO3, etc. The dielectric portion 9 may be composed of multiple dielectric layers 7 stacked on top of each other.

[0024] The multiple dummy electrodes 10 include at least one first dummy electrode 11 and at least one second dummy electrode 12. The first dummy electrode 11 and the second dummy electrode 12 may extend substantially parallel to the main surfaces 2a and 2b of the laminate 2. The first dummy electrode 11 and the second dummy electrode 12 are embedded in the dielectric portion 9, with their ends exposed on the surface of the first coating portion 5. In this embodiment, as shown in Figures 2, 3A, 3B, and 4C, the end of the first dummy electrode 11 is exposed on the first end surface 2c, and the end of the second dummy electrode 12 is exposed on the second end surface 2d. The first dummy electrode 11 and the second dummy electrode 12 do not overlap in plan view and are not electrically connected.

[0025] The first covering portion 5 further includes a plurality of anchor electrodes 13, as shown in Figures 2, 3A, and 3B. The plurality of anchor electrodes 13 include a first anchor electrode 14 and a second anchor electrode 15. The first anchor electrode 14 and the second anchor electrode 15 are exposed on the first surface 2a of the laminate 2. The first anchor electrode 14 is exposed in the region of the first surface 2a near the first end surface 2c, and the second anchor electrode 15 is exposed in the region of the first surface 2a near the second end surface 2d. The first anchor electrode 14 and the second anchor electrode 15 are not electrically connected. In a plan view, the first anchor electrode 14 may have a different external shape from the first dummy electrode 11, or it may be substantially the same. In a plan view, the second anchor electrode 15 may have a different external shape from the second dummy electrode 12, or it may be substantially the same. The first covering portion 5 has a first anchor electrode 14 and a second anchor electrode 15, which allows for the formation of external electrodes 31 and 32 that extend from the end faces 2c and 2d to the first surface 2a, as shown in Figures 1, 3A, and 3B. As a result, when mounting the multilayer ceramic capacitor 1 to the circuit board 16, the adhesion force of the multilayer ceramic capacitor 1 to the circuit board 16 can be increased, improving the reliability of the mounting structure 100 (see Figures 5 and 6).

[0026] The second coating portion 6 is made of an insulating material. The second coating portion 6 may be made of a ceramic material mainly composed of, for example, BaTiO3, CaTiO3, SrTiO3, BaZrO3, CaZrO3, etc. The second coating portion 6 may be made by laminating a plurality of dielectric layers 7.

[0027] The first external electrode 31 and the second external electrode 32 are located on the laminate 2 (i.e., on the surface of the laminate 2), as shown in Figures 1, 3A, and 3B. The first external electrode 31 and the second external electrode 32 may be plating layers directly formed on the laminate 2 by a plating method such as electroplating or electroless plating.

[0028] The first external electrode 31 includes a first portion 31a located on the capacitance portion 4 (i.e., the surface of the capacitance portion 4) and a second portion 31b located on the first covering portion 5 (i.e., the surface of the first covering portion 5). The first portion 31a and the second portion 31b are connected to each other. The first portion 31a is located on the first end face 2c and covers the exposed ends of the multiple first internal electrodes 81 collectively. The first portion 31a is connected to the exposed ends of the multiple first internal electrodes 81 collectively. The second portion 31b is located from the first end face 2c across the first surface 2a and covers the exposed ends of the multiple first dummy electrodes 11 collectively. The second portion 31b is connected to the exposed ends of the multiple first dummy electrodes 11 collectively. The second portion 31b further covers the first anchor electrode 14 and is connected to the first anchor electrode 14.

[0029] The second external electrode 32 includes a first portion 32a located on the capacitance portion 4 and a second portion 32b located on the first covering portion 5. The first portion 32a and the second portion 32b are connected to each other. The first portion 32a is located on the second end face 2d and covers the exposed ends of the multiple second internal electrodes 82 on the second end face 2d. The first portion 32a is connected to the exposed ends of the multiple second internal electrodes 82 on the second end face 2d. The second portion 32b is located from the second end face 2d to the first face 2a and covers the exposed ends of the multiple second dummy electrodes 12 on the second end face 2d. The second portion 32b is connected to the exposed ends of the multiple second dummy electrodes 12 on the second end face 2d. The second portion 32b further covers the second anchor electrode 15 and is connected to the second anchor electrode 15.

[0030] As shown in Figures 4A to 4C, the first parts 31a and 32a have a length L1 along the outer circumference C of the laminate 2 in a plan view, and the second parts 31b and 32b have a length L2 along the outer circumference C of the laminate 2 in a plan view. The external electrodes 31 and 32 have a configuration in which the length L2 of the second parts 31b and 32b is longer than the length L1 of the first parts 31a and 32a. The length L1 of the first parts 31a and 32a may be approximately 0.7 to 0.9 times the width of the laminate 2 (i.e., the width of the capacitance part 4). The length L2 of the second parts 31b and 32b may be greater than the length L1 of the first parts 31a and 32a and less than or equal to the width of the laminate 2. Furthermore, regarding the length L1 of the first parts 31a and 32a, the length along the outer circumference C of the first part 31a and the length along the outer circumference C of the first part 32a do not need to be exactly the same; one length may be approximately 0.95 to 1.05 times the length of the other. In this case, the length L1 of the first parts 31a and 32a may be defined, for example, by the average value of the lengths along the outer circumference C of the first parts 31a and 32a. The same applies to the length L2 of the second parts 31b and 32b.

[0031] Figures 5 and 6 show a mounting structure 100 including a multilayer ceramic capacitor 1. The mounting structure 100 comprises the multilayer ceramic capacitor 1 and a circuit board 16. The circuit board 16 has a mounting surface 16a. The circuit board 16 has a first substrate electrode 17 and a second substrate electrode 18 located on the mounting surface 16a. Although not shown, the circuit board 16 further includes wiring conductors extending from the first substrate electrode 17 and the second substrate electrode 18, an electrical circuit to which the multilayer ceramic capacitor 1 is electrically connected, etc. The multilayer ceramic capacitor 1 is mounted on the circuit board 16 such that the first surface 2a of the laminate 2 faces the mounting surface 16a of the circuit board 16. The first external electrode 31 is joined to the first substrate electrode 17 by solder S, and the second external electrode 32 is joined to the second substrate electrode 18 by solder S. The solder S adheres only to the first parts 31a, 32a and the second parts 31b, 32b of the external electrodes 31 and 32. Hereafter, when the first substrate electrode 17 and the second substrate electrode 18 are not distinguished, they may simply be referred to as "substrate electrodes 17, 18". The multilayer ceramic capacitors 1', 1A, 1A', 1B, 1B', 1C, 1C', 1D, and 1D', which will be described later, are mounted on the circuit board 16 in the same way as the multilayer ceramic capacitor 1.

[0032] When an AC voltage is applied to the external electrodes 31 and 32, the capacitance portion 4 expands and contracts in a first direction (x-axis direction) due to the electrostrictive effect. If the expansion and contraction vibration of the capacitance portion 4 is transmitted to the circuit board 16 via the solder S attached to the first portions 31a and 32a of the external electrodes 31 and 32, it can cause vibration of the circuit board 16, resulting in noise from the circuit board 16. In the multilayer ceramic capacitor 1, since the first portions 31a and 32a are not located across the entire width of the capacitance portion 4, the expansion and contraction vibration of the capacitance portion 4 is less likely to be transmitted to the circuit board 16. Therefore, the multilayer ceramic capacitor 1 can reduce noise from the circuit board 16.

[0033] In the manufacturing process of the multilayer ceramic capacitor 1, the shape of the region R (see Figure 2) that collectively surrounds the exposed ends of the first internal electrode 81, the first dummy electrode 11, and the first anchor electrode 14 on the surface of the laminate 2 can be changed by altering the planar shapes of the first internal electrode 81, the first dummy electrode 11, and the first anchor electrode 14, thereby changing the shape of the region R (see Figures 1 and 2) on the surface of the laminate 2. The same applies to the second external electrode 32; by altering the shapes of the second internal electrode 82, the second dummy electrode 12, and the second anchor electrode 15, the shape of the second external electrode 32 that collectively surrounds the exposed ends of the second internal electrode 82, the second dummy electrode 12, and the second anchor electrode 15 on the surface of the laminate 2 can be changed to match the shape of the region. In other words, in the multilayer ceramic capacitor 1, the shape of the external electrodes 31 and 32 can be changed by changing the shape of the internal electrodes 8, dummy electrodes 10, and anchor electrodes 13, thereby controlling the amount of solder S adhering to the external electrodes 31 and 32. Since the multilayer ceramic capacitor 1 does not require the formation of solder-free areas on the external electrodes 31 and 32 where solder S is less likely to adhere during its manufacturing process, the manufacturing burden of the multilayer ceramic capacitor 1 can be reduced.

[0034] The multilayer ceramic capacitor 1 is mounted on the circuit board 16 such that the first surface 2a of the laminate 2 faces the mounting surface 16a of the circuit board 16. In other words, the multilayer ceramic capacitor 1 is mounted such that the second portions 31b and 32b of the external electrodes 31 and 32 are close to the substrate electrodes 17 and 18. In this embodiment, the length L2 of the second portions 31b and 32b is longer than the length L1 of the first portions 31a and 32a, and the second portions 31b and 32b are located from the end faces 2c and 2d to the first surface 2a. With the multilayer ceramic capacitor 1, a sufficient amount of solder S can be attached to the second portions 31b and 32b, and the second portions 31b and 32b can be firmly joined to the substrate electrodes 17 and 18 by the solder S. As a result, the reliability of the mounting structure 100 can be improved.

[0035] As described above, the external electrodes 31 and 32 may be plating layers directly formed on the laminate 2. In this case, compared to when the external electrodes 31 and 32 include a baked layer formed by baking conductive paste onto the laminate, the thickness of the external electrodes 31 and 32 can be reduced, and the rigidity of the external electrodes 31 and 32 can be reduced. As a result, the expansion and contraction vibrations of the capacitance portion 4 are less likely to be transmitted to the circuit board 16, thus reducing the noise of the circuit board 16. Furthermore, by reducing the thickness of the external electrodes 31 and 32, the multilayer ceramic capacitor 1 can be miniaturized without miniaturizing the laminate 2 (i.e., reducing the capacitance). Note that the thickness of the external electrodes 31 and 32 refers to the dimensions of the external electrodes 31 and 32 in the direction perpendicular to the surface of the laminate 2.

[0036] The external electrodes 31 and 32 may include a first plating layer 19 located on the laminate 2 and a second plating layer 20 located on the first plating layer 19, as shown in Figure 3A. The first plating layer 19 may be an electroless plating layer directly formed on the laminate 2 by an electroless plating method. In this case, in the manufacturing process of the multilayer ceramic capacitor 1, the first external electrode 31 that covers the ends of multiple first internal electrodes 81, the ends of multiple first dummy electrodes 11 and the first anchor electrode 14 exposed on the surface of the laminate 2 can be efficiently formed, and the second external electrode 32 that covers the ends of multiple second internal electrodes 82, the ends of multiple second dummy electrodes 12 and the second anchor electrode 15 exposed on the surface of the laminate 2 can be efficiently formed. Therefore, the manufacturing burden of the multilayer ceramic capacitor 1 can be reduced. The first plating layer 19 may be a Cu plating layer directly formed on the laminate 2 by an electroless plating method. The thickness of the first plating layer 19 may be, for example, about 1 to 10 μm.

[0037] The second plating layer 20 may be an electroplated layer formed on the first plating layer 19 by an electroplating method. The second plating layer 20 may have a single-layer structure. For example, the second plating layer 20 may be a Ni plating layer or a Sn plating layer. The second plating layer 20 may have a multi-layer structure. For example, the second plating layer 20 may have a Ni plating layer located on the first plating layer 19 and a Sn plating layer located on the Ni plating layer. Having a Ni plating layer in the second plating layer 20 reduces the corrosion of the first plating layer 19 by solder S. Also, having a Sn plating layer as the outermost layer of the second plating layer 20 improves the wettability of solder S when mounting the multilayer ceramic capacitor 1 to the circuit board 16, making it possible to mount the multilayer ceramic capacitor 1 to the circuit board 16 well. The thickness of the Ni plating layer may be, for example, about 0.5 to 5 μm. The thickness of the Sn plating layer may be, for example, about 0.5 to 5 μm. The fact that the external electrodes 31 and 32 may include the first plating layer 19 and the second plating layer 20 also applies to the multilayer ceramic capacitors 1', 1A, 1A', 1B, 1B', 1C, 1C', 1D, and 1D' described later.

[0038] The external electrodes 31 and 32 may include a conductive resin layer 21, as shown in Figure 3B. The conductive resin layer 21 may be located between the first plating layer 19 and the second plating layer 20. The conductive resin layer 21 may consist of a thermosetting resin and conductive particles. The thermosetting resin may be, for example, epoxy resin, phenolic resin, urethane resin, silicone resin, polyimide resin, etc. The conductive particles may consist of a metallic material mainly composed of metals such as Ag, Cu, Ni, Sn, or alloys thereof. The conductive particles may be conductive powder with an Ag coating on the surface. The conductive powder may be a metallic powder mainly composed of metals such as Cu, Ni, Sn, or alloys thereof. The conductive resin layer 21 can be formed by applying a conductive resin paste containing a thermosetting resin and conductive particles onto the first plating layer 19, and then thermosetting the thermosetting resin. The thickness of the conductive resin layer 21 may be, for example, about 1 to 10 μm. The fact that the external electrodes 31 and 32 may include the conductive resin layer 21 also applies to the multilayer ceramic capacitors 1', 1A, 1A', 1B, 1B', 1C, 1C', 1D, and 1D' described later.

[0039] When the external electrodes 31 and 32 include a conductive resin layer 21 with a lower Young's modulus (i.e., greater flexibility) compared to the first plating layer 19 and the second plating layer 20, the expansion and contraction vibrations of the capacitance section 4 are less likely to be transmitted by the circuit board 16. As a result, it becomes possible to further reduce the noise of the circuit board 16.

[0040] The following describes other examples of the multilayer ceramic capacitor 1. In this example, the multilayer ceramic capacitor 1' differs from the multilayer ceramic capacitor 1 in the configuration of the second covering portion 6 and the external electrodes 31 and 32, but the other configurations are the same. Therefore, the same reference numerals are used for the same components as in the multilayer ceramic capacitor 1, and their explanation is omitted.

[0041] In the multilayer ceramic capacitor 1', the second coating portion 6 includes a dielectric portion 22 and a plurality of dummy electrodes 23, as shown in Figure 9.

[0042] The dielectric portion 22 is made of an insulating material. The dielectric portion 22 may be made of a ceramic material mainly composed of, for example, BaTiO3, CaTiO3, SrTiO3, BaZrO3, CaZrO3, etc. The dielectric portion 22 may be made by stacking multiple dielectric layers 7.

[0043] The multiple dummy electrodes 23 include at least one third dummy electrode 24 and at least one fourth dummy electrode 25, as shown in Figures 8 and 9. The third dummy electrode 24 and the fourth dummy electrode 25 may extend parallel or substantially parallel to the main surfaces 2a and 2b of the laminate 2. The third dummy electrode 24 and the fourth dummy electrode 25 are embedded in the dielectric portion 22, with their ends exposed on the surface of the second coating portion 6. In the multilayer ceramic capacitor 1', the end of the third dummy electrode 24 is exposed on the first end surface 2c, and the end of the fourth dummy electrode 25 is exposed on the second end surface 2d. The third dummy electrode 24 and the fourth dummy electrode 25 do not overlap in plan view and are not electrically connected.

[0044] The second covering portion 6 further includes a plurality of anchor electrodes 26, as shown in Figure 9. The plurality of anchor electrodes 26 include a third anchor electrode 27 and a fourth anchor electrode 28. The third anchor electrode 27 and the fourth anchor electrode 28 are exposed on the second surface 2b of the laminate 2. The third anchor electrode 27 is exposed in the region of the second surface 2b near the first end surface 2c, and the fourth anchor electrode 28 is exposed in the region of the second surface 2b near the second end surface 2d. The third anchor electrode 27 and the fourth anchor electrode 28 are not electrically connected. In a plan view, the external shape of the third anchor electrode 27 may substantially match that of the third dummy electrode 24. In a plan view, the external shape of the fourth anchor electrode 28 may substantially match that of the fourth dummy electrode 25.

[0045] The first external electrode 31 further includes a third portion 31c located on the second covering portion 6. The third portion 31c is connected to the first portion 31a. The third portion 31c is located from the first end face 2c to the second end face 2b and covers the exposed ends of the multiple third dummy electrodes 24 on the first end face 2c. The third portion 31c is connected to the exposed ends of the multiple third dummy electrodes 24 on the first end face 2c. The third portion 31c further covers the third anchor electrode 27 and is connected to the third anchor electrode 27.

[0046] The second external electrode 32 further includes a third portion 32c located on the second covering portion 6. The third portion 32c is connected to the first portion 32a. The third portion 32c is located from the second end face 2d to the second face 2b and covers the exposed ends of the multiple fourth dummy electrodes 25 on the second end face 2d. The third portion 32c is connected to the exposed ends of the multiple fourth dummy electrodes 25 on the second end face 2d. The third portion 32c further covers the fourth anchor electrode 28 and is connected to the fourth anchor electrode 28.

[0047] As shown in Figure 10, the third parts 31c and 32c have a length L3 along the outer circumference C of the laminate 2 in a plan view. The external electrodes 31 and 32 have a configuration in which the length L3 of the third parts 31c and 32c is longer than the length L1 of the first parts 31a and 32a. The length L3 of the third parts 31c and 32c may be greater than the length L1 of the first parts 31a and 32a and less than or equal to the width of the laminate 2. Note that the length L3 of the third parts 31c and 32c along the outer circumference C of the third part 31c and the length of the third part 32c along the outer circumference C do not have to be exactly the same, and one length may be about 0.95 to 1.05 times the length of the other. In this case, the length L3 of the third parts 31c and 32c may be defined, for example, by the average value of the lengths of the third parts 31c and 32c along the outer circumference C.

[0048] The multilayer ceramic capacitor 1' can be mounted on the circuit board 16 with its second surface 2b facing the mounting surface 16a. Even when the multilayer ceramic capacitor 1' is mounted with its second surface 2b facing the mounting surface 16a, it can reduce noise from the circuit board 16, just as it can when mounted with its first surface 2a facing the mounting surface 16a. Furthermore, even when the multilayer ceramic capacitor 1' is mounted with its second surface 2b facing the mounting surface 16a, a sufficient amount of solder S can be applied to the third parts 31c and 32c, and the third parts 31c and 32c can be firmly bonded to the substrate electrodes 17 and 18 by the solder S. As a result, the reliability of the mounted structure 100 can be improved.

[0049] The third portion 31c of the first external electrode 31 may be substantially symmetrical with the second portion 31b of the first external electrode 31 with respect to a virtual plane P (see Figure 7) that bisects the laminate 2 in the third direction, and the third portion 32c of the second external electrode 32 may be substantially symmetrical with the second portion 32b of the second external electrode 32 with respect to the virtual plane P. In this case, the multilayer ceramic capacitor 1' can exhibit similar characteristics (e.g., capacitance, equivalent series resistance, equivalent series inductance, etc.) and achieve the same effects as the multilayer ceramic capacitor 1, whether the first surface 2a or the second surface 2b is mounted facing the mounting surface 16a. Therefore, when manufacturing the mounting structure 100, either the first surface 2a or the second surface 2b may be mounted facing the mounting surface 16a, thus reducing the manufacturing burden of the mounting structure 100. The virtual plane P is a plane perpendicular to the third direction (i.e., parallel to the main surfaces 2a and 2b) and is the plane that bisects the thickness of the laminate 2.

[0050] <Second Embodiment> Figure 11 is a perspective view showing an example of a multilayer ceramic capacitor according to the second embodiment. Figure 12 is a perspective view showing the laminate of the multilayer ceramic capacitor of Figure 11. Figure 13 is a diagram showing an example of a cross-section cut along the cutting line XIII-XIII in Figure 11. Figure 14A is a diagram showing a cross-section cut along the cutting line XIVA-XIVA in Figure 13, Figure 14B is a diagram showing a cross-section cut along the cutting line XIVB-XIVB in Figure 13, and Figure 14C is a diagram showing a cross-section cut along the cutting line XIVC-XIVC in Figure 13. Figure 15 is a perspective view showing another example of a multilayer ceramic capacitor according to the second embodiment. Figure 16 is a perspective view showing the laminate of the multilayer ceramic capacitor of Figure 15. Figure 17 is a diagram showing a cross-section cut along the cutting line XVII-XVII in Figure 15. Figure 18 is a diagram showing a cross-section cut along the cutting line XVIII-XVIII in Figure 17.

[0051] The multilayer ceramic capacitor 1A of the second embodiment differs from the multilayer ceramic capacitor 1 in the configuration of the dummy electrode 10, anchor electrode 13, and external electrodes 31, 32, but the other configurations are the same. Therefore, the same components are given the same reference numerals as the multilayer ceramic capacitor 1 and their descriptions are omitted.

[0052] As shown in Figure 13, the first covering portion 5 includes a dielectric portion 9 and a plurality of dummy electrodes 10. The plurality of dummy electrodes 10 include at least one first dummy electrode 11 and at least one second dummy electrode 12. The first dummy electrode 11 and the second dummy electrode 12 may extend substantially parallel to the main surfaces 2a and 2b of the laminate 2. The first dummy electrode 11 and the second dummy electrode 12 are embedded in the dielectric portion 9, with their ends exposed on the surface of the first covering portion 5. In this embodiment, as shown in Figures 12, 13, and 14C, the ends of the first dummy electrode 11 are exposed on the first end face 2c, the first side surface 2e, and the second side surface 2f, and the ends of the second dummy electrode 12 are exposed on the second end face 2d, the first side surface 2e, and the second side surface 2f. The first dummy electrode 11 and the second dummy electrode 12 do not overlap in plan view and are not electrically connected.

[0053] The first covering portion 5 further includes a plurality of anchor electrodes 13, as shown in Figures 12 and 13. The plurality of anchor electrodes 13 include a first anchor electrode 14 and a second anchor electrode 15. The first anchor electrode 14 and the second anchor electrode 15 are exposed on the first surface 2a of the laminate 2. The first anchor electrode 14 is exposed in the region of the first surface 2a near the first end surface 2c, and the second anchor electrode 15 is exposed in the region of the first surface 2a near the second end surface 2d. The first anchor electrode 14 and the second anchor electrode 15 are not electrically connected. In a plan view, the shape of the first anchor electrode 14 may substantially match that of the first dummy electrode 11. In a plan view, the shape of the second anchor electrode 15 may substantially match that of the second dummy electrode 12.

[0054] As shown in Figures 14A to 14C, the first parts 31a and 32a have a length L1 along the outer circumference C of the laminate 2 in a plan view, and the second parts 31b and 32b have a length L2 along the outer circumference C of the laminate 2 in a plan view. The external electrodes 31 and 32 have a configuration in which the length L2 of the second parts 31b and 32b is longer than the length L1 of the first parts 31a and 32a. The length L1 of the first parts 31a and 32a may be approximately 0.7 to 0.9 times the width of the laminate 2 (i.e., the width of the capacitance part 4). Note that the length L1 of the first parts 31a and 32a along the outer circumference C of the first part 31a and the length of the first part 32a along the outer circumference C do not have to be exactly the same, and one length may be approximately 0.95 to 1.05 times the length of the other. In this case, the length L1 of the first parts 31a and 32a may be defined, for example, by the average length along the outer circumference C of the first parts 31a and 32a. The same applies to the length L2 of the second parts 31b and 32b.

[0055] In the multilayer ceramic capacitor 1A, the first portions 31a and 32a do not extend across the entire width of the capacitance portion 4 (see Figure 11), and the length L1 of the first portions 31a and 32a is approximately 0.3 to 0.7 times the width of the capacitance portion 4. Therefore, expansion and contraction vibrations of the capacitance portion 4 are less likely to be transmitted to the circuit board 16. Consequently, the multilayer ceramic capacitor 1A can reduce noise from the circuit board 16.

[0056] In the multilayer ceramic capacitor 1A, similar to the multilayer ceramic capacitor 1, the shape of the external electrodes 31 and 32 can be changed by modifying the shapes of the internal electrodes 8, dummy electrodes 10, and anchor electrodes 13, thereby controlling the amount of solder S adhering to the external electrodes 31 and 32. Since the multilayer ceramic capacitor 1A does not require the formation of solder-free areas on the external electrodes 31 and 32 during its manufacturing process, the increased manufacturing burden of the multilayer ceramic capacitor 1A can be reduced.

[0057] In this embodiment, the length L2 of the second parts 31b and 32b is longer than the length L1 of the first parts 31a and 32a, and the second parts 31b and 32b are located from the end faces 2c and 2d to the first face 2a and the side faces 2e and 2f. With the multilayer ceramic capacitor 1A, a sufficient amount of solder S can be attached to the second parts 31b and 32b, and the second parts 31b and 32b can be firmly joined to the substrate electrodes 17 and 18 by the solder S. As a result, the reliability of the mounting structure 100 can be improved.

[0058] The following describes other examples of the multilayer ceramic capacitor 1A. In this example, the multilayer ceramic capacitor 1A' differs from the multilayer ceramic capacitor 1A in the configuration of the second covering portion 6 and the external electrodes 31 and 32, but the other configurations are the same. Therefore, a detailed explanation of the configurations similar to those of the multilayer ceramic capacitor 1A will be omitted.

[0059] In the multilayer ceramic capacitor 1A', the second coating portion 6 includes a dielectric portion 22 and a plurality of dummy electrodes 23, as shown in Figure 17.

[0060] The dielectric portion 22 is made of an insulating material. The dielectric portion 22 may be made of a ceramic material mainly composed of, for example, BaTiO3, CaTiO3, SrTiO3, BaZrO3, CaZrO3, etc. The dielectric portion 22 may be made by stacking multiple dielectric layers 7.

[0061] The multiple dummy electrodes 23 include at least one third dummy electrode 24 and at least one fourth dummy electrode 25, as shown in Figures 16 and 17. The third dummy electrode 24 and the fourth dummy electrode 25 may extend parallel or substantially parallel to the main surfaces 2a and 2b of the laminate 2. The third dummy electrode 24 and the fourth dummy electrode 25 are embedded in the dielectric portion 22, with their ends exposed on the surface of the second coating portion 6. In the multilayer ceramic capacitor 1A', the ends of the third dummy electrode 24 are exposed on the first end face 2c, the first side surface 2e, and the second side surface 2f, and the ends of the fourth dummy electrode 25 are exposed on the second end face 2d, the first side surface 2e, and the second side surface 2f. The third dummy electrode 24 and the fourth dummy electrode 25 do not overlap in plan view and are not electrically connected.

[0062] In the multilayer ceramic capacitor 1A', the second covering portion 6 further includes a plurality of anchor electrodes 26, as shown in Figures 16 and 17. The plurality of anchor electrodes 26 include a third anchor electrode 27 and a fourth anchor electrode 28. The third anchor electrode 27 and the fourth anchor electrode 28 are exposed on the second surface 2b of the laminate 2. The third anchor electrode 27 is exposed in the region of the second surface 2b near the first end surface 2c, and the fourth anchor electrode 28 is exposed in the region of the second surface 2b near the second end surface 2d. The widths of the third anchor electrode 27 and the fourth anchor electrode 28 may be approximately the same as the width of the laminate 2. The third anchor electrode 27 and the fourth anchor electrode 28 are not electrically connected. In a plan view, the external shape of the third anchor electrode 27 may be approximately the same as that of the third dummy electrode 24. In a plan view, the external shape of the fourth anchor electrode 28 may be approximately the same as that of the fourth dummy electrode 25.

[0063] The first external electrode 31 further includes a third portion 31c located on the second covering portion 6. The third portion 31c is connected to the first portion 31a. The third portion 31c is located from the first end face 2c to the second end face 2b and covers the exposed ends of the multiple third dummy electrodes 24 on the first end face 2c. The third portion 31c is connected to the exposed ends of the multiple third dummy electrodes 24 on the first end face 2c. The third portion 31c further covers the third anchor electrode 27 and is connected to the third anchor electrode 27.

[0064] The second external electrode 32 further includes a third portion 32c located on the second covering portion 6. The third portion 32c is connected to the first portion 32a. The third portion 32c is located from the second end face 2d to the second face 2b and covers the exposed ends of the multiple fourth dummy electrodes 25 on the second end face 2d. The third portion 32c is connected to the exposed ends of the multiple fourth dummy electrodes 25 on the second end face 2d. The third portion 32c further covers the fourth anchor electrode 28 and is connected to the fourth anchor electrode 28.

[0065] As shown in Figure 18, the third parts 31c and 32c have a length L3 along the outer circumference C of the laminate 2 in a plan view. The external electrodes 31 and 32 have a configuration in which the length L3 of the third parts 31c and 32c is longer than the length L1 of the first parts 31a and 32a. Note that the length L3 of the third parts 31c and 32c along the outer circumference C of the third part 31c and the length of the third part 32c along the outer circumference C do not have to be exactly the same; one length may be approximately 0.95 to 1.05 times the length of the other. In this case, the length L3 of the third parts 31c and 32c may be defined, for example, by the average value of the lengths of the third parts 31c and 32c along the outer circumference C.

[0066] The multilayer ceramic capacitor 1A' can be mounted on the circuit board 16 such that its second surface 2b faces the mounting surface 16a. Even when the multilayer ceramic capacitor 1A' is mounted with its second surface 2b facing the mounting surface 16a, it can reduce noise from the circuit board 16 in the same way as when the first surface 2a faces the mounting surface 16a. Furthermore, even when the multilayer ceramic capacitor 1A' is mounted with its second surface 2b facing the mounting surface 16a, a sufficient amount of solder S can be applied to the third parts 31c and 32c, and the third parts 31c and 32c can be firmly bonded to the substrate electrodes 17 and 18 by the solder S. As a result, the reliability of the mounted structure 100 can be improved.

[0067] The third portion 31c of the first external electrode 31 may be substantially symmetrical with the second portion 31b of the first external electrode 31 with respect to a virtual plane P (see Figure 15) that bisects the laminate 2 in the third direction, and the third portion 32c of the second external electrode 32 may be substantially symmetrical with the second portion 32b of the second external electrode 32 with respect to the virtual plane P. In this case, the multilayer ceramic capacitor 1A' can exhibit similar characteristics (e.g., capacitance, equivalent series resistance, equivalent series inductance, etc.) and achieve the same effects as the multilayer ceramic capacitor 1A, whether the first surface 2a or the second surface 2b is mounted facing the mounting surface 16a. Therefore, when manufacturing the mounting structure 100, either the first surface 2a or the second surface 2b may be mounted facing the mounting surface 16a, thus reducing the manufacturing burden of the mounting structure 100. The virtual plane P is a plane perpendicular to the third direction (i.e., parallel to the main surfaces 2a and 2b) and is the plane that bisects the thickness of the laminate 2.

[0068] <Third Embodiment> Figure 19 is a perspective view showing an example of a multilayer ceramic capacitor according to the third embodiment. Figure 20 is a perspective view showing the laminate of the multilayer ceramic capacitor in Figure 19. Figure 21 is a diagram showing an example of a cross-section cut along the cutting line XXI-XXI in Figure 19. Figure 22A is a diagram showing a cross-section cut along the cutting line XXIIA-XXIIA in Figure 21, Figure 22B is a diagram showing a cross-section cut along the cutting line XXIIB-XXIIB in Figure 21, and Figure 22C is a diagram showing a cross-section cut along the cutting line XXIIC-XXIIC in Figure 21. Figure 23 is a perspective view showing another example of a multilayer ceramic capacitor according to the third embodiment. Figure 24 is a perspective view showing the laminate of the multilayer ceramic capacitor in Figure 23. Figure 25 is a diagram showing a cross-section cut along the cutting line XXV-XXV in Figure 23. Figure 26 is a diagram showing a cross-section cut along the cutting line XXVI-XXVI in Figure 25.

[0069] The multilayer ceramic capacitor 1B of the third embodiment differs from the multilayer ceramic capacitor 1A in the configuration of the internal electrode 8 and the external electrodes 31, 32, but has the same configuration as the multilayer ceramic capacitor 1A. Therefore, the same reference numerals are used for the same components as in the multilayer ceramic capacitor 1A, and their description is omitted.

[0070] As shown in Figure 22A, the first internal electrode 81 has a first opposing portion 81a and a first leading portion 81b. The first opposing portion 81a and the first leading portion 81b are connected to each other. As shown in Figure 22B, the second internal electrode 82 has a second opposing portion 82a and a second leading portion 82b. The second opposing portion 82a and the second leading portion 82b are connected to each other. As shown in Figures 20 and 21, the end of the first leading portion 81b is exposed to the first end face 2c, and the end of the second leading portion 82b is exposed to the second end face 2d. The first external electrode 31 is connected to the end of the first leading portion 81b exposed to the first end face 2c, and the second external electrode 32 is connected to the end of the second leading portion 82b exposed to the second end face 2d. The widths of the first opposing portion 81a and the second opposing portion 82a may be approximately 0.7 to 0.9 times the width of the laminate 2. In this embodiment, the width of the first drawer portion 81b is smaller than the width of the first opposing portion 81a, and the width of the second drawer portion 82b is smaller than the width of the second opposing portion 82a. The width of the first drawer portion 81b may be approximately 0.3 to 0.7 times the width of the laminate 2. The width of the second drawer portion 82b may be approximately 0.3 to 0.7 times the width of the laminate 2.

[0071] The first external electrode 31 includes a first portion 31a located on the capacitance portion 4 and a second portion 31b located on the first coating portion 5. The first portion 31a and the second portion 31b are connected to each other.

[0072] The first portion 31a is located on the first end face 2c and covers the exposed ends of the multiple first internal electrodes 81 on the first end face 2c. The first portion 31a is connected to the exposed ends of the multiple first internal electrodes 81 on the first end face 2c. The second portion 31b is located from the first end face 2c across the first face 2a, the first side surface 2e, and the second side surface 2f, and covers the exposed ends of the multiple first dummy electrodes 11 on the first end face 2c, the first side surface 2e, and the second side surface 2f. The second portion 31b is connected to the exposed ends of the multiple first dummy electrodes 11 on the first end face 2c, the first side surface 2e, and the second side surface 2f. The second portion 31b further covers the first anchor electrode 14 and is connected to the first anchor electrode 14.

[0073] The second external electrode 32 includes a first portion 32a located on the capacitance portion 4 and a second portion 32b located on the first covering portion 5. The first portion 32a and the second portion 32b are connected to each other.

[0074] The first portion 32a is located on the second end face 2d and covers the exposed ends of the multiple second internal electrodes 82 on the second end face 2d. The first portion 32a is connected to the exposed ends of the multiple second internal electrodes 82 on the second end face 2d. The second portion 32b is located from the second end face 2d across the first face 2a, the first side surface 2e, and the second side surface 2f, and covers the exposed ends of the multiple second dummy electrodes 12 on the second end face 2d, the first side surface 2e, and the second side surface 2f. The second portion 32b is connected to the exposed ends of the multiple second dummy electrodes 12 on the second end face 2d. The second portion 32b further covers the second anchor electrode 15 and is connected to the second anchor electrode 15.

[0075] As shown in Figures 22A to 22C, the first parts 31a and 32a have a length L1 along the outer circumference C of the laminate 2 in a plan view, and the second parts 31b and 32b have a length L2 along the outer circumference C of the laminate 2 in a plan view. The external electrodes 31 and 32 have a configuration in which the length L2 of the second parts 31b and 32b is longer than the length L1 of the first parts 31a and 32a. The length L1 of the first parts 31a and 32a may be approximately 0.3 to 0.7 times the width of the laminate 2 (i.e., the width of the capacitance part 4), approximately 0.4 to 0.6 times, or approximately 0.5 times. Note that the length L1 of the first parts 31a and 32a along the outer circumference C of the first part 31a and the length of the first part 32a along the outer circumference C do not have to be exactly the same, and one length may be approximately 0.95 to 1.05 times the length of the other. In this case, the length L1 of the first parts 31a and 32a may be defined, for example, by the average length along the outer circumference C of the first parts 31a and 32a. The same applies to the length L2 of the second parts 31b and 32b.

[0076] In the multilayer ceramic capacitor 1B, the first portions 31a and 32a are not located across the entire width of the capacitance portion 4 (see Figure 19), and the width of the first portions 31a and 32a is approximately 0.3 to 0.7 times the width of the capacitance portion 4. Therefore, expansion and contraction vibrations of the capacitance portion 4 are less likely to be transmitted to the circuit board 16. Consequently, the multilayer ceramic capacitor 1B can reduce noise from the circuit board 16.

[0077] In the multilayer ceramic capacitor 1B, similar to the multilayer ceramic capacitor 1, the shape of the external electrodes 31 and 32 can be changed by modifying the shapes of the internal electrodes 8, dummy electrodes 10, and anchor electrodes 13, thereby controlling the amount of solder S adhering to the external electrodes 31 and 32. Since the multilayer ceramic capacitor 1B does not require the formation of solder-free areas on the external electrodes 31 and 32 during its manufacturing process, the increased manufacturing burden of the multilayer ceramic capacitor 1B can be reduced.

[0078] In this embodiment, the length L2 of the second portion 31b, 32b is longer than the length L1 of the first portion 31a, 32a, and the second portion 31b, 32b extends from the end faces 2c, 2d to the first face 2a, the first side surface 2e, and the second side surface 2f. With the multilayer ceramic capacitor 1B, a sufficient amount of solder S can be attached to the second portion 31b, 32b, and the second portion 31b, 32b can be firmly bonded to the substrate electrodes 17, 18. As a result, the reliability of the mounting structure 100 can be improved.

[0079] The following describes other examples of the multilayer ceramic capacitor 1B. In this example, the multilayer ceramic capacitor 1B' differs from the multilayer ceramic capacitor 1B in the configuration of the second covering portion 6 and the external electrodes 31, 32, but the other configurations are the same. Therefore, the same reference numerals are used for the same configurations as in the multilayer ceramic capacitor 1B, and their explanation is omitted.

[0080] In the multilayer ceramic capacitor 1B', the second coating portion 6 includes a dielectric portion 22 and a plurality of dummy electrodes 23, as shown in Figure 25.

[0081] The dielectric portion 22 is made of an insulating material. The dielectric portion 22 may be made of a ceramic material mainly composed of, for example, BaTiO3, CaTiO3, SrTiO3, BaZrO3, CaZrO3, etc. The dielectric portion 22 may be made by stacking multiple dielectric layers 7.

[0082] The multiple dummy electrodes 23 include at least one third dummy electrode 24 and at least one fourth dummy electrode 25, as shown in Figures 24 and 25. The third dummy electrode 24 and the fourth dummy electrode 25 may extend substantially parallel to the main surfaces 2a and 2b of the laminate 2. The third dummy electrode 24 and the fourth dummy electrode 25 are embedded in the dielectric portion 22, with their ends exposed on the surface of the second coating portion 6. In the multilayer ceramic capacitor 1B', the ends of the third dummy electrode 24 are exposed on the first end face 2c, the first side surface 2e and the second side surface 2f, and the ends of the fourth dummy electrode 25 are exposed on the second end face 2d, the first side surface 2e and the second side surface 2f. The third dummy electrode 24 and the fourth dummy electrode 25 do not overlap in plan view and are not electrically connected.

[0083] In the multilayer ceramic capacitor 1B', the second covering portion 6 further includes a plurality of anchor electrodes 26, as shown in Figures 24 and 25. The plurality of anchor electrodes 26 include a third anchor electrode 27 and a fourth anchor electrode 28. The third anchor electrode 27 and the fourth anchor electrode 28 are exposed on the second surface 2b of the laminate 2. The third anchor electrode 27 is exposed in the region of the second surface 2b near the first end surface 2c, and the fourth anchor electrode 28 is exposed in the region of the second surface 2b near the second end surface 2d. The widths of the third anchor electrode 27 and the fourth anchor electrode 28 may be approximately the same as the width of the laminate 2. The third anchor electrode 27 and the fourth anchor electrode 28 are not electrically connected. In a plan view, the external shape of the third anchor electrode 27 may be approximately the same as that of the third dummy electrode 24. In a plan view, the external shape of the fourth anchor electrode 28 may be approximately the same as that of the fourth dummy electrode 25.

[0084] The first external electrode 31 further includes a third portion 31c located on the second covering portion 6. The third portion 31c is connected to the first portion 31a. The third portion 31c extends from the first end face 2c to the second face 2b, the first side surface 2e, and the second side surface 2f, and collectively covers the exposed ends of the multiple third dummy electrodes 24 on the first end face 2c, the first side surface 2e, and the second side surface 2f. The third portion 31c is connected to the exposed ends of the multiple third dummy electrodes 24 on the first end face 2c, the first side surface 2e, and the second side surface 2f. The third portion 31c further covers the third anchor electrode 27 and is connected to the third anchor electrode 27.

[0085] The second external electrode 32 further includes a third portion 32c located on the second covering portion 6. The third portion 32c is connected to the first portion 32a. The third portion 32c extends from the second end face 2d to the second face 2b, the first side surface 2e, and the second side surface 2f, and collectively covers the exposed ends of the multiple fourth dummy electrodes 25 on the second end face 2d, the first side surface 2e, and the second side surface 2f. The third portion 32c is connected to the exposed ends of the multiple fourth dummy electrodes 25 on the second end face 2d, the first side surface 2e, and the second side surface 2f. The third portion 32c further covers the fourth anchor electrode 28 and is connected to the fourth anchor electrode 28.

[0086] As shown in Figure 26, the third parts 31c and 32c have a length L3 along the outer circumference C of the laminate 2 in a plan view. The external electrodes 31 and 32 have a configuration in which the length L3 of the third parts 31c and 32c is longer than the length L1 of the first parts 31a and 32a. Note that the length L3 of the third parts 31c and 32c along the outer circumference C of the third part 31c and the length of the third part 32c along the outer circumference C do not have to be exactly the same; one length may be approximately 0.95 to 1.05 times the length of the other. In this case, the length L3 of the third parts 31c and 32c may be defined, for example, by the average value of the lengths of the third parts 31c and 32c along the outer circumference C.

[0087] The multilayer ceramic capacitor 1B' can be mounted on the circuit board 16 such that its second surface 2b faces the mounting surface 16a. Even when the multilayer ceramic capacitor 1B' is mounted with its second surface 2b facing the mounting surface 16a, it can reduce noise from the circuit board 16 in the same way as when the first surface 2a faces the mounting surface 16a. Furthermore, because the length L3 of the third portion 31c,32c of the multilayer ceramic capacitor 1B' is longer than the length L1 of the first portion 31a,32a, even when the second surface 2b faces the mounting surface 16a, a sufficient amount of solder S can be attached to the third portion 31c,32c, and the third portion 31c,32c and the substrate electrodes 17,18 can be firmly joined by the solder S. As a result, the reliability of the mounted structure 100 can be improved.

[0088] The third portion 31c of the first external electrode 31 may be substantially symmetrical with the second portion 31b of the first external electrode 31 with respect to a virtual plane P (see Figure 23) that bisects the laminate 2 in the third direction, and the third portion 32c of the second external electrode 32 may be substantially symmetrical with the second portion 32b of the second external electrode 32 with respect to the virtual plane P. In this case, the multilayer ceramic capacitor 1B' can exhibit similar characteristics (e.g., capacitance, equivalent series resistance, equivalent series inductance, etc.) and can achieve the same effects as the multilayer ceramic capacitor 1B, whether the first surface 2a or the second surface 2b is mounted facing the mounting surface 16a. Therefore, when manufacturing the mounting structure 100, either the first surface 2a or the second surface 2b may be mounted facing the mounting surface 16a, thus reducing the manufacturing burden of the mounting structure 100. The virtual plane P is a plane perpendicular to the third direction (i.e., parallel to the main surfaces 2a and 2b) and is the plane that bisects the thickness of the laminate 2.

[0089] <Fourth Embodiment> Figure 27 is a perspective view showing a multilayer ceramic capacitor according to the fourth embodiment. Figure 28 is a perspective view showing the laminate of the multilayer ceramic capacitor of Figure 27. Figure 29 is a diagram showing an example of a cross-section cut along the cutting line XXIX-XXIX in Figure 27. Figure 30A is a diagram showing a cross-section cut along the cutting line XXXA-XXXA in Figure 29, Figure 30B is a diagram showing a cross-section cut along the cutting line XXXB-XXXB in Figure 29, and Figure 30C is a diagram showing a cross-section cut along the cutting line XXXC-XXXC in Figure 29. Figure 31 is a perspective view showing another example of a multilayer ceramic capacitor according to the fourth embodiment. Figure 32 is a perspective view showing the laminate of the multilayer ceramic capacitor of Figure 31. Figure 33 is a diagram showing a cross-section cut along the cutting line XXXIII-XXXIII in Figure 31. Figure 34 is a diagram showing a cross-section cut along the cutting line XXXIV-XXXIV in Figure 33.

[0090] The multilayer ceramic capacitor 1C of the fourth embodiment differs from the multilayer ceramic capacitor 1A in the configuration of the internal electrode 8 and the external electrodes 31, 32, but has the same configuration as the multilayer ceramic capacitor 1A. Therefore, the same reference numerals are used for the same components as in the multilayer ceramic capacitor 1A, and their description is omitted.

[0091] In this embodiment, the first internal electrode 81 has a first opposing portion 81a and a pair of first lead-out portions 81b and 81c, as shown in Figure 30A. The second internal electrode 82 has a second opposing portion 82a and a pair of second lead-out portions 82b and 82c, as shown in Figure 30B.

[0092] The first opposing portion 81a and the second opposing portion 82a face each other via a dielectric layer 7. When a voltage is applied to the external electrodes 31 and 32, capacitance is generated in the dielectric layer 7 located between the first opposing portion 81a and the second opposing portion 82a. The first opposing portion 81a and the second opposing portion 82a may be approximately the same in plan view. In this case, it is possible to secure the desired capacitance while reducing the risk of the laminate 2 becoming larger. The widths of the first opposing portion 81a and the second opposing portion 82a may be approximately 0.7 to 0.9 times the width of the laminate 2. Also, the lengths of the first opposing portion 81a and the second opposing portion 82a may be approximately 0.7 to 0.9 times the length of the laminate 2. In this case, it is possible to protect the internal electrodes 8 from external environmental factors such as humidity while securing the desired capacitance. In this specification, "length" refers to the dimensions of the object in the first direction (x-axis direction) unless otherwise specified.

[0093] The first extensions 81b and 81c are connected to the first opposing portion 81a. The first extension 81b extends from the region of the first opposing portion 81a near the first end face 2c toward the first side surface 2e, with its end exposed to the first side surface 2e. The first extension 81c extends from the region of the first opposing portion 81a near the first end face 2c toward the second side surface 2f, with its end exposed to the second side surface 2f. The lengths of the first extensions 81b and 81c may be approximately 0.1 to 0.3 times the length of the laminate 2.

[0094] The second extensions 82b and 82c are connected to the second opposing portion 82a. The second extension 82b extends from the region of the second opposing portion 82a near the second end face 2d toward the first side surface 2e, with its end exposed to the first side surface 2e. The second extension 82c extends from the region of the second opposing portion 82a near the second end face 2d toward the second side surface 2f, with its end exposed to the second side surface 2f. The lengths of the second extensions 82b and 82c may be approximately 0.1 to 0.3 times the length of the laminate 2.

[0095] As shown in Figure 29, the first coating portion 5 includes a dielectric portion 9 and a plurality of dummy electrodes 10. The plurality of dummy electrodes 10 include at least one first dummy electrode 11 and at least one second dummy electrode 12, as shown in Figures 28 and 29. The first coating portion 5 further includes a plurality of anchor electrodes 13, as shown in Figures 28 and 29. The plurality of anchor electrodes 13 include a first anchor electrode 14 and a second anchor electrode 15. The first coating portion 5 has the same configuration as the first coating portion 5 of the multilayer ceramic capacitor 1B.

[0096] The first external electrode 31 includes a first portion 31a located on the capacitance portion 4 and a second portion 31b located on the first covering portion 5. The first portion 31a is located on the first side surface 2e and the second side surface 2f, and collectively covers the exposed ends of the multiple first lead portions 81b on the first side surface 2e and collectively covers the exposed ends of the multiple first lead portions 81c on the second side surface 2f. The first portion 31a is connected to the exposed ends of the multiple first lead portions 81b on the first side surface 2e and to the exposed ends of the multiple first lead portions 81c on the second side surface 2f. The second portion 31b is located from the first end surface 2c, across the first surface 2a, the first side surface 2e and the second side surface 2f, and collectively covers the exposed ends of the multiple first dummy electrodes on the first end surface 2c, the first side surface 2e and the second side surface 2f. The second portion 31b is connected to the multiple first dummy electrodes 11. The second portion 31b further covers the first anchor electrode 14 and is connected to the first anchor electrode 14.

[0097] The second external electrode 32 includes a first portion 32a located on the capacitance portion 4 and a second portion 32b located on the first covering portion 5. The first portion 32a is located on the first side surface 2e and the second side surface 2f, and collectively covers the exposed ends of the multiple second lead portions 82b on the first side surface 2e and collectively covers the exposed ends of the multiple second lead portions 82c on the second side surface 2f. The first portion 32a is connected to the exposed ends of the multiple second lead portions 82b on the first side surface 2e and collectively connects to the exposed ends of the multiple second lead portions 82c on the second side surface 2f. The second portion 32b is located from the second end surface 2d, across the first surface 2a, the first side surface 2e and the second side surface 2f, and collectively covers the exposed ends of the multiple second dummy electrodes on the second end surface 2d, the first side surface 2e and the second side surface 2f. The second portion 32b is connected to the multiple second dummy electrodes 12. The second portion 32b further covers the second anchor electrode 15 and is connected to the second anchor electrode 15.

[0098] As shown in Figures 30A to 30C, the first parts 31a and 32a have a length L1 along the outer circumference C of the laminate 2 in a plan view, and the second parts 31b and 32b have a length L2 along the outer circumference C of the laminate 2 in a plan view. The external electrodes 31 and 32 have a configuration in which the length L2 of the second parts 31b and 32b is longer than the length L1 of the first parts 31a and 32a. The length L1 of the first part 31a is defined by the sum of the length Lb of the first part 31a covering the end exposed on the first side surface 2e of the first lead-out part 81b and the length Lc of the first part 31a covering the end exposed on the second side surface 2f of the first lead-out part 81c. The length L1 of the first section 32a is defined by the sum of the length Lb of the first section 32a covering the end exposed on the first side surface 2e of the second extension section 82b and the length Lc of the first section 32a covering the end exposed on the second side surface 2f of the second extension section 82c. The lengths L1 of the first sections 31a and 32a may be approximately 0.2 to 0.5 times the length of the laminate 2. Note that the lengths L1 of the first sections 31a and 32a along the outer circumference C of the first section 31a and the length along the outer circumference C of the first section 32a do not need to be exactly the same; one length may be approximately 0.95 to 1.05 times the length of the other. In this case, the lengths L1 of the first sections 31a and 32a may be defined, for example, by the average value of the lengths along the outer circumference C of the first sections 31a and 32a. The same applies to the lengths L2 of the second sections 31b and 32b.

[0099] In the multilayer ceramic capacitor 1C, the first parts 31a and 32a are not located at the end faces 2c and 2d where the vibration amplitude due to the expansion and contraction vibration of the capacitance part 4 is greatest (see Figure 27). Therefore, the effect of the expansion and contraction vibration of the capacitance part 4 is reduced, and the amount transmitted to the circuit board 16 is reduced. Consequently, the multilayer ceramic capacitor 1C can reduce the noise of the circuit board 16. When the length L1 of the first parts 31a and 32a is approximately 0.2 to 0.5 times the length of the laminate 2, the expansion and contraction vibration of the capacitance part 4 is less likely to be transmitted by the circuit board 16, thus further reducing the noise of the circuit board 16.

[0100] In the multilayer ceramic capacitor 1C, similar to the multilayer ceramic capacitor 1, the shape of the external electrodes 31 and 32 can be changed by modifying the shapes of the internal electrodes 8, dummy electrodes 10, and anchor electrodes 13, thereby controlling the amount of solder S adhering to the external electrodes 31 and 32. Since the multilayer ceramic capacitor 1C does not require the formation of solder-free areas on the external electrodes 31 and 32 during its manufacturing process, the increased manufacturing burden of the multilayer ceramic capacitor 1C can be reduced.

[0101] In this embodiment, the length L2 of the second parts 31b and 32b is longer than the length L1 of the first parts 31a and 32a, and the second parts 31b and 32b are located from the end faces 2c and 2d to the first face 2a, the first side surface 2e, and the second side surface 2f. With the multilayer ceramic capacitor 1C, a sufficient amount of solder S can be attached to the second parts 31b and 32b, and the second parts 31b and 32b can be firmly bonded to the substrate electrodes 17 and 18. As a result, the reliability of the mounting structure 100 can be improved.

[0102] Figures 27, 30A, and 30B show an example in which the first parts 31a and 32a are located on both the first side surface 2e and the second side surface 2f, and the second parts 31b and 32b are located on both the first side surface 2e and the second side surface 2f, but the invention is not limited to this. The multilayer ceramic capacitor 1C may be configured such that the first parts 31a and 32a are located on at least one of the first side surface 2e and the second side surface 2f, and the second parts 31b and 32b are located on at least one of the first side surface 2e and the second side surface 2f. Even with such a configuration, it is possible to reduce noise from the circuit board 16, reduce the increased manufacturing burden of the multilayer ceramic capacitor 1C, and improve the reliability of the mounting structure 100. For example, if the first parts 31a and 32a are located on the first side surface 2e, and the second parts 31b and 32b are located from the first end surface 2c across the first surface 2a and the second side surface 2f, the first parts 31a and 32a may be connected to the portion of the second parts 31b and 32b located on the first end surface 2c, or to the portion located on the first surface 2a. The side surfaces 2e and 2f on which the first part 31a of the first external electrode 31 is located and the side surfaces 2e and 2f on which the first part 32a of the second external electrode 32 is located may be the same or different.

[0103] The following describes other examples of the multilayer ceramic capacitor 1C. In this example, the multilayer ceramic capacitor 1C' differs from the multilayer ceramic capacitor 1C in the configuration of the second covering portion 6 and the external electrodes 31, 32, but the other configurations are the same. Therefore, the same reference numerals are used for the same components as in the multilayer ceramic capacitor 1C, and their explanation is omitted.

[0104] In the multilayer ceramic capacitor 1C', the second coating portion 6 includes a dielectric portion 22 and a plurality of dummy electrodes 23, as shown in Figure 33.

[0105] The dielectric portion 22 is made of an insulating material. The dielectric portion 22 may be made of a ceramic material mainly composed of, for example, BaTiO3, CaTiO3, SrTiO3, BaZrO3, CaZrO3, etc. The dielectric portion 22 may be made by stacking multiple dielectric layers 7.

[0106] The multiple dummy electrodes 23 include at least one third dummy electrode 24 and at least one fourth dummy electrode 25, as shown in Figures 32 and 33. The third dummy electrode 24 and the fourth dummy electrode 25 may extend parallel or substantially parallel to the main surfaces 2a and 2b of the laminate 2. The third dummy electrode 24 and the fourth dummy electrode 25 are embedded in the dielectric portion 22, with their ends exposed on the surface of the second coating portion 6. In the multilayer ceramic capacitor 1C', the ends of the third dummy electrode 24 are exposed on the first end face 2c, the first side surface 2e, and the second side surface 2f, and the ends of the fourth dummy electrode 25 are exposed on the second end face 2d, the first side surface 2e, and the second side surface 2f. The third dummy electrode 24 and the fourth dummy electrode 25 do not overlap in a plan view. Also, the third dummy electrode 24 and the fourth dummy electrode 25 are not electrically connected.

[0107] In the multilayer ceramic capacitor 1C', the second covering portion 6 further includes a plurality of anchor electrodes 26, as shown in Figures 32 and 33. The plurality of anchor electrodes 26 include a third anchor electrode 27 and a fourth anchor electrode 28. The third anchor electrode 27 and the fourth anchor electrode 28 are exposed on the second surface 2b of the laminate 2. The third anchor electrode 27 is exposed in the region of the second surface 2b near the first end surface 2c, and the fourth anchor electrode 28 is exposed in the region of the second surface 2b near the second end surface 2d. The widths of the third anchor electrode 27 and the fourth anchor electrode 28 may be approximately the same as the width of the laminate 2. The third anchor electrode 27 and the fourth anchor electrode 28 are not electrically connected. In a plan view, the external shape of the third anchor electrode 27 may be approximately the same as that of the third dummy electrode 24. In a plan view, the external shape of the fourth anchor electrode 28 may be approximately the same as that of the fourth dummy electrode 25.

[0108] The first external electrode 31 further includes a third portion 31c located on the second covering portion 6. The third portion 31c is connected to the first portion 31a. The third portion 31c extends from the first end face 2c to the second face 2b, the first side surface 2e, and the second side surface 2f, and collectively covers the exposed ends of the multiple third dummy electrodes 24 on the first end face 2c, the first side surface 2e, and the second side surface 2f. The third portion 31c is connected to the exposed ends of the multiple third dummy electrodes 24 on the first end face 2c, the first side surface 2e, and the second side surface 2f. The third portion 31c further covers the third anchor electrode 27 and is connected to the third anchor electrode 27.

[0109] The second external electrode 32 further includes a third portion 32c located on the second covering portion 6. The third portion 32c is connected to the first portion 32a. The third portion 32c extends from the second end face 2d to the second face 2b, the first side surface 2e, and the second side surface 2f, and collectively covers the exposed ends of the multiple fourth dummy electrodes 25 on the second end face 2d, the first side surface 2e, and the second side surface 2f. The third portion 32c is connected to the exposed ends of the multiple fourth dummy electrodes 25 on the second end face 2d, the first side surface 2e, and the second side surface 2f. The third portion 32c further covers the fourth anchor electrode 28 and is connected to the fourth anchor electrode 28.

[0110] As shown in Figure 34, the third parts 31c and 32c have a length L3 along the outer circumference C of the laminate 2 in a plan view. The external electrodes 31 and 32 have a configuration in which the length L3 of the third parts 31c and 32c is longer than the length L1 of the first parts 31a and 32a. Note that the length L3 of the third parts 31c and 32c along the outer circumference C of the third part 31c and the length of the third part 32c along the outer circumference C do not have to be exactly the same; one length may be approximately 0.95 to 1.05 times the length of the other. In this case, the length L3 of the third parts 31c and 32c may be defined, for example, by the average value of the lengths of the third parts 31c and 32c along the outer circumference C.

[0111] The multilayer ceramic capacitor 1C' can be mounted on the circuit board 16 such that its second surface 2b faces the mounting surface 16a. Even when the multilayer ceramic capacitor 1C' is mounted with its second surface 2b facing the mounting surface 16a, it can reduce noise from the circuit board 16 in the same way as when the first surface 2a faces the mounting surface 16a. Furthermore, because the length L3 of the third portion 31c,32c of the multilayer ceramic capacitor 1C' is longer than the length L1 of the first portion 31a,32a, even when the second surface 2b faces the mounting surface 16a, a sufficient amount of solder S can be attached to the third portion 31c,32c, and the third portion 31c,32c and the substrate electrodes 17,18 can be firmly bonded by the solder S. As a result, the reliability of the mounted structure 100 can be improved.

[0112] The third portion 31c of the first external electrode 31 may be substantially symmetrical with the second portion 31b of the first external electrode 31 with respect to a virtual plane P (see Figure 31) that bisects the laminate 2 in the third direction, and the third portion 32c of the second external electrode 32 may be substantially symmetrical with the second portion 32b of the second external electrode 32 with respect to the virtual plane P. In this case, the multilayer ceramic capacitor 1C' can exhibit similar characteristics (e.g., capacitance, equivalent series resistance, equivalent series inductance, etc.) and can achieve the same effects as the multilayer ceramic capacitor 1C, whether the first surface 2a or the second surface 2b is mounted facing the mounting surface 16a. Therefore, when manufacturing the mounting structure 100, either the first surface 2a or the second surface 2b may be mounted facing the mounting surface 16a, thus reducing the manufacturing burden of the mounting structure 100. The virtual plane P is a plane perpendicular to the third direction (i.e., approximately parallel to the main surfaces 2a and 2b) and is the plane that bisects the thickness of the laminate 2.

[0113] <Fifth Embodiment> Figure 35 is a perspective view showing an example of a multilayer ceramic capacitor according to the fifth embodiment. Figure 36 is a perspective view showing the laminate of the multilayer ceramic capacitor of Figure 35. Figure 37 is a diagram showing a cross-section cut along the cutting line XXXVII-XXXVII in Figure 35. Figure 38A is a diagram showing a cross-section cut along the cutting line XXXVIIIA-XXXVIIIA in Figure 37, Figure 38B is a diagram showing a cross-section cut along the cutting line XXXVIIIB-XXXVIIIB in Figure 37, and Figure 38C is a diagram showing a cross-section cut along the cutting line XXXVIIIC-XXXVIIIC in Figure 37. Figure 39 is a diagram showing another example of a cross-section cut along the cutting line XXXVIIIA-XXXVIIIA in Figure 37. Figure 40 is a perspective view showing another example of a multilayer ceramic capacitor according to the fifth embodiment. Figure 41 is a perspective view showing the laminate of the multilayer ceramic capacitor of Figure 40. Figure 42 is a diagram showing a cross-section cut along the cutting line XLII-XLII in Figure 40. Figure 43 shows a cross-section obtained by cutting along the line XLIII-XLIII in Figure 42.

[0114] The multilayer ceramic capacitor 1D of the fifth embodiment differs from the multilayer ceramic capacitor 1C in the configuration of the internal electrode 8 and the external electrodes 31, 32, but has the same configuration as the multilayer ceramic capacitor 1C. Therefore, the same reference numerals are used for the same components as in the multilayer ceramic capacitor 1C, and their description is omitted.

[0115] As shown in Figure 36, the laminate 2 has a first corner 47a extending from the first end face 2c to the first side surface 2e, a second corner 47b extending from the first end face 2c to the second side surface 2f, a third corner 47c extending from the second end face 2d to the first side surface 2e, and a fourth corner 47d extending from the second end face 2d to the second side surface 2f. Hereinafter, when the first corner 47a, second corner 47b, third corner 47c, and fourth corner 47d are not distinguished, they may simply be referred to as "corners 47a to 47d".

[0116] As shown in Figure 38A, the first internal electrode 81 has a first opposing portion 81a and a pair of first lead-out portions 81b and 81c. As shown in Figure 38B, the second internal electrode 82 has a second opposing portion 82a and a pair of second lead-out portions 82b and 82c.

[0117] The first opposing portion 81a and the second opposing portion 82a face each other via a dielectric layer 7. When a voltage is applied to the external electrodes 31 and 32, capacitance is generated in the dielectric layer 7 located between the first opposing portion 81a and the second opposing portion 82a. The first opposing portion 81a and the second opposing portion 82a may be approximately the same in plan view. In this case, it is possible to secure the desired capacitance while reducing the risk of the laminate 2 becoming larger. The width of the first opposing portion 81a and the second opposing portion 82a may be approximately 0.7 to 0.9 times the width of the laminate 2. Also, the length of the first opposing portion 81a and the second opposing portion 82a may be approximately 0.7 to 0.9 times the length of the laminate 2. In this case, it is possible to protect the internal electrodes 8 from external environmental factors such as humidity while securing the desired capacitance.

[0118] The first extensions 81b and 81c are connected to the first opposing portion 81a. As shown in Figure 38A, the first extension 81b extends from the region of the first opposing portion 81a near the first corner 47a toward the first corner 47a, with its end exposed to the first corner 47a. As shown in Figure 38A, the first extension 81c extends from the region of the first opposing portion 81a near the second corner 47b toward the second corner 47b, with its end exposed to the second corner 47b.

[0119] The second extensions 82b and 82c are connected to the second opposing portion 82a. As shown in Figure 38B, the second extension 82b extends from the region of the second opposing portion 82a near the third corner 47c toward the third corner 47c, with its end exposed to the third corner 47c. As shown in Figure 38B, the second extension 82c extends from the region of the second opposing portion 82a near the fourth corner 47d toward the fourth corner 47d, with its end exposed to the fourth corner 47d.

[0120] As shown in Figure 37, the first coating portion 5 includes a dielectric portion 9 and a plurality of dummy electrodes 10. The plurality of dummy electrodes 10 include at least one first dummy electrode 11 and at least one second dummy electrode 12, as shown in Figures 36 and 37. The first coating portion 5 further includes a plurality of anchor electrodes 13, as shown in Figures 36 and 37. The plurality of anchor electrodes 13 include a first anchor electrode 14 and a second anchor electrode 15. The first coating portion 5 has the same configuration as the first coating portion 5 of the multilayer ceramic capacitor 1C.

[0121] The first external electrode 31 includes a first portion 31a located on the capacitance portion 4 and a second portion 31b located on the first covering portion 5. The first portion 31a is located on the first corner portion 47a and the second corner portion 47b, and covers the exposed ends of the multiple first lead portions 81b at the first corner portion 47a and the exposed ends of the multiple first lead portions 81c at the second corner portion 47b. The first portion 31a is connected to the exposed ends of the multiple first lead portions 81b at the first corner portion 47a and to the exposed ends of the multiple first lead portions 81c at the second corner portion 47b. The second portion 31b is located from the first end face 2c, across the first face 2a, the first side surface 2e and the second side surface 2f, and covers the exposed ends of the multiple first dummy electrodes 11 at the first end face 2c, the first side surface 2e and the second side surface 2f. The second portion 31b is connected to multiple first dummy electrodes 11. The second portion 31b further covers the first anchor electrode 14 and is connected to the first anchor electrode 14.

[0122] The second external electrode 32 includes a first portion 32a located on the capacitance portion 4 and a second portion 32b located on the first covering portion 5. The first portion 32a is located on the third corner portion 47c and the fourth corner portion 47d, and covers the ends of the multiple second lead portions 82b that are exposed at the third corner portion 47c and the ends of the multiple second lead portions 82c that are exposed at the fourth corner portion 47d. The first portion 32a is connected to the ends of the multiple second lead portions 82b that are exposed at the third corner portion 47c and the ends of the multiple second lead portions 82c that are exposed at the fourth corner portion 47d. The second portion 32b is located from the second end face 2d, across the first face 2a, the first side surface 2e and the second side surface 2f, and covers the ends of the multiple second dummy electrodes 12 that are exposed at the second end face 2d, the first side surface 2e and the second side surface 2f. The second portion 32b is connected to multiple second dummy electrodes 12. The second portion 32b further covers the second anchor electrode 15 and is connected to the second anchor electrode 15.

[0123] As shown in Figures 38A to 38C, the first parts 31a and 32a have a length L1 along the outer circumference C of the laminate 2 in a plan view, and the second parts 31b and 32b have a length L2 along the outer circumference C of the laminate 2 in a plan view. The external electrodes 31 and 32 have a configuration in which the length L2 of the second parts 31b and 32b is longer than the length L1 of the first parts 31a and 32a. The length L1 of the first part 31a is defined by the sum of the length Lb of the first part 31a covering the end exposed at the first corner 47a of the first lead-out part 81b and the length Lc of the first part 31a covering the end exposed at the second corner 47b of the first lead-out part 81c. The length L1 of the first part 32a is defined by the sum of the length Lb of the first part 32a covering the end exposed at the third corner 47c of the second extension 82b and the length Lc of the first part 32a covering the end exposed at the fourth corner 47d of the second extension 82c. The lengths L1 of the first parts 31a and 32a may be, for example, about 10 to 100 μm. Note that the length L1 of the first parts 31a and 32a along the outer circumference C of the first part 31a and the length L1 of the outer circumference C of the first part 32a do not have to be exactly the same, and one length may be about 0.95 to 1.05 times the length of the other. In this case, the lengths L1 of the first parts 31a and 32a may be defined, for example, by the average value of the lengths along the outer circumference C of the first parts 31a and 32a. The same applies to the lengths L2 of the second parts 31b and 32b.

[0124] In the multilayer ceramic capacitor 1D, since the first portions 31a and 32a are not located across the entire width of the capacitance portion 4 (see Figure 35), the effect of expansion and contraction vibrations of the capacitance portion 4 is reduced, and the amount transmitted to the circuit board 16 is reduced. Therefore, the multilayer ceramic capacitor 1D can reduce the noise of the circuit board 16.

[0125] In the multilayer ceramic capacitor 1D, similar to the multilayer ceramic capacitor 1, the shape of the external electrodes 31 and 32 can be changed by modifying the shapes of the internal electrodes 8, dummy electrodes 10, and anchor electrodes 13, thereby controlling the amount of solder S adhering to the external electrodes 31 and 32. Since the multilayer ceramic capacitor 1C does not require the formation of solder-free areas on the external electrodes 31 and 32 during its manufacturing process, the increased manufacturing burden of the multilayer ceramic capacitor 1D can be reduced.

[0126] In this embodiment, the length L2 of the second portion 31b, 32b is longer than the length L1 of the first portion 31a, 32a, and the second portion 31b, 32b is located from the end faces 2c, 2d to the first face 2a, the first side surface 2e, and the second side surface 2f. With the multilayer ceramic capacitor 1D, a sufficient amount of solder S can be attached to the second portion 31b, 32b, and the second portion 31b, 32b can be firmly bonded to the substrate electrodes 17, 18. As a result, the reliability of the mounting structure 100 can be improved.

[0127] The manufacturing process for the multilayer ceramic capacitor 1D includes a step (described later) of barrel polishing the laminate 2 to sufficiently expose the internal electrodes 8 and dummy electrodes 10 on the surface of the laminate 2. Since the corners 47a to 47d of the laminate 2 have good chamferability (i.e., are easily polished) by barrel polishing, the multilayer ceramic capacitor 1D allows the internal electrodes 8 and dummy electrodes 10 to be sufficiently and well exposed on the surface of the laminate 2 (corners 47a to 47d). Therefore, the external electrodes 31 and 32 and the internal electrodes 8 can be electrically connected well. As a result, the equivalent series resistance of the multilayer ceramic capacitor 1D can be kept low.

[0128] Because the first portions 31a, 32a and second portions 31b, 32b of the multilayer ceramic capacitor 1D's external electrodes 31, 32 are located at the corners 47a to 47d of the laminate 2, the multilayer ceramic capacitor 1D can be firmly mounted on the circuit board 16 even with a relatively small amount of solder S adhering to the external electrodes 31, 32. In other words, the multilayer ceramic capacitor 1D can be firmly mounted on the circuit board 16 even if the length L1 of the first portions 31a, 32a is reduced. Therefore, the multilayer ceramic capacitor 1D can reduce the effect of expansion and contraction vibrations of the capacitance portion 4 and reduce the amount transmitted to the circuit board 16, thereby reducing noise from the circuit board 16.

[0129] Figure 38A shows an example in which the first extensions 81b and 81c are strip-shaped, extending from the first opposing portion 81a toward the first corner 47a and the second corner 47b, respectively, but is not limited to this. The first extensions 81b and 81c may be, for example, rectangular (see Figure 39), triangular, or quadrant, partially overlapping with the first opposing portion 81a. The same applies to the second extensions 82b and 82c.

[0130] Figures 35, 38A, and 38B show an example in which the first portion 31a is located at both the first corner 47a and the second corner 47b, and the second portion 31b is located at both the first corner 47a and the second corner 47b, but the invention is not limited to this. The multilayer ceramic capacitor 1D may be configured such that the first portion 31a is located at at least one of the first corner 47a and the second corner 47b, and the second portion 31b is located at at least one of the first corner 47a and the second corner 47b. The same applies to the first portion 32a and the second portion 32b. Even with such a configuration, it is possible to reduce noise from the circuit board 16, reduce the increased manufacturing burden of the multilayer ceramic capacitor 1D, and improve the reliability of the mounting structure 100. For example, if the first portion 31a is located at the first corner 47a, and the second portion 31b is located from the first end face 2c to the first face 2a and the second side surface 2f (i.e., not located at the first corner 47a), then the first portion 31a may be connected to the portion of the second portion 31b located at the first end face 2c, or to the portion located at the first face 2a. The side surfaces 2e, 2f on which the first portion 31a of the first external electrode 31 is located and the side surfaces 2e, 2f on which the first portion 32a of the second external electrode 32 is located may be the same or different.

[0131] The following describes other examples of the multilayer ceramic capacitor 1D. In this example, the multilayer ceramic capacitor 1D' differs from the multilayer ceramic capacitor 1D in the configuration of the second covering portion 6 and the external electrodes 31, 32, but the other configurations are the same. Therefore, the same reference numerals are used for the same components as in the multilayer ceramic capacitor 1D, and their explanation is omitted.

[0132] In the multilayer ceramic capacitor 1D', the second coating portion 6 includes a dielectric portion 22 and a plurality of dummy electrodes 23, as shown in Figure 42.

[0133] The dielectric portion 22 is made of an insulating material. The dielectric portion 22 may be made of a ceramic material mainly composed of, for example, BaTiO3, CaTiO3, SrTiO3, BaZrO3, CaZrO3, etc. The dielectric portion 22 may be made by stacking multiple dielectric layers 7.

[0134] The multiple dummy electrodes 23 include at least one third dummy electrode 24 and at least one fourth dummy electrode 25, as shown in Figures 41 and 42. The third dummy electrode 24 and the fourth dummy electrode 25 may extend parallel or substantially parallel to the main surfaces 2a and 2b of the laminate 2. The third dummy electrode 24 and the fourth dummy electrode 25 are embedded in the dielectric portion 22, with their ends exposed on the surface of the second coating portion 6. In the multilayer ceramic capacitor 1D', the ends of the third dummy electrode 24 are exposed on the first end face 2c, the first side surface 2e, and the second side surface 2f, and the ends of the fourth dummy electrode 25 are exposed on the second end face 2d, the first side surface 2e, and the second side surface 2f. The third dummy electrode 24 and the fourth dummy electrode 25 do not overlap in a plan view. Also, the third dummy electrode 24 and the fourth dummy electrode 25 are not electrically connected.

[0135] In the multilayer ceramic capacitor 1D', the second covering portion 6 further includes a plurality of anchor electrodes 26, as shown in Figures 32 and 33. The plurality of anchor electrodes 26 include a third anchor electrode 27 and a fourth anchor electrode 28. The third anchor electrode 27 and the fourth anchor electrode 28 are exposed on the second surface 2b of the laminate 2. The third anchor electrode 27 is exposed in the region of the second surface 2b near the first end surface 2c, and the fourth anchor electrode 28 is exposed in the region of the second surface 2b near the second end surface 2d. The widths of the third anchor electrode 27 and the fourth anchor electrode 28 may be approximately the same as the width of the laminate 2. The third anchor electrode 27 and the fourth anchor electrode 28 are not electrically connected. In a plan view, the external shape of the third anchor electrode 27 may be approximately the same as that of the third dummy electrode 24. In a plan view, the external shape of the fourth anchor electrode 28 may be approximately the same as that of the fourth dummy electrode 25.

[0136] The first external electrode 31 further includes a third portion 31c located on the second covering portion 6. The third portion 31c is connected to the first portion 31a. The third portion 31c extends from the first end face 2c to the second face 2b, the first side surface 2e, and the second side surface 2f, and collectively covers the exposed ends of the multiple third dummy electrodes 24 on the first end face 2c, the first side surface 2e, and the second side surface 2f. The third portion 31c is connected to the exposed ends of the multiple third dummy electrodes 24 on the first end face 2c, the first side surface 2e, and the second side surface 2f. The third portion 31c further covers the third anchor electrode 27 and is connected to the third anchor electrode 27.

[0137] The second external electrode 32 further includes a third portion 32c located on the second covering portion 6. The third portion 32c is connected to the first portion 32a. The third portion 32c extends from the second end face 2d to the second face 2b, the first side surface 2e, and the second side surface 2f, and collectively covers the exposed ends of the multiple fourth dummy electrodes 25 on the second end face 2d, the first side surface 2e, and the second side surface 2f. The third portion 32c is connected to the exposed ends of the multiple fourth dummy electrodes 25 on the second end face 2d, the first side surface 2e, and the second side surface 2f. The third portion 32c further covers the fourth anchor electrode 28 and is connected to the fourth anchor electrode 28.

[0138] As shown in Figure 43, the third parts 31c and 32c have a length L3 along the outer circumference C of the laminate 2 in a plan view. The external electrodes 31 and 32 have a configuration in which the length L3 of the third parts 31c and 32c is longer than the length L1 of the first parts 31a and 32a. Note that the length L3 of the third parts 31c and 32c along the outer circumference C of the third part 31c and the length of the third part 32c along the outer circumference C do not have to be exactly the same; one length may be approximately 0.95 to 1.05 times the length of the other. In this case, the length L3 of the third parts 31c and 32c may be defined, for example, by the average value of the lengths of the third parts 31c and 32c along the outer circumference C.

[0139] The multilayer ceramic capacitor 1D' can be mounted on the circuit board 16 such that its second surface 2b faces the mounting surface 16a. Even when the multilayer ceramic capacitor 1D' is mounted with its second surface 2b facing the mounting surface 16a, it can reduce noise from the circuit board 16 in the same way as when the first surface 2a faces the mounting surface 16a. Furthermore, because the length L3 of the third portion 31c,32c of the multilayer ceramic capacitor 1D' is longer than the length L1 of the first portion 31a,32a, even when the second surface 2b faces the mounting surface 16a, a sufficient amount of solder S can be attached to the third portion 31c,32c, and the third portion 31c,32c and the substrate electrodes 17,18 can be firmly bonded by the solder S. As a result, the reliability of the mounted structure 100 can be improved.

[0140] The third portion 31c of the first external electrode 31 may be substantially symmetrical with the second portion 31b of the first external electrode 31 with respect to a virtual plane P (see Figure 40) that bisects the laminate 2 in the third direction, and the third portion 32c of the second external electrode 32 may be substantially symmetrical with the second portion 32b of the second external electrode 32 with respect to the virtual plane P. In this case, the multilayer ceramic capacitor 1D' can exhibit similar characteristics (e.g., capacitance, equivalent series resistance, equivalent series inductance, etc.) and can achieve the same effects as the multilayer ceramic capacitor 1D, whether the first surface 2a or the second surface 2b is mounted facing the mounting surface 16a. Therefore, when manufacturing the mounting structure 100, either the first surface 2a or the second surface 2b may be mounted facing the mounting surface 16a, thus reducing the manufacturing burden of the mounting structure 100. The virtual plane P is a plane perpendicular to the third direction (i.e., approximately parallel to the main surfaces 2a and 2b) and is the plane that bisects the thickness of the laminate 2.

[0141] <Manufacturing method for multilayer ceramic capacitors> The following describes an example of a manufacturing method for the multilayer ceramic capacitor 1. Figure 44 is a perspective view illustrating the fabrication of the master laminate. Figure 45 is a perspective view showing an example of a master laminate. Figure 46 is a perspective view showing an example of a laminate obtained by cutting the master laminate.

[0142] The manufacturing method for the multilayer ceramic capacitor 1 includes a lamination step, a cutting step, a firing step, a polishing step, and a plating step.

[0143] (Lamination process) The lamination process is a process for creating a master laminate for producing the laminate 2. First, a raw material powder mainly composed of BaTiO3 is prepared as the material for the dielectric layer 7. Next, an organic vehicle is mixed with the prepared raw material powder to prepare a ceramic slurry. The organic vehicle used to prepare the ceramic slurry may be, for example, a resin such as a butyral resin dissolved in a solvent which is a mixture of ethyl alcohol and toluene. Next, using the prepared ceramic slurry, a ceramic green sheet 40 that will become the dielectric layer 7 is formed by a sheet molding method such as the doctor blade method or the die coater method. The average thickness of the ceramic green sheet 40 may be, for example, about 0.5 to 10 μm.

[0144] Next, a conductive paste is prepared as the material for the internal electrode 8 by mixing an organic vehicle with a powder mainly composed of Ni. The organic vehicle used in preparing the conductive paste may be, for example, a resin such as ethyl cellulose dissolved in a solvent which is a mixture of a dihydroterpineol-based solvent and butyl cellosolve. The dispersant may be, for example, oleic acid or polyethylene glycol.

[0145] Next, an internal electrode sheet 42 (see Figure 44) is prepared by printing an electrode pattern 41, which will become the internal electrode 8, onto the main surface of the ceramic green sheet 40 using the ceramic green sheet 40 and the prepared conductive paste. An auxiliary electrode sheet 44 (see Figure 44) is also prepared by printing an electrode pattern 43, which will become the dummy electrode 10 or anchor electrode 13, onto the main surface of the ceramic green sheet 40. The electrode patterns 41 and 43 can be printed using printing methods such as screen printing or gravure printing. The conductive paste used for the internal electrode 8 and the conductive paste used for the dummy electrode 10 may be different or the same. Similarly, the conductive paste used for the dummy electrode 10 and the conductive paste used for the anchor electrode 13 may be different or the same. The thickness of the electrode pattern 43 that will become the dummy electrode 10 may be equal to or greater than the thickness of the electrode pattern 41 that will become the internal electrode 8, and the thickness of the electrode pattern 43 that will become the anchor electrode 13 may be equal to or greater than the thickness of the electrode pattern 43 that will become the dummy electrode 10.

[0146] Next, a temporary laminate, which is a precursor to the main laminate, is fabricated. As shown in Figure 44, the temporary laminate can be fabricated by stacking a predetermined number of ceramic green sheets 40, stacking a predetermined number of internal electrode sheets 42 on top of a predetermined number of ceramic green sheets 40, and further stacking a predetermined number of auxiliary electrode sheets 44 on the main surface of the ceramic green sheets 40, on which electrode patterns 43 that will become dummy electrodes 10 or anchor electrodes 13 are printed. As shown in Figure 44, at least one ceramic green sheet 40 may be placed between the internal electrode sheets 42 and the auxiliary electrode sheets 44. In this case, the risk of the first external electrode 31 and the second external electrode 32 short-circuiting via the internal electrode 8 and the dummy electrode 10 can be reduced.

[0147] The base laminate 45 (see Figure 45) can be fabricated by applying pressure to the temporary laminate in the stacking direction. The temporary laminate can be pressurized, for example, using a hydrostatic press.

[0148] (cutting process) The cutting process involves cutting the base laminate 45 to produce unfired laminates 2. In the cutting process, the base laminate 45 is cut along a virtual dividing line 46 to produce multiple unfired laminates 2 (see Figure 46). The base laminate 45 can be cut using, for example, a push-cutting machine or a dicing saw device. Since the unfired laminates 2 have a similar structure to the laminates 2 obtained through the firing and polishing processes (see Figure 2), terms and reference numerals such as main faces 2a, 2b, end faces 2c, 2d, and internal electrodes 8 may also be used for the unfired laminates 2.

[0149] (Firing process) Next, the unfired laminate 2 is degreased in an atmospheric atmosphere, an inert gas atmosphere, or a reducing atmosphere. The degreasing treatment may be carried out under atmospheric pressure or under reduced pressure.

[0150] Next, the degreased laminate 2 is fired in a reducing atmosphere. The atmosphere gas may be, for example, a mixture of hydrogen (H2) and nitrogen (N2). The firing temperature may be, for example, around 1100 to 1300°C. The fired laminate 2 may be subjected to a re-oxidation treatment in an oxidizing atmosphere.

[0151] (polishing process) Next, the fired laminate 2 is placed in a rotating pot containing abrasive material and barrel polished. This removes surface burrs, rounds the corners, and allows the ends of the internal electrodes 8 (hereinafter also referred to as exposed ends) to be sufficiently exposed on the end faces 2c and 2d. As a result, a laminate 2 as shown in Figure 2 can be produced. Note that if the internal electrodes 8 are mainly composed of Ni, if Ni oxide generated during firing adheres to the exposed ends of the internal electrodes 8, the internal electrodes 8 and the external electrodes 31 and 32 may not be electrically connected properly when forming the external electrodes 31 and 32, which may degrade the characteristics of the multilayer ceramic capacitor 1. By barrel polishing the fired laminate 2, the Ni oxide adhering to the exposed ends of the internal electrodes 8 can be removed, making it possible to electrically connect the internal electrodes 8 and the external electrodes 31 and 32 properly, thereby reducing the risk of degradation in the characteristics of the multilayer ceramic capacitor 1.

[0152] (Plating process) The plating process involves forming a first plating layer 19 by electroless plating and a second plating layer 20 by electrolytic plating. In the plating process, first, the exposed ends of the internal electrodes 8, the ends of the dummy electrodes 10, and the surface of the anchor electrodes 13 on the surface of the laminate 2 are activated. This improves the adhesion of the first plating layer 19 to the laminate 2, thereby improving the characteristics and reliability of the multilayer ceramic capacitor 1. Activation can be performed, for example, by immersing the laminate 2 in a Pd salt, forming a photopattern of Pd organometallic precursors, printing a Pd compound, or depositing Pd by electrophoresis.

[0153] Next, using an electroless plating method, a first plating layer 19 is formed that collectively covers the ends of multiple first internal electrodes 81, multiple first dummy electrodes 11, and the first anchor electrode 14 exposed on the surface of the laminate 2. At the same time, another first plating layer 19 is formed that collectively covers the ends of multiple second internal electrodes 82, multiple second dummy electrodes 12, and the second anchor electrode 15 exposed on the surface of the laminate 2. The first plating layer 19 may be a Cu plating layer. Subsequently, using an electrolytic plating method, a second plating layer 20 is formed on the first plating layer 19. The second plating layer 20 may have a single-layer structure consisting of a Ni plating layer or an Sn plating layer, or it may have a multi-layer structure consisting of a Ni plating layer located on the first plating layer 19 and an Sn plating layer located on the Ni plating layer.

[0154] As described above, the multilayer ceramic capacitor 1 can be manufactured. Multilayer ceramic capacitors 1', 1A, 1A', 1B, 1B', 1C, and 1C' can be manufactured using the same manufacturing method as for the multilayer ceramic capacitor 1.

[0155] Although embodiments of this disclosure have been described in detail above, this disclosure is not limited to the embodiments described above, and various modifications and improvements are possible without departing from the gist of this disclosure.

[0156] This disclosure can be implemented in the following manner (1) to (12).

[0157] (1) A laminate having a capacitance portion formed by alternately stacking a plurality of dielectric layers and a plurality of internal electrodes, and a first covering portion and a second covering portion located at both ends of the capacitance portion in the stacking direction, wherein the laminate has a first surface and a second surface facing each other in the stacking direction, a first end surface and a second end surface facing each other in the length direction perpendicular to the stacking direction, and a first side surface and a second side surface facing each other in the width direction perpendicular to the stacking direction and the length direction, the first covering portion includes the first surface, and the second covering portion includes the second surface, A first external electrode and a second external electrode located on the laminate are respectively connected to different internal electrodes among the plurality of internal electrodes, Equipped with, The first external electrode and the second external electrode each have a first portion located on the capacitance portion and a second portion located on the first coating portion and connected to the first portion, wherein the second portion has a longer length along the outer circumference of the laminate than the first portion when viewed from the lamination direction, in a multilayer ceramic capacitor.

[0158] (2) The first portion of the first external electrode is located on the first end face, and the second portion of the first external electrode is located from the first end face across the first face, The multilayer ceramic capacitor according to (1) above, wherein the first portion of the second external electrode is located on the second end face, and the second portion of the second external electrode is located extending from the second end face to the first face.

[0159] (3) The first portion of the first external electrode is located on the first end face, and the second portion of the first external electrode is located from the first end face across the first face, the first side surface and the second side surface, The multilayer ceramic capacitor according to (1) above, wherein the first portion of the second external electrode is located on the second end face, and the second portion of the second external electrode is located extending from the second end face across the first face, the first side surface, and the second side surface.

[0160] (4) The multilayer ceramic capacitor according to (3) above, wherein the length of the first portion in the width direction is 0.3 times or more and 0.7 times or less the length of the laminate in the width direction.

[0161] (5) The first portion of the first external electrode is located on at least one of the first side and the second side, and the second portion of the first external electrode is located from the first end face, across the first face, and across at least one of the first side and the second side, The multilayer ceramic capacitor according to (1) above, wherein the first portion of the second external electrode is located on at least one of the first side surface and the second side surface, and the second portion of the second external electrode is located from the second end face, across the first surface, and across at least one of the first side surface and the second side surface.

[0162] (6) The multilayer ceramic capacitor according to (5) above, wherein the length of the first portion in the longitudinal direction is 0.2 times or more and 0.5 times or less the length of the laminate in the longitudinal direction.

[0163] (7) The laminate has a first corner portion extending from the first end face to the first side surface, a second corner portion extending from the first end face to the second side surface, a third corner portion extending from the second end face to the first side surface, and a fourth corner portion extending from the second end face to the second side surface. The first portion of the first external electrode is located at least one of the first corner and the second corner, and the second portion of the first external electrode is located from the first end face to the first face, and at least one of the first corner and the second corner, The multilayer ceramic capacitor according to (1) above, wherein the first portion of the second external electrode is located at least one of the third and fourth corners, and the second portion of the second external electrode is located from the second end face to the first face, and at least one of the third and fourth corners.

[0164] (8) The multilayer ceramic capacitor according to any one of (1) to (7) above, wherein the first external electrode and the second external electrode each further have a third portion located on the second covering portion which is connected to the first portion, and the length of the third portion along the outer circumference of the laminate is longer than that of the first portion when viewed in the lamination direction.

[0165] (9) The multilayer ceramic capacitor according to (8) above, wherein the third portion is substantially symmetrical with respect to a virtual plane that divides the laminate into two equal parts in the stacking direction.

[0166] (10) The multilayer ceramic capacitor according to any one of (1) to (9) above, wherein the first external electrode and the second external electrode each have a first plating layer located on the laminate and a second plating layer located on the first plating layer.

[0167] (11) The multilayer ceramic capacitor according to any one of (1) to (9) above, wherein the first external electrode and the second external electrode each have a first plating layer located on the laminate, a conductive resin layer located on the first plating layer, and a second plating layer located on the conductive resin layer.

[0168] (12) The multilayer ceramic capacitor according to (10) or (11) above, wherein the first plating layer is an electroless plating layer and the second plating layer is an electrolytic plating layer. [Explanation of symbols]

[0169] 1,1',1A,1A',1B,1B',1C,1C',1D,1D' Multilayer ceramic capacitors 2 Laminate 2a 1st page 2b 2nd side 2c 1st end face 2d 2nd end face 2e 1st side 2f 2nd side 31 1st external electrode 31a Part 1 31b 2nd part 31c 3rd part 32 2nd external electrode 32a Part 1 32b 2nd part 32c 3rd part 4 Capacity part 5. First covering section 6. Second covering section 7. Dielectric layer 8 Internal electrode 81 1st internal electrode 81a First opposing section 81b 1st drawer 81c 1st drawer 82 2nd internal electrode 82a Second opposing section 82b 2nd drawer 82c 2nd drawer 9. Dielectric part 10 Dummy electrodes 11. First dummy electrode 12. Second dummy electrode 13 Anchor electrodes 14. First anchor electrode 15. Second anchor electrode 16 Circuit boards 16a Mounting surface 17 1st substrate electrode 18 2nd substrate electrode 19. First plating layer 20 Second plating layer 21 Conductive resin layer 22 Dielectric part 23 Dummy electrodes 24. Third dummy electrode 25. Fourth dummy electrode 26 Anchor electrodes 27 Third anchor electrode 28. Fourth anchor electrode 40 Ceramic Green Sheets 41 Electrode Patterns 42 Internal electrode sheet 43 Electrode Patterns 44 Auxiliary electrode sheet 45 Mother laminate 46 virtual partition lines 100 Implementation Structures

Claims

1. A laminate comprising a capacitance portion formed by alternately stacking a plurality of dielectric layers and a plurality of internal electrodes, and a first covering portion and a second covering portion located at both ends of the capacitance portion in the stacking direction, wherein the covering portion has a first surface and a second surface facing each other in the stacking direction, a first end surface and a second end surface facing each other in the length direction perpendicular to the stacking direction, and a first side surface and a second side surface facing each other in the width direction perpendicular to the stacking direction and the length direction, the first covering portion includes the first surface, and the second covering portion includes the second surface, A first external electrode and a second external electrode located on the laminate are respectively connected to different internal electrodes among the plurality of internal electrodes, Equipped with, The first external electrode and the second external electrode each have a first portion located on the capacitance portion and a second portion located on the first covering portion and connected to the first portion, wherein the second portion has a longer length along the outer circumference of the laminate than the first portion when viewed from the lamination direction, in a multilayer ceramic capacitor.

2. The first portion of the first external electrode is located on the first end face, and the second portion of the first external electrode is located from the first end face across the first face. The multilayer ceramic capacitor according to claim 1, wherein the first portion of the second external electrode is located on the second end face, and the second portion of the second external electrode is located extending from the second end face to the first face.

3. The first portion of the first external electrode is located on the first end face, and the second portion of the first external electrode is located extending from the first end face across the first face, the first side surface, and the second side surface. The multilayer ceramic capacitor according to claim 1, wherein the first portion of the second external electrode is located on the second end face, and the second portion of the second external electrode is located extending from the second end face across the first face, the first side surface, and the second side surface.

4. The multilayer ceramic capacitor according to claim 3, wherein the length of the first portion in the width direction is 0.3 times or more and 0.7 times or less the length of the laminate in the width direction.

5. The first portion of the first external electrode is located on at least one of the first side surface and the second side surface, and the second portion of the first external electrode is located from the first end face, across the first surface, and across at least one of the first side surface and the second side surface. The multilayer ceramic capacitor according to claim 1, wherein the first portion of the second external electrode is located on at least one of the first side surface and the second side surface, and the second portion of the second external electrode is located from the second end face, across the first surface, and across at least one of the first side surface and the second side surface.

6. The multilayer ceramic capacitor according to claim 5, wherein the length of the first portion in the longitudinal direction is 0.2 times or more and 0.5 times or less the length of the laminate in the longitudinal direction.

7. The laminate has a first corner portion extending from the first end face to the first side surface, a second corner portion extending from the first end face to the second side surface, a third corner portion extending from the second end face to the first side surface, and a fourth corner portion extending from the second end face to the second side surface. The first portion of the first external electrode is located at least one of the first corner and the second corner, and the second portion of the first external electrode is located from the first end face to the first face, and at least one of the first corner and the second corner, The multilayer ceramic capacitor according to claim 1, wherein the first portion of the second external electrode is located at least one of the third and fourth corners, and the second portion of the second external electrode is located from the second end face to the first face, and at least one of the third and fourth corners.

8. The multilayer ceramic capacitor according to any one of claims 1 to 7, wherein the first external electrode and the second external electrode each further have a third portion located on the second covering portion and connected to the first portion, and the length of the third portion along the outer circumference of the laminate is longer than that of the first portion when viewed in the lamination direction.

9. The multilayer ceramic capacitor according to claim 8, wherein the third portion is substantially symmetrical to the second portion with respect to a virtual plane that bisects the laminate in the stacking direction.

10. The multilayer ceramic capacitor according to claim 1, wherein the first external electrode and the second external electrode each have a first plating layer located on the laminate and a second plating layer located on the first plating layer.

11. The multilayer ceramic capacitor according to claim 1, wherein the first external electrode and the second external electrode each have a first plating layer located on the laminate, a conductive resin layer located on the first plating layer, and a second plating layer located on the conductive resin layer.

12. The multilayer ceramic capacitor according to claim 10 or 11, wherein the first plating layer is an electroless plating layer and the second plating layer is an electrolytic plating layer.

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