Wiring board

Abstract

This technology enables low-loss transmission in the high-frequency band. [Solution] The wiring board 10A has a first surface S1 and a second surface S2 which is its back surface, and a pair of grooves G1 arranged in the width direction are provided on the first surface S1, and a plurality of through holes TH are provided at each position of the grooves G1, arranged in the length direction of each groove G1, and the dielectric layer 11 comprises a first conductor portion 12a extending from one groove G1 to the other on the first surface S1, a second conductor portion 12b extending from a position corresponding to one groove G1 to a position corresponding to the other on the second surface S2, and a plurality of columnar conductor portions 12c each provided in the through holes TH, and the first conductor portion 12a, the second conductor portion 12b, the plurality of columnar conductor portions 12c, and the portion of the dielectric layer 11 including the region sandwiched by the pair of grooves G1 constitute a post-wall waveguide.

Description

Technical Field

[0001] The present invention relates to a wiring board.

Background Art

[0002] In recent years, the performance of mobile communication devices has been improving, and there is a demand for further high density and miniaturization in the electronic components and wiring boards used in these devices. At the same time, the required level for high-frequency characteristics is also increasing.

[0003] For the transmission of high-frequency signals, it is desired to have low loss. Therefore, metal waveguides have been used for high-frequency signal transmission lines. However, metal waveguides have large dimensions. Also, when assuming use in a frequency band exceeding 100 GHz, high dimensional accuracy is required for metal waveguides. For example, in the case of a rectangular waveguide, when setting the cut-off frequency assuming use in a frequency band exceeding 100 GHz, it is necessary to control the deviation in width from the design value to be within several tens of μm or less.

[0004] In recent years, there has been a tendency to integrate a plurality of high-frequency components such as antennas, waveguides (transmission lines), and band-pass filters, and the frequency bands used have been increasing. Metal waveguides for high-frequency bands are difficult to manufacture with high dimensional accuracy and are also difficult to embed in a wiring board. Under such circumstances, a post-wall waveguide mimicking the narrow wall of a rectangular waveguide has been proposed (Patent Documents 1 and 2). The post-wall waveguide has a structure in which portions corresponding to the wide walls of a rectangular waveguide are provided on both surfaces of the core substrate of a wiring board, a large number of through holes are provided in the core substrate at positions on both sides of these wide-wall corresponding portions, and the side walls of these through holes are coated with metal.

[0005] In post-wall waveguides, low-loss transmission can be achieved, for example, in frequency bands above millimeter waves, by using low-loss dielectric materials such as quartz or polytetrafluoroethylene for the core substrate. Furthermore, unlike microstrip lines, post-wall waveguides have a substantially closed structure, so there is no spread of electromagnetic fields to the surroundings, and they do not pick up external electromagnetic fields. Therefore, post-wall waveguides are also superior in terms of electromagnetic compatibility (electromagnetic interference and electromagnetic susceptibility). [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2014-158243 [Patent Document 2] International Publication No. 2014 / 126194 [Overview of the project] [Problems that the invention aims to solve]

[0007] The present invention aims to provide a technology that enables low-loss transmission in the high-frequency band. [Means for solving the problem]

[0008] According to one aspect of the present invention, a wiring substrate is provided comprising: a dielectric layer having a first surface and a second surface which is its back surface, wherein a pair of first grooves arranged in the width direction are provided on the first surface, and a plurality of through holes are provided at each position of the pair of first grooves, arranged in the length direction of each of the pair of first grooves; a first conductor portion covering the region of the first surface from one of the pair of first grooves to the other of the pair of first grooves; a second conductor portion covering the region of the second surface from a position corresponding to one of the pair of first grooves to a position corresponding to the other of the pair of first grooves; and a plurality of columnar conductor portions provided in the plurality of through holes, wherein the first conductor portion, the second conductor portion, the plurality of columnar conductor portions, and the portion of the dielectric layer including the region sandwiched by the pair of first grooves constitute a post-wall waveguide.

[0009] According to another aspect of the present invention, a wiring board is provided in which each of the plurality of through holes is tapered in diameter from the second surface to the first surface.

[0010] According to yet another aspect of the present invention, a wiring board is provided relating to any of the above aspects, wherein each of the plurality of through holes has an opening diameter closer to the first surface that is smaller than the width of the bottom of the pair of grooves in which the opening is located.

[0011] According to yet another aspect of the present invention, a wiring board is provided in which each of the plurality of columnar conductor portions is provided integrally with the second conductor portion, according to any of the above aspects.

[0012] According to yet another aspect of the present invention, a wiring board according to any of the above aspects is provided, wherein each of the first conductor portion and the second conductor portion has a multilayer structure.

[0013] According to yet another aspect of the present invention, a wiring board is provided relating to any of the above aspects, wherein the ratio L / T of the length L of each of the plurality of through holes to the thickness T of the dielectric layer is in the range of 0.5 or more and 0.9 or less.

[0014] According to yet another aspect of the present invention, a wiring board is provided relating to any of the above-mentioned sides, wherein the adjacent through holes in the longitudinal direction have a distance between openings furthest from the first surface that is within the range of 30 μm to 110 μm.

[0015] According to yet another aspect of the present invention, a wiring substrate according to any of the above aspects is provided, wherein the dielectric layer has a thickness in the range of 100 μm to 200 μm.

[0016] According to yet another aspect of the present invention, a wiring substrate is provided relating to any of the above aspects, wherein the inner wall of the first groove and the side walls of the plurality of through holes each have an arithmetic mean roughness Ra in the range of 500 nm to 2000 nm.

[0017] According to still another aspect of the present invention, on the second surface, a pair of second grooves are provided respectively at positions corresponding to the pair of first grooves, and each of the plurality of through holes is provided with a wiring board related to any one of the side surfaces extending from the bottom of one of the pair of first grooves to the bottom of one of the pair of second grooves.

[0018] According to still another aspect of the present invention, there is provided a wireless module including a wiring board related to any one of the side surfaces and a semiconductor device mounted on the wiring board for transmitting or receiving electromagnetic waves through the post wall waveguide.

Effect of the Invention

[0019] According to the present invention, there is provided a technology that enables low-loss transmission in a high-frequency band.

Brief Description of the Drawings

[0020] [Figure 1] FIG. 1 is a top view of a wiring board according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a cross-sectional view taken along line II-II of the wiring board shown in FIG. 1. [Figure 3] FIG. 3 is a cross-sectional view showing a first step in the manufacture of the wiring board shown in FIGS. 1 and 2. [Figure 4] FIG. 4 is a cross-sectional view showing a second step in the manufacture of the wiring board shown in FIGS. 1 and 2. [Figure 5] FIG. 5 is a cross-sectional view showing a third step in the manufacture of the wiring board shown in FIGS. 1 and 2. [Figure 6] FIG. 6 is a cross-sectional view showing a fourth step in the manufacture of the wiring board shown in FIGS. 1 and 2. [Figure 7] FIG. 7 is a cross-sectional view showing a fifth step in the manufacture of the wiring board shown in FIGS. 1 and 2. [Figure 8] FIG. 8 is a cross-sectional view showing a sixth step in the manufacture of the wiring board shown in FIGS. 1 and 2. [Figure 9] FIG. 9 is a cross-sectional view showing a seventh step in the manufacture of the wiring board shown in FIGS. 1 and 2. [Figure 10] Figure 10 is a cross-sectional view showing the eighth step in the manufacturing process of the wiring board shown in Figures 1 and 2. [Figure 11] Figure 11 is a cross-sectional view showing the ninth step in the manufacturing process of the wiring board shown in Figures 1 and 2. [Figure 12] Figure 12 is a cross-sectional view showing the 10th step in the manufacturing process of the wiring board shown in Figures 1 and 2. [Figure 13] Figure 13 is a cross-sectional view showing an example of a wireless module including the wiring board shown in Figures 1 and 2. [Figure 14] Figure 14 is a top view of a wiring board relating to a comparative example. [Figure 15] Figure 15 is a cross-sectional view of the wiring board shown in Figure 14 along the line XV-XV. [Figure 16] Figure 16 is a cross-sectional view of a wiring board according to a second embodiment of the present invention. [Figure 17] Figure 17 is a cross-sectional view of a wiring board according to the first modified example. [Figure 18] Figure 18 is a cross-sectional view of a wireless module according to a second modified example. [Figure 19] Figure 19 is a cross-sectional view of a wireless module according to the third modified example. [Figure 20] Figure 20 is a top view of the wireless module according to the fourth modified example. [Figure 21] Figure 21 is a top view of the post-wall waveguide used in the computer simulation performed in the embodiment of the present invention. [Figure 22] Figure 22 is a graph showing the frequency dependence of signal intensity obtained by performing computer simulations on the wiring boards related to Comparative Examples 1 and 2 and the Reference Example. [Figure 23] Figure 23 is a graph showing the frequency dependence of signal intensity obtained by performing computer simulations for the wiring boards according to Comparative Examples 1 and 2 and the embodiment. [Modes for carrying out the invention]

[0021] Embodiments of the present invention will be described below with reference to the drawings. The embodiments described below are more specific to any of the above aspects. The matters described below can be incorporated into each of the above aspects, individually or in combination.

[0022] The embodiments described below illustrate examples that embody the technical concept of the present invention, and the technical concept of the present invention is not limited to the materials, shapes, structures, and arrangements of the components described below. Various modifications can be made to the technical concept of the present invention within the technical scope defined by the claims described in the patent claims.

[0023] In the drawings referenced in the following description, components with similar or identical functions are given the same reference numerals. It should be noted that the drawings are schematic, and the relationships between dimensions in the thickness direction and dimensions perpendicular to the thickness direction (i.e., in-plane direction), as well as the relationships between dimensions in the thickness direction of multiple layers, may differ from reality. Therefore, specific dimensions should be determined by referring to the following description. It should also be noted that the dimensional relationships between two or more components may differ across multiple drawings.

[0024] In this disclosure, "upper surface" and "lower surface" refer to the two main surfaces of the plate-like member or the layer contained therein, namely the surface perpendicular to the thickness direction and having the largest area, and the back surface thereof, which are shown at the top and bottom in the drawings, respectively. Furthermore, "end surface" refers to the surface of the plate-like member or the layer contained therein that is located on the outer periphery when viewed from a direction parallel to the thickness direction. And "side surface" refers to a surface that is perpendicular to or inclined with respect to the in-plane direction.

[0025] Furthermore, in this disclosure, the phrase "AA on BB" is used independently of the direction of gravity. The state specified by the phrase "AA on BB" includes the state in which AA is in contact with BB. The phrase "AA on BB" does not exclude the presence of one or more other components between AA and BB.

[0026] <1> First Embodiment <1.1> Wiring board Figure 1 is a top view of a wiring board according to the first embodiment of the present invention. Figure 2 is a cross-sectional view of the wiring board shown in Figure 1 along the line II-II.

[0027] The wiring board 10A shown in Figures 1 and 2 is an interposer with a built-in post-wall waveguide. The wiring board 10A includes a dielectric layer 11, a first conductor pattern 12A, and a second conductor pattern 12B.

[0028] The dielectric layer 11 is, in this case, a dielectric substrate. The dielectric layer 11 has a first surface S1 and a second surface S2 which is its back surface. In Figures 1 and 2 and other figures, the X and Y directions are parallel to the first surface S1 and are perpendicular to each other. The Z direction is perpendicular to the X and Y directions, i.e., the thickness direction of the dielectric layer 11.

[0029] The dielectric layer 11 has electrical insulating properties. Preferably, the dielectric layer 11 is made of a material having a coefficient of thermal expansion close to that of silicon. As such materials, inorganic materials such as glass and glass ceramics can be used. For example, the material of the dielectric layer 11 has a thermal expansion coefficient of 70 × 10⁻¹⁰ at any frequency in the frequency band above 1 GHz. -4 The following loss factor (tanδ) is present, and at any frequency in the frequency band below 40 GHz, it is 50 × 10⁻¹⁰. -4 The following loss coefficient (tanδ) is observed. The dielectric layer 11 may have a single-layer structure or a multilayer structure.

[0030] The dielectric layer 11 preferably has a thickness T within the range of 100 μm to 500 μm, and more preferably within the range of 100 μm to 200 μm.

[0031] A pair of first grooves, groove G1, are provided on the first surface S1 of the dielectric layer 11, arranged in the width direction. The longitudinal directions of the grooves G1 are parallel to each other. Here, each groove G1 extends in the Y direction and is arranged in the X direction. Also, here, the orthogonal projection of each groove G1 onto a plane perpendicular to the Z direction is linear. The orthogonal projection of the grooves G1 onto a plane perpendicular to the Z direction may be curved. That is, the post-wall waveguide described later may have a shape that extends in one direction, or it may be curved.

[0032] The distance between the centers of groove G1 is approximately equal to the distance between the centers of the two rows formed by the through holes TH, which will be described later.

[0033] The width W of each groove G1 is constant along the depth direction of the groove G1. The width W may vary along the depth direction of the groove G1. For example, the width W may decrease from the first surface S1 to the second surface S2.

[0034] Each groove G1 preferably has an opening width WT1 of 85 μm or more, and more preferably 90 μm or more. Each of the through holes TH, described later, preferably has an opening diameter R1 closer to the first surface S1 that is smaller than the width WB1 of the bottom of the groove G1 in which the opening is located. If the width WT1 is reduced, the diameter R1 must also be reduced to satisfy this relationship.

[0035] The width WT1 is preferably 100 μm or less, and more preferably 95 μm or less. Increasing the width WT1 reduces the strength of the wiring board 10A.

[0036] The ratio of width WB1 to width WT1, WB1 / WT1, is preferably 0.8 or more and 1 or less, and more preferably 0.95 or more and 1 or less.

[0037] The depth D of the groove G1 is preferably 20 μm or more, and more preferably 40 μm or more. Increasing the depth D reduces losses in the high-frequency band.

[0038] The depth D is preferably 80 μm or less, and more preferably 60 μm or less. Increasing the depth D reduces the strength of the wiring board 10A.

[0039] The dielectric layer 11 is provided with multiple through-holes TH arranged in the longitudinal direction of each groove G1 at each position of the groove G1. These through-holes TH are arranged in a line along the longitudinal direction of the groove G1 at each position of the groove G1. The through-holes TH are sometimes referred to as first through-holes.

[0040] The distance Lx between rows formed by through-holes TH is greater than the thickness T of the dielectric layer 11. In this case, the cutoff frequency of the post-wall waveguide, as described later, changes depending on the distance Lx. For example, when considering use in a frequency band of 100 GHz to 300 GHz, the distance Lx is preferably in the range of 0.7 mm to 1.0 mm, and more preferably in the range of 0.8 mm to 0.9 mm.

[0041] The distance Lx between rows formed by the through-holes TH may be equal to the thickness T of the dielectric layer 11, or it may be smaller than the thickness T of the dielectric layer 11. When the distance Lx is smaller than the thickness T, the cutoff frequency of the post-wall waveguide, described later, changes according to the thickness T.

[0042] Adjacent through-holes TH in the longitudinal direction of groove G1 are spaced apart from each other. The distance between the centers of these adjacent through-holes TH in the longitudinal direction is preferably in the range of 130 μm to 175 μm, and more preferably in the range of 150 μm to 170 μm. Furthermore, the distance between the openings furthest from the first surface S1 of adjacent through-holes TH in the longitudinal direction is preferably in the range of 30 μm to 110 μm, and more preferably in the range of 65 μm to 95 μm. Reducing these distances reduces transmission loss. However, if these distances are reduced excessively, the strength of the wiring board 10A may decrease.

[0043] For each through-hole TH, the diameter R2 of the opening furthest from the first surface S1 is preferably in the range of 65 μm to 100 μm, and more preferably in the range of 75 μm to 85 μm.

[0044] The diameter of each through-hole TH changes along its length, i.e., the Z-direction. Here, each through-hole TH decreases in diameter from the second surface S2 to the first surface S1. The diameter of each through-hole TH may also be constant along its length. As will be described later, through-holes TH can be formed, for example, by forming a modified portion by laser beam irradiation of a flat dielectric layer and removing the modified portion by etching. Alternatively, through-holes TH can be formed by electrical discharge machining of a flat dielectric layer. Alternatively, through-holes TH can be formed by a combination of the above-described processes. According to these methods, for example, through-holes TH that decrease in diameter from the second surface S2 to the first surface S1, or through-holes TH with a constant diameter along their length can be formed.

[0045] For each through-hole TH, the ratio R1 / R2 of the diameter of the opening closer to the first surface S1 to the diameter of the opening further away from the first surface S1 is preferably 0.5 or more and 1 or less, and more preferably 0.65 or more and 1 or less.

[0046] For each through-hole TH, it is preferable that the diameter R1 of the opening closer to the first surface S1 is smaller than the width WB2 of the bottom of the groove G1 where the earlier opening is located. When the groove G1, the first conductor layer 121A (described later), and the through-hole TH are formed in this order, and etching is used to form the through-hole TH, if the diameter R1 is smaller than the width WB2, the first conductor layer 121A can be used as an etching stopper film. The ratio R1 / WB2 of diameter R1 to width WB2 is preferably 0.45 or more and less than 1, and more preferably 0.5 or more and 0.8 or less.

[0047] The ratio L / T between the length L of each through-hole TH, i.e., the dimension in the Z direction, and the thickness T of the dielectric layer 11, is preferably in the range of 0.5 to 0.9, and more preferably in the range of 0.7 to 0.8. A smaller ratio L / T results in lower losses in the high-frequency band. However, a smaller ratio L / T reduces the strength of the wiring board 10A.

[0048] The inner wall of groove G1 and the side wall of through hole TH each preferably have an arithmetic mean roughness Ra within the range of 500 nm to 2000 nm as defined in JIS B0601 (2001), and more preferably within the range of 300 nm to 1200 nm. Reducing the arithmetic mean roughness Ra reduces transmission loss. Reducing the arithmetic mean roughness Ra may decrease productivity.

[0049] The dielectric layer 11 is further provided with a second through-hole (not shown). The second through-hole is used for the electrical connection of the wiring section 12d and wiring section 12e, which will be described later.

[0050] The first surface S1 of the dielectric layer 11 may have recesses at the positions of the second through holes. These recesses can be formed, for example, in the process of forming the groove G1. Recesses formed in this manner may have a depth approximately equal to the depth D of the groove G1.

[0051] The first conductor pattern 12A includes a first conductor layer 121A and a second conductor layer 122A. The first conductor layer 121A partially covers the first surface S1 and also covers the inner surface of the groove G1. The second conductor layer 122A is provided on top of the first conductor layer 121A.

[0052] The first conductor layer 121A is, for example, a seed layer. Preferably, the material for the first conductor layer 121A is, for example, chromium, nickel, or a nickel-chromium alloy. These materials have high resistance to etching solutions containing hydrofluoric acid. The thickness of the first conductor layer 121A is, for example, in the range of 100 nm to 500 nm.

[0053] The second conductor layer 122A is a plating layer having a greater thickness than the first conductor layer 121A. For example, chromium, molybdenum, titanium, or copper can be used as the material for the second conductor layer 122A. The thickness of the second conductor layer 122A is, for example, within the range of 2 μm to 15 μm.

[0054] Here, the first conductor pattern 12A has a multilayer structure including a first conductor layer 121A and a second conductor layer 122A, but the first conductor pattern 12A may have a single-layer structure. Furthermore, the first conductor pattern 12A may further include one or more other layers, such as an adhesion layer.

[0055] The first conductor pattern 12A includes a first conductor section 12a and a wiring section 12d.

[0056] The first conductor portion 12a covers the region of the first surface S1 from one groove G1 to the other groove G1. Here, the first conductor portion 12a includes a portion that covers the two side walls and bottom surface of one groove G1, a portion that covers the two side walls and bottom surface of the other groove G1, a portion that covers the region of the first surface S1 sandwiched between the grooves G1, and a portion that covers the region adjacent to this region with the grooves G1 in between. The portion of the first conductor portion 12a that covers the region sandwiched between the grooves G1 corresponds to one of the wide walls of the rectangular waveguide.

[0057] The wiring section 12d includes wiring, lands, and pads. The lands are located at the position of the second through-hole. Each of the wirings has one end connected to a land and the other end connected to a pad.

[0058] The second conductor pattern 12B includes a first conductor layer 121B and a second conductor layer 122B. The first conductor layer 121B partially covers the second surface S2 and covers the first through-hole TH and the side walls of the second through-hole. The second conductor layer 122B is provided on top of the first conductor layer 121B.

[0059] The materials for the first conductor layer 121B and the second conductor layer 122B can be those exemplified for the first conductor layer 121A and the second conductor layer 122A, respectively. The thicknesses of the first conductor layer 121B and the second conductor layer 122B can be within the ranges described above for the first conductor layer 121A and the second conductor layer 122A, respectively.

[0060] Here, the second conductor pattern 12B has a multilayer structure including the first conductor layer 121B and the second conductor layer 122B, but the second conductor pattern 12B may have a single-layer structure. Furthermore, the second conductor pattern 12B may further include one or more other layers, such as an adhesion layer.

[0061] The second conductor pattern 12B includes a second conductor section 12b, a columnar conductor section 12c, and a wiring section 12e.

[0062] The second conductor portion 12b covers the region of the second surface S2 from a position corresponding to one groove G1 to a position corresponding to the other groove G1. In this context, the second conductor portion 12b corresponds to the other broad wall of the rectangular waveguide.

[0063] The wiring section 12e includes wiring, lands, and pads. The lands are located at the position of the second through-hole. Each of the wirings has one end connected to a land and the other end connected to a pad.

[0064] The columnar conductor portion 12c is provided within the through-hole of the dielectric layer 11. A portion of the columnar conductor portion 12c is provided within the first through-hole, which is the through-hole TH. These columnar conductor portions 12c are provided integrally with the second conductor portion 12b. The remainder of the columnar conductor portion 12c is provided within the second through-hole. Each of the columnar conductor portions 12c covers the side wall of the first or second through-hole. Here, each of the columnar conductor portions 12c further covers the lower surface of the first conductor layer 121A within the first or second through-hole. Each of the columnar conductor portions 12c may be provided so as to completely fill the through-hole.

[0065] The portion of the columnar conductor section 12c located within the through-hole TH and the portion of the first conductor section 12a located within the groove G1 constitute a pair of narrow walls of the rectangular waveguide. The portion of the columnar conductor section 12c located within the second through-hole constitutes a through-electrode that electrically connects the land of the wiring section 12d and the land of the wiring section 12e.

[0066] In the wiring board 10A, the first conductor portion 12a, the second conductor portion 12b, the columnar conductor portion 12c provided within the through hole TH, and the portion of the dielectric layer 11 including the region sandwiched between the pair of grooves G1 constitute a post-wall waveguide. The portion of the dielectric layer 11 including the region sandwiched between the pair of grooves G1 is the portion of the dielectric layer 11 consisting of the region sandwiched between the pair of grooves G1 and the region below it.

[0067] <1.2> Manufacturing method of a wiring board The above-mentioned wiring board 10A can be manufactured, for example, by the following method. Figures 3 to 12 are cross-sectional views showing the manufacturing method of the wiring board shown in Figures 1 and 2.

[0068] In this method, first, a dielectric layer 11 as shown in Figure 3 is prepared. The dielectric layer 11 prepared here is a dielectric plate with smooth surfaces on both sides. Also, as will be described later, first, a composite substrate is manufactured, and this composite substrate is then divided into multiple wiring boards 10A. Therefore, the dimensions of the dielectric layer 11 prepared here are slightly larger than the dimensions of the composite formed by arranging multiple wiring boards 10A. Note that when the thickness of the dielectric layer 11 is reduced by etching, as will be described later, the dielectric layer 11 prepared has a greater thickness than the dielectric layer 11 on the wiring board 10A.

[0069] Next, as shown in Figure 4, the dielectric layer 11 is supported on the support 17B via the release layer 18B on its second surface S2 side. The dielectric layer 11 is supported on the support 17B in such a way that it can be removed from the dielectric layer 11.

[0070] The support 17B makes it difficult to damage the dielectric layer 11 and facilitates its handling. The support 17B may have a single-layer structure or a multi-layer structure. Since light may be irradiated through the support 17B to the release layer 18B, it is advantageous for the support 17B to be translucent. For example, a glass plate can be used as the support 17B.

[0071] The release layer 18B can be any material that enables the support 17B to support the dielectric layer 11 in a peelable manner. For example, the release layer 18B may be a resin that generates heat or changes in quality upon absorbing light such as ultraviolet light, making it peelable, or a resin that foams up due to heat, making it peelable. The release layer 18B may have a single-layer structure or a multi-layer structure. The release layer 18B may also be omitted. In this case, for example, hydrogen bonding may be used to support the dielectric layer 11 on the support 17B.

[0072] Next, a laser beam is irradiated from the first surface S1 side to the region of the dielectric layer 11 where the groove G1 is to be formed. This creates a modified portion 11D1 in the laser beam-irradiated portion of the dielectric layer 11. The modified portion 11D1 is a portion that has been heated by the laser beam irradiation and has a difference in crystallinity, etc., between it and the unirradiated portion of the laser beam. For this laser beam irradiation, for example, a CO2 laser, a machine vision laser, a picosecond laser, or a femtosecond laser can be used.

[0073] Next, the modified portion 11D1 is removed from the dielectric layer 11. This forms a groove G1 on the first surface S1 of the dielectric layer 11, as shown in Figure 5. For example, etching can be used to remove the modified portion 11D1. If the dielectric layer 11 is made of glass, an etching solution containing hydrofluoric acid can be used for this etching. Because the etching rate by hydrofluoric acid etching is very high in the modified portion 11D1, the glass is preferentially removed in the modified portion 11D1 compared to the unmodified portion which is the unirradiated area of ​​the laser beam. As a result, a groove G1 is formed at the location of the modified portion 11D1. Note that etching also proceeds in the unmodified portion, although the etching rate is small. Therefore, when this etching is performed, the first surface S1 recedes, and the thickness of the dielectric layer 11 decreases.

[0074] Next, as shown in Figure 6, a first conductor layer 121A is formed. The first conductor layer 121A is formed to cover the entire first surface S1 and the entire side walls and bottom surface of the groove G1. The first conductor layer 121A can be formed, for example, by sputtering or electroless plating.

[0075] Next, as shown in Figure 7, the dielectric layer 11 is supported on the support 17A with the first conductor layer 121A and the release layer 18A sandwiched between them on its first surface S1 side. For example, the support 17A and the release layer 18A can be the same as those exemplified for support 17B and release layer 18B, respectively.

[0076] Next, as shown in Figure 8, the support 17B and the release layer 18B are removed from the dielectric layer 11. If a portion of the release layer 18B remains attached to the dielectric layer 11 as residue, the residue is removed by, for example, laser ablation, chemical cleaning, or ultrasonic cleaning. Subsequently, a laser beam is irradiated from the second surface S2 side to the region of the dielectric layer 11 where the through-holes TH are to be formed. This creates a modified portion 11D2 in the laser beam irradiated portion of the dielectric layer 11. The modified portion 11D2 is a portion that has been heated by the laser beam irradiation and has a difference in crystallinity, etc., between it and the unirradiated portion of the laser beam. For this laser beam irradiation, for example, the laser exemplified for the formation of the modified portion 11D1 can be used.

[0077] Next, the modified portion 11D2 is removed from the dielectric layer 11. This creates through holes TH in the dielectric layer 11, as shown in Figure 9. For removing the modified portion 11D2, for example, the method exemplified for removing the modified portion 11D1 can be used. Here as well, as the removal of the modified portion 11D2 causes the second surface S2 to recede, which may reduce the thickness of the dielectric layer 11.

[0078] Next, as shown in Figure 10, the first conductor layer 121B is formed. The first conductor layer 121B is formed to cover the entire second surface S2 and the entire side wall of the through hole TH. The first conductor layer 121B can be formed, for example, by the method exemplified for the first conductor layer 121A.

[0079] Next, as shown in Figure 11, the support 17A and the release layer 18A are removed from the dielectric layer 11, and a resist pattern 19 is formed on the first conductor layers 121A and 121B. The resist pattern 19 on the first conductor layer 121A is formed to open at the position of the first conductor pattern 12A, and the resist pattern 19 on the first conductor layer 121B is formed to open at the position of the second conductor pattern 12B. Subsequently, electroplating is performed using the first conductor layers 121A and 121B as power supply layers to form the second conductor layers 122A and 122B, respectively, on the exposed portions of the first conductor layers 121A and 121B.

[0080] Next, as shown in Figure 12, the resist pattern 19 is removed. Subsequently, etching is performed using the second conductor layers 122A and 122B as etching masks to remove the exposed portions of the first conductor layers 121A and 121B. In this way, the wiring board 10A described with reference to Figures 1 and 2 is obtained.

[0081] Although a manufacturing method using the semi-additive process is illustrated here, the wiring board 10A can also be manufactured using other methods, such as the subtractive process. Furthermore, while a method for forming grooves G1 and through holes TH in the dielectric layer 11 is illustrated here by forming modified areas by laser beam irradiation and removing the modified areas by etching, other methods such as electrical discharge machining can also be used on the dielectric layer.

[0082] <1.3> Wireless module The above-described wiring board 10A can be used, for example, in a wireless module.

[0083] Figure 13 is a cross-sectional view showing an example of a wireless module including the wiring board shown in Figures 1 and 2.

[0084] The wireless module 1A shown in Figure 13 includes a wiring board 10A, which was described with reference to Figures 1 and 2, and a semiconductor device 20.

[0085] The wiring board 10A further includes an insulating layer 13 and a bonding conductor 14 provided on both sides thereof. The insulating layer 13 is, for example, a solder resist layer. The insulating layer 13 located on the upper side has multiple openings at the positions of the pads included in the wiring section 12d. The insulating layer 13 located on the lower side has multiple openings at the positions of the pads included in the wiring section 12e. The bonding conductor is, for example, a solder bump and is provided on the pads at the positions of these openings.

[0086] The semiconductor device 20 is a semiconductor chip flip-chip mounted on the wiring board 10A. The semiconductor device 20 transmits and receives electromagnetic waves at least one of the following: via a post-wall waveguide built into the wiring board 10A.

[0087] The wireless module 1A is configured to transmit and receive electromagnetic waves at least on the end face of the wiring board 10A. The wireless module 1A may also be configured to transmit and receive electromagnetic waves at least on the upper or lower surface of the wiring board 10A. Furthermore, the wireless module 1A may further include one or more other elements such as microstrip lines and antennas.

[0088] <1.4> Effect The post-wall waveguide included in the above-mentioned wiring board 10A enables low-loss transmission in the high-frequency band. This will be explained below.

[0089] Figure 14 is a top view of a wiring board relating to a comparative example. Figure 15 is a cross-sectional view of the wiring board shown in Figure 14 along the line XV-XV.

[0090] The wiring board 10X shown in Figures 14 and 15 is the same as the wiring board 10A described with reference to Figures 1 and 2, except for the following point. That is, in the wiring board 10X, the groove G1 is omitted, and accordingly, the length of the through hole TH and the height of the columnar conductor portion 12c are made equal to the thickness T of the dielectric layer 11.

[0091] In the wiring board 10X, the first conductor section 12a, the second conductor section 12b, and the columnar conductor section 12c provided in the through-hole TH constitute a post-wall waveguide similar to a rectangular waveguide, and the row of columnar conductor sections 12c aligned in the Y direction corresponds to the narrow wall of a rectangular waveguide. While a rectangular waveguide is composed of a continuous layer of conductors for its narrow wall, the post-wall waveguide included in the wiring board 10X has a portion corresponding to the narrow wall composed of multiple columnar conductor sections 12c spaced apart from each other. Thus, the post-wall waveguide included in the wiring board 10X has multiple gaps in the portion corresponding to the narrow wall. These gaps cause electromagnetic wave leakage, and therefore increase transmission loss, especially transmission loss in the high-frequency band.

[0092] In the wiring board 10A described with reference to Figures 1 and 2, the portion corresponding to the narrow wall of the rectangular waveguide is composed of a columnar conductor portion 12c provided in the through-hole TH and a portion of the first conductor portion 12a located within the groove G1. The portion of the first conductor portion 12a located within the groove G1 reduces the area of ​​the gap in the portion corresponding to the narrow wall. Therefore, when the above-described structure is adopted for the wiring board 10A, transmission with lower loss in the high-frequency band becomes possible compared to when the above-described structure is adopted for the wiring board 10X.

[0093] Furthermore, if each of the through-holes TH decreases in diameter from the second surface S2 to the first surface S1, in the wiring board 10X, even if the distance between the through-holes TH on the second surface S2 side is shortened, the distance between the through-holes TH on the first surface S1 side is not sufficiently shortened. In contrast, in the wiring board 10A, since the length of the through-holes TH is shorter, if the distance between the through-holes TH on the second surface S2 side is shortened, the distance between the through-holes TH on the first surface S1 side can also be sufficiently shortened. Therefore, if each of the through-holes TH decreases in diameter from the second surface S2 to the first surface S1, the structure described with reference to the wiring board 10A is advantageous in this respect as well in reducing the area of ​​the gap in the narrow wall portion.

[0094] <2> Second Embodiment Figure 16 is a cross-sectional view of a wiring board according to a second embodiment of the present invention.

[0095] The wiring board 10B shown in Figure 16 is the same as the wiring board 10A described with reference to Figures 1 and 2, except for the following points. That is, in the wiring board 10B, a pair of second grooves G2 are provided on the second surface S2 of the dielectric layer 11 at positions corresponding to groove G1. Each of the through holes TH provided at the positions of groove G1 extends from one bottom of groove G1 to one bottom of groove G2. The second conductor portion 12b includes a portion that covers the two side walls and bottom surface of one groove G2, a portion that covers the region of the second surface S2 sandwiched between grooves G2, and a portion that covers the region adjacent to this region with groove G2 in between.

[0096] The wiring board 10B provides the same effects as the wiring board 10A described above. Furthermore, because the wiring board 10B has a similar structure on its top and bottom sides, it is less prone to warping due to heat compared to the wiring board 10A.

[0097] <3> Variation The aforementioned wiring board and wireless module can be modified in various ways.

[0098] Figure 17 is a cross-sectional view of a wiring board according to the first modified example. The wiring board 10C shown in Figure 17 is the same as the wiring board 10A described with reference to Figures 1 and 2, except that the first conductor layers 121A and 121B are continuous at the bottom of the groove G1, and the second conductor layers 122A and 122B are continuous. The wiring board 10C can be manufactured by the same method as described above for the wiring board 10A, except that the first conductor layers 121A and 121B are formed after the groove G1 and through hole TH are formed, and then the second conductor layers 122A and 122B are formed. The wiring board 10C also provides the same effects as described above for the wiring board 10A.

[0099] Figure 18 is a cross-sectional view of a wireless module according to a second modified example. The wiring board 10D shown in Figure 18 is the same as the wiring board 10A described with reference to Figures 1 and 2, except for the following points. That is, the wiring board 10D further includes insulating layers 13A and 13B and conductor patterns 12C and 12D. In addition, each of the wiring sections included in the first conductor pattern 12A and the second conductor pattern 12B includes wiring and lands.

[0100] The insulating layer 13A is provided between the upper insulating layer 13 and the dielectric layer 11, and covers the first conductor pattern 12A. The insulating layer 13A has through holes at the locations of the lands connected to one end of the wiring portion included in the first conductor pattern 12A.

[0101] The conductor pattern 12C is interposed between the insulating layer 13A and the upper insulating layer 13. The conductor pattern 12C includes a first conductor layer 121C and a second conductor layer 122C. The first conductor layer 121C partially covers the upper surface of the insulating layer 13A, covers the side walls of the through holes provided in the insulating layer 13A, and covers the upper surface of the second conductor layer 122A at the locations of these through holes. The second conductor layer 122C is provided on top of the first conductor layer 121C.

[0102] The materials for the first conductor layer 121C and the second conductor layer 122C can be those exemplified for the first conductor layer 121A and the second conductor layer 122A, respectively. The thicknesses of the first conductor layer 121C and the second conductor layer 122C can be within the ranges described above for the first conductor layer 121A and the second conductor layer 122A, respectively.

[0103] Here, the conductor pattern 12C has a multilayer structure including a first conductor layer 121C and a second conductor layer 122C, but the conductor pattern 12C may also have a single-layer structure. Furthermore, the conductor pattern 12C may further include one or more other layers, such as an adhesion layer.

[0104] The conductor pattern 12C includes wiring, lands, and pads. Each of these pads is located at an opening in the upper insulating layer 13 and is connected to one end of the wiring. Each of the lands included in the conductor pattern 12C is connected to the other end of the wiring and is located at an opening in the insulating layer 13A and is electrically connected to the lands included in the first conductor pattern 12A. The semiconductor device 20 is bonded to the pads of the conductor pattern 12C via the bonding conductor 14.

[0105] The insulating layer 13B is provided between the lower insulating layer 13 and the dielectric layer 11, and covers the second conductor pattern 12B. The insulating layer 13B has through holes at the locations of the lands connected to one end of the wiring portion included in the second conductor pattern 12B.

[0106] The conductor pattern 12D is interposed between the insulating layer 13B and the underlying insulating layer 13. The conductor pattern 12D includes a first conductor layer 121D and a second conductor layer 122D. The first conductor layer 121D partially covers the lower surface of the insulating layer 13B, covers the side walls of the through holes provided in the insulating layer 13B, and covers the lower surface of the second conductor layer 122B at the locations of these through holes. The second conductor layer 122D is provided on top of the first conductor layer 121D.

[0107] The materials for the first conductor layer 121D and the second conductor layer 122D can be those exemplified for the first conductor layer 121A and the second conductor layer 122A, respectively. The thicknesses of the first conductor layer 121D and the second conductor layer 122D can be within the ranges described above for the first conductor layer 121A and the second conductor layer 122A, respectively.

[0108] Here, the conductor pattern 12D has a multilayer structure including a first conductor layer 121D and a second conductor layer 122D, but the conductor pattern 12D may also have a single-layer structure. Furthermore, the conductor pattern 12D may further include one or more other layers, such as an adhesion layer.

[0109] Conductor pattern 12D includes wiring, lands, and pads. Each of these pads is located at an opening in the lower insulating layer 13 and is connected to one end of the wiring. Each of the lands included in conductor pattern 12D is connected to the other end of the wiring and is located at an opening in the insulating layer 13B and is electrically connected to the lands included in the second conductor pattern 12B. The lower joining conductor 14 is located on the pads of conductor pattern 12C.

[0110] The wiring board 10D also produces the same effects as the wiring board 10A described above. Furthermore, the wiring board 10D employs a multilayer wiring structure in which multiple conductor patterns are stacked above and below the dielectric layer 11, with an insulating layer in between. By adopting such a structure, it becomes easy to increase the difference between, for example, the pitch of the lower connecting conductor 14 and the pitch of the upper connecting conductor 14.

[0111] Furthermore, the number of conductor patterns included in the multilayer wiring structure may be three or more. Alternatively, the multilayer wiring structure may be employed only above or below the dielectric layer 11, while a single-layer wiring structure is employed on the other side.

[0112] Figure 19 is a cross-sectional view of a wireless module according to the third modified example.

[0113] The wireless module 1E shown in Figure 19 is the same as the wireless module 1A described with reference to Figure 13, except for the following point. That is, the wireless module 1E includes a wiring board 10E instead of the wiring board 10A. The wiring board 10E is the same as the wiring board 10A included in the wireless module 1A in Figure 13, except that it does not include an insulating layer 13 and a bonding conductor 14 above the dielectric layer 11.

[0114] The wireless module 1E further includes an adhesive layer 15 and bonding wires 16. The semiconductor device 20 is fixed to the wiring board 10E via the adhesive layer 15 and is electrically connected to the wiring section 12d via the bonding wires 16. In other words, the wireless module 1E employs a configuration in which the semiconductor device 20 is mounted by wire bonding instead of flip-chip mounting.

[0115] The wiring board 10E also produces the same effect as the wiring board 10A described above. Thus, the semiconductor device 20 may be mounted to the wiring board by flip-chip bonding or by wire bonding.

[0116] Figure 20 is a top view of the wireless module according to the fourth modified example.

[0117] The wireless module 1F shown in Figure 20 is the same as the wireless module 1E described with reference to Figure 19, except for the following point. That is, the wireless module 1F includes a wiring board 10F instead of a wiring board 10E. The wiring board 10F includes two post-wall waveguides, and is the same as the wiring board 10E in Figure 19, except that one of the narrow wall equivalents in one post-wall waveguide is used as one of the narrow wall equivalents in the other post-wall waveguide. In the wireless module 1F, for example, one post-wall waveguide is used for transmitting electromagnetic waves, and the other post-wall waveguide is used for receiving electromagnetic waves.

[0118] The wiring board 10F also produces the same effect as the wiring board 10E described above. Thus, the wiring board can include multiple post-wall waveguides. In this case, one post-wall waveguide and another post-wall waveguide may share a portion corresponding to the narrow wall of the rectangular waveguide.

[0119] Further modifications are possible for the wiring boards and wireless modules. For example, instead of using a configuration in which the semiconductor device 20 is mounted by wire bonding, the wiring board 10F and wireless module 1F may use a configuration in which the semiconductor device 20 is mounted by flip-chip bonding. Also, the wiring boards 10B and 10C to 10F may employ a multilayer wiring structure above and below the dielectric layer 11. Furthermore, the wiring boards 10A to 10D may employ a structure that includes multiple post-wall waveguides, in which case, similar to the wiring board 10F, a configuration may be adopted in which one post-wall waveguide and another post-wall waveguide share a portion corresponding to the narrow wall of a rectangular waveguide.

[0120] The semiconductor device 20 may be mounted on the back surface of the wiring board instead of the surface having the groove G1. Furthermore, the groove G2, as described with reference to Figure 16, can also be provided in the dielectric layer 11 of the wiring boards 10C to 10F.

[0121] The wireless module may further include a sealing resin layer. The sealing resin layer is, for example, at least one of an underfill layer and a molded resin layer. [Examples]

[0122] The following describes the computer simulations performed in connection with the present invention.

[0123] (Examples) The transmission characteristics of the post-wall waveguide included in the wiring board according to an embodiment of the present invention were determined by computer simulation. ANSYS HFSS (ver. 2024) was used for this computer simulation. The analysis frequency ranged from 10 GHz to 300 GHz. This computer simulation was performed on the post-wall waveguide shown in Figure 21.

[0124] Figure 21 is a top view of the post-wall waveguide used in the computer simulation performed in the embodiment of the present invention. The post-wall waveguide shown in Figure 21 has a structure similar to the post-wall waveguide of the wiring board 10A described with reference to Figures 1 and 2.

[0125] Here, the dielectric layer 11 is made of alkali glass (relative permittivity 5.3, relative permittivity loss tangent 0.004) and has a thickness of 0.2 mm. The first conductor layers 121A and 121B are each made of chromium and have a total thickness of 350 nm. The second conductor layers 122A and 122B are each made of copper and have a total thickness of 15 μm.

[0126] The groove G1 was assumed to have a rectangular cross-section perpendicular to its length. The length of the groove G1 was assumed to be 4 mm, the depth of the groove G1 was assumed to be 50 μm, and the distance between grooves G1 was assumed to be 0.71 mm.

[0127] The through-holes TH were assumed to have a frustoconical shape, tapering from the second surface S2 towards the first surface S1. The pitch of the through-holes TH arranged along the length of the groove G1 was set to 160 μm. The length of the through-holes TH was set to 250 μm, the opening diameter on the second surface S2 was set to 80 μm, and the opening diameter at the bottom surface of the groove G1 was set to 60 μm.

[0128] (Comparative Example 1) Computer simulations similar to those in the above embodiment were performed, except for the following points. Specifically, in this example, the groove G1 was omitted, and accordingly, the length of the through hole TH and the height of the columnar conductor portion 12c were made equal to the thickness of the dielectric layer 11. In addition, the opening diameter on the first surface S1 of the through hole TH was set to 60 μm.

[0129] (Comparative Example 2) A computer simulation was performed in the same manner as in Comparative Example 1, except that the pitch of the through-holes TH was set to 150 μm.

[0130] (Reference example) Computer simulations similar to those in the above embodiment were performed, except for the following point: In this example, the pitch of the through-holes TH was set so that adjacent through-holes were connected. In other words, in this example, computer simulations were performed for a structure similar to that of a rectangular waveguide.

[0131] (evaluation) Figure 22 is a graph showing the frequency dependence of signal strength obtained by computer simulation for the wiring boards according to Comparative Examples 1 and 2 and the Reference Example. Figure 23 is a graph showing the frequency dependence of signal strength obtained by computer simulation for the wiring boards according to Comparative Examples 1 and 2 and the Example.

[0132] In Figures 22 and 23, the horizontal axis represents frequency, and the vertical axis represents S-parameters. In Figures 22 and 23, curve C1 shows the data obtained in the reference example, curve C2 shows the data obtained in Comparative Example 2, curve C3 shows the data obtained in Comparative Example 1, and curve C4 shows the data obtained in the example.

[0133] As shown by curves C1 and C3 in Figure 22, the post-wall waveguide according to Comparative Example 1 achieved transmission characteristics equivalent to those of the waveguide (square waveguide) according to the Reference Example at a frequency of 110 GHz. However, at higher frequencies, for example at 170 GHz, it showed significantly lower transmission characteristics compared to the waveguide according to the Reference Example. Furthermore, as shown by curves C2 and C3 in Figure 22, the post-wall waveguide of Comparative Example 2 was able to bring its transmission characteristics in the high-frequency band, for example at 170 GHz, closer to those of the square waveguide by reducing the pitch of the through-holes TH from 160 μm to 150 μm compared to the post-wall waveguide of Comparative Example 1. On the other hand, the post-wall waveguide according to the Example showed transmission characteristics equivalent to those of the post-wall waveguide of Comparative Example 2, which had a pitch of 150 μm for the through-holes TH, even though the pitch of the through-holes TH was 160 μm.

[0134] Thus, the post-wall waveguide included in the wiring board according to the embodiment of the present invention enables low-loss transmission in the high-frequency band even when the pitch of the through-holes TH is large. When the pitch of the through-holes TH is large, the number of through-holes TH that need to be formed is reduced compared to when the pitch of the through-holes TH is small, and for example, the time required for drilling and deposition of the conductor layer can be shortened. Therefore, the wiring board according to the embodiment of the present invention can be manufactured at a lower cost when the pitch of the through-holes TH is large. Furthermore, when the pitch of the through-holes TH is small, the wiring board according to the embodiment of the present invention can achieve higher transmission characteristics. [Explanation of Symbols]

[0135] 1A...Wireless module, 1E...Wireless module, 1F...Wireless module, 10A...Wiring board, 10B...Wiring board, 10C...Wiring board, 10D...Wiring board, 10E...Wiring board, 10F...Wiring board, 10X...Wiring board, 11...Dielectric layer, 11D1...Modified section, 11D2...Modified section, 12A...First conductor pattern, 12B...Second conductor pattern, 12C...Conductor pattern, 12D...Conductor pattern, 12a...First conductor section, 12d...Wiring section, 12b...Second conductor section, 12c...Columnar conductor section, 12d...Wiring section, 12e...Wiring section, 13...Insulating layer, 13A...Insulating Edge layer, 13B...insulating layer, 14...bonding conductor, 15...adhesive layer, 16...bonding wire, 17A...support, 17B...support, 18A...release layer, 18B...release layer, 19...resist pattern, 20...semiconductor device, 121A...first conductor layer, 121B...first conductor layer, 121C...first conductor layer, 121D...first conductor layer, 122A...second conductor layer, 122B...second conductor layer, 122C...second conductor layer, 122D...second conductor layer, C1...curve, C2...curve, C3...curve, C4...curve, G1...groove, G2...groove, S1...first surface, S2...second surface, TH...through hole.

Claims

1. A dielectric layer having a first surface and a second surface which is its back surface, wherein a pair of first grooves arranged in the width direction are provided on the first surface, and a plurality of through holes are provided at each position of the pair of first grooves, arranged in the length direction of each of the pair of first grooves, A first conductive portion covering the region of the first surface from one of the pair of first grooves to the other of the pair of first grooves, A second conductive portion covering the region of the second surface from a position corresponding to one of the pair of first grooves to a position corresponding to the other of the pair of first grooves, A plurality of columnar conductor portions are provided in each of the plurality of through holes. A wiring substrate comprising the first conductor portion, the second conductor portion, the plurality of columnar conductor portions, and a portion of the dielectric layer including the region sandwiched by the pair of first grooves, which constitutes a post-wall waveguide.

2. The wiring board according to claim 1, wherein each of the plurality of through holes is reduced in diameter from the second surface to the first surface.

3. The wiring board according to claim 1, wherein the diameter of the opening closer to the first surface of each of the plurality of through holes is smaller than the width of the bottom of the pair of grooves in which the opening is located.

4. The wiring board according to claim 1, wherein each of the plurality of columnar conductor portions is provided integrally with the second conductor portion.

5. The wiring board according to claim 1, wherein each of the first conductor portion and the second conductor portion has a multilayer structure.

6. The wiring substrate according to claim 1, wherein the ratio L / T of the length L of each of the plurality of through holes to the thickness T of the dielectric layer is in the range of 0.5 or more and 0.9 or less.

7. The wiring board according to claim 1, wherein, among the plurality of through holes, those adjacent in the longitudinal direction have a distance between openings furthest from the first surface that is within the range of 30 μm to 110 μm.

8. The wiring substrate according to claim 1, wherein the dielectric layer has a thickness in the range of 100 μm or more and 200 μm or less.

9. The wiring substrate according to claim 1, wherein each of the inner walls of the first groove and the side walls of the plurality of through holes has an arithmetic mean roughness Ra in the range of 500 nm to 2000 nm.

10. The wiring board according to claim 1, wherein the second surface is provided with a pair of second grooves at positions corresponding to the pair of first grooves, and each of the plurality of through holes extends from the bottom of one of the pair of first grooves to the bottom of one of the pair of second grooves.

11. A wiring board according to any one of claims 1 to 10, A semiconductor device mounted on the aforementioned wiring board and performing electromagnetic wave transmission or reception via the aforementioned post-wall waveguide, A wireless module equipped with [a specific feature / feature].

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