electronic machines
The integrated circuit chip with a determination unit addresses connection defects in narrow-pitched BGA packages by monitoring terminal potentials, enabling quick detection and prevention of malfunction in semiconductor devices.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- SEIKO EPSON CORP
- Filing Date
- 2024-12-25
- Publication Date
- 2026-07-07
Smart Images

Figure 2026113257000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an electronic device.
Background Art
[0002] As disclosed in Patent Document 1, conventionally, a conduction check technique for checking the connection status between a semiconductor element and a substrate at the time of shipment of an electronic device is known.
Prior Art Document
Patent Document
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] In recent years, with the increase in the number of terminals accompanying the multi-functionality of electronic devices and the miniaturization of packages of semiconductor devices incorporated in electronic devices accompanying the miniaturization of electronic devices, as a result, the arrangement of solder balls of BGA (Ball Grid Array) has become narrow-pitched. Therefore, in mounting a semiconductor device on a substrate, the connection area per terminal has also become small. In such a situation, if the temperature cycle progresses over time and the solder balls are peeled off from the substrate, a problem suddenly occurs in the market, but conventionally, such problems have not been sufficiently studied.
Means for Solving the Problems
[0005] One aspect of the electronic device according to the present invention is a printed circuit board, a semiconductor device mounted on the printed circuit board, and the semiconductor device includes an integrated circuit chip including a determination unit, and an integrated circuit board which is a board on which the integrated circuit chip is mounted. and The aforementioned integrated circuit board is provided with a plurality of terminals, The aforementioned printed circuit board is provided with a plurality of pads and a plurality of wirings. Each of the aforementioned multiple terminals is connected to each of the aforementioned multiple pads, The aforementioned plurality of wirings include constant potential wiring, The first pad among the plurality of pads is connected to the constant potential wiring, The first terminal among the plurality of terminals is connected to the first pad, The determination unit determines whether or not there is a connection defect between the semiconductor device and the printed circuit board based on the potential of the first terminal. [Brief explanation of the drawing]
[0006] [Figure 1] This is a perspective view of the external appearance of an electronic device. [Figure 2] This is a diagram showing an example of the functional configuration of an electronic device. [Figure 3] This is a cross-sectional view showing the structure of a semiconductor device. [Figure 4] This is a transparent view of the terminal mounting side of the package. [Figure 5] This is a functional block diagram of an integrated circuit chip. [Figure 6] This is a plan view of a part of a printed circuit board. [Figure 7] This is a plan view of a portion of a printed circuit board. [Figure 8] This is a plan view of a portion of a printed circuit board. [Modes for carrying out the invention]
[0007] Preferred embodiments of the present invention will be described below with reference to the drawings. The drawings used are for illustrative purposes only. The embodiments described below are not intended to unduly limit the scope of the present invention as described in the claims. Furthermore, not all of the configurations described below are essential components of the present invention.
[0008] Hereinafter, as an electronic device according to the present invention, a multifunction device having a printing function and a scanning function will be taken as an example, and the electronic device of this embodiment will be described.
[0009] 1. Structure of the electronic device FIG. 1 is an external perspective view of the electronic device 1. Hereinafter, the description will be made using the X direction, Y direction, and Z direction that are orthogonal to each other. Also, the starting side of the arrow indicating the X direction is referred to as the -X side, the tip side is referred to as the +X side, the starting side of the arrow indicating the Y direction is referred to as the -Y side, the tip side is referred to as the +Y side, and the starting side of the arrow indicating the Z direction may be referred to as the -Z side and the tip side as the +Z side.
[0010] The electronic device 1 includes a device main body 12 having a substantially rectangular parallelepiped shape as a whole. The device main body 12 includes a recording device 13 that records on paper, and an image reading device 10 that is provided on the recording device 13 and reads information such as pictures, characters, and photographs formed on the placed original manuscript to generate an image. For example, the image generated by the image reading device 10 is printed on paper by the recording device 13.
[0011] The image reading device 10 includes an ADF (Auto Document Feeder) 27 that is an automatic document feeder. The ADF 27 is provided so as to be rotatable with the back side of the device main body 12 on the -Y side as a fulcrum of the rotation axis J, and also functions as a top plate that can be opened and closed with respect to the upper part of the device main body 12.
[0012] The ADF 27 includes a document conveyance unit 28 having a drive mechanism for conveying the document, a document placement surface 40, and a document discharge surface 42. The document placed on the document placement surface 40 is fed into the image reading device 10 by the document conveyance unit 28, read, and then discharged and placed on the document discharge surface 42.
[0013] An operation unit 16 is provided at the upper part of the front side on the +Y side of the device main body 12. The operation unit 16 includes a power button, a print setting button, a display panel, etc. for operating the electronic device 1.
[0014] On the back side, which is the -Y side of the apparatus main body 12, a back tray 24 on which sheets are placed is provided. The sheets placed on the back tray 24 are fed to the recording device 13 and recorded.
[0015] On the bottom side, which is the -Z side of the front tray 22, a sheet storage section 26 in which a plurality of sheets are stored is provided. The sheet storage section 26 is provided slidably in the Y direction at the lower part of the apparatus main body 12 and is configured to be detachable from the apparatus main body 12. The sheets placed on the sheet storage section 26 are fed to the recording device 13 and recorded.
[0016] On the front side of the apparatus main body 12, a drawer section 20 attached to the front tray 22 and slidable in the Y direction is provided. The sheets fed from the back tray 24 or the sheet storage section 26 to the recording device 13 and recorded are discharged from an opening 18 provided on the front side of the apparatus main body 12 and placed on the front tray 22 or the drawer section 20 in a state of being pulled out from the front tray 22.
[0017] 2. Functional Configuration of the Electronic Device FIG. 2 is a diagram showing an example of the functional configuration of the electronic device 1. As shown in FIG. 2, the electronic device 1 has a main board 50, a sub-board 51, and a sub-board 52. The main board 50 and the sub-boards 51, 52 are, for example, printed boards having a multilayer structure.
[0018] On the main board 50, a semiconductor device 100 having an integrated circuit chip 200, a motor driver 110, a head drive IC 120, a serial flash memory 130, a DDR 140, a power supply circuit 190, and a reset IC 192 are mounted. DDR is an abbreviation for Double-Data-Rate SDRAM. Also, connectors 151, 152, 153, 154 are provided on the main board 50.
[0019] On the sub-board 51, an LCD control IC 160 is mounted. The sub-board 51 is connected to the main board 50 by a cable 71.
[0020] The sub-board 52 has an SD control IC 170 mounted on it, and a connector 181 is also provided. The sub-board 52 is connected to the main board 50 by a cable 72.
[0021] Furthermore, the electronic device 1 includes various motors 61, a print head 62, a scanner module 63, a wireless LAN module 64, and an LCD 65. LAN stands for Local Area Network. LCD stands for Liquid Crystal Display.
[0022] The motor 61 is connected to the main board 50 via a connector 151 and is driven by a motor driver 110.
[0023] The print head 62 is provided in the recording device 13 and is connected to the main board 50 via a connector 152, and is driven by the head drive IC 120.
[0024] The scanner module 63 is provided in the image reading device 10, connected to the main board 50 via a connector 153, and controlled by the integrated circuit chip 200. The scanner module 63 also scans the original document and transmits the generated scan data to the integrated circuit chip 200.
[0025] The wireless LAN module 64 is a module that performs wireless data communication with an external device of the electronic device 1. The wireless LAN module 64 is connected to the main board 50 via cable 73 and is controlled by the integrated circuit chip 200. The wireless LAN module 64 also communicates with the integrated circuit chip 200 via USB.
[0026] The LCD65 is a display panel included in the operation unit 16 that displays various information. The LCD65 is connected to the sub-board 51 via cable 74 and is controlled by the LCD control IC 160.
[0027] The LCD control IC 160 is connected to the LCD 65 via cable 74 and is a circuit that controls the display of various information on the LCD 65. The LCD control IC 160 is controlled by the integrated circuit chip 200.
[0028] The SD control IC 170 is a circuit that controls the writing and reading of data to and from the SD card 3 inserted into the connector 181. The SD control IC 170 is controlled by the integrated circuit chip 200. The SD control IC 170 also communicates with the integrated circuit chip 200 via USB.
[0029] The motor driver 110 is connected to the motor 61 via a connector 151 and is the circuit that drives the motor 61. The motor driver 110 is controlled by an integrated circuit chip 200.
[0030] The head drive IC 120 is connected to the print head 62 via connector 152 and is the circuit that drives the print head 62. The head drive IC 120 is controlled by the integrated circuit chip 200.
[0031] The serial flash memory 130 and DDR140 are storage devices that store various types of data, and the writing and reading of data are controlled by the integrated circuit chip 200.
[0032] The power supply circuit 190 supplies power to the semiconductor device 100, motor driver 110, head drive IC 120, serial flash memory 130, and DDR140. For example, the power supply circuit 190 generates a power supply voltage of several volts and supplies it to the semiconductor device 100, motor driver 110, head drive IC 120, serial flash memory 130, and DDR140. The power supply circuit 190 also generates a power supply voltage of several tens of volts to drive the motor 61 and print head 62 and supplies it to the motor driver 110 and head drive IC 120, respectively. The motor 61 and print head 62 operate by receiving power from the power supply circuit 190, via the motor driver 110 and head drive IC 120, respectively. The power supply circuit 190 is controlled by an integrated circuit chip 200.
[0033] The reset IC 192 monitors the power supply voltage and other parameters of the semiconductor device 100 and resets the semiconductor device 100 if it detects an abnormality. The reset IC 192 is controlled by the integrated circuit chip 200.
[0034] Thus, the integrated circuit chip 200 is an SoC that controls the motor driver 110, head drive IC 120, serial flash memory 130, DDR 140, scanner module 63, wireless LAN module 64, LCD control IC 160, SD control IC 170, power supply circuit 190, and reset IC 192. SoC is an abbreviation for System On Chip.
[0035] Furthermore, the integrated circuit chip 200 is connected to an external PC 2 of the electronic device 1 via a connector 154, and communicates data with the PC 2. The connector 154 is, for example, a USB connector.
[0036] 3. Structure of a semiconductor device The semiconductor device 100 has a surface mount package configuration, such as SiP (System-in-Package), BGA (Ball Grid Array), LGA (Land Grid Array), or WPP (Wafer Process Packaging). Below, the structure of the semiconductor device 100 will be described using the case where the package configuration is BGA as an example.
[0037] Figure 3 is a cross-sectional view showing the structure of the semiconductor device 100. In the following explanation, we will use the x, y, and z directions, which are independent of the X, Y, and Z directions shown in Figure 1 and are mutually orthogonal. Furthermore, the starting point of the arrow indicating the x direction may be referred to as the -x side and the tip as the +y side; the starting point of the arrow indicating the y direction may be referred to as the -y side and the tip as the +y side; and the starting point of the arrow indicating the z direction may be referred to as the -z side and the tip as the +z side.
[0038] As shown in Figure 3, the semiconductor device 100 comprises a base substrate 300, an integrated circuit chip 200, and a housing 350.
[0039] The housing 350 is located on the +z side of the integrated circuit chip 200 and is bonded to the base substrate 300 so as to cover the integrated circuit chip 200. The housing 350 contains epoxy resin or the like to protect the integrated circuit chip 200.
[0040] A base substrate 300 is located on the -z side of the integrated circuit chip 200. The integrated circuit chip 200 is mounted on the base substrate 300 by a bonding material 370 such as an adhesive. The base substrate 300 and the integrated circuit chip 200 are electrically connected via bonding wires 380.
[0041] The base substrate 300 is provided with multiple wiring patterns and multiple electrodes (not shown). The bonding wire 380 is electrically connected to electrodes (not shown) formed on the +z side of the base substrate 300. Multiple electrodes (not shown) are also provided on the -z side of the base substrate 300. Solder balls 310 are attached to each of the electrodes on the -z side of the base substrate 300. In other words, the base substrate 300 is provided with multiple solder balls 310, which are terminals. The printed circuit board 400, which is the main board 50 in Figure 2, is provided with multiple pads 410 and multiple wirings (not shown), and each of the multiple solder balls 310 is connected to each of the multiple pads 410. The base substrate 300 is electrically connected to the printed circuit board 400 by the multiple solder balls 310. The multiple solder balls 310 constitute a so-called ball grid array that electrically and mechanically connects the base substrate 300 and the printed circuit board 400. In the following explanation, the -z side of the base board 300 to which multiple solder balls 310 are attached will be referred to as the terminal mounting surface 301.
[0042] The package 330 is composed of a base substrate 300, a housing 350, and a ball grid array consisting of multiple solder balls 310. The integrated circuit chip 200 is mounted on the base substrate 300, which is the internal substrate of the package 330.
[0043] In the semiconductor device 100 configured as described above, signals input to the semiconductor device 100 via a plurality of solder balls 310 provided on the terminal mounting surface 301 propagate through electrodes and wiring patterns provided on the base substrate 300 and bonding wires 380, and are input to the integrated circuit chip 200. Furthermore, signals output from the integrated circuit chip 200 are input to a plurality of pads 410 on the printed circuit board 400 via the bonding wires 380, electrodes and wiring patterns provided on the base substrate 300 and the plurality of solder balls 310.
[0044] Figure 4 is a perspective view of the terminal mounting surface 301 of the base substrate 300 of the package 330, viewed from the +z side. As shown in Figure 4, the base substrate 300 of the package 330 has a side 302 extending in the x direction, a side 303 extending in the x direction and opposite to side 302, a side 304 extending in the y direction, and a side 305 extending in the y direction and opposite to side 304. Sides 304 and 305 intersect with sides 302 and 303, respectively. That is, the base substrate 300 is roughly rectangular in shape with sides 302, 303, 304, and 305 as its outer periphery.
[0045] As shown in Figure 4, on the terminal mounting surface 301 of the base board 300, multiple solder balls 310 are arranged in a grid pattern, distributed in 23 rows in the y direction, with a maximum of 23 solder balls 310 in each row. Solder balls 310 connected to the motor driver 110, head drive IC 120, serial flash memory 130, DDR 140, and connectors 151, 152, 153, 154, etc., are located at or near the outermost edge of the terminal mounting surface 301. Multiple solder balls 310 arranged at the outermost edge are spaced apart to ensure space for wiring connected to the solder balls 310 inside them. The area is widened. In addition, power supply voltage is supplied to multiple solder balls 310 located in the central area enclosed by the dashed line on the terminal mounting surface 301.
[0046] 4. Functional configuration of an integrated circuit chip Figure 5 is a functional block diagram of the integrated circuit chip 200. As shown in Figure 5, the integrated circuit chip 200 includes a control unit 210, USB interface circuits 221, 222, 223, memory interface circuits 231, 232, n GPIOs 241-1 to 241-n, a detection unit 250, a storage unit 260, and resistors 270a, 270b, 270c, 270d. GPIO is an abbreviation for General-Purpose Input / Output. Note that the integrated circuit chip 200 may have a configuration in which some of the components in Figure 5 are omitted or changed, or other components are added.
[0047] USB interface circuit 221 is connected to terminal group T1G, which includes multiple terminals of the integrated circuit chip 200. USB interface circuit 222 is connected to terminal group T2G, which includes multiple terminals of the integrated circuit chip 200. USB interface circuit 223 is connected to terminal group T3G, which includes multiple terminals of the integrated circuit chip 200. Memory interface circuit 231 is connected to terminal group T4G, which includes multiple terminals of the integrated circuit chip 200. Memory interface circuit 232 is connected to terminal group T5G, which includes multiple terminals of the integrated circuit chip 200. Control unit 210 is connected to terminal group T6G, which includes multiple terminals of the integrated circuit chip 200.
[0048] The terminal groups T1G to T6G of the integrated circuit chip 200 are connected to the terminal groups S1G to S6G of the semiconductor device 100, respectively. Each terminal included in the terminal groups S1G to S6G of the semiconductor device 100 is a solder ball 310 provided on the terminal mounting surface 301. Terminal group S1G of the semiconductor device 100 is connected to PC2 via connector 154. Terminal group S2G of the semiconductor device 100 is connected to SD control IC 170 via cable 72. Terminal group S3G of the semiconductor device 100 is connected to wireless LAN module 64 via cable 73. Terminal group S4G of the semiconductor device 100 is connected to serial flash memory 130. Terminal group S5G of the semiconductor device 100 is connected to DDR140. Terminal group S6G of the semiconductor device 100 is connected to LCD control IC 160.
[0049] The n GPIO pins 241-1 to 241-n are each connected to the n terminals S1 to Sn of the semiconductor device 100. The n terminals T1 to Tn of the integrated circuit chip 200 are each connected to the n terminals S1 to Sn of the semiconductor device 100. The terminals S1 to Sn of the semiconductor device 100 are solder balls 310 provided on the terminal mounting surface 301.
[0050] The memory unit 260 includes a ROM 261, a RAM 262, and a register 263. ROM stands for Read Only Memory, and RAM stands for Random Access Memory. ROM 261 stores various programs and predetermined data. RAM 262 is used as a workspace for the control unit 210 and stores programs and data read from ROM 261, as well as data temporarily generated by the control unit 210. Register 263 stores various setting data, etc.
[0051] The control unit 210 performs various control and image processing functions. In this embodiment, the control unit 210 is a processor such as a CPU, and performs various control and image processing functions by executing a program (not shown) stored in the ROM 261. However, some of the processing of the control unit 210 may be implemented in hardware.
[0052] Specifically, the control unit 210 performs various controls on the motor driver 110, the head drive IC 120, the scanner module 63, and the LCD control IC 160.
[0053] Furthermore, the control unit 210 communicates with PC2 via USB by controlling the USB interface circuit 221. The control unit 210 also communicates with SD control IC 170 via USB by controlling the USB interface circuit 222. Additionally, the control unit 210 communicates with the wireless LAN module 64 via USB by controlling the USB interface circuit 223. Finally, the control unit 210 transmits image data to the LCD control IC 160.
[0054] Furthermore, the control unit 210 controls the memory interface circuit 231 to write and read data to and from the serial flash memory 130. The control unit 210 also controls the memory interface circuit 232 to write and read data to and from the DDR140.
[0055] For example, the control unit 210 receives image data for printing from PC2 via USB interface circuit 221 and writes it to serial flash memory 130 or DDR140. Also, for example, the control unit 210 receives image data stored on SD card 3 from SD control IC 170 via USB interface circuit 222 and writes it to serial flash memory 130 or DDR140. Also, for example, the control unit 210 receives image data from wireless LAN module 64 via USB interface circuit 223 and writes it to serial flash memory 130 or DDR140. Also, for example, the control unit 210 acquires scan data from scanner module 63, performs image processing on the scan data to generate image data, and writes it to serial flash memory 130 or DDR140.
[0056] Furthermore, for example, the control unit 210 writes the image data generated by performing image processing on the scan data to the serial flash memory 130 or DDR140.
[0057] Furthermore, for example, the control unit 210 reads image data for printing from the serial flash memory 130 or DDR140, performs image processing for printing to generate print data, and outputs it to the head drive IC 120. Also, for example, the control unit 210 reads image data from the serial flash memory 130 or DDR140 and transmits it to the PC2 via the USB interface circuit 221. Also, for example, the control unit 210 reads image data from the serial flash memory 130 or DDR140 and transmits it to the SD control IC 170 via the USB interface circuit 222. Also, for example, the control unit 210 reads image data from the serial flash memory 130 or DDR140 and transmits it to the wireless LAN module 64 via the USB interface circuit 223.
[0058] Furthermore, the control unit 210 controls the input and output of each of the GPIO241-1 to 241-n. Specifically, the control unit 210 controls each of the GPIO241-1 to 241-n to become either an input / output circuit, an input circuit, or an output circuit. For example, the control unit 210 may control GPIO241-k and Tl from GPIO241-3 to 241-n to become output circuits, and output control signals from terminals Tk and Tl to the power supply circuit 190 and the reset IC 192, respectively.
[0059] As shown in Figure 5, terminal Tv of the integrated circuit chip 200 is connected to terminal Sv of the semiconductor device 100. Terminal Sv of the semiconductor device 100 is connected to pad Pv provided on the printed circuit board 400. Pad Pv is one of the multiple pads 410 shown in Figure 3. On the printed circuit board 400, pad Pv is connected to wiring 320v. Wiring 320v is a power supply wiring, and the semiconductor device 100 is supplied with a power supply voltage VDD of several volts generated by the power supply circuit 190 shown in Figure 2 from terminal Sv. Each component operates when supplied with the power supply voltage VDD.
[0060] Furthermore, terminals Ta, Tb, Tc, and Td of the integrated circuit chip 200 are connected to terminals Sa, Sb, Sc, and Sd of the semiconductor device 100, respectively. Terminals Sa, Sb, Sc, and Sd of the semiconductor device 100 are solder balls 310 provided on the terminal mounting surface 301, respectively, and are connected to pads Pa, Pb, Pc, and Pd provided on the printed circuit board 400. Pads Pa, Pb, Pc, and Pd are each one of the multiple pads 410 shown in Figure 3. On the printed circuit board 400, pads Pa, Pb, Pc, and Pd are connected to wirings 320a, 320b, 320c, and 320d, respectively. Wirings 320a, 320b, 320c, and 320d are constant potential wirings with a constant potential, for example, the ground potential.
[0061] Furthermore, terminals Ta, Tb, Tc, and Td of the integrated circuit chip 200 are connected to the power supply voltage VDD via resistors 270a, 270b, 270c, and 270d, respectively. In other words, resistors 270a, 270b, 270c, and 270d function as pull-up resistors. Therefore, terminals Sa and Ta will be at ground potential if the connection between terminal Sa and pad Pa is normal, but will be pulled up to power potential by resistor 270a if the connection is poor. Similarly, terminals Sb and Tb will be at ground potential if the connection between terminal Sb and pad Pb is normal, but will be pulled up to power potential by resistor 270b if the connection is poor. Likewise, terminals Sc and Tc will be at ground potential if the connection between terminal Sc and pad Pc is normal, but will be pulled up to power potential by resistor 270c if the connection is poor. Similarly, terminals Sd and Td will be at ground potential if terminal Sd is properly connected to pad Pd, but in the event of a connection failure, they will be pulled up by resistor 270d to power supply potential.
[0062] In this embodiment, the control unit 210 functions as a determination unit that determines whether or not there is a connection defect between the semiconductor device 100 and the printed circuit board 400 based on the potentials of terminals Sa, Sb, Sc, and Sd of the semiconductor device 100, i.e., the potentials of terminals Ta, Tb, Tc, and Td of the integrated circuit chip 200. Specifically, the control unit 210 determines that the connection between the semiconductor device 100 and the printed circuit board 400 is normal if all potentials of terminals Ta, Tb, Tc, and Td are at a low level, and determines that there is a connection defect between the semiconductor device 100 and the printed circuit board 400 if at least one potential of terminals Ta, Tb, Tc, and Td is at a high level.
[0063] In this embodiment, the detection unit 250 outputs an interrupt signal INT to the control unit 210, which is the determination unit, when the potential of at least one of the terminals Sa, Sb, Sc, Sd, i.e., the potential of terminals Ta, Tb, Tc, Td of the integrated circuit chip 200, changes from a low level to a high level. When the interrupt signal INT is input to the control unit 210, it determines that there is a connection problem between the semiconductor device 100 and the printed circuit board 400. With this configuration, the control unit 210 does not need to determine whether there is a connection problem until the interrupt signal INT is input, so it can prioritize other processing.
[0064] The control unit 210 performs predetermined processing when it detects a connection problem. For example, if the control unit 210 determines that a connection problem has occurred, it may stop supplying power from the power supply circuit 190 to the motor driver 110 and the motor 61. For example, the recording device 13 has a transport motor 61 that transports the paper medium, and if the control unit 210 determines that a connection problem has occurred, it may stop supplying power from the power supply circuit 190 to the transport motor. If a connection problem occurs between the semiconductor device 100 and the printed circuit board 400, the recording device 13 may not be able to perform normal printing, so by stopping the power supply to the transport motor, paper will not be wasted.
[0065] Furthermore, for example, if the control unit 210 determines that a connection failure has occurred, it may send a control signal to the reset IC 192, which receives the control signal and resets the semiconductor device 100. When the semiconductor device 100 is reset, the detection unit 250 again outputs an interrupt signal INT to the control unit 210, and the control unit 210 detects the connection failure and sends a control signal to the reset IC 192 again. In other words, once the control unit 210 detects a connection failure, the semiconductor device 100 is reset repeatedly, which stops various functions of the semiconductor device 100 and reduces the risk of malfunction caused by connection failures.
[0066] The control unit 210 may determine whether there is a connection problem between the semiconductor device 100 and the printed circuit board 400 based on the logic levels of the potentials of terminals Sa, Sb, Sc, and Sd, immediately after the terminal Sv of the semiconductor device 100 reaches the power potential when the power supply circuit 190 starts supplying the power supply voltage VDD to the semiconductor device 100. In other words, the control unit 210 may determine whether there is a connection problem each time it starts up. In this way, the control unit 210 can quickly detect and address connection problems due to aging.
[0067] It is preferable that terminals Sa, Sb, Sc, and Sd are the four solder balls 310 located on the outermost periphery of the base substrate 300, which are prone to connection failure due to aging. Furthermore, it is preferable that terminals Sa, Sb, Sc, and Sd are the four solder balls 310 located at the four corners of the base substrate 300, which are the first to be prone to connection failure due to aging.
[0068] For example, as shown in Figure 4, terminal Sa is the solder ball 310a closest to the corner where sides 302 and 304 of the base substrate 300 intersect. Therefore, in the y-direction from side 303 toward side 302, none of the multiple solder balls 310, which are multiple terminals of the semiconductor device 100, are located between terminal Sa and side 302. Also, in the -x-direction from side 305 toward side 304, none of the multiple solder balls 310, which are multiple terminals of the semiconductor device 100, are located between terminal Sa and side 304.
[0069] Furthermore, as shown in Figure 4, terminal Sb is the solder ball 310b closest to the corner where sides 302 and 305 of the base substrate 300 intersect. Therefore, in the x-direction from side 304 to side 305, none of the multiple terminals of the semiconductor device 100 are located between terminal Sb and side 305. Also, in the y-direction from side 303 to side 302, none of the multiple terminals of the semiconductor device 100 are located between terminal Sb and side 302.
[0070] Furthermore, as shown in Figure 4, terminal Sc is the solder ball 310c closest to the corner where sides 303 and 304 of the base substrate 300 intersect. Therefore, in the -x direction from side 305 toward side 304, none of the multiple terminals of the semiconductor device 100 are located between terminal Sc and side 304. Also, in the -y direction from side 302 toward side 303, none of the multiple terminals of the semiconductor device 100 are located between terminal Sc and side 303.
[0071] Furthermore, as shown in Figure 4, terminal Sd is the solder ball 310d closest to the corner where sides 303 and 305 of the base substrate 300 intersect. Therefore, in the -y direction from side 302 to side 303, none of the multiple terminals of the semiconductor device 100 are located between terminal Sd and side 303. Also, in the x direction from side 304 to side 305, none of the multiple terminals of the semiconductor device 100 are located between terminal Sd and side 305.
[0072] However, if the semiconductor device 100 is not supplied with a power supply voltage VDD, the control unit 210 will... It is not possible to detect poor connections between the child terminals Sa, Sb, Sc, Sd and the pads Pa, Pb, Pc, Pd. Therefore, it is preferable that terminal Sv, which shares the power supply voltage VDD, be located among the multiple solder balls 310 provided on the base board 300 in a location that is less likely to experience poor connections due to aging than terminals Sa, Sb, Sc, Sd. In other words, it is preferable that terminal Sv be located closer to the center than each of terminals Sa, Sb, Sc, Sd on the base board 300.
[0073] For example, in Figure 4, terminal Sa is located near side 302, so the shortest distance Ds1 between terminal Sa and side 302 is smaller than the shortest distance Ds2 between terminal Sa and side 303. Therefore, in relation to the arrangement of terminal Sa and terminal Sv, it is preferable that the shortest distance Dv1 between terminal Sv and side 302 is greater than the shortest distance Ds1 between terminal Sa and side 302, and the shortest distance Dv2 between terminal Sv and side 303 is greater than the shortest distance Ds1 between terminal Sa and side 302.
[0074] Furthermore, in Figure 4, since terminal Sa is located near side 304, the shortest distance Ds3 between terminal Sa and side 304 is smaller than the shortest distance Ds4 between terminal Sa and side 305. Therefore, in relation to the arrangement of terminal Sa and terminal Sv, it is preferable that the shortest distance Dv3 between terminal Sv and side 304 is greater than the shortest distance Ds3 between terminal Sa and side 304, and the shortest distance Dv4 between terminal Sv and side 305 is greater than the shortest distance Ds3 between terminal Sa and side 304.
[0075] The relationship between the arrangement of terminals Sb, Sc, and Sd and the arrangement of terminal Sv is the same as the relationship between the arrangement of terminal Sa and the arrangement of terminal Sv. In conclusion, it is preferable that terminal Sv be arranged in the area near the center of the base substrate 300, which is away from the four corners of the base substrate 300 and enclosed by the dashed line in Figure 4.
[0076] In Figures 4 and 5, the semiconductor device 100 is provided with four terminals Sa, Sb, Sc, and Sd for detecting connection failures with the printed circuit board 400, but it is sufficient if at least one of these terminals Sa, Sb, Sc, and Sd is provided.
[0077] 5. Layout of pads and wiring on the printed circuit board By mounting the integrated circuit chip 200 in a small package 330, the semiconductor device 100 can be made smaller and less expensive. However, in a small package 330, the spacing between solder balls 310 becomes narrower, and the spacing between pads 410 on the printed circuit board 400 also becomes narrower. As a result, it becomes difficult to extend the numerous wires connected to each pad 410 through the gaps between the numerous pads 410 to the outside of the mounting area of the semiconductor device 100. Therefore, in this embodiment, the shape of some of the pads 410 on the printed circuit board 400 is modified to secure space for each wire to pass through.
[0078] Figure 6 is a plan view of a portion of the printed circuit board 400 viewed from the +z side. As shown in Figure 3, the printed circuit board 400 is provided with a plurality of pads 410, and as shown in Figure 6, the plurality of pads 410 include pads P1, P2, P3, P4, P5, P6, P7, and P8. Each of the plurality of pads 410 is provided at a position corresponding to each of the plurality of solder balls 310, which are the plurality of terminals of the semiconductor device 100, and the semiconductor device 100 is mounted on the printed circuit board 400 by connecting each solder ball 310 to each pad 410. When the semiconductor device 100 is mounted on the printed circuit board 400, each of the plurality of pads 410 provided on the printed circuit board 400 is electrically connected to one of the terminals of the semiconductor device 100 and one of the terminals of the integrated circuit chip 200.
[0079] As shown in Figure 6, pads P1, P2, P3, P4, P5, P6, P7, P8 are These are connected to terminals S1a, S2a, S3a, S4a, S5a, S6a, S7a, and S8a of semiconductor device 100.
[0080] Pads P1, P2, and P7 are circular, while pads P3, P4, P5, P6, and P8 are oval. In the case of the oval, the diameter Ry in the y-direction is greater than the diameter R of the circle, and the diameter Rx in the x-direction is smaller than the diameter R of the circle. That is, pads P3, P4, P5, P6, and P8 are ovals that are elongated in the y-direction, and the area of each pad P3, P4, P5, P6, and P8 is equivalent to the area of each pad P1, P2, and P7. Therefore, the connection strength between each terminal S3a, S4a, S5a, S6a, S7a, and S8a and each pad P3, P4, P5, P6, and P8 can be made equivalent to the connection strength between each terminal S1a, S2a, and S7a and each pad P1, P2, and P7. In this embodiment, the shapes of pads P3, P4, P5, P6, and P8 are described as oval, but the shapes of pads P3, P4, P5, P6, and P8 may also be elliptical with similar areas.
[0081] In Figure 6, the edge 302 of the terminal mounting surface 301 is shown as a dashed line. That is, pads P5 and P6 are aligned along edge 302. In the x-direction from edge 304 to edge 305, pads P5 and P6 are adjacent to each other. In the y-direction from edge 303 to edge 302, none of the multiple pads 410 are placed between pad P5 and edge 302. Similarly, in the y-direction, none of the multiple pads 410 are placed between pad P6 and edge 302. In other words, each of pads P5 and P6 is connected to the outermost solder ball 310 provided on the terminal mounting surface 301.
[0082] Furthermore, in the x-direction, pads P3 and P4 are adjacent, and pads P4 and P8 are adjacent. In addition, in the x-direction, pads P1 and P2 are adjacent, and pads P2 and P7 are adjacent.
[0083] Furthermore, in the y-direction, pads P1, P3, and P5 overlap at least partially. Also, in the y-direction, pads P2 and P4 overlap at least partially. Moreover, in the y-direction, pads P7, P8, and P6 overlap at least partially. That is, between pads P5 and P6, pad 410 is not positioned on the -y side of pad P4. Therefore, the shortest distance between pads P5 and P6 is longer than the shortest distance between pads P1 and P2. Also, the shortest distance between pads P5 and P6 is longer than the shortest distance between pads P3 and P4. Furthermore, as mentioned above, since pads P5 and P6 are elongated ovals in the y-direction, there is a wide space between pads P5 and P6.
[0084] As shown in Figure 6, the printed circuit board 400 is provided with multiple wirings, including wirings W1, W2, W3, W4, W5, and W6. Wires W1, W2, W3, W4, W5, and W6 are connected to pads P1, P2, P3, P4, P5, and P6, respectively.
[0085] Wiring W5 extends in the y direction from pad P5. Wiring W1 extends in the y direction from pad P1, passing between pads P3 and P4. Wiring W3 extends in the y direction from pad P3, passing between pad P5 and wiring W1, and further passing between wiring W5 and wiring W1. Wiring W2 extends in the y direction from pad P2, passing between pads P4 and P5. Wiring W4 extends in the y direction from pad P4, passing between wiring W1 and wiring W2. Wiring W6 extends in the y direction from pad P6. In other words, wiring W1 passes between pads P3 and P4, wiring W2 passes between pads P4 and P8, wiring W1 and W3 passes between pads P4 and P5, and wiring W1, W2, W3, and W4 passes between pads P5 and P6.
[0086] There are certain constraints on the placement of pads P1-P8 and wiring W1-W2, and it is necessary to pass four wirings W1-W4 between pad P5 and pad P6 while satisfying these constraints. Figure 7 shows only a portion of pads P5, P6 and wiring W1-W6. The pitch of pads P1-P8 is determined by the pitch of the solder balls 310, and the pitch pt between pad P5 and pad P6 is, for example, 1 mm. On the other hand, due to manufacturing limitations, the wiring width w, wiring spacing s, pad-to-wiring spacing d, and pad radius r have minimum values. For example, the minimum value of wiring width w is 0.080 mm, the minimum value of wiring spacing s is 0.090 mm, the minimum value of pad-to-wiring spacing d is 0.100 mm, and the minimum value of pad radius r is 0.100 mm.
[0087] Here, since the minimum value of the wiring width w is smaller than the minimum value of the wiring interval s, the widths of wiring W1, wiring W2, wiring W3, and wiring W4 between pad P5 and pad P6 can be smaller than the spacing between wiring W3 and wiring W1, the spacing between wiring W1 and wiring W4, and the spacing between wiring W4 and wiring W2. Also, since the minimum value of the wiring interval s is smaller than the minimum value of the pad-to-wiring interval d, the spacing between wiring W3 and wiring W1, the spacing between wiring W1 and wiring W4, and the spacing between wiring W4 and wiring W2 can be smaller than the spacing between pad P5 and wiring W3 and the spacing between pad P6 and wiring W2.
[0088] For example, if the widths of wirings W1, W2, W3, and W4 are each set to the minimum wiring width w of 0.080 mm, the spacing between wiring W3 and wiring W1, the spacing between wiring W1 and wiring W4, and the spacing between wiring W4 and wiring W2 are each set to the minimum wiring spacing s of 0.090 mm, and the spacing between pad P5 and wiring W3, and the spacing between pad P6 and wiring W2 are each set to the minimum pad-to-wiring spacing d of 0.100 mm, then the distance DP56 between pad P5 and pad P6 will be 0.080 mm × 4 + 0.090 mm × 3 + 0.100 mm × 2 = 0.790 mm. Therefore, if the radii of pads P5 and P6 are set to the minimum value of pad radius r, which is 0.100 mm, the distance between the center of pad P5 and the center of pad P6 will be 0.790 mm + 0.100 mm × 2 = 0.990 mm, which is within the pitch pt of 1 mm, so it is possible to pass four wires W1 to W4 between pads P5 and P6. In this case, the difference between the pitch pt of 1 mm and the distance between the center of pad P5 and the center of pad P6, which is 0.990 mm, is 0.010 mm. For example, if the spacing between wires W3 and W1 is 0.093 mm, the spacing between wires W1 and W4 is 0.093 mm, and the spacing between wires W4 and W2 is 0.094 mm, the distance between the center of pad P5 and the center of pad P6 can be made to match the pitch pt of 1 mm.
[0089] Furthermore, it is necessary to run two wires W1 and W3 between pad P5 and pad P4 while satisfying the constraints. Figure 8 shows only a portion of pads P3, P4, P5 and wires W1 and W3.
[0090] As mentioned above, the minimum value of the wiring width w is smaller than the minimum value of the wiring interval s, so the width of wiring W3 and the width of wiring W1 can be smaller than the interval between wiring W3 and wiring W1. Also, since the minimum value of the wiring interval s is smaller than the minimum value of the pad-to-wiring interval d, the interval between wiring W3 and wiring W1 can be smaller than the interval between pad P5 and wiring W3 and the interval between pad P4 and wiring W1.
[0091] For example, if the widths of wires W1 and W3 are set to 0.080 mm, which is the minimum value of the wire width w, and the distance between wire W3 and wire W1 is set to 0.090 mm, which is the minimum value of the wire spacing s, and the distance between pad P5 and wire W3 and the distance between pad P4 and wire W1 are set to 0.100 mm, which is the minimum value of the pad-to-wire spacing d, then the distance DP54 between pad P5 and pad P4 is 0.080 mm × 2 + 0.090 mm × 1 + 0.100 mm × 2 = 0.45 mm. In reality, if pads P3, P4, and P5 are placed at a pitch of 1 mm pt, the distance DP54 between pad P5 and pad P4 is 0.4557 mm, so it is possible to pass two wires W1 and W3 between pad P4 and pad P5.
[0092] Furthermore, in the arrangement of pads P1-P8 and wiring W1-W2 shown in Figure 6, the shortest distances between pad P5 and wiring W3, pad P3 and wiring W1, pad P4 and wiring W1, pad P4 and wiring W2, pad P6 and wiring W2, pad P7 and wiring W2, and pad P8 and wiring W2 are greater than the shortest distances between wiring W3 and wiring W1, wiring W1 and wiring W4, and wiring W4 and wiring W2. For example, the shortest distances between pad P5 and wiring W3, pad P3 and wiring W1, pad P4 and wiring W1, pad P4 and wiring W2, pad P6 and wiring W2, pad P7 and wiring W2, and pad P8 and wiring W2 are 0.100 mm, which is the minimum value of the pad-wiring spacing d. On the other hand, the shortest distance between wiring W3 and wiring W1, the shortest distance between wiring W1 and wiring W4, and the shortest distance between wiring W4 and wiring W2 are 0.090 mm, which is the minimum value of the wiring spacing s. In this way, by increasing the shortest distance between each pad and each wiring, sufficient space is secured for the placement of the solder balls 310 connected to each pad.
[0093] Note that terminal Sa is an example of a "first terminal," and terminal Sv is an example of a "second terminal." Pad Pa is an example of a "first pad," and pad Pv is an example of a "second pad." Base board 300 is an example of an "integrated circuit board." Edge 302 is an example of a "first edge," edge 303 is an example of a "second edge," edge 304 is an example of a "third edge," and edge 305 is an example of a "fourth edge." The y direction is an example of a "first direction," and the x direction is an example of a "second direction." Low level is an example of a "first logic level," and high level is an example of a "second logic level."
[0094] 6. Effects As described above, according to the electronic device 1 of this embodiment, if at least one of the terminals Sa, Sb, Sc, and Sd provided on the base substrate 300 of the semiconductor device 100 detaches from the printed circuit board 400, the potential of at least one of the terminals Sa, Sb, Sc, and Sd changes, so the control unit 210 can detect a connection failure between the semiconductor device 100 and the printed circuit board 400 based on that potential. Furthermore, since the semiconductor device 100 has a built-in control unit 210, connection failure inspections can be performed at any time, so connection failures between the semiconductor device 100 and the printed circuit board 400 caused by aging can be detected quickly. Moreover, since the semiconductor device 100 has a built-in control unit 210, there is no need to mount a circuit on the printed circuit board 400 to detect connection failures between the semiconductor device 100 and the printed circuit board 400, thus reducing the cost of the printed circuit board 400.
[0095] Furthermore, according to the electronic device 1 of this embodiment, if warping occurs in the base substrate 300 of the semiconductor device 100 due to aging, terminals Sa, Sb, Sc, and Sd are provided at the four corners of the base substrate 300, which are the locations where the probability of connection failure is highest, thus improving the accuracy of detecting connection failures.
[0096] Furthermore, according to the electronic device 1 of this embodiment, since the terminal Sv connected to the power supply wiring is located in the central region of the base substrate 300 of the semiconductor device 100, the possibility of terminal Sv peeling off before terminals Sa, Sb, Sc, and Sd is low. Therefore, it is less likely that the control unit 210 will be unable to detect a connection failure because the power supply voltage VDD is not supplied to the integrated circuit chip 200. In addition, because the power supply voltage VDD is supplied from a position close to the center of the integrated circuit chip 200 by terminal Sv, the voltage drop of the power supply voltage VDD supplied to each part of the integrated circuit chip 200 is reduced, and the risk of the integrated circuit chip 200 malfunctioning is reduced. Furthermore, in the printed circuit board 400, the pad Pv connected to terminal Sv is positioned further inside than the other pads, so that the pad Pv does not obstruct the routing of wires from the other pads.
[0097] Furthermore, in the electronic device 1 according to this embodiment, as shown in Figure 6, on the printed circuit board 400, pads P5 and P6 are positioned closest to the edge 302 of the base board 300, pads P3, P4 and P8 are positioned next closest to the edge 302, and pads P1, P2 and P7 are positioned next closest to the edge 302. In addition, on the printed circuit board 400, pads P1 to P8 are arranged in a grid pattern, and there is a large space between pad P5 and pad P6. Therefore, according to the electronic device 1 according to this embodiment, on the printed circuit board 400, four wires W1 to W4 that connect to pads P1 to P4 can be drawn out through the space between pads P5 and P6.
[0098] Furthermore, according to the electronic device 1 of this embodiment, by making pads P5 and P6 oval-shaped, the distance between pads P5 and P6 can be increased, making it easier to pull out wiring W1 to W4 through the space between pads P5 and P6. Also, by making pads P3 and P4 oval-shaped, the distance between pads P3 and P4 can be increased, making it easier to pull out wiring W1 through the space between pads P3 and P4. Moreover, by making pad P8 oval-shaped, the distance between pads P4 and P8 can be increased, making it easier to pull out wiring W2 through the space between pads P4 and P8.
[0099] The present invention is not limited to this embodiment, and various modifications can be implemented within the scope of the gist of the present invention.
[0100] For example, in this embodiment, the package 330 of the semiconductor device 100 was described as a BGA (Ball Grid Array), but the package 330 may be a surface mount package other than BGA, such as a SiP (System-in-Package), LGA (Land Grid Array), or WPP (Wafer Process Packaging). For example, if the package 330 is an LGA, the terminals of the semiconductor device 100 are lands provided on the package 330, and the lands, which are the terminals of the semiconductor device 100, are connected to the pads 410 provided on the printed circuit board 400 by solder balls 310.
[0101] Although embodiments have been described above, the present invention is not limited to these embodiments and can be implemented in various forms without departing from its spirit. For example, the above embodiments can be combined as appropriate.
[0102] The present invention includes configurations substantially identical to those described in the embodiments, for example, configurations with the same function, method, and results, or configurations with the same purpose and effect. Furthermore, the present invention includes configurations in which non-essential parts of the configurations described in the embodiments are replaced. Furthermore, the present invention includes configurations that produce the same effects or achieve the same purpose as those described in the embodiments. Finally, the present invention includes configurations that add known technology to the configurations described in the embodiments.
[0103] The following conclusions can be drawn from the embodiments described above.
[0104] One aspect of electronic equipment is, Printed circuit board and A semiconductor device mounted on the aforementioned printed circuit board, Equipped with, The aforementioned semiconductor device is An integrated circuit chip including a determination unit, An integrated circuit substrate, which is a substrate on which the aforementioned integrated circuit chip is mounted, It has, The aforementioned integrated circuit board is provided with a plurality of terminals, The aforementioned printed circuit board is provided with a plurality of pads and a plurality of wirings. Each of the aforementioned multiple terminals is connected to each of the aforementioned multiple pads, The aforementioned plurality of wirings include constant potential wiring, The first pad among the plurality of pads is connected to the constant potential wiring, The first terminal among the plurality of terminals is connected to the first pad, The determination unit determines whether or not there is a connection defect between the semiconductor device and the printed circuit board based on the potential of the first terminal.
[0105] According to this electronic device, if a first terminal on the integrated circuit board of a semiconductor device detaches from the printed circuit board, the connection between the first terminal and the first pad is broken, and the potential of the first terminal changes. The detection unit can then detect a connection failure between the semiconductor device and the printed circuit board based on the potential of the first terminal. Furthermore, because the semiconductor device has a built-in detection unit, connection failures can be checked at any time, allowing for the rapid detection of connection failures between the semiconductor device and the printed circuit board caused by aging. In addition, because the semiconductor device has a built-in detection unit, there is no need to mount a circuit on the printed circuit board to detect connection failures between the semiconductor device and the printed circuit board, thus reducing the cost of the printed circuit board.
[0106] In one embodiment of the electronic device, The aforementioned integrated circuit substrate has a first side, a second side opposite the first side, a third side, and a fourth side opposite the third side. In the first direction from the second side toward the first side, none of the plurality of terminals are located between the first terminal and the first side. In the second direction from the fourth side toward the third side, none of the plurality of terminals are required to be located between the first terminal and the third side.
[0107] According to this electrical device, if warping occurs in the integrated circuit board of a semiconductor device due to aging, the first terminal is provided at the corner of the integrated circuit board, which is the location with the highest probability of connection failure, thus improving the accuracy of detecting connection failures.
[0108] In one embodiment of the electronic device, The integrated circuit substrate has a first edge and a second edge opposite to the first edge, The aforementioned multiple wirings include power supply wiring. The second pad among the plurality of pads is connected to the power supply wiring, The second terminal among the plurality of terminals is connected to the second pad, The shortest distance between the first terminal and the first side is smaller than the shortest distance between the first terminal and the second side. The shortest distance between the second terminal and the first side is greater than the shortest distance between the first terminal and the first side. The shortest distance between the second terminal and the second side may be greater than the shortest distance between the first terminal and the first side.
[0109] According to this electrical device, in the integrated circuit board of a semiconductor device, the second terminal connected to the power supply wiring is located closer to the center than the first terminal, making it less likely for the second terminal to detach before the first terminal. Therefore, situations where the power supply voltage is not supplied to the integrated circuit chip and the detection unit cannot detect a connection failure are less likely to occur. Furthermore, because the power supply voltage is supplied from a position closer to the center of the integrated circuit chip via the second terminal, the voltage drop in the power supply voltage supplied to each part of the integrated circuit chip is reduced, thereby reducing the risk of the integrated circuit chip malfunctioning. Furthermore, in the printed circuit board, the second pad connected to the second terminal is positioned further inside than the other pads, so the second pad does not obstruct the routing of wires from the other pads.
[0110] In one embodiment of the electronic device, The determination unit may determine whether or not there is a connection failure based on the logic level of the potential of the first terminal immediately after the second terminal reaches the power supply potential.
[0111] According to this electronic device, the detection unit determines whether there is a connection problem each time the semiconductor device is started up, so connection problems due to aging can be detected quickly.
[0112] In one embodiment of the electronic device, The aforementioned integrated circuit chip is The system includes a detection unit that outputs an interrupt signal to the determination unit when the potential of the first terminal changes from a first logic level to a second logic level. The determination unit may determine that the connection failure has occurred when the interrupt signal is input.
[0113] According to this electronic device, the detection unit does not need to determine whether there is a connection problem until an interrupt signal is input, so it can prioritize other processes.
[0114] One embodiment of the aforementioned electronic device is: A recording device that records onto a medium, A transport motor for transporting the aforementioned medium, A power supply circuit that supplies power to the transport motor, Equipped with, If the determination unit determines that a connection failure has occurred, it may stop supplying power from the power supply circuit to the transport motor.
[0115] According to this electronic device, if there is a connection problem between the semiconductor device and the printed circuit board, the recording device may not be able to record to the medium properly. By stopping the power supply to the transport motor, the medium will not be wasted.
[0116] One embodiment of the aforementioned electronic device is: The aforementioned printed circuit board has a reset IC mounted on it. If the determination unit determines that the connection failure has occurred, it sends a control signal to the reset IC. The reset IC may receive the control signal and reset the semiconductor device.
[0117] According to this electronic device, if the detection unit detects a connection problem, the semiconductor device is reset, thus reducing the risk of malfunction caused by connection problems. [Explanation of Symbols]
[0118] 1…Electronic device, 2…PC, 3…SD card, 10…Image reader, 12…Main unit, 13…Recording device, 16…Operation unit, 18…Opening, 20…Drawer unit, 22…Front tray, 24…Rear tray, 26…Paper storage unit, 27…ADF, 28…Document transport unit, 40…Document placement surface, 42…Document output surface, 44…Cover, 50…Main board, 51…Sub-board, 52…Sub-board, 61…Motor, 62…Print head, 63…Scanner module, 64…Wireless LAN module, 65…LCD, 71,72,73…Cable, 100…Semiconductor device, 110…Motor driver, 120…Head drive IC, 130…Serial flat 140...DDR, 151,152,153,154...Connector, 160...LCD control IC, 170...SD control IC, 181...Connector, 190...Power supply circuit, 192...Reset IC, 200...Integrated circuit chip, 210...Control unit, 221,222,223...USB interface circuit, 231,232...Memory interface circuit, 241,241-1~241-n...GPIO, 250...Detection unit, 260...Storage unit, 261...ROM, 26 2…RAM, 263…Register, 270a,270b,270c,270d…Resistor, 300…Base board, 301…Terminal mounting side, 302,303,304,305…Edges of the base board, 310,310a,310b,310c,310d,310v…Solder ball, 320a,320b,320c,320d,320v…Wiring, 330…Package, 350…Enclosure, 370…Bonding material, 380…Bonding wire, 400…Printed circuit board, 410…Pad
Claims
1. Printed circuit board and A semiconductor device mounted on the aforementioned printed circuit board, Equipped with, The aforementioned semiconductor device is An integrated circuit chip including a determination unit, An integrated circuit substrate, which is a substrate on which the aforementioned integrated circuit chip is mounted, It has, The aforementioned integrated circuit board is provided with a plurality of terminals, The aforementioned printed circuit board is provided with a plurality of pads and a plurality of wirings. Each of the aforementioned multiple terminals is connected to each of the aforementioned multiple pads, The aforementioned plurality of wirings include constant potential wiring, The first pad among the plurality of pads is connected to the constant potential wiring, The first terminal among the plurality of terminals is connected to the first pad, The determination unit determines whether or not there is a connection defect between the semiconductor device and the printed circuit board based on the potential of the first terminal. An electronic device characterized by the following features.
2. The integrated circuit substrate has a first side, a second side opposite the first side, a third side, and a fourth side opposite the third side. In the first direction from the second side toward the first side, none of the plurality of terminals are located between the first terminal and the first side. In the second direction from the fourth side toward the third side, none of the plurality of terminals are located between the first terminal and the third side. The electronic device according to feature 1.
3. The integrated circuit substrate has a first side and a second side opposite to the first side, The aforementioned multiple wirings include power supply wiring. The second pad among the plurality of pads is connected to the power supply wiring, The second terminal among the plurality of terminals is connected to the second pad, The shortest distance between the first terminal and the first side is smaller than the shortest distance between the first terminal and the second side. The shortest distance between the second terminal and the first side is greater than the shortest distance between the first terminal and the first side. The shortest distance between the second terminal and the second side is greater than the shortest distance between the first terminal and the first side. The electronic device according to feature 1.
4. The determination unit determines whether or not there is a connection failure based on the logic level of the potential of the first terminal immediately after the second terminal reaches the power supply potential. The electronic device according to feature 3.
5. The aforementioned integrated circuit chip is The system includes a detection unit that outputs an interrupt signal to the determination unit when the potential of the first terminal changes from a first logic level to a second logic level. The determination unit determines that the connection failure has occurred when the interrupt signal is input. The electronic device according to feature 1.
6. A recording device that records onto a medium, A transport motor for transporting the aforementioned medium, A power supply circuit that supplies power to the transport motor, Equipped with, If the determination unit determines that a connection failure has occurred, it stops supplying power from the power supply circuit to the transport motor. The electronic device according to feature 1.
7. A reset IC is mounted on the aforementioned printed circuit board. If the determination unit determines that the connection failure has occurred, it sends a control signal to the reset IC. The reset IC receives the control signal and resets the semiconductor device. The electronic device according to feature 1.