Defective sector management for magnetic data storage disks

Abstract

This provides a data storage device that performs merging of G lists into P lists. [Solution] The data storage device 100 includes a disk 120, a P list indicating defective sectors during formatting, a G list indicating defective sectors after formatting, and a memory 178 that stores an inactive P list containing entries to be accepted from the G list. Entries in the G list are merged into the P list by sequentially reallocating a descending set of logical addresses from each set of sectors to a temporary storage area and reserving a portion of the sectors for the set of P list entries to be shifted. Entries for the P list entries to be shifted are held in the inactive P list for growing defective sectors, and the set of P list entries to be shifted is reduced by the number of retained entries before shifting toward the next set of sectors. The descending set of logical addresses is reallocated from the temporary storage area to non-defective sectors.

Description

Technical Field

[0001] A data storage device (DSD) is often used to record data on a storage medium or to reproduce data from a storage medium. One type of storage medium includes a rotating disk in a hard disk drive (HDD) or the like. In such a DSD, user data is magnetically stored in sectors arranged on concentric tracks on the disk surface. Due to the manufacturing process, some sectors may be defective, or unable to reliably store data, or unable to reliably read data from defective sectors. These defective sectors are usually identified by the DSD manufacturer when formatting the disk surface and are called "primary defects".

[0002] The primary defects are added to a primary defect list (P-list), and the defective sectors are skipped during operation and become unavailable for storing data. In this regard, the P-list can prevent the physical locations of the defective sectors from appearing in the logical-physical mapping or conversion table used to read and write data logically addressed by the host.

[0003] Defective sectors identified after formatting the disk surface or during the operation of the DSD are called "growth defects". Growth defects are typically added to a growth defect list (G-list) that is used in the same way as the P-list to skip defective sectors during operation. Any data stored in the growth defect sectors may be attempted to be relocated to another sector, and the logical-physical conversion table may be updated to remove the physical locations of the growth defects to prevent data from being written to the growth defect sectors.

[0004] As the amount of data stored on the latest DSDs continues to increase, the number of sectors on the disk surface is also increasing to accommodate more data. In addition to the small physical size of sectors, the large number of sectors generally leads to an increase in the number of growth defects added to the G-list during operation. In some cases, the G-list may need to be increased to accommodate more growth defects. However, moving growth defect locations from the G-list to available space in the P-list is typically not an option in this area, as merging the G-list to the P-list can only be done using a format command (e.g., a format unit command) that traditionally reformats the disk surface. Reformatting the disk surface can take more than a day to complete and may also reinitialize the logical-to-physical translation table, which effectively erases all user data stored on the disk surface. [Brief explanation of the drawing]

[0005] The features and advantages of the embodiments of this disclosure will become more apparent from the detailed description below when interpreted in conjunction with the drawings. The drawings and related description are provided to illustrate the embodiments of this disclosure and not to limit the scope of the claims. [Figure 1] This is a plan view of an exemplary data storage device (DSD) according to one or more embodiments. [Figure 2A] An example of merging a growth defect list (G list) into a primary defect list (P list) according to one or more embodiments is shown. [Figure 2B] An example of merging a growth defect list (G list) into a primary defect list (P list) according to one or more embodiments is shown. [Figure 2C] An example of merging a growth defect list (G list) into a primary defect list (P list) according to one or more embodiments is shown. [Figure 2D]An example of merging a growth defect list (G list) into a primary defect list (P list) according to one or more embodiments is shown. [Figure 2E] An example of merging a growth defect list (G list) into a primary defect list (P list) according to one or more embodiments is shown. [Figure 2F] An example of merging a growth defect list (G list) into a primary defect list (P list) according to one or more embodiments is shown. [Figure 3] Initial variations of the examples in Figures 2A to 2F show how to merge a G list into a P list according to one or more embodiments. [Figure 4A] A flowchart illustrating an exemplary G-list background merge process in one or more embodiments is provided. [Figure 4B] A flowchart illustrating an exemplary G-list background merge process in one or more embodiments is provided. [Figure 5] This is a flowchart of the command execution process during G-list merging according to one or more embodiments of the present invention. [Figure 6] This is a flowchart of the P-list switching process according to one or more embodiments. [Figure 7] This is a flowchart of the process for resuming a G-list merge after interruption, according to one or more embodiments. [Modes for carrying out the invention]

[0006] The following detailed description includes numerous specific details to provide a complete understanding of the disclosure. However, it will be apparent to those skilled in the art that various embodiments disclosed may be carried out without some of these specific details. In other examples, well-known structures and techniques are not described in detail to avoid unnecessarily obscuring the various embodiments.

[0007] Exemplary data storage device Figure 1 is a plan view of an exemplary data storage device (DSD) 100 according to one or more embodiments illustrating an exemplary operating environment. In some implementations, the DSD 100 may include a hard disk drive (HDD) or other types of DSDs, the other types of DSDs comprising a rotating magnetic disk as a data recording medium, such as a solid-state hybrid drive (SSHD) which may include solid-state non-volatile memory in addition to one or more disks.

[0008] As shown in the example in Figure 1, the DSD100 comprises a slider 114 including a magnetic read / record head 112. Collectively, the slider 114 and head 112 may be referred to as the head slider. The DSD100 further comprises at least one head gimbal assembly (HGA) 110, the HGA 110 comprising the head slider, a lead suspension 116 typically attached to the head slider via a flexure, and a load beam 118 attached to the lead suspension 116.

[0009] The DSD100 also includes at least one disk 120 rotatably mounted on a spindle 124, and a drive motor (not shown) attached to the spindle 124 for rotating the disk 120. The head 112 includes a write unit or write element and a read unit or read element, for writing and reading data stored on the disk 120 of the DSD100, respectively. The disk 120, or a plurality of disks stacked below the disk 120, can be attached to the spindle 124 by disk clamps 128.

[0010] As shown in Figure 1, the DSD100 further includes an arm 132 mounted on the HGA110, a carriage 134, a voice-coil motor (VCM) including an armature 136 and a voice coil 140 mounted on the carriage 134, and a stator 144 including a voice coil magnet (not shown). The armature 136 of the VCM is mounted on the carriage 134 and is configured to move the arm 132 and the HGA110 to access a portion of the disk 120, and is attached to the pivot shaft 148 by an interposed pivot bearing assembly 152. In the case of multiple disks, the carriage 134 is arranged to carry a series of arms that are interlocked to resemble a comb, and may therefore be referred to as an "E-block" or comb.

[0011] An assembly comprising a head gimbal assembly (e.g., HGA110) including a flexure to which a head slider is coupled, an actuator arm (e.g., arm 132) and / or a load beam to which the flexure is coupled, and an actuator (e.g., VCM) to which the actuator arm is coupled, can be collectively referred to as a head stack assembly (HSA). However, an HSA may include more or fewer components than those described. For example, an HSA may refer to an assembly that further includes electrical interconnection components. Generally, an HSA is an assembly configured to move the head slider to access portions of disk 120 for read and write operations.

[0012] Referring further to Figure 1, electrical signals (e.g., current to the voice coil 140 of the VCM), including write signals to the head 112 and read signals from the head 112, are provided by a flexible interconnect cable 156 ("flex cable"). An Arm-Electronics (AE) module 160 may have an onboard preamplifier for the read signals, as well as other read and write channel electronics, and provides the connection between the flex cable 156 and the head 112. The AE module 160 may be mounted on the carriage 134 as shown, or may be included as part of the circuitry 166 of the controller 170. The flex cable 156 is coupled to an electrical connector block 164, which provides electrical communication to the controller 170 located beneath the electrical connector block 164 via an electrical feedthrough provided by a base or housing 168. Together with the cover, the housing 168 provides a sealed protective enclosure for the data storage components of the DSD 100.

[0013] Other electronic components, including a disk controller and servo electronics which may further include a digital-signal processor (DSP), provide electrical signals to the drive motor, the voice coil 140 of the VCM, and the head 112 of the HGA 110. The electrical signals provided to the drive motor enable the drive motor to spin while providing torque to the spindle 124, which is then transmitted to the disk 120 attached to the spindle 124. As a result, the disk 120 spins in direction 172. The disk 120 forms a gas cushion that acts as a gas bearing, on which the gas bearing surface (GBS) of the slider 114 rests, thereby causing the slider 114 to float above the surface of the disk 120 without contacting the thin magnetic recording layer of the disk 120 on which data is recorded.

[0014] The electrical signals supplied to the voice coil 140 of the VCM enable the head 112 of the HGA 110 to access tracks such as track 176 on which data is recorded. Thus, the armature 136 of the VCM swings along the arc 180, which enables the head 112 of the HGA 110 to access various tracks on the disk 120. The data is stored on the disk 120 in multiple radially nested tracks located within sectors on the disk 120, such as sector 188 of track 176 in the wedge 184. Each track on the disk surface consists of multiple sectors, such as sector 188, which can store the recorded data and a header containing a servo burst signal pattern. The servo burst signal pattern may include, for example, an ABCD servo burst signal pattern, which is information identifying track 176, and error correction code information. When accessing track 176, the reading element of the head 112 of the HGA110 reads a servo burst signal pattern, which provides a position-error-signal (PES) to the servo electronics, which controls the electrical signal provided to the voice coil 140 of the VCM, enabling the head 112 to follow track 176. Once track 176 is found and sector 188 is identified, the head 112 reads data from or writes data to track 176 in response to instructions, such as instructions received by the controller 170 from an external host, such as a microprocessor of a computer system.

[0015] In the example in Figure 1, the controller 170 is shown by a dashed line connected to the electrical connector block 164 to indicate that the controller 170 is communicating with the electrical connector block 164. As will be understood by those skilled in the art, in some implementation forms, the controller 170 may include a printed circuit board (PCB) coupled to the bottom surface of the DSD 100, such as a housing 168. As shown in the example in Figure 1, the controller 170 comprises a circuit 166 and at least one memory 174, the memory 174 may include dynamic random access memory (DRAM) or other solid-state memory such as storage class memory (SCM) used for rapid access to data.

[0016] While the description herein generally refers to solid-state memory, it should be understood that solid-state memory may include one or more of various types of memory devices, such as flash integrated circuits, NAND memory (e.g., single-level cell (SLC) memory, multi-level cell (MLC) memory (i.e., two or more levels), or any combination thereof), NOR memory, electrically erasable programmable read-only memory (EEPROM), chalcogenide RAM (C-RAM), phase-change memory (PCM), programmable metallization cell RAM (PMC-RAM or PMCm), ovonic unified memory (OUM), resistive RAM (RRAM®), ferroelectric memory (FeRAM), magnetoresistive RAM (MRAM), 3D-XPoint memory, and / or other discrete non-volatile memory (NVM) chips, or any combination thereof.

[0017] Circuit 166 can include electronic components for performing different functions for the operation of DSD, such as an interface controller, a read / write integrated circuit (R / W IC), an AE module, a motor driver, a servo processor, and other digital processors and associated memories. In this regard, circuit 166 can include one or more processors for executing instructions, such as a microcontroller, a DSP, an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), a graphics processing unit (GPU), hardwired logic, analog circuits, and / or combinations thereof. In some implementations, circuit 166 can include a system on a chip (SoC), and the SoC can also include one or more memories of at least one memory 174.

[0018] As shown in FIG. 1, at least one memory 174 stores a defect module 10, an active primary defect list (P-list) 12, an inactive P-list 14, a growing defect list (G-list) 16, and a logical-physical conversion table 18 (i.e., the L2P conversion table 18 of FIG. 1). As described above, for the manufacture of the disk, some sectors on the disk of DSD100 may have defects, or may not be able to reliably store data, or may not be able to reliably read data from defective sectors. These defective sectors are usually identified by the DSD manufacturer when formatting the disk surface for storing data and are called "primary defects".

[0019] The first defects are added to the active P list 12, and the defective sectors are skipped during operation and become unavailable for storing data. In this regard, the active P list 12 can prevent the physical locations of the defective sectors from appearing in the logical-physical conversion table 18 used to read and write data logically addressed by the host.

[0020] After formatting the disk surface or during the operation of the DSD100, defective sectors identified are called "growing defects". Growing defects are added to the G list 16, which is used in the same way as the active P list 12 to skip defective sectors during operation. Any data stored in the growing defective sectors may be attempted to be relocated to another sector, and the logical-physical conversion table 18 may be updated to remove the physical locations of the growing defective sectors to prevent data from being written to the growing defective sectors.

[0021] As described above, the number of sectors on the disk surface has increased to store more data. In addition to the small physical size of the sectors, the large number of sectors generally causes an increase in the number of growing defects added to the G list of the DSD during operation. In conventional systems, the G list may need to be increased to accommodate more growing defects. The movement of growing defects from the G list to the P list is typically not an option in the field of conventional DSDs because merging the G list into the P list can only be performed via a special format command (e.g., format unit command) that reformats the disk surface. Reformatting the disk surface takes a very long time, such as more than a day, and also involves re-initializing the logical-physical conversion table, which effectively erases all user data stored on the disk surface.

[0022] As will be explained in more detail below, this disclosure facilitates merging Glist entries into an active Plist by using an inactive Plist as a background activity that allows read and write commands to be executed during the merge. Furthermore, the use of an inactive Plist and the process described below provides a safer way to merge Glists into Plists without having to reformat the disk and rely on data backups, which adds complexity and time to the merge by requiring a backup of all data before reformatting and then restoring the data from the backup.

[0023] Referring to Figure 1, the defect module 10 may include computer-executable instructions executed by circuit 166 to merge entries in the G list 16 into the inactive P list 14 and the active P list 12. The defect module 10 may also include instructions for managing defects, such as creating entries for the P list and the G list, or mapping out or removing physical addresses from the logic-physical translation table 18.

[0024] The active P list 12 may include, for example, entries for physical block addresses (PBAs) or absolute block addresses (ABAs) that identify the location of primary defective sectors. In this regard, PBAs or ABAs may refer to sequential addressing of sectors on one or more disk surfaces of the DSD 100, regardless of their defective or non-defective state. This disclosure refers to PBAs for ease of explanation, but those skilled in the art will understand that references to PBAs may include ABAs in other implementations.

[0025] In some implementations, the inactive P-list 14 may include the same defective sectors identified in the active P-list 12, along with additional entries for defective G-list sectors that are added to the active P-list. The G-list 16 may include entries for medium block addresses (MBAs) that identify the locations of growing defective sectors that can be merged or moved from the G-list to the active P-list using the methods and systems of this disclosure. The MBA may provide sequential addressing that skips defective sectors identified by the active P-list and therefore contains fewer addresses than the PBA that contains the addresses of the defective sectors in the active P-list. In other implementations, the G-list 16 may instead include entries for PBAs or ABAs that identify the locations of growing defective sectors, similar to the P-list.

[0026] The logical-to-physical conversion table 18 can provide a mapping between logical addresses (e.g., logical block addresses (LBAs)) used by a host communicating with the DSD 100 to identify data, and the sectors on the disk surface where the data is stored. In some implementations, the logical-to-physical conversion table 18 includes LBAs and their corresponding MBAs, and can identify the sectors where data is stored relative to the LBAs. The logical-to-physical conversion table 18 can be updated based on the addition of growing defects to the G list and the relocation of data to different sectors.

[0027] In the example in Figure 1, the DSD100 includes non-volatile memory (NVM) 178 which may contain solid-state memory. The NVM 178 may optionally store copies of inactive P lists (i.e., P lists 03 20), G lists (i.e., G lists 22), active P lists (i.e., active P lists 24), and logical-to-physical translation tables (i.e., L2P translation tables 28). As shown in Figure 1, the NVM 178 may also include temporary storage areas (i.e., temporary storage areas 26) used for the G list merging process. As indicated by the dashed outlines in Figure 1, one or more of these data structures and / or temporary storage areas 26 may be alternatively stored on other non-volatile media of the DSD100, such as disk 120. In the case of P-list 03 20, the inactive P-list version may be non-volatilely stored or checkpointed through the G-list merge process, and may also indicate a sequence number (e.g., "03" in the example of P-list 03 20 in Figure 1), which may be used to resume the merge process after interruption or pause, such as after restarting the DSD100 following a power loss or other type of shutdown of the DSD100.

[0028] As those skilled in the art will understand with reference to this disclosure, other implementations of the DSD100 may differ from the example shown in Figure 1. For example, other implementations of the DSD100 may not include the NVM178, prioritizing the non-volatile storage of temporary storage areas and copies of the P list, G list, and logical-physical translation tables on one or more disks of the DSD100. In another exemplary variation, a portion of the circuit 166 may be located outside the controller 170, for example, by forming part of the AE module 160.

[0029] Figures 2A to 2F illustrate examples of merging a G-list, such as G-list 16 in Figure 1, into a P-list, such as the active P-list 12 in Figure 1, according to one or more embodiments. Figures 2A to 2F show a sequence of operations that may be performed to merge entries from a G-list into a P-list, which accepts growing defective entries from a G-list, starting from the highest logical address and moving or shifting toward lower logical addresses, using a shifting set of P-list entries from an inactive version of the P-list (e.g., inactive P-list 14 in Figure 1).

[0030] As will be explained in more detail below, such merging of a G list into a P list limits changes to the logical-to-physical translation table (e.g., L2P translation table 18 in Figure 1) to chunks or groups of logical and physical addresses, allowing host commands to continue executing during the merge. An active version of the P list (e.g., the active P list 12 in Figure 1) may be used by the DSD to perform the assignment of logical addresses to physical addresses on at least one disk during the merge process, so as not to interfere with the operation of read and write commands running on at least one disk.

[0031] As shown in the first step indicated by the circled "1" at the top of Figure 2A, one or more disk surfaces (for example, the surface of disk 120 in Figure 1) contain sectors or blocks that are logically addressed between the leftmost LBA of 0 and the rightmost LBA of MAX. As shown by Active P-list_0 and Inactive P-list_1, at least one disk surface contains primary defects having entries in both versions of P-lists A, B, C, D, and E corresponding to primary defective sector locations 301, 302, 303, 304, and 305. At least one disk surface also contains growing defects having entries in G-lists 1, 2, 3, 4, 5, 6, and 7 corresponding to growing defective sector locations 321, 322, 323, 324, 325, 326, and 327.

[0032] As described above, entries in the P list may include a PBA or another type of address or physical locator to identify primary defective sectors such as ABAs. In the examples in Figures 2A to 2F, the G list can identify growing defective sectors using an MBA that can skip primary defective sectors identified in the P list. In other implementations, the G list can identify growing defective sectors without skipping primary defective sectors, using a PBA or ABA, similar to the P list.

[0033] In the initial stages before growth defects are added to the P list, the inactive P list may be a copy of the active P list. The physical locations indicated by the list entries for primary and growth defects are shown in the first step of Figure 2A, and the entry identifiers are shown on the sector or block as "A", "B", "C", "D", and "E" for primary defects and as "1", "2", "3", "4", "5", "6", and "7" for growth defects.

[0034] Temporary storage area 36 is also shown in Figure 2A and acts as a temporary storage location for rearranging data from sectors to make room for a shifting set of P list entries. Temporary storage area 36 may, for example, be part of at least one disk that is unused or otherwise available. In some implementations, temporary storage area 36 may be part of the unused portion 34. In other implementations, temporary storage area 36 may be located in another type of non-volatile memory of the DSD, such as NVM178 in the example of Figure 1 which has temporary storage area 26. In such implementations, a separate logical-physical translation table may be used for NVM178 in addition to the logical-physical translation table used for at least one disk.

[0035] In the second step, indicated by the circled "2" in Figure 2A, data stored in a predetermined number of sectors addressed by the highest logical address (i.e., the seven sectors assigned the highest LBA in Figure 2A) is relocated to temporary storage area 36. The data relocation is indicated in the second step by cross-hatching of blocks moving from the first set of sectors to temporary storage area 36. The logical addresses assigned to the first set of sectors are temporarily reassigned in the logical-to-physical translation table, along with the physical location or address (e.g., MBA) of the sector or block in temporary storage area 36.

[0036] The sectors freed or made available by reallocating the logical addresses of the set of sectors are associated with a set of shifting P-list entries (i.e., the inactive P-list entries "F", "G", "H", "I", "J", "K", and "L" in the second step) that are added to P-list_1, which is the currently inactive version of the P-list, in order to absorb or accept growing defect entries from the G-list. A predetermined number of logical addresses reallocated to temporary storage area 36 (i.e., seven sectors in the example of Figure 2A) is equal to the initial number of entries in the G-list (i.e., seven G-list entries in Figure 2A). In this regard, the predetermined number of logical addresses reallocated corresponds to the initial number of shifting P-list entries and may be less than or equal to the initial total number of G-list entries. In implementations where the predetermined number of reallocated logical addresses or the initial number of shifting P-list entries is less than the complete initial number of G-list entries, the P-list accepts or absorbs only a portion of the G-list entries equal to the predetermined number.

[0037] As shown in the second step of Figure 2A, the inactive P list is incremented by adding seven new entries to inactive_plist_1 for the shifting set of P list entries "F", "G", "H", "I", "J", "K", and "L". In some implementations, a copy of the inactive P list (Plist_1) may be checkpointed or stored non-volatilely. The sequence number of the checkpointed inactive P list may be incremented (e.g., from "0" to "1") to track the progress of the G list merge process in case of interruption or pause in the merge process.

[0038] In the third step of Figure 2A, the logical address with the highest logical address is reallocated from the temporary storage area 36 to an unused portion 34 of at least one disk. The size of the unused portion 34 is reduced by only seven sectors or blocks to store the data as a result of the reallocation of the logical address. At this point, the logical-physical translation table is updated again to reflect the new physical location of the reallocated logical address. As shown in the following steps, the reallocation of data from the set of sectors to the temporary storage area 36 facilitates the shifting of the set of P list entries to be shifted.

[0039] The roles of Plist_0 and Plist_1 are switched in the third step, with Plist_1 designated as the new active version of the Plist and Plist_0 designated as the new inactive version of the Plist. Switching between the active and inactive versions of the Plist may allow fragmentary or continuous changes to the Plist without affecting the operation of read and write commands, as changes that may be required in the logical-physical translation table to execute commands may depend on the active version of the Plist. After the role switch, the new inactive Plist (Plist_0) is updated in the third step to add the shifting Plist entries "F", "G", "H", "I", "J", "K", and "L". Existing checkpointed copies of the old active Plist (Plist_0) (e.g., active Plist 24 in Figure 1) may be updated with a copy of the new active Plist (Plist_1). As described above for the second step, a copy of the old inactive P-list (P-list_1) may be checkpointed or non-volatilely stored before P-list_1 is designated as the new active P-list in order to track or preserve the progress of the G-list merge process. The inactive and active versions of the P-list are the same in the third step of the example in Figure 2A.

[0040] In the fourth step shown in Figure 2B, the next descending set of logical addresses (e.g., from higher LBA to lower LBA) is reallocated to the temporary storage area 36 from the next or consecutive set of sectors to make room for the shifting P list entry to shift or move to the next set of sectors on at least one disk. At this point, the set of sectors corresponding to the reallocated logical address includes the growing-defect sector location 327 identified by entry "7" in the G list. The data in this growing-defect sector may have already been reallocated to another sector or block at a different location as part of the growing-defect processing process. In the example in Figure 2B, the data in this growing-defect sector is relocated to block or sector location 381 in the temporary storage area 36. In other implementations, the reallocated data may remain in its non-defect location instead of being relocated to block or sector location 381.

[0041] In the fifth step shown in Figure 2B, the set of P-list entries to be shifted is shifted or moved to the next seven sectors that have been freed or made available by reallocating the logical address and relocating the associated data to the temporary storage area 36. As shown in the fifth step, the P-list entries to be shifted in the currently inactive P-list (P-list_0) are designated with lowercase "e", "f", "h", "i", "j", "k", and "l" to distinguish them from the uppercase entries "E", "F", "H", "I", "J", "K", and "L" of the same character in the currently active P-list (P-list_1). In particular, the "g" entry in the inactive P-list has been reallocated from the previous "E" entry in the active P-list at the primary defect location 305, and since an entry in the P-list is already allocated at this location, it does not consume or reduce the number of P-list entries to be shifted. A copy of the updated inactive P-list (P-list_0) may be checkpointed or stored non-volatilely to track or save the progress of the G-list merge process, and / or the sequence number of the inactive P-list may also be incremented.

[0042] The next set of sectors corresponding to the descending set of reallocated logical addresses is reserved for the shifting P-list entries of the inactive P-list by moving or shifting the shifting P-list entries to lower logical addresses (i.e., to the left in Figure 2B) until the first available sector freed up by the reallocation of logical addresses and the rearrangement of associated data is reached. The new positions of the set of shifting P-list entries extend to primary defect location 305 and growing defect location 327. Entry "g" of the shifting P-list entries indicates primary defect location 305 in the inactive P-list, and entry "E" of the active P-list indicates primary defect location 305. Entry "i" of the shifting P-list entries indicates growing defect location 327 in the inactive P-list, and entry "7" of the G-list indicates growing defect location 327.

[0043] The entries in the active P list do not change their positions in the fifth step. As a result, the positions indicated by "F", "G", "H", "I", "J", "K", and "L" remain temporarily unavailable for the allocation of new logical addresses (e.g., logical addresses added by the host, or existing logical addresses being reassigned from different positions), even if these positions are otherwise not defective. However, the impact of this temporary unavailability is limited by the size of a predetermined number of shifted P list entries. In this regard, the impact of this temporary effect can be balanced against the number of G list entries added to the P list when determining a predetermined number of shifted P list entries.

[0044] The roles of Plist_0 and Plist_1 are switched again in step 6, with Plist_0 designated as the new active version of the Plist and Plist_1 designated as the new inactive version of the Plist. In step 6, the new inactive Plist (Plist_1) is updated, and the Plist entries "e", "f", "g", "h", "i", "j", "k", and "l" are added. Existing checkpointed copies of the old active Plist (Plist_1) may be updated with a copy of the new active Plist (Plist_0). The inactive and active versions of the Plist are the same in step 6. As shown in step 6, entry "7" in the Glist is temporarily shifted 7 sectors or blocks to the right because the Glist in this example uses addressing that skips MBA or defective sectors, and the shifting Plist entry displaces the entry in the Glist when Plist_0 is activated by the 7 sectors of the shifting Plist entry.

[0045] Furthermore, the logical addresses assigned to temporary storage area 36 are reallocated to non-defective sectors on at least one disk that have become available by shifting the set of P-list entries or by removing the previous entry from the active P-list. The data stored in temporary storage area 36 is made available and relocated to the sectors corresponding to the reallocated logical addresses. This makes temporary storage area 36 available again for the next descending set of reallocated logical addresses and their corresponding relocated data. The logical-physical translation table is updated to associate the reallocated logical addresses with their new physical locations on at least one disk (e.g., MBA).

[0046] In step 7 of Figure 2C, the following seven descending logical addresses are reallocated from at least one disk sector to the temporary storage area 36. The data associated with the logical addresses is also reallocated to the corresponding sector or block in the temporary storage area 36.

[0047] Note that since the growing defective sector location 327 currently has entry "i" in the active P list, entry "7" will be removed from the G list. In contrast to other implementations where the G list is updated when the entries of the P list entries to be shifted are retained or filled by the growing defective location, entries in the G list may not be removed from the G list until all entries of the P list entries to be shifted are filled. However, such implementations may incorrectly indicate that certain non-defective sectors have growing defects during the merge process due to offsets caused by physical addressing schemes that skip primary defective sectors.

[0048] In the eighth step, the shifting P-list entry is shifted left again in the next iteration to cover a sector or block made available by reallocating a descending set of logical addresses in temporary storage area 36. The next set of sectors corresponding to the descending set of reallocated logical addresses is reserved for the shifting P-list entry of the inactive P-list by moving or shifting the shifting P-list entry to a lower logical address until it reaches the first available sector freed by the reallocation of logical addresses and the rearrangement of associated data.

[0049] The new position of the set of P-list entries to be shifted extends to primary defect location 304 but does not include growth defect locations. As shown in step 8, P-list entries in the currently active P-list (P-list_0) are designated with uppercase letters "D", "E", "F", "G", "H", "I", "J", "K", and "L" to distinguish them from lowercase entries of the same letters in the currently inactive P-list (P-list_1). A copy of the updated inactive P-list (P-list_1) may be checkpointed or stored non-volatilely to track or save the progress of the G-list merge process, and / or the sequence number of the inactive P-list may also be incremented.

[0050] The entry "f" in the inactive P list is assigned to primary defect location 304, and the entry "D" in the active P list remains assigned to primary defect location 304. Similarly, primary defect location 305 is reassigned from the entry "g" in the inactive P list to the entry "k" in the inactive P list as a result of the shift of the P list entries to be shifted. In this regard, the entries in the inactive P list in the examples in Figures 2A to 2F sequentially identify the locations of defective sectors, and previously identified defects retain their entries in the inactive P list. Primary defect location 305 in the eighth step remains assigned to the entry "G" in the active P list, which is shown here in uppercase to distinguish it from the entry of the same letter in the inactive P list.

[0051] The growth defect location 327 retains its entry in the inactive P list even after shifting the P list entry, but the shift causes the "l" entry in the inactive P list to be reassigned. As shown in step 8, the growth defect location 327 retains its "I" entry in the active P list, which is capitalized to distinguish it from the "i" entry in the inactive P list. In this regard, one of the P list entries to be shifted is filled by the growth defect location 327, and therefore the set of P list entries to be shifted is reduced by only one entry for a new total of six P list entries to be shifted following step 8. The P list entries to be shifted after step 8 are the "d", "e", "g", "h", "i", and "j" entries in the inactive P list.

[0052] The roles of Plist_0 and Plist_1 are switched again in step 9, with Plist_1 designated as the new active version of the Plist and Plist_0 designated as the new inactive version of the Plist. The new inactive Plist (Plist_0) is updated to match the previous inactive Plist (Plist_1). Existing checkpointed copies of the old active Plist (Plist_0) may be updated with copies of the new active Plist (Plist_1).

[0053] Furthermore, the logical addresses assigned to temporary storage area 36 are reallocated to non-defective sectors on at least one disk that have become available by shifting the set of P-list entries or by removing the previous entry from the active P-list. The data stored in temporary storage area 36 is made available and relocated to the sectors corresponding to the reallocated logical addresses. This makes temporary storage area 36 available again for the next descending set of reallocated logical addresses and their corresponding relocated data. The logical-physical translation table is updated to associate the reallocated logical addresses with their new physical locations on at least one disk (e.g., MBA).

[0054] In the tenth step of Figure 2D, the following descending set of seven logical addresses is reallocated from at least one disk to the temporary storage area 36, ​​including the relocation of associated data to the temporary storage area 36. Two of the reallocated logical addresses are for the growing defective sectors 325 and 326, as indicated by sector or block locations 382 and 383 in the storage area 36. The logical addresses of these growing defective sectors may have already been reallocated to other non-defective sectors as part of the growing defective processing process, and the logical addresses may be reallocated from these other non-defective sectors to the temporary storage area 36. The associated data may also be relocated from the other non-defective sectors to the temporary storage area 36. In other implementations, the logical addresses may remain assigned to other non-defective sectors, and the data may remain stored in the non-defective sectors without reallocating the logical addresses and relocating the data to the temporary storage area 36.

[0055] In the eleventh step, the shifting P-list entry is shifted left again so that in the next iteration, it covers at least a portion of the sectors or blocks made available by reallocating a descending set of logical addresses to the temporary storage area 36. The next set of sectors corresponding to the descending set of reallocated logical addresses is reserved for the six shifting P-list entries of the inactive P-list by moving or shifting the shifting P-list entry to a lower logical address until it reaches a first available sector freed by the reallocation of logical addresses and the rearrangement of associated data, while filling the entries of the shifting P-list entry with growing defect locations encountered during the shift.

[0056] The new positions of the shifted set of P-list entries extend to two growth defect locations 325 and 326, but do not include primary defect locations. As shown in step 11, P-list entries in the currently active P-list (P-list_1) are designated with uppercase letters "C", "D", "E", "F", "G", "H", "I", and "J" to distinguish them from lowercase entries of the same letters in the currently inactive P-list (P-list_0). A copy of the updated inactive P-list (P-list_0) may be checkpointed or stored non-volatilely to track or save the progress of the G-list merge process, and / or the sequence number of the inactive P-list may also be incremented.

[0057] Entries in the inactive P list are held for primary defects 303, 304, and 305, and for the growing defect 327. The growing defects 325 and 326 are assigned inactive P list entries "f" and "g", respectively, and the inactive P list entries for primary defects 303 and 304 are shifted to inactive P list entries "i" and "j", respectively. The two additional entries in the shifted P list entries are filled by the growing defect locations 325 and 326, so the set of shifted P list entries is reduced by only two more entries for a total of four new shifted P list entries following the 11th step. The remaining shifted P list entries after the 11th step are the "c", "d", "e", and "h" entries in the inactive P list.

[0058] The roles of Plist_0 and Plist_1 are switched again in step 12, with Plist_0 designated as the new active version of the Plist and Plist_1 designated as the new inactive version of the Plist. The new inactive Plist (Plist_1) is updated to match the previous inactive Plist (Plist_0). Existing checkpointed copies of the old active Plist (Plist_1) may be updated with copies of the new active Plist (Plist_0).

[0059] Furthermore, the logical addresses assigned to temporary storage area 36 are reallocated to non-defective sectors on at least one disk that have become available by shifting a set of P-list entries or by removing the previous entry from the active P-list. The data stored in temporary storage area 36 is made available and relocated to the sectors corresponding to the reallocated logical addresses. This makes temporary storage area 36 available again for the next descending set of reallocated logical addresses and the corresponding relocated data. The logical-physical translation table is updated to associate the reallocated logical addresses with their new physical locations (e.g., MBAs) on at least one disk. As shown in step 12, entries "5" and "6" in the G-list are temporarily shifted eight sectors or blocks to the right, respectively, because the G-list in this example uses addressing that skips MBAs or defective sectors, and when P-list_0 is activated, the shifting P-list entries displace these entries in the G-list.

[0060] In the 11th step described above, in an implementation where data for growth defect locations 325 and 326 is not relocated to the temporary storage area 36, ​​the data at these logical addresses may instead be relocated from a reallocated location on at least one disk. In such an implementation, the logical addresses at these reallocated locations remain at the reallocated location instead of being relocated to the temporary storage area 36 until other data is relocated from the temporary storage area 36 to a non-defective sector in the 12th step. In particular, the G list is shortened to remove entries "5" and "6" for growth defects 325 and 326 because entries for these growth defect locations are added to the active P list.

[0061] In step 13 of Figure 2E, the following descending set of seven logical addresses is reallocated from at least one disk to temporary storage 36, including the relocation of associated data to temporary storage 36. Two of the reallocated logical addresses are for growing-defect sector locations 323 and 324, as indicated by sector or block locations 384 and 385 in storage 36. The logical addresses of these growing-defect sectors may have already been reallocated to other non-defective sectors as part of the growing-defect processing, and the logical addresses may be reallocated from these other non-defective sectors to temporary storage 36. The associated data may also be relocated from the other non-defective sectors to temporary storage 36. In other implementations, the logical addresses may remain assigned to other non-defective sectors, and the data may remain stored in the non-defective sectors without reallocating the logical addresses and relocating the data to temporary storage 36. The primary defective sector location 302 is mapped out during the initial formatting of at least one disk, and no data is subsequently stored at this primary defective location; therefore, there is no data to be relocated to the temporary storage area 36 for this location.

[0062] In the 14th step, the shifting P-list entry is shifted left again so that in the next iteration, it covers at least a portion of the sectors or blocks made available by reallocating a descending set of logical addresses in the temporary storage area 36. The next set of sectors corresponding to the descending set of reallocated logical addresses is reserved for the four shifting P-list entries of the inactive P-list by moving or shifting the shifting P-list entry to a lower logical address until it reaches the first available sector freed by the reallocation of logical addresses and the rearrangement of associated data, while filling the entry of the shifting P-list entry with the entries of the shifting P-list entry at the growing defect locations encountered during the entry shift.

[0063] The growth defect locations 325, 326, and 327, as well as the primary defect locations 303, 304, and 305, hold entries in the inactive P list. In this regard, the growth defect locations 325 and 326 are reassigned to the inactive P list entries "G" and "H" by the shifting P list entries, and the growth defect location 327 holds its P list entry "l". The primary defect locations 303, 304, and 305 hold entries "i", "j", and "k" in the inactive P list. In particular, the growth defect location 323 is assigned the shifting P list entry "B" in the inactive P list.

[0064] As shown in step 14, P-list entries in the currently inactive P-list (P-list_1) are designated with the uppercase letters "C", "D", "E", "F", "G", and "H" to distinguish them from the lowercase entries of the same letters in the currently active P-list (P-list_0), and the active P-list entry "b" is designated as lowercase to distinguish it from the uppercase "B" entry in the inactive P-list. A copy of the updated inactive P-list (P-list_1) may be checkpointed or stored non-volatilely to track or save the progress of the G-list merge process, and / or the sequence number of the inactive P-list may also be incremented.

[0065] The roles of Plist_0 and Plist_1 are switched again in step 15, with Plist_0 designated as the new inactive version of the Plist and Plist_1 designated as the new active version of the Plist. The new inactive Plist (Plist_0) is updated to match the previous inactive Plist (Plist_1). Existing checkpointed copies of the old active Plist (Plist_0) may be updated with copies of the new active Plist (Plist_1).

[0066] Furthermore, the logical addresses assigned to temporary storage area 36 are reallocated to non-defective sectors on at least one disk that have become available by shifting a set of P-list entries or by removing the previous entry from the active P-list. The data stored in temporary storage area 36 is made available and relocated to the sectors corresponding to the reallocated logical addresses. This makes temporary storage area 36 available again for the next descending set of reallocated logical addresses and the corresponding relocated data. The logical-physical translation table is updated to associate the reallocated logical addresses with their new physical locations (e.g., MBAs) on at least one disk. As shown in step 15, entries "3" and "4" in the G-list are each temporarily shifted four sectors or blocks to the right because the G-list in this example uses addressing that skips MBAs or defective sectors, and when P-list_1 is activated, the shifting P-list entries displace the entries in the G-list (except for the entries for previously existing P-list entries for the primary defective location 302).

[0067] In the 13th step described above, in implementations where data for growth defect locations 323 and 324 is not relocated to the temporary storage area 36, ​​the data for these logical addresses may instead be relocated from a reallocated location on at least one disk. In particular, the G list is shortened to remove the "3" and "4" entries for growth defects 323 and 324 because entries for these growth defect locations have been added to the active P list.

[0068] In step 16 of Figure 2F, the following descending set of seven logical addresses is reallocated from at least one disk to temporary storage 36, including the relocation of associated data to temporary storage 36. Two of the reallocated logical addresses are for growing defective sector locations 321 and 322, as indicated by sector or block locations 386 and 387 in storage 36. As described above, the logical addresses of these growing defective sectors may have already been reallocated to other non-defective sectors as part of the growing defective processing process, and the logical addresses may be reallocated from these other non-defective sectors to temporary storage 36. The associated data may also be relocated from the other non-defective sectors to temporary storage 36. In other implementations, the logical addresses may remain assigned to other non-defective sectors, and the data may remain stored in the non-defective sectors without reallocating the logical addresses and relocating the data to temporary storage 36. The primary defective sector location 301 is mapped out during the initial formatting of at least one disk, and no data is subsequently stored at this primary defective location; therefore, there is no data to be relocated to the temporary storage area 36 for this location.

[0069] In step 17, the P-list entry to be shifted is shifted left again so that in the next iteration, it covers at least a portion of the sectors or blocks made available by reallocating a descending set of logical addresses in temporary storage area 36. The next set of sectors corresponding to the descending set of reallocated logical addresses is reserved for the remaining two shifting P-list entries of the inactive P-list by moving or shifting the shifting P-list entry to a lower logical address and filling in the growing defect location along the way.

[0070] As shown in step 17, the Plist entries in Plist_0, which is currently an inactive Plist, are designated with the lowercase letters "b", "c", "d", and "e" to distinguish them from the uppercase entries of the same letters in Plist_1, which is currently an active Plist. A copy of the updated inactive Plist, Plist_0, may be checkpointed or stored non-volatilely to track or save the progress of the Glist merge process, and / or the sequence number of the inactive Plist may also be incremented.

[0071] The roles of Plist_0 and Plist_1 are switched again in step 18, with Plist_1 designated as the new inactive version of the Plist and Plist_0 designated as the new active version of the Plist. Existing checkpointed copies of the old active Plist (Plist_1) may be updated with copies of the new active Plist (Plist_0).

[0072] Furthermore, the logical addresses assigned to temporary storage area 36 are reallocated to non-defective sectors on at least one disk that have become available by shifting a set of P-list entries or by removing the previous entry from the active P-list. The data stored in temporary storage area 36 is made available and relocated to sectors corresponding to the reallocated logical addresses. The logical-physical translation table is updated to associate the reallocated logical addresses with their new physical locations (e.g., MBA) on at least one disk. As shown in step 18, entries "1" and "2" in the G-list are temporarily shifted to the right, respectively, as the remaining two shifting P-list entries displace the entries in the G-list when P-list 0 is activated.

[0073] In the 16th step described above, in an implementation where data for growth defect locations 321 and 322 is not relocated to the temporary storage area 36, ​​the data for these logical addresses may instead be relocated from a reallocated location on at least one disk. Following the 18th step, the G list is shortened to remove the "1" and "2" entries for growth defects 321 and 322, because entries for these growth defect locations have been added to the active P list.

[0074] The merge process ends when all entries in the G list are merged into the active P list, and the new active P list (P list_0) can continue to be used in operation, for example, to assign new logical addresses to physical addresses in the logical-to-physical translation table, or to determine the physical location on at least one disk in order to reallocate logical addresses when running the garbage collection process to reuse sectors that store old data.

[0075] In some implementations, the new inactive P-list (P-list_1) may be optionally updated to match the previous inactive P-list (P-list_0). However, since the last iteration of shifting the set of P-list entries to be shifted is complete, there is no need to update the new inactive P-list. In this regard, in some implementations, the new inactive P-list (P-list_1) may be deleted after the completion of the G-list merge process. In other implementations, the new inactive P-list may be retained for future rounds of the G-list merge process to merge additional G-list entries into the P-list. In such implementations, the new inactive P-list may be optionally updated in preparation for the next round of the G-list merge process, which may be done for newly discovered growth defects and / or additional growth defects that were not merged in the previous round of the G-list merge process.

[0076] In this regard, merging G-list entries into the P-list may be performed in stages corresponding to a predetermined number of shifting P-list entries, such as 1000 entries at a time. In such cases, the resumption of background merging of entries from the G-list to the P-list may occur, for example, after a certain amount of time or after a certain number of new growth defects have been discovered and added to the G-list.

[0077] Along these lines, the G-list merging process may be performed only on one or more specific sections of a physical address range that have a threshold number of growing defects. In such an implementation, a physical address range (e.g., PBA) can be divided into sections, or a G-list can be divided into sections such that the G-list merging process is performed only on the section or multiple sections with the most growing defects. This allows more G-list entries to be merged into the P-list in a shorter timeframe, as growing defects may be unevenly distributed across the physical address range or concentrated in specific sections of at least one disk. In such an implementation, each section may have its own unused portion and / or temporary storage, or sections may share unused portion and / or temporary storage.

[0078] Those skilled in the art will understand, by referring to this disclosure, that the examples in Figures 2A to 2F are for illustrative purposes only, and that actual implementations of merging the G list into the P list may differ. For example, other implementations may wait in step 18 until all P list entries to be shifted are filled with growing defect locations, before removing any entries from the G list. Furthermore, those skilled in the art will understand that the G list may actually contain thousands of entries for growing defect sector locations, and the number of P list entries to be shifted may be, for example, about several thousand entries.

[0079] Figure 3 provides a variation of the beginning of the examples described above for Figures 2A to 2F. The example in Figure 3 differs in that the set of P-list entries to be shifted is instead initially allocated to a portion of the unused portion 34, and the reallocation of logical addresses with the highest logical address to the temporary storage area 36 frees up space for the set of P-list entries to be shifted to shift or move to a lower logical address value to the left. Another difference is that the temporary storage area 36 is shown as part of the unused portion 34, which can also be implemented for the examples in Figures 2A to 2F, as described above.

[0080] As indicated by the circled "1" in the first step of Figure 3, the temporary storage area 36 occupies a portion of the unused area 34. The primary defects identified by entries "A", "B", "C", "D", and "E" remain the same as in the example of Figure 2A, which has primary defect sector locations 301, 302, 303, 304, and 305. The growing defects identified by entries "1", "2", "3", "4", "5", "6", and "7" remain the same as in the example of Figure 2A, which has growing defect sector locations 321, 322, 323, 324, 325, 326, and 327.

[0081] As shown in the second step of Figure 3, the set of P-list entries to be shifted, "F", "G", "H", "I", "J", "K", and "L", is added to the unused portion 34, thereby increasing the maximum LBA to the new maximum LBA and decreasing the size of the unused portion 34. The descending logical addresses of the first set are reallocated to the temporary storage area 36 to make room for the set of P-list entries to be shifted to the left or moved. Furthermore, the data associated with the reallocated logical addresses is reallocated to the temporary storage area 36. The logical-physical translation table (e.g., the logical-physical translation table 18 in Figure 1) is updated to take into account the new physical location (e.g., the updated MBA) of the reallocated logical addresses. Similar to the examples described above for Figures 2A to 2F, the example in Figure 3 involves sequentially reallocating a descending set of logical addresses from each set of sectors to the temporary storage area 36 and sequentially reserving at least a portion of each set of sectors for the set of P-list entries to be shifted, which is repeated until the P-list entries to be shifted are filled.

[0082] In the third step of Figure 3, a first descending set of logical addresses is reallocated from temporary storage area 36 to available space on at least one disk. The logical addresses are reallocated to previously reserved sectors for a set of shifting P-list entries that have become available by shifting the set of P-list entries. The data associated with the reallocated logical addresses is relocated from temporary storage area 36 to the new locations. The logical-physical translation table is also updated at this point to reflect the new locations of the reallocated logical addresses. Similar to the examples described above for Figures 2A to 2F, the example in Figure 3 involves shifting a set of shifting P-list entries, which is performed iteratively until the shifting P-list entries are filled, and then sequentially reallocating the descending set of logical addresses from temporary storage area 36 to available non-defective sectors.

[0083] After reallocating the logical addresses from the temporary storage area 36, ​​the next descending set of logical addresses can be reallocated to the temporary storage area 36 so that the set of P-list entries to be shifted moves to the left (i.e., towards lower logical addresses) to make room for the first shifting P-list entry at growing defective location 327, which in the third step occupies the "7" entry in the G-list. The remainder of the example in Figure 3 can be continued in the same manner as the examples in Figures 2A to 2F by continuing the iteration of reallocating the descending set of logical addresses to the temporary storage area 36, ​​reserving the set of sectors made available by reallocating the set of logical addresses to the set of P-list entries to be shifted (i.e., shifting the set of P-list entries to be shifted), and reallocating the descending set of logical addresses from the temporary storage area 36 to the non-defective sectors made available by shifting the set of P-list entries to be shifted.

[0084] Those skilled in the art will understand, by referring to this disclosure, that the example in Figure 3 is for illustrative purposes only, and that actual implementations of merging the G list into the inactive P list may differ. For example, the physical location of the temporary storage area 36 does not have to immediately follow the new maximum logical address location, but instead may be located in a different portion of the unused area 36, ​​or in a different non-volatile storage location of the DSD, such as in solid-state memory.

[0085] Exemplary process Figures 4A and 4B provide flowcharts of exemplary G-list background merge processes according to one or more embodiments. The processes in Figures 4A and 4B can be performed, for example, by circuit 166 of the DSD100 that executes the defect module 10 of Figure 1. In this regard, circuit 166 and / or other circuits of the DSD100, such as the AE module 160, may, in some implementation forms, provide means for performing the functions of the G-list background merge process.

[0086] In block 402 of Figure 4A, the initial number of P-list entries to shift in the inactive P-list is determined. The first P-list entry to shift is the first unallocated entry in the inactive version of the P-list used during the merge process to absorb or add entries of growing defects from the G-list. Furthermore, the initial number of P-list entries to shift is equal to the number of reallocated logical addresses in each set of descending logical addresses that are sequentially reallocated to temporary storage from at least one disk to make room for shifting P-list entries.

[0087] The number of P-list entries to shift can be determined in block 402 based on the number of entries in the G-list, such that the number of P-list entries to shift is less than or equal to the number of entries in the G-list of growing defects. In some implementations, the G-list merge may be performed in stages with a smaller set of descending logical addresses to reduce the amount of data that needs to be relocated during the merge process and the amount of updates performed on the logical-physical translation table, which can reduce the processing of DSD as background activity and the consumption of memory resources.

[0088] In implementations where the merging of G-list entries into a P-list is performed in stages, the number of P-list entries to shift may vary at different stages to ensure that all G-list entries are ultimately merged into the P-list without using any extra or unnecessary P-list entries. For example, if a G-list has 1800 entries, the first stage of merging may use 1000 P-list entries to shift to fully merge the G-list into the P-list, and the second stage of merging may use 800 P-list entries to shift. In some cases, the initial number of P-list entries to shift may be adjusted to account for any newly discovered growth defects encountered during the background G-list merging process. In the example above, if two additional growth defects were discovered during the first stage and / or between the execution of the first and second stages, 802 P-list entries could be used in the second stage.

[0089] In block 404 of Figure 4, the first or next highest set of logical addresses (e.g., LBA on at least one disk) is reallocated from the first or next set of sectors among multiple sectors to the unused portion and / or temporary storage area of ​​at least one disk. Referring to the examples described above for Figures 2A-2F, the unused portion of at least one disk can correspond to the unused area 34. In some implementations, the temporary storage area (e.g., the temporary storage area 36 in Figures 2A-2F) can be used as a medium for the first highest set of descending logical addresses (i.e., the range of highest logical addresses) to reallocate logical addresses first to the temporary storage area and then to the unused portion of at least one disk.

[0090] Furthermore, the data associated with the logical addresses of the first top-level set of descending logical addresses is reallocated to unused areas, which in some implementations makes available the first set of sectors for the P-list entries to shift. As described above for the example in Figure 3, in some implementations, the set of P-list entries to shift may be initially reserved in unused areas of at least one disk before being shifted to areas freed by reallocating the first top-level set of descending logical addresses to unused or temporary storage areas.

[0091] The logical-to-physical conversion table (for example, logical-to-physical conversion table 18 in Figure 1) is also updated to reflect the new locations of the reassigned logical addresses, and as a result, the data can be accessed at the new locations. In particular, sectors that have already been identified as having primary defects are skipped when reassigning logical addresses because these sectors do not have logical addresses assigned to them as part of the defect mapping performed during the formatting process.

[0092] In some cases, the first set of sectors may already contain one or more growing defects. In such cases, the logical addresses of such defective sectors have usually already been reallocated to other non-defective sectors using a logical-to-physical translation table as part of the growing defect handling process. The logical addresses of such defective sectors are reallocated to at least one unused portion of the disk, and the data is relocated to the corresponding location in the unused portion of the disk. This may be done to facilitate sequential reading and writing of data, thereby allowing for faster writing or reading of sequential ranges of logical addresses without requiring the HGA (e.g., HGA110 in Figure 1) to be significantly relocated to different locations on the disk. However, in other implementations, the reallocated logical addresses and associated data may remain at their original reallocated non-defective sector locations.

[0093] In block 406, at least a portion of the set of sectors made available by reallocating a descending set of logical addresses is reserved for a set of P-list entries to be shifted. Reserving sectors may include mapping out or otherwise removing the physical addresses of a set of sectors (e.g., MBA) from the logical-to-physical translation table and adding the physical locators of a set of sectors (e.g., PBA) to an inactive P-list. By removing the physical addresses of the reserved sectors from the logical-to-physical translation table and reallocating logical addresses from the first or next set of sectors to unused portions of at least one disk or temporary storage area, it is possible to temporarily prevent new logical addresses received from the host from being assigned to the reserved sectors, and redirect data access (e.g., reads and writes) associated with the reallocated logical addresses to their current locations assigned to the reallocated logical addresses in the unused portions of the disk or temporary storage area.

[0094] In particular, sectors with primary defects are skipped when reserving sectors for P-list entries to be shifted, because these sectors already have entries in the P-list. As further iterations of blocks 404-412 are performed, as will be explained in more detail below, the remaining P-list entries to be shifted are shifted sequentially by reserving sectors from among several sectors made available by reallocating a descending set of logical addresses to temporary storage.

[0095] In block 408, the circuit determines whether there are one or more growing defects in the reserved sector for the P-list entry to be shifted. This can be done by checking the G-list for the physical locator (e.g., PBA) of the sector currently reserved for the P-list entry to be shifted.

[0096] If there is one or more growth defects in a reserved sector, the circuit of block 410 retains one or more corresponding entries in the shifting P-list entries in the inactive P-list for those growth defects, and reduces the number of shifting P-list entries by the number of growth defects. Entries or multiple entries from the G-list may be removed from the G-list after the growth defect entries or multiple entries have been added to the active version of the P-list. As in the above examples for Figures 2A to 2F, specific entries assigned to growth defects and primary defects may be shifted to other entries in the inactive P-list in some implementations. In this regard, retaining entries in the inactive P-list for growth defects means maintaining the entries in the inactive P-list for growth defects even though those entries have been shifted.

[0097] If, in block 408, it is determined that the reserved sector does not contain one or more growing defects, the background G-list merge process skips block 410 and proceeds to block 412 in Figure 4B. In block 412, the descending set of logical addresses is reallocated to the non-defective sectors of the multiple sectors made available by shifting the set of P-list entries to be shifted, removing entries that are no longer needed in the updated version of the active P-list, and / or reallocating the next descending set of logical addresses to temporary storage.

[0098] Furthermore, the sequence number of the inactive P list may be incremented to indicate the next descending set of logical addresses to be reallocated if the background G list merging process is interrupted, such as by an unexpected power loss to the DSD or a planned shutdown of the DSD. In other implementations, the circuit may rely on logical addresses allocated in temporary storage to indicate the next descending set of logical addresses in the event of an interruption to the background G list merging process. In such implementations, a copy of the data stored in temporary storage may provide an indication of the last logical address reallocated to temporary storage before it can be overwritten with new data for the next descending set of logical addresses.

[0099] In block 414, the circuit determines whether there are still P-list entries to shift. If not, the background G-list merging process terminates in block 416. As described above, the background G-list merging process may be executed incrementally and repeatedly, for example, to fill a first set of P-list entries to shift, and then a second set of P-list entries to shift for the remainder or parts of the growth defects identified in the G-list.

[0100] If there are still P-list entries to shift remaining in block 414, the process returns to block 404 in Figure 4A, and in the next iteration of blocks 404-412, the next top-level descending set of the next top-level descending logical addresses is reallocated from the next set of sectors among multiple sectors. In this regard, in block 404, the descending set of logical addresses is successively reallocated to temporary storage, and in block 406, at least a portion of the set of sectors is successively reserved for the remaining entries in the set of P-list entries to shift until the P-list entries to shift are filled by growing defective locations. Similarly, for each iteration or shift of the P-list entries to shift, in block 412, the set of descending logical addresses is successively reallocated to non-defective sectors among multiple sectors.

[0101] Those skilled in the art will understand, by referring to this disclosure, that other implementations of the background G-list merge process are possible. For example, in other implementations, the processes in Figures 4A and 4B may be paused at different points in time as background activity and then resumed using, for example, a sequence number associated with an inactive P-list indicating the number of iterations performed in blocks 404-412 and / or the logical addresses currently allocated in temporary storage.

[0102] Figure 5 is a flowchart of a command execution process according to one or more embodiments. The process in Figure 5 can be executed, for example, by circuit 166 of the DSD100 which executes the defective module 10 of Figure 1. In this regard, circuit 166 and / or other circuits of the DSD100, such as the AE module 160, may be provided in some implementation forms with means for executing the functions of the command execution process in Figure 5.

[0103] In block 502, while the background G-list merge process is running and merging entries from the G-list into the P-list, one or more host commands are executed to read and / or write data on at least one disk. As described above for the merge process in Figures 4A and 4B, the Disclosure can use two versions of the P-list and shift a set of P-list entries from an inactive version of the P-list to reduce the changes made to the logical-physical translation table and facilitate merging the G-list into the P-list as a background activity. This is advantageous as it allows the DSD to continue executing host commands to access data on at least one disk while the merge is taking place. Furthermore, the translation table is not completely reset in the background merge of the Disclosure, and therefore the data is not effectively erased, as in the case of conventional reformatting which is typically required to add growing defect locations to the P-list.

[0104] In block 504, while the background G-list merge process is running, the active P-list is used to determine at least one physical location on disk for assigning at least one logical address. While the inactive version of the P-list is updated for sectors reserved for possible P-list entries and adds or satisfies the shifting of P-list entries when growth defects are encountered, the active version of the P-list may be used by the DSD circuitry to assign available non-defective sectors. The need to assign sectors to logical addresses may arise, for example, from receiving new logical addresses from the host or from a garbage collection process to reclaim sectors that store old data.

[0105] Since growth defects are mapped out and considered within the G-list, the active P-list combined with the G-list provides a subset of defective sectors that are unavailable in the logic-to-physical translation table for logical addresses that are being reassigned to new logical addresses or new physical locations. In this regard, when growth defect entries are removed from the G-list during merging, the active version of the P-list should already be updated to include the growth defect entries.

[0106] Those skilled in the art will understand, by referring to this disclosure, that other implementations of the command execution process shown in Figure 5 are possible. For example, in other implementations, it may not be necessary to assign logical addresses while merging entries from the G list to the inactive P list, as in block 504. In some implementations, assigning logical addresses to previously unassigned sector locations may instead temporarily suspend the background G list merging process, and any updates made to the inactive P list are made to the active P list before assigning logical addresses. The background G list merging process can be resumed after the logical addresses have been assigned.

[0107] Figure 6 is a flowchart of a P-list switching process according to one or more embodiments. The P-list switching process in Figure 6 may be executed iteratively, as in the examples in Figures 2A to 2F described above, and the active and inactive P-lists switch roles or toggle to perform fragmentary or continuous updates to the active P-list without affecting the use of the operational logic-physical translation table. The process in Figure 6 can be executed, for example, by circuit 166 of the DSD100 which executes the fault module 10 in Figure 1. In this regard, circuit 166 and / or other circuits of the DSD100, such as the AE module 160, may, in some implementation forms, provide means for performing the functions of the P-list switching process in Figure 6.

[0108] In block 602, the circuit stores a copy of the updated inactive P-list on at least one disk of the DSD or in another non-volatile memory of the DSD (e.g., disk 120 or NVM 178 in Figure 1). As described above with respect to the command execution process in Figure 5, updates resulting from the shift of P-list entries are performed on the inactive P-list before designating the inactive P-list as the new active P-list. If the merge process is interrupted, the updated copy of the inactive P-list is checkpointed or stored in NVM memory (e.g., P-list-03 20 stored in NVM 178 in Figure 1). As described above, if logical addresses are reallocated during the merge process, a portion of the logical-to-physical translation table is updated, which allows the logical-to-physical translation table to continue to be used during the merge process.

[0109] In block 604, the updated inactive P list is designated as the new active P list for any necessary modifications to the logical-physical translation table, and the old active P list is updated for any changes previously made to the older inactive version of the P list.

[0110] In block 606, the updated old active P-list is designated as the new inactive P-list for the next iteration of the P-list entry to be shifted. In some implementations, the switch between the active and inactive versions of a P-list may be triggered based on the reallocation of logical addresses back from temporary storage to a non-defective sector on disk. In some implementations, a flag or other indicator may be used to indicate or specify which P-list is currently active or inactive. For example, a P-list data structure may include a field having a value set to "1" to indicate that the P-list is currently an active P-list used by the circuit to allocate logical addresses, and a value set to "0" to indicate that the P-list is currently an inactive P-list used to shift the P-list entry to be shifted.

[0111] In block 608, the new active P list (i.e., the old inactive P list) can be used to determine at least one physical location on disk for assigning a logical address. As described above, the G list and the active P list can be used to determine available non-defective sectors for the new or reassigned logical address.

[0112] Those skilled in the art will understand, by referring to this disclosure, that other implementations of the P-list switching process shown in Figure 6 are possible. For example, since the DSD may not need to assign or reallocate logical addresses to new sector locations during certain stages or iterations of the merge process, block 608 may be omitted for certain iterations of the P-list switching process.

[0113] Figure 7 is a flowchart of the G-list merge restart process after interruption, according to one or more embodiments. The process in Figure 7 can be performed, for example, by circuit 166 of the DSD100 that executes the defective module 10 in Figure 1. In this regard, circuit 166 and / or other circuits of the DSD100, such as the AE module 160, may, in some implementation forms, be equipped with means for performing the function of restarting the G-list merge restart process as shown in Figure 7.

[0114] In block 702, the resume process is initiated after an interruption such as an unexpected power loss to the DSD, a planned shutdown of the DSD, or a sudden need for additional processing and / or memory resources by the DSD. As described above, the G-list merge process can be advantageously run as a background activity that enables simultaneous access to data for reading and writing on at least one disk. Since the G-list merge process may take place over a relatively long period of time, such as several days, the resume process provides a way to resume the G-list merge process from where it left off before the interruption.

[0115] As mentioned above in the previous example, in implementations where the inactive P-list is modified in volatile memory, a copy of the inactive P-list may be checkpointed or updated in non-volatile memory each time the merge process switches between the active and inactive P-lists. When resuming from an interruption, the checkpointed inactive P-list can be recovered, and the G-list merge resume process can be used to find the location where the set of P-list entries to shift should be reserved for the next iteration of the merge process, and which logical addresses should be reallocated to temporary storage.

[0116] In block 704, the circuit identifies at least one of one or more logical addresses (e.g., LBAs) stored in a temporary storage area (e.g., temporary storage area 36 in Figures 2A-3), and a sequence number associated with an inactive P list. When using one or more logical addresses stored in the temporary storage area, the temporary storage area may be read to identify logical addresses stored in one or more sectors of the temporary storage area, such as part of a sector header. In some cases, a sector or block in the temporary storage area may store, for example, an LBA or range of LBAs that have been reallocated to the temporary storage area. A logical address or set of logical addresses may provide indication of the last set of descending logical addresses reallocated to the temporary storage area.

[0117] When using a sequence number associated with an inactive P-list, the sequence number may indicate the number of iterations performed to reallocate a set of descending logical addresses, either as part of the inactive P-list or stored in a different location. The circuit can then determine the last set of descending logical addresses reallocated to temporary storage by multiplying the sequence number by a predetermined number of initial shifting P-list entries and subtracting this product from the top-level logical address. As another example, each of the active and inactive P-lists may contain or have a sequence number each time the P-list is updated or checkpointed. The sequence numbers of the two P-lists may, in some implementations, be compared to determine the status of the G-list merging process.

[0118] Block 706 uses one or more identified logical addresses and / or sequence numbers to determine a location on at least one disk for reassigning the next descending set of logical addresses to or from temporary storage. In implementations that do not use sequence numbers, logical addresses read from temporary storage may be looked up in a logical-physical translation table. If the physical location from the translation table indicates that the logical address is assigned to temporary storage, the restart of the merge process must reassign the logical address from temporary storage to an available non-defective sector on at least one disk corresponding to the logical addressing sequence. If the physical location from the translation table indicates that the logical address is not assigned to temporary storage, the restart of the merge process should reassign the next descending set of logical addresses from at least one disk to temporary storage and relocate the associated data to overwrite the old data currently stored in temporary storage.

[0119] In some cases, a logical-to-physical translation table can be used to determine whether the G-list merge process was interrupted during the relocation of data to temporary storage or the reallocation of logical addresses from temporary storage. The physical location (e.g., MBA) of the last set of logical addresses to be reallocated can be obtained from the logical-to-physical translation table, and the circuit can determine whether all physical locations correspond to temporary storage or disk locations. If the logical address reallocation was not interrupted, all physical locations should be either in temporary storage or disk locations. If the physical locations of a set of logical addresses are split between temporary storage and disk locations, the remaining logical addresses from the set can be reallocated to or from temporary storage when the G-list merge process is restarted.

[0120] In some implementations, the location on disk can be calculated by using a sequence number, multiplying it by the initial number of P-list entries shifting to the sequence number or the size of the temporary storage area, and subtracting this product from the top-level PBA to identify the beginning of the last set of sectors with logical addresses reallocated to temporary storage. One or more of these sectors can be read to determine the logical addresses stored as metadata within the sectors, and then compared with the PBA shown in the translation table to determine whether the next descending set of logical addresses needs to be reallocated to or from temporary storage.

[0121] Those skilled in the art will understand, by referring to this disclosure, that other implementations of the G-list merge resume process shown in Figure 7 are possible. For example, in a situation where the inactive P-list is stored only in the NVM, the G-list merge process can be resumed by identifying the physical locator in the inactive P-list of the set of P-list entries to be shifted, rather than using the sequence number or logical address assigned to the temporary storage area of ​​the inactive P-list. Furthermore, those skilled in the art will understand that other methods using the sequence number, the logical address stored in the temporary area, and / or a translation table are possible to determine where to resume the G-list merge process.

[0122] The aforementioned system and method for merging a G-list into a P-list can facilitate the merge by allowing data access commands to be executed as a background activity during the merge process. Furthermore, the disclosed system and method offer a significant improvement over conventional methods for adding G-list entries to a P-list, because the aforementioned system and method typically does not require reformatting, which would erase all user data.

[0123] Other Embodiments Those skilled in the art will understand that various illustrative logic blocks, modules, and processes described in connection with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or a combination of both. Furthermore, the aforementioned processes can be embodied on a computer-readable medium that enables or performs specific functions on a processor or controller circuit.

[0124] To clearly illustrate this hardware and software compatibility, various illustrative components, blocks, and modules are described in general terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and design constraints imposed on the overall system. A person skilled in the art may implement the described functionality in various ways for specific uses, but such implementation decisions should not be construed as causing a departure from the scope of this disclosure.

[0125] The various illustrative logic blocks, units, modules, processing circuits, and control circuits described in relation to the examples disclosed herein may be implemented or run in general-purpose processors, GPUs, DSPs, ASICs, FPGAs or other programmable logic devices, individual gate or transistor logic, individual hardware components, or any combination thereof, designed to perform the functions described herein. A general-purpose processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor or controller circuit may also be implemented as a computing device, for example, a combination of a DSP and a microprocessor, multiple microprocessors, a SoC, one or more microprocessors combined with a DSP core, or any other combination of such configurations.

[0126] The activities of a method or process described in relation to the examples disclosed herein may be embodied directly by hardware, in a software module executed by a processor or controller circuit, or in a combination of the two. The steps of a method or algorithm may also be performed in an alternative order to those provided in the examples. The software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disks, removable media, optical media, or any other form of storage medium known in the art. The exemplary storage medium is coupled to the processor or controller circuit so that the processor or controller circuit can read information from and write information to the storage medium. Alternatively, the storage medium may be integrated with the processor or controller circuit. The processor or controller circuit and the storage medium may reside in an ASIC or SoC.

[0127] The foregoing description of the exemplary embodiments disclosed is provided to enable those skilled in the art to construct or use embodiments of the present disclosure. Various modifications to these examples will be readily apparent to those skilled in the art, and the principles disclosed herein may be applied to other examples without departing from the spirit and scope of the present disclosure. The embodiments described should be considered in all respects to be illustrative and non-restrictive. In addition, the use of the language in the form of “at least one of A and B” in the following claims should be understood to mean “A only, B only, or both A and B.”

Claims

1. A data storage device (DSD), A disk containing multiple sectors configured to store data, An active primary defect list (P list) containing entries indicating defective sectors identified during the formatting of the at least one disk, a growth defect list (G list) containing entries indicating defective sectors identified after the formatting of the at least one disk, and at least one memory configured to store an inactive P list containing entries for accepting entries from the G list, The circuit comprises a circuit configured to merge entries from the G list into the active P list, wherein the merging is at least partially The process involves reallocating a descending set of logical addresses from a set of sectors among the aforementioned multiple sectors to the temporary storage area of ​​the DSD, Reserve at least a portion of each set of sectors corresponding to the descending set of reallocated logical addresses for the set of shifting P-list entries of the inactive P-list, In response to the fact that one or more growing defective sectors indicated by the G list are included in the reserved sectors, one or more entries from the shifting P list for the one or more growing defective sectors are held in the inactive P list, and the set of shifting P list entries is reduced by the number of held entries before shifting toward each next set of sectors, A data storage device that includes performing an iteration of reallocating the descending set of logical addresses from the temporary storage area to non-defective sectors among the plurality of sectors.

2. The DSD according to claim 1, wherein the circuit is further configured to execute one or more host commands to read or write data on the at least one disk during the execution of the merge.

3. The DSD according to claim 1, wherein the circuit is further configured to determine the physical location on the at least one disk for assigning a logical address, using the active P list, while merging the entries of the G list into the inactive P list.

4. The aforementioned circuit, The first set of logical addresses having the highest logical address is reallocated from the first set of sectors of the at least one disk to the unused portion of the at least one disk, The DSD according to claim 1, further configured to reserve a first set of sectors for the set of P-list entries to be shifted.

5. The DSD according to claim 1, wherein the number of reassigned logical addresses in each set of the descending set of logical addresses is equal to a predetermined number of initially unassigned entries in the inactive P list, and the predetermined number is less than or equal to the initial number of entries in the G list.

6. The DSD according to claim 1, wherein the circuit is further configured to update a logic-to-physical translation table used to map logical addresses to locations on the at least one disk after reassigning each descending set of logical addresses to non-defective sectors of the plurality of sectors.

7. After each iteration in which at least a portion of each set of sectors is reserved for the set of P-list entries to be shifted, the circuit: The aforementioned inactive P list is designated as the new active P list, The DSD according to claim 1, further configured to designate the active P list as a new inactive P list for reserving at least a portion of the next set of sectors for the set of P list entries to be shifted.

8. The DSD according to claim 7, wherein the circuit is further configured to store a copy of the inactive P list on the at least one disk or in the non-volatile memory of the DSD before designating the inactive P list as the new active P list.

9. The DSD according to claim 1, wherein the circuit is further configured to increment the sequence number of the inactive P list after reallocating a descending set of logical addresses from a set of sectors among the plurality of sectors to the temporary storage area.

10. The aforementioned circuit, After the interruption, the entries of the G list are merged into the active P list, at least partially. Identifying at least one of the one or more logical addresses stored in the temporary storage area, and the sequence number associated with the inactive P list, The DSD according to claim 1, further configured to restart by determining a location on the at least one disk for reallocating a descending set of logical addresses to or from the temporary storage area, using the identified at least one of the one or more logical addresses and the sequence number.

11. A method for managing a defective sector of at least one disk of a data storage device (DSD), wherein the method is The process includes merging entries from a growing defect list (G-list) into a primary defect list (P-list), wherein the G-list includes entries indicating defective sectors identified on the at least one disk after the at least one disk has been formatted, and the P-list includes entries indicating defective sectors identified during the formatting of the at least one disk, and the merging is at least partially The process involves sequentially reallocating descending sets of logical addresses from each set of sectors among the multiple sectors of at least one disk to the temporary storage area of ​​the DSD, To reserve, in order to set a shifting P-list entry set of the inactive version of the P-list, at least a portion of each set of sectors corresponding to the descending set of the reallocated logical addresses, In response to one or more growing defective sectors indicated by the G list being included in the reserved sectors, one or more entries of the shifting P list entries are held in the inactive version of the P list for the one or more growing defective sectors, and the set of shifting P list entries is reduced by the number of held entries before shifting toward each next set of sectors, to reserve sequentially. A method comprising: sequentially reallocating the descending set of logical addresses from the temporary storage area to non-defective sectors among the plurality of sectors.

12. The method according to claim 11, further comprising executing one or more host commands to read or write data on the at least one disk during the merging process.

13. The method according to claim 11, further comprising using the active version of the P list to determine the physical location on the at least one disk for assigning a logical address while merging the entries of the G list into the P list.

14. Reassigning a first set of logical addresses having the highest logical address from a first set of sectors of the at least one disk to an unused portion of the at least one disk, The method according to claim 11, further comprising reserving a first set of sectors for the set of P-list entries to be shifted.

15. The method according to claim 11, wherein the number of reassigned logical addresses in each set of the descending set of logical addresses is equal to a predetermined number of initially unassigned entries in the inactive version of the P list, and the predetermined number is less than or equal to the initial number of entries in the G list.

16. The method according to claim 11, further comprising updating a logical-to-physical translation table used to map logical addresses to physical block addresses on the at least one disk, after reallocating each descending set of logical addresses from the temporary storage area to non-defective sectors of the plurality of sectors.

17. After each iteration in which the method reserves at least a portion of each set of sectors for the set of P-list entries to be shifted, Designating the inactive version of the P list as the new active version of the P list, The method according to claim 11, further comprising designating the active version of the P list as a new inactive version of the P list for reserving each next set of sectors for the set of P list entries to be shifted.

18. The method according to claim 11, further comprising reassigning a descending set of logical addresses to the temporary storage area from a set of sectors among the plurality of sectors, and then incrementing the sequence number of the inactive version of the P list.

19. After the interruption, the entries of the G list are merged into the P list, at least partially. Identifying at least one of the one or more logical addresses stored in the temporary storage area, and the sequence number associated with the inactive version of the P list, The method of claim 11, further comprising restarting by determining a location on the at least one disk for reallocating a descending set of logical addresses to or from the temporary storage area using the identified at least one of the one or more logical addresses and the sequence number.

20. A data storage device (DSD), A disk containing multiple sectors configured to store data, At least one memory configured to store an active primary defect list (P list) showing defective sectors identified during the formatting of the at least one disk, a growth defect list (G list) showing defective sectors identified after the formatting of the at least one disk, and an inactive P list containing entries for accepting entries from the G list, The system comprises means for merging the entries of the G list into the P list, wherein the merging is at least partially Reassigning descending sets of logical addresses from each set of sectors among the plurality of sectors of the at least one disk, Reserve at least a portion of each set of sectors corresponding to the descending set of reallocated logical addresses for the set of shifting P-list entries of the inactive P-list, In response to the fact that one or more growing defective sectors indicated by the G list are included in the reserved sectors, one or more entries of the shifting P list entries for the one or more growing defective sectors are held in the inactive P list, and the set of shifting P list entries is reduced by the number of held entries before shifting toward each next set of sectors, A data storage device comprising the iteration of reassigning the descending set of logical addresses to non-defective sectors among the plurality of sectors.

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