System-on-a-chip supporting multi-screen display, method for synchronizing multi-screen display, electronic equipment and storage medium
The system-on-chip architecture addresses synchronization accuracy issues in multi-screen displays by using a master and slave timing generator setup, ensuring precise hardware-layer synchronization and improving visual experience.
JP2026113559APending Publication Date: 2026-07-07XG TECHNOLOGIES PTE LTD
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- XG TECHNOLOGIES PTE LTD
- Filing Date
- 2026-03-31
- Publication Date
- 2026-07-07
AI Technical Summary
Technical Problem
Current intelligent cockpit systems face challenges in achieving accurate display synchronization between multiple screens due to software layer delays, leading to positional displacements and afterimage phenomena, especially in high frame rate multi-screen displays.
Method used
A system-on-chip architecture that divides the timing generator into a master and slave timing generator, enabling hardware-layer synchronization by generating and transmitting timing synchronization signals directly, eliminating software layer coordination delays.
Benefits of technology
Improves display synchronization accuracy and enhances the user's visual experience by synchronizing multiple screens at the hardware layer, reducing positional displacements and afterimage issues.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure 2026113559000001_ABST
Abstract
This invention relates to a multi-screen display support system on a chip, a method for synchronizing multi-screen displays, electronic equipment, and storage media. [Solution] The system-on-chip enables a display synchronization function for timing generators corresponding to display screens that perform multi-screen display, and includes a processor core that divides the timing generators into a master timing generator and a slave timing generator. The master timing generator generates a first timing synchronization signal and transmits it to the display screen corresponding to the master timing generator, transmits the vertical synchronization signal in the first timing synchronization signal to the slave timing generator, and the slave timing generator, in response to the vertical synchronization signal from the master timing generator, generates a second timing synchronization signal and transmits it to the display screen corresponding to the slave timing generator.
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