Semiconductor equipment

Abstract

In a transistor having an oxide semiconductor, by suppressing fluctuations in electrical properties , improve reliability. [Solution] A semiconductor device having a transistor, wherein the transistor is a first insulating film The first oxide semiconductor film on top, the gate insulating film on the first oxide semiconductor film, and the gate insulating film The second oxide semiconductor film on top, the first oxide semiconductor film, and the second oxide semiconductor film The first oxide semiconductor film has two insulating films and a channel region in contact with the gate insulating film. It has a source region in contact with the second insulating film and a drain region in contact with the second insulating film, The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film.

Description

Technical Field

[0001] One aspect of the present invention relates to a semiconductor device having an oxide semiconductor film and a display device having the semiconductor device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. The technical field of one aspect of the invention disclosed in this specification or the like relates to an article, a method, or a manufacturing method. Alternatively, the present invention relates to a process, a machine, a manufacture, or a composition of matter. In particular, one aspect of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, a driving method thereof, or a manufacturing method thereof. In particular, one aspect of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, a driving method thereof, or a manufacturing method thereof.

[0003] Note that in this specification or the like, the semiconductor device generally refers to a device that can function by utilizing semiconductor characteristics. Semiconductor devices include semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and storage devices. An imaging device, a display device, a liquid crystal display device, a light-emitting device, an electro-optical device, a power generation device (including a thin film solar cell, an organic thin film solar cell, etc.), and an electronic device may have a semiconductor device.

Background Art

[0004] Techniques for forming a transistor (also referred to as a field effect transistor (FET) or a thin film transistor (TFT)) using a semiconductor thin film formed on a substrate having an insulating surface have attracted attention. The transistor is widely applied to electronic devices such as an integrated circuit (IC) and an image display device (display device). As a semiconductor thin film applicable to a transistor, semiconductor materials represented by silicon are widely known, but oxide semiconductors are attracting attention as other materials. ​​​​​​​​​​​​It is being watched.

[0005] For example, an amorphous oxide containing In, Zn, Ga, Sn, etc. can be used as the oxide semiconductor. A technique for fabricating transistors has been disclosed (see Patent Document 1). Furthermore, a self-aligning transistor... A technique for fabricating an oxide thin-film transistor having a top gate structure has been disclosed ( (See Patent Document 2).

[0006] Furthermore, the insulating layer beneath the oxide semiconductor layer that forms the channel releases oxygen upon heating. A semiconductor device is disclosed that uses an insulating layer to reduce oxygen vacancies in the oxide semiconductor layer (P.S. (See Patent Document 3). [Prior art documents] [Patent Documents]

[0007] [Patent Document 1] Japanese Patent Publication No. 2006-165529 [Patent Document 2] Japanese Patent Publication No. 2009-278115 [Patent Document 3] Japanese Patent Publication No. 2012-009836 [Overview of the project] [Problems that the invention aims to solve]

[0008] Examples of transistors having an oxide semiconductor film include inverse staggered type (bottom gate structure) Examples include oxide semiconductors (also called staghorn or top-gate structures) or staggered types (also called top-gate structures). When a transistor with a membrane is applied to a display device, it is more inverse than a staggered transistor. Staggered transistors have a relatively simple manufacturing process and lower production costs. Therefore, it is often used. However, the screen size of the display device is increasing, or the display device is High-resolution image quality (for example, 4K x 2K (horizontal pixels = 3840 pixels, vertical pixels) =2160 pixels) or 8K×4K (horizontal pixels = 7680 pixels, vertical pixels = As high-resolution display devices (such as those with 4320 pixels) advance, inverse staggered transistors... Because there is parasitic capacitance between the gate electrode and the source and drain electrodes, the parasitic capacitance This resulted in significant signal delays and other issues, leading to a deterioration in the image quality of the display device. Therefore, regarding staggered transistors having oxide semiconductor films, stable semiconductor characteristics and The development of highly reliable structures is desired.

[0009] Furthermore, when fabricating a transistor using an oxide semiconductor film for the channel region, Oxygen vacancies formed in the channel region of a conductive film affect transistor characteristics. This becomes a problem. For example, when an oxygen vacancy is formed in the channel region of an oxide semiconductor film, the acid Carriers are generated due to elementary defects. Carriers are generated in the channel region of the oxide semiconductor film. When generated, it causes changes in the electrical properties of a transistor having an oxide semiconductor film in the channel region. Typically, a shift in the threshold voltage occurs. Also, the electrical characteristics vary from transistor to transistor. This presents a problem. Therefore, in the channel region of an oxide semiconductor film, oxygen vacancies exist. The less of it there is, the better. On the other hand, in transistors that use an oxide semiconductor film in the channel region In this case, the oxide semiconductor film in contact with the source electrode and the drain electrode is the source electrode and To reduce contact resistance with the drain electrode, a higher oxygen deficiency and lower resistance are preferable.

[0010] In view of the above problems, one aspect of the present invention relates to a transistor having an oxide semiconductor, in which electricity One of the challenges is to suppress fluctuations in atmospheric characteristics and improve reliability. One aspect of the present invention aims to provide a staggered transistor having an oxide semiconductor. One of these is a transistor having an oxide semiconductor with a large on-current. One of the objectives of this invention is to provide an inverter. Alternatively, one aspect of this invention relates to an oxide semiconductor. One of the objectives is to provide a transistor with a small off-current. Alternatively, this One aspect of the invention aims to provide a semiconductor device with reduced power consumption. Alternatively, one aspect of the present invention aims to provide a novel semiconductor device.

[0011] Furthermore, the description of the above problems does not preclude the existence of other problems. The approach does not necessarily need to solve all of these problems. Other problems are addressed in the details. This will become clear from the descriptions in the documents, etc., and it is not possible to extract any issues other than those mentioned above from the descriptions in the specifications, etc. It is possible to release it. [Means for solving the problem]

[0012] One aspect of the present invention is a semiconductor device having a transistor, wherein the transistor is a first A first oxide semiconductor film on an insulating film, a gate insulating film on the first oxide semiconductor film, and A second oxide semiconductor film on an insulating film, a first oxide semiconductor film, and a second oxide semiconductor The first oxide semiconductor film has a second insulating film on the film, and the channel is in contact with the gate insulating film. A drain region, a source region in contact with the second insulating film, and a drain region in contact with the second insulating film. The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film. It is a conductive device.

[0013] Another aspect of the present invention is a semiconductor device having a transistor, wherein the transistor The first oxide semiconductor film is on the first insulating film, and the gate insulating film is on the first oxide semiconductor film. A film, a second oxide semiconductor film on the gate insulating film, and a conductive film on the second oxide semiconductor film, The device comprises a first oxide semiconductor film and a second insulating film on a conductive film, and the first oxide semiconductor film It comprises a channel region in contact with the gate insulating film, a source region in contact with the second insulating film, and the second The second oxide semiconductor film has a drain region in contact with the insulating film, and the second oxide semiconductor film is the first oxide semiconductor film. It is a semiconductor device with a higher carrier density than a film.

[0014] Furthermore, in the above embodiment, the upper end of the gate insulating film is the lower end of the second oxide semiconductor film It is preferable to have a region that aligns, or a region that is located outside the lower edge of the second oxide semiconductor film. It seems so.

[0015] Furthermore, in the above embodiment, the second insulating film is either nitrogen or hydrogen, or both. It is preferable to have it.

[0016] Furthermore, in the above embodiment, the transistor further comprises a third insulating film on the second insulating film and Through the openings provided in the second insulating film and the third insulating film, the source region is connected - The electrode and the drain region through the openings provided in the second insulating film and the third insulating film Preferably, it has a drain electrode connected to it.

[0017] Furthermore, in the above embodiment, the source region and the drain region are a second oxide semiconductor film and water It is preferable that there are regions with the same elementary concentration. Also, in the above embodiment, the source region and the drain region The region contains one or more of the following elements: hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, or noble gases. That would be preferable.

[0018] Furthermore, in the above embodiment, either the first oxide semiconductor film or the second oxide semiconductor film Either one or both are oxygen, in, Zn, and M (where M is Al, Ga, Y, or Sn). It is preferable to have the above. In addition, in the above embodiment, the first oxide semiconductor film and the second acid Either or both of the crystalline semiconductor films have crystalline regions, and the crystalline regions have c-axis orientation. It would be preferable if that happened.

[0019] Another aspect of the present invention relates to a semiconductor device and a display element described in any one of the above aspects. A display device having a child. Another aspect of the present invention is a display device having a touch sensor. This is a display module having the following. Another aspect of the present invention is any of the above aspects. One semiconductor device, the display device, or the display module described above, and an operation key or It is an electronic device that has a battery. [Effects of the Invention]

[0020] According to one aspect of the present invention, in a transistor having an oxide semiconductor, the variation in electrical characteristics By suppressing this, reliability can be improved. Alternatively, according to one aspect of the present invention, A staggered transistor having an oxide semiconductor can be provided. Or, the present invention In one embodiment, a transistor having an oxide semiconductor and a large on-current is provided. Yes, it is possible. Alternatively, according to one aspect of the present invention, a transistor having an oxide semiconductor with a low off-current is available. A zista can be provided. Alternatively, according to one aspect of the present invention, power consumption is reduced. A semiconductor device can be provided. Or, according to one aspect of the present invention, a novel semiconductor device can be provided. We can provide this.

[0021] Furthermore, the description of these effects does not preclude the existence of other effects. One embodiment does not necessarily have to possess all of these effects. Furthermore, other effects may be considered. This will become clear from the description in the specification, drawings, claims, etc., and the specification, drawings It is possible to extract effects other than those mentioned above from the descriptions in the surfaces, claims, etc. [Brief explanation of the drawing]

[0022] [Figure 1] A diagram illustrating the top surface and cross-section of a semiconductor device. [Figure 2] A diagram illustrating the top surface and cross-section of a semiconductor device. [Figure 3] A diagram illustrating the top surface and cross-section of a semiconductor device. [Figure 4] A diagram illustrating the top surface and cross-section of a semiconductor device. [Figure 5] A diagram illustrating the top surface and cross-section of a semiconductor device. [Figure 6] A diagram illustrating the top surface and cross-section of a semiconductor device. [Figure 7] A diagram illustrating the cross-section of a semiconductor device. [Figure 8] A diagram illustrating the cross-section of a semiconductor device. [Figure 9] A diagram illustrating the cross-section of a semiconductor device. [Figure 10] A diagram illustrating the cross-section of a semiconductor device. [Figure 11] A diagram illustrating the cross-section of a semiconductor device. [Figure 12] A diagram illustrating the band structure. [Figure 13] A cross-sectional diagram illustrating the method for manufacturing a semiconductor device. [Figure 14] A cross-sectional diagram illustrating the method for manufacturing a semiconductor device. [Figure 15]A cross-sectional diagram illustrating the method for manufacturing a semiconductor device. [Figure 16] A cross-sectional diagram illustrating the method for manufacturing a semiconductor device. [Figure 17] A cross-sectional diagram illustrating the method for manufacturing a semiconductor device. [Figure 18] A cross-sectional diagram illustrating the method for manufacturing a semiconductor device. [Figure 19] A cross-sectional diagram illustrating the method for manufacturing a semiconductor device. [Figure 20] Figures illustrating the XRD structural analysis of CAAC-OS and single-crystal oxide semiconductors, as well as a figure showing the limited-field electron diffraction pattern of CAAC-OS. [Figure 21] Cross-sectional TEM images of CAAC-OS, as well as planar TEM images and their image analysis results. [Figure 22] Figure showing the electron diffraction pattern of nc-OS, and a cross-sectional TEM image of nc-OS. [Figure 23] Cross-sectional TEM image of an a-like OS. [Figure 24] A diagram showing the changes in the crystalline structure of In-Ga-Zn oxide due to electron irradiation. [Figure 25] A top view showing one embodiment of a display device. [Figure 26] A cross-sectional view showing one embodiment of a display device. [Figure 27] A cross-sectional view showing one embodiment of a display device. [Figure 28] A diagram illustrating the circuit configuration of a semiconductor device. [Figure 29] A diagram illustrating the configuration of the pixel circuit, and a timing chart illustrating the operation of the pixel circuit. [Figure 30] Block diagrams and circuit diagrams illustrating the display device. [Figure 31] A diagram illustrating the display module. [Figure 32] A diagram illustrating electronic devices. [Figure 33] A diagram illustrating the Id-Vg characteristics of the transistor in the example. [Figure 34] A diagram illustrating a cross-sectional TEM image of a transistor in the example. [Figure 35]A top view and a cross-sectional view illustrating a comparative transistor structure in the example. [Figure 36] A diagram illustrating the electrical characteristics of the transistor in the example. [Figure 37] A diagram illustrating the electrical characteristics of the transistor in the example. [Figure 38] A diagram illustrating the electrical characteristics of the transistor in the example. [Figure 39] A diagram illustrating the electrical characteristics of the transistor in the example. [Figure 40] A diagram illustrating the electrical characteristics of the transistor in the example. [Figure 41] This figure illustrates the Id change rate of the transistor, the Id-Vg characteristics before and after the stress test, and the Id-Vd characteristics before and after the stress test in the example. [Figure 42] A diagram illustrating a cross-sectional TEM image of a transistor in the example. [Modes for carrying out the invention]

[0023] The embodiments and examples will be described below with reference to the drawings. However, the actual form The states and embodiments can be implemented in many different ways, depending on the purpose and scope. It is easily understood by those skilled in the art that its form and details can be changed in various ways without deviation. Therefore, the present invention shall be interpreted as being limited to the contents described in the following embodiments and examples. It's not something that can be done.

[0024] Furthermore, in the drawings, the size, layer thickness, or area is exaggerated for clarity. There are cases where this is not the case. Therefore, it is not necessarily limited to that scale. Note that the drawing is an ideal example. This is a schematic representation and is not limited to the shapes or values ​​shown in the drawings.

[0025] Furthermore, the ordinal numbers "1st," "2nd," and "3rd" used in this specification refer to the constituent elements. This note is added to avoid confusion and does not imply any numerical limitation.

[0026] Furthermore, in this specification, phrases indicating placement such as "above" and "below" refer to the relative positions of the components. The positional relationships are used for convenience in explaining them by referring to the drawings. The relationship changes as appropriate depending on the direction in which each component is described. Therefore, as explained in the specification... It is not limited to the same words or phrases, and can be appropriately rephrased depending on the situation.

[0027] Furthermore, in this specification, the term "transistor" includes a gate, a drain, and a source. It is an element having at least three terminals. And, drain (drain terminal, drain Between the drain region (or drain electrode) and the source (source terminal, source region, or source electrode) It has a channel region, and current flows through the drain, the channel region and the source. This is possible. In this specification, the channel region is defined as the region where the current is mainly It refers to the area in which something flows.

[0028] Furthermore, the source and drain functions may differ when using transistors with different polarities, or when the circuit The direction of the current may change during operation, which can cause the current to switch positions. In detailed documents, the terms "source" and "drain" may be used interchangeably. ru.

[0029] Furthermore, in this specification, etc., "electrically connected" means "having some kind of electrical effect." This includes cases where the connection is made via ". Here, "has some electrical effect The term "of" is not particularly limited as long as it enables the exchange of electrical signals between connected objects. For example, "things that have some kind of electrical effect" include electrodes and wiring, as well as transistors. Switching elements such as resistors, inductors, capacitors, and other various functional elements are available. This includes elements such as [specific components].

[0030] Furthermore, in this specification, "parallel" means that two straight lines have an angle of -10° or more and 10° or less. This refers to a state where objects are arranged in degrees. Therefore, it also includes cases where the angle is between -5° and 5°. Furthermore, "perpendicular" refers to a state in which two straight lines are positioned at an angle of 80° to 100°. Therefore, this includes cases where the angle is between 85° and 95°.

[0031] Furthermore, in this specification, the terms "membrane" and "layer" are interchangeable. It is possible to change the term. For example, the term "conductive layer" can be changed to the term "conductive film." It may be possible to change it. Or, for example, change the term "insulating film" to "insulating layer". In some cases, it may be possible to change the terminology to this.

[0032] Furthermore, unless otherwise specified in this specification, off-current refers to the current when the transistor is turned off. This refers to the drain current when the device is in a state (also called a non-conductive state or an interrupted state). Unless otherwise specified, in an n-channel transistor, the voltage between the gate and source is V When gs is lower than the threshold voltage Vth, in a p-channel transistor, the gate and socket are... This refers to a state where the voltage Vgs between channels is higher than the threshold voltage Vth. For example, n channels. The off-current of a transistor is defined as the voltage between the gate and source (Vgs) and the threshold voltage (Vt). Sometimes, this refers to the drain current when it is lower than h.

[0033] The off-current of the transistor may depend on Vgs. Therefore, when it is said that the off-current of the transistor is I or less, it may mean that there exists a value of Vgs for which the off-current of the transistor becomes I or less. The off-current of the transistor may refer to the off-current in the off-state at a predetermined Vgs, in the off-state at Vgs within a predetermined range, or in the off-state at Vgs where a sufficiently reduced off-current is obtained, etc. when it is said that the off-current of the transistor is I or less, it may mean that there exists a value of Vgs for which the off-current of the transistor becomes I or less. The off-current of the transistor may refer to the off-current in the off-state at a predetermined Vgs, in the off-state at Vgs within a predetermined range, or in the off-state at Vgs where a sufficiently reduced off-current is obtained, etc. The off-current of the transistor may refer to the off-current in the off-state at a predetermined Vgs, in the off-state at Vgs within a predetermined range, or in the off-state at Vgs where a sufficiently reduced off-current is obtained, etc. The off-current of the transistor may refer to the off-current in the off-state at a predetermined Vgs, in the off-state at Vgs within a predetermined range, or in the off-state at Vgs where a sufficiently reduced off-current is obtained, etc.

[0034] As an example, assume an n-channel transistor where the threshold voltage Vth is 0.5V, the drain current at Vgs = 0.5V is 1×10 A, the drain current at Vgs = 0.1V is 1×10 , -22 , , , -22 , -19 , , ,

[0035] A, the drain current at Vgs = -0.5V is 1×10 -1 3 A, and the drain current at Vgs = -0.8V is 1×10 -19 A. Since the drain current of this transistor is 1×10 A or less at Vgs = -0.5V or in the range of Vgs from -0.5V to -0.8V, it may be said that the off-current of this transistor is 1×10 -22 A or less. Since there exists a Vgs for which the drain current of this transistor becomes 1×10 A or less, it may be said that the off-current of this transistor is 1×10 A or less at Vgs = -0.5V or in the range of Vgs from -0.5V to -0.8V. -19 A or less. A or less, it may be said that the off-current of this transistor is 1×10 -19 A or less. Since there exists a Vgs for which the drain current of this transistor becomes 1×10 -22 A or less, it may be said that the off-current of this transistor is 1×10 A or less. -22 A or less.

[0035] Also, in this specification, etc., the off-current of a transistor having a channel width W is defined as the off-current per unit channel width It is sometimes expressed as the current value flowing per watt (W). Also, a predetermined channel width (e.g., 1 μm) It is sometimes expressed as the value of the current flowing through it. In the latter case, the unit of off-current is the second of current / length. It may be expressed in units that have an element (for example, A / μm).

[0036] The off-current of a transistor may be temperature-dependent. In this specification, the off-current Unless otherwise specified, the device is turned off at room temperature, 60°C, 85°C, 95°C, or 125°C. It may represent electric current. Alternatively, it may indicate that the reliability of the semiconductor device containing the transistor is maintained. The temperature at which the transistor is proven, or the temperature at which the semiconductor device containing the transistor is used (e.g.) For example, it may represent the off-current at any one temperature between 5°C and 35°C. The off-current of the inverter is less than or equal to I, meaning that at room temperature, 60°C, 85°C, 95°C, and 125°C, The temperature at which the reliability of the semiconductor device, etc., containing the transistor is guaranteed, or the transistor The operating temperature of semiconductor devices containing radiators (for example, any temperature between 5°C and 35°C) There exists a value of Vgs such that the transistor's off-current at temperature 1 is less than or equal to I. It may refer to something else.

[0037] The off-current of a transistor may depend on the voltage Vds between the drain and source. In this specification, unless otherwise specified, the off-current is defined as Vds = 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, and This may represent the off-current at 20V. Or, the semiconductor containing the transistor in question. The reliability of the device, etc., is guaranteed by Vds, or the semiconductor device containing the transistor in question. It may represent the off-current at Vds used in applications such as transistor off-voltage. The current is less than or equal to I, meaning that Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, 20V, the transistor in question The reliability of the semiconductor device, etc., is guaranteed by Vds, or the semiconductor containing the transistor. The off-current of the transistor at Vds used in conductive devices, etc., is less than or equal to I. This can sometimes refer to the existence of a Vgs value.

[0038] In the above explanation of off-current, drain may be read as source. The term "current" can also refer to the current flowing through the source of a transistor when it is in the off state.

[0039] Furthermore, in this specification, the term "leakage current" may be used interchangeably with "off-current." Furthermore, in this specification, off-current refers to, for example, when a transistor is in the off state. It can also refer to the current flowing between the source and the drain.

[0040] (Embodiment 1) In this embodiment, a semiconductor device having a transistor and a method for manufacturing the semiconductor device are described. An example will be explained using Figures 1 through 19.

[0041] <1-1. Example of Semiconductor Device Configuration 1> Figures 1(A), 1(B), and 1(C) show an example of a semiconductor device having a transistor. The transistors shown in 1(A),(B), and(C) have a top-gate structure.

[0042] Figure 1(A) is a top view of transistor 100, and Figure 1(B) is a dot chain view of Figure 1(A). This is a cross-sectional view between lines X1 and X2, and Figure 1(C) is a cross-section between the dashed line Y1 and Y2 in Figure 1(A). This is a diagram. Note that in Figure 1(A), for clarity, components such as the insulating film 110 have been omitted. This is illustrated in the diagram. Note that in the top view of the transistor, Figure 1( Similar to A), some components may be omitted in the illustration. Also, the dashed line X1-X The two directions are referred to as the channel length (L) direction, and the direction of the dashed line Y1-Y2 is referred to as the channel width (W) direction. It may happen.

[0043] The transistor 100 shown in Figures 1(A), (B), and (C) is an insulating film formed on the substrate 102. The film 104, the oxide semiconductor film 108 on the insulating film 104, and the insulating film on the oxide semiconductor film 108 Film 110, oxide semiconductor film 112 on insulating film 110, insulating film 104, oxide semiconductor film It has 108 and an insulating film 116 on the oxide semiconductor film 112. The film 108 has a channel region 1 on which the oxide semiconductor film 112 is superimposed and is in contact with the insulating film 110. 08i, the source region 108s in contact with the insulating film 116, and the drain in contact with the insulating film 116 It has region 108d.

[0044] Furthermore, transistor 100 has an insulating film 118 on insulating film 116 and insulating films 116, 11 A conductive material is electrically connected to the source region 108s through the opening 141a provided in 8. Through the film 120a and the openings 141b provided in the insulating films 116 and 118, the drain region It may also have a conductive film 120b that is electrically connected to region 108d.

[0045] In this specification, etc., insulating film 104 is referred to as the first insulating film, and insulating film 116 as the second insulating film. The edge film and the insulating film 118 are sometimes referred to as the third insulating film. 10 functions as a gate insulating film, and the oxide semiconductor film 112 functions as a gate electrode. It has the function of a source electrode, and conductive film 12 0b functions as the drain electrode.

[0046] Furthermore, the insulating film 116 contains either nitrogen or hydrogen, or both. By configuring 16 to have either nitrogen or hydrogen, or both, oxide semiconductors The body film 108 and the oxide semiconductor film 112 are supplied with either nitrogen or hydrogen, or both. They can provide it.

[0047] Furthermore, the oxide semiconductor film 112 has the function of supplying oxygen to the insulating film 110. The semiconductor film 112 has the function of supplying oxygen to the insulating film 110, so that in the insulating film 110 It becomes possible to include excess oxygen in it. Because the insulating film 110 has an excess oxygen region, The excess oxygen is supplied to the oxide semiconductor film 108, more specifically to the channel region 108i. Therefore, it is possible to provide highly reliable semiconductor devices.

[0048] Furthermore, in order to supply excess oxygen to the oxide semiconductor film 108, The insulating film 104 formed below 8 may have excess oxygen. However, the insulating film 10 If 4 has excess oxygen, the excess oxygen contained in the insulating film 104 will be absorbed into the oxide semiconductor film 10 It can also be supplied to the source region 108s and drain region 108d of 8. When excess oxygen is supplied to region 108s and drain region 108d, source region 108 The resistance in s and the drain region 108d may be high.

[0049] On the other hand, the insulating film 110 formed on top of the oxide semiconductor film 108 has excess oxygen. By doing so, it becomes possible to selectively supply excess oxygen only to channel region 108i. Alternatively, channel region 108i, source region 108s, and drain region 10 After supplying excess oxygen to 8d, the source region 108s and the drain region 108d The goal is to selectively increase the carriage density.

[0050] Furthermore, the oxide semiconductor film 112 supplies oxygen to the insulating film 110, and then the insulating film 116... The supply of either nitrogen or hydrogen, or both, increases the carrier density. In other words, the oxide semiconductor film 112 is an oxide conductor (OC: Oxide Cond It also functions as a uctor. Therefore, the oxide semiconductor film 112 is an oxide semiconductor The carrier density is higher than that of membrane 108.

[0051] Furthermore, the oxide semiconductor film 108 has a source region 108s and a drain region 108d Furthermore, the oxide semiconductor film 112 may each have elements that form oxygen vacancies. The elements that typically form the above-mentioned oxygen vacancies are hydrogen, boron, carbon, nitrogen, and fluorine. Examples include phosphorus, phosphorus, sulfur, chlorine, and noble gases. Representative examples of noble gas elements include helium. Examples include lium, neon, argon, krypton, and xenon.

[0052] When impurity elements are added to an oxide semiconductor film, the bonds between metal elements and oxygen in the oxide semiconductor film are formed. The bond is cleaved, and an oxygen vacancy is formed. Alternatively, an impurity element is added to the oxide semiconductor film. Then, the oxygen that was bonded to the metal element in the oxide semiconductor film combines with the impurity element, and the metal element Oxygen is removed from the film, forming an oxygen vacancy. As a result, in oxide semiconductor films, Carrier density increases, and conductivity improves.

[0053] Furthermore, in transistor 100, the side edge of the insulating film 110 and the oxide semiconductor film 112 It is preferable that the side edges of the transistor have a region that aligns with it. In other words, in transistor 100 The upper end of the insulating film 110 and the lower end of the oxide semiconductor film 112 are roughly aligned. Then, by processing the insulating film 110 using the oxide semiconductor film 112 as a mask, the above structure is obtained. It is possible.

[0054] Next, we will describe the details of the components of the semiconductor device shown in Figures 1(A), 1(B), and 1(C).

[0055] [substrate] Various substrates can be used as substrate 102, and it is not limited to a specific type. No. Examples of substrates include semiconductor substrates (e.g., single crystal substrates or silicon substrates), SO I substrates, glass substrates, quartz substrates, plastic substrates, metal substrates, stainless steel substrates , substrates with stainless steel foil, tungsten substrates, tungsten foil A substrate having, a flexible substrate, a laminated film, paper containing fibrous material, or a base material film Examples include film. Examples of glass substrates include barium borosilicate glass and alumino. Examples include gynosilicate glass or soda-lime glass. Flexible substrates, bonded fills. Examples of substrate films include the following: For example, polyethylene. Terephthalate (PET), polyethylene naphthalate (PEN), polyether sulf There are plastics such as acrylic (PES). Or, as an example, acrylic, etc. Examples include synthetic resins. Alternatively, one example is polypropylene, polyester, polyfluorocarbonate. Examples include vinyl oxide and polyvinyl chloride. Alternatively, polyamide and polyimide are also examples. These include aramid, epoxy, inorganic vapor-deposited films, or paper. In particular, semiconductor substrates, By manufacturing transistors using single-crystal substrates or SOI substrates, the characteristics are improved. Transistors with less variation in size or shape, high current capacity, and small size. A transistor can be manufactured. When a circuit is constructed using such a transistor, This allows for lower power consumption of the circuit or higher circuit integration.

[0056] Furthermore, a flexible substrate is used as the substrate 102, and the transistor is formed directly on the flexible substrate. This may be done. Alternatively, a release layer may be provided between the substrate 102 and the transistor. Release layer After partially or completely completing the semiconductor device on it, it is separated from the substrate 102, and other It can be used to transfer the transistor onto a circuit board. In this case, the transistor can be placed on a circuit board with poor heat resistance or It can also be transferred to flexible substrates. Furthermore, the aforementioned release layer may contain, for example, a tungsten film and an oxide film. A layered structure of inorganic films with a resin film, or an organic resin film such as polyimide is formed on the substrate. The configured configuration can be used.

[0057] One example of a substrate on which transistors are mounted is the formation of the transistors described above. In addition to substrates that can be used, paper substrates, cellophane substrates, aramid film substrates, and polyimide film substrates are also available. Aluminum substrates, stone substrates, wood substrates, fabric substrates (natural fibers (silk, cotton, linen), synthetic fibers (nylon) , polyurethane, polyester) or regenerated fibers (acetate, cupro, rayon, These substrates include recycled polyester, leather substrates, or rubber substrates. By using this, it is possible to form transistors with good characteristics and transistors with low power consumption. It is possible to manufacture devices that are less prone to breakage, provide heat resistance, reduce weight, or make them thinner. .

[0058] [First insulating film] The insulating film 104 can be deposited using sputtering, CVD, vapor deposition, or pulsed laser deposition. It can be formed using appropriate methods such as PLD, printing, and coating. Also, insulating film 104 For example, this involves forming an oxide insulating film or a nitride insulating film as a single layer or in multiple layers. This can be done. Furthermore, in order to improve the interface characteristics with the oxide semiconductor film 108, the insulating film 104 is In this case, it is preferable that at least the region in contact with the oxide semiconductor film 108 be formed of an oxide insulating film. Furthermore, an oxide insulating film that releases oxygen upon heating is used as the insulating film 104. Then, the heat treatment transfers the oxygen contained in the insulating film 104 to the oxide semiconductor film 108. It is possible.

[0059] The thickness of the insulating film 104 is 50 nm or more, or 100 nm to 3000 nm, This can be between 200 nm and 1000 nm. By increasing the thickness of the insulating film 104 This can increase the amount of oxygen released from the insulating film 104, and also allow the insulating film 104 and the oxide semiconductor to separate. Interface states at the interface with the conductive film 108, and channel regions 1 of the oxide semiconductor film 108 It is possible to reduce the oxygen deficiency contained in 08i.

[0060] Examples of dielectric film 104 include silicon oxide, silicon oxide nitride, silicon nitride oxide, and nitrile oxide. Silicon oxide, aluminum oxide, hafnium oxide, gallium oxide, or Ga-Zn oxide The following can be used, and it can be provided in a single layer or in a multilayer structure. In this embodiment, the insulating film As 104, a laminated structure of silicon nitride film and silicon oxidizide film is used. In addition, an insulating film 104 is used as a laminated structure, with a silicon nitride film on the lower layer and a silicon oxidative nitride film on the upper layer. By using a silicon film, oxygen can be efficiently introduced into the oxide semiconductor film 108. Cut.

[0061] [Oxide semiconductor film] Either or both of the oxide semiconductor film 108 and the oxide semiconductor film 112 are In- It is formed from metal oxides such as M-Zn oxide (where M is Al, Ga, Y, or Sn). As oxide semiconductor films 108 and 112, In-Ga oxide and In-Z N oxide may also be used. In particular, oxide semiconductor film 108 and oxide semiconductor film 112 are It is preferable to form it from a metal oxide composed of the same constituent elements, as this can reduce manufacturing costs. stomach.

[0062] Note that when oxide semiconductor film 108 and oxide semiconductor film 112 are In-M-Zn oxide The atomic ratio of In to M is such that when the sum of In and M is considered to be 100 atomic%, In is 2 Higher than 5 atomic%, M less than 75 atomic%, or In 34 atomic% The value must be higher than c%, and M must be less than 66 atomic%.

[0063] The oxide semiconductor film 108 and the oxide semiconductor film 112 have an energy gap of 2 eV or more. Preferably, the voltage is 2.5 eV or higher, or 3 eV or higher.

[0064] The thickness of the oxide semiconductor film 108 is 3 nm or more and 200 nm or less, preferably 3 nm or more. The wavelength is 00 nm or less, more preferably 3 nm to 60 nm. Also, oxide semiconductor film The thickness of 112 is 5 nm to 500 nm, preferably 10 nm to 300 nm. More preferably, the wavelength is between 20 nm and 100 nm.

[0065] When oxide semiconductor film 108 and oxide semiconductor film 112 are In-M-Zn oxide, Atoms of the metal element in the sputtering target used to deposit nM-Zn oxide films The numerical ratio preferably satisfies In≧M and Zn≧M. Such a sputtering target As for the atomic ratio of the metal elements in the net, In:M:Zn=1:1:1, In:M:Zn=1: 1:1.2, In:M:Zn=2:1:1.5, In:M:Zn=2:1:2.3, In :M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:4. 1. In:M:Zn = 5:1:7 is preferred. Note that the oxide semiconductor film to be formed is 108 The atomic ratios of the oxide semiconductor film 112 and the above sputtering target are respectively The atomic ratio of the contained metal elements can vary by approximately plus or minus 40%. For example, For the sputtering target, an atomic ratio of In:Ga:Zn = 4:2:4.1 was used. In this case, the atomic ratio of the oxide semiconductor film 108 and the oxide semiconductor film 112 to be formed is I There are cases where the neighboring properties of n:Ga:Zn are 4:2:3.

[0066] Furthermore, the oxide semiconductor film 108 contains silicon and carbon, which are among the Group 14 elements. When this occurs, the oxygen vacancy increases, and it may become n-type. For this reason, oxide semiconductor film 108 In particular, in the channel region 108i, the concentration of silicon or carbon (secondary ion mass) The concentration obtained by the analysis method is 2 × 10 18 atoms / cm 3 The following, or 2 × 10 1 7 atoms / cm 3 The following can be achieved. As a result, the transistor has a threshold voltage. It has electrical properties that result in a positive voltage (also known as normally-off characteristics).

[0067] Furthermore, in the channel region 108i, alkali obtained by secondary ion mass spectrometry is also available. The concentration of metal or alkaline earth metal is 1 × 10⁻⁶ 18 atoms / cm 3 The following, or 2 ×10 16 atoms / cm 3 The following may be used: Alkali metals and alkaline earth elements Metals can generate carriers when bonded with oxide semiconductors, which can turn off transistors. The current may increase. For this reason, alkali metals in channel region 108i and It is preferable to reduce the concentration of alkaline earth metals. As a result, the transistor It has an electrical characteristic (also called a normally-off characteristic) where the voltage is positive.

[0068] Furthermore, if nitrogen is present in the channel region 108i, electrons, which act as carriers, are generated, The carrier density may increase, resulting in an n-type semiconductor. This can lead to the presence of nitrogen in oxide semiconductors. Transistors using body membranes tend to exhibit normally-on characteristics. Therefore, channel region 1 In 08i, it is preferable that nitrogen is reduced as much as possible. For example, secondary ions The nitrogen concentration obtained by mass spectrometry is 5 × 10⁻⁶ 18 atoms / cm 3If you do the following: stomach.

[0069] Furthermore, by reducing impurity elements in the channel region 108i, the oxide semiconductor film The carrier density can be reduced. Therefore, in the channel region 108i, Carrier density 1 × 10 17 pieces / cm 3 The following, or 1 × 10 15 pieces / cm 3 Below, also is 1 x 10 13 pieces / cm 3 The following, or 1 × 10 11 pieces / cm 3 The following is possible: .

[0070] The channel region 108i is an oxide semiconductor film with a low impurity concentration and low defect level density. By using this method, transistors with even better electrical characteristics can be fabricated. Here, high purity is defined as having a low impurity concentration and a low defect level density (few oxygen vacancies). It is called genuine or substantially high-purity genuine. Alternatively, it is called genuine or substantially genuine. High purity Oxide semiconductors that are highly intrinsic or substantially high-purity intrinsic have few carrier sources, In some cases, the carrier density can be lowered in the oxide semiconductor film. A transistor in which a threshold voltage region is formed exhibits electrical characteristics where the threshold voltage is positive (normally). Also known as off-peak characteristics. It is prone to becoming high-purity intrinsic or substantially high-purity intrinsic. Oxide semiconductor films have a low defect level density, which can sometimes result in a low trap level density. Furthermore, oxide semiconductor films that are high-purity intrinsic or substantially high-purity intrinsic exhibit significant off-current. Small characteristics can be obtained. Therefore, a channel region is formed in the oxide semiconductor film. Transistors with small variations in electrical characteristics can be highly reliable. ru.

[0071] On the other hand, the source region 108s, the drain region 108d, and the oxide semiconductor film 112 are It is in contact with the insulating film 116. Source region 108s, drain region 108d, and oxide semiconductor When film 112 comes into contact with insulating film 116, the source region 108s and the drain are separated from the insulating film 116. In region 108d and oxide semiconductor film 112, either or both of hydrogen and nitrogen are present. Because it is added, the carrier density increases.

[0072] Furthermore, either or both of the oxide semiconductor film 108 and the oxide semiconductor film 112 are Non-single-crystal structures are also acceptable. Non-single-crystal structures include, for example, CAAC-OS(C Ax) described later. is Aligned Crystalline Oxide Semiconductor or), including polycrystalline structure, microcrystalline structure (described later), or amorphous structure. In contrast, amorphous structures have the highest defect level density, while CAAC-OS has the lowest defect level density. .

[0073] Furthermore, the oxide semiconductor film 108 has regions with an amorphous structure, regions with a microcrystalline structure, and regions with a polycrystalline structure. A monolayer film having two or more regions: a region of CAAC-OS and a region of single crystal structure, or This film may have a stacked structure. Alternatively, the oxide semiconductor film 112 may have an amorphous structure. Regions of microcrystalline structure, region of polycrystalline structure, region of CAAC-OS, and single-crystal structure This may be a monolayer film having two or more of the regions, or a structure in which such films are stacked.

[0074] In addition, the oxide semiconductor film 108 has a channel region 108i and a source region 108s. Furthermore, the crystallinity may differ from that of the drain region 108d. Specifically, oxide semiconductor film In 108, the source region 108s and drain region 10 are more important than the channel region 108i. 8d may have lower crystallinity. This is due to the source region 108s and the drain region 1 When an impurity element is added to 08d, the source region 108s and the drain region 108d This is because damage occurs, reducing its crystallinity.

[0075] [Insulating film that functions as a gate insulating film] The insulating film 110 is formed by a single layer or stacking of oxide insulating films or nitride insulating films. This can be done. Furthermore, in order to improve the interface characteristics with the oxide semiconductor film 108, the insulating film 110 is In this case, at least the region in contact with the oxide semiconductor film 108 is formed using an oxide insulating film. This is preferable. As the insulating film 110, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride Silicon, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or Ga -Zn oxide or similar materials can be used, and the structure can be provided as a single layer or in multiple layers.

[0076] Furthermore, the insulating film 110 is provided with an insulating film that has a blocking effect against oxygen, hydrogen, water, etc. This allows for the diffusion of oxygen from the oxide semiconductor film 108 to the outside, and from the outside into the oxide semiconductor It can prevent hydrogen, water, etc. from entering the membrane 108. Blocking effect of oxygen, hydrogen, water, etc. Examples of insulating films with the effect include aluminum oxide film, aluminum oxide nitride film, and galvanic oxide film. gallium oxide film, gallium oxide film, yttrium oxide film, yttrium oxide film, hafni oxide film Examples include um film and hafnium oxide nitride film.

[0077] Furthermore, as the insulating film 110, hafnium silicate (HfSiO x ), nitrogen is added Hafnium silicate (HfSi x O y N z ), Nitrogen-added hafnium aluminum (HfAl x O y N z ), high-k materials such as hafnium oxide and yttrium oxide By using this material, gate leakage in transistors can be reduced.

[0078] Furthermore, by using an oxide insulating film that releases oxygen upon heating as the insulating film 110, The process involves transferring oxygen contained in the insulating film 110 to the oxide semiconductor film 108 through heat treatment. This is possible.

[0079] The thickness of the insulating film 110 is 5 nm to 400 nm, or 5 nm to 300 nm. Alternatively, it can be between 10 nm and 250 nm.

[0080] [Second insulating film] The insulating film 116 has either nitrogen or hydrogen, or both. For example, a nitride insulating film can be used. The nitride insulating film may include silicon nitride. Formed using silicon nitride, aluminum nitride, aluminum nitride, etc. Yes, it is possible. The hydrogen concentration contained in the insulating film 116 is 1 × 10⁻⁶. 22 atoms / cm 3 That's all. It is preferable that the insulating film 116 is the source region 108s of the oxide semiconductor film 108, and It is in contact with the drain region 108d. Also, the insulating film 116 is in contact with the oxide semiconductor film 112. Therefore, the source region 108s and drain region 108d that are in contact with the insulating film 116, and As the hydrogen concentration in the oxide semiconductor film 112 increases, the source region 108s and the drain region 1 08d and the carrier density of the oxide semiconductor film 112 can be increased. Region 108s, drain region 108d, and oxide semiconductor film 112 are each an anodized By contacting the edge film 116, the film may have regions with the same hydrogen concentration.

[0081] [Third insulating film] The insulating film 118 is formed by a single layer or stacking of oxide insulating films or nitride insulating films. This is possible. As the insulating film 118, for example, silicon oxide, silicon oxide nitride, silicon nitride Silicon oxide, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide or G α-Zn oxide or similar materials can be used, and the structure can be provided as a single layer or in multiple layers.

[0082] Furthermore, the insulating film 118 functions as a barrier film against external elements such as hydrogen and water. It is preferable to do so.

[0083] The thickness of the insulating film 118 is 30 nm or more and 500 nm or less, or 100 nm or more and 400 nm. It can be less than or equal to m.

[0084] [Conductive film] The conductive films 120a and 120b were produced using sputtering, vacuum deposition, and pulsed lasers. It can be formed using deposition (PLD) method, thermal CVD method, etc. Also, conductive film 120a For example, 120b includes aluminum, chromium, copper, tantalum, titanium, molybdenum. Metal elements selected from tungsten, nickel, iron, cobalt, and tungsten, or the aforementioned metals Formed using an alloy composed of elements, or an alloy combining the aforementioned metallic elements. It is possible to use one or more metal elements selected from manganese and zirconium. You may use a single layer. Also, the conductive films 120a and 120b can be single-layer or multi-layered. It may also be called a structure. For example, a single-layer structure of an aluminum film containing silicon, or a structure containing manganese. A single-layer structure of copper film, a double-layer structure with a titanium film laminated on an aluminum film, and a titanium nitride film with a titanium layer Two-layer structure with stacked tungsten films, two-layer structure with stacked tungsten films on titanium nitride films, nitriding A two-layer structure in which a tungsten film is laminated on a tantalum film or tungsten nitride film, manganese A two-layer structure in which a copper film is laminated on a copper film containing a titanium film, a two-layer structure in which a copper film is laminated on a titanium film, titanium A film, an aluminum film laminated on the titanium film, and then another titanium film formed on top of that. Layered structure, copper film is layered on top of manganese-containing copper film, and then another manganese-containing copper film is formed on top of that. It has a three-layer structure, etc. Also, aluminum, titanium, tantalum, tungsten, and A combination of one or more selected from ribdenum, chromium, neodymium, and scandium. A gold film or a nitride film may be used.

[0085] Furthermore, the conductive films 120a and 120b are made of indium tin oxide (Indium Tin O xide:ITO), indium oxide containing tungsten oxide, tungsten oxide containing Indium zinc oxide, indium oxide containing titanium oxide, indium oxide containing titanium oxide Indium tin oxide, indium zinc oxide, silicon-containing indium tin oxide (In-Sn -Translucent conductive materials such as Si oxide (also known as ITSO) can also be applied. Furthermore, a laminated structure of the above-mentioned light-transmitting conductive material and the above-mentioned metal element can also be used. ru.

[0086] The thickness of the conductive films 120a and 120b is 30 nm to 500 nm, or 10 The wavelength can be between 0 nm and 400 nm.

[0087] <1-2. Example of Semiconductor Device Configuration 2> Next, regarding a configuration different from the semiconductor device shown in Figures 1(A), 1(B), and 1(C), see Figure 2(A)( We will explain using B)(C).

[0088] Figure 2(A) is a top view of transistor 150, and Figure 2(B) is a single-pointed chain of Figure 2(A). Figure 2(C) is a cross-sectional view between lines X1 and X2, and Figure 2(A) is a cross-sectional view between the dashed line Y1 and Y2. This is a diagram.

[0089] The transistor 150 shown in Figures 2(A), (B), and (C) is an insulating film formed on the substrate 102. The film 104, the oxide semiconductor film 108 on the insulating film 104, and the insulating film on the oxide semiconductor film 108 The film 110, the oxide semiconductor film 112 on the insulating film 110, and the conductive film on the oxide semiconductor film 112. The film 114, the insulating film 104, the oxide semiconductor film 108, and the insulating film 116 on the conductive film 114 It has the following features. Furthermore, the oxide semiconductor film 108 is superimposed on the oxide semiconductor film 112 and is also insulating. The channel region 108i is in contact with the edge film 110, and the source region 108s is in contact with the insulating film 116. It has a drain region 108d that is in contact with the insulating film 116.

[0090] Furthermore, transistor 150 has an insulating film 118 on insulating film 116 and insulating films 116, 11 A conductive material is electrically connected to the source region 108s through the opening 141a provided in 8. Through the film 120a and the openings 141b provided in the insulating films 116 and 118, the drain region It may also have a conductive film 120b that is electrically connected to region 108d.

[0091] In the transistor 150, the oxide semiconductor film 112 and the conductive film 114 function as a gate electrode. Also, the conductive film 114 has a function of making the oxide semiconductor film 112 n-type. By adopting a configuration in which the conductive film 114 has a function of making the oxide semiconductor film 112 n-type, the oxide semiconductor film 112 functions as part of the gate electrode. Also, the insulating film 116 contains either one or both of nitrogen and hydrogen. By adopting a configuration in which the insulating film 116 contains either one or both of nitrogen and hydrogen, it is possible to supply either one or both of nitrogen and hydrogen to the source region 108s and the drain region 108d.

[0092] Also, the oxide semiconductor film 112 has a function of supplying oxygen to the insulating film 110. By virtue of the oxide semiconductor film 112 having a function of supplying oxygen to the insulating film 110, it becomes possible to make the insulating film 110 contain excess oxygen. Since the insulating film 110 has an excess oxygen region, it is possible to supply the excess oxygen into the channel region 108i. Thus, a highly reliable semiconductor device can be provided.

[0093]

[0094] Note that after the oxide semiconductor film 112 supplies oxygen to the insulating film 110, the carrier density increases. Also, when the oxide semiconductor film 112 comes into contact with the conductive film 114, the constituent elements of the conductive film 114 may diffuse into the oxide semiconductor film 112, increasing the carrier density. In other words, the oxide semiconductor film 112 also has a function as an oxide conductor (OC). Therefore, it becomes possible to make the oxide semiconductor film 112 function as part of the gate electrode without increasing the manufacturing process. ​​​​​​​​​​​​​​

[0095] The conductive film 114 is formed using the same method as described above for conductive films 120a and 120b, and It is formed using similar materials. In particular, the conductive film 114 may be titanium, copper, or tungsten. It is preferable to use stainless steel and form it using the sputtering method. Titanium By using copper or tungsten, the oxide semiconductor film 11 in contact with the conductive film 114 The conductivity of 2 can be improved. Alternatively, the conductive film 114 may have a laminated structure. The laminated structure may be, for example, a structure having a copper film on top of a copper film containing manganese, or a structure with a copper film on top of a copper film containing manganese. A structure having an aluminum film on top of a gusten film would be appropriate.

[0096] <1-3. Semiconductor device configuration example 3> Next, regarding a configuration different from the semiconductor device shown in Figures 1(A), 1(B), and 1(C), see Figure 3(A)( We will explain using B)(C).

[0097] Figure 3(A) is a top view of transistor 100A, and Figure 3(B) is a single point view of Figure 3(A). Figure 3(C) is a cross-sectional view between the dashed lines X1 and X2, and Figure 3(A) is a cross-sectional view between the dashed lines Y1 and Y2. This is a view drawing.

[0098] The transistor 100A shown in Figures 3(A), 3(B), and 3(C) is a conductive material formed on the substrate 102. The conductive film 106, the insulating film 104 on the conductive film 106, and the oxide semiconductor film 10 on the insulating film 104 8, an insulating film 110 on the oxide semiconductor film 108, and an oxide semiconductor film 11 on the insulating film 110 2, insulating film 104, oxide semiconductor film 108, and insulating film 11 on oxide semiconductor film 112 It has 6 and . In addition, the oxide semiconductor film 108 has a channel region 1 in contact with the insulating film 110. 08i, the source region 108s in contact with the insulating film 116, and the drain in contact with the insulating film 116 It has region 108d.

[0099] In addition to the configuration of transistor 100 shown above, transistor 100A also has a conductive film 106 and It has an opening 143 and

[0100] The opening 143 is provided in the insulating films 104 and 110. The conductive film 106 is... The oxide semiconductor film 112 is electrically connected through the opening 143. Therefore, the conductive film The same potential is applied to 106 and the oxide semiconductor film 112. An opening 143 is also provided. Alternatively, different potentials may be applied to the conductive film 106 and the oxide semiconductor film 112.

[0101] Furthermore, the conductive film 106 functions as the first gate electrode (also called the bottom gate electrode). The oxide semiconductor film 112 has a second gate electrode (also called the top gate electrode) It has the function of being an insulating film. Furthermore, the insulating film 104 has the function of being a first gate insulating film, and The edge film 110 functions as a second gate insulating film.

[0102] Thus, the transistor 100A shown in Figures 3(A), 3(B), and 3(C) is the same as the transistor explained earlier. Unlike the transistor 100, the oxide semiconductor film 108 has guides that function as gate electrodes located above and below it. It is a structure having an electroluminescent film and an oxide semiconductor film. As shown in transistor 100A, A semiconductor device according to one aspect of the invention may be provided with two or more gate electrodes.

[0103] Furthermore, as shown in Figure 3(C), the oxide semiconductor film 108 acts as the first gate electrode. The conductive film 106 that can perform the function and the oxide semiconductor film 112 that functions as the second gate electrode It is positioned to face the other, and a conductive film and an oxide semiconductor that function as two gate electrodes are sandwiched by the films.

[0104] Also, the length of the oxide semiconductor film 112 in the channel width direction is longer than the length of the oxide semiconductor film 108 in the channel width direction, and the entire channel width direction of the oxide semiconductor film 108 is covered by the oxide semiconductor film 112 via the insulating film 1 10. Further, the oxide semiconductor film 112 and the conductive film 106 are connected at the opening 143 provided in the insulating film 104 and the insulating film 110 Therefore, one side surface of the oxide semiconductor film 108 in the channel width direction faces the oxide semiconductor film 11 2.

[0105] In other words, in the channel width direction of the transistor 100A, the conductive film 106 and the oxide semiconductor film 112 are connected at the opening 143 provided in the insulating film 104 and the insulating film 110 and surround the oxide semiconductor film 108 via the insulating film 104 and the insulating film 110 It is a configuration that surrounds.

[0106] By having such a configuration, the oxide semiconductor film 10 8 included in the transistor 100A can be electrically surrounded by the electric field of the conductive film 106 functioning as the first gate electrode and the oxide semiconductor film 112 functioning as the second gate electrode. A transistor device structure in which the oxide semiconductor film 108 in which a channel region is formed is electrically surrounded by the electric fields of the first gate electrode and the second gate electrode, like the transistor 1 00A, can be called a Surrounded channel (S-channel) structure. Since the transistor 100A has an S-channel structure, the conductive film 106 or

[0107] The transistor 100A has an S-channel structure, so the conductive film 106 or​​ The oxide semiconductor film 112 effectively induces an electric field to create a channel in the oxide semiconductor. Because it can be applied to the film 108, the current driving capability of transistor 100A is improved. This makes it possible to obtain high on-current characteristics. Furthermore, it is possible to increase the on-current. Therefore, it becomes possible to miniaturize transistor 100A. Also, oxide semiconductor film 10 Because 8 has a structure surrounded by the conductive film 106 and the oxide semiconductor film 112 This can increase the mechanical strength of the oxide semiconductor film 108.

[0108] Furthermore, in the channel width direction of transistor 100A, the aperture of the oxide semiconductor film 108 An opening different from the opening 143 may be formed on a side where section 143 is not formed.

[0109] Furthermore, as shown in transistor 100A, the transistor has a semiconductor film sandwiched between them. If there is a pair of gate electrodes, one gate electrode receives signal A, and the other gate electrode receives signal A. A fixed potential Vb may be applied to one of the terminal electrodes. Also, signal A is applied to one terminal electrode, while the other electrode is not. A signal B may be applied to one of the gate electrodes. Also, a fixed potential V may be applied to the other gate electrode. A fixed potential Vb may be applied to the other terminal electrode.

[0110] Signal A is, for example, a signal for controlling a conduction state or a non-conduction state. Signal A is A digital signal that takes two types of potentials: potential V1 or potential V2 (where V1 > V2). It is acceptable. For example, it is possible to set potential V1 as the high power supply potential and potential V2 as the low power supply potential. Yes, it's possible. Signal A can be an analog signal.

[0111] The fixed potential Vb is, for example, a potential used to control the threshold voltage VthA of a transistor. The fixed potential Vb may be potential V1 or potential V2. The potential may be different from potential V1 or potential V2. By lowering the fixed potential Vb... In some cases, the threshold voltage VthA can be increased. As a result, the gate-source voltage Vg Reduces drain current when s is 0V, and reduces leakage current in circuits with transistors. In some cases, this is possible. For example, the fixed potential Vb may be lower than the low power supply potential. In some cases, increasing Vb can lower the threshold voltage VthA. As a result, To improve the drain current when the to-source voltage Vgs is VDD, and to have a transistor In some cases, the operating speed of the circuit can be improved. For example, if the fixed potential Vb is higher than the low power supply potential, You can do that.

[0112] Signal B is, for example, a signal to control a conduction or non-conduction state. A digital signal that takes two types of potentials: potential V3 or potential V4 (where V3 > V4). It is acceptable. For example, it is possible to set potential V3 as the high power supply potential and potential V4 as the low power supply potential. Yes, it's possible. Signal B can also be an analog signal.

[0113] If both signal A and signal B are digital signals, signal B will have the same digital value as signal A. It may also be a signal that has. In this case, the on current of the transistor is increased, and the transistor In some cases, the operating speed of the circuit can be improved. At this time, the potential V1 and in signal A Potential V2 may be different from potentials V3 and V4 in signal B. For example, The gate insulating film corresponding to the gate to which signal B is input corresponds to the gate to which signal A is input. If the gate insulating film is thicker than the gate insulating film, the potential amplitude of signal B (V3-V4) is the same as the potential amplitude of signal A. It is also acceptable to make it larger than (V1-V2). Doing so will improve the conduction state of the transistor or The effect of signal A on the non-conductive state and the effect of signal B should be made equal. There are cases where this is possible.

[0114] If both signal A and signal B are digital signals, then signal B will have a different digital value from signal A. The signal may also have two properties. In this case, the control of the transistor is separated by signal A and signal B. This can be done in various ways, and in some cases, higher functionality can be achieved. For example, if the transistor is n In the case of a channel type, if signal A is at potential V1 and signal B is at potential V3, When both are in a conductive state, or when signal A is at potential V2 and signal B is at potential V4 If only one transistor is in a non-conductive state, then a single transistor can be used to perform functions such as NAND gates and NOR gates. In some cases, this functionality can be achieved. Furthermore, signal B is a signal for controlling the threshold voltage VthA. It may also be a number. For example, signal B is the period during which the circuit with the transistor is operating. The signal may have a different potential during the period when the circuit is not operating. Signal B is, The signals may have different potentials depending on the operating mode of the circuit. In this case, signal B is signal A The electrical potential may not switch as frequently as it should.

[0115] If both signal A and signal B are analog signals, then signal B will have the same potential as signal A. A signal, an analog signal obtained by multiplying the potential of signal A by a constant, or the potential of signal A added by a constant. Alternatively, a subtracted analog signal may also be used. In this case, the on-current of the transistor is This can improve the operating speed of circuits with transistors. Signal B is a signal A different analog signal may also be used. In this case, the control of the transistor is controlled by signal A and signal A. This can sometimes be done separately by B, which may allow for higher functionality.

[0116] Signal A may be a digital signal and signal B may be an analog signal. Or signal A may be It is an analog signal, and signal B may also be a digital signal.

[0117] When a fixed potential is applied to both gate electrodes of a transistor, the transistor is a resistive element. In some cases, it can function as an equivalent element. For example, a transistor can function as an n-channel element. In the case of a Nell type, by raising (lowering) the fixed potential Va or fixed potential Vb, In some cases, the effective resistance of the zista can be lowered (or raised). Fixed potential Va and fixed electric By increasing (or decreasing) both positions Vb, a transistor with only one gate can perform the operation. In some cases, an effective resistance lower (or higher) than the desired effective resistance may be obtained.

[0118] The other configurations of transistor 100A are the same as those of transistor 100 shown above. Yes, and it produces a similar effect.

[0119] Furthermore, in the transistor 150 shown above, similar to transistor 100A, the conductive A membrane 106 and an opening 143 may be provided. An example of this is shown in Figures 4(A), (B), and (C). As shown, Figure 4(A) is a top view of transistor 150A, and Figure 4(B) is a top view of Figure 4(A). Figure 4(C) is a cross-sectional view between the dashed lines X1 and X2, and Figure 4(A) is a cross-sectional view between the dashed lines Y1 and Y2. This is a cross-section.

[0120] Thus, in a transistor according to one aspect of the present invention, the transistor described above is They can be used in combination as appropriate.

[0121] <1-4. Semiconductor Equipment Configuration Example 4> Next, regarding a configuration different from the semiconductor device shown in Figures 1(A), 1(B), and 1(C), see Figure 5(A)( We will explain using B)(C).

[0122] Figure 5(A) is a top view of transistor 100B, and Figure 5(B) is a single point view of Figure 5(A). Figure 5(C) is a cross-sectional view between the dashed lines X1 and X2, and Figure 5(A) is a cross-sectional view between the dashed lines Y1 and Y2. This is a view drawing.

[0123] The transistor 100B shown in Figures 5(A), (B), and (C) is the same as the transistor 100 shown earlier. The shapes of A and the oxide semiconductor film 112 are different. Specifically, transistor 100B has The lower end of the oxide semiconductor film 112 is formed inward from the upper end of the insulating film 110. As a result, the side edge of the insulating film 110 is located further out than the side edge of the oxide semiconductor film 112. .

[0124] For example, if an oxide semiconductor film 112 and an insulating film 110 are processed with the same mask, The conductive film 112 was etched using the wet etching method, and the insulating film 110 was etched using the dry etching method. The above structure can be achieved by processing.

[0125] Furthermore, by making the oxide semiconductor film 112 the above structure, the oxide semiconductor film 108 contains, Region 108f may be formed. Region 108f is the channel region 108i and the source region. Formed between region 108s and, and between channel region 108i and drain region 108d It can be done.

[0126] Region 108f functions as either a high-resistance region or a low-resistance region. The anti-region is an oxidation region that has the same resistance as the channel region 108i and functions as a gate electrode. This is a region where the semiconductor film 112 is not superimposed. If region 108f is a high-resistance region, then region 10 Region 8f functions as a so-called offset region. Region 108f functions as an offset region. In such cases, in order to suppress the decrease in the on-current of transistor 100B, channel In the length (L) direction, the region 108f should be 1 μm or less.

[0127] Furthermore, the low-resistance region is the region where the resistance is lower than that of the channel region 108i, and also the source region 10 This region has higher resistance than 8s and the drain region 108d. Region 108f is a low-resistance region. In this case, region 108f is a so-called LDD (Lightly Doped Drain) region. It functions as a region. When region 108f functions as an LDD region, the drain Because the electric field in the region can be relaxed, the threshold of the transistor caused by the electric field in the drain region can be reduced. This can reduce fluctuations in the voltage value.

[0128] Furthermore, if region 108f is to be a low-resistance region, for example, from insulating film 116 to region 10 Either hydrogen or nitrogen, or both, are supplied to 8f, or the insulating film 110 and Using the oxide semiconductor film 112 as a mask, impurity elements are introduced from above the oxide semiconductor film 112. By adding it, the impurity is added to the oxide semiconductor film 108 via the insulating film 110. This results in the formation of region 108f.

[0129] Furthermore, the transistor 150 shown earlier is also an oxide semiconductor that functions as a second gate electrode. By changing the shape of the film 112, a configuration similar to that of transistor 100B can be achieved. An example of this case is shown in Figures 6(A), 6(B), and 6(C). Note that Figure 6(A) is a transistor. This is a top view of 150B, and Figure 6(B) is a cross-sectional view between the dashed line X1 and X2 in Figure 6(A). Figure 6(C) is a cross-sectional view between the dashed line Y1 and Y2 in Figure 6(A).

[0130] <1-5. Modification 1 of semiconductor device> Next, regarding modified examples of the semiconductor device shown in Figures 3(A), 3(B), and 3(C), see Figure 7(A) and 7(B). We will explain using this method.

[0131] Figures 7(A) and 7(B) are cross-sectional views of transistor 100C. The top view is the same as that of transistor 100B shown in Figure 5(A), therefore, Figure 5(A) Let's explain using the following. Figure 7(A) is a cross-sectional view of the section between the dashed line X1 and X2 in Figure 5(A). Figure 7(B) is a cross-sectional view of the area between the dashed line Y1 and Y2 in Figure 5(A).

[0132] Transistor 100C functions as a planarizing insulating film for transistor 100B shown above. The difference is that an insulating film 122 is provided. For other configurations, see the previous section. It has the same configuration as the Radista 100B and produces the same effect.

[0133] The insulating film 122 has the function of flattening irregularities caused by transistors, etc. The film 122 can be insulating and can be formed using inorganic or organic materials. The inorganic material includes silicon oxide film, silicon oxide nitride film, silicon nitride oxide film, and nitride Examples include silicon films, aluminum oxide films, aluminum nitride films, etc. The organic material is... Examples include photosensitive resin materials such as acrylic resin or polyimide resin. .

[0134] Note that in Figures 7(A) and 7(B), the size of the opening in the insulating film 122 is the opening. Although the shape is smaller than 141a and 141b, it is not limited to this, for example, the opening 14 Even if the shape is the same as 1a and 141b, or the shape is larger than the openings 141a and 141b good.

[0135] Furthermore, in Figures 7(A) and 7(B), conductive films 120a and 120b are provided on the insulating film 122. The above is an example of a configuration, but it is not limited to this, for example, a conductive film 120 on an insulating film 118 Even if a and 120b are provided, and an insulating film 122 is provided on the conductive films 120a and 120b, good.

[0136] <1-6. Modification of Semiconductor Device 2> Next, regarding modified examples of the semiconductor device shown in Figures 1(A), 1(B), and 1(C), Figures 8 and 9 are used. I will explain.

[0137] Figures 8(A) and 8(B) are cross-sectional views of transistor 100D. The top view is the same as that of transistor 100 shown in Figure 1(A), therefore, Figure 1(A) Let me explain using the following. Figure 8(A) is a cross-sectional view between the dashed line X1 and X2 in Figure 1(A), 8(B) is a cross-sectional view between the dashed line Y1 and Y2 in Figure 1(A).

[0138] Transistor 100D has a different shape for the insulating film 110 compared to transistor 100 shown earlier. The other configurations are the same as those of transistor 100 shown above, and are similar. It is effective.

[0139] The insulating film 110 of transistor 100D is located inside the oxide semiconductor film 112. To put it in a different way, the side surface of the insulating film 110 is inside the lower end of the oxide semiconductor film 112. It is located in [location]. For example, after processing the oxide semiconductor film 112, an etchant or the like is used to [perform an electrical discharge]. By side-etching the edge film 110, the configuration shown in Figures 8(A) and 8(B) can be achieved. It is possible. Furthermore, by making the insulating film 110 the above structure, below the oxide semiconductor film 112, A hollow region 147 is formed.

[0140] The hollow region 147 contains air and functions as part of the gate insulating film. The relative permittivity of 147 is approximately 1, the same as that of air. Therefore, transistor 100D By adopting this structure, a voltage is applied to the oxide semiconductor film 112 which functions as a gate electrode. In this case, the voltage applied to the oxide semiconductor film 108 below the hollow region 147 is applied to the insulating film 11 Lower than the voltage applied to the oxide semiconductor film 108 (channel region 108i) below 0 Therefore, the oxide semiconductor film 108 below the hollow region 147 effectively overlaps. It functions as a p region (also called a Lov region). A Lov region is created in the oxide semiconductor film 108. By providing this, the electric field concentrated at the source and drain ends can be mitigated. The Lov region overlaps with the oxide semiconductor film 112 that functions as a gate electrode, and also has a channel This region has lower resistance than region 108i.

[0141] Figures 9(A) and 9(B) are cross-sectional views of transistor 100E. The top view is the same as that of transistor 100 shown in Figure 1(A), therefore, Figure 1(A) Let me explain using the following. Figure 9(A) is a cross-sectional view between the dashed line X1 and X2 in Figure 1(A), 9(B) is a cross-sectional view between the dashed line Y1 and Y2 in Figure 1(A).

[0142] Transistor 100E consists of the transistor 100 shown above, insulating film 110, and insulating film 11 The shape of 6 is different. The rest of the configuration is the same as that of transistor 100 shown earlier. It is a result of this process and produces a similar effect.

[0143] The insulating film 110 of transistor 100E is located inside the oxide semiconductor film 112. To put it in a different way, the side surface of the insulating film 110 is inside the lower end of the oxide semiconductor film 112. It is located in [location]. For example, after processing the oxide semiconductor film 112, an etchant or the like is used to [perform an electrical discharge]. By side etching the edge film 110, the configuration shown in Figures 9(A) and 9(B) can be achieved. It can be done. Also, after the insulating film 110 has the above structure, the insulating film 116 is formed, The film 116 penetrates beneath the oxide semiconductor film 112, and the insulating film 116 penetrates beneath the oxide semiconductor film 112. It is in contact with the oxide semiconductor film 108 located below film 112.

[0144] With the above configuration, the source region 108s and the drain region 108d are oxide semi-oxide It is located inside the lower end of the conductive film 112. Therefore, transistor 100E is located inside the Lov It has a domain.

[0145] Structures having a Lov region, such as transistor 100D and transistor 100E By doing so, the channel region 108i, the source region 108s, and the drain region 108d are Because a high-resistance region is not formed between them, it becomes possible to increase the on-current of the transistor. ru.

[0146] <1-7. Modification 3 of semiconductor device> Next, regarding modified examples of the semiconductor device shown in Figures 3(A), 3(B), and 3(C), see Figures 10 to 12. We will explain using this method.

[0147] Figures 10(A) and 10(B) are cross-sectional views of transistor 100F. The top view is the same as that of transistor 100A shown in Figure 3(A), therefore Figure 3(A This will be explained using the following. Figure 10(A) is a cross-sectional view between the dashed line X1 and X2 in Figure 3(A). Figure 10(B) is a cross-sectional view between the dashed line Y1 and Y2 in Figure 3(A).

[0148] Transistor 100F is constructed from the transistor 100B shown earlier and the oxide semiconductor film 108. The construction is different. Other than that, the configuration is the same as the transistor 100B shown earlier. Yes, and it produces a similar effect.

[0149] The oxide semiconductor film 108 of transistor 100F is an oxide semiconductor film on the insulating film 116. Body film 108_1, oxide semiconductor film 108_2 on oxide semiconductor film 108_1, and oxide It has an oxide semiconductor film 108_3 on a semiconductor film 108_2.

[0150] Furthermore, the channel region 108i, the source region 108s, and the drain region 108d are These are oxide semiconductor film 108_1, oxide semiconductor film 108_2, and oxide semiconductor film 1 It has a three-layer laminated structure of 08_3.

[0151] Figures 11(A) and (B) show cross-sectional views of transistor 100G. The top view is the same as that of transistor 100A shown in Figure 3(A), therefore Figure 3(A This will be explained using the following. Figure 11(A) is a cross-sectional view between the dashed line X1 and X2 in Figure 3(A). Figure 11(B) is a cross-sectional view between the dashed line Y1 and Y2 in Figure 3(A).

[0152] Transistor 100G is constructed from the transistor 100A and oxide semiconductor film 108 shown above. The construction is different. Other than that, the configuration is the same as that of the transistor 100A shown earlier. Yes, and it produces a similar effect.

[0153] The oxide semiconductor film 108 of transistor 100G is an oxide semiconductor film on the insulating film 116. It has a body film 108_2 and an oxide semiconductor film 108_3 on the oxide semiconductor film 108_2. ru.

[0154] Furthermore, the channel region 108i, the source region 108s, and the drain region 108d are Each has a stacked structure of two layers, an oxide semiconductor film 108_2 and an oxide semiconductor film 108_3. be.

[0155] <1-8. Band Structure> Here, insulating film 104, oxide semiconductor films 108_1, 108_2, 108_3, and The band structure of the edge film 110, and the insulating film 104, oxide semiconductor films 108_2, 108_ 3. The band structure of the insulating film 110 will be explained using Figure 12.

[0156] Figure 12(A) shows insulating film 104 and oxide semiconductor films 108_1, 108_2, and 108_3. This is an example of a band structure in the film thickness direction of a laminated structure having an insulating film 110. Also, Figure 1 2(B) consists of insulating film 104, oxide semiconductor films 108_2, 108_3, and insulating film 110 This is an example of a band structure in the film thickness direction of a laminated structure having [a specific characteristic]. Note that the band structure is difficult to understand. To simplify the process, insulating film 104, oxide semiconductor films 108_1, 108_2, 108_3, and This shows the energy level (Ec) at the lower end of the conduction band of the insulating film 110.

[0157] Furthermore, Figure 12(A) shows that silicon oxide films are used as insulating films 104 and 110, and oxide semi-oxide films are used. Conductor film 108_1 has a metal oxide with an atomic ratio of metal elements of In:Ga:Zn=1:3:2. Using an oxide semiconductor film formed with a material target, the oxide semiconductor film 108_2 is used. A metal oxide target with an atomic ratio of metal elements of In:Ga:Zn = 4:2:4.1 is used. Using an oxide semiconductor film formed by this process, the oxide semiconductor film 108_3 contains atoms of a metal element. Oxides formed using metal oxide targets with a numerical ratio of In:Ga:Zn = 1:3:2 This is a band diagram of a configuration using a semiconductor film.

[0158] Furthermore, Figure 12(B) shows that silicon oxide films are used as insulating films 104 and 110, and oxide semi-oxide films are used. The conductive film 10⁸⁻² has an atomic ratio of metal elements of In:Ga:Zn = 4:2:4.1. Using an oxide semiconductor film formed with an oxide target, oxide semiconductor film 108_3 As such, a metal oxide target with an atomic ratio of metal elements of In:Ga:Zn=1:3:2 is used. This is a band diagram of a configuration using an oxide semiconductor film formed by [processing].

[0159] As shown in Figure 12(A), the oxide semiconductor films 108_1, 108_2, and 108_3 As shown in Figure 12(B), the energy levels at the lower end of the conduction band change smoothly. In the oxide semiconductor films 108_2 and 108_3, the energy level at the lower end of the conduction band is It changes smoothly. In other words, it can be said that it changes continuously or connects continuously. In order to have such a band structure, the oxide semiconductor film 108_1 and the oxide semiconductor The interface with film 108_2, or the interface between oxide semiconductor film 108_2 and oxide semiconductor film 108_3 At the interface, impurities that form defect levels such as trap centers and recombination centers Assume it does not exist.

[0160] In order to form a continuous junction between oxide semiconductor films 108_1, 108_2, and 108_3, Using a multi-chamber type film deposition apparatus (sputtering apparatus) equipped with a load lock chamber Therefore, it is necessary to continuously stack each film without exposing it to the atmosphere.

[0161] By using the configuration shown in Figures 12(A) and (B), the oxide semiconductor film 108_2 forms wells. ) and in the transistor using the above stacked structure, the channel region is an oxide semiconductor film It can be seen that it is formed at 10⁸⁻².

[0162] Furthermore, by providing oxide semiconductor films 108_1 and 108_3, the oxide semiconductor film 1 The trap levels that may form on 08_2 can be moved away from the oxide semiconductor film 108_2. Cut.

[0163] Furthermore, the conduction band of the oxide semiconductor film 108_2, where the trap level functions as a channel region. The lower energy level (Ec) can be further from the vacuum level, and electricity can enter the trap level. This makes it easier for electrons to accumulate. The accumulation of electrons in the trap level creates a negative solid. As the charge becomes constant, the transistor's threshold voltage shifts to the positive direction. Therefore, Therefore, the trap level is the energy level (Ec) at the lower end of the conduction band of the oxide semiconductor film 108_2. It is preferable to configure it so that it approaches the vacuum level. This makes it more difficult for electrons to accumulate in that position, which can increase the on-current of the transistor. Both methods can increase the field effect mobility.

[0164] Furthermore, oxide semiconductor films 108_1 and 108_3 transmit more efficiently than oxide semiconductor film 108_2. The energy level at the lower end of the guide band is close to the vacuum level, and typically, in oxide semiconductor film 108_2 The energy levels at the lower end of the conduction band and the lower end of the conduction band of oxide semiconductor films 108_1 and 108_3 The difference from the energy level is 0.15 eV or greater, or 0.5 eV or greater and 2 eV or less. Or it is less than 1 eV. That is, electron affinity of oxide semiconductor films 108_1 and 108_3 The difference between the force and the electron affinity of the oxide semiconductor film 108_2 is 0.15 eV or greater, or 0. It is 5 eV or more and 2 eV or less, or 1 eV or less.

[0165] With this configuration, the oxide semiconductor film 108_2 becomes the main current path. In other words, the oxide semiconductor film 108_2 has the function of a channel region, and the oxide semiconductor Films 108_1 and 108_3 function as oxide insulating films. Furthermore, oxide semiconductors... Films 108_1 and 108_3 constitute the oxide semiconductor film 108_2 in which the channel region is formed. It is preferable to use an oxide semiconductor film composed of one or more of the metal elements that make up the film. By adopting this configuration, the interface between the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2, Alternatively, at the interface between the oxide semiconductor film 108_2 and the oxide semiconductor film 108_3, interfacial dispersion Disturbance is less likely to occur. Therefore, carrier movement is not hindered at this interface, The field-effect mobility of the inverter increases.

[0166] Furthermore, the oxide semiconductor films 108_1 and 108_3 function as part of the channel region. To prevent this, materials with sufficiently low conductivity shall be used. Conductor films 108_1 and 108_3 are, based on their physical properties and / or functions, oxide insulating films, respectively. It can also be called a film. Alternatively, oxide semiconductor films 108_1 and 108_3 have electron affinity (vacuum The difference between the energy level and the energy level at the bottom of the conduction band is smaller than that of the oxide semiconductor film 10⁸⁻². The energy level at the bottom of the conduction band is the energy level at the bottom of the conduction band of the oxide semiconductor film 108_2 A material with a difference (band offset) shall be used. Also, the magnitude of the drain voltage In order to suppress the occurrence of threshold voltage differences that depend on the material, the oxide semiconductor film 108 The energy levels at the lower end of the conduction band of _1 and 10⁸_3 are the same as the energy levels at the lower end of the conduction band of the oxide semiconductor film 10⁸_2. It is preferable to use a material whose energy level is closer to the vacuum level than the lower limit energy level. For example, an oxide. The energy levels at the lower end of the conduction band of semiconductor film 108_2 and oxide semiconductor films 108_1, 10 The difference between the energy level of the lower end of the conduction band at 8_3 and the current level is 0.2 eV or greater, preferably 0.5 eV. It is preferable to keep the above in place.

[0167] Furthermore, the oxide semiconductor films 108_1 and 108_3 contain a spinel-type crystal structure within the film. It is preferable that spinel-type crystals do not form in the oxide semiconductor films 108_1 and 108_3. If a crystalline structure is present, at the interface between the spinel-type crystalline structure and other regions, the conductive film 120 In some cases, the constituent elements of a and 120b may diffuse into the oxide semiconductor film 108_2. When the oxide semiconductor films 108_1 and 108_3 are CAAC-OS, the conductive film 120a This is preferable because it increases the blocking properties of the constituent elements of 120b, such as copper.

[0168] Furthermore, in this embodiment, the oxide semiconductor films 108_1 and 108_3 are metal The atomic ratio of elements is formed using a metal oxide target with In:Ga:Zn = 1:3:2. Although examples have been given of configurations using an oxide semiconductor film, the system is not limited to this. For example, acid For ionized semiconductor films 10⁸⁻¹ and 10⁸⁻³, In:Ga:Zn = 1:1:1 [atomic ratio] ], In:Ga:Zn=1:1:1.2[atomic ratio], In:Ga:Zn=1:3:4[ Metal oxide targets with atomic ratios of In:Ga:Zn = 1:3:6. An oxide semiconductor film formed using may also be used.

[0169] Note that the oxide semiconductor films 108_1 and 108_3 are defined as In:Ga:Zn=1:1:1 When using a metal oxide target with [atomic ratio], oxide semiconductor film 108_1, 108 _3 is the case where In:Ga:Zn = 1:β1 (0 < β1 ≤ 2):β2 (0 < β2 ≤ 2) There is a combination. Also, as oxide semiconductor films 10⁸⁻¹ and 10⁸⁻³, In:Ga:Zn=1 When using a metal oxide target with an atomic ratio of 3:4, the oxide semiconductor film 108_1 , 10⁸⁻³ is In:Ga:Zn = 1:β3 (1≦β3≦5):β4 (2≦β4≦6) This can sometimes occur. Also, as oxide semiconductor films 108_1 and 108_3, In:Ga: When using a metal oxide target with Zn=1:3:6 [atomic ratio], the oxide semiconductor film 1 08_1 and 108_3 are In:Ga:Zn=1:β5(1≦β5≦5):β6(4≦β There are cases where 6 ≤ 8.

[0170] <1-9. Method for Fabricating Semiconductor Devices 1> Next, regarding an example of a method for fabricating the transistor 100 shown in Figure 1, see Figures 13 to 15. This will be explained using the following. Figures 13 to 15 illustrate the method for manufacturing transistor 100. These are cross-sectional views in the channel length (L) direction and the channel width (W) direction.

[0171] First, an insulating film 104 is formed on the substrate 102, and then an oxide semiconductor film is formed on the insulating film 104. Then, the oxide semiconductor film is processed into an island shape to form the oxide semiconductor film 107. This is achieved (see Figure 13(A)).

[0172] The insulating film 104 can be deposited using sputtering, CVD, vapor deposition, or pulsed laser deposition. It can be formed using appropriate methods such as PLD, printing, and coating. For insulating film 104, a silicon nitride film with a thickness of 400 nm was formed using a PECVD apparatus. A silicon oxide-nitride film with a thickness of 50 nm is formed.

[0173] Alternatively, oxygen may be added to the insulating film 104 after it has been formed. The oxygen added to step 4 can be oxygen radicals, oxygen atoms, oxygen atom ions, or oxygen molecular ions. These are some examples. In addition, methods of addition include ion doping, ion implantation, and plasma treatment. There are laws and regulations. Furthermore, after forming a film that suppresses oxygen desorption on the insulating film, insulation is applied through the film. Oxygen may be added to membrane 104.

[0174] As membranes that suppress the desorption of oxygen as described above, indium, zinc, gallium, tin, and aluminum are used. Chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, tungsten Selected metal elements, alloys containing the above-mentioned metal elements, and combinations of the above-mentioned metal elements alloys, metal nitrides having the above-mentioned metal elements, and metal oxides having the above-mentioned metal elements. This is formed using conductive materials such as metal nitride oxides having the aforementioned metal elements. It is possible.

[0175] Furthermore, when adding oxygen using plasma processing, the oxygen is excited by microwaves, resulting in a high-density acid By generating elementary plasma, the amount of oxygen added to the insulating film 104 can be increased. .

[0176] The oxide semiconductor film 107 can be produced using sputtering, coating, pulsed laser deposition, etc. It can be formed by laser ablation, thermal CVD, etc. For processing the conductive film 107, a mask is formed on the oxide semiconductor film by a lithography process. Afterward, a portion of the oxide semiconductor film can be etched using the mask to form the film. Alternatively, island-shaped oxide semiconductor films 107 may be directly formed using a printing method.

[0177] When forming an oxide semiconductor film by sputtering, a power supply is required to generate the plasma. The device can use an RF power supply, AC power supply, DC power supply, etc., as appropriate. When forming oxide semiconductor films, the sputtering gas used is a noble gas (typically argon). ), oxygen, noble gases, and mixed gases of oxygen are used as appropriate. In this case, it is preferable to increase the gas ratio of oxygen to the noble gas.

[0178] Furthermore, when forming an oxide semiconductor film, for example, using the sputtering method, the substrate The temperature is between 150°C and 750°C, or between 150°C and 450°C, or below 200°C. By depositing an oxide semiconductor film at a temperature of 350°C or lower, the crystallinity can be enhanced. Therefore, it is preferable.

[0179] In this embodiment, the oxide semiconductor film 107 is made using a sputtering apparatus. In-Ga-Zn metal oxide (In:Ga:Zn) is used as the sputtering target. Using an atomic ratio of 1:1:1.2, an oxide semiconductor film with a thickness of 40 nm is deposited.

[0180] Furthermore, after forming the oxide semiconductor film 107, a heat treatment is performed on the oxide semiconductor film 107. Dehydrogenation or dehydration may be performed. The heat treatment temperature is typically 150°C or higher for the substrate. Below the strain point, or between 250°C and 450°C, or between 300°C and 450°C. .

[0181] Heat treatment is performed using noble gases such as helium, neon, argon, xenon, krypton, or This can be done in an inert gas atmosphere containing nitrogen, or by heating in an inert gas atmosphere. Afterward, heating in an oxygen atmosphere may be performed. Note that hydrogen and water may be added to the above-mentioned inert atmosphere and oxygen atmosphere. It is preferable that certain substances are not included. The processing time should be between 3 minutes and 24 hours.

[0182] The heat treatment can be carried out using an electric furnace, an RTA device, etc. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate for a short period of time. Processing time can be reduced.

[0183] A heat treatment is performed on an oxide semiconductor film while it is being deposited, or after the oxide semiconductor film has been formed. By performing this procedure, the hydrogen concentration obtained by secondary ion mass spectrometry in oxide semiconductor films is reduced. The degree is 5 x 10 19 atoms / cm 3 The following, or 1 × 10 19 atoms / cm 3 below , 5×1018 atoms / cm 3 The following, or 1 × 10 18 atoms / cm 3 below, or 5 x 10 17 atoms / cm 3 The following, or 1 × 10 16 atoms / cm 3 Below It can be set below.

[0184] Next, an insulating film 110_0 is formed on the insulating film 104 and the oxide semiconductor film 107 (Figure 1). 3(B)).

[0185] As the insulating film 110_0, a silicon oxide film or a silicon oxide nitride film is used, PECVD It can be formed using the method. In this case, the raw material gas is a silicon-containing depositary gas. It is preferable to use gases and oxidizing gases. Representative examples of silicon-containing sedimenting gases include... These include silanes, disilanes, trisilanes, and silane fluorides. Oxidizing gases include oxygen. These include ozone, nitrous oxide, and nitrogen dioxide.

[0186] Furthermore, as the insulating film 110_0, the flow rate of the oxidizing gas is set to 20 times the flow rate of the sedimenting gas. The pressure inside the processing chamber should be set to 100P, with a value greater than 100 times but less than 100 times, or between 40 and 80 times. By using the PECVD method with a pressure of less than 'a' or 50 Pa or less, nitrogen oxides with fewer defects can be produced. A silicon dioxide film can be formed.

[0187] Furthermore, the insulating film 110_0 is placed in the vacuum-evacuated processing chamber of the PECVD apparatus. The substrate is kept at a temperature between 280°C and 400°C, and the raw material gas is introduced into the processing chamber. The pressure applied is 20 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 250 Pa or less. As described below, the conditions under which high-frequency power is supplied to the electrodes installed in the processing chamber result in a dense oxidation A silicon film or a silicon oxidoxide-nitride film can be formed.

[0188] Alternatively, the insulating film 110_0 may be formed using a microwave-based PECVD method. Microwaves refer to the frequency range from 300 MHz to 300 GHz. Microwaves are used to... The temperature is low and the electron energy is low. Also, a PECVD apparatus using microwaves is used. Then, of the supplied power, the power used to generate plasma, that is, to ionize molecules, is used. The proportion of [unclear] is high, and the proportion of power used to accelerate electrons is low. Therefore, high density [unclear] It can excite a rasma (high-density plasma). Therefore, it can affect the film-forming surface and the deposited material. This allows for the formation of an insulating film 110_0 with minimal plasma damage and fewer defects.

[0189] Furthermore, the insulating film 110_0 can be formed using a CVD method with organic silane gas. Yes, it is possible. Examples of organic silane gases include ethyl silicate (TEOS: chemical formula Si(OC2H5)4). ), tetramethylsilane (TMS: chemical formula Si(CH3)4), tetramethylcyclotet Lasiloxane (TMCTS), Octamethylcyclotetrasiloxane (OMCTS), He Xamethyldisilazane (HMDS), triethoxysilane (SiH(OC2H5)3), Silicon-containing compounds such as trisdimethylaminosilane (SiH(N(CH3)2)3) This can be used. By using the CVD method with organic silane gas, high coverage can be achieved. An insulating film 110_0 can be formed.

[0190] In this embodiment, the insulating film 110_0 is made using a PECVD apparatus to create a film with a thickness of 100 nm. A silicon oxide nitride film is formed.

[0191] Next, an oxide semiconductor film 112_0 is formed on the insulating film 110_0. During the formation of the body film 112_0, the oxide semiconductor film 112_0 enters the insulating film 110_0. Oxygen is added (see Figure 13(C)).

[0192] As a method for forming the oxide semiconductor film 112_0, sputtering is used, and acid is used during formation. It is preferable to form the oxide semiconductor in an atmosphere containing elementary gases. By forming the body film 112_0, oxygen can be suitably added to the insulating film 110_0. Cut.

[0193] In Figure 13(C), the oxygen added to the insulating film 110_0 is schematically represented by arrows. This represents the oxide semiconductor film 112_0, as described above. The same materials as those used for material 7 can be used.

[0194] In this embodiment, a sputtering apparatus is used to produce the oxide semiconductor film 112_0. i, as a sputtering target, In-Ga-Zn metal oxide (In:Ga:Zn= A 100 nm thick oxide semiconductor film is deposited using a 4:2:4.1 (atomic ratio).

[0195] Next, a mask 1 is applied to the desired position on the oxide semiconductor film 112_0 by a lithography process. Forms 40 (see Figure 13(D)).

[0196] Next, etching is performed on the mask 140 to remove the oxide semiconductor film 112_0. After processing the insulating film 110_0 and the mask 140, island-shaped oxide semiconductors are formed. A conductive film 112 and island-shaped insulating films 110 are formed (see Figure 14(A)).

[0197] In this embodiment, the oxide semiconductor film 112_0 and the insulating film 110_0 are processed and This is done using the dry etching method.

[0198] Furthermore, when processing the oxide semiconductor film 112 and the insulating film 110, the oxide semiconductor film 112 In some cases, the thickness of the oxide semiconductor film 107 in regions where it is not superimposed may become thinner. When processing the semiconductor film 112 and the insulating film 110, areas where the oxide semiconductor film 107 is not superimposed The thickness of the insulating film 104 in the region may become thinner.

[0199] Next, impurities are applied to the insulating film 104, the oxide semiconductor film 107, and the oxide semiconductor film 112. Add element 145 (see Figure 14(B)).

[0200] Methods for adding impurity element 145 include ion doping, ion implantation, and plasma doping. There are various processing methods. In the case of plasma processing, the plasma is processed in a gas atmosphere containing the added impurity elements. By generating zuma and performing plasma treatment, impurity elements can be added. The devices used to generate the above plasma include dry etching equipment, ashing equipment, PECVD equipment, high-density PECVD equipment, etc., can be used.

[0201] Furthermore, the raw material gases for impurity element 145 are B2H6, PH3, CH4, N2, and NH3. , AlH3, AlCl3, SiH4, Si2H6, F2, HF, H2 and noble gases (for example) One or more of the following can be used: Argon, or B2H6 diluted with a noble gas, pH 3. Use one or more of the following: N2, NH3, AlH3, AlCl3, F2, HF, and H2. This can be done. B2H6, PH3, N2, NH3, AlH3, AlCl3 diluted with noble gases. Using one or more of F2, HF, and H2, impurity element 145 is used in oxide semiconductor film 107 and By adding to the oxide semiconductor film 112, noble gases, hydrogen, boron, carbon, nitrogen, fluorine, Add one or more of phosphorus, sulfur, and chlorine to oxide semiconductor film 107 and oxide semiconductor film 112. It is possible.

[0202] Alternatively, impurity element 145 is added as a noble gas as a raw material gas, then B2H6, PH3 , CH4, N2, NH3, AlH3, AlCl3, SiH4, Si2H6, F2, HF, And one or more H2 are used as raw material gases to attach oxide semiconductor film 107 and oxide semiconductor film 112 You may add it.

[0203] Alternatively, impurity element 145 is B2H6, PH3, CH4, N2, NH3, AlH3, One or more of the following are used as raw material gases: AlCl3, SiH4, Si2H6, F2, HF, and H2. After addition, the noble gas is used as a raw material gas to attach oxide semiconductor film 107 and oxide semiconductor film 112. You may add it.

[0204] The addition of impurity element 145 is controlled by appropriately setting injection conditions such as acceleration voltage and dose amount. For example, when adding argon using ion implantation, the acceleration voltage should be 10kV or higher. Below 00kV, dose is 1 × 10⁻⁶ 13 ions / cm 2 The above 1 x 10 16 ions / c m 2 The following is sufficient; for example, 1 × 10 14 ions / cm 2 That would be fine. Also, When adding phosphate ions using the on-injection method, the acceleration voltage is 30kV and the dose is 1 × 10⁻¹⁶.13 ions / cm 2 The above 5 x 10 16 ions / cm 2 The following is sufficient; for example, 1 × 1 0 15 ions / cm 2 That's all you need to do.

[0205] Furthermore, in this embodiment, after removing the mask 140, impurity element 145 is added. The configurations shown are examples of additions, but are not limited to these; for example, leaving mask 140 intact. The impurity element 145 may be added in this state.

[0206] Furthermore, in this embodiment, as the impurity element 145, a doping device is used, Argon is added to oxide semiconductor film 107 and oxide semiconductor film 112. In terms of form, the example given is one in which impurity element 145 is added, but it is not limited to this. For example, the process of adding impurity element 145 does not need to be performed.

[0207] Next, insulating film 1 is placed on insulating film 104, oxide semiconductor film 107, and oxide semiconductor film 112. Form 16. Note that by forming the insulating film 116, the oxide semiconductor in contact with the insulating film 116 The conductive film 107 forms the source region 108s and the drain region 108d. Also, the insulating film 1 The oxide semiconductor film 107 that does not come into contact with 16, in other words, the oxide semiconductor film that comes into contact with the insulating film 110 107 becomes channel area 108i. This results in channel area 108i and source area An oxide semiconductor film 108 having 108s and a drain region 108d is formed (Figure 1). (See 4(C)).

[0208] The insulating film 116 can be formed by selecting the material described above. In this process, silicon nitride with a thickness of 100 nm is used as the insulating film 116, using a PECVD apparatus. It forms a film.

[0209] By using a silicon nitride film as the insulating film 116, the oxide semiconductor in contact with the insulating film 116 Water in the silicon nitride film is present in the conductive film 112, source region 108s, and drain region 108d. The element enters, forming the oxide semiconductor film 112, the source region 108s, and the drain region 108d. This can increase the carrier density.

[0210] Next, an insulating film 118 is formed on the insulating film 116 (see Figure 14(D)).

[0211] The insulating film 118 can be formed by selecting the material described above. In this case, as the insulating film 118, a PECVD apparatus was used to create a 300 nm thick silica oxidized nitride film. Forms a film.

[0212] Next, a mask is formed on the insulating film 118 at a desired position by a lithography process, and then an insulating film is applied. By etching a portion of the border film 118 and the insulating film 116, the source region 108s is reached. An opening 141a is formed, and an opening 141b is formed that reaches the drain region 108d (Figure 15(A)).

[0213] A method for etching the insulating film 118 and insulating film 116 is the wet etching method. And / or a dry etching method may be used as appropriate. In this embodiment, The insulating film 118 and insulating film 116 are processed using a dry etching method.

[0214] Next, a conductive film 120 is formed on the insulating film 118 so as to cover the openings 141a and 141b. (See Figure 15(B)).

[0215] As the conductive film 120, a material suitable for use in conductive films 120a and 120b is selected. It can be formed by sputtering. In this embodiment, the conductive film 120 is made by sputtering. Using this method, a 50nm thick titanium film, a 400nm thick aluminum film, and a 100nm thick... A laminated film of titanium film with a thickness of nm is formed.

[0216] Next, a mask is formed on the conductive film 120 at a desired position by a lithography process, By etching a portion of the conductive film 120, conductive films 120a and 120b are formed (Figure). 15(C)).

[0217] The processing method for the conductive film 120 is wet etching and / or dry etching. The etching method can be used as appropriate. In this embodiment, the dry etching method is used to print a conductive film 120 is processed to form conductive films 120a and 120b.

[0218] By following the above steps, the transistor 100 shown in Figure 1 can be manufactured.

[0219] Furthermore, the films that make up transistor 100 (insulating film, oxide semiconductor film, conductive film, etc.) are Puttering method, chemical vapor deposition (CVD), vacuum deposition, pulsed laser deposition (PLD) It can be formed using the ) method, ALD (atomic layer deposition) method, or by coating or printing. It can be formed by the following methods. Film deposition methods include sputtering and plasma chemical vapor deposition. The multiplicative CVD (PECVD) method is typical, but thermal CVD can also be used. As an example of thermal CVD, M One example is OCVD (organometallic vapor deposition).

[0220] Thermal CVD is a method in which the chamber is subjected to atmospheric pressure or reduced pressure, and the raw material gas and oxidizer are simultaneously processed. The film is formed by sending the material into a chamber, reacting it near or on the substrate, and depositing it onto the substrate. To do so, since thermal CVD is a film deposition method that does not generate plasma, It has the advantage of not generating defects through damage.

[0221] Furthermore, the ALD method maintains atmospheric pressure or reduced pressure inside the chamber and uses raw material gases for the reaction. The film is formed by introducing the material into a chamber, allowing it to react, and repeating this process. The material is inactivated along with the raw material gas. A carrier gas (such as argon or nitrogen) may be introduced. For example, type 2 The raw material gases of type 1 or more may be supplied to the chamber in sequence. In this case, if multiple types of raw material gases are mixed To prevent this from happening, after the reaction of the first raw material gas, an inert gas is introduced, and then the second raw material gas is introduced. Alternatively, instead of introducing an inert gas, the first raw material gas can be discharged by vacuum evacuation. After that, a second raw material gas may be introduced. The first raw material gas is adsorbed and reacts on the surface of the substrate. A first layer is formed, and a second raw material gas introduced later is adsorbed and reacts, so that the second layer becomes the first layer. A thin film is formed by stacking layers on top of each other. The desired thickness is achieved by controlling the order of gas introduction. By repeating this process multiple times, a thin film with excellent step coverage can be formed. The thickness can be adjusted by the number of times gas is introduced, allowing for precise film thickness control. It is capable of and is suitable for fabricating miniature FETs.

[0222] Thermal CVD methods such as MOCVD can be used to process the conductive films, insulating films, oxide semiconductor films, etc. It can form films, for example, when forming an In-Ga-Zn-O film, trimming Indium tyl (In(CH3)3), trimethylgallium (Ga(CH3)3), and Dimethyl zinc (Zn(CH3)2) is used. This is not limited to these combinations, but also includes trim. Triethylgallium (Ga(C2H5)3) can be used instead of tylgallium. Diethylzinc (Zn(C2H5)2) can also be used instead of dimethylzinc.

[0223] For example, when forming a hafnium oxide film using a film deposition apparatus that utilizes ALD, the solvent and a liquid containing a hafnium precursor (such as hafnium alkoxide or tetrakisdimethylamide) Hafnium (TDMAH, Hf[N(CH3)2]4) and tetrakiss (ethylmethylamine) The raw material gas is a vaporized hafnium amide (such as hafnium), and ozone is used as an oxidizer. Two types of gases (O3) are used.

[0224] For example, when forming an aluminum oxide film using a film deposition apparatus that utilizes ALD, A liquid containing a medium and an aluminum precursor (trimethylaluminum (TMA, Al(CH3)) 3) etc.) are vaporized raw material gases, and two types of gases are used as oxidizers: H2O. The materials include tris(dimethylamide)aluminum, triisobutylaluminum, Aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedione) There is.

[0225] For example, when forming a silicon oxide film using a film deposition apparatus that utilizes ALD, hexa Chlorodisilane is adsorbed onto the film-forming surface, and radicals of oxidizing gases (O2, nitrous oxide) are removed. It is supplied and reacted with the adsorbed material.

[0226] For example, when depositing a tungsten film using a film deposition apparatus that utilizes ALD, WF6 The initial tungsten film is formed by sequentially introducing gas and B2H6 gas, and then WF6 gas and A tungsten film is formed using H2 gas. Note that SiH4 gas can be used instead of B2H6 gas. You may also use "S".

[0227] For example, oxide semiconductor films, such as In-Ga-Zn-, can be deposited using an ALD-based film deposition system. When forming an O film, an In-O layer is formed using In(CH3)3 gas and O3 gas. Then, a Ga-O layer is formed using Ga(CH3)3 gas and O3 gas, and then... A Zn-O layer is formed using Zn(CH3)2 gas and O3 gas. The order is not limited to this example. Also, these gases can be used to create In-Ga-O layers and In-Zn- A mixed compound layer such as an O layer or a Ga-Zn-O layer may be formed. Alternatively, instead of O3 gas... H2O gas obtained by bubbling water with an inert gas such as Ar may also be used, but it contains H It is preferable to use non-O3 gas.

[0228] <1-10. Method for Manufacturing Semiconductor Devices 2> Next, an example of the method for fabricating transistor 100C shown in Figure 7 is described in Figures 16 to 19. This will be explained using the following. Figures 16 to 19 illustrate the method for fabricating transistor 100C. This is a cross-sectional view in the channel length (L) direction and the channel width (W) direction.

[0229] First, a conductive film 106 is formed on the substrate 102. Next, the substrate 102 and the conductive film 106 An insulating film 104 is formed on top, and an oxide semiconductor film is formed on the insulating film 104. By processing the oxide semiconductor film into an island shape, the oxide semiconductor film 107 is formed (Figure 16(A )reference).

[0230] The conductive film 106 is the same as the oxide semiconductor film 112 or the conductive films 120a and 120b. It can be formed using the material and a similar method. In this embodiment, a conductive film As 106, a tungsten film with a thickness of 100 nm is formed by sputtering.

[0231] Next, an insulating film 110_0 is formed on the insulating film 104 and the oxide semiconductor film 107 (Figure 1). 6(B)).

[0232] Next, after forming a mask at a desired position on the insulating film 110_0 by lithography, By etching a portion of the insulating film 110_0 and insulating film 104, the conductive film 106 is reached. An opening 143 is formed (see Figure 16(C)).

[0233] The method for forming the opening 143 is wet etching and / or dry etching. The etching method can be used as appropriate. In this embodiment, the dry etching method is used. An opening 143 is formed.

[0234] Next, an oxide semiconductor film 112_0 is placed on the insulating film 110_0 so as to cover the opening 143. Form. Note that when forming the oxide semiconductor film 112_0, the oxide semiconductor film 112_ Oxygen is added to the insulating film 110_0 from 0 (see Figure 16(D)).

[0235] In Figure 16(D), the oxygen added to the insulating film 110_0 is schematically represented by arrows. This represents the formation of an oxide semiconductor film 112_0 so as to cover the opening 143. Thus, the conductive film 106 and the oxide semiconductor film 112_0 are electrically connected.

[0236] Next, a mask 1 is applied to the desired position on the oxide semiconductor film 112_0 by a lithography process. Forms 40 (see Figure 17(A)).

[0237] Next, the oxide semiconductor film 112_0 is processed by etching from the mask 140. This forms island-shaped oxide semiconductor films 112 (see Figure 17(B)).

[0238] In this embodiment, a wet etching method is used to process the oxide semiconductor film 112_0. To process.

[0239] Next, etching is performed on the mask 140 to process the insulating film 110_0, and the island A porous insulating film 110 is formed (see Figure 17(C)).

[0240] In this embodiment, the insulating film 110_0 is processed using a dry etching method.

[0241] Next, after removing the mask 140, the insulating film 104, the oxide semiconductor film 107, and the oxide Impurity element 145 is added to the semiconductor film 112 (see Figure 17(D)).

[0242] Furthermore, when adding impurity element 145, the surface of the oxide semiconductor film 107 is exposed. The region (which will later become the source region 108s and the drain region 108d) contains many impurities. A substance is added. On the other hand, the oxide semiconductor film 112 of the oxide semiconductor film 107 is not superimposed. Furthermore, in the region where the insulating film 110 is superimposed (the region that will later become region 108f), the insulating film 110 Since impurity element 145 is added via this, the source region 108s and the drain region 10 The amount of impurity element 145 added is less than in 8d.

[0243] Furthermore, in this embodiment, as the impurity element 145, a doping device is used, Argon is added to oxide semiconductor film 107 and oxide semiconductor film 112.

[0244] In this embodiment, argon is added as the impurity element 145. The examples given are not limited to these, and for example, the process does not involve adding impurity element 145. It is not necessary. If the process of adding impurity element 145 is not performed, region 108f is channel The impurity concentration will be equivalent to that of region 108i.

[0245] Next, insulating film 104, oxide semiconductor film 107, insulating film 110, and oxide semiconductor film 11 An insulating film 116 is formed on 2. Note that by forming the insulating film 116, the insulating film 116 and The oxide semiconductor film 107 in contact with the source region 108s and the drain region 108d. Furthermore, the oxide semiconductor film 107 that does not come into contact with the insulating film 116, in other words, the film that comes into contact with the insulating film 110 The oxide semiconductor film 107 becomes the channel region 108i. As a result, the channel region 108 An oxide semiconductor film 108 having i, a source region 108s, and a drain region 108d is formed This is accomplished (see Figure 18(A)).

[0246] Furthermore, between channel area 108i and source area 108s, and channel area 108 A region 108f is formed between i and the drain region 108d.

[0247] Next, an insulating film 118 is formed on the insulating film 116 (see Figure 18(B)).

[0248] Next, a mask is formed on the insulating film 118 at a desired position by a lithography process, and then an insulating film is applied. By etching a portion of the border film 118 and the insulating film 116, the source region 108s is reached. An opening 141a is formed, and an opening 141b is formed that reaches the drain region 108d (Figure 18(C)).

[0249] Next, an insulating film 122 is formed on the insulating film 118 (see Figure 18(D)).

[0250] Furthermore, the insulating film 122 functions as a planarizing insulating film. Also, the insulating film 122, The device has openings in positions that overlap openings 141a and 141b.

[0251] In this embodiment, the insulating film 122 is a photosensitive material obtained using a spin coater device. An acrylic resin is applied, and then a desired area of ​​the acrylic resin is exposed to light to create an opening. An insulating film 122 having a portion is formed.

[0252] Next, a conductive film 120 is formed on the insulating film 122 so as to cover the openings 141a and 141b. (See Figure 19(A)).

[0253] Next, a mask is formed on the conductive film 120 at a desired position by a lithography process, By etching a portion of the conductive film 120, conductive films 120a and 120b are formed (Figure). 19(B)).

[0254] In this embodiment, a dry etching method is used to process the conductive film 120. In some cases, a portion of the upper part of the insulating film 122 may be removed during the processing of the conductive film 120.

[0255] By following the above steps, the transistor 100C shown in Figure 7 can be fabricated.

[0256] Furthermore, when fabricating the transistor 100C described above, the insulating film 104 and the oxide semiconductor film 107, insulating film 110_0, oxide semiconductor film 112_0, impurity element 145, insulating film 11 6. The insulating film 118, the openings 141a, 141b, and the conductive film 120 are <1-9. It can be formed by applying the method described in "Method for Manufacturing Semiconductor Devices 1".

[0257] Furthermore, this embodiment also shows an example where the transistor has an oxide semiconductor film. However, the present invention is not limited thereto. In one aspect of the present invention, the transistor is acid It is not necessary to have a crystalline semiconductor film. One example is the channel region of a transistor. In the vicinity of the drain region, the source region, or the drain region, Si (silicon), Ge (ge). Materials such as luminium, SiGe (silicon germanium), GaAs (gallium arsenide), etc. It may be formed from a material that possesses these properties.

[0258] The configuration and method described in this embodiment are different from those described in other embodiments or examples. It can be used in appropriate combination with the law.

[0259] (Embodiment 2) In this embodiment, the structure of the oxide semiconductor, etc., will be discussed with reference to Figures 20 to 24. I will explain.

[0260] <2-1. Structure of Oxide Semiconductors> Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. It is possible. As a non-single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned d crystalline oxide semiconductor), polycrystalline oxide Solid semiconductor, nc-OS (nanocrystalline oxide semiconductor) ductor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous- (like oxide semiconductors) and amorphous oxide semiconductors, etc. be.

[0261] From another perspective, oxide semiconductors include amorphous oxide semiconductors and other crystalline oxides. Semiconductors can be divided into two categories. Crystalline oxide semiconductors include single-crystal oxide semiconductors and CAAC. Examples include -OS, polycrystalline oxide semiconductors, and nc-OS.

[0262] Amorphous structures are generally isotropic and lack heterogeneity; they are metastable states with a specific arrangement of atoms. The position is not fixed, the connection angle is flexible, and it has short-range order but not long-range order. It is said that there isn't one.

[0263] Conversely, stable oxide semiconductors can be made into completely amorphous (completely amorphous) semiconductors. It cannot be called an oxide semiconductor (orphous). Also, it is not isotropic (for example, in a very small region). Oxide semiconductors that have a periodic structure cannot be called perfectly amorphous oxide semiconductors. On the other hand, a-like OSs are not isotropic but are unstable due to their porous (also called void) structure. It has such a structure. In terms of being unstable, a-like OS is an amorphous oxide in terms of its physical properties. It's similar to a semiconductor.

[0264] <2-2.CAAC-OS> First, let me explain CAAC-OS.

[0265] CAAC-OS is an oxide having multiple c-axis oriented crystalline portions (also called pellets). It is a type of semiconductor.

[0266] CAAC-OS was analyzed by X-ray diffraction (XRD). Let's explain the case of analysis. For example, InGaZnO4, which is classified as having the space group R-3m. Structural analysis was performed on CAAC-OS, which has crystals, using the out-of-plane method. Then, as shown in Figure 20(A), a peak appears near 31° at the diffraction angle (2θ). The mark is attributed to the (009) plane of the InGaZnO4 crystal, therefore CAAC-OS Therefore, the crystal has c-axis orientation, and the c-axis is the surface that forms the CAAC-OS film (also known as the film-forming surface). It can be confirmed that it is facing in a direction approximately perpendicular to the upper surface. Note that 2θ is 31 In addition to the peak near °, a peak may also appear when 2θ is near 36°. The nearby peaks are due to a crystal structure classified as space group Fd-3m. Therefore, CAA It is preferable that C-OS does not exhibit this peak.

[0267] On the other hand, for CAAC-OS, in-pl X-rays are incident from a direction parallel to the surface being formed. Structural analysis using the ANE method reveals a peak near 2θ = 56°. This peak is... It is attributed to the (110) plane of the InGaZnO4 crystal. And 2θ is fixed near 56°. Then, the sample is rotated around the normal vector of the sample surface as the axis (φ axis) while being analyzed (φ scan). Even after performing this procedure, no clear peak appears, as shown in Figure 20(B). On the other hand, single crystal InGa When 2θ is fixed near 56° and a φ scan is performed on ZnO4, the result is shown in Figure 20(C). Six peaks are observed that are attributed to the crystal plane equivalent to the (110) plane. Therefore, Structural analysis using XRD revealed that CAAC-OS has irregular orientations in the a-axis and b-axis. This can be confirmed.

[0268] Next, we will explain CAAC-OS analyzed by electron diffraction. For example, InGa For CAAC-OS having ZnO4 crystals, a pro is applied parallel to the surface of the CAAC-OS being formed. When an electron beam with a diameter of 300 nm is incident, a diffraction pattern like the one shown in Figure 20(D) is observed. This is also called a limited-field electron diffraction pattern. A specific diffraction pattern may appear. The nGaZnO4 crystal contains spots originating from the (009) plane. Therefore, electrons Diffraction also reveals that the pellets contained in CAAC-OS exhibit c-axis orientation, and the c-axis is formed. It can be seen that it is oriented in a direction approximately perpendicular to the surface or top surface. On the other hand, for the same sample, the sample surface Figure 20 shows the diffraction pattern when an electron beam with a probe diameter of 300 nm is incident perpendicularly to the surface. As shown in Figure 20(E), a ring-shaped diffraction pattern can be observed. Therefore, Pro Electron diffraction using an electron beam with a beam diameter of 300 nm also revealed the presence of particles in CAAC-OS. It can be seen that the a-axis and b-axis of Lett do not have orientation. Note that in Figure 20(E) The first ring is caused by the (010) and (100) planes of the InGaZnO4 crystal, etc. It is thought that the second ring in Figure 20(E) is caused by the (110) plane, etc. It is thought that...

[0269] Furthermore, a transmission electron microscope (TEM) Combined analysis of bright-field images and diffraction patterns of CAAC-OS using an icroscope. When observing the image (also called a high-resolution TEM image), multiple pellets can be identified. On the other hand, even in high-resolution TEM images, the boundaries between pellets, i.e., the grain boundaries, are not visible. Also called boundary.) There are cases where it is not possible to clearly confirm this. Therefore, CAA C-OS is less prone to the decrease in electron mobility caused by grain boundaries.

[0270] Figure 21(A) shows a high-resolution cross-section of CAAC-OS observed from a direction approximately parallel to the sample surface. The TEM image is shown. For observing high-resolution TEM images, spherical aberration correction is required. The aberration correction function was used. High spherical aberration correction function was used. High-resolution TEM images are specifically called Cs-corrected high-resolution TEM images. For example, the JEM-ARM200F atomic resolution analytical electron microscope manufactured by JEOL Ltd. Therefore, it can be observed.

[0271] From Figure 21(A), we can identify the pellet, which is a region in which metal atoms are arranged in layers. This is possible. The size of a single pellet can be 1 nm or larger, or 3 nm or larger. I understand. Therefore, pellets can be called nanocrystals (nc). It can also be done as follows: CAAC-OS can be changed to CANC(C-Axis Aligned na It can also be called an oxide semiconductor having nocrystals. The pellet is CAA The C-OS film reflects the unevenness of the surface or top surface to which it is formed, and the CAAC-OS film reflects the unevenness of the surface to which it is formed. It will be parallel to the top surface.

[0272] Furthermore, Figures 21(B) and 21(C) show CAA observed from a direction approximately perpendicular to the sample surface. The Cs-corrected high-resolution TEM images of the C-OS plane are shown. Figures 21(D) and 21(E) are shown. These are images obtained by image processing Figure 21(B) and Figure 21(C), respectively. Below, we will discuss image processing. Let's explain the method. First, Figure 21(B) is converted to the Fast Fourier Transform (FFT). The FFT image is obtained by performing a Fourier Transform (FFT) process. Next, In the obtained FFT image, the origin is referenced at 2.8 nm. -1 from 5.0nm -1 The range between Next, we perform a masking process on the masked FFT image. Then, we perform an inverse Fast Fourier Transform (IFFT) on the masked FFT image. By processing with an Inverse Fast Fourier Transform, the image is transformed. The processed image is obtained. This obtained image is called an FFT filtered image. The filtered image is an image obtained by extracting the periodic component from the Cs-corrected high-resolution TEM image, and This shows the child array.

[0273] In Figure 21(D), areas with disordered grid arrangement are shown with dashed lines. The area enclosed by the dashed lines is It is a single pellet. The area indicated by the dashed line is the connection point between the pellets. Yes. The dashed line is hexagonal, indicating that the pellet is hexagonal. The shape of a lett is not always a regular hexagon; it is often a non-regular hexagon.

[0274] In Figure 21(E), a point is drawn between a region with a aligned grid arrangement and another region with a aligned grid arrangement. The dotted line indicates the grain boundary. Even near the dotted line, a clear grain boundary cannot be observed. By connecting surrounding lattice points around a nearby lattice point, a distorted hexagon can be formed. That is, lattice arrangement It can be seen that the formation of grain boundaries is suppressed by distorting the rows. This is CAA C-OS has a non-dense atomic arrangement in the ab plane, and metal elements are substituted. Because the bond distance between atoms changes, etc., it is possible to tolerate strain. It's possible.

[0275] As described above, CAAC-OS has c-axis orientation and in the ab-plane direction Multiple pellets (nanocrystals) are linked together, forming a distorted crystalline structure. Therefore, C AAC-OS, CAA crystal(c-axis-aligned abp It can also be called an oxide semiconductor having a lane-anchored crystal. Cut.

[0276] CAAC-OS is a highly crystalline oxide semiconductor. The crystallinity of oxide semiconductors depends on the impurities. Since it can decrease due to contamination or the formation of defects, looking at it from the opposite perspective, CAAC-O S can be described as an oxide semiconductor with few impurities or defects (such as oxygen vacancies).

[0277] Impurities are elements other than the main components of oxide semiconductors, such as hydrogen, carbon, silicon, and transition gold. There are group elements, for example. For example, silicon and other metal elements that make up oxide semiconductors are more acidic than the metal elements that make up oxide semiconductors. Elements with strong bonding forces can remove oxygen from oxide semiconductors, thereby altering the atomic arrangement of the oxide semiconductor. This disrupts the crystallinity and reduces its properties. Also, heavy metals such as iron and nickel, and argon, Because carbon dioxide and other elements have large atomic radii (or molecular radii), the atomic arrangement of oxide semiconductors This disrupts the crystallinity and reduces its properties.

[0278] When oxide semiconductors contain impurities or defects, their properties may change due to light, heat, etc. Yes. For example, impurities contained in oxide semiconductors can act as carrier traps, or they can cause carriers to be trapped. It can sometimes be a source of rear-borne emissions. For example, oxygen vacancies in oxide semiconductors can be carrier traps. In some cases, this can result in the capture of hydrogen, or it can become a carrier source.

[0279] CAAC-OS, with its low impurity and oxygen vacancy rate, is suitable for oxide semiconductors with low carrier density. Yes, there is. Specifically, 8 x 1011 pieces / cm 3 Less than 1 × 10 11 / cm 3 less than More preferably 1 × 10 10 pieces / cm 3 It is less than 1 × 10 -9 pieces / cm 3 The above It can be made into an oxide semiconductor with high carrier density. Such an oxide semiconductor can be made into a high-purity true These are called intrinsic or substantially high-purity oxide semiconductors. CAAC-OS has a low impurity concentration. Furthermore, it has a low defect level density. In other words, it can be said to be an oxide semiconductor with stable properties.

[0280] <2-3.nc-OS> Next, I will explain nc-OS.

[0281] This section describes the case of analyzing nc-OS using XRD. For example, when analyzing nc-OS... Furthermore, when structural analysis is performed using the out-of-plane method, peaks indicating orientation do not appear. In other words, nc-OS crystals do not have orientation.

[0282] Furthermore, for example, nc-OS having InGaZnO4 crystals is thinned, and the thickness is 34n When an electron beam with a probe diameter of 50 nm is incident on the region m parallel to the surface to be formed, Figure 2 A ring-shaped diffraction pattern (nanobeam electron diffraction pattern) as shown in 2(A) was observed. Furthermore, the diffraction pattern when an electron beam with a probe diameter of 1 nm is incident on the same sample ( The nanobeam electron diffraction pattern is shown in Figure 22(B). From Figure 22(B), a ring-shaped region is observed. Multiple spots are observed within the region. Therefore, nc-OS has a probe diameter of 50 nm. Order is not observed when an electron beam is incident, but when an electron beam with a probe diameter of 1 nm is used... Order can be confirmed by applying an incident beam of light.

[0283] Furthermore, when an electron beam with a probe diameter of 1 nm is incident on a region with a thickness of less than 10 nm, As shown in Figure 22(C), an electron diffraction pattern is observed in which the spots are arranged in a roughly regular hexagonal shape. It may be measured. Therefore, in the range of thickness less than 10 nm, nc-OS is It can be seen that there are regions with high order, i.e., crystals. Furthermore, the crystals are oriented in various directions. Therefore, there are regions where a regular electron diffraction pattern is not observed.

[0284] Figure 22(D) shows the Cs-corrected height of the cross-section of nc-OS observed from a direction approximately parallel to the surface being formed. The high-resolution TEM image is shown. nc-OS is the area indicated by the auxiliary line in the high-resolution TEM image. How can we identify regions where the crystalline structure can be observed, and regions where the crystalline structure cannot be clearly identified? It has a region and a crystal portion contained in nc-OS, with a size of 1 nm to 10 nm. The size is often between 1 nm and 3 nm. Oxide semiconductors with a wavelength greater than 10 nm but less than or equal to 100 nm are called microcrystalline oxide semiconductors (MICR). It is called a crystalline oxide semiconductor. Yes, nc-OS is useful in situations where, for example, grain boundaries cannot be clearly identified in high-resolution TEM images. There is a possibility that the nanocrystals share the same origin as the pellets in CAAC-OS. It has properties. Therefore, in the following, the crystalline portion of nc-OS may be referred to as a pellet.

[0285] Thus, nc-OS is suitable for very small regions (for example, regions between 1 nm and 10 nm, etc.) The atomic arrangement has periodicity in the region between 1 nm and 3 nm. Also, nc-OS There is no regularity in the crystal orientation between different pellets. Therefore, orientation is not observed throughout the entire film. Therefore, nc-OS can be analyzed using methods that produce a-like OS or amorphous OS. It can sometimes be indistinguishable from crystalline oxide semiconductors.

[0286] Furthermore, since there is no regularity in the crystal orientation between pellets (nanocrystals), nc-OS , an oxidation having RANC (Random Aligned nanocrystals) Material semiconductors, or NANCs (Non-Aligned nanocrystals) It can also be called an oxide semiconductor.

[0287] nc-OS is an oxide semiconductor with higher orderliness than amorphous oxide semiconductors. nc-OS has a lower defect level density than a-like OS and amorphous oxide semiconductors. However, nc-OS does not show any regularity in crystal orientation between different pellets. Therefore, nc-OS has a higher defect level density compared to CAAC-OS.

[0288] <2-4. a-like OS> a-like OS is an oxide having a structure between nc-OS and amorphous oxide semiconductors. It is a semiconductor.

[0289] Figure 23 shows a high-resolution cross-sectional TEM image of an a-like OS. Here, Figure 23(A) This is a high-resolution cross-sectional TEM image of a-like OS at the start of electron irradiation. Figure 23( B) is 4.3 × 10 8 e - / nm 2 electrons (e - ) a-like OS after irradiation This is a high-resolution cross-sectional TEM image. From Figures 23(A) and 23(B), a-like O It can be seen that, from the start of electron irradiation, striped bright regions extending in the vertical direction are observed in S. Furthermore, it can be seen that the shape of the bright region changes after electron irradiation. Note that the bright region is porous or low This is presumed to be a density region.

[0290] Due to its porous nature, a-like OS has an unstable structure. Below, a-lik This demonstrates that e OS has a less stable structure compared to CAAC-OS and nc-OS. Therefore, it shows the structural changes caused by electron irradiation.

[0291] Prepare a-like OS, nc-OS, and CAAC-OS as samples. This sample is also an In-Ga-Zn oxide.

[0292] First, high-resolution cross-sectional TEM images are obtained for each sample. All materials contain crystalline parts.

[0293] Furthermore, the unit cell of the InGaZnO4 crystal has three In-O layers, and Ga-Zn -It is known to have a structure in which a total of 9 layers, including 6 O layers, are stacked in layers along the c-axis. The spacing between these adjacent layers is the grid plane spacing (also called the d value) of the (009) plane and They are of similar magnitude, and their value has been determined to be 0.29 nm from crystal structure analysis. Therefore, In the following, areas where the grid pattern spacing is between 0.28 nm and 0.30 nm are defined as InGaZ This was considered to be the crystalline portion of nO4. The lattice fringes correspond to the ab-plane of the InGaZnO4 crystal. do.

[0294] Figure 24 shows an example of investigating the average size of the crystalline regions (22 to 30 locations) in each sample. The length of the lattice stripes mentioned above is used to define the size of the crystal portion. From Figure 24, a-lik e OS grows larger in the crystal region in accordance with the cumulative amount of electrons irradiated, such as when acquiring TEM images. It can be seen that in the initial stages of TEM observation, the size is about 1.2 nm. The separated crystalline region (also called the initial nucleus) contains electrons (e - The cumulative radiation dose was 4.2 × 10⁻⁶ 8 e - / nm 2 In this case, it can be seen that it has grown to a size of about 1.9 nm. On the other hand, n c-OS and CAAC-OS have a cumulative electron dose of 4.2 × 10⁻⁶ from the start of electron irradiation. 8 e - / nm 2 Within this range, no change in the size of the crystal portion can be observed. (Figure 24) Therefore, regardless of the cumulative electron irradiation dose, the size of the crystal portion of nc-OS and CAAC-OS is It can be seen that these are approximately 1.3 nm and 1.8 nm, respectively. TEM observations were performed using a Hitachi transmission electron microscope H-9000NAR. Electron beam irradiation streaks The case involves an acceleration voltage of 300kV and a current density of 6.7 × 10⁻⁶. 5 e - / (nm 2 ·s), irradiation area The diameter of the region was set to 230 nm.

[0295] Thus, in a-like OS, crystalline growth can be observed upon electron irradiation. Yes. On the other hand, in nc-OS and CAAC-OS, the growth of the crystal portion by electron irradiation is almost entirely... It cannot be seen. In other words, a-like OS is different from nc-OS and CAAC-OS. This reveals that it is an unstable structure.

[0296] Furthermore, because it is porous, a-like OS is compared to nc-OS and CAAC-OS. It has a structure with extremely low density. Specifically, the density of a-like OS is 78.6% or more and less than 92.3% of the density of a single crystal with the same composition. Also, the density of nc-OS and CAA C-OS is 92.3% or more and less than 100% of the density of a single crystal with the same composition. An oxide semiconductor with a density less than 78% of the density of a single crystal is difficult to form a film itself. For example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of a single crystal InGaZnO4 having a rhombohedral crystal structure is 6.357 g / cm Thus, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio],

[0297] the density of a-like OS is 5.0 g / cm or more and less than 5.9 g / cm 3 And, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of nc-OS and CAAC-OS is 5.9 g / cm or more and less than 6.3 g / cm 3 or more and less than 5.9 g / cm 3 And, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of nc-OS and CAAC-OS is 5.9 g / cm or more and less than 6.3 g / cm 3 or more and less than 6.3 g / cm 3 and less than.

[0298] In addition, when there is no single crystal with the same composition, by combining single crystals with different compositions in an arbitrary ratio, the density corresponding to a single crystal in the desired composition can be estimated. The density corresponding to a single crystal of the desired composition may be estimated using a weighted average with respect to the ratio of combining single crystals with different compositions. However, it is preferable to estimate the density by combining as few types of single crystals as possible. The density corresponding to a single crystal of the desired composition may be estimated using a weighted average with respect to the ratio of combining single crystals with different compositions. However, it is preferable to estimate the density by combining as few types of single crystals as possible. The density corresponding to a single crystal of the desired composition may be estimated using a weighted average with respect to the ratio of combining single crystals with different compositions. However, it is preferable to estimate the density by combining as few types of single crystals as possible. The density corresponding to a single crystal of the desired composition may be estimated using a weighted average with respect to the ratio of combining single crystals with different compositions. However, it is preferable to estimate the density by combining as few types of single crystals as possible.

[0299] As described above, the oxide semiconductor takes various structures and each has various characteristics. Oxide semiconductors include, for example, amorphous oxide semiconductors, a-like OS, and nc-OS. The laminated film may have two or more types of CAAC-OS.

[0300] The configuration shown in this embodiment can be appropriately combined with the configurations shown in other embodiments or examples. They can be used together.

[0301] (Embodiment 3) In this embodiment, the display device having a transistor as illustrated in the previous embodiment An example will be explained below using Figures 25 to 27.

[0302] Figure 25 is a top view showing an example of a display device. The display device 700 shown in Figure 25 is the first A pixel section 702 provided on the substrate 701 and a source drive provided on the first substrate 701 The Pixel circuit section 704 and the gate driver circuit section 706, and the pixel section 702 and the source driver circuit A sealing material 712 is arranged to surround the path section 704 and the gate driver circuit section 706. It includes a second substrate 705 provided opposite the first substrate 701. The first substrate 701 and the second substrate 705 are sealed by a sealing material 712. The pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are It is sealed by the first substrate 701, the sealing material 712, and the second substrate 705. Although not shown in Figure 25, a display element is provided between the first substrate 701 and the second substrate 705. It gets kicked.

[0303] Furthermore, the display device 700 is surrounded by a sealing material 712 on the first substrate 701. In a region different from the region, the pixel section 702, the source driver circuit section 704, and the gate driver are located. The circuit section 706 and the FPC terminal section 708 (FPC: Flex) are electrically connected to each other. A flexible printed circuit (FPC) is provided. Also, the FPC terminal section 708 An FPC716 is connected to it, and the FPC716 controls the pixel unit 702 and the source driver circuit. Various signals are supplied to the path section 704 and the gate driver circuit section 706. Also, the pixel section 702, source driver circuit section 704, gate driver circuit section 706, and FPC terminal section Signal lines 710 are connected to each of the 708s. Various signals are supplied by FPC716. The numbers, etc., are transmitted via the signal line 710 to the pixel unit 702, the source driver circuit unit 704, and the gated This is provided to the driver circuit section 706 and the FPC terminal section 708.

[0304] Furthermore, the display device 700 may be provided with multiple gate driver circuit units 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example is shown in which the pixel portion 702 is formed on the same first substrate 701, this configuration is not limited to this example. It is not necessary. For example, the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit section 704 may be formed on the first substrate 701. In this case, a substrate on which a source driver circuit or gate driver circuit, etc., is formed (for example, a single-wired board) A drive circuit board (formed from a crystalline semiconductor film or a polycrystalline semiconductor film) is mounted on the first substrate 701. This configuration is also acceptable. Furthermore, the method of connecting the separately formed drive circuit board is not particularly limited. Instead, methods such as COG (Chip On Glass) and wire bonding are used. You can use it.

[0305] Furthermore, the display device 700 includes a pixel section 702, a source driver circuit section 704, and a gate The driver circuit section 706 has a plurality of transistors, and is a semiconductor device according to one aspect of the present invention. A transistor can be applied to this.

[0306] Furthermore, the display device 700 can have various elements. An example of such elements is: For example, electroluminescent (EL) elements (EL elements including organic and inorganic materials, (Electroluminescent elements, inorganic EL elements, LEDs, etc.), light-emitting transistors (which emit light in response to current) Rangista), electron emission element, liquid crystal element, electron ink element, electrophoretic element, electro Feeding elements, plasma displays (PDPs), MEMS (microelectronics) • Mechanical system) Display (e.g., grating light bulb (GLV) ), Digital Micromirror Device (DMD), Digital Microshutter (D MS elements, interference modulation (IMOD) elements, piezoelectric elements, etc. Examples include Lamic Display.

[0307] Another example of a display device using EL elements is an EL display. An example of a display device using emission elements is a field emission display (FE D) or SED type flat display (SED: Surface-conductivity Examples include (n Electron-emitter Display), which uses liquid crystal elements. Examples of such display devices include liquid crystal displays (transmissive liquid crystal displays, semi-transmissive liquid crystal displays). Display, reflective liquid crystal display, direct-view liquid crystal display, projection liquid crystal display Examples include (Ray). An example of a display device using an electronic ink element or electrophoretic element is: Examples include electronic paper. Furthermore, there are semi-transmissive liquid crystal displays and reflective liquid crystal displays. If implemented, some or all of the pixel electrodes would function as reflective electrodes. This is how it should be done. For example, some or all of the pixel electrodes could be made of aluminum, silver, etc. It would be good to have it. Furthermore, in that case, a memory circuit such as SRAM should be placed below the reflective electrode. It is also possible to implement this feature. This will further reduce power consumption.

[0308] The display method used in the display device 700 is either progressive or interlaced. These can be used. Also, when displaying in color, the color elements controlled by pixels include R It is not limited to the three colors GB (R stands for red, G for green, and B for blue). For example, if the pixels have R and G It may consist of four pixels: a pixel, a B pixel, and a W (white) pixel. Alternatively, a pentile arrangement. As shown in the column, two of the RGB colors make up one color element, and different two colors are used depending on the color element. You can select and configure colors. Alternatively, you can use RGB with one or more colors such as yellow, cyan, and magenta. You may add more above. Note that the size of the display area for each dot of the color element may differ. However, the disclosed invention is not limited to a color display device, but also includes monochrome displays. It can also be applied to display devices.

[0309] In addition, the backlight (organic EL elements, inorganic EL elements, LEDs, fluorescent lamps, etc.) emits white light. (W) is used to enable the display device to display in full color, and the coloring layer (also called a color filter) You may also use ( ). The colored layer may be, for example, red (R), green (G), blue (B ), yellow (Y), etc. can be used in appropriate combinations. By using a colored layer This allows for higher color reproduction compared to cases where a colored layer is not used. By arranging a region having a colored layer and a region without a colored layer, a region without a colored layer is created. White light in the area may be used directly for display. A portion of the area may be placed without a colored layer. By placing it in this position, the reduction in brightness caused by the colored layer during bright displays can be minimized, and power consumption is reduced by 2 In some cases, the emission can be reduced by 10% to 30%. However, this is due to the spontaneous generation of organic EL elements and inorganic EL elements. When using optical elements for full-color display, R, G, B, Y, and W are used, each with its own emitted color. It is also acceptable to emit light from the element. By using a self-luminescent element, it is possible to achieve better results than when using a colored layer. Furthermore, it may be possible to reduce power consumption even further.

[0310] Furthermore, the colorization method involves passing a portion of the light emitted from the white light source through a color filter. In addition to the method of converting to red, green, and blue (color filter method), red, green, blue A method that uses each color of light emission separately (three-color method), or a method that uses red or a portion of the light emitted from blue light emission. A method for converting to green (color conversion method, quantum dot method) may also be applied.

[0311] In this embodiment, regarding the configuration in which liquid crystal elements and EL elements are used as display elements: This will be explained using Figures 26 and 27. Note that Figure 26 is shown in Figure 25, where the dashed line QR is located. Figure 27 is a cross-sectional view of the device, which uses a liquid crystal element as the display element. This is a cross-sectional view of the dashed-dotted line QR shown in 25, and it is a configuration using an EL element as the display element. That is the case.

[0312] First, we will explain the common parts shown in Figures 26 and 27, and then we will discuss the different parts. I will explain below.

[0313] <3-1. Explanation of Common Parts of Display Devices> The display device 700 shown in Figures 26 and 27 includes a wiring section 711 and a pixel section 702. It has a source driver circuit section 704 and an FPC terminal section 708. The line section 711 has a signal line 710. The pixel section 702 has a transistor 750 and It has a capacitive element 790. The source driver circuit section 704 also has a transistor 752. To possess.

[0314] Transistors 750 and 752 are similar to transistor 100 shown above. This is the configuration. Note that the configurations of transistors 750 and 752 are as described above. Other transistors shown in the embodiment may also be used.

[0315] The transistor used in this embodiment is made of an oxide that has been purified to suppress the formation of oxygen vacancies. It has a semiconductor film. The transistor can reduce the off-current. Therefore, the image The holding time of electrical signals such as signals can be extended, and the writing interval is also extended when the power is on. It can be set to a certain value. Therefore, the frequency of refresh operations can be reduced, thus reducing power consumption. It has the effect of suppressing force.

[0316] Furthermore, the transistor used in this embodiment is capable of obtaining a relatively high field-effect mobility. Therefore, high-speed operation is possible. For example, a transistor capable of such high-speed operation can be used in a liquid crystal display. By using it in a display device, the switching transistors in the pixel section and the drive circuit section are used. Driver transistors can be formed on the same substrate. That is, they can be used as a separate drive circuit. Therefore, since there is no need to use semiconductor devices formed from silicon wafers, etc., This reduces the number of parts. In addition, the pixel section also has a transistor that can be driven at high speed. By using ZISTA, high-quality images can be provided.

[0317] The capacitive element 790 has a lower electrode and an upper electrode. The lower electrode is an oxide semiconductor film. It is formed through a processing step. The oxide semiconductor film and the first transistor 750 have The oxide semiconductor film is formed through the same process. The upper electrode is formed through a process of processing the conductive film. This is accomplished. The conductive film and the source and drain electrodes of the transistor 750 are used. The functional conductive film is formed through the same process. Furthermore, between the lower electrode and the upper electrode, An insulating film that functions as a second insulating film of the Rangista 750, and as a third insulating film A functional insulating film is provided. That is, the capacitive element 790 has a dielectric between the pair of electrodes. It is a multilayer structure in which insulating films that function as a single layer are sandwiched together.

[0318] Furthermore, in Figures 26 and 27, transistor 750, transistor 752, and A planarizing insulating film 770 is provided on the quantitative element 790.

[0319] The planarizing insulating film 770 can be polyimide resin, acrylic resin, or polyimideamide resin. , heat-resistant organic materials such as benzocyclobutene resin, polyamide resin, and epoxy resin These can be used. Furthermore, by stacking multiple insulating films formed from these materials... A planarizing insulating film 770 may be formed. Alternatively, a configuration without a planarizing insulating film 770 may be provided. That's fine.

[0320] Furthermore, signal line 710 is connected to the source and drain electrodes of transistors 750 and 752. It is formed through the same process as the conductive film that functions as a transistor. The signal line 710 is a transistor. Conductive films formed by different processes from the source and drain electrodes of 750 and 752, e.g. For example, an oxide semiconductor film that functions as a gate electrode is formed through the same process as an oxide semiconductor film. A body membrane may be used. If, for example, a material containing copper is used as the signal line 710, This reduces signal delays caused by line resistance, enabling display on large screens.

[0321] Furthermore, the FPC terminal section 708 includes a connecting electrode 760, an anisotropic conductive film 780, and FPC 71 It has 6. The connecting electrode 760 is the source electrode of transistors 750 and 752 and It is formed through the same process as the conductive film that functions as a rain electrode. Also, the connecting electrode 760 is The terminals of the FPC716 are electrically connected via the anisotropic conductive film 780.

[0322] Furthermore, for example, glass substrates can be used as the first substrate 701 and the second substrate 705. This is possible. Also, the first substrate 701 and the second substrate 705 are flexible substrates. A flexible substrate may be used. Examples of such flexible substrates include plastic substrates. ru.

[0323] Furthermore, a structure 778 is provided between the first substrate 701 and the second substrate 705. The fabricated body 778 is a columnar spacer obtained by selectively etching an insulating film. It is provided to control the distance (cell gap) between the first substrate 701 and the second substrate 705. It is possible to use a spherical spacer as the structure 778.

[0324] Furthermore, the second substrate 705 side has a light-shielding film 738 that functions as a black matrix, A colored film 736 that functions as a color filter, and a light-shielding film 738 and a film in contact with the colored film 736 An insulating film 734 is provided.

[0325] <3-2. Example of a display device configuration using liquid crystal elements> The display device 700 shown in Figure 26 has a liquid crystal element 775. The liquid crystal element 775 is a conductive film It has 772, a conductive film 774, and a liquid crystal layer 776. The conductive film 774 is on the second substrate 705 It is provided on the side and functions as a counter electrode. The display device 700 shown in Figure 26 is a conductive film The orientation state of the liquid crystal layer 776 changes depending on the voltage applied to 772 and the conductive film 774. By controlling the transmission and opacity of light, an image can be displayed.

[0326] Furthermore, the conductive film 772 serves as the source electrode and drain electrode of the transistor 750. It is connected to a conductive film that functions as a pixel. The conductive film 772 is formed on the planar insulating film 770 and is connected to the pixel. It functions as an electrode, that is, one of the electrodes of the display element. Furthermore, the conductive film 772 acts as a reflective electrode. It has the function of being a light display device. The display device 700 shown in Figure 26 uses ambient light and a conductive film 772 to illuminate This is a so-called reflective type color liquid crystal display device that reflects light and displays it through a colored film 736.

[0327] The conductive film 772 is a conductive film that is transparent in visible light, or a conductive film that is transparent in visible light. A conductive film with light-transmitting properties can be used. Examples of conductive films that are transparent in visible light include: For example, a material containing one element selected from indium (In), zinc (Zn), and tin (Sn). It is advisable to use a material. Examples of conductive films that are reflective in visible light include aluminum. Alternatively, a material containing silver may be used. In this embodiment, the conductive film 772 is, A reflective conductive film is used in the visible light spectrum.

[0328] Furthermore, in the display device 700 shown in Figure 26, the planar insulating film 770 of the pixel portion 702 Some parts are provided with irregularities. These irregularities are formed, for example, by creating a planar insulating film 770 with a resin film. This can be formed by creating irregularities on the surface of the resin film. Also, as a reflective electrode, The conductive film 772 is formed along the above irregularities. Therefore, ambient light can penetrate the conductive film 772. When incident on the surface of the conductive film 772, it becomes possible to diffusely reflect the light, making it difficult to see. It can improve sexual performance.

[0329] Note that the display device 700 shown in Figure 26 is an example of a reflective color liquid crystal display device. However, it is not limited to this; for example, a conductive film 772 that is transparent in visible light By using this, it can also be used as a transmissive color liquid crystal display device. Transmissive color liquid crystal display device In this case, the surface irregularities provided on the planarized insulating film 770 may be omitted.

[0330] Note that although not shown in Figure 26, the side of the conductive films 772 and 774 that contacts the liquid crystal layer 776. Alternatively, an orientation film may be provided in each of them. Also, although not shown in Figure 26, Optical components (optical substrates) such as optical members, phase difference members, and anti-reflective members may be provided as appropriate. For example, circularly polarized light from a polarizing substrate and a phase difference substrate may be used. Also, as a light source, You may also use Klite, Sidelite, etc.

[0331] When using liquid crystal elements as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, and polymer liquid crystals are used. Crystals, polymer-dispersed liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. Depending on the conditions, the liquid crystal material can be classified into cholesteric phase, smectic phase, cubic phase, and chi. It exhibits the ranematic phase, isotropic phase, etc.

[0332] Furthermore, when employing a transverse electric field method, it is also possible to use a liquid crystal that exhibits a blue phase without using an alignment layer. The blue phase is one of the liquid crystal phases, and as the temperature of cholesteric liquid crystal is increased, the cholesteric phase This phase appears just before the transition from the blue phase to the isotropic phase. The blue phase only appears within a narrow temperature range. To improve the temperature range, a liquid crystal assembly containing several weight percent or more of chiral agent was mixed in. The material is used in the liquid crystal layer. The liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent provides a fast response. Because the degree of polarization is short and the optical properties are isotropic, orientation treatment is unnecessary. Furthermore, an orientation film does not need to be applied. Therefore, rubbing is unnecessary, thus eliminating the electrostatic discharge damage caused by rubbing. This can prevent defects and reduce damage to liquid crystal displays during the manufacturing process. Furthermore, liquid crystal materials exhibiting a blue phase have low dependence on viewing angle.

[0333] Furthermore, when using liquid crystal elements as display elements, TN (Twisted Nematic) ) mode, IPS (In-Plane-Switching) mode, FFS (Frin (Field Switching) mode, ASM (Axially Symmetry) tric aligned Micro-cell) mode, OCB(Optical Compensated Birefringence mode, FLC (Ferroe) lectric Liquid Crystal) mode, AFLC (AntiFerr Features such as the (electric Liquid Crystal) mode can be used. .

[0334] Furthermore, a normally black type liquid crystal display device, for example, one that employs vertical alignment (VA) mode, It may also be used as a transmissive liquid crystal display device. Several vertical orientation modes can be listed. For example, MVA (Multi-Domain Vertical Alignment) ) Mode, PVA (Patterned Vertical Alignment) Mode You can use modes such as ASV mode.

[0335] <3-3. Display devices using light-emitting elements> The display device 700 shown in Figure 27 has a light-emitting element 782. The light-emitting element 782 is made of a conductive film It has 784, an EL layer 786, and a conductive film 788. The display device 700 shown in Figure 27 is The EL layer 786 of the optical element 782 emits light, allowing an image to be displayed. ru.

[0336] Furthermore, the conductive film 784 serves as the source electrode and drain electrode of the transistor 750. It is connected to a conductive film that functions as a pixel. The conductive film 784 is formed on the planar insulating film 770 and is connected to the pixel. It functions as an electrode, that is, one of the electrodes of the display element. The conductive film 784 is visible light In this, a transparent conductive film or a conductive film that is reflective in visible light can be used. Examples of conductive films that are transparent in visible light include indium (In) and zinc. It is preferable to use a material containing one element selected from (Zn) and tin (Sn). For example, a reflective conductive film can be made from a material containing aluminum or silver. stomach.

[0337] Furthermore, the display device 700 shown in Figure 27 has an insulating film 770 and a conductive film 784 on which an insulating film is applied. A border film 730 is provided. The insulating film 730 covers a portion of the conductive film 784. 782 is a top emission structure. Therefore, the conductive film 788 is translucent, E It transmits the light emitted by the L layer 786. In this embodiment, top emission The structure is illustrated as an example, but is not limited to this. For example, light is emitted from the conductive film 784 side. The bottom emission structure and the dual emission of light to both conductive film 784 and conductive film 788 It can also be applied to ammonium emission structures.

[0338] Furthermore, a colored film 736 is provided in a position that overlaps with the light-emitting element 782, and overlaps with the insulating film 730. A light-shielding film 738 is provided at the location, the routing wiring section 711, and the source driver circuit section 704. Furthermore, the colored film 736 and the light-shielding film 738 are covered with an insulating film 734. Furthermore, the space between the light-emitting element 782 and the insulating film 734 is filled with a sealing film 732. (See Figure 27) In the display device 700 shown, an example was given of a configuration in which a colored film 736 is provided, It is not limited to this. For example, when the EL layer 786 is formed by coloring, A configuration without the film 736 is also possible.

[0339] The configuration shown in this embodiment can be appropriately combined with the configurations shown in other embodiments or examples. It can be used.

[0340] (Embodiment 4) In this embodiment, it is possible to retain the contents of the memory even when power is not supplied, and also write data. An example of a semiconductor device circuit configuration with no limit on the number of cycles will be explained using Figure 28.

[0341] <4-1. Circuit Configuration> Figure 28 is a diagram illustrating the circuit configuration of a semiconductor device. In Figure 28, the first wiring ( (1st Line) and the source or drain electrode of the p-type transistor 1280a It is electrically connected to the other side. Also, the source electrode of the p-type transistor 1280a The other side of the drain electrode and the source electrode or drain electrode of the n-type transistor 1280b It is electrically connected to one of the poles. Also, the source power of the n-type transistor 1280b The other of the pole or drain electrode and the source electrode or drain electrode of the n-type transistor 1280c It is electrically connected to one of the electrodes.

[0342] Also, the second line and the source electrode of transistor 1282 or It is electrically connected to one of the drain electrodes. Also, the saw of transistor 1282 The other electrode of the drain electrode, one electrode of the capacitive element 1281, and the n-type transistor It is electrically connected to the gate electrode of the TA1280c.

[0343] Also, the third line and the p-type transistor 1280a and n-type transistor It is electrically connected to the gate electrode of the inverter 1280b. Also, the fourth wiring (4 The (th line) and the gate electrode of transistor 1282 are electrically connected. Also, the fifth wiring (5th Line) and the other electrode of the capacitive element 1281 and the n-type The source electrode or drain electrode of the lampistor 1280c is electrically connected to the other electrode. It is. Also, the 6th line and the source of the p-type transistor 1280a. The other electrode or drain electrode and the source electrode or drain electrode of the n-type transistor 1280b It is electrically connected to one of the in electrodes.

[0344] Note that transistor 1282 is an oxide semiconductor (OS). It can be formed by (uctor). Therefore, in Figure 28, transistor The symbol "OS" is appended to 1282. Note that transistor 1282 is an oxide semiconductor. It may be formed from materials other than those mentioned above.

[0345] Also, in Figure 28, the other of the source electrode or drain electrode of transistor 1282. And, one electrode of the capacitive element 1281 and the gate electrode of the n-type transistor 1280c, Floating nodes (FN) are indicated at the connection points. Transistor 1282 By turning it off, the floating node, one of the electrodes of the capacitive element 1281, and n The potential applied to the gate electrode of type 1280c transistor can be maintained.

[0346] In the circuit configuration shown in Figure 28, the potential of the gate electrode of the n-type transistor 1280c can be maintained. By utilizing its unique characteristics, it is possible to write, store, and read information in the following ways: ru.

[0347] <4-2. Writing and Retention of Information> First, let's explain how to write and retain information. The potential of the fourth wire is controlled by the transistor. The potential is set so that transistor 1282 is ON, and transistor 1282 is turned ON. Therefore, the potential of the second wiring is the gate electrode of the n-type transistor 1280c, and the capacitive element 12 It is given to 81. That is, the gate electrode of the n-type transistor 1280c has a predetermined voltage. A load is applied (written). Then, the potential of the fourth wire is controlled by transistor 1282. The potential is set to the OFF state, and transistor 1282 is turned OFF. This turns off the n-type transistor. The charge applied to the gate electrode of the lampistor 1280c is retained (held).

[0348] Because the off-current of transistor 1282 is extremely small, n-type transistor 1280c The charge on the gate electrode is retained for a long period of time.

[0349] <4-3. Information Retrieval> Next, we will explain how to read the information. The potential of the third wiring was set to a low level potential. At that time, the p-type transistor 1280a turns on and the n-type transistor 1280b turns off. This is the state. At this time, the potential of the first wire is supplied to the sixth wire. On the other hand, the third wire When the potential is set to a high level potential, the p-type transistor 1280a turns off, and n The transistor 1280b is turned ON. At this time, the floating node (FN) Depending on the amount of charge held, the sixth wire takes on a different potential. Therefore, the electric potential of the sixth wire By looking at the position, the stored information can be read (read).

[0350] Furthermore, transistor 1282 uses an oxide semiconductor in the channel formation region, so This is a transistor with a small off-current. Transistor 1282 using an oxide semiconductor. The off-current is less than 1 / 100,000th of the off-current of a transistor made of silicon semiconductors, etc. Because it is a current, leakage from transistor 1282 causes a floating node (FN) It is possible to ignore the disappearance of accumulated charge. In other words, a trace using an oxide semiconductor The 1282 is a non-volatile memory circuit that can retain information even without a power supply. It is possible to achieve this.

[0351] Furthermore, semiconductor devices using such circuit configurations include registers and cache memories. By using it in a storage device, it prevents the loss of data in the storage device due to a power supply interruption. This is possible. Furthermore, after the power supply voltage is restored, the system will quickly return to the state it was in before the power supply was interrupted. Therefore, the entire storage device, or one or more of the storage devices that make up the storage device, can be used. In logic circuits, the power can be shut off even for a short time while in standby mode, so It can reduce electricity consumption.

[0352] The configurations and methods described in this embodiment are similar to those described in other embodiments or examples. It can be used in appropriate combination with other methods, etc.

[0353] (Embodiment 5) In this embodiment, the configuration of a pixel circuit that can be used in a semiconductor device according to one aspect of the present invention. The following explanation will be given using Figure 29(A).

[0354] <5-1. Pixel Circuit Configuration> Figure 29(A) is a diagram illustrating the configuration of a pixel circuit. The circuit shown in Figure 29(A) is a light Power conversion element 1360, transistor 1351, transistor 1352, transistor 13 It has transistor 53 and transistor 1354.

[0355] The anode of the photoelectric conversion element 1360 is connected to wiring 1316, and the cathode is connected to the transistor. It is connected to either the source or drain electrode of transistor 1351. The source electrode or the other drain electrode is connected to the charge storage unit (FD), and the gate electrode is connected Connected to line 1312 (TX). Source electrode or drain electrode of transistor 1352 One end of the electrode is connected to wiring 1314 (GND), and the other end of the source or drain electrode is It is connected to either the source or drain electrode of transistor 1354, and the gate electrode is It is connected to the charge storage unit (FD). The source electrode or drain electrode of transistor 1353 One end of the electrode is connected to the charge storage unit (FD), and the other end of the source or drain electrode is connected to the wiring. It is connected to 1317, and the gate electrode is connected to wire 1311(RS). Transistor 1 The other end of either the source or drain electrode of 354 is connected to wiring 1315 (OUT), The electrode is connected to wiring 1313(SE). Note that all of the above connections are electrical connections. ru.

[0356] Note that wiring 1314 may be supplied with potentials such as GND, VSS, and VDD. Here, potential and voltage are relative. Therefore, the magnitude of the potential of GND is not necessarily However, it is not necessarily true that the voltage is 0 volts.

[0357] The photoelectric conversion element 1360 is a light-receiving element that generates a current corresponding to the light incident on the pixel circuit. It has the function of having a charge storage unit (F) by the photoelectric conversion element 1360. Transistor 1354 has the function of controlling charge accumulation in D). Transistor 1352 has the function of outputting a signal corresponding to the potential of the charge storage unit ( It has a function to reset the potential of the FD. Transistor 1352 has a function to reset the pixel during readout. It has a function to control the selection of circuits.

[0358] The charge storage unit (FD) is a charge holding node, and the photoelectric conversion element 1360 receives It holds an electric charge that changes depending on the amount of light.

[0359] Note that transistors 1352 and 1354 are connected by wiring 1315 and wiring 131 It is sufficient that it is connected in series with 4. Therefore, wiring 1314, transistor 13 The order may be 52, transistor 1354, and wiring 1315, or wiring 1314, transistor 1354. The transistors 1354, 1352, and 1315 may be arranged in that order.

[0360] Wiring 1311 (RS) functions as a signal line to control transistor 1353. It has. Wiring 1312 (TX) is a signal line for controlling transistor 1351. It has the function of controlling transistor 1354. Wiring 1313(SE) is a signal for controlling transistor 1354. It functions as a line. Wiring 1314 (GND) provides a reference potential (e.g., GND). It functions as a signal line. Wiring 1315 (OUT) is connected to transistor 1352 It functions as a signal line for reading the signal output from it. Wiring 1316 is a charge As a signal line for outputting charge from the storage unit (FD) via the photoelectric conversion element 1360 It has a function and is a low-potential line in the circuit of Figure 29(A). Also, wiring 1317 is a charge It functions as a signal line for resetting the potential of the storage unit (FD), as shown in Figure 29(A). In a circuit, it is a high-potential line.

[0361] Next, we will explain the configuration of each element shown in Figure 29(A).

[0362] <5-2. Photoelectric Conversion Elements> The photoelectric conversion element 1360 contains selenium or a compound containing selenium (hereinafter referred to as selenium-based material and An element having (for example, a pin-type junction is formed) or an element having silicon A transistor using an oxide semiconductor and a selenium ion transistor can be used. By combining it with a photoelectric conversion element using a system material, reliability can be increased. preferable.

[0363] <5-3. Transistors> Transistors 1351, 1352, 1353, and ZISTA 1354 is available in amorphous silicon, microcrystalline silicon, polycrystalline silicon, and monocrystalline silicon. It is also possible to form them using silicon semiconductors such as, but the process using oxide semiconductors It is preferable to form it with an radiator. A transistor in which a channel formation region is formed with an oxide semiconductor. ZISTA has the characteristic of exhibiting extremely low off-current. Also, in oxide semiconductors As an example of a transistor in which a channel formation region is formed, the transistor shown in Embodiment 1 You can use sta.

[0364] In particular, transistor 1351 connected to the charge storage unit (FD), and transistor When the leakage current of 1353 is large, the charge stored in the charge storage unit (FD) can be retained. The gap becomes insufficient. Therefore, an oxide semiconductor is used in at least the two transistors. By using the transistor, unwanted charge outflow from the charge storage unit (FD) is prevented. It can be stopped.

[0365] Furthermore, in transistors 1352 and 1354, the leakage current is large. This is because unnecessary charge output occurs in wiring 1314 or wiring 1315, As a transistor, a transistor is used in which a channel formation region is formed using an oxide semiconductor. It is preferable.

[0366] Furthermore, Figure 29(A) illustrates a transistor with a single gate electrode configuration. However, it is not limited to this, and for example, a configuration having multiple gate electrodes is also possible. Examples of transistors having a gate electrode include semiconductors in which a channel formation region is formed. The first gate electrode overlaps with the body membrane, and the second gate electrode (also called the back gate electrode) A configuration having the following may be used. As the back gate electrode, for example, the first gate electrode and The potential can be the same, a floating potential, or a potential different from that of the first gate electrode.

[0367] <5-4. Circuit Operation Timing Chart> Next, regarding an example of the circuit operation of the circuit shown in Figure 29(A), see the timing shown in Figure 29(B). I will explain using a chart.

[0368] In Figure 29(B), for simplicity, the potential of each wire is given as a binary signal. However, since each potential is an analog signal, in practice, depending on the situation, it is not limited to binary values ​​and can be used in various ways. It can take on the following values. Note that signal 1401 shown in Figure 29(B) is the potential of wiring 1311(RS). Signal 1402 is at the potential of wiring 1312 (TX), and signal 1403 is at the potential of wiring 1313 (SE). Potential, signal 1404 is the potential of the charge storage unit (FD), signal 1405 is wiring 1315 (OUT This corresponds to the potential of ( ). Note that the potential of wiring 1316 is always "Low", and the potential of wiring 1317 This should always be set to "High".

[0369] At time A, the potential of wiring 1311 (signal 1401) is set to "High", wiring 1312 If the potential of (signal 1402) is set to "High", then the potential of the charge storage unit (FD) (signal 14 04) is initialized to the potential ("High") of wiring 1317, and the reset operation begins. Note that the potential of wiring 1315 (signal 1405) should be pre-charged to "High". .

[0370] At time B, setting the potential of wiring 1311 (signal 1401) to "Low" will reset the circuit. The operation ends and the storage operation begins. At this point, the photoelectric conversion element 1360 has a reverse via. Because a current is applied, the potential (signal 1404) of the charge storage unit (FD) is affected by the reverse current. It begins to decrease. When light is irradiated onto the photoelectric conversion element 1360, the reverse current increases, The rate at which the potential of the charge storage unit (FD) (signal 1404) decreases changes depending on the amount of light irradiated. In other words, depending on the amount of light irradiated onto the photoelectric conversion element 1360, the transistor 135 The channel resistance between the source and drain of 4 changes.

[0371] At time C, setting the potential of wiring 1312 (signal 1402) to "Low" triggers the accumulation operation. The process is completed, and the potential (signal 1404) of the charge storage unit (FD) becomes constant. This is determined by the amount of charge generated by the photoelectric conversion element 1360 during the storage operation. It changes according to the amount of light irradiated onto the conversion element 1360. Also, transistor 135 Transistors 1 and 1353 form an off-current channel formation region in an oxide semiconductor. Because it is composed of transistors with extremely low noise levels, it performs subsequent selection operations (readout operations). Until then, it is possible to maintain a constant potential in the charge storage unit (FD).

[0372] Furthermore, when setting the potential of wiring 1312 (signal 1402) to "Low", wiring 1312 and Due to parasitic capacitance between the charge storage unit (FD) and the other components, the potential of the charge storage unit (FD) changes. This may occur. If the amount of change in the potential is large, the photoelectric conversion element 136 This means that the amount of charge generated by 0 cannot be accurately obtained. To reduce the change in the potential... , the gate electrode-source electrode (or gate electrode-drain electrode) of transistor 1351 ) Reduces inter-electrode capacitance, increases gate capacitance of transistor 1352, charge storage unit (FD ) Effective measures include providing a holding capacity. In this embodiment, these measures The measures taken allow the change in potential to be ignored.

[0373] At time D, when the potential of wiring 1313 (signal 1403) is set to "High", the transistor When terminal 1354 becomes conductive, the selection operation begins, and wiring 1314 and wiring 1315 become transistors It conducts through transistor 1352 and transistor 1354. And the potential of wiring 1315 ( Signal 1405) will decrease. Note that the precharge for wiring 1315 will occur before time D. It's fine to just finish it. Here, the rate at which the potential of wiring 1315 (signal 1405) decreases is, It depends on the current between the source and drain electrodes of transistor 1352. That is, the accumulation It changes according to the amount of light irradiated onto the photoelectric conversion element 1360 during operation.

[0374] At time E, when the potential of wiring 1313 (signal 1403) is set to "Low", the transistor The zista 1354 is shut off and the selection operation ends, and the potential of wiring 1315 (signal 1405) is , becomes a constant value. Here, the value that becomes a constant value is the light that was irradiated onto the photoelectric conversion element 1360. It changes depending on the amount. Therefore, by obtaining the potential of wiring 1315, during the accumulation operation This allows us to determine the amount of light that was irradiated onto the photoelectric conversion element 1360.

[0375] More specifically, if the light irradiating the photoelectric conversion element 1360 is strong, the charge storage unit (F The potential at D), i.e., the gate voltage of transistor 1352, decreases. Therefore, the The current flowing between the source electrode and drain electrode of the zista 1352 becomes small, and wiring 1315 The potential (signal 1405) decreases slowly. Therefore, relatively from wiring 1315 It can read out high potentials.

[0376] Conversely, if the light irradiating the photoelectric conversion element 1360 is weak, the potential of the charge storage unit (FD) Therefore, the gate voltage of transistor 1352 increases. The current flowing between the source electrode and drain electrode of 352 increases, and the potential of wiring 1315 ( Signal 1405) drops rapidly. Therefore, a relatively low potential can be read from wiring 1315. It can be released.

[0377] The configuration shown in this embodiment can be appropriately combined with the configurations shown in other embodiments or examples. It can be used in this way.

[0378] (Embodiment 6) In this embodiment, Figure 30 shows a display device having a semiconductor device according to one aspect of the present invention. We will use this to provide an explanation.

[0379] <6. Circuit configuration of the display device> The display device shown in Figure 30(A) has a region having pixels (hereinafter referred to as the pixel portion 502), A circuit section (hereinafter referred to as "drive") located outside the pixel section 502 and having a circuit for driving the pixels. A circuit section (hereinafter referred to as 504) and a circuit that has a function to protect the element (hereinafter referred to as the protection circuit 506) It has a terminal section 507 and a protective circuit 506.

[0380] Part or all of the drive circuit section 504 is formed on the same substrate as the pixel section 502. This is desirable. This allows for a reduction in the number of components and terminals. Drive circuit section 504 If part or all of it is not formed on the same substrate as the pixel section 502, the drive cycle Part or all of road section 504 is COG or TAB (Tape Automated B It can be implemented by (onding).

[0381] The pixel section 502 is arranged in X rows (where X is a natural number greater than or equal to 2) and Y columns (where Y is a natural number greater than or equal to 2). It has a circuit for driving multiple display elements (hereinafter referred to as the pixel circuit 501), and the drive cycle The path section 504 is a circuit that outputs a signal (scan signal) for selecting pixels (hereinafter referred to as a gate driver). 504a) is used to supply signals (data signals) for driving the pixel display elements. It has a drive circuit such as the circuit (hereinafter referred to as source driver 504b).

[0382] The gate driver 504a has a shift register, etc. The gate driver 504a is A signal to drive the shift register is input via terminal 507, and the signal is output. For example, the gate driver 504a receives input such as a start pulse signal and a clock signal. The gate driver 504a outputs a pulse signal. The scanning signal is applied to the wiring (and It has the function of controlling the potential of the scan lines (referred to as GL_1 to GL_X) below. Multiple drivers 504a are provided, and multiple gate drivers 504a are used to control the scan line GL_1 The path to GL_X may be divided and controlled. Alternatively, the gate driver 504a may use an initialization signal. It has the function of supplying, however, the gate driver 50 4a can also supply another signal.

[0383] The source driver 504b has a shift register, etc. The source driver 504b Through terminal 507, in addition to signals for driving the shift register, the data signals are generated. A signal (image signal) is input. The source driver 504b uses the image signal to create a pixel circuit. It has the function of generating data signals to write to 501. Also, source driver 504b The data signal is transmitted according to the pulse signal obtained by inputting the start pulse, clock signal, etc. It has the function of controlling the output of the number. In addition, the source driver 504b is given a data signal. It has the function of controlling the potential of the wiring (hereinafter referred to as data lines DL_1 to DL_Y). Alternatively, source driver 504b may have the ability to supply initialization signals. However, this is not limited to the source driver 504b, which may also supply other signals. It is possible.

[0384] The source driver 504b is configured using, for example, multiple analog switches. The source driver 504b sequentially turns on multiple analog switches, The image signal can be time-divided and output as a data signal. It can also use shift registers, etc. You may use this to configure source driver 504b.

[0385] Each of the multiple pixel circuits 501 receives a scan signal from one of the multiple scan lines GL. A pulse signal is input via one of several data lines DL to which a data signal is supplied. A data signal is input. In addition, each of the multiple pixel circuits 501 is a gate driver. 504a controls the writing and retention of data in the data signal. For example, m rows and n columns. The pixel circuit 501 of the eye is connected to the gate driver via the scan line GL_m (where m is a natural number less than or equal to X). A pulse signal is input from 504a, and the data line DL_n( A data signal is input from the source driver 504b via n (where n is a natural number less than or equal to Y).

[0386] The protection circuit 506 shown in Figure 30(A) is, for example, a gate driver 504a and a pixel circuit 5 It is connected to scan line GL, which is the wiring between 01. Alternatively, the protection circuit 506 is connected to source driver It is connected to the data line DL, which is the wiring between the light bar 504b and the pixel circuit 501. Alternatively, The protection circuit 506 is connected to the wiring between the gate driver 504a and the terminal section 507. Yes, it is possible. Alternatively, the protection circuit 506 provides a connection between the source driver 504b and the terminal section 507. It can be connected to a wire. The terminal 507 is used to supply power and to the display device from an external circuit. This refers to the part equipped with terminals for inputting control signals and image signals.

[0387] The protection circuit 506, when a potential outside a certain range is applied to the wiring to which it is connected, This is a circuit that creates a conductive state between two wires.

[0388] As shown in Figure 30(A), the pixel section 502 and the drive circuit section 504 each have a protection circuit 50 By providing 6, ESD (Electrostatic Discharge: This can improve the resistance of display devices to overcurrents generated by electrostatic discharge, etc. However, the configuration of the protection circuit 506 is not limited to this, for example, the gate driver 504a Configuration with protection circuit 506 connected, or with protection circuit 506 connected to source driver 504b. This configuration is also possible. Alternatively, a configuration in which the protection circuit 506 is connected to the terminal 507. It can also be done this way.

[0389] Furthermore, in Figure 30(A), the gate driver 504a and the source driver 504b are Therefore, although an example is shown in which the drive circuit section 504 is formed, the configuration is not limited to this. For example, only the gate driver 504a is formed, and a separately prepared source driver circuit is formed. A substrate (for example, a drive circuit substrate formed from a single-crystal semiconductor film or a polycrystalline semiconductor film) is put into practice. It can also be used as a mounting configuration.

[0390] Furthermore, the multiple pixel circuits 501 shown in Figure 30(A) have, for example, the configuration shown in Figure 30(B). It can be done this way.

[0391] The pixel circuit 501 shown in Figure 30(B) consists of a liquid crystal element 570, a transistor 550, and It has a quantitative element 560 and a transistor 550 as shown in the previous embodiment. It can be applied.

[0392] The potential of one of the pair of electrodes of the liquid crystal element 570 is set appropriately according to the specifications of the pixel circuit 501. The orientation state of the liquid crystal element 570 is set according to the data being written to it. A common potential is set on one of the pairs of electrodes of the liquid crystal element 570 that each of the pixel circuits 501 possesses. (Common potential) may be applied. Also, a pair of liquid crystal elements 570 of the pixel circuit 501 in each row One of the electrodes may be given a different potential.

[0393] For example, the driving method for a display device equipped with a liquid crystal element 570 is TN mode, STN mode Code, VA mode, ASM (Axially Symmetric Aligned Motor) icro-cell) mode, OCB (Optically Compensated Birefringence mode, FLC (Ferroelectric Liqu id Crystal) mode, AFLC (AntiFerroelectric Li) quid Crystal) mode, MVA mode, PVA (Patterned Ve (Critical Alignment) mode, IPS mode, FFS mode, or TBA You may also use modes such as (Transverse Bend Alignment). In addition, as a method of driving the display device, there is also ECB (Electric Ally Controlled Birefringence) mode, PDLC (P Olymer Dispersed Liquid Crystal (PNLC) mode, (Polymer Network Liquid Crystal) mode, guest host There are modes such as St Mode. However, this is not limited to these, and various types of liquid crystal elements and their driving methods exist. Various materials can be used.

[0394] In the pixel circuit 501 of row m, column n, the source electrode or drain electrode of transistor 550 One electrode is electrically connected to the data line DL_n, and the other is connected to a pair of liquid crystal elements 570. It is electrically connected to the other electrode. Also, the gate electrode of transistor 550 is connected to the scan line G It is electrically connected to L_m. Transistor 550 can be in an on or off state. This provides a function to control the writing of data to the data signal.

[0395] One of the pair of electrodes of the capacitive element 560 is connected to a wiring to which a potential is supplied (hereinafter referred to as the potential supply line VL). ) is electrically connected to the other end, and the other end is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The potential value of the potential supply line VL is set appropriately according to the specifications of the pixel circuit 501. The capacitive element 560 functions as a holding capacitor to retain the written data.

[0396] For example, in a display device having the pixel circuit 501 shown in Figure 30(B), for example, Figure 30(A) The gate driver 504a shown in the diagram sequentially selects the pixel circuit 501 for each row, and the transistor Turn on 550 to write the data signal.

[0397] When data is written to the pixel circuit 501, the transistor 550 turns off. The image is then held. By performing this process row by row, the image can be displayed.

[0398] Furthermore, the multiple pixel circuits 501 shown in Figure 30(A) can be configured, for example, as shown in Figure 30(C). It can be done this way.

[0399] Furthermore, the pixel circuit 501 shown in Figure 30(C) consists of transistors 552 and 554, and a capacitance element It has a child 562 and a light-emitting element 572. Transistor 552 and transistor 554 The transistors shown in the previous embodiment can be applied to either one or both of them. .

[0400] One of the source and drain electrodes of transistor 552 is supplied with a data signal. It is electrically connected to the wiring (hereinafter referred to as data line DL_n). Furthermore, transistor 5 The gate electrode of 52 is connected to the wiring to which the gate signal is applied (hereinafter referred to as scan line GL_m). They are connected by air.

[0401] Transistor 552, by being either on or off, controls the data signal. It has a function to control the writing of data.

[0402] One of the pair of electrodes of the capacitive element 562 is connected to a wiring to which a potential is supplied (hereinafter referred to as the potential supply line VL). It is electrically connected to (a), and the other is the source electrode and drain of transistor 552. It is electrically connected to the other electrode.

[0403] The capacitive element 562 functions as a holding capacitor to retain the written data.

[0404] One of the source and drain electrodes of transistor 554 is connected to the potential supply line VL_a. They are electrically connected. Furthermore, the gate electrode of transistor 554 is connected to the gate electrode of transistor 552. It is electrically connected to the other of the source electrode and drain electrode.

[0405] One of the light-emitting element 572, either the anode or the cathode, is electrically connected to the potential supply line VL_b. The other end is electrically connected to the source and drain electrodes of transistor 554. It will be done.

[0406] Examples of light-emitting elements 572 include organic electroluminescent elements (also known as organic EL elements). (For example) can be used. However, the light-emitting element 572 is not limited to this. Inorganic EL elements made of inorganic materials may also be used.

[0407] Furthermore, a high power supply potential VDD is supplied to one of the potential supply lines VL_a and VL_b. On the other hand, a low power supply potential VSS is applied.

[0408] In a display device having the pixel circuit 501 shown in Figure 30(C), for example, the ge shown in Figure 30(A) The driver 504a sequentially selects the pixel circuit 501 for each row, and the transistor 552 Turn it on and write the data signal.

[0409] When data is written to the pixel circuit 501, the transistor 552 turns off. It enters a holding state. Furthermore, in accordance with the potential of the written data signal, transistor 554 The amount of current flowing between the source electrode and the drain electrode is controlled, and the light-emitting element 572 controls the amount of current flowing through it. It emits light with brightness corresponding to the flow rate. By performing this sequentially for each row, an image can be displayed.

[0410] The configuration shown in this embodiment can be appropriately combined with the configurations shown in other embodiments or examples. It can be used.

[0411] (Embodiment 7) In this embodiment, a display module and electronic device having a semiconductor device according to one aspect of the present invention are provided. This will be explained using Figures 31 and 32.

[0412] <7-1. Display Module> The display module 8000 shown in Figure 31 consists of an upper cover 8001 and a lower cover 8002. In between, the touch panel 8004 connected to the FPC8003 and the FPC8005 are connected. Display panel 8006, backlight 8007, frame 8009, printed circuit board 801 0, has battery 8011.

[0413] A semiconductor device according to one aspect of the present invention can be used, for example, as a display panel 8006.

[0414] The upper cover 8001 and the lower cover 8002 are the touch panel 8004 and the display panel. The shape and dimensions can be appropriately modified to match the size of the 8006.

[0415] The touch panel 8004 is a display panel using either a resistive or capacitive touch panel. It can be used superimposed on 8006. Also, the opposing substrate (sealing substrate) of the display panel 8006 It is also possible to give the board a touch panel function. It is also possible to install a light sensor in each pixel of 006 to create an optical touch panel.

[0416] The backlight 8007 has a light source 8008. Note that in Figure 31, the backlight The example given shows a configuration in which the light source 8008 is placed on the T8007, but it is not limited to this. For example, a light source 8008 is placed at the edge of the backlight 8007, and a light diffuser plate is also used. It may also be made into a component. Furthermore, when using self-emissive light-emitting elements such as organic EL elements, or when using reflection In the case of type panels, etc., a configuration without backlight 8007 is also acceptable.

[0417] Frame 8009 provides protection for the display panel 8006, as well as the movement of the printed circuit board 8010. It has the function of an electromagnetic shield to block electromagnetic waves generated by the operation. The 8009 may also function as a heat sink.

[0418] The printed circuit board 8010 contains power supply circuits and signals for outputting video and clock signals. It has a power processing circuit. The power supply that provides power to the power supply circuit is an external commercial power supply. Alternatively, a separate power source, the battery 8011, may also be used. This can be omitted when using commercial power.

[0419] Furthermore, the display module 8000 includes components such as polarizing plates, phase difference plates, and prism sheets. They may also be provided.

[0420] <7-2.Electronic equipment> Figures 32(A) to 32(G) show electronic devices. These electronic devices are enclosed in a housing. Body 9000, display unit 9001, speaker 9003, operation keys 9005 (power switch, or (including the operating switch), connection terminal 9006, sensor 9007 (force, displacement, position, velocity, Acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electricity To measure fields, currents, voltages, power, radiation, flow rates, humidity, gradients, vibrations, odors, or infrared radiation. It may have a microphone 9008 (including functions), etc.

[0421] The electronic devices shown in Figures 32(A) to 32(G) can have a variety of functions. For example, a function that displays various information (still images, videos, text images, etc.) on the display unit, Panel function, calendar, date or time display function, various software ( The program controls processing, provides wireless communication, and uses wireless communication to perform various tasks. Features include the ability to connect to computer networks and transmit various types of data using wireless communication. Alternatively, it can perform receiving functions, or read programs or data recorded on a recording medium and display them. It can have a function to display on the display unit, etc. Note that Figures 32(A) to 32(G) The functions that the electronic devices shown may have are not limited to these, and may have a variety of functions. This is possible. Also, although not shown in Figures 32(A) to 32(G), electronic devices include: The configuration may have multiple display units. Furthermore, the electronic device may be equipped with a camera or the like to capture still images. Functions for taking photos, recording videos, and recording images on a storage medium (external or built into the camera). It may also have a function to save the image to the display unit, a function to display the captured image on the display unit, etc.

[0422] Details of the electronic equipment shown in Figures 32(A) to 32(G) will be explained below.

[0423] Figure 32(A) is a perspective view showing the television equipment 9100. 100 is, for example, a large screen display unit 9001 of 50 inches or more, or 100 inches or more. It is possible to incorporate it.

[0424] Figure 32(B) is a perspective view showing the personal digital assistant 9101. The personal digital assistant 9101 is It has one or more functions selected from, for example, a telephone, a notebook, or an information viewing device. Physically, it can be used as a smartphone. Furthermore, the mobile information terminal 9101 is... Speakers, connection terminals, sensors, etc. may be provided. Also, the portable information terminal 9101 may display text and Image information can be displayed on multiple surfaces. For example, three operation buttons 9050( An operation icon (also called simply an icon) may be displayed on one side of the display unit 9001. Yes, it is possible. Furthermore, the information 9051, indicated by the dashed rectangle, can be displayed on another surface of the display unit 9001. This is possible. For example, information 9051 can be transmitted via email or SNS (Social Networking Services). A display that notifies you of incoming calls (such as twerking services) and phone calls, as well as emails and social media messages. Subject, sender name (email, social media, etc.), date, time, battery level, antenna reception. This includes the strength of the information. Alternatively, in the position where information 9051 is displayed, a substitute for information 9051 may be displayed. Alternatively, you may display operation buttons such as 9050.

[0425] Figure 32(C) is a perspective view showing the personal digital assistant 9102. The personal digital assistant 9102 is The display unit 9001 has the function of displaying information on three or more sides. Here, information 9052, This shows an example where information 9053 and information 9054 are displayed on different sides. For example, The user of the mobile information terminal 9102 stores the mobile information terminal 9102 in the breast pocket of their clothing. In this state, you can check the display (information 9053 in this case). Specifically, when an incoming call is received... The phone number or name of the caller can be observed from above the mobile information terminal 9102. The information is displayed on the device. The user can view the information without taking the portable information terminal 9102 out of their pocket. This allows you to check and decide whether or not to answer the call.

[0426] Figure 32(D) is a perspective view showing the wristwatch-type personal information terminal 9200. Personal information terminal The 9200 is a mobile phone, email, document viewing and creation, music playback, and internet communication. It can run various applications such as computer games. The display unit 9001 has a curved display surface, and displays are performed along the curved display surface. It can do this. Furthermore, the personal information terminal 9200 can perform standardized short-range wireless communication. This is possible. For example, by communicating with a wireless headset, It is also possible to make calls using the free-call function. In addition, the mobile information terminal 9200 has a connection terminal 9006. It has the capability to directly exchange data with other information terminals via a connector. Charging can also be performed via connection terminal 9006. Note that the charging operation is performed via connection terminal 900 This may also be done by wireless power transfer without using 6.

[0427] Figures 32(E),(F), and(G) are perspective views showing a foldable portable information terminal 9201. Furthermore, Figure 32(E) is a perspective view of the mobile information terminal 9201 in an unfolded state, and Figure 32 (F) changes the mobile information terminal 9201 from one state to the other, either unfolded or folded. This is a perspective view of the device in the process of being folded, with Figure 32(G) showing the portable information terminal 9201 in its folded state. This is a perspective view of the device. The 9201 portable information terminal offers excellent portability when folded, and when unfolded... In this configuration, the seamless, wide display area provides excellent readability. (Portable Information Terminal 92) The display unit 9001 of 01 is connected by three housings 9000 via a hinge 9055. It is supported by bending the two housings 9000 via the hinge 9055. Furthermore, the mobile information terminal 9201 can be reversibly transformed from an unfolded state to a folded state. This is possible. For example, the mobile information terminal 9201 can bend with a radius of curvature of 1 mm or more and 150 mm or less. It is possible to do so.

[0428] The electronic device described in this embodiment has a display unit for displaying some kind of information. It is characterized by having the following characteristics. However, one embodiment of the present invention is an electronic device that does not have a display unit. It can also be applied to containers.

[0429] The configuration shown in this embodiment can be appropriately combined with the configurations shown in other embodiments or examples. It can be used. [Examples]

[0430] In this embodiment, a transistor according to one aspect of the present invention is fabricated, and the power of the transistor We measured the atmospheric properties and observed the cross-sectional shape.

[0431] In this example, sample A1 was prepared. First, regarding the preparation method of sample A1... The following explanation will be given. Sample A1 is the transistor 100C shown in Figure 7(A)(B). This is a sample on which the corresponding transistor is formed. In the following explanation, Figure 7(A) For configurations similar to those of transistor 100C shown in (B), the same symbols are used. We will explain using this method.

[0432] <1-1. Method for preparing sample A1> First, a substrate 102 was prepared. A glass substrate was used for substrate 102. Next, the substrate A conductive film 106 was formed on 102. The conductive film 106 was made of tungsten with a thickness of 100 nm. The tin film was formed using a sputtering apparatus.

[0433] Next, an insulating film 104 was formed on the substrate 102 and the conductive film 106. For example, insulating film 104 consists of insulating film 104_1, insulating film 104_2, and insulating film 104 _3 and insulating film 104_4 (not shown in Figures 7(A) and 7(B)) are sequentially mounted using PECVD. The film was formed continuously in a vacuum using a device. The insulating film 104_1 had a thickness of 50n. A silicon nitride film of thickness m was used. In addition, as the insulating film 104_2, a silicon nitride film with a thickness of 300 nm was used. A silicon nitride film was used. Furthermore, the insulating film 104_3 was a silicon nitride film with a thickness of 50 nm. Furthermore, the insulating film 104_4 was a silicon oxide nitride film with a thickness of 50 nm.

[0434] Next, an oxide semiconductor film is formed on the insulating film 104, and the oxide semiconductor film is processed into an island shape. By doing so, an oxide semiconductor film 108 was formed. The oxide semiconductor film 108 had a thickness of 40 An oxide semiconductor film of nm size was formed. Note that the oxide semiconductor film 108 was sputtering. Using a sputtering apparatus, metal oxides with an atomic ratio of In:Ga:Zn = 1:1:1.2 are sputtered. A ring target is used, and an AC power supply is used as the power supply applied to the sputtering target. It was formed using the following method. Furthermore, a wet etching method was used for processing the oxide semiconductor film 108. Ta.

[0435] Next, an insulating film, which will later become the insulating film 110, is applied to the insulating film 104 and the oxide semiconductor film 108. The insulating film was formed. The insulating film consisted of a silicon oxide nitride film with a thickness of 10 nm and a film with a thickness of 90 nm. A silicon oxide nitride film was continuously formed in a vacuum using a PECVD apparatus.

[0436] Next, heat treatment was performed. This heat treatment involved 3 [units of gas] under a mixed gas atmosphere of nitrogen and oxygen. The treatment involved heat treatment at 50°C for 1 hour.

[0437] Next, an oxide semiconductor film is formed on an insulating film, and the oxide semiconductor film is processed into an island shape. Then, the oxide semiconductor film 112 was formed. Furthermore, after forming the oxide semiconductor film 112, The insulating film 110 was formed by processing an insulating film that is in contact with the underside of the oxide semiconductor film 112. .

[0438] Furthermore, a wet etching method is used for processing the oxide semiconductor film 112, and the insulating film 110 Dry etching was used for the processing.

[0439] Next, insulating film 104, oxide semiconductor film 108, insulating film 110, and oxide semiconductor film 11 2. An impurity element was added from above. The impurity element addition treatment was a doping treatment. A specific method was used, and argon was used as the impurity element.

[0440] Next, insulating film 104, oxide semiconductor film 108, insulating film 110, and oxide semiconductor film 11 An insulating film 116 was formed on 2. The insulating film 116 was made of silicon nitride with a thickness of 100 nm. The film was formed using a PECVD apparatus.

[0441] Next, an insulating film 118 was formed on the insulating film 116. The insulating film 118 had a thickness of 300. A silicon oxidoxide film of nm thickness was formed using a PECVD apparatus.

[0442] Next, a mask is formed on the insulating film 118, and the insulating films 116 and 118 are then processed using this mask. Openings 141a and 141b were formed. Note that the openings 141a and 141b were processed using a drill. A lye etching apparatus was used.

[0443] Next, an insulating film 122 was formed on the insulating film 118. The insulating film 122 had a thickness of 1.5 A μm acrylic photosensitive resin film was used. The insulating film 122 was defined as the opening 141 An opening was created in the region that overlaps with a and 141b.

[0444] Next, a conductive film is formed on the insulating film 122 so as to fill the openings 141a and 141b. Conductive films 120a and 120b were formed by processing the conductive film into island-like structures.

[0445] The conductive films 120a and 120b consist of a titanium film with a thickness of 50 nm and an aluminum film with a thickness of 400 nm. A luminium film and a 100 nm thick titanium film are joined together in a vacuum using a sputtering device. It was subsequently formed.

[0446] Through the above process, the transistor corresponding to transistor 100C shown in Figures 7(A) and 7(B) I created a st.

[0447] In this embodiment, the transistor corresponding to transistor 100C is, The channel width W is set to 50 μm, and the channel length L is set to 1.5 μm, 2.0 μm, and 3.0 μm. Twenty transistors of each channel width L were formed on the substrate.

[0448] <1-2. Electrical Characteristics of Transistors> Figures 33(A), (B), and (C) show the drain of the transistor of sample A1 fabricated in this embodiment. The current-gate voltage (Id-Vg) characteristic results are shown.

[0449] Note that Figure 33(A) shows the characteristic results for a W / L = 50 μm / 1.5 μm size, and Figure 3 Figure 3(B) shows the characteristic results for a W / L = 50 μm / 2.0 μm size, and Figure 33(C) shows... These are the characteristic results for W / L = 50 μm / 3.0 μm size. Also, see Figure 33(A)(B)(C) In this graph, the first vertical axis represents Id[A] and the second vertical axis represents the field effect mobility (μFE[cm]). 2 / V The horizontal axis represents Vg[V], and the horizontal axis represents Vg[V].

[0450] The measurement conditions for the Id-Vg characteristics of the transistor are as follows: The voltage applied to the conductive film 106, which functions as a gate electrode (hereinafter also referred to as gate voltage (Vg)). ), and the voltage applied to the oxide semiconductor film 112 which functions as the second gate electrode (hereinafter, The back gate voltage (also called Vbg) ranges from -15V to +20V, with a range of 0.25V. The voltage was applied in the following steps. Also, the voltage applied to the conductive film 120a, which functions as the source electrode. The source voltage (Vs) is set to 0V (comm), and the drain electrode is set to... The voltage applied to the conductive film 120b (hereinafter also referred to as the drain voltage (Vd)) is set to 1V And 10V was used. However, for transistors with W / L = 50μm / 1.5μm size Therefore, Vg and Vbg were set to range from -15V to +15V.

[0451] As shown in Figures 33(A), (B), and (C), the sample A1 prepared in this embodiment has a channel length The good electrical properties were demonstrated regardless of the length of (L).

[0452] Next, we will observe the cross-section of the W / L = 50 μm / 2.0 μm size transistor fabricated as described above. The cross-sectional view of the transistor was observed. The results of the cross-sectional observation of the transistor are shown in Figures 34(A) and 34(B). As a guess, it is a transmission electron microscope (TEM). A microscope was used.

[0453] Furthermore, Figure 34(A) corresponds to the cross-section in the direction of the dashed line X1-X2 shown in Figure 7(A), 34(B) corresponds to the cross-section in the direction of the dashed line Y1-Y2 shown in Figure 7(A).

[0454] As shown in Figures 34(A) and 34(B), sample A1 prepared in this embodiment has a good cross-sectional shape. there were.

[0455] The configurations and methods described in this embodiment are not applicable to the configurations and methods shown in other embodiments or models. It can be used in appropriate combination with laws and regulations. [Examples]

[0456] In this embodiment, a transistor corresponding to transistor 100A shown in Figure 3 was fabricated. The evaluation was conducted. The evaluation included the electrical characteristics of the transistor, and the transistor itself. This was used as a reliability test.

[0457] Furthermore, in this embodiment, the transistor corresponding to transistor 100A shown in Figure 3 is... Samples B1 to B3 were prepared as samples in which the following was formed. The transistor size of sample B1 The channel length L is 3 μm and the channel width W is 50 μm, and the transistor size of sample B2 is set. The transistor sample B3 was set to have a channel length L of 2 μm and a channel width W of 50 μm. For this test, the channel length L was set to 1.5 μm and the channel width W to 3 μm.

[0458] Sample C, which has a comparative transistor 300A formed on it, was created for comparison with sample B1. Transistor 1 was fabricated. The structure of the comparative transistor 300A is shown in Figures 35(A), (B), and (C). vinegar.

[0459] While transistor 100A shown in Figure 3 has a staggered transistor structure, The 300A transistor used has an inverse staggered transistor structure.

[0460] Figure 35(A) is a top view of transistor 300A, and Figure 35(B) is a top view of transistor 300A. This corresponds to a cross-sectional view of the section between the dashed line X1 and X2 shown in Figure 3, and Figure 35(C) is the same as Figure 3 This corresponds to the cross-sectional view of the section between Y1 and Y2 shown by the dashed line Y1-Y2 in 5(A).

[0461] The transistor 300A functions as the first gate electrode on the substrate 302, via a conductive film 30 4, the insulating film 306 on the substrate 302 and the conductive film 304, and the insulating film 307 on the insulating film 306 The oxide semiconductor film 308 on the insulating film 307 and the oxide semiconductor film 308 are electrically connected The conductive film 312a, which functions as a source electrode, is electrically connected to the oxide semiconductor film 308. A conductive film 312b that functions as a drain electrode, an oxide semiconductor film 308, and a conductive Insulating film 314 on films 312a and 312b, insulating film 316 on insulating film 314, insulating film 3 It has an insulating film 318 on 16 and a conductive film 320 on the insulating film 318. The conductive film 308 consists of an oxide semiconductor film 308_2 and an oxide semiconductor film on the oxide semiconductor film 308_2. A laminated structure with conductive film 308_3 was adopted.

[0462] Furthermore, in transistor 300A, insulating films 314, 316, and 318 are second gates It functions as an insulating film.

[0463] Furthermore, in transistor 300A, the conductive film 320 is the second gate electrode (backgate It functions as an electrode (also called a galvanic electrode). Note that, as shown in Figure 35(C), the conductive film 320 is an insulating film. Openings 341 provided in the edge films 306 and 307, and provided in the insulating films 314, 316, and 318 In the opening 342, a conductive film 312c is used to function as the first gate electrode. It is connected to the conductive film 304. Therefore, the conductive film 320 and the conductive film 304 are given the same potential. It can be obtained. Furthermore, transistor 300A has the S-channel structure described earlier. .

[0464] Furthermore, the transistor size of sample C1 is a channel length L of 3 μm and a channel width W of 50 The size was set to μm. In this example, samples B1 to B3 and sample C1 were respectively This formed 10 transistors.

[0465] <2-1. Method for preparing samples B1 to B3> The preparation methods for samples B1 to B3 used in this embodiment will be described below. In the explanation, the configuration of transistor 100A shown in Figures 3(A) and 3(B) is similar to that of transistor 100A. The configuration will be explained using the same symbols.

[0466] First, a substrate 102 was prepared. A glass substrate was used for substrate 102. Next, the substrate A conductive film 106 was formed on 102. The conductive film 106 was made of tungsten with a thickness of 100 nm. The tin film was formed using a sputtering apparatus.

[0467] Next, an insulating film 104 was formed on the substrate 102 and the conductive film 106. For example, insulating film 104 consists of insulating film 104_1, insulating film 104_2, and insulating film 104 _3 and insulating film 104_4 are formed sequentially in a vacuum using a PECVD apparatus. Furthermore, the insulating film 104_1 was a silicon nitride film with a thickness of 50 nm. The border film 104_2 was a silicon nitride film with a thickness of 300 nm. Also, insulating film 104 For _3, a silicon nitride film with a thickness of 50 nm was used. Also, for insulating film 104_4, A silicon oxide-nitride film with a thickness of 50 nm was used.

[0468] Next, an oxide semiconductor film is formed on the insulating film 104, and the oxide semiconductor film is processed into an island shape. By doing so, an oxide semiconductor film 108 was formed. The oxide semiconductor film 108 had a thickness of 40 An oxide semiconductor film of nm size was formed. Note that the oxide semiconductor film 108 was sputtering. Using a sputtering apparatus, metal oxides with an atomic ratio of In:Ga:Zn = 4:2:4.1 are sputtered. A ring target is used, and an AC power supply is used as the power supply applied to the sputtering target. It was formed using the following method. Furthermore, a wet etching method was used for processing the oxide semiconductor film 108. Ta.

[0469] Next, an insulating film, which will later become the insulating film 110, is applied to the insulating film 104 and the oxide semiconductor film 108. The insulating film was formed using a silicon oxide-nitride film with a thickness of 30 nm and a silicon oxide-nitride film with a thickness of 100 nm. Using a PECVD apparatus, a silicon oxide nitride film and a silicon oxide nitride film with a thickness of 20 nm are used. It was then continuously formed in a vacuum.

[0470] Next, heat treatment was performed. This heat treatment involved heating at 350°C for 1 hour under a nitrogen atmosphere. It was processed.

[0471] Next, an opening 143 was formed. Dry etching was used to process the opening 143. Ta.

[0472] Next, an oxide semiconductor film is formed on an insulating film, and the oxide semiconductor film is processed into an island shape. Then, an oxide semiconductor film 112 was formed. The oxide semiconductor film 112 had a thickness of 100 nm. The oxide semiconductor film was used. The composition of the oxide semiconductor film 112 was as described above. The same material as the semiconductor film 108 was used. After forming the oxide semiconductor film 112, the insulating film was subsequently formed. By processing this material, island-shaped insulating films 110 were formed.

[0473] Furthermore, a wet etching method is used for processing the oxide semiconductor film 112, and the insulating film 110 Dry etching was used for the processing.

[0474] Next, insulating film 104, oxide semiconductor film 108, insulating film 110, and oxide semiconductor film 11 2. An impurity element was added from above. The impurity element addition treatment was a doping treatment. A specific method was used, and argon was used as the impurity element.

[0475] Next, insulating film 1 is placed on insulating film 104, oxide semiconductor film 108, and oxide semiconductor film 112. 16 was formed. As the insulating film 116, a silicon nitride film with a thickness of 100 nm was used, PECV Formed using apparatus D.

[0476] Next, an insulating film 118 was formed on the insulating film 116. The insulating film 118 had a thickness of 300. A silicon oxidoxide film of nm thickness was formed using a PECVD apparatus.

[0477] Next, a mask is formed on the insulating film 118, and the insulating films 116 and 118 are then processed using this mask. Openings 141a and 141b were formed. Note that the openings 141a and 141b were processed using a drill. A lye etching apparatus was used.

[0478] Next, a conductive film is formed on the insulating film 118 to fill the openings 141a and 141b. Conductive films 120a and 120b were formed by processing the conductive film into island-like structures.

[0479] The conductive films 120a and 120b consist of a titanium film with a thickness of 50 nm and an aluminum film with a thickness of 400 nm. A luminium film and a 100 nm thick titanium film are joined together in a vacuum using a sputtering device. It was subsequently formed.

[0480] Next, heat treatment was performed. This heat treatment involved heating at 250°C for 1 hour under a nitrogen atmosphere. It was processed.

[0481] Samples B1 to B3 were prepared using the above process.

[0482] <2-2. Method for preparing sample C1> Next, the method for preparing sample C1 used in this embodiment will be described below.

[0483] First, a substrate 302 was prepared. A glass substrate was used for substrate 302. Next, the substrate A conductive film 304 was formed on 302. The conductive film 304 was made of tungsten with a thickness of 100 nm. The tin film was formed using a sputtering apparatus.

[0484] Next, insulating films 306 and 307 were formed on the substrate 302 and the conductive film 304. In this embodiment, the insulating film 306 consists of a first insulating film, a second insulating film, and a third insulating film. The first insulating film and the first insulating film were formed sequentially in a vacuum using a PECVD apparatus. For the first layer, a silicon nitride film with a thickness of 50 nm was used. Furthermore, a second insulating film with a thickness of 30 nm was used. A silicon nitride film with a thickness of 0 nm was used. In addition, a silicon nitride film with a thickness of 50 nm was used as the third insulating film. The film was made of silicon oxide nitride with a thickness of 50 nm. In addition, the insulating film 307 was made of silicon oxide nitride with a thickness of 50 nm. .

[0485] Next, an oxide semiconductor film is formed on the insulating film 307, and the oxide semiconductor film is processed into an island shape. By doing so, an oxide semiconductor film 308 was formed. The oxide semiconductor film 308 had a thickness of 10 The intersection of an oxide semiconductor film 308_2 with a thickness of nm and an oxide semiconductor film 308_3 with a thickness of 15 nm. A layered structure was adopted. The oxide semiconductor film 308_2 was produced using a sputtering apparatus. A metal oxide with an atomic ratio of In:Ga:Zn = 4:2:4.1 is used as a sputtering target. The sputtering target was formed using an AC power supply as the power source applied to the sputtering target. Furthermore, the oxide semiconductor film 308_3 was prepared using a sputtering apparatus, In:Ga: A metal oxide with an atomic ratio of Zn = 1:1:1.2 is used as the sputtering target, and the The puttering target was formed using an AC power supply. The semiconductor film 308 was processed using a wet etching method.

[0486] Next, an opening 341 was formed in the insulating film 306 and the insulating film 307. This was processed using a dry etching apparatus.

[0487] Next, a conductive film is formed on the insulating film 307 and the oxide semiconductor film 308, and the conductive film is formed into an island Conductive films 312a and 312b were formed by processing them into a certain shape. For 312c, a tungsten film with a thickness of 50 nm is produced using a sputtering apparatus. A 400nm thick aluminum film and a 100nm thick titanium film were layered in sequence.

[0488] Next, the surface (back channel side) of the oxide semiconductor film 308 was cleaned. This involves using a spin washing device to dilute phosphoric acid (at a concentration of 85 vol%) with water to 1 / 100. A phosphoric acid aqueous solution was applied to the oxide semiconductor film 308 and the conductive films 312a and 312b. The washing time was set at 15 seconds.

[0489] Next, insulating films 314, 312a, 312b are placed on oxide semiconductor film 308 and conductive films 312a, 312b. 6 was formed. As the insulating film 314, a silicon oxide nitride film with a thickness of 40 nm was used, PECV It was formed using apparatus D. In addition, the insulating film 316 was made of silica oxide nitride with a thickness of 400 nm. The film was formed using a PECVD apparatus.

[0490] Next, heat treatment was performed. This heat treatment involved heating at 350°C for 1 hour under a nitrogen atmosphere. It was processed.

[0491] Next, a 5 nm thick ITSO film is formed on the insulating film 316 using a sputtering apparatus. It was done. Subsequently, an oxide semiconductor film 308 and an insulating film 306, 30 were formed via the ITSO film. Oxygenation treatment was performed on 7. This oxygenation treatment was carried out using an ashing device, and the substrate temperature was controlled. The temperature is set to 40°C, oxygen gas is introduced into the chamber at a flow rate of 250 sccm, and the pressure is set to 15 Pa. Therefore, a bias is applied to the substrate side, and parallel flat plates are installed inside the ashing device. The test was conducted by supplying 4500W of RF power between the electrodes for 120 seconds.

[0492] Next, the ITSO film was removed to expose the insulating film 316. This was done using a wet etching apparatus with a 5% oxalic acid aqueous solution for 300 seconds. After etching, use 0.5% hydrofluoric acid for 15 seconds. We performed the action.

[0493] Next, an insulating film 318 was formed on the insulating film 316. The insulating film 318 had a thickness of 100 A silicon nitride film with a thickness of nm was formed using a PECVD apparatus.

[0494] Next, an opening 342 reaching the conductive film 312c was formed. As for the opening 342, The processing was performed using an etching apparatus.

[0495] Next, the conductive film 312c and insulating film 318 are positioned at desired locations so as to cover the opening 342. A conductive film 320 was formed by creating a conductive film. The conductive film 320 had a thickness of 100. An ITSO film with a thickness of nm was formed using a sputtering apparatus.

[0496] Next, heat treatment was performed. This heat treatment involved heating at 250°C for 1 hour under a nitrogen atmosphere. .

[0497] A comparative sample C1 was prepared using the above procedure.

[0498] <2-3. Electrical Characteristics of Transistors> The drain current-gate voltage (Id) of the transistors of samples B1 to B3 prepared above. The Id-Vg characteristics and the Id-Vg characteristics of the transistor of sample C1 are shown in Figures 36 to 40. As shown below. Note that Figure 36 shows the characteristics of the transistor of sample B1, and Figure 37 shows the characteristics of sample B2. These are the characteristics of the transistor, and Figure 38 shows the characteristics of the transistor of sample B3. Figure 39 shows the transistor characteristics of sample B1, and Figure 40 shows the transistor characteristics of sample C1. These are the characteristic results. Note that Figure 39 shows the Id-Vg characteristic results shown in Figure 36, with the field effect transfer. This is a diagram showing the movement overlaid on top of each other. Also, in Figures 36 to 40, a total of 10 tra The data from each device is shown overlaid on top of each other.

[0499] In Figures 36 to 38, the vertical axis represents Id[A] and the horizontal axis represents Vg[V]. Furthermore, in Figures 39 and 40, the first vertical axis represents Id[A] and the second vertical axis represents the field effect transfer. degree(μFE[cm 2 The horizontal axis represents Vg[V], while the horizontal axis represents Vg[V].

[0500] Furthermore, in sample B1, the measurement conditions for the transistor's Id-Vg characteristics were as follows: The voltage applied to the conductive film 106 which functions as the first gate electrode of the ZISTA (hereinafter referred to as backgear) The oxide semiconductor film 1 functions as the gate voltage (also called Vbg) and the second gate electrode. The voltage applied to 12 (hereinafter also called the gate voltage (Vg)) is from -15V to +2 The voltage was applied in 0.25V steps down to 0V. Also, in sample B2, the I of the transistor The measurement conditions for the d-Vg characteristics are the back gate voltage (Vbg) and the gate voltage (Vg For the voltage applied, it was applied in 0.25V steps from -15V to +15V. Also, for sample B In step 3, the measurement conditions for the Id-Vg characteristics of the transistor are: back gate voltage (V The bg) and gate voltage (Vg) range from -15V to +10V with a 0.25V difference. The voltage was applied using a pinch. Furthermore, the measurement conditions for the Id-Vg characteristics of the transistor in sample C1 were as follows: Therefore, the voltage applied to the conductive film 304 which functions as the first gate electrode of the transistor ( The gate voltage (Vg), and the conductive film 32 which functions as the second gate electrode of the transistor. The voltage applied to 0 (back gate voltage (Vbg)) is between -15V and +15V. The voltage was applied in 0.25V steps.

[0501] In samples B1 to B3 and sample C1, the conductive film (conductive film) functions as the source electrode. The voltage applied to 120a, or conductive film 312a (hereinafter also referred to as the source voltage (Vs)) ) is set to 0V (comm), and the conductive film (conductive film 120b, which functions as the drain electrode, The voltage applied to the conductive film 312b (hereinafter also called the drain voltage (Vd)) is set to 0.1 The voltages were set to V and 20V.

[0502] As shown in Figures 36 to 38, the transistor according to one aspect of the present invention has a channel length of 1 Even when shortened to 0.5 μm, it remained normally off. Furthermore, it exhibited little variation within the substrate surface. The result was confirmed.

[0503] As shown in Figures 39 and 40, both transistors of sample B1 and sample C1 exhibited an electric field. Effective movement range: 30cm 2 It exceeds / Vs. However, this is when comparing sample B1 and sample C1. Sample B1, which is one embodiment of the present invention, showed a higher field-effect mobility.

[0504] <2-5. Constant Current Stress Test> Next, a constant current stress test was performed on the prepared samples B1 and C1. The constant current stress test was conducted in a dark environment under atmospheric conditions.

[0505] Note that the Id-Vg characteristics were measured with drain voltages of 0.1V and 10V, and the gate voltage This was performed by measuring the drain current when the voltage was swept from -15V to 15V.

[0506] In the constant current stress test of sample B1, the substrate temperature was first set to room temperature, and the first Id-V was measured. g-characteristics and Id-Vd characteristics were measured. After that, the substrate temperature was set to 60°C, and the source With the potential set to ground potential (GND), the drain potential to 10V, and the gate potential to 1.88V, 48 The data was held for a set time. Subsequently, the Id-Vg and Id-Vd characteristics were measured a second time.

[0507] Furthermore, in the constant current stress test of sample C1, the substrate temperature was first set to room temperature, and the first I The d-Vg and Id-Vd characteristics were measured. Then, the substrate temperature was set to 60°C. The source potential is set to ground potential (GND), the drain potential to 10V, and the gate potential to 1.99V. The samples were held for 24 hours. Subsequently, the Id-Vg and Id-Vd characteristics were measured a second time. .

[0508] Figures 41(A),(B), and(C) show the results of the constant current stress test for samples B1 and C1. Figure 41(A) shows the drain current as a function of stress time for samples B1 and C1. This figure illustrates the rate of change of Id). Figure 41(B) shows sample B1 before the stress test. The subsequent Id-Vg characteristic results are shown in Figure 41(C), which shows the Id-Vg characteristics of sample B1 before and after the stress test. This is the Vd characteristic result.

[0509] In Figure 41(A), the black solid line represents the measurement results for sample B1, and the gray solid line represents the results for sample B1. This shows the measurement results for sample C1. In Figure 41(B), the solid line represents the state before the stress test, and the dashed line represents the state before the stress test. This shows the Id-Vg characteristics after the stress test. Also, in Figure 41(C), the solid line represents the stress test. Before the stress test, the dashed line represents the Id-Vd characteristic result after the stress test.

[0510] From Figure 41(A),(B),(C), sample B1 of one embodiment of the present invention is shown to be before and after the stress test. It can be seen that the change in drain current is small. From the above, one aspect of the present invention Semiconductor devices with stas have been shown to be highly reliable.

[0511] The configurations and methods described in this embodiment are not applicable to the configurations and methods shown in other embodiments or models. It can be used in appropriate combination with laws and regulations. [Examples]

[0512] In this embodiment, a sample D1 on which a transistor according to one aspect of the present invention is formed is prepared. The cross-sectional shape of sample D1 was observed.

[0513] <3-1. Cross-sectional observation> Note that sample D1 corresponds to transistor 100A shown in Figure 3. A planarizing insulating film was formed. The transistor size of sample D1 is defined as follows: The channel size was set to L = 2 μm and channel width W = 50 μm.

[0514] Regarding the structure of sample D1, using the symbols of transistor 100A shown in Figure 3, the following explanation is provided. I will reveal it.

[0515] As the conductive film 106, a tantalum nitride film with a thickness of 10 nm was formed using a sputtering apparatus. A laminated film was formed with a copper film with a thickness of 100 nm. In addition, PECVD was used as the insulating film 104. Using the apparatus, a silicon nitride film with a thickness of 400 nm and a silicon oxide nitride film with a thickness of 50 nm were produced. A film was formed. In addition, as the oxide semiconductor film 108, a 40 nm thick In-Ga-Z film was formed. An in-Ga-Zn oxide was formed. The in-Ga-Zn oxide was produced using a sputtering apparatus. Using this method, metal oxides with an atomic ratio of In:Ga:Zn = 1:1:1.2 are sputtered. The target is to be used, and an AC power supply is used as the power supply applied to the sputtering target. It was formed. In addition, as the insulating film 110, a 100 nm thick oxide film was formed using a PECVD apparatus. A silicon nitride film was formed. Furthermore, as an oxide semiconductor film 112, a sputtering apparatus was used. Using this, an In-Ga-Zn oxide with a thickness of 100 nm was formed. As for the Zn oxide, a sputtering apparatus was used, and In:Ga:Zn=4:2:4.1[ A metal oxide of [atomic ratio] is used as the sputtering target, and the sputtering target An AC power supply was used as the power source applied to it during formation. Furthermore, PEC was used as the insulating film 116. A silicon nitride film with a thickness of 100 nm was formed using a VD apparatus. In addition, insulating film 118 and Then, a silicon oxide-nitride film with a thickness of 400 nm was formed using a PECVD apparatus. For conductive films 120a and 120b, a copper alloy with a thickness of 50 nm was formed using a sputtering apparatus. A (Cu-Mn) film and a copper film with a thickness of 100 nm were formed.

[0516] Furthermore, in sample D1, the insulating film 118 and the conductive films 120a and 120b are coated with an insulating film. A 1.5 μm thick acrylic resin film was formed using 158.

[0517] Figure 42 shows the cross-sectional observation results of the sample D1 prepared above. As shown in Figure 42, in this embodiment The prepared sample D1 was confirmed to have a good cross-sectional shape. In particular, the channel length L was 2. A conductive film 106, which is 0.1 μm thick and functions as the first gate electrode, and a source electrode and a drain Because the distance between the conductive films 120a and 120b, which function as in electrodes, is long, parasitic capacitance This suggests it is small.

[0518] The configuration shown in this embodiment can be appropriately combined with the configurations shown in other embodiments or models. It can be used in this way. [Explanation of Symbols]

[0519] 100 transistors 100A Transistor 100B transistor 100C Transistor 100D Transistor 100E Transistor 100F transistor 100G transistor 102 circuit boards 104 Insulating film 104_1 Insulating film 104_2 Insulating film 104_3 Insulating film 104_4 Insulating film 106 Conductive film 107 Oxide semiconductor film 10⁸ Oxide semiconductor film 108_1 Oxide semiconductor film 108_2 Oxide semiconductor film 108_3 Oxide semiconductor film 108d Drain area 108f area 108i channel area 108s Source Area 110 Insulating Film 110_0 Insulating film 112 Oxide semiconductor film 112_0 Oxide semiconductor film 114 Conductive film 116 Insulating film 118 Insulating Film 120 Conductive film 120a conductive film 120b Conductive film 122 Insulating film 140 masks 141a opening 141b opening 143 Opening 145 Impurity Elements 147 Hollow area 150 transistors 150A Transistor 150B transistor 158 Insulating Film 300A Transistor 302 circuit board 304 Conductive film 306 Insulating Film 307 Insulating film 308 Oxide semiconductor film 308_2 Oxide semiconductor film 308_3 Oxide semiconductor film 312a Conductive film 312b Conductive film 312c conductive film 314 Insulating Film 316 Insulating film 318 Insulating film 320 Conductive film 341 Opening 342 Opening 501 Pixel Circuit 502 pixel section 504 Drive Circuit Section 504a Gate Driver 504b Source Driver 506 Protection circuit 507 Terminal section 550 transistors 552 transistors 554 transistors 560 Capacitive elements 562 Capacitance element 570 liquid crystal elements 572 Light-emitting element 700 Display device 701 circuit board 702 pixel section 704 Source Driver Circuit 705 circuit board 706 Gate Driver Circuit Section 708 FPC terminal section 710 signal line 711 Wiring section 712 Sealant 716 FPC 730 Insulating Film 732 Encapsulation film 734 Insulating Film 736 Colored film 738 Light-shielding film 750 transistors 752 transistors 760 connecting electrodes 770 Planarizing Insulator 772 Conductive film 774 Conductive film 775 liquid crystal elements 776 Liquid Crystal Layer 778 Structure 780 Anisotropic conductive film 782 Light-emitting element 784 Conductive film 786 EL layer 788 Conductive film 790 Capacitive elements 1280a p-type transistor 1280b n-type transistor 1280c n-type transistor 1281 Capacitive element 1282 transistors 1311 Wiring 1312 Wiring 1313 Wiring 1314 Wiring 1315 Wiring 1316 Wiring 1317 Wiring 1351 Transistors 1352 Transistors 1353 Transistors 1354 Transistors 1360 Photoelectric conversion element 1401 Signal 1402 Signal 1403 Signal 1404 Signal 1405 Signal 8000 Display Module 8001 Top cover 8002 Lower cover 8003 FPC 8004 Touch Panel 8005 FPC 8006 Display Panel 8007 Backlight 8008 light source 8009 Frame 8010 Printed Circuit Board 8011 Battery 9000 cabinets 9001 Display section 9003 Speaker 9005 Operation Keys 9006 Connection terminal 9007 Sensor 9008 Microphone 9050 Operation Buttons 9051 Information 9052 Information 9053 Information 9054 Information 9055 Hinge 9100 Television equipment 9101 Mobile Information Terminal 9102 Mobile Information Terminal 9200 Mobile Information Terminal 9201 Mobile Information Terminal

Claims

[Claim 1] A semiconductor device having a transistor, The aforementioned transistor is Oxide semiconductor film and The gate insulating film on the oxide semiconductor film, The metal oxide film on the gate insulating film, The first conductive layer on the metal oxide film, The first conductive layer comprises a first insulating film, In a cross-sectional view of the transistor in the channel length direction, the end of the gate insulating film is located on the upper surface of the oxide semiconductor film. A semiconductor device wherein the first insulating film has a region in contact with the upper surface of the first conductive film, a region in contact with the side surface of the metal oxide film, a region in contact with the upper surface of the gate insulating film, and a region in contact with the upper surface of the oxide semiconductor film.

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