solar cells

Abstract

The present invention provides a solar cell that improves the optical properties of the TCO layer while also improving the charge carrier transport characteristics. [Solution] A solar cell comprising a crystalline silicon substrate (substrate 12), a semiconductor layer disposed on the back surface 16 of the substrate configured so as not to face a radiation source when the solar cell 10 is in use, and a transparent conductive region disposed on the surface of the semiconductor layer, wherein the transparent conductive region includes a first layer having a first work function and a second layer having a second work function and sandwiched between the first layer and the semiconductor layer, and the second work function of the second layer is greater than the first work function of the first layer.

Description

Technical Field

[0001] The present disclosure relates to solar cells and methods of forming the same.

Background Art

[0002] A solar cell module that supplies electrical energy from sunlight includes an array of solar cells / photovoltaic cells, each including a multilayer semiconductor structure disposed between one or more front electrodes and back electrodes.

[0003] The substrate typically forms a pn junction with an emitter layer disposed on the surface of the substrate (i.e., one of the substrate and the emitter layer is an n-type material and the other is a p-type material). The pn junction facilitates the generation of current in response to light incident on the solar cell.

[0004] A surface electric field layer (e.g., a front surface electric field layer or a back surface electric field layer) is disposed on the surface of the substrate opposite to the emitter layer. The surface electric field layer is doped (i.e., with a charge type opposite to that of the emitter) and configured to extract charge carriers from the substrate.

[0005] The emitter layer and the surface electric field layer are typically formed of amorphous silicon (a-Si), while the substrate is formed of crystalline silicon (c-Si), carrying a heterojunction type technology (HJT) solar cell.

[0006] In such HJT solar cells, a transparent conductive oxide layer (TCO) is sandwiched between the surface electric field layer and one of the electrodes, and a further TCO layer is sandwiched between the emitter layer and the other electrode. The TCO layer is arranged to extract charge carriers from the active layer of the solar cell (e.g., the surface electric field layer and the emitter layer) and transport them to their respective electrodes.

[0007] To maximize the efficiency of the solar cell, it is important to maximize the optoelectronic properties of the TCO layer. However, since transparent materials are generally insulators and conductive materials tend to have metallic properties, there is a fundamental trade-off between the optical and electrical properties of such materials.

[0008] Therefore, it is still necessary to improve the optical properties of the TCO layer of such solar cells while improving the charge carrier transport characteristics of those solar cells. [Overview of the project]

[0009] According to a first embodiment, a solar cell is provided that includes a substrate (e.g., a crystalline silicon substrate), a semiconductor layer disposed on the back surface of the substrate configured not to face a radiation source when the solar cell is in use (or configured to face away from a radiation source), and a transparent conductive region disposed on the surface of the semiconductor layer. The transparent conductive region includes a first layer having a first work function and a second layer having a second work function, sandwiched between the first layer and the semiconductor layer. The second work function of the second layer is greater than the first work function of the first layer. In one embodiment, the semiconductor layer is sandwiched between the substrate and the transparent conductive region.

[0010] During the operation of a known solar cell, photogenerated carriers are collected by a TCO layer and transported to the electrodes. Such a TCO layer may consist of a low work function that increases its conductivity to increase the transport of photogenerated carriers to the electrodes. However, the low work function of the TCO layer may increase the contact resistance between the TCO layer and the semiconductor layer of the solar cell (e.g., amorphous silicon, a-Si) on which the TCO layer is placed.

[0011] The increase in contact resistance arises from the formation of a potential barrier (e.g., a parasitic Schottky barrier) at the interface between the TCO and the semiconductor layer. This potential barrier generates a diffusion potential that hinders the collection of photogenerated carriers by the TCO layer, thereby reducing the efficiency of the solar cell.

[0012] The transparent conductive region of the present invention comprises a second layer positioned between a first layer and a semiconductor layer. The second layer has a work function greater than that of the first layer. Therefore, the second work function of the second layer is better matched to the valence band, i.e., conduction band, of the semiconductor layer to reduce the parasitic potential barrier. Thus, the transparent conductive region can extract more photogenerated carriers from the semiconductor layer, thereby improving the curve factor (FF) and efficiency of the solar cell.

[0013] Furthermore, the first layer of the transparent conductive region is composed of a smaller work function, resulting in lower transparency (compared to the second layer). This increases the reflectivity of unabsorbed photons returning to the photoactive layer (e.g., the semiconductor layer) of the solar cell.

[0014] The relatively low work function of the first layer increases its conductivity (compared to the second layer), thereby promoting the movement of photogenerated charge carriers to the electrodes, which can be positioned on the outer (e.g., outermost) surface of the transparent conductive region.

[0015] It should be understood that the term "work function" refers to the energy level difference between the Fermi level of a solid material and the energy of free space outside the solid material, i.e., the vacuum level. Therefore, this term defines the minimum energy required to release electrons from a solid material at absolute zero.

[0016] The work function of a material is considered to be greater than that of another material if its corresponding energy value (measured in electron volts, eV) is greater than that of the other material.

[0017] The semiconductor layer is positioned on the back surface of the substrate, configured so as not to face the radiation source when the solar cell is in use. In this way, the transparent conductive region is positioned on the back surface of the semiconductor layer. The first layer of the transparent conductive region defining the outermost layer has a smaller work function and therefore lower transparency (i.e., higher reflectivity). Thus, the first layer can be configured to reflect photons that may have passed through to the transparent conductive region toward the photoactive layer of the solar cell. Furthermore, increasing the conductivity of the first layer reduces the contact resistance with the back surface electrode that may be positioned on its outer surface.

[0018] When an element such as a layer, film, region, or substrate is referred to as being "above," "adjacent to," or "opposite" another element, it will be understood that it may be "directly above," "directly adjacent to," or "directly opposite" that further element, or that one or more intervening elements may be present. In contrast, when an element is referred to as being "directly above," "directly adjacent to," or "directly opposite" another element, there are no intervening elements.

[0019] The following optional functions are presented. These can be applied individually or in any combination with any other aspect.

[0020] The semiconductor layer may be composed of a positive conductivity type (i.e., p-type). In this case, the second layer of the transparent conductive region, having a larger work function, more closely matches the valence band of the p-type semiconductor layer, which facilitates the transport of positive charge carriers (i.e., holes) across the interface between the transparent conductive region and the semiconductor layer. In particular, because the work function of the second layer is larger, band bending at the interface with the p-type semiconductor is prevented, otherwise the interface would exhibit a potential barrier (e.g., a Schottky barrier) against holes driven toward the electrodes when the solar cell is in use. In this way, the second layer of the transparent conductive region increases the extraction of holes from the solar cell, despite having a lower conductivity than the first layer.

[0021] The second work function of the second layer may be configured to be less than the work function of the semiconductor layer. The expression “less than” may define a second work function that is “only slightly less” than the work function of the semiconductor layer. Thus, the second work function may be configured to be less than the work function of the semiconductor layer, but substantially close to it (i.e., to match the work function of the semiconductor layer), in order to facilitate the efficient movement of charge carriers across the interface between these two layers. In exemplary configurations, the second work function may be less than 5%, optionally less than 2%, or optionally less than 1% of the work function of the semiconductor layer.

[0022] The difference between the work function of the semiconductor layer and the work function of the second layer of the transparent conductive region may be less than the difference between the work function of the semiconductor layer and the work function of the first layer of the transparent conductive region.

[0023] It is advantageous that the work function of the second layer more closely matches that of the semiconductor layer. In this way, the second layer can provide an improved band arrangement between the semiconductor layer and the transparent conductive region compared to the first layer, thereby reducing the contact resistance at the interface between the transparent conductive region and the semiconductor layer.

[0024] The transparent conductive region can be defined as a degenerate semiconductor (i.e., a highly doped semiconductor) where the Fermi level lies in the conduction band, causing the material to behave like a metal. Changes in the carrier doping concentration of the transparent conductive region layer can shift the work function (and the Fermi level), thereby affecting the band arrangement at the interface between the transparent conductive region and the semiconductor layer.

[0025] The work function of a transparent conductive region depends on the material properties of the transparent conductive region material, which can be determined by controlling the parameters of the fabrication process (e.g., deposition) of the transparent conductive region. In particular, the work function of a transparent conductive region can be modified by controlling the oxygen concentration during the fabrication of the transparent conductive region layer.

[0026] At least one or each of the layers of the transparent conductive region may be composed of a work function between 3.5 eV and 6.0 eV, optionally between 4.0 and 5.5 eV.

[0027] The third layer may be disposed directly on the semiconductor layer. For example, the third layer may be disposed in direct contact (e.g., deposited thereon) with the surface (e.g., the receiving surface) of the semiconductor layer. In this way, the third layer is advantageously configured to directly extract charge carriers from the semiconductor layer.

[0028] The first layer may be disposed directly on the second layer. For example, the first layer may be disposed in direct contact (e.g., deposited thereon) with the surface (e.g., the receiving surface) of the second layer. Further, the second layer may be disposed directly on the third layer. In this way, there may be a defined step change in the work function at the interface between each of these layers of the transparent conductive region.

[0029] The third work function of the third layer may be configured to be at most 10% greater (e.g., at most 110% of the second work function) than the second work function of the second layer. Alternatively, the third work function of the third layer may be configured to be at most 15% greater (e.g., at most 115% of the second work function) than the second work function of the second layer. Alternatively, the third work function of the third layer may be configured to be at least 10% and at most 15% greater (e.g., at least 110% and at most 115% of the second work function) than the second work function of the second layer.

[0030] When the third layer is disposed directly adjacent to the semiconductor layer, the third work function of the third layer may be configured to be greater than 5.0 eV and less than 6.0 eV, optionally 5.5 eV. In this case, the work function of the second layer may be less than the work function of the third layer (e.g., less than between 5.0 eV and 6.0 eV) and greater than the work function of the first layer (e.g., greater than between 3.5 eV and 4.5 eV).

[0031] At least one layer of the transparent conductive region may be formed from a metal oxide material. At least one layer of the transparent conductive region may be formed from indium tin oxide (ITO). Alternatively, at least one layer of the transparent conductive region may be formed from one or more of zinc oxide (ZnO), indium-doped tin oxide (ITO), tin oxide (SnO2), indium oxide (In2O3), and fluorine-doped tin oxide (FTO). The semiconductor layer may be formed from amorphous silicon (a-Si).

[0032] The surface of the substrate on which the semiconductor layer is placed may be a first surface of the substrate, and the solar cell may include a second semiconductor layer placed on a second surface of the substrate, which is opposite to the first surface. The solar cell may further include a second transparent conductive region placed on the surface of the second semiconductor layer.

[0033] The second transparent conductive region may include a first layer having a first work function and a second layer having a second work function, sandwiched between the first layer and the second semiconductor layer. The second work function of the second layer may be configured to be greater than the first work function of the first layer.

[0034] The second semiconductor layer may be composed of a negative conductivity type (i.e., n-type).

[0035] The second transparent conductive region may include a third layer sandwiched between the second layer and the second semiconductor layer. The third layer may be directly disposed on the second semiconductor layer. For example, the third layer of the second transparent conductive region may be disposed in direct contact with (e.g., deposited on) the surface (e.g., the receiving surface) of the second semiconductor layer. Thus, the third layer is advantageously configured to directly extract charge carriers from the second semiconductor layer. The third layer may be configured with a third work function that may be greater than the second work function of the second layer.

[0036] A second semiconductor layer may define an emitter layer. The emitter layer may be located on the front surface of the substrate, which can be configured to face the radiation source when the solar cell is in use.

[0037] At least one of the layers of the second transparent conductive region may be formed from a metal oxide material, and the second semiconductor layer may consist of amorphous silicon (a-Si).

[0038] The work functions of the first and second layers of the second transparent conductive region can be configured similarly to those of the corresponding layers of the first transparent conductive region. However, in this case, the difference in the work functions of the transparent conductive layers will be smaller to reflect the smaller difference in the work functions between the front electrode and the front accumulator layer.

[0039] The substrate may be composed of crystalline silicon (c-Si), such as a silicon wafer. The crystalline silicon substrate may include a continuous crystalline structure, such as single-crystal silicon. Alternatively, the substrate may include one or more particles of a continuous crystalline structure, such as polycrystalline (or multi-crystal) silicon.

[0040] Each of the first and second layers of the transparent conductive region may consist of a width, length, and depth. Each such layer may be configured such that both its width and length are substantially greater than its depth. The width and length of the layer may be measured perpendicular to the plane of the substrate surface, and the depth may be measured perpendicular to the plane of the substrate surface.

[0041] The transparent conductive region may have a thickness of less than 500 nm, optionally less than 200 nm, and optionally less than 100 nm. Each layer of the transparent conductive region may have a thickness of at least 20 nm and no more than 50 nm.

[0042] The front transparent conductive region may be further configured to define an anti-reflective layer, or coating, of the solar cell. Thus, the layer of the transparent conductive region may be textured to provide an anti-reflective surface. The anti-reflective layer favorably reduces the reflectivity of light incident on the solar cell, increasing the selectivity of a given wavelength band, thereby increasing the efficiency of the solar cell.

[0043] According to an exemplary configuration, the solar cell may include electrodes positioned on the surface of a transparent conductive region opposite to the surface forming the interface with the semiconductor layer (for example, the transparent conductive region may be sandwiched between the substrate and the electrodes).

[0044] A solar cell may further include a substrate and passivation layers that can be disposed between at least one or each of the first and second semiconductor layers. The passivation layers may be formed from an amorphous material configured to passivate the substrate surface(s) on which each semiconductor layer is placed. The passivation layers may consist of amorphous silicon (a-Si). The passivation layers may be undoped (e.g., formed from an intrinsic semiconductor material).

[0045] At least one or each of the semiconductor layer and / or passivation layer(s) may consist of a material having a predetermined chemical composition. Each of the layers may be deposited (or, for example, diffused or injected) onto the substrate in a continuous process.

[0046] From the above, it will be understood that both the substrate and the semiconductor layer can be formed from one or more semiconductor materials. Each of the semiconductor materials may be composed of a conductivity type determined by the presence of dopant atoms. In this way, each of the semiconductor materials may be doped with atoms having a determined charge in order to increase the excess charge carriers within the doped bulk material.

[0047] It will be understood that the ionization state of the dopant atoms can determine the conductivity type of the doped semiconductor material. For example, a semiconductor material may be positively or negatively doped so that it exhibits a positive conductivity type (p-type) or a negative conductivity type (n-type), respectively. Any layer having the determined conductivity type (e.g., p-type or n-type) may be configured to generate an electrostatic driving force that drives photogenerated charge carriers (e.g., electrons and holes) toward that layer. For example, a p-type material attracts electrons and repels holes, and an n-type material attracts holes and repels electrons. In some cases, the semiconductor material may not be doped (e.g., intrinsic passivation layers).

[0048] The substrate may be composed of a first conductivity type (e.g., n-type), and the semiconductor layer may be composed of a second conductivity type opposite to the first conductivity type (e.g., p-type), thus forming a pn junction together with the substrate.

[0049] In a pn junction, the interface formed between the p-type and n-type materials allows excess electrons and holes to diffuse into the n-type and p-type materials, respectively. This relative movement of charge carriers creates a depletion region (e.g., a space charge region) in the pn junction. Upon reaching thermal equilibrium, an embedded potential difference is formed across the entire depletion region.

[0050] During the operation of a solar cell, multiple electron-hole pairs generated by light incident on the substrate are separated into electrons and holes by the electric field generated by the built-in potential difference at the pn junction. Subsequently, the separated electrons move to the n-type semiconductor (e.g., tunnel), and the separated holes move to the p-type semiconductor. Therefore, if the substrate is n-type and the emitter is p-type, the separated holes and electrons move to the emitter and substrate, respectively. In particular, the holes and electrons move to the electrodes located on the emitter side and the substrate side of the pn junction. Thus, the electrons become majority carriers at the substrate, and the holes become majority carriers at the emitter.

[0051] According to the exemplary configuration, the substrate may be formed from an n-type single-crystal silicon wafer. At least one of the semiconductor layers (e.g., the first semiconductor layer) may contain an amorphous material that is at least partially doped to be p-type. Such a configuration may contribute to the formation of heterojunction technology (HJT) type solar cells, which are so defined because they combine two different materials to create a charge isolation field at a pn junction. Alternatively, it will be understood that the solar cell may be configured to define any type of solar cell structure. For example, the substrate and emitter may define a tandem junction solar cell.

[0052] If the semiconductor material is n-type, it may be configured to contain impurities of group V elements such as phosphorus (P), arsenic (As), and antimony (Sb). If the semiconductor material is p-type, it may contain impurities of group III elements such as boron (B), gallium (Ga), and indium (In). The passivation layer may be configured without a conductivity type to form an intrinsic layer between the emitter and the substrate.

[0053] According to the alternative configuration, the emitter is n-type and the substrate is p-type, and a pn junction can be formed between them. In this case, the separated holes and electrons move to the substrate and emitter, respectively. In particular, the holes and electrons move to the electrodes located on the substrate side and the emitter side of the pn junction.

[0054] At least one semiconductor layer (e.g., a second semiconductor layer) may consist of a first conductivity type (e.g., n-type) which is the same as the conductivity type of the substrate. This semiconductor layer can define an accumulator of a solar cell configured to selectively screen, i.e., extract, charge carriers from the substrate.

[0055] In the embodiment, the substrate may be formed from a p-type single-crystal silicon wafer, and the semiconductor layer may include an amorphous material that is at least partially doped to be p-type.

[0056] In addition to being composed of a determined conductivity type, each semiconductor layer may be composed of different dopant concentrations. Each doped layer may be configured to generate an electrostatic driving force that drives photogenerated charge carriers (e.g., electrons and holes) toward its respective layer. At least one doping concentration in the doped layers may be increased to generate a stronger electrostatic force, increasing charge transport that moves away from the substrate.

[0057] According to an exemplary configuration, the solar cell includes a crystalline silicon substrate, a back-side semiconductor layer disposed on the back of the substrate configured not to face a radiation source when the solar cell is in use, a front-side semiconductor layer disposed on the front of the substrate configured to face a radiation source when the solar cell is in use, a back-side transparent conductive region disposed on the surface of the back-side semiconductor layer, and a front-side transparent conductive region disposed on the surface of the front-side semiconductor layer, wherein the back-side transparent conductive region includes a first layer having a first work function and a second layer having a second work function and sandwiched between the first layer and the back-side semiconductor layer, the second work function of the second layer being equal to the first work function of the first layer The work function is greater than the first work function, and the front transparent conductive region includes a first layer having a first work function and a second layer sandwiched between the first layer and the first semiconductor layer, the second work function of the second layer being greater than the first work function of the first layer, and at least one of the back and front transparent conductive regions includes a third layer sandwiched between the substrate and the second layer of each of the at least one back and front transparent conductive region, the third work function of the third layer being greater than the second work function of the second layer of each of the at least one back and front transparent conductive region. According to the advantageous configuration, each of the front and back transparent conductive regions has at least two layers configured such that the work function of each region increases toward the substrate. Also, at least one of the front and back transparent conductive regions includes a third layer configured such that the work function gradually (e.g., progressively) increases toward the substrate (e.g., across all three layers). By configuring at least one of the transparent conductive regions on the front and back surfaces in which the work function gradually increases toward the substrate (for example, across three different layers), this optimizes charge extraction at the front and back electrodes while increasing the transmission of photons into the substrate.

[0058] The front transparent conductive region may consist of only two layers (e.g., a first and a second layer), while the back transparent conductive region may consist of three layers (e.g., a first, second, and a third layer). Alternatively, the back transparent conductive region may consist of only two layers, while the front transparent conductive region may consist of three layers.

[0059] Each of the front and back transparent conductive regions may have a third work function and may include a third layer sandwiched between the substrate and the second layer of each of the front and back transparent conductive regions (for example, the front transparent conductive region may include a third front layer positioned between the substrate and the second front layer, and the back transparent conductive region may include a third back layer positioned between the substrate and the second back layer). The third work function of each of the third layers may be greater than the second work function of each of the second layers of the front and back transparent conductive regions (for example, the work function of the third front layer may be greater than the work function of the second front layer, and the work function of the third back layer may be greater than the work function of the second back layer).

[0060] As described above, the solar cell may include an electrode positioned on the opposite side of the transparent conductive region and configured to extract photogenerated charge carriers from the solar cell. The electrode may be positioned such that the transparent conductive region is sandwiched between the electrode and the substrate.

[0061] When the transparent conductive region is located on the back surface (e.g., the innermost surface) of the substrate, the electrodes can be located on the back surface of the transparent conductive region to define the back electrode of the solar cell.

[0062] When the transparent conductive region is positioned on the front surface of the substrate (for example, the very front), the electrodes can be positioned in front of the transparent conductive region to define the front electrodes of the solar cell.

[0063] If the solar cell includes transparent conductive regions on the front and back surfaces of a substrate, respectively, the solar cell may include a front electrode positioned on the front of the front transparent conductive region and a back electrode positioned on the back of the back transparent conductive region. Each electrode may be configured to form ohmic contact with the respective surfaces of the front and back transparent conductive regions.

[0064] The front and back electrodes may each include a plurality of finger electrodes positioned on the respective surfaces of the transparent conductive region. Each finger electrode may have an axial length substantially longer than its width. Both the width and axial length of the finger electrodes may be measured perpendicular to each other within the plane of each surface of the transparent conductive region. The finger electrodes may extend in a transverse direction parallel to the width direction of the transparent conductive region.

[0065] The finger electrodes within each of the multiple front and / or back finger electrodes may be spaced apart across their respective surfaces to define a laterally extending space between the finger electrodes. The finger electrodes may be spaced apart longitudinally, substantially parallel to the length of the transparent conductive region. Each of the multiple finger electrodes may be substantially parallel to one another. Thus, the multiple back finger electrodes may form an array of parallel, longitudinally spaced (e.g., equally spaced) finger electrodes.

[0066] It should be understood that the terms “conductive” and “insulating” as used herein are explicitly intended to mean electrical conductivity and electrical insulation, respectively. The meanings of these terms become particularly clear in the context of the technical context of this disclosure, which is the context of photovoltaic solar cell devices. It will also be understood that the term “ohmic contact” is intended to mean a non-rectifying electrical junction (i.e., a junction between two conductors exhibiting substantially linear current-voltage (IV) characteristics).

[0067] According to an exemplary configuration, a solar cell may include a substrate (e.g., a silicon substrate), a front semiconductor layer disposed on the front surface of the substrate, a front transparent conductive region disposed on the front surface of the front semiconductor layer, a back semiconductor layer disposed on the back surface of the substrate, and a back transparent conductive region disposed on the back surface of the back semiconductor layer.

[0068] The back semiconductor layer may define the emitter of the solar cell and is located on the opposite side of the substrate to form a pn junction. The emitter may be electrically connected to the back electrode and positioned between the back electrode and the substrate. The back transparent conductive region may be configured to extract charge carriers from the emitter during the operation of the solar cell and move them to the back electrode.

[0069] The front semiconductor layer may define an accumulator toward the front of the substrate, i.e., where the substrate layer and the front electrode are positioned. The front transparent conductive region may be configured to extract charge carriers from the accumulator during the operation of the solar cell and move them to the front electrode.

[0070] According to an exemplary configuration, the solar cell may include an n-type silicon substrate, a p-type back-surface emitter, and at least two transparent conductive layers having different work functions, wherein the transparent conductive layer positioned closest to the emitter layer has a larger work function than the other of the two transparent conductive layers.

[0071] It will be understood that the above arrangement of transparent conductive layers can also be applied to a p-type emitter layer placed on the front surface of an n-type silicon substrate.

[0072] Alternatively, the above arrangement of transparent conductive layers could be further applied to solar cells having a p-type silicon substrate and a p-type accumulator layer positioned in front of the substrate. However, in this arrangement, the difference in work function between the transparent conductive layers may be smaller due to the smaller difference in work function between the front electrode and the p-type accumulator layer.

[0073] According to a second embodiment, a solar cell module is provided which includes a plurality of solar cells according to the first embodiment. The plurality of solar cells can be electrically coupled to one another.

[0074] A third aspect provides a method for manufacturing a solar cell, comprising the steps of: providing a substrate (e.g., a crystalline silicon substrate); arranging a semiconductor layer on the surface of the substrate; and arranging a transparent conductive region on the semiconductor layer, wherein the transparent conductive region includes a first layer and a second layer. The step of arranging the transparent conductive region includes arranging the second layer on the semiconductor layer and arranging the first layer on the second layer such that the second layer is sandwiched between the first layer and the semiconductor layer. The method includes configuring the first layer with a first work function and configuring the second layer with a second work function greater than the first work function of the first layer.

[0075] A method for arranging a semiconductor layer on the surface of a substrate may include configuring the semiconductor layer to be of a positive conductivity type (i.e., p-type).

[0076] The transparent conductive region may include a third layer sandwiched between the second layer and the semiconductor layer. In this case, the method of arranging the transparent conductive region may include arranging the third layer on the semiconductor layer before depositing the second layer. This method may include arranging the third layer with a third work function greater than the second work function of the second layer. The step of arranging the third layer may include directly arranging the third layer on the semiconductor layer (for example, directly depositing the third layer on the surface of the semiconductor layer (e.g., the receiving surface)).

[0077] The step of arranging the transparent conductive regions may include sequentially depositing layers of the transparent conductive regions onto the semiconductor using a sputtering process or any other suitable deposition method. The sputtering process may include direct current (DC) magnetron sputtering.

[0078] The method may include controlling at least one parameter of the sputtering process to determine the work function in the first and second layers. The at least one parameter may include at least one of the gas composition and the gas flow rate.

[0079] Alternatively, the method may include modifying the TCO deposition method to deposit different materials in the first and second layers. The different TCO materials for the first and second layers may include at least one of zinc oxide (ZnO), indium-doped tin oxide (ITO), tin oxide (SnO2), indium oxide (In2O3), and fluorine-doped tin oxide (FTO).

[0080] The method may include configuring a sputtering process for a first layer with a first oxygen flow rate, and configuring a sputtering process for a second layer with a second oxygen flow rate greater than the first oxygen flow rate. The method may also include configuring a sputtering process for a third layer with a third oxygen flow rate greater than the second oxygen flow rate for the second layer. Advantageously, increasing the oxygen flow rate increases the work function of the transparent conductive material in the corresponding layer.

[0081] The method may include arranging a semiconductor layer and a transparent conductive region on the back surface of a substrate configured so as not to face a radiation source when the solar cell is in use.

[0082] The surface of the substrate on which the semiconductor is placed may be a first surface of the substrate, and the method may include placing a second semiconductor layer on a second surface of the substrate, the second surface being on the opposite side of the first surface, and placing a second transparent conductive region on the surface of the second semiconductor layer, the second transparent conductive region including the first layer and the second layer. The step of placing the second transparent conductive region may include placing the second layer on the second semiconductor layer, and placing the first layer on the second layer such that the second layer is sandwiched between the first layer and the second semiconductor layer. The method may include configuring the first layer with a first work function and configuring the second layer with a second work function greater than the first work function of the first layer.

[0083] The second transparent conductive region may include a third layer sandwiched between the second layer and the second semiconductor layer. In this case, the method of arranging the second transparent conductive region may include arranging the third layer on the second semiconductor layer before depositing the second layer. This method may include arranging the third layer with a third work function greater than the second work function of the second layer. The step of arranging the third layer of the second transparent conductive region may include directly arranging the third layer on the second semiconductor layer (for example, directly depositing the third layer on the surface (e.g., the receiving surface) of the second semiconductor layer).

[0084] The method may include arranging a semiconductor layer and a second transparent conductive region on the front surface of a substrate configured to face a radiation source when the solar cell is in use.

[0085] A method for arranging transparent conductive regions may include configuring at least one or each of the layers of transparent conductive regions such that the layers of transparent conductive regions form an anti-reflective layer, i.e., a coating, of the solar cell.

[0086] A method for arranging a second semiconductor layer on a second surface of a substrate may include configuring the second semiconductor layer to be of a negative conductivity type (i.e., n-type).

[0087] The method may include placing a passivation layer on the surface of a substrate such that the passivation layer is sandwiched between each semiconductor layer and the substrate before placing at least one or each of the first and second semiconductor layers. The passivation layer(s) may be formed from an amorphous material. The method may include configuring the passivation layer(s) such that they are substantially undoped (i.e., intrinsic).

[0088] The step of placing at least one or each of the first and second semiconductor layers and / or passivation layers may include depositing the layers onto a substrate using a deposition process. The deposition process may be a plasma-enhanced chemical vapor deposition (PECVD) process.

[0089] The method may include controlling at least one parameter of the deposition process to determine the structural composition, chemical composition, and dopant composition of at least one of the first and second semiconductor layers and / or passivation layers. The deposition process parameter may include the gas composition and / or gas flow rate. The deposition process parameter may define the temperature of the deposition chamber. The gas composition may include at least one of carbon dioxide (CO2), silane (SiH4), and hydrogen (H2).

[0090] The method may include placing an electrode in at least one or each of the first and second transparent conductive regions.

[0091] Each transparent conductive region may include a back surface (e.g., the furthest back surface) and a front surface (e.g., the furthest front surface) opposite the back surface. Therefore, when the transparent conductive region is located on the back surface of the substrate, the method may include defining the back surface electrodes by placing electrodes on the back surface of the transparent conductive region. When the transparent conductive region is located on the front surface of the substrate, the method may include defining the front surface electrodes by placing electrodes on the front surface of the transparent conductive region.

[0092] Since the electrode may include a plurality of finger electrodes, the method may include depositing a plurality of finger electrodes on a first layer. The method may include depositing a conductive material on the front or back surface of a transparent conductive region.

[0093] Conductive materials can be deposited by various methods, including evaporation, plating, and printing. For example, the conductive material may include printed material. A method for depositing a conductive material may include printing a printable precursor of the printed material onto the surface of a transparent conductive area. The method may further include curing the printable precursor according to a firing process to form finger electrodes.

[0094] Those skilled in the art will understand that, except where mutually exclusive, any feature or parameter described in any one of the above embodiments can be applied to any of the other embodiments. Furthermore, except where mutually exclusive, any feature or parameter described herein can be applied to any embodiment and / or combined with other features or parameters described herein.

[0095] Hereafter, embodiments will be described with reference to the drawings for illustrative purposes only. [Brief explanation of the drawing]

[0096] [Figure 1] This is a schematic diagram showing the layers of a solar cell. [Figure 2] Figure 1 is a close-up view of the transparent conductive area on the front of the solar cell. [Figure 3] Figure 1 is a close-up view of the transparent conductive region on the back surface of the solar cell. [Figure 4] Figure 1 is a flowchart showing a method for forming a solar cell. [Modes for carrying out the invention]

[0097] Aspects and embodiments of this disclosure will be described with reference to the accompanying drawings. Further aspects and embodiments will be apparent to those skilled in the art.

[0098] Figure 1 schematically shows a solar cell 10 that includes a semiconductor substrate 12, which in addition to other layers, has a first (i.e., front) surface 14 into which light from a radiation source (e.g., the sun) is incident during normal use, and a second (i.e., back) surface 16 opposite to the front surface 14. That is, the front surface 14 may be configured to face the sun during use, while the back surface 16 may be configured to face away from the sun during use.

[0099] The substrate 12 divides the solar cell 10 into a front portion 18 located in front of the substrate 12 (i.e., the front) and a rear portion 20 located behind the substrate 12. Light incident on the solar cell 10 passes through the front portion 18, the substrate 12, and then the rear portion 20.

[0100] Each of the front section 18 and the rear section 20 includes a plurality of layers arranged to define a separate layered structure. The front section 18 (also referred herein to as the front layered structure 18) is located opposite the front surface 14 of the substrate 12, and the rear section 20 (also referred herein to as the back layered structure 20) is located opposite the back surface 16 of the substrate 12. The constituent layers of the front and back layered structures 18 and 20 are sequentially deposited (or, for example, diffused or injected) onto the respective front surface 14 and back surface 16 of the substrate 12.

[0101] Each layer of the front section 18 and the rear section 20 consists of width, length, and depth. The width and length of each layer are measured perpendicular to the front 14 and back 16 of the substrate 12. For each layer, its width and length are substantially longer than its depth, measured perpendicular to the front 14 and back 16 of the substrate 12.

[0102] The solar cell 10 is a back-emitter solar cell (and in particular, a back-emitter heterojunction solar cell 10). Therefore, the solar cell 10 comprises an emitter 50 and an accumulator 52 arranged on both sides of the substrate 12. As a result, the emitter 50 forms part of the rear portion 20, and the accumulator 52 forms part of the front portion 18.

[0103] According to the illustrated embodiment, the substrate 12 is an n-type single-crystal silicon wafer that forms a pn junction with a p-type emitter layer 50. The accumulator layer 52 is configured to have an n-type so that it can extract electrons from the substrate 12. The emitter layer 50 and the accumulator layer 52 are each formed from doped amorphous silicon (a-Si) material doped with corresponding elements to achieve a predetermined conductivity type, as will be understood by those skilled in the art.

[0104] The front portion 18 includes a front passivation layer 28 sandwiched between the front surface 14 of the substrate 12 and the accumulator 52. The rear back passivation layer 30 of the rear portion 20 is sandwiched between the emitter 50 and the back surface 16 of the substrate 12. Each of the passivation layers 28 and 30 is formed from an intrinsic amorphous silicon material, as will be understood by those skilled in the art.

[0105] The emitter layer 50 and the accumulator layer 52 each have a depth of 12 nm, and the passivation layers 28 and 30 each have a depth of 3 nm (when measured in the vertical direction shown in Figure 1).

[0106] The solar cell 10 further comprises a transparent conductive (TC) region 46 (also referred to herein as the front TC region 46) located on the front surface 54 of the accumulator 52. A further TC region 48 (also referred to herein as the back surface TC region 48) is located on the back surface 44 of the emitter 50.

[0107] The TC regions 46 and 48 are textured to provide an anti-reflective surface for the solar cell 10, as shown in Figures 1 to 3. The front electrode 40 is provided on the front textured surface 56 of the front TC region 46, and the back electrode 42 is provided on the back textured surface 58 of the back TC region 48. The front electrode 40 and the back electrode 42 are made of silver.

[0108] The front and back TCO regions 46 and 48 each have a thickness of less than 100 nm (when measured in the vertical direction shown in Figure 1), and the front and back TCO regions 46 and 48 are formed from indium tin oxide (ITO), respectively. However, the composition of each of the TC regions 46 and 48 varies with depth, as will be described in more detail below.

[0109] The front and back TC areas 46 and 48 will be described in more detail here with reference to Figures 2 and 3, respectively.

[0110] The front TC region 46 includes first, second, and third front layers 22, 24, and 26, each having a different composition. As shown in Figure 2, the third layer 26 is sandwiched between the accumulator 52 and the second front layer 24, and the second front layer 24 is sandwiched between the third front layer 26 and the first front layer 22.

[0111] The first, second, and third front layers 22, 24, and 26 are each composed of different work functions. In particular, the first front layer 22 is composed of a first work function smaller than the second work function of the second front layer 24, and the second work function of the second front layer 24 is smaller than the third work function of the third front layer 26.

[0112] The work function of each layer in TC regions 46 and 48 refers to the energy difference between the Fermi level of the constituent material of that layer and the energy of free space outside the material. The work function of a particular layer is described as greater than the work function of another layer if its work function energy value (when measured in electron volts, eV) is greater than the work function energy value of the layer being compared. Furthermore, since the work function of a material is measured on a negative scale, the term "greater" refers to a work function value that is negative compared to the comparison value.

[0113] The work function of the first front layer 22 is approximately 4.0 eV, the second work function of the second front layer 24 is approximately 4.1 eV, and the third work function of the third front layer 26 is approximately 4.2 eV. The work function of the accumulator layer 52 is approximately 4.2 eV, and the work function of the front electrode 40 is approximately 4.0 eV.

[0114] The front TC region 46 is formed from a stack of transparent conductive layers whose work function increases in steps as it moves toward the active layer of the solar cell 10 (vertically downward as shown in Figure 2). In this way, the third front layer 26 is composed of the highest (e.g., maximum) work function (i.e., the highest among the three layers) such that it has a lower conductivity than the first and second layers 22, 24. However, this means that the third front layer 26 provides a favorable transparent window that penetrates the accumulator 52 located directly beneath the front TC region 46.

[0115] Furthermore, since the first front layer 22 is composed of the lowest (e.g., smallest) work function, the first front layer 22 has a higher conductivity than the second and third layers 24, 26. This means that the third front layer 22 provides good electrical contact with the front electrode 40. A lower work function also reduces the transparency of the front TC region 46 at the top surface of the solar cell 10. To compensate for the reduced transparency, the thickness of the first front layer 22 is made as thin as possible to increase the number of incident photons that penetrate the photoactive layer.

[0116] Finally, the second front layer 24 is composed of an intermediate work function chosen to provide a balance between the conductivity and transparency of the first and third layers sandwiched between the second layer. Thus, the second front layer 24 provides a bridge of electron-optical properties between the first and third front layers 22, 26.

[0117] Similar to the front TC region 46, the back TC region 48 also includes a stack of three back layers 32, 34, and 36, as shown in Figure 3. As with the front layer, each of the first, second, and third back layers 22, 24, and 26 is formed from indium tin oxide. However, in contrast to the front layer, the three back layers 32, 34, and 36 are formed from different material compositions such that their work functions show a stepwise increase as they move toward the active layer of the solar cell 10 (vertically upward as shown in Figure 3).

[0118] In particular, the first back layer 32 has a first work function that is smaller than the work functions of the second and third layers 34 and 36. The second back layer 34 has a second work function that is smaller than the work function of the third layer 36 but larger than the work function of the first back layer 32. The third back layer 32 has a third work function that is larger than the work functions of both the first and second back layers 32 and 34.

[0119] The first work function of the first back layer 32 is approximately 4.0 eV, the second work function of the second back layer 34 is approximately 4.75 eV, and the third work function of the third back layer 36 is approximately 5.5 eV. The work function of the emitter layer 50 is approximately 5.5 eV, and the work function of the back electrode 42 is approximately 4.0 eV.

[0120] According to the illustrated embodiment, the work function of the third layer 36 is better matched to the valence band of the emitter 50, thereby reducing the possibility of a parasitic potential barrier forming between the TC region 48 and the emitter 50.

[0121] Furthermore, the first back layer 32 is composed of a relatively low work function so that it has lower transparency, thereby increasing the reflectivity of the TC region 48 on the back surface of the solar cell 10. As a result, more unabsorbed photons can be reflected toward the photoactive layer of the solar cell 10 by the first back layer 32 of the back TC region 48 when in use.

[0122] Since the first back layer 32 is positioned adjacent to the back electrode 42 of the solar cell 10, and the first back layer 32 has a relatively low work function, it will be understood that the first back layer 32 also exhibits increased conductivity (compared to the second and third back layers 34, 36). Due to the relatively high conductivity of the first back layer 32, the movement of photogenerated charge carriers (i.e., holes) to the back electrode 42 increases. Thus, the back TC region 48 can also extract more photogenerated carriers from the emitter 50, thereby increasing the curve factor (FF) of the solar cell 10.

[0123] Each of the first, second, and third front layers 22, 24, and 26, and the first, second, and third back layers 32, 34, and 36, has a depth of approximately 30 nm (when measured in the vertical direction shown in Figures 2 and 3). As described above, each of the layers 22, 24, 26, 32, 34, and 36 is formed from indium tin oxide. The work function of these indium tin oxide materials is set during the fabrication of the corresponding layer by adjusting the oxygen flow rate, as will be described in more detail below.

[0124] Figure 4 shows a method 100 for forming a solar cell such as the solar cell described above. The method includes a first step 102 of providing a crystalline silicon wafer to define the substrate 12 of the solar cell 10.

[0125] In the second method step 104, the method includes depositing front and back passivation layers 28 and 30 on the front 14 and back 16 of the substrate 12, respectively.

[0126] The third method step 106 includes depositing the accumulator 52 and emitter 50 on the front and back passivation layers 28, 30, respectively. Thus, the accumulator 52 and emitter 50 define the front and back semiconductor layers, respectively.

[0127] The second and third method steps 104 and 106 include placing (or forming) semiconductor layers on the front 14 and back 16 of the silicon wafer substrate 12. This may include steps of deposition, diffusion, doping, and / or injection. The referenced layers are those that form at least a portion of the front 18 and back 20 of the solar cell 10 described above (e.g., emitter, accumulator, and passivation layers). Each of these steps includes depositing the corresponding semiconductor material using a deposition process (e.g., PECVD). Generally, the parameters of the deposition process are configured to determine the composition (e.g., structural and / or chemical) and dopant concentration of each layer.

[0128] In step 108 of the fourth method, the method includes depositing front and back third layers 26, 36 on the accumulator 52 and the emitter 50, respectively. In step 110 of the fifth method, the method includes depositing front and back second layers 24, 34 on the front and back third layers 26, 36, respectively. In step 112 of the sixth method, the method includes depositing front and back first layers 22, 32 on the front and back second layers 24, 34, respectively.

[0129] Steps 108, 110, and 112 of the fourth, fifth, and sixth methods each include depositing front and back TCO layers on the front and back surfaces of the solar cell 10. Each of these steps includes depositing the corresponding transparent conductive oxide material using a DC magnetron sputtering process. Generally, the parameters of the sputtering process are configured to determine the composition (e.g., structural and / or chemical) and the electrical and optical properties of each layer. For example, the work function of the respective constituent materials of the front and back layers of the TC regions 46 and 48 is determined by adjusting the parameters of the sputtering process. In particular, each of the layers of the front and back TC regions 46 and 48 is deposited using different oxygen gas flow rates.

[0130] A method for depositing a first front layer 22 includes using a first oxygen flow rate to obtain a first work function. A method for depositing a second front layer 24 includes using a second oxygen flow rate to obtain a second work function. A method for depositing a third front layer 26 includes a third oxygen flow rate to constitute a third work function. The first oxygen flow rate for the first front layer 22 is greater than the second oxygen flow rate used to form the second front layer 24. The second oxygen flow rate for the second front layer 24 is greater than the third oxygen flow rate used to form the third front layer 26.

[0131] A method for depositing a first back layer 32 includes using a first oxygen flow rate to obtain a first work function. A method for depositing a second back layer 34 includes using a second oxygen flow rate to obtain a second work function. A method for depositing a third back layer 36 includes a third oxygen flow rate to set a third work function. The first oxygen flow rate for the first back layer 32 is less than the second oxygen flow rate used to form the second back layer 34. The second oxygen flow rate for the second back layer 34 is less than the third oxygen flow rate used to form the third back layer 36.

[0132] According to an exemplary configuration of the present invention, the front and back TC regions 46, 48 can be deposited separately. For example, method steps 108, 110, 112 can be performed sequentially on the front side of the solar cell 10 before the corresponding steps 108, 110, 112 can be performed on the back side of the solar cell 10. Alternatively, the back layers 32, 34, 36 can be deposited first before the front layers 22, 24, 26 are deposited.

[0133] Finally, the seventh method step 114 includes arranging the front electrode 40 and the back electrode 42 on the outermost surfaces of the front and rear portions 18, 20 of the solar cell 10.

[0134] The present invention is not limited to the embodiments described above, and it will be understood that various modifications and improvements can be made without departing from the concepts described herein. Except where mutually exclusive, each feature can be used individually or in combination with other features, and this disclosure extends to and includes all combinations and subcombinations of one or more features described herein.

Claims

1. It is a solar cell, Crystalline silicon substrate, A first semiconductor layer disposed on the back surface of the substrate, A second semiconductor layer is disposed on the front surface of the substrate, which is configured to face the radiation source when the solar cell is in use. A first transparent conductive region disposed on the surface of the first semiconductor layer, First back layer having a first back surface work function, The second back surface layer has a second back surface work function and is sandwiched between the first back surface layer and the first semiconductor layer. Equipped with, The second back surface work function of the second back surface layer is greater than the first back surface work function of the first back surface layer. a first transparent conductive region; A second transparent conductive region disposed on the surface of the second semiconductor layer, A first front layer having a first front work function, A second front layer having a second front work function, sandwiched between the first front layer and the second semiconductor layer, Equipped with, The second front work function of the second front layer is greater than the first front work function of the first front layer. a second transparent conductive region; A solar cell equipped with [a specific feature / ability].

2. The solar cell according to claim 1, wherein the first semiconductor layer is configured to be positively conductive.

3. The solar cell according to claim 1 or 2, wherein the second back surface work function of the second back surface layer is configured to be less than the work function of the first semiconductor layer.

4. The solar cell according to any one of claims 1 to 3, wherein the difference between the work function of the first semiconductor layer and the second back surface work function of the second back surface layer is less than the difference between the work function of the first semiconductor layer and the first front surface work function of the first front surface layer.

5. The solar cell according to any one of claims 1 to 4, wherein the second back surface work function of the second back surface layer is configured to be up to 15% greater than the first back surface work function of the first back surface layer.

6. The first transparent conductive region comprises a third back layer interposed between the second back layer and the first semiconductor layer. The third back surface layer is configured to have a third back surface work function that is larger than the second back surface work function of the second back surface layer. A solar cell according to any one of claims 1 to 5.

7. The solar cell according to claim 6, wherein the third back surface layer is directly disposed on the first semiconductor layer.

8. The solar cell according to claim 7, wherein the third back surface work function of the third back surface layer is configured to be up to 15% greater than the second back surface work function of the second back surface layer.

9. The solar cell according to claim 7 or 8, wherein the work function of the third back surface layer is configured to be less than the work function of the first semiconductor layer.

10. A solar cell according to any one of claims 1 to 9, wherein the work function of the back surface layer furthest from the substrate is configured to be greater than 3.5 eV and less than 4.5 eV, and / or the work function of the back surface layer closest to the substrate is configured to be greater than 5.0 eV and less than 6.0 eV.

11. The solar cell according to any one of claims 1 to 10, wherein the work function of the first semiconductor layer is greater than 5.0 eV and less than 6.0 eV.

12. The first transparent conductive region has a thickness of less than 500 nm. The solar cell according to any one of claims 1 to 11, wherein each of the layers of the first transparent conductive region has a thickness of at least 20 nm and 50 nm or less.

13. The solar cell according to any one of claims 1 to 12, wherein at least one of the back layers of the first transparent conductive region is formed from a metal oxide material, and the first semiconductor layer is made of amorphous silicon (a-Si).

14. The solar cell according to claim 1, wherein the second semiconductor layer is configured to be negatively conductive.

15. The second transparent conductive region comprises a third front layer sandwiched between the second front layer and the second semiconductor layer. The solar cell according to claim 1 or claim 14, wherein the third front layer is configured to have a third front work function that is greater than the second front work function of the second front layer.

16. The solar cell according to claim 15, wherein the third front layer of the second transparent conductive region is directly disposed on the second semiconductor layer.

17. The solar cell according to any one of claims 1 to 16, wherein the second semiconductor layer defines the accumulator layer.

18. The solar cell according to any one of claims 1 to 17, wherein at least one of the front layers of the second transparent conductive region is formed from a metal oxide material, and the second semiconductor layer is made of amorphous silicon (a-Si).

19. A solar cell module comprising a plurality of solar cells according to any one of claims 1 to 18, wherein the plurality of solar cells are electrically coupled to one another.

20. A method for manufacturing solar cells, Steps to provide a crystalline silicon substrate, The step of arranging a first semiconductor layer on the back surface of the substrate, A step of arranging a second semiconductor layer positioned on the front surface of the substrate configured to face the radiation source when the solar cell is in use, The step of arranging a first transparent conductive region on the surface of the first semiconductor layer, The first transparent conductive region comprises a first back layer and a second back layer. Steps of arranging the second back layer on the first semiconductor layer, The step of arranging the first back layer on the second back layer such that the second back layer is sandwiched between the first back layer and the first semiconductor layer, It has, The method comprises the steps of: constructing the first back layer with a first back surface work function; and constructing the second back layer with a second back surface work function that is greater than the first back surface work function of the first back layer. Step, The step of arranging a second transparent conductive region on the surface of the second semiconductor layer, The second transparent conductive region comprises a first front layer and a second front layer. Steps of placing the second front layer on the second semiconductor layer, The step of arranging the first front layer on the second front layer so that the second front layer is interposed between the first front layer and the second semiconductor layer, It has, The method comprises the steps of configuring the first front layer with a first front work function, and configuring the second front layer with a second front work function that is larger than the first front work function of the first front layer. Step, A method of having.

21. The method according to claim 20, wherein the step of arranging the first semiconductor layer on the surface of the substrate includes configuring the first semiconductor layer to be of a positive conductivity type.

22. The first transparent conductive region comprises a third back layer interposed between the second back layer and the first semiconductor layer. The step of arranging the first transparent conductive region includes arranging the third back layer on the first semiconductor layer before depositing the second back layer, The method described above includes the step of constructing the third back layer with a third back work function that is larger than the second back work function of the second back layer. The method according to claim 20 or 21.

23. The method according to claim 22, wherein the third back surface layer is directly disposed on the first semiconductor layer.

24. The step of arranging the first transparent conductive region includes sequentially depositing the back surface layer of the first transparent conductive region on the first semiconductor layer using a sputtering process, Preliminarily, the method comprises the step of controlling at least one parameter of the sputtering process to determine the work function in at least one or each of the layers of the first transparent conductive region and / or the second transparent conductive region, wherein the at least one parameter includes at least one of gas composition, gas flow rate, or transparent conductive material. The method according to any one of claims 20 to 23.

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