Method for manufacturing a wiring board, and wiring board

Abstract

Suppression of cracks and delamination in wiring boards. [Solution] The method for manufacturing a wiring board according to the embodiment includes forming a laminate 1P including a core substrate 100 having a first surface 100f and a second surface 100s, a first build-up portion 10 and a second build-up portion 20, and dividing the laminate 1P into a plurality of wiring boards. Dividing the laminate 1P includes forming a first groove GB1 from the surface of the laminate 1P on the first build-up portion 10 side, forming a second groove GB2 from the surface of the laminate 1P on the second build-up portion 20 side, and cutting the core substrate 100 along the first groove GB1 or the second groove GB2, wherein the first groove GB1 and the second groove GB2 are formed such that their centers are offset from each other in the width direction of the first groove GB1 and the second groove GB2.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a wiring board and a wiring board.

Background Art

[0002] Patent Document 1 discloses a method for manufacturing a wiring board including cutting a substrate having resin layers formed on both sides of a glass substrate into a plurality of individual wiring boards along a dicing line using a dicing blade.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the method for manufacturing a wiring board disclosed in Patent Document 1, in the step of cutting the substrate with a dicing blade, defects such as crack generation in the glass substrate and peeling of the resin layer from the glass substrate may occur. Further, in a wiring board manufactured by the manufacturing method disclosed in Patent Document 1, peeling of the resin layer from the glass substrate may occur, for example, due to an external load during use.

Means for Solving the Problems

[0005] The present invention provides a method for manufacturing a wiring board, comprising forming a laminate including a core substrate having a first surface and a second surface opposite to the first surface, a first build-up portion laminated on the first surface, and a second build-up portion laminated on the second surface, and dividing the laminate into a plurality of wiring boards. Dividing the laminate includes forming a first groove from the surface of the laminate on the side of the first build-up portion, forming a second groove from the surface of the laminate on the side of the second build-up portion, and cutting the core substrate along the first groove or the second groove, wherein the first groove and the second groove are formed such that their centers are offset from each other in the width direction of the first groove and the second groove.

[0006] The wiring board of the present invention includes a core substrate having a first surface and a second surface opposite to the first surface, a first build-up portion laminated on the first surface, and a second build-up portion laminated on the second surface. At least a portion of one side surface of the first build-up portion and the second build-up portion is located inward of the wiring board in a plan view compared to the other side surface.

[0007] According to the manufacturing method of the wiring board and the wiring board of the embodiment of the present invention, it is believed that the occurrence of cracks in the core board and peeling of the build-up portion from the core board will be suppressed in the step of dividing the laminate into a plurality of wiring boards, in the post-step process, and when using the wiring board. [Brief explanation of the drawing]

[0008] [Figure 1] A cross-sectional view showing an example of a wiring board according to an embodiment of the present invention. [Figure 2] A cross-sectional view showing a first modified example of a wiring board according to an embodiment of the present invention. [Figure 3] A cross-sectional view showing a second modified example of a wiring board according to an embodiment of the present invention. [Figure 4A] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 4B]A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 4C] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 4D] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 5A] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 5B] A plan view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 5C] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 6A] A cross-sectional view showing a first modified example of groove formation in the manufacturing method of the wiring board of the embodiment. [Figure 6B] A cross-sectional view showing a second modified example of the groove formation method of the manufacturing method of the wiring board of the embodiment. [Figure 7A] A cross-sectional view showing a first modified example of cutting the core substrate in the manufacturing method of the wiring board of the embodiment. [Figure 7B] A cross-sectional view showing a second modified example of cutting the core substrate in the manufacturing method of the wiring board of the embodiment. [Figure 7C] A cross-sectional view showing a third modified example of the cutting of the core substrate in the manufacturing method of the wiring board of the embodiment. [Modes for carrying out the invention]

[0009] The method for manufacturing a wiring board of an embodiment and the wiring board of an embodiment will be described with reference to the drawings. Figure 1 shows a cross-sectional view of wiring board 1, which is an example of a wiring board of an embodiment and is also an example of a wiring board manufactured by the method for manufacturing a wiring board of an embodiment. Note that wiring board 1 is merely an example of a wiring board of an embodiment, or an example of a wiring board manufactured by the method for manufacturing a wiring board of an embodiment. For example, the laminated structure of the wiring board of an embodiment, or a wiring board manufactured by the method for manufacturing a wiring board of an embodiment, and the number of conductor layers and insulating layers included in these wiring boards may differ from the laminated structure of wiring board 1 in Figure 1 and the number of conductor layers and insulating layers included in wiring board 1. Also, in the drawings referenced in the following description, certain parts may be enlarged to make the disclosed embodiment easier to understand, and the size and length of each component may not be depicted in the exact proportions between them.

[0010] The wiring board 1 includes a core substrate 100 and a first build-up section 10 and a second build-up section 20, which are respectively composed of insulating layers and conductive layers alternately laminated on both sides of the core substrate 100. The wiring board 1 has two main surfaces perpendicular to its thickness direction: one surface 1F and the other surface 1S opposite to the first surface 1F.

[0011] The core substrate 100 included in the wiring board 1 has a first surface 100f and a second surface 100s opposite to the first surface 100f. On the first surface 100f of the core substrate 100, the insulating layers of a plurality of first insulating layers 11 and the conductive layers of a plurality of first conductive layers 12 are alternately laminated to form a first build-up section 10. On the second surface 100s of the core substrate 100, the insulating layers of a plurality of second insulating layers 21 and the conductive layers of a plurality of second conductive layers 22 are alternately laminated to form a second build-up section 20.

[0012] In the description of the wiring board 1 of the embodiment, the side closer to the core board 100 is referred to as "down", "inside", or "lower side", "inner side", and the side farther from the core board 100 is referred to as "up", "outside", or "upper side", "outer side". The surface of each element constituting the wiring board 1 facing the core board 100 is also referred to as the "lower surface", and the surface facing the side opposite to the core board 100 is also referred to as the "upper surface".

[0013] A through-conductor 101 penetrating the core board 100 in the thickness direction is formed in the core board 100. In the first insulating layer 11 constituting the first build-up portion 10, a first via conductor 13 for connecting conductors facing each other across the first insulating layer 11 is formed. In the second insulating layer 21 constituting the second build-up portion 20, a second via conductor 23 for connecting conductors facing each other across the second insulating layer 21 is formed.

[0014] The through-conductor 101 is formed by filling a through-hole 101a formed in the core board 100 with a conductor. The first via conductor 13 is formed by filling a through-hole 13a formed in the first insulating layer 11 with a conductor, and is integrally formed with the first conductor layer 12 located above each first via conductor 13. The second via conductor 23 is formed by filling a through-hole 23a formed in the second insulating layer 21 with a conductor, and is integrally formed with the second conductor layer 22 above each second via conductor 23.

[0015] The core board 100 included in the wiring board 1 may be a silicon substrate, a ceramic substrate, a resin substrate, etc., and the material of the core board 100 is not particularly limited. Also, the core board 100 may be formed of glass. Therefore, the core board 100 may include a glass plate or may be composed of a glass plate. As the glass material used for the glass plate constituting the core board 100, for example, soda-lime glass, borosilicate glass, or alkali-free glass, etc. may be used. These glasses may contain elements such as magnesium, calcium, manganese, aluminum, lead, iron, chromium, potassium, sulfur, antimony, boron, etc. as additives.

[0016] The first insulating layer 11 and the second insulating layer 21 are formed using any insulating resin. Examples of the insulating resin include thermosetting resins such as epoxy resin, bismaleimide triazine resin (BT resin), or phenolic resin, and thermoplastic resins such as fluororesin, liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE) resin, polyester (PE) resin, and modified polyimide (MPI) resin. The first insulating layer 11 and the second insulating layer 21 may contain inorganic fillers (not shown) such as silica and alumina. The first insulating layer 11 and the second insulating layer 21 may contain reinforcing materials (core materials) such as glass fiber and aramid fiber.

[0017] Examples of the conductors constituting the first conductor layer 12, the second conductor layer 22, the first via conductor 13, the second via conductor 23, and the through conductor 101 include copper, nickel, titanium, tungsten, palladium, and the like. Each of these conductors is preferably made of copper. In the example shown in FIG. 1, the first conductor layer 12, the second conductor layer 22, the first via conductor 13, the second via conductor 23, and the through conductor 101 are each shown as being composed of one layer, but they may have a multilayer structure composed of a metal foil, an electroless plating film, a sputtering film, and / or an electrolytic plating film.

[0018] The first conductor layer 12 and the second conductor layer 22 each contain a predetermined conductor pattern. The first conductor layer 12 constituting one surface 1F of the wiring board 1 contains a plurality of conductor pads 12fp. The second conductor layer 22 constituting the other surface 1S of the wiring board 1 contains a plurality of conductor pads 22sp.

[0019] The wiring board 1 has a solder resist layer 10Rf covering the first build-up portion 10 on one side 1F. An opening 10Rfa is formed in the solder resist layer 10Rf, and a conductor pad 12fp is exposed through the opening 10Rfa. The wiring board 1 further has a solder resist layer 20Rs covering the second build-up portion 20 on the other side 1S. An opening 20Rsa is formed in the solder resist layer 20Rs, and a conductor pad 22sp is exposed through the opening 20Rsa. The solder resist layers 10Rf and 20Rs may be formed from, for example, a photosensitive polyimide resin or an epoxy resin.

[0020] One side 1F of the illustrated example wiring board 1 may be a component mounting surface to which external electronic components (not shown) are connected. Conductor pads 12fp may be connected to electrodes of external electronic components when the wiring board 1 is in use. The wiring board 1 may also be connected with its other side 1S facing an external board (not shown), for example, the motherboard of any electrical device, when the wiring board 1 is in use. In that case, conductor pads 22sp may be used for connection to the external board.

[0021] As described later, a wiring board in an embodiment like the wiring board 1 in Figure 1 is manufactured by dividing a laminate of a conductor layer and an insulating layer, which includes multiple wiring boards, into individual wiring boards. The side walls of each individual wiring board are exposed by this fragmentation. In the fragmentation process in the manufacturing method of the wiring board in the embodiment described later, the laminate of the conductor layer and the insulating layer is divided into individual wiring boards in a manner that makes it difficult for unintended cracks to occur in the core substrate. Therefore, it is thought that a wiring board in an embodiment like the wiring board 1 in Figure 1 is formed with a good yield, and the occurrence of defects during use due to the manifestation of latent cracks is also suppressed. The "side wall" of the wiring board 1 is the outer wall surface of the wiring board 1 that connects one surface 1F and the other surface 1S along the thickness direction of the wiring board 1.

[0022] The wiring board of the embodiment may have two opposing side walls, such as the side wall S1 (first side wall) and side wall S2 (second side wall) shown in Figure 1. Furthermore, the wiring board of the embodiment may have two sets of two opposing side walls. That is, the wiring board of the embodiment may have a rectangular shape in plan view, and multiple wiring boards may be connected in a grid pattern until they are made into individual pieces. Note that "plan view" means viewing the object from a line of sight parallel to the thickness direction of the wiring board of the embodiment. Also, "planar shape" as used in the following description means the shape of each object as observed in plan view.

[0023] In the wiring board 1 shown in Figure 1, the side wall S1 of the wiring board 1 is composed of the side surface G11 of the first build-up section 10, the side surface CS1 of the core substrate 100, and the side surface G21 of the second build-up section 20. The side surface G11 of the first build-up section 10 is composed of a first portion G11a located on the core substrate 100 side and in contact with the side surface CS1 of the core substrate 100, and a second portion G11b located on the surface side of the wiring board 1 and in contact with one of the surfaces 1F. The first portion G11a is also the portion of the side surface G11 that is flush with the side surface CS1 of the core substrate 100. The side surface G11 of the first build-up section 10 has a step between the first portion G11a and the second portion G11b. The side surface G21 of the second build-up section 20 is composed of a first portion G21a located on the core substrate 100 side and in contact with the side surface CS1 of the core substrate 100, and a second portion G21b located on the surface side of the wiring board 1 and in contact with the other surface 1S. The first portion G21a is also the portion of the side surface G21 that is flush with the side surface CS1 of the core substrate 100. The side surface G21 of the second build-up section 20 has a step between the first portion G21a and the second portion G21b.

[0024] On the other hand, the side wall S2 of the wiring board 1 is composed of the side surface G12 of the first build-up section 10, the side surface CS2 of the core substrate 100, and the side surface G22 of the second build-up section 20. The side surface G12 of the first build-up section 10 is composed of a first portion G12a located on the core substrate 100 side and in contact with the side surface CS2 of the core substrate 100, and a second portion G12b located on the surface side of the wiring board 1 and in contact with one of the surfaces 1F. The first portion G12a is also the portion of the side surface G12 that is flush with the side surface CS2 of the core substrate 100. The side surface G12 of the first build-up section 10 has a step between the first portion G12a and the second portion G12b. The side surface G22 of the second build-up section 20 is composed of a first portion G22a located on the core substrate 100 side and in contact with the side surface CS2 of the core substrate 100, and a second portion G22b located on the surface side of the wiring board 1 and in contact with the other surface 1S. The first portion G22a is also the portion of the side surface G22 that is flush with the side surface CS2 of the core substrate 100. The side surface G22 of the second build-up section 20 has a step between the first portion G22a and the second portion G22b.

[0025] Furthermore, in the wiring board 1, as shown in Figure 1, at least a portion of one side surface of the first build-up portion 10 and the second build-up portion 20 is located further inward in a plan view than the other side surface on each of the side walls S1 and S2. Also, in the wiring board 1 of Figure 1, at least a portion of the side surface of the core substrate 100 protrudes more than at least a portion of the side surface of the first build-up portion 10 and at least a portion of the side surface of the second build-up portion 20 on each of the side walls S1 and S2.

[0026] Specifically, in the example in Figure 1, on the side wall S1 side of the wiring board 1, the second portion G21b, which is part of the side surface G21 of the second build-up portion 20, is located inside the wiring board 1 more than the first portion G11a and second portion G11b of the side surface G11 of the first build-up portion 10. In other words, the first portion G11a and second portion G11b of the side surface G11 of the first build-up portion 10 are located outside the second portion G21b of the side surface G21 of the second build-up portion 20. The side surface CS1 of the core substrate 100 is also located outside the wiring board 1 more than the second portion G21b of the side surface G21 of the second build-up portion 20.

[0027] On the other hand, in the example in Figure 1, on the side wall S2 side of the wiring board 1, the second portion G12b, which is part of the side surface G12 of the first build-up portion 10, is located inside the wiring board 1 more than the first portion G22a and second portion G22b of the side surface G22 of the second build-up portion 20. In other words, the first portion G22a and second portion G22b of the side surface G22 of the second build-up portion 20 are located outside the second portion G12b of the side surface G12 of the first build-up portion 10. The side surface CS2 of the core board 100 is also located outside the wiring board 1 more than the second portion G12b of the side surface G12 of the first build-up portion 10.

[0028] In other words, in the wiring board 1 of the embodiment, at least a portion of the side surface G11 of the first build-up section 10 and at least a portion of the side surface G21 of the second build-up section 20 do not overlap in a plan view. Also, at least a portion of the side surface G12 of the first build-up section 10 and at least a portion of the side surface G22 of the second build-up section 20 do not overlap in a plan view. Furthermore, the side surface CS1 of the core board 100 does not overlap with the entire side surface G11 of the first build-up section 10 and the entire side surface G21 of the second build-up section 20 in a plan view. Similarly, the side surface CS2 of the core board 100 does not overlap with the entire side surface G12 of the first build-up section 10 and the entire side surface G22 of the second build-up section 20 in a plan view.

[0029] In this embodiment of the wiring board, since at least a portion of the side surface of the first build-up portion and at least a portion of the side surface of the second build-up portion do not overlap, it is thought that the stress generated in the core substrate and each build-up portion is distributed. That is, if the entire side surface of the first build-up portion and the entire side surface of the second build-up portion are flush, the stress generated in response to changes in ambient temperature due to the difference between the thermal expansion coefficient of each build-up portion and the thermal expansion coefficient of the core substrate is thought to concentrate at the interface between each build-up portion and the core substrate at both ends of the wiring board. For example, it is estimated that stress is likely to concentrate at two locations indicated by points P on the side wall S2 side in Figure 1. It is also thought that stress is likely to concentrate at similar locations on the side wall S1 side.

[0030] However, in actual wiring boards, the sides of the core board do not overlap with at least a portion of the sides of the first and second build-up sections, so stress concentration points are dispersed. For example, in Figure 1, the stress concentration occurring on the side wall S2 side of the wiring board 1 is dispersed not only to point P, but also to point P1 at the step between the second part G12b and the first part G12a of the side G12 of the first build-up section 10. Furthermore, the stress concentration occurring on the side wall S2 side is also dispersed to point P2 at the step between the second part G22b and the first part G22a of the side G22 of the second build-up section 20. Similarly, stress concentration points are dispersed on the side wall S1 side as well. And points P1 and P2 do not overlap in a plan view. In other words, since the stress concentration points are distributed to different locations in a plan view on the first build-up section 10 side and the second build-up section 20 side, it is thought that the occurrence of cracks in the core substrate 100 and delamination of each build-up section from the core substrate 100 due to excessive stress concentration is suppressed.

[0031] Furthermore, in the wiring board 1 shown in Figure 1, on one of the opposing side walls S1 and S2, at least a portion of the side surface of the first build-up section 10 is located inward in a plan view compared to the side surface of the second build-up section 20. On the other side wall S1 and S2, the side surface of the first build-up section 10 is located outward in a plan view compared to at least a portion of the side surface of the second build-up section 20. In other words, in the example shown in Figure 1, on the side wall S2 of the wiring board 1, the second portion G12b of the side surface G12 of the first build-up section 10 is located inward in a plan view compared to the side surface G22 of the second build-up section 20. And on the side wall S1, the side surface G11 of the first build-up section 10 is located outward in a plan view compared to the second portion G21b of the side surface G21 of the second build-up section 20.

[0032] Therefore, in the direction in which side walls S1 and S2 face each other (indicated by arrow X in Figure 1, and hereinafter also referred to as the "X direction"), the center of gravity of the first build-up 10 and the center of gravity of the second build-up 20 are offset from each other and do not overlap. Therefore, when warping occurs in the first build-up section 10 and the second build-up section 20 due to temperature changes, it is considered that the centers of the warping occurring in each build-up section do not overlap in a plan view. Therefore, compared to the case where the centers of the warping occurring in each build-up section overlap in a plan view, it is considered that the load on the core substrate 100 due to temperature changes is reduced. Consequently, it is presumed that the occurrence of cracks in the core substrate 100 is suppressed.

[0033] In addition, as one embodiment of the wiring board 1 comprising a first build-up 10 and a second build-up 20 whose centers of gravity do not overlap in the X direction, the wiring board of the embodiment may have a shape that is point-symmetric with respect to the center of the core board in a cross-section along its thickness direction.

[0034] In addition, in the wiring board 1, conductive layers such as the first conductive layer 12 and the second conductive layer 22 may be formed directly on the first surface 100f and the second surface 100s of the core substrate 100, without an insulating layer in between. In that case, a portion of the conductive layer directly formed on the first surface 100f may be exposed between the side surface G11 of the first build-up portion 10 and the side surface CS1 of the core substrate 100 on the side wall S1 side of the wiring board 1. Similarly, a portion of the conductive layer directly formed on the second surface 100s may be exposed between the side surface G21 of the second build-up portion 20 and the side surface CS1 of the core substrate 100. On the side wall S2 side of the wiring board 1, a portion of the conductive layer directly formed on the first surface 100f of the core substrate 100 and / or a portion of the conductive layer directly formed on the second surface 100s of the core substrate 100 may be exposed.

[0035] In the wiring board 1 example shown in Figure 1, the first build-up portion 10 has a thin layer portion 41 at the ends on the side wall S1 and side wall S2 of the wiring board 1, and the second build-up portion 20 has a thin layer portion 42. The thin layer portion 41 is a portion of the first build-up portion 10 that has a thickness thinner than the central portion of the first build-up portion 10, and the thin layer portion 42 is a portion of the second build-up portion 20 that has a thickness thinner than the central portion of the second build-up portion 20. The thickness of the thin layer portion 41 and the thin layer portion 42 may be, for example, 0.3 μm or more and 40 μm or less. The thin layer portion 41 and the thin layer portion 42 may protect the core substrate 100 from impacts that may be applied from the outside.

[0036] The thin layer 41 covers the first surface 100f of the core substrate 100 between the first portion G11a and the second portion G11b of the side surface G11 of the first build-up portion 10 on the side wall S1 side. The thin layer 41 also covers the first surface 100f of the core substrate 100 between the first portion G12a and the second portion G12b of the side surface G12 of the first build-up portion 10 on the side wall S2 side. In the example in Figure 1, the thin layer 41 is formed by a portion of the first insulating layer 11, which is directly formed on the core substrate 100, among a plurality of first insulating layers 11.

[0037] The thin layer 42 covers the second surface 100s of the core substrate 100 between the first portion G21a and the second portion G21b of the side surface G21 of the second build-up portion 20 on the side wall S1 side. The thin layer 42 also covers the second surface 100s of the core substrate 100 between the first portion G22a and the second portion G22b of the side surface G22 of the second build-up portion 20 on the side wall S2 side. In the example in Figure 1, the thin layer 42 is formed by a portion of the second insulating layer 21, which is directly formed on the core substrate 100, among a plurality of second insulating layers 21.

[0038] Furthermore, at the ends of the core substrate 100 on the side wall S1 and side wall S2 of the wiring board 1, a portion of the first surface 100f and / or a portion of the second surface 100s of the core substrate 100 may be exposed without being covered by the first insulating layer 11 and the second insulating layer 21. In other words, the thin layer portion 41 and / or the thin layer portion 42 may not be provided. For example, on the side wall S1 side of the wiring board 1, the side surface G11 of the first build-up portion 10 and the side surface G21 of the second build-up portion 20 may only have portions that are located inside the wiring board 1 beyond the side surface CS1 of the core substrate 100. Similarly, on the side wall S2 side, the side surface G12 of the first build-up portion 10 and the side surface G22 of the second build-up portion 20 may only have portions that are located inside the wiring board 1 beyond the side surface CS2 of the core substrate 100.

[0039] <Modified example of the wiring board of the embodiment> Figures 2 and 3 show wiring board 1a, a first modification of the wiring board of the embodiment, and wiring board 1b, a second modification, respectively. Referring to Figures 2 and 3, each modification of the wiring board of the embodiment will be described below in relation to the differences from wiring board 1 in Figure 1. In Figures 2 and 3, components similar to those of wiring board 1 in Figure 1 are either given the same reference numerals as in Figure 1 or omitted, and repeated explanations of such similar components are omitted as appropriate.

[0040] In the wiring board 1a of Figure 2, the first build-up portion 10 has a generally flat side surface G11 on the side wall S1. The side surface G11 is in contact with the side surface CS1 of the core substrate 100 at one end and with one surface 1F of the wiring board 1a at the other end. The side surface G11 is flush with the side surface CS1 of the core substrate 100. Also, the second build-up portion 20 on the side wall S1 has a side surface G21 that includes a first portion G21a and a second portion G21b, similar to the second build-up portion 20 of the wiring board 1 in Figure 1. The second portion G21b of the side surface G21 of the second build-up portion 20 is located inside the wiring board 1a compared to the side surface G11 of the first build-up portion 10 and the side surface CS1 of the core substrate 100.

[0041] On the other hand, in the side wall S2, the second build-up portion 20 has an overall flat side surface G22. The side surface G22 is in contact with the side surface CS2 of the core substrate 100 at one end and with the other side surface 1S of the wiring board 1a at the other end. The side surface G22 is flush with the side surface CS2 of the core substrate 100. Also, in the side wall S2, the first build-up portion 10 has a side surface G12 including a first portion G12a and a second portion G12b, similar to the first build-up portion 10 of the wiring board 1 in Figure 1. The second portion G12b of the side surface G12 of the first build-up portion 10 is located inside the wiring board 1a compared to the side surface G22 of the second build-up portion 20 and the side surface CS2 of the core substrate 100.

[0042] In the wiring board 1a, as described above for the wiring board 1, it is thought that stress concentration points that may occur in the wiring board 1a are distributed to the positions indicated by point P1 and point P2. Therefore, it is thought that cracks in the core substrate 100 and delamination of each build-up part from the core substrate 100 are suppressed.

[0043] Furthermore, in the wiring board 1a, in the side wall S2, the second portion G12b of the side surface G12 of the first build-up portion 10 is located inward in a plan view than the side surface G22 of the second build-up portion 20, and in the side wall S1, the side surface G11 of the first build-up portion 10 is located outward in a plan view than the second portion G21b of the side surface G21 of the second build-up portion 20. In other words, in the X direction, the center of gravity of the first build-up 10 and the center of gravity of the second build-up 20 are offset from each other and do not overlap. Therefore, as described above regarding the wiring board 1, it is presumed that the occurrence of cracks in the core substrate 100 is suppressed. Note that the wiring board 1a, like the wiring board 1, may have a shape that is point-symmetric with respect to the center of the core substrate 100 in a cross-section along its thickness direction.

[0044] In the wiring board 1b of Figure 3, similar to the wiring board 1 of Figure 1, the first build-up portion 10 has a side surface G11 including a first portion G11a and a second portion G11b on the side wall S1, and the second build-up portion 20 has a side surface G21 including a first portion G21a and a second portion G21b. The second portion G21b of the side surface G21 of the second build-up portion 20 is located inside the wiring board 1b compared to the side surface G11 of the first build-up portion 10 and the side surface CS1 of the core substrate 100.

[0045] On the other hand, the second build-up portion 20 on the side wall S2 has a flat side surface G22 that is flush with the side surface CS2 of the core substrate 100, similar to the second build-up portion 20 of the wiring board 1a in Figure 2. The side surface G22 is in contact with the side surface CS2 of the core substrate 100 at one end and in contact with the other side surface 1S of the wiring board 1b at the other end. Also, the first build-up portion 10 on the side wall S2 has a side surface G12 that includes a first portion G12a and a second portion G12b, similar to the first build-up portion 10 of the wiring board 1 in Figure 1. The second portion G12b of the side surface G12 of the first build-up portion 10 is located inside the wiring board 1b compared to the side surface G22 of the second build-up portion 20 and the side surface CS2 of the core substrate 100.

[0046] In the wiring board 1b, as described above for the wiring board 1, it is thought that stress concentration points that may occur in the wiring board 1b are distributed to the locations indicated by points P1 and P2. Therefore, it is thought that cracks in the core substrate 100 and delamination of each build-up portion from the core substrate 100 are suppressed.

[0047] Furthermore, in the wiring board 1b, in the side wall S2, the second portion G12b of the side surface G12 of the first build-up portion 10 is located inward in a plan view than the side surface G22 of the second build-up portion 20, and in the side wall S1, the second portion G11b of the side surface G11 of the first build-up portion 10 is located outward in a plan view than the second portion G21b of the side surface G21 of the second build-up portion 20. In other words, in the X direction, the center of gravity of the first build-up 10 and the center of gravity of the second build-up 20 are offset from each other and do not overlap. Therefore, as mentioned above regarding the wiring board 1, it is presumed that the occurrence of cracks in the core board 100 is suppressed.

[0048] <Method for manufacturing a wiring board according to an embodiment> Next, with reference to Figures 4A to 4D and Figures 5A to 5C, the manufacturing method of the wiring board according to the embodiment will be described using the case in which the wiring board 1 shown in Figure 1 is manufactured as an example. In the manufacturing method of the wiring board described below, each component formed may be formed using the materials exemplified as the materials for the corresponding components in the description of the wiring board 1 in Figure 1, unless otherwise specified.

[0049] The manufacturing method of the wiring board of this embodiment includes forming a laminate comprising a core substrate, a first build-up portion laminated on the first surface of the core substrate, and a second build-up portion laminated on the second surface of the core substrate, and dividing the laminate into a plurality of wiring boards. Here, "laminated body" refers to a plurality of wiring boards in a connected state before being separated into individual pieces. First, the formation of laminate 1P (see Figure 4D) will be described with reference to Figures 4A to 4D.

[0050] As shown in Figure 4A, a core substrate 100 is prepared. The material of the core substrate 100 is not particularly limited, but Figure 4A shows an example in which a glass plate 100P containing, for example, soda-lime glass, borosilicate glass, or alkali-free glass is used. Through holes 101a are formed in the glass plate 100P. For example, a modified area is formed in the glass plate 100P at the position where the through holes 101a are to be formed by irradiation with laser light, and the through holes 101a are formed by removing the modified area with, for example, an etching solution containing an aqueous solution of hydrogen fluoride. For the laser light that forms the modified area, a helium-neon laser, an argon ion laser, an excimer laser, and various YAG lasers can be used.

[0051] After the through-hole 101a is formed, the inside of the through-hole 101a is filled with a conductor, and a conductor is formed to cover two surfaces of the glass plate 100P that are perpendicular to the thickness direction. For example, a first metal film (not shown) is formed on the inner wall surface of the through-hole 101a and on the two surfaces of the glass plate 100P by electroless plating or sputtering, and a second metal film (not shown) made of a plating film is formed on the first metal film by electroplating using the formed first metal film as a power supply layer. A through-conductor made of the first and second metal films is formed in the through-hole 101a, and the two surfaces of the glass plate 100P are covered with a two-layer conductor made of the first and second metal films. Subsequently, the layers of conductor covering both sides of the glass plate 100P are removed, for example, by CMP (chemical mechanical polishing). As shown in Figure 4A, a core substrate 100 is formed, which includes a glass plate 100P having a first surface 100f and a second surface 100s opposite to the first surface 100f. The core substrate 100 includes a plurality of wiring board forming regions BA corresponding to a plurality of connected wiring boards to be manufactured.

[0052] As shown in Figure 4B, a first insulating layer 11 is laminated to cover the first surface 100f of the core substrate 100, and a first conductor layer 12 is formed on top of the first insulating layer 11. Simultaneously with the formation of the first conductor layer 12, a first via conductor 13 is formed integrally with the first conductor layer 12. The first insulating layer 11 is laminated over a plurality of wiring board formation regions BA, and the first conductor layer 12 and the first via conductor 13 are formed in each region of the plurality of wiring board formation regions BA. In addition, a second insulating layer 21 is formed to cover the second surface 100s of the core substrate 100, and a second conductor layer 22 is formed on top of the second insulating layer 21. Simultaneously with the formation of the second conductor layer 22, a second via conductor 23 is formed integrally with the second conductor layer 22. The second insulating layer 21 is laminated over a plurality of wiring board formation regions BA, and the second conductor layer 22 and the second via conductor 23 are formed in each region of the plurality of wiring board formation regions BA.

[0053] The first insulating layer 11 and the second insulating layer 21 can be formed by thermocompression bonding of a film-like insulating resin (e.g., epoxy resin) onto the surface (first surface 100f and second surface 100s) of the core substrate 100. Through holes 13a are formed in the first insulating layer 11 at the positions where the first via conductor 13 is to be formed, for example by irradiation with carbon dioxide laser light. A metal film (not shown) is formed on the inner surface of the through holes 13a and the upper surface of the first insulating layer 11 by electroless plating or sputtering. An electroplated film (not shown) is formed on the power supply layer by pattern plating using electroplating, with the formed metal film used as the power supply layer. As a result, the first conductor layer 12 and the first via conductor 13 are formed. The second insulating layer 21, the second conductor layer 22, and the second via conductor 23 are formed on the second surface 100s side of the core substrate 100 in the same manner as the formation of the first insulating layer 11, the first conductor layer 12, and the first via conductor 13.

[0054] As shown in Figure 4C, on the upper side of the first surface 100f of the core substrate 100, two more sets of the first insulating layer 11 and the first conductor layer 12 are formed by repeating the same process as described above for forming the first insulating layer 11 and the first via conductor 13 and the first conductor layer 12. A conductor pad 12fp is provided on the outermost first conductor layer 12. Similarly, on the upper side of the second surface 100s, two more sets of the second insulating layer 21 and the second conductor layer 22 are formed by repeating the same process as described above for forming the second insulating layer 21 and the second via conductor 23 and the second conductor layer 22. A conductor pad 22sp is provided on the outermost second conductor layer 22. The formation of each insulating layer, each conductor layer, and each via conductor is repeated a desired number of times depending on the number of conductor layers and insulating layers in the wiring board to be manufactured.

[0055] As shown in Figure 4D, a solder resist layer 10Rf is formed over multiple wiring board formation regions BA on the outermost first conductor layer 12 and first insulating layer 11 on the first surface 100f side of the core substrate 100, having an opening 10Rfa that exposes the conductor pad 12fp. On the outermost second conductor layer 22 and second insulating layer 21 on the second surface 100s side of the core substrate 100, a solder resist layer 20Rs is formed over multiple wiring board formation regions BA, having an opening 20Rsa that exposes the conductor pad 22sp. The formation of a laminate 1P is completed in which multiple wiring boards, each having one surface 1F and the other surface 1S opposite to the first surface 1F, are connected.

[0056] The process of dividing the formed laminate 1P into individual wiring boards 1 will be described below with reference to Figures 5A to 5C. Figure 5B is a plan view of the laminate 1P and shows one wiring board formation region BA and its surrounding area in the laminate 1P. In Figures 5A and 5B, the boundary BD between multiple wiring boards in the laminate 1P is virtually shown by a dashed line. In the manufacturing method of the wiring board of this embodiment, dividing the laminate includes forming a first groove from the surface on the first build-up portion side of the laminate, forming a second groove from the surface on the second build-up portion side of the laminate, and cutting the core substrate along the first groove or the second groove.

[0057] First, as shown in Figures 5A and 5B, the first groove GB1 is formed by drilling the first build-up portion 10 in the thickness direction of the laminate 1P from the surface on the side of the first build-up portion 10 along the boundary BD between the multiple wiring boards 1. Also, the second groove GB2 is formed by drilling the second build-up portion 20 in the thickness direction of the laminate 1P from the surface on the side of the second build-up portion 20 along the boundary BD. The first groove GB1 and the second groove GB2 may be formed simultaneously, or one may be formed first.

[0058] The first groove GB1 and the second groove GB2 may be formed, for example, by irradiating the laminate 1P from the outside of the first build-up portion 10 or the second build-up portion 20 with laser light, such as a carbon dioxide laser. Alternatively, the first groove GB1 and the second groove GB2 may be formed by cutting the first build-up portion 10 or the second build-up portion 20 using a dicing blade commonly used for dicing, such as a diamond blade in which diamond abrasive grains are embedded in resin. Preferably, the first groove GB1 and the second groove GB2 are formed over the entire periphery of the wiring substrate formation region BA so as to surround the individual wiring substrate formation regions BA in a plan view, as shown in Figure 5B.

[0059] In the manufacturing method of the wiring board according to the embodiment, as shown in Figures 5A and 5B, the first groove GB1 and the second groove GB2 are formed such that the center C1 of the first groove GB1 and the center C2 of the second groove GB2 are offset from each other in the width direction of the first groove GB1 and the second groove GB2. The "width direction" of the first groove GB1 and the second groove GB2 is the direction perpendicular to the direction in which each groove extends, and in Figure 5A, it is the X direction indicated by arrow X. In other words, in the manufacturing method of the wiring board according to the embodiment, the center C1 of the first groove GB1 in the width direction and the center C2 of the second groove GB2 in the width direction are formed so that they do not overlap in a plan view. To put it another way, at least one of the first groove GB1 and the second groove GB2 formed in the manufacturing method of the wiring board according to the embodiment has a portion that does not overlap with the other at least partially in a plan view in the width direction of the first groove GB1 and the second groove GB2.

[0060] In the manufacturing method of the wiring board of this embodiment, the first groove GB1 and the second groove GB2 are formed in this manner, which is thought to suppress the unintended fracture of the laminate 1P during the manufacturing process of the wiring board. That is, if the first groove GB1 and the second groove GB2, which are formed on either side of the core substrate 100, completely overlap in a plan view, stress caused by external mechanical impacts is likely to concentrate at the same location in a plan view on both the front and back of the core substrate. Therefore, there is a concern that the core substrate 100 or the entire laminate 1P may fracture between stress concentration points that occur at the same location in a plan view. Furthermore, if each groove is formed sequentially on both the front and back of the core substrate 100, the stress during the formation of the later-formed groove may concentrate between the groove being formed and the groove formed earlier at the same location in a plan view, which is a concern as it may cause unintended cracks in the core substrate or laminate.

[0061] To address these concerns, in the manufacturing method of the wiring board of this embodiment, both grooves are formed such that the center C1 of the first groove GB1 and the center C2 of the second groove GB2 do not overlap in a plan view. Therefore, the stress concentration between the two grooves during the manufacturing process described above is mitigated. As a result, it is believed that the occurrence of unintended cracks in the core substrate 100 and the laminate 1P is suppressed. In particular, if the core substrate 100 contains a hard and therefore relatively brittle glass plate, the manufacturing method of the wiring board of this embodiment is considered to be effective in the manufacturing of the wiring board.

[0062] In the example shown in Figures 5A and 5B, the first groove GB1 of the two grooves GB2 is formed so as to partially overlap the second groove GB2 in a plan view, and the second groove GB2 is also formed so as to partially overlap the first groove GB1 in a plan view. The first groove GB1 and the second groove GB2 have a length D1 (see Figure 5B) of the portion of their widths that overlaps each other in a plan view, and a length D2 (see Figure 5B) of the portions of their widths that do not overlap each other in a plan view. The widths of the first groove GB1 and the second groove GB2 are, for example, 400 μm to 600 μm, and may be the same or different from each other. Furthermore, the length D of the difference (shift) in the width direction between the position of the center C1 of the first groove GB1 and the position of the center C2 of the second groove GB2 (see Figure 5A; length D is also referred to as "offset amount D" below) may be, for example, 50 μm to 300 μm. When the first groove GB1 and the second groove GB2 are formed with such an overlap or offset amount D, it is thought that the effect of preventing cracking of the core substrate 100 during the process described above can be obtained. Moreover, in the cutting process described later, the core substrate 100 can be easily cut at the part where the first groove GB1 and the second groove GB2 overlap, and therefore the laminate 1P can be easily divided.

[0063] Furthermore, in the example shown in Figure 5A, the first groove GB1 is formed so as not to reach the first surface 100f of the core substrate 100. The first groove GB1 exposes the bottom surface of the first insulating layer 11, which is directly formed on the first surface 100f of the core substrate 100, among the plurality of first insulating layers 11 constituting the first build-up portion 10. Similarly, the second groove GB2 is formed so as not to reach the second surface 100s of the core substrate 100. The second groove GB2 exposes the bottom surface of the second insulating layer 21, which is directly formed on the second surface 100s of the core substrate 100, among the plurality of second insulating layers 21 constituting the second build-up portion 20.

[0064] As described above, in the manufacturing method of the wiring board according to this embodiment, forming the first groove GB1 may include exposing the first insulating layer 11 constituting the first build-up portion 10 to the bottom surface of the first groove GB1. Similarly, forming the second groove GB2 may include exposing the second insulating layer 21 constituting the second build-up portion 20 to the bottom surface of the second groove GB2. Since the first groove GB1 is formed so that the first insulating layer 11 is exposed to the bottom surface, the first surface 100f of the core substrate 100 is covered by the first insulating layer 11 even after the first groove GB1 is formed. Similarly, since the second groove GB2 is formed so that the second insulating layer 21 is exposed to the bottom surface, the second surface 100s of the core substrate 100 is covered by the second insulating layer 21 even after the second groove GB2 is formed. Therefore, each insulating layer can protect the surface of the core substrate 100, which may include, for example, a glass plate, from external loads.

[0065] After the formation of the first groove GB1 and the second groove GB2, the laminate 1P is cut along the first groove GB1, starting from the GB1 side, as shown in Figure 5C. That is, the remaining portion of the first build-up section 10, the core substrate 100, and the remaining portion of the second build-up section 20 are cut. Specifically in the example in Figure 5C, the first insulating layer 11 directly formed on the first surface 100f of the core substrate 100, the core substrate 100, and the second insulating layer 21 directly formed on the second surface 100s of the core substrate 100 are cut continuously. Although Figure 5C shows an example where the laminate 1P is cut from the GB1 side, the remaining portion of the second build-up section 20, the core substrate 100, and the remaining portion of the first build-up section 10 may also be cut along the GB2 side, starting from the GB2 side.

[0066] Cutting of the laminate 1P along the first groove GB1 or the second groove GB2 can be performed, for example, by a dicing blade DB. For example, a diamond blade in which diamond abrasive grains are embedded in resin may be used. Alternatively, the laminate 1P may be cut by scribing the core substrate 100, etc., using a suitable scribing device. Once the core substrate 100 and the first and second build-up sections 10, 20 are completely cut, the connected plurality of wiring boards 1 are completely separated and fragmented into individual wiring boards 1.

[0067] As previously mentioned in the prior art literature, when a laminate in which build-up portions are formed on both sides of a core substrate is continuously cut with a dicing blade from one surface to the other, defects such as cracks in the core substrate and delamination between the core substrate and the build-up portion may occur. In other words, it is thought that frictional heat is generated due to friction between the dicing blade and the laminate during the cutting process from one surface of the laminate to the core substrate. Therefore, at the point when the dicing blade and the core substrate come into contact, thermal stress may concentrate near the interface between the build-up portion and the core substrate near the dicing blade. This concentration of thermal stress may cause cracks to occur in the core substrate when it comes into contact with the dicing blade, and may also cause delamination between the build-up portion and the core substrate.

[0068] In contrast, in the manufacturing method of the wiring board of the embodiment, the first groove GB1 is formed in the first build-up portion 10 and the second groove 20 is formed in the second build-up portion 20 before the core substrate 100 is cut. Therefore, for example, when the laminate 1P is cut from the first build-up portion 10 side, it is considered that the concentration of thermal stress near the interface between the first build-up portion 10 and the core substrate 100 at the point of contact between the dicing blade DB and the core substrate 100 is suppressed. Furthermore, because the second groove 20 is formed, the cutting length of the second build-up portion 20 is shortened, and therefore, the amount of frictional heat generated when the second build-up portion 20 is cut is considered to be small. In other words, it is considered that the concentration of thermal stress at the interface between the core substrate 100 and the second build-up portion 20 due to the heat generated when the second build-up portion 20 is cut is also less likely to occur. Similarly, when the laminate 1P is cut from the second build-up portion 20 side, it is considered that the concentration of thermal stress at the interface between the core substrate 100 and each build-up portion is also less likely to occur.

[0069] Therefore, when separating the laminate 1P into individual pieces, the occurrence of cracks in the core substrate 100 and delamination of each build-up portion from the core substrate 100 is suppressed. Furthermore, even when the laminate 1P is cut by scribing, since each groove is pre-formed, the force required for cutting is reduced, and the stress applied to the core substrate 100 is reduced, so it is thought that the occurrence of cracks and the like is suppressed.

[0070] In addition, as mentioned above, in the manufacturing method of the wiring board of the embodiment, both grooves are formed such that the centers of the first groove GB1 and the second groove GB2 do not overlap in a plan view, which is thought to suppress the occurrence of unintended cracks in the core substrate 100 and the laminate 1P. Therefore, it is thought that the occurrence of in-process defects is suppressed, process quality is improved, and wiring boards are manufactured stably.

[0071] In the example shown in Figure 5C, the dicing blade DB has a width Dbw that is smaller than the length D1 of the portion where the first groove GB1 and the second groove GB2 overlap in a plan view in the width direction. The laminate 1P is cut by the dicing blade DB, which is positioned to pass through the portion where the first groove GB1 and the second groove GB2 overlap in a plan view in the width direction. By cutting the laminate 1P as in the example in Figure 5C, a step can be created between the cut surface of the core substrate 100 and the wall surface exposed in the first groove GB1 and the wall surface exposed in the second groove GB2, similar to the steps that exist between the second portion G11b of the side surface G11 and the second portion G21b of the side surface G21 of the wiring board 1 in Figure 1 and the side surface CS1 of the core substrate 100.

[0072] As shown in the example in Figure 5C, by cutting the core substrate 100, a wiring substrate 1 is completed that has stepped sides on each side wall, as shown in the wiring substrate 1 example in Figure 1. Thus, in the manufacturing method of the wiring substrate of this embodiment, cutting the core substrate 100 may include forming a cut surface on the core substrate 100 that has a step between the wall surface exposed to the first groove GB1 and the wall surface exposed to the second groove GB2.

[0073] <Modified forms of the first and second grooves> Figures 6A and 6B show the first and second modified examples, respectively, of the formation of the first groove GB1 and the second groove GB2 in the manufacturing method of the wiring board of the embodiment. Figures 6A and 6B, as well as Figures 7A to 7C which will be referenced later, show only an enlarged view of one wiring board formation region BA and its vicinity within the laminate 1P.

[0074] In the first modified example shown in Figure 6A, the first groove GB1 and the second groove GB2 are formed in positions where they do not overlap at all in a plan view. That is, the first groove GB1 and the second groove GB2 are formed with a gap L between them in a plan view, meaning that the centers of the first groove GB1 and the second groove GB2 are clearly offset. Therefore, even when the first groove GB1 and the second groove GB2 are formed in such a way that they do not overlap at all, it is considered that the unintended splitting of the laminate 1P during the manufacturing process of the wiring board is suppressed.

[0075] As shown in Figure 6A, the laminate 1P, in which the first groove GB1 and the second groove GB2 are formed, is cut with a dicing blade DB, for example, the dicing blade DB shown by the dashed line, which is positioned to span the region between the first groove GB1 and the second groove GB2 in a plan view. By cutting the laminate 1P as shown in Figure 6A, a wiring board having sides such as the wiring board 1a shown in Figure 2 can be formed.

[0076] In the second modified example shown in Figure 6B, a first groove GB1 and a second groove GB2 having different widths are formed. Furthermore, the second groove GB2 is formed so that it overlaps with the first groove GB1 overall in a plan view. However, even in this modified example, the first groove GB1 and the second groove GB2 are formed so that their centers do not overlap in a plan view. Therefore, even in this modified example, it is considered that the unintended cleavage of the laminate 1P during the manufacturing process of the wiring board 1 is suppressed. The laminate 1P, on which the first groove GB1 and the second groove GB2 are formed as shown in Figure 6B, can be cut with a dicing blade DB positioned so as to at least partially overlap in a plan view with the groove having the smaller width (the second groove GB2 in the example of Figure 6B).

[0077] As shown in the second modified example in Figure 6B, in the manufacturing method of the wiring board of the embodiment, one of the first groove GB1 and the second groove GB2 may be formed to have a different width from the other groove GB1 and the second groove GB2. Also, one of the first groove GB1 and the second groove GB2 may be formed to completely overlap the other groove GB1 and the second groove GB2 in a plan view. In addition, as shown in the example in Figure 5A referenced earlier, one of the first groove GB1 and the second groove GB2 may be formed to partially overlap the other groove GB2 in a plan view. That is, in the manufacturing method of the wiring board of the embodiment, one of the first groove GB1 and the second groove GB2 may be formed to at least partially overlap the other groove GB1 and the second groove GB2 in a plan view.

[0078] <Modified examples of cutting a laminated structure> Figures 7A to 7C show the first to third modified examples of the cutting of the laminate 1P in the manufacturing method of the wiring board of the embodiment, respectively. In the first modified example shown in Figure 7A, the dicing blade DB is positioned to overlap with one of the two opposing wall surfaces of one of the first groove GB1 and second groove GB2, which are formed such that their respective widthwise center positions do not overlap in a plan view. Specifically in Figure 7A, the dicing blade DB is positioned to overlap in a plan view with one of the two opposing wall surfaces of the second groove GB2 (the left wall surface G22b in Figure 7A). However, the dicing blade DB has a width narrower than the width of the first groove GB1 and is positioned so that it fits entirely inside the first groove GB1 in a plan view. The laminate 1P is cut with the dicing blade DB positioned in this manner.

[0079] As in the first modified example, when the dicing blade DB is positioned, the dicing blade DB moves in the thickness direction of the laminate 1P while scraping the wall surface G22b of the second groove GB2, and the laminate 1P, including the core substrate 100, is cut. By cutting the laminate 1P in this way, a cut surface flush with the cut surface of the core substrate 100 can be formed in the second build-up portion 20 on one of the two opposing side walls of the manufactured wiring board. For example, a wiring board having a side surface like the wiring board 1b shown in Figure 3 can be formed. In the manufacturing method of the wiring board of this embodiment, cutting the core substrate may include scraping the wall surface exposed in at least one of the first groove and the second groove, as in the first modified example.

[0080] In the second modified example shown in Figure 7B, the dicing blade DB is positioned so as to overlap in plan view with one of the two opposing wall surfaces of the first groove GB1 and the second groove GB2, which are formed such that their respective widthwise center positions do not overlap in plan view. Specifically in Figure 7B, the dicing blade DB is positioned so as to overlap in plan view with one of the two opposing wall surfaces of the first groove GB1 (the right wall surface G11b in Figure 7B) and one of the two opposing wall surfaces of the second groove GB2 (the left wall surface G22b in Figure 7B). The laminate 1P is cut with the dicing blade DB positioned in this manner.

[0081] As shown in the second modified example, when the dicing blade DB is positioned, the dicing blade DB moves in the thickness direction of the laminate 1P while sequentially shaving the wall surface G11b of the first groove GB1 and the wall surface G22b of the second groove GB2, thereby cutting the laminate 1P, including the core substrate 100. By cutting the laminate 1P in this way, a cut surface flush with the cut surface of the core substrate 100 can be formed in the first build-up portion 10 on one of the two opposing side walls of the manufactured wiring board. Also, a cut surface flush with the cut surface of the core substrate 100 can be formed in the second build-up portion 20 on the other of the two side walls. For example, a wiring board having a side surface like the wiring board 1a shown in Figure 2 can be formed. In the manufacturing method of the wiring board of the embodiment, cutting the core substrate may include forming a cut surface flush with the cut surface of the core substrate 100 in both the first build-up portion 10 and the second build-up portion 20, as shown in the second modified example.

[0082] In the third modified example shown in Figure 7C, the laminate 1P is cut by a dicing blade DB positioned so as to overlap in a plan view with the entirety of the first groove GB1 and the second groove GB2, which are formed so that their respective widthwise center positions do not overlap in a plan view. When the dicing blade DB is positioned as in this modified example, the dicing blade DB moves in the thickness direction of the laminate 1P, sequentially scraping away the first insulating layer 11 around the first groove GB1 and the second insulating layer 21 around the second groove GB2, thereby cutting the laminate 1P, including the core substrate 100. By cutting the laminate 1P in this way, it is possible to manufacture a wiring board that has sides on both of the two opposing side walls where the cut surfaces of the first build-up portion 10, the second build-up portion 20, and the core substrate 100 are exposed flush with each other. In other words, it is considered that wiring boards requiring flat sides can be manufactured with stable process quality by suppressing the occurrence of unintended cracks in the core substrate during the manufacturing process.

[0083] The wiring boards of the embodiments are not limited to those having the structures and shapes illustrated in each drawing, or the structures, shapes, and materials illustrated herein. As stated above, the wiring boards of the embodiments may have any laminated structure. The wiring boards of the embodiments may have any number of conductive and insulating layers. Each conductive layer may include any conductive pattern. A solder resist layer may not be provided. The thickness of the thin layer on the surface of the core substrate may differ between the first build-up section and the second build-up section.

[0084] The method for manufacturing the wiring board of the embodiment is not limited to the method described with reference to the drawings. For example, the method for forming each insulating layer and the conductor layer formed on each insulating layer is not limited to the method described with reference to Figures 4A to 4D. Each conductor layer may be formed by a method other than the semi-additive method, such as the fully additive method. The depth of the first groove and the depth of the second groove may be different. The method for manufacturing the wiring board of the embodiment may include any additional steps other than those described above, and some of the described steps may be omitted. [Explanation of Symbols]

[0085] 1, 1a, 1b Wiring board 1P Laminate 10. First Build-up Department 20. Second Build-up Department 11. First insulating layer 12. First Conductor Layer 21 Second insulating layer 22 Second Conductor Layer 41, 42 Thin layer part 100 core boards 100f core substrate, first surface 100s Core board, second side 100P Glass Plate C1 Center of the first groove C2 Center of the second groove Side view of the CS1 core substrate (first side wall side) Side view of the CS2 core board (second side wall side) GB1 First Groove GB2 Second Groove G11 Side view of the first build-up section (side of the first side wall) G12 Side view of the first build-up section (second side wall side) G21 Side view of the second build-up section (side of the first side wall) G22 Side view of the second build-up section (second side wall side) S1 Side wall (first side wall) S2 side wall (second side wall) X Width direction of each groove

Claims

1. To form a laminate including a core substrate having a first surface and a second surface opposite to the first surface, a first build-up portion laminated on the first surface, and a second build-up portion laminated on the second surface, Dividing the aforementioned laminate into multiple wiring boards, A method for manufacturing a wiring board, including, Dividing the aforementioned laminate is To form the first groove from the surface of the laminate on the first build-up side, To form a second groove from the surface of the laminate on the second build-up side, Cutting the core substrate along the first groove or the second groove, Includes, The first groove and the second groove are formed such that their centers are offset from each other in the width direction of the first groove and the second groove.

2. A method for manufacturing a wiring board according to claim 1, wherein the core substrate includes a glass plate.

3. A method for manufacturing a wiring board according to claim 1, wherein one of the first groove and the second groove is formed such that it at least partially overlaps the other of the first groove and the second groove in a plan view.

4. A method for manufacturing a wiring board according to claim 3, wherein one of the first groove and the second groove is formed so as to partially overlap the other in a plan view.

5. A method for manufacturing a wiring board according to claim 1, Forming the first groove includes exposing the insulating layer constituting the first build-up portion to the bottom surface of the first groove, Forming the second groove includes exposing the insulating layer constituting the second build-up portion to the bottom surface of the second groove.

6. A method for manufacturing a wiring board according to claim 1, wherein one of the first groove and the second groove is formed to have a width different from the width of the other of the first groove and the second groove.

7. A method for manufacturing a wiring board according to claim 1, wherein cutting the core board includes scraping off the wall surface exposed in at least one of the first groove and the second groove.

8. A method for manufacturing a wiring board according to claim 7, wherein cutting the core board includes forming a cut surface on both the first build-up portion and the second build-up portion that is flush with the cut surface of the core board.

9. A method for manufacturing a wiring board according to claim 1, wherein cutting the core board includes forming a cut surface on the core board having a step between at least one of the wall surface exposed in the first groove and the wall surface exposed in the second groove.

10. A method for manufacturing a wiring board according to claim 1, wherein the core board is cut by a dicing blade.

11. A method for manufacturing a wiring board according to claim 1, wherein the core board is cut by scribing.

12. A core substrate having a first surface and a second surface opposite to the first surface, A first build-up portion is laminated on the first surface, A second build-up section laminated on the second surface, A wiring board including, At least a portion of one side of the first build-up portion and the second build-up portion is located further inward on the wiring board in a plan view than the other side.

13. The wiring board according to claim 12, wherein the core substrate includes a glass plate.

14. The wiring board according to claim 12, wherein the side surface of the core board protrudes more than at least a portion of the side surface of the first build-up portion and at least a portion of the side surface of the second build-up portion.

15. A wiring board according to claim 12, The aforementioned wiring board has two opposing side walls, In one of the two opposing side walls, at least a portion of the side surface of the first build-up portion is located inward in a plan view compared to the side surface of the second build-up portion. In the other of the two opposing side walls, the side surface of the first build-up portion is located outward in a plan view from at least a portion of the side surface of the second build-up portion.

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