Manufacturing method of wiring boards

By forming grooves in the build-up portions before cutting, the method addresses defects in wiring board manufacturing, achieving high-quality boards with minimized cracks and delamination.

JP2026114326APending Publication Date: 2026-07-08IBIDEN CO LTD

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
IBIDEN CO LTD
Filing Date
2024-12-26
Publication Date
2026-07-08

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Abstract

Providing high-quality wiring boards. [Solution] The method for manufacturing a wiring board according to the embodiment includes forming a laminate 1P including a core substrate 100 having a first surface 100f and a second surface 100s opposite to the first surface 100f, a first build-up portion 10 laminated on the first surface 100f, and a second build-up portion 20 laminated on the second surface 100s, and dividing the laminate 1P into a plurality of wiring boards. Dividing the laminate 1P includes forming a groove GB drilled in the thickness direction of the first build-up portion 10, and cutting the core substrate 100 and the second build-up portion 20 along the groove GB.
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Description

Technical Field

[0001] The present invention relates to a method for manufacturing a wiring board.

Background Art

[0002] Patent Document 1 discloses a method for manufacturing a wiring board including cutting a substrate having a metal layer and a resin layer formed on both surfaces (one surface and the other surface) of a glass substrate into a plurality of individual wiring boards along a dicing line using a dicing blade.

Prior Art Document

Patent Document

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the method for manufacturing a wiring board disclosed in Patent Document 1, in the step of cutting the substrate with a dicing blade, there is a possibility that defects such as crack generation in the glass substrate and peeling of the resin layer from the glass substrate may occur.

Means for Solving the Problems

[0005] The method for manufacturing a wiring board of the present invention includes forming a laminate including a core substrate having a first surface and a second surface opposite to the first surface, a first build-up portion laminated on the first surface, and a second build-up portion laminated on the second surface, and dividing the laminate into a plurality of wiring boards. Dividing the laminate includes forming a groove portion penetrating the first build-up portion in the thickness direction, and cutting the core substrate and the second build-up portion along the groove portion.

[0006] According to embodiments of the present invention, in the process of dividing a laminate into multiple wiring boards, high-quality wiring boards can be manufactured in which the occurrence of cracks in the glass substrate and delamination in the build-up portion are suppressed. [Brief explanation of the drawing]

[0007] [Figure 1] A cross-sectional view showing an example of a wiring board manufactured by the wiring board manufacturing method of an embodiment of the present invention. [Figure 2A] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 2B] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 2C] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 2D] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 3A] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 3B] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 3C] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 3D] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 3E] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Modes for carrying out the invention]

[0008] A method for manufacturing a wiring board according to an embodiment of the present invention will be described with reference to the drawings. Figure 1 shows a cross-sectional view of wiring board 1, which is an example of a wiring board manufactured by the manufacturing method of the embodiment. Note that wiring board 1 is merely an example of a wiring board manufactured by the manufacturing method of the embodiment. For example, the laminated structure of the manufactured wiring board, and the number of conductor layers and insulating layers contained in the wiring board, may differ from the laminated structure of wiring board 1 in Figure 1, and the number of conductor layers and insulating layers contained in wiring board 1. Also, in the drawings referenced in the following description, certain parts may be enlarged to facilitate understanding of the disclosed embodiment, and the size and length of each component may not be depicted in the exact proportions between them.

[0009] The wiring board 1 is composed of a core substrate 100 and build-up sections 10 and 20, which are made up of insulating layers and conductive layers alternately laminated on both sides of the core substrate 100. The wiring board 1 has two main surfaces perpendicular to its thickness direction: one surface 1F and the other surface 1S opposite to the first surface 1F.

[0010] The core substrate 100 included in the wiring board 1 has a first surface 100f and a second surface 100s opposite to the first surface 100f. On the first surface 100f of the core substrate 100, a first insulating layer 11 and a first conductor layer 12 are alternately laminated to form a first build-up section 10. On the second surface 100s of the core substrate 100, a second insulating layer 21 and a second conductor layer 22 are alternately laminated to form a second build-up section 20.

[0011] In addition, with regard to the description of the wiring board manufactured by the manufacturing method of the embodiment, in the description of the components of the wiring board 1, the side closer to the core substrate 100 is referred to as "bottom," "inside," or "lower side" or "inside," and the side further from the core substrate 100 is referred to as "top," "outside," or "upper side" or "outside." The surface of each element constituting the wiring board 1 that faces the core substrate 100 is also referred to as the "bottom surface," and the surface that faces away from the core substrate 100 is also referred to as the "top surface."

[0012] The core substrate 100 has a through conductor 101 that penetrates the core substrate 100 in the thickness direction. The first insulating layer 11 constituting the first build-up section 10 has a first via conductor 13 that penetrates the first insulating layer 11 in the thickness direction and connects opposing conductors (either two first conductor layers 12 or one first conductor layer 12 and the through conductor 101) that are sandwiched between the first insulating layer 11. The second insulating layer 21 constituting the second build-up section 20 has a second via conductor 23 that penetrates the second insulating layer 21 in the thickness direction and connects opposing conductors (either two second conductor layers 22 or one second conductor layer 22 and the through conductor 101) that are sandwiched between the second insulating layer 21.

[0013] The through-conductor 101 is formed by filling a through-hole 101a formed in the core substrate 100 with a conductor. In the illustrated example, the end face of the through-conductor 101 in the extending direction is formed substantially flush with the surface of the core substrate 100, and constitutes the first surface 100f and the second surface 100s of the core substrate 100. The first via conductor 13 is formed by filling a through-hole 13a formed in the first insulating layer 11 with a conductor. The first via conductor 13 is integrally formed with the first conductor layer 12 that is in contact with the surface of the first insulating layer 11 opposite to the core substrate 100 through which the first via conductor 13 passes. The second via conductor 23 is formed by filling a through-hole 23a formed in the second insulating layer 21 with a conductor. The second via conductor 23 is integrally formed with the second conductor layer 22 that is in contact with the surface of the second insulating layer 21 opposite to the core substrate 100 through which the second via conductor 23 passes.

[0014] The core substrate included in the wiring board manufactured by the manufacturing method of the embodiment may be a glass substrate. The core substrate 100 of the illustrated wiring board 1 is formed using a glass substrate. As the glass material used for the glass substrate constituting the core substrate 100, for example, soda-lime glass, borosilicate glass, or alkali-free glass may be used. These glasses may contain elements such as magnesium, calcium, manganese, aluminum, lead, iron, chromium, potassium, sulfur, antimony, and boron as additives. In addition, the core substrate included in the wiring board may be a substrate containing materials other than glass, such as a silicon substrate, ceramic substrate, or resin substrate.

[0015] The first insulating layer 11 and the second insulating layer 21 are formed using any insulating resin. Examples of insulating resins include thermosetting resins such as epoxy resin, bismaleimide triazine resin (BT resin), or phenolic resin, and thermoplastic resins such as fluororesin, liquid crystal polymer (LCP), fluoroethylene fluorine (PTFE) resin, polyester (PE) resin, and modified polyimide (MPI) resin. The first insulating layer 11 and the second insulating layer 21 may contain inorganic fillers (not shown) such as silica and alumina. The first insulating layer 11 and the second insulating layer 21 may also contain reinforcing materials (core materials) such as glass fibers or aramid fibers.

[0016] Examples of the conductors constituting the first conductor layer 12, the second conductor layer 22, the first via conductor 13, the second via conductor 23, and the through conductor 101 include copper and nickel, and preferably copper is used. In the example shown in FIG. 1, the first conductor layer 12, the second conductor layer 22, the first via conductor 13, the second via conductor 23, and the through conductor 101 are each shown as single layers, but they may be formed in a multilayer structure. The first conductor layer 12, the second conductor layer 22, the first via conductor 13, the second via conductor 23, and the through conductor 101 may have a multilayer structure including, for example, a metal foil layer (preferably a copper foil), a metal film layer (preferably a copper film formed by electroless plating or sputtering), and a plating film layer (preferably an electrolytic copper plating film). For example, the first conductor layer 12, the second conductor layer 22, the first via conductor 13, the second via conductor 23, and the through conductor 101 may have a two-layer structure including a metal film layer and a plating film layer.

[0017] Each conductor layer (the first conductor layer 12 and the second conductor layer 22) constituting the wiring board 1 is patterned so as to have a predetermined conductor pattern. The first conductor layer 12 constituting one surface 1F of the wiring board 1 is formed in a pattern having a plurality of conductor pads 12fp. The second conductor layer 22 constituting the other surface 1S of the wiring board 1 is formed in a pattern having a plurality of conductor pads 22sp.

[0018] The first build-up portion 10 that constitutes the wiring substrate 1 includes, on its outermost side, a solder resist layer 10Rf formed using, for example, a photosensitive polyimide resin or an epoxy resin. An opening 10Rfa is formed in the solder resist layer 10Rf, and the conductor pad 12fp is exposed from the opening 10Rfa. That is, one surface 1F of the wiring substrate 1 includes the surface of the solder resist layer 10Rf and the surface of the conductor pad 12fp exposed from the opening 10Rfa. The second build-up portion 20 that constitutes the wiring substrate 1 includes, on its outermost side, a solder resist layer 20Rs formed using, for example, a photosensitive polyimide resin or an epoxy resin. An opening 20Rsa is formed in the solder resist layer 20Rs, and the conductor pad 22sp is exposed from the opening 20Rsa. That is, the other surface 1S of the wiring substrate 1 includes the surface of the solder resist layer 20Rs and the surface of the conductor pad 22sp exposed from the opening 20Rsa.

[0019] One surface 1F of the wiring substrate 1 in the illustrated example is configured as a component mounting surface to which external electronic components are connected, and the conductor pad 12fp can be connected to the connection pads of external electronic components in the use of the wiring substrate 1. The other surface 1S of the wiring substrate 1 can be a connection surface that is connected to an external substrate when the wiring substrate 1 is mounted on the external substrate, which is, for example, the motherboard of an arbitrary electrical device. In the use of the wiring substrate 1, the conductor pad 22sp can be connected to the connection pads of the external substrate.

[0020] The single wiring board 1 in the illustrated example is formed by dividing a laminate containing multiple wiring boards 1 into individual wiring boards 1, as will be described in detail later. The side surface extending in the thickness direction of the wiring board 1 is the surface exposed by dividing the laminate into individual wiring boards 1. In plan view, each wiring board 1 has a rectangular shape, and in the above-described laminate, multiple wiring boards 1 are connected in a grid pattern. Here, "plan view" means viewing the object from a line of sight parallel to the thickness direction of the wiring board 1. As will be described in detail later, in the process of dividing a laminate in which multiple wiring boards 1 are connected into individual wiring boards 1, localized stress concentration on the surface (first surface 100f) of the core substrate 100 can be avoided. Therefore, the wiring board 1 is manufactured as a high-quality wiring board in which delamination between the core substrate 100 and the first build-up portion 10, and the occurrence of cracks in the core substrate 100 are suppressed.

[0021] In the illustrated wiring board 1, the side surface GS of the first build-up portion 10 extending in the thickness direction of the wiring board 1 is recessed inward relative to the side surfaces CS of the core substrate 100 and the second build-up portion 20. As a result of this configuration, a portion of the first surface 100f of the core substrate 100 is exposed near the side surface of the wiring board 1. This recessed shape of the side surface GS of the first build-up portion 10 relative to the side surfaces CS of the core substrate 100 and the second build-up portion 20 can be formed as a result of the lamination process, which will be described later. The side surface GS of the first build-up portion 10 is formed in the process of forming a groove in the first build-up portion 10 during the lamination process, and is also referred to as the groove side surface GS. The side surfaces CS of the core substrate 100 and the second build-up portion 20 are formed in the process of cutting the core substrate 100 and the second build-up portion 20 during the lamination process, and are also referred to as the cut surface CS. The groove side surface GS of the first build-up section 10 and the cross-section CS of the core substrate 100 and the second build-up section 20 do not overlap in a plan view.

[0022] Next, with reference to Figures 2A to 2D and Figures 3A to 3E, the manufacturing method of the wiring board according to the embodiment will be explained, using the case where the wiring board 1 shown in Figure 1 is manufactured as an example. Unless otherwise specified, each component formed in the wiring board manufacturing method described below may be formed using the materials exemplified as the materials for the corresponding components in the description of the wiring board 1 in Figure 1. Furthermore, in Figures 2A to 3E, which will be referenced below, the metal film layer and plating film layer, which are components of each conductor layer, are not depicted, and each conductor layer is depicted as a single layer, similar to Figure 1.

[0023] The manufacturing method of the wiring board of this embodiment includes forming a laminate including a core substrate and first and second build-up portions formed on both sides of the core substrate, and dividing the laminate into a plurality of wiring boards. Here, "laminated body" refers to a state in which a plurality of wiring boards to be divided into individual pieces by dicing are connected. First, Figures 2A to 2D will be shown to illustrate the formation of the laminate.

[0024] As shown in Figure 2A, a core substrate 100 is formed. In forming the core substrate 100, first, a glass substrate 100P is prepared, which may include, for example, soda-lime glass, borosilicate glass, or alkali-free glass. Through holes 101a are formed in the glass substrate 100P. In forming the through holes 101a, for example, a modified area may be formed in the glass substrate 100P at the location where the through holes 101a are to be formed by irradiation with laser light, and the through holes 101a may be formed by removing the modified area with, for example, an etching solution containing an aqueous solution of hydrogen fluoride. As the laser light that forms the modified area, helium-neon lasers, argon ion lasers, excimer lasers, and various YAG lasers may be used.

[0025] Next, the interior of the formed through-hole 101a is completely filled with a conductor, and the conductor is formed to completely cover two surfaces of the glass substrate 100P that are perpendicular to the thickness direction. In forming the conductor, a metal film layer (not shown) is formed on the inner wall surface of the through-hole 101a and on the two surfaces of the glass substrate 100P, for example by electroless plating, and then a plating film layer (not shown) is formed on the metal film layer by electroplating using the metal film layer as a power supply layer. A through-conductor 101 having the metal film layer and the plating film layer is formed, and the two surfaces of the glass substrate 100P are covered with a two-layer structure of conductors consisting of the metal film layer and the plating film layer. Subsequently, the conductor layers covering both sides of the glass substrate 100P are removed, for example by CMP (chemical mechanical polishing). As shown in Figure 2A, a core substrate 100 having a first surface 100f and a second surface 100s is formed.

[0026] The formed core substrate 100 includes a plurality of wiring board formation regions BA corresponding to a plurality of connected wiring boards 1 to be manufactured. Although an example in which the core substrate 100 is formed using a glass substrate 100P has been described, in the formation of the core substrate 100, a silicon substrate, ceramic substrate, or resin substrate may be used as an alternative to the glass substrate 100P, and through conductors may be formed by any method.

[0027] Next, as shown in Figure 2B, a first insulating layer 11 is laminated to cover the first surface 100f of the core substrate 100, and then a first conductor layer 12 is formed on top of the first insulating layer 11. Simultaneously with the formation of the first conductor layer 12, a first via conductor 13 is formed integrally with the first conductor layer 12. The first insulating layer 11 is laminated over a plurality of wiring board formation regions BA, and the first conductor layer 12 and the first via conductor 13 are formed in the plurality of wiring board formation regions BA. A second insulating layer 21 is formed to cover the second surface 100s of the core substrate 100, and then a second conductor layer 22 is formed on top of the second insulating layer 21. Simultaneously with the formation of the second conductor layer 22, a second via conductor 23 is formed integrally with the second conductor layer 22. The second insulating layer 21 is laminated over a plurality of wiring board formation regions BA, and the second conductor layer 22 and the second via conductor 23 are formed in the plurality of wiring board formation regions BA.

[0028] The first insulating layer 11 and the second insulating layer 21 can be formed by thermocompression bonding of a film-like insulating resin (e.g., epoxy resin) onto the surface (first surface 100f and second surface 100s) of the core substrate 100. A through-hole 13a is formed in the first insulating layer 11 at the position where the first via conductor 13 is to be formed, for example by irradiation with carbon dioxide laser light. The first conductor layer 12 and the first via conductor 13 are formed on the inner surface of the through-hole 13a and the upper surface of the first insulating layer 11 by electroless plating or sputtering, and by electroplating a plating film (not shown) using a plating resist with appropriate openings and using the metal film layer as a power supply layer. A through-hole 23a is formed in the second insulating layer 21 at the position where the second via conductor 23 is to be formed, for example by irradiation with carbon dioxide laser light. The second conductor layer 22 and the second via conductor 23 are formed by forming a metal film layer (not shown) on the inner surface of the through hole 23a and the upper surface of the second insulating layer 21 by electroless plating or sputtering, and by forming a plating film (not shown) by electroplating using a plating resist having appropriate openings and using the metal film layer as a power supply layer.

[0029] Next, as shown in Figure 2C, on the upper side of the first surface 100f of the core substrate 100, the same process as the formation of the first insulating layer 11 and the integral formation of the first via conductor 13 and the first conductor layer 12 described above is repeated a desired number of times to form a desired number of first insulating layers 11 and first conductor layers 12. Also, on the upper side of the second surface 100s, the same process as the formation of the second insulating layer 21 and the integral formation of the second via conductor 23 and the second conductor layer 22 described above is repeated a desired number of times to form a desired number of second insulating layers 21 and second conductor layers 22. The outermost first conductor layer 12 is formed in a pattern including a conductor pad 12fp. The outermost second conductor layer 22 is formed in a pattern including a conductor pad 22sp.

[0030] Next, as shown in Figure 2D, a solder resist layer 10Rf is formed over multiple wiring board formation regions BA on the outermost first conductor layer 12 and first insulating layer 11 on the first surface 100f side of the core substrate 100, having an opening 10Rfa that exposes the conductor pad 12fp. The formation of the first build-up section 10 is completed. On the outermost second conductor layer 22 and second insulating layer 21 on the second surface 100s side of the core substrate 100, a solder resist layer 20Rs is formed over multiple wiring board formation regions BA, having an opening 20Rsa that exposes the conductor pad 22sp. The formation of the second build-up section 20 is completed. The formation of a laminate 1P in which multiple wiring boards 1, each having one surface 1F and the other surface 1S opposite to the one surface 1F, are connected is completed.

[0031] Next, with reference to Figures 3A to 3E, the process of dividing the formed laminate 1P into individual wiring boards 1 will be described. In the manufacturing method of the wiring board of this embodiment, dividing the laminate includes forming grooves that penetrate the first build-up portion in the thickness direction, and cutting the core substrate and the second build-up portion along the grooves.

[0032] First, as shown in Figure 3A, grooves GB are formed in the laminate 1P along the boundary BD between the multiple wiring boards 1, creating the first build-up portion 10 in the thickness direction. The grooves GB can be formed, for example, by irradiating the laminate 1P with laser light, such as a carbon dioxide laser, from the outside of the first build-up portion 10. The grooves GB may also be formed by cutting the first build-up portion 10 along the boundary BD using a dicing blade, such as a diamond blade in which diamond abrasive grains are embedded in resin, which can be used for general dicing. The grooves GB can be formed over the entire rectangular periphery of each wiring board 1 in plan view.

[0033] In the illustrated example, the groove GB penetrates the first build-up portion 10, exposing the first surface 100f of the core substrate 100 on its bottom surface. The formation of the groove GB creates a groove side surface GS, which becomes part of the side surface of the wiring substrate 1 that is formed. The groove GB may also be formed as a groove that penetrates partway through the first build-up portion 10 in the thickness direction, in which case the first insulating layer 11 is exposed on the bottom surface of the groove GB. Alternatively, the groove GB may be formed as a groove that penetrates the first build-up portion 10 and further penetrates a part of the core substrate 100 in the thickness direction, in which case the core substrate 100 is exposed on the bottom surface of the groove GB and a part of the groove side surface GS.

[0034] Next, as shown in Figure 3B, the groove GB is cut along it, from the bottom surface of the groove GB to the other surface 1S. For example, the core substrate 100 and the second build-up portion 20 are completely cut by the dicing blade DB, completely separating the multiple connected wiring boards 1 and separating them into individual wiring boards 1.

[0035] As described above regarding the prior art, when a laminate in which build-up portions are formed on both sides of a core substrate is continuously cut with a dicing blade from one surface to the other, defects such as cracks in the core substrate and delamination between the core substrate and the build-up portion may occur. Specifically, frictional heat may be generated due to friction between the dicing blade and the laminate during the cutting process from one surface of the laminate to the core substrate. Therefore, at the point when the dicing blade and the core substrate come into contact, thermal stress may be locally concentrated near the interface between the build-up portion and the core substrate near the dicing blade. Due to this localized concentration of thermal stress, cracks may occur in the core substrate when it comes into contact with the dicing blade, and delamination between the build-up portion and the core substrate may occur.

[0036] On the other hand, in the manufacturing method of the wiring board of this embodiment, a groove GB is formed in the first build-up portion 10 before the process in which the core substrate 100 and the second build-up portion 20 are completely cut. Therefore, it is considered that there is little risk of localized stress concentration occurring near the bottom of the groove GB when the dicing blade DB contacts the core substrate 100. Consequently, it is considered that there is little risk of cracks occurring in the core substrate 100, and also little risk of delamination occurring between the first build-up portion 10 and the core substrate 100.

[0037] In the illustrated example, the width DBw of the dicing blade DB is smaller than the opening width GBw of the groove GB. Therefore, when the dicing blade DB is inserted into the groove GB, there is less risk of it coming into contact with the inner wall surface of the groove GB and generating heat, and the risk of the localized concentration of thermal stress described above is also reduced. However, the width DBw of the dicing blade DB may be larger than the opening width GBw of the groove GB. Even in such a case, because the groove GB is formed in advance, the amount of heat generated by friction between the dicing blade DB and the laminate 1P is suppressed to a relatively small extent, and the occurrence of cracks in the core substrate 100 and the delamination of the first build-up portion 10 from the core substrate 100 described above can be suppressed.

[0038] In the illustrated example of a wiring board manufacturing method, the dicing blade DB continuously cuts the core substrate 100 that constitutes the bottom surface of the groove GB, as well as the multiple second insulating layers 21 and solder resist layers 20Rs that constitute the second build-up section 20. When the groove GB is formed as a groove that penetrates partway into the first build-up section 10, and the first insulating layer 11 is exposed on the bottom surface of the groove GB, the dicing blade DB continuously cuts the first insulating layer 11, the core substrate 100, and the second build-up section 20.

[0039] In addition, as an example different from the example shown in Figure 3B, as shown in Figure 3C, a stress relaxation layer DL containing a resin with a lower elastic modulus than the resin constituting the first insulating layer 11 (e.g., urethane resin) may be formed in contact with the first surface 100f of the core substrate 100 at a position overlapping with the boundary BD in a plan view. In this case, the groove GB may be formed so that the stress relaxation layer DL is exposed on its bottom surface. The stress relaxation layer DL exposed on the bottom surface of the groove GB, the core substrate 100, and the second build-up portion 20 are continuously cut by the dicing blade DB. The formation of the stress relaxation layer DL may reduce the stress that may be applied to the core substrate 100 during cutting, thereby suppressing the occurrence of defects such as cracks.

[0040] Furthermore, as an example different from the example shown in Figure 3B, when the groove GB is formed by laser irradiation, as shown in Figure 3D, a metal layer ML may be formed in contact with the first surface 100f of the core substrate 100 at a position that overlaps with the boundary BD in a plan view. The metal layer ML functions as a laser light stopper layer in the formation of the groove GB, protecting the core substrate 100 from the laser light. As a result of the groove GB being formed by laser light, the metal layer ML is exposed on the bottom surface of the groove GB. The metal layer ML exposed on the bottom surface of the groove GB is removed by etching before the core substrate 100 is cut by the dicing blade DB. Alternatively, if the metal layer ML is a thin film with a thickness of 1 μm or less, it may be cut by the dicing blade DB without being removed. In the process of forming the groove GB, the core substrate 100 is protected from laser light by the metal layer ML, thereby preventing damage to the core substrate 100, and thus reducing the risk of cracks occurring in the core substrate 100 during cutting.

[0041] Furthermore, in the process of dividing the laminate 1P into individual wiring boards 1, particularly in the process of forming the groove GB shown in Figure 3A, the groove GB may be formed by a dicing blade, and subsequently, the core substrate 100 and the second build-up portion 20 may be cut by the dicing blade used to form the groove GB. In this case, once the formation of the groove GB by the dicing blade is complete, the movement of the dicing blade in the thickness direction of the laminate 1P is stopped for a predetermined time or longer. The time for which the movement of the dicing blade is stopped may be, for example, 1 second or longer. From the viewpoint of suppressing the generation of frictional heat as described above, it is preferable that the rotation of the dicing blade is stopped for the predetermined time during which the movement of the dicing blade is stopped.

[0042] Furthermore, in the described method for manufacturing the wiring board, the lamination of the laminate 1P is performed without forming a groove GB in the second build-up portion 20. Therefore, in the process of cutting the second build-up portion 20 using the dicing blade DB, localized stress concentration in the second build-up portion 20 is less likely to occur, and distortion of the second build-up portion 20 is less likely to occur. The boundary line BD enables accurate cutting, and the wiring board 1 can be formed to the desired dimensions.

[0043] As a result of cutting the core substrate 100 and the second build-up portion 20, the cut surfaces CS of the core substrate 100 and the second build-up portion 20 are exposed. The cut surfaces CS are formed in a position that does not overlap with the groove side surface GS in a plan view. As shown in Figure 3E, the manufacturing of the individualized wiring board 1 is completed, having one surface 1F and the other surface 1S extending perpendicular to the thickness direction, the groove side surface GS and the cut surface CS extending in the thickness direction, and the first surface 100f connecting the groove side surface GS and the cut surface CS on its surface. [Explanation of symbols]

[0044] 1 Wiring board 10. First Build-up Department 20. Second Build-up Department 11. Insulating layer (first insulating layer) 21. Insulating layer (second insulating layer) 12 Conductor layer (First conductor layer) 22 Conductor layer (second conductor layer) 13 Via conductor (first via conductor) 23 Via conductor (2nd via conductor) 100 core boards 101 Through-conductor 12fp conductor pad 22sp Conductor Pad BA wiring board formation area BD boundary DB Dicing Blade GB Groove

Claims

1. To form a laminate including a core substrate having a first surface and a second surface opposite to the first surface, a first build-up portion laminated on the first surface, and a second build-up portion laminated on the second surface, Dividing the aforementioned laminate into multiple wiring boards, A method for manufacturing a wiring board, including, Dividing the laminate includes forming grooves in the thickness direction of the first build-up portion and cutting the core substrate and the second build-up portion along the grooves.

2. A method for manufacturing a wiring board according to claim 1, wherein the core substrate includes a glass substrate.

3. A method for manufacturing a wiring board according to claim 1, wherein forming the laminate includes forming the second build-up portion to include a plurality of second insulating layers, and cutting the second build-up portion includes cutting the plurality of second insulating layers.

4. A method for manufacturing a wiring board according to claim 1, wherein forming the laminate further includes forming the second build-up portion including a solder resist layer, and dividing the laminate includes cutting the solder resist layer.

5. A method for manufacturing a wiring board according to claim 1, wherein forming the groove portion includes exposing the core substrate on the bottom surface of the groove portion.

6. A method for manufacturing a wiring board according to claim 1, wherein forming the laminate includes forming the first build-up portion to include a plurality of first insulating layers, and forming the groove includes exposing a portion of the plurality of first insulating layers on the bottom surface of the groove.

7. A method for manufacturing a wiring board according to claim 1, wherein forming the laminate includes forming a metal layer on the first surface, and forming the groove includes exposing the metal layer on the bottom surface of the groove.

8. A method for manufacturing a wiring board according to claim 1, wherein forming the laminate includes forming a stress-relieving layer on the first surface, and forming the groove includes exposing the stress-relieving layer on the bottom surface of the groove.

9. A method for manufacturing a wiring board according to claim 1, wherein the cut surface formed by cutting the core board and the second build-up portion is formed in a position that does not overlap with the groove side surface of the groove portion in a plan view.