Method for manufacturing a wiring board, and wiring board
By forming grooves in the build-up portions of a laminate and cutting from the bottom surface, the method addresses defects in the cutting process, ensuring high-quality wiring boards with reduced crack and delamination risks.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- IBIDEN CO LTD
- Filing Date
- 2024-12-26
- Publication Date
- 2026-07-08
Smart Images
Figure 2026114327000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a method for manufacturing a wiring board and a wiring board.
Background Art
[0002] Patent Document 1 discloses a method for manufacturing a wiring board including cutting a substrate having a metal layer and a resin layer formed on both surfaces (one surface and the other surface) of a glass substrate into a plurality of individual wiring boards along a dicing line using a dicing blade.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] In the method for manufacturing a wiring board disclosed in Patent Document 1, in the process of cutting the substrate with a dicing blade, there is a possibility that defects such as crack generation in the glass substrate and peeling of the resin layer from the glass substrate may occur.
Means for Solving the Problems
[0005] The present invention provides a method for manufacturing a wiring board, comprising forming a laminate comprising: a core substrate having a first surface and a second surface opposite to the first surface; a first build-up portion including a first insulating layer laminated on the first surface; and a second build-up portion including a second insulating layer laminated on the second surface; and dividing the laminate into a plurality of wiring boards. Dividing the laminate comprises forming a first groove drilled in the thickness direction of the first build-up portion; forming a second groove drilled in the thickness direction of the second build-up portion at a position overlapping the first groove in a plan view; and cutting the laminate from the bottom surface of the first groove to the bottom surface of the second groove, wherein forming the first groove or the second groove includes making the thickness of the first build-up portion between the bottom surface of the first groove and the first surface smaller than the thickness of the second build-up portion between the bottom surface of the second groove and the second surface.
[0006] The wiring board of the present invention includes a glass substrate having a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface; a first build-up portion including a first insulating layer laminated on the first surface; and a second build-up portion including a second insulating layer laminated on the second surface. On the side surface of the glass substrate, the thickness of the first insulating layer on the upper side of the first surface and the thickness of the second insulating layer on the upper side of the second surface are different from each other.
[0007] According to embodiments of the present invention, in the process of dividing a laminate into multiple wiring boards, a wiring board of good quality can be provided in which the occurrence of cracks in the glass substrate and the occurrence of delamination in the build-up portion are suppressed. [Brief explanation of the drawing]
[0008] [Figure 1] A cross-sectional view showing an example of a wiring board according to an embodiment of the present invention. [Figure 2A] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 2B] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 2C] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 2D] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 3A] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 3B] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Figure 3C] A cross-sectional view showing an example of a manufacturing method for a wiring board according to an embodiment. [Modes for carrying out the invention]
[0009] A wiring board according to an embodiment of the present invention will be described with reference to the drawings. Figure 1 shows a cross-sectional view of wiring board 1, which is an example of a wiring board according to the embodiment. Note that wiring board 1 is merely an example of a wiring board according to the embodiment. For example, the laminated structure of the wiring board, and the number of conductor layers and insulating layers included in the wiring board, may differ from the laminated structure of wiring board 1 in Figure 1, and the number of conductor layers and insulating layers included in wiring board 1. Also, in the drawings referenced in the following description, certain parts may be enlarged to facilitate understanding of the disclosed embodiment, and the size and length of each component may not be depicted in the exact proportions between them.
[0010] The wiring board 1 is composed of a core substrate 100 and build-up sections 10 and 20, which are made up of insulating layers and conductive layers alternately laminated on both sides of the core substrate 100. The wiring board 1 has two main surfaces perpendicular to its thickness direction: one surface 1F and the other surface 1S opposite to the first surface 1F.
[0011] The core substrate 100 included in the wiring board 1 has a first surface 100f and a second surface 100s opposite to the first surface 100f. On the first surface 100f of the core substrate 100, a first insulating layer 11 and a first conductor layer 12 are alternately laminated to form a first build-up section 10. On the second surface 100s of the core substrate 100, a second insulating layer 21 and a second conductor layer 22 are alternately laminated to form a second build-up section 20.
[0012] Regarding the description of the wiring board, in the description of the components of wiring board 1, the side closer to the core board 100 is referred to as "bottom," "inside," or "lower side" or "inside," while the side further from the core board 100 is referred to as "top," "outside," or "upper side" or "outside." The side of each component of wiring board 1 that faces the core board 100 is also referred to as the "bottom surface," and the side that faces away from the core board 100 is also referred to as the "top surface."
[0013] The core substrate 100 has a through conductor 101 that penetrates the core substrate 100 in the thickness direction. The first insulating layer 11 constituting the first build-up section 10 has a first via conductor 13 that penetrates the first insulating layer 11 in the thickness direction and connects opposing conductors (either two first conductor layers 12 or one first conductor layer 12 and the through conductor 101) that are sandwiched between the first insulating layer 11. The second insulating layer 21 constituting the second build-up section 20 has a second via conductor 23 that penetrates the second insulating layer 21 in the thickness direction and connects opposing conductors (either two second conductor layers 22 or one second conductor layer 22 and the through conductor 101) that are sandwiched between the second insulating layer 21.
[0014] The through-conductor 101 is formed by filling a through-hole 101a formed in the core substrate 100 with a conductor. In the illustrated example, the end face of the through-conductor 101 in the extending direction is formed substantially flush with the surface of the core substrate 100, and constitutes the first surface 100f and the second surface 100s of the core substrate 100. The first via conductor 13 is formed by filling a through-hole 13a formed in the first insulating layer 11 with a conductor. The first via conductor 13 is integrally formed with the first conductor layer 12 that is in contact with the surface of the first insulating layer 11 opposite to the core substrate 100 through which the first via conductor 13 passes. The second via conductor 23 is formed by filling a through-hole 23a formed in the second insulating layer 21 with a conductor. The second via conductor 23 is integrally formed with the second conductor layer 22 that is in contact with the surface of the second insulating layer 21 opposite to the core substrate 100 through which the second via conductor 23 passes.
[0015] The core substrate included in a wiring board may be a glass substrate. The core substrate 100 of the illustrated wiring board 1 is formed using a glass substrate. Examples of glass materials that can be used for the glass substrate constituting the core substrate 100 include soda-lime glass, borosilicate glass, or alkali-free glass. These glasses may contain elements such as magnesium, calcium, manganese, aluminum, lead, iron, chromium, potassium, sulfur, antimony, and boron as additives. In addition, the core substrate included in a wiring board may be a substrate containing materials other than glass, such as a silicon substrate, ceramic substrate, or resin substrate.
[0016] The first insulating layer 11 and the second insulating layer 21 are formed using any insulating resin. Examples of insulating resins include thermosetting resins such as epoxy resin, bismaleimide triazine resin (BT resin), or phenolic resin, and thermoplastic resins such as fluororesin, liquid crystal polymer (LCP), fluoroethylene fluorine (PTFE) resin, polyester (PE) resin, and modified polyimide (MPI) resin. The first insulating layer 11 and the second insulating layer 21 may contain inorganic fillers (not shown) such as silica and alumina. The first insulating layer 11 and the second insulating layer 21 may also contain reinforcing materials (core materials) such as glass fibers or aramid fibers.
[0017] In the illustrated example of the wiring board 1, the number of layers of the first insulating layer 11 included in the first build-up section 10 is equal to the number of layers of the second insulating layer 21 included in the second build-up section 20, with the first build-up section 10 having 3 layers of the first insulating layer 11 and the second build-up section 20 having 3 layers of the second insulating layer 21. However, the number of layers of the first insulating layer 11 included in the first build-up section 10 and the number of layers of the second insulating layer 21 included in the second build-up section 20 may differ from the illustrated example. For example, the first build-up section 10 may have 4 or more layers of the first insulating layer 11, and the second build-up section 20 may have 4 or more layers of the second insulating layer 21. The number of layers of the first insulating layer 11 included in the first build-up section 10 and the number of layers of the second insulating layer 21 included in the second build-up section 20 may be different.
[0018] Examples of conductors that constitute the first conductor layer 12, the second conductor layer 22, the first via conductor 13, the second via conductor 23, and the through conductor 101 include copper and nickel, and preferably copper is used. In the example shown in FIG. 1, the first conductor layer 12, the second conductor layer 22, the first via conductor 13, the second via conductor 23, and the through conductor 101 are each shown as single layers, but they may be formed in a multilayer structure. The first conductor layer 12, the second conductor layer 22, the first via conductor 13, the second via conductor 23, and the through conductor 101 may have a multilayer structure including, for example, a metal foil layer (preferably a copper foil), a metal film layer (preferably a copper film formed by electroless plating or sputtering), and a plating film layer (preferably an electrolytic copper plating film). For example, the first conductor layer 12, the second conductor layer 22, the first via conductor 13, the second via conductor 23, and the through conductor 101 may have a two-layer structure including a metal film layer and a plating film layer.
[0019] Each conductor layer (the first conductor layer 12 and the second conductor layer 22) that constitutes the wiring board 1 is patterned so as to have a predetermined conductor pattern. The first conductor layer 12 that constitutes one surface 1F of the wiring board 1 is formed in a pattern having a plurality of conductor pads 12fp. The second conductor layer 22 that constitutes the other surface 1S of the wiring board 1 is formed in a pattern having a plurality of conductor pads 22sp.
[0020] The first build-up portion 10 that constitutes the wiring board 1 includes, on its outermost side, a solder resist layer 10Rf formed using, for example, a photosensitive polyimide resin or an epoxy resin. An opening 10Rfa is formed in the solder resist layer 10Rf, and the conductor pad 12fp is exposed from the opening 10Rfa. That is, one surface 1F of the wiring board 1 includes the surface of the solder resist layer 10Rf and the surface of the conductor pad 12fp exposed from the opening 10Rfa. The second build-up portion 20 that constitutes the wiring board 1 includes, on its outermost side, a solder resist layer 20Rs formed using, for example, a photosensitive polyimide resin or an epoxy resin. An opening 20Rsa is formed in the solder resist layer 20Rs, and the conductor pad 22sp is exposed from the opening 20Rsa. That is, the other surface 1S of the wiring board 1 includes the surface of the solder resist layer 20Rs and the surface of the conductor pad 22sp exposed from the opening 20Rsa.
[0021] One surface 1F of the wiring board 1 in the illustrated example is configured as a component mounting surface to which external electronic components are connected, and the conductor pad 12fp can be connected to the connection pads of external electronic components in the use of the wiring board 1. The other surface 1S of the wiring board 1 can be a connection surface that is connected to an external board when the wiring board 1 is mounted on an external board, such as the motherboard of an arbitrary electrical device. In the use of the wiring board 1, the conductor pad 22sp can be connected to the connection pads of the external board.
[0022] The single wiring board 1 in the illustrated example is formed by dividing a laminate including a plurality of wiring boards 1 and separating them into individual wiring boards 1, as will be described in detail later. The side surface extending in the thickness direction of the wiring board 1 is the surface exposed by separating the laminate into individual wiring boards 1. In a plan view, each individual wiring board 1 has a rectangular shape, and in the above-described laminate, a plurality of wiring boards 1 are connected in a grid pattern. Here, "plan view" means looking at an object with a line of sight parallel to the thickness direction of the wiring board 1.
[0023] As will be described in detail later, in the process of dividing a laminate of multiple interconnected interconnect boards 1 into individual interconnect boards 1, localized stress concentration on the surface of the core board 100 (first surface 100f and second surface 100s) can be avoided. Therefore, the interconnect board 1 is manufactured as a high-quality interconnect board in which delamination between the core board 100 and the first build-up section 10, delamination between the core board 100 and the second build-up section 20, and crack formation in the core board 100 are suppressed.
[0024] In the illustrated wiring board 1, the side surface GS1 of the first build-up portion 10 and the side surface GS2 of a portion of the second build-up portion 20, which extend in the thickness direction of the wiring board 1, are located on the interior side of the wiring board 1 (closer to the center of the wiring board 1 in a plan view) relative to the core substrate 100 and the side surface CS of a portion of the second build-up portion 20. This shape, in which the side surface GS1 of the first build-up portion 10 and the side surface GS2 of a portion of the second build-up portion 20 are located relative to the core substrate 100 and the side surface CS of a portion of the second build-up portion 20, can be formed as a result of the lamination process described later.
[0025] The side surface GS1 of the first build-up section 10 is formed in the process of forming grooves in the first build-up section 10 during the process of dividing the laminate, and is also referred to as the first groove side surface GS1. The side surface GS2 of a part of the second build-up section 20 is formed in the process of forming grooves in the second build-up section 20 during the process of dividing the laminate, and is also referred to as the second groove side surface GS2. In addition, the side surface CS including the core substrate 100 and a part of the second build-up section 20 is formed in the process of cutting the core substrate 100 and the second build-up section 20 during the process of dividing the laminate, and is also referred to as the cut surface CS. The first groove side surface GS1 of the first build-up section 10 and the second groove side surface GS2 of the second build-up section 20 and the cut surface CS of the core substrate 100 and a part of the second build-up section 20 do not overlap in a plan view.
[0026] In the wiring board 1, the thickness of the first insulating layer 11 on the upper side of the first surface 100f and the thickness of the second insulating layer 21 on the upper side of the second surface 100s are different on the side surface (i.e., the cut surface CS) of the core substrate 100. Specifically, on the side surface of the glass substrate 100, the thickness of the first insulating layer 11 on the upper side of the first surface 100f is smaller than the thickness of the second insulating layer 21 on the upper side of the second surface 100s. In the illustrated example, on the side surface of the glass substrate 100, the thickness of the first insulating layer 11 on the upper side of the first surface 100f is zero, and the first surface 100f of the core substrate 100 is exposed between the side surface of the glass substrate 100 and the side surface GS1 of the first build-up portion 10.
[0027] Next, with reference to Figures 2A to 2D and Figures 3A to 3C, the manufacturing method of the wiring board according to the embodiment will be explained, using the case where the wiring board 1 shown in Figure 1 is manufactured as an example. Unless otherwise specified, each component formed in the wiring board manufacturing method described below may be formed using the materials exemplified as the materials for the corresponding components in the description of the wiring board 1 in Figure 1. Furthermore, in Figures 2A to 3E, which will be referenced below, the metal film layer and plating film layer, which are components of each conductor layer, are not depicted, and each conductor layer is depicted as a single layer, similar to Figure 1.
[0028] The manufacturing method of the wiring board of this embodiment includes forming a laminate including a core substrate and first and second build-up portions formed on both sides of the core substrate, and dividing the laminate into a plurality of wiring boards. Here, "laminated body" refers to a state in which a plurality of wiring boards to be divided into individual pieces by dicing are connected. First, Figures 2A to 2D will be shown to illustrate the formation of the laminate.
[0029] As shown in Figure 2A, a core substrate 100 is formed. In forming the core substrate 100, first, a glass substrate 100P is prepared, which may include, for example, soda-lime glass, borosilicate glass, or alkali-free glass. Through holes 101a are formed in the glass substrate 100P. In forming the through holes 101a, for example, a modified area may be formed in the glass substrate 100P at the location where the through holes 101a are to be formed by irradiation with laser light, and the through holes 101a may be formed by removing the modified area with, for example, an etching solution containing an aqueous solution of hydrogen fluoride. As the laser light that forms the modified area, helium-neon lasers, argon ion lasers, excimer lasers, and various YAG lasers may be used.
[0030] Next, the interior of the formed through-hole 101a is completely filled with a conductor, and the conductor is formed to completely cover two surfaces of the glass substrate 100P that are perpendicular to the thickness direction. In forming the conductor, a metal film layer (not shown) is formed on the inner wall surface of the through-hole 101a and on the two surfaces of the glass substrate 100P, for example by electroless plating, and then a plating film layer (not shown) is formed on the metal film layer by electroplating using the metal film layer as a power supply layer. A through-conductor 101 having the metal film layer and the plating film layer is formed, and the two surfaces of the glass substrate 100P are covered with a two-layer structure of conductors consisting of the metal film layer and the plating film layer. Subsequently, the conductor layers covering both sides of the glass substrate 100P are removed, for example by CMP (chemical mechanical polishing). As shown in Figure 2A, a core substrate 100 having a first surface 100f and a second surface 100s is formed.
[0031] The core substrate 100 that is formed includes a plurality of wiring board forming regions BA corresponding to a plurality of connected wiring boards 1 to be manufactured.
[0032] Next, as shown in Figure 2B, a first insulating layer 11 is laminated to cover the first surface 100f of the core substrate 100, and then a first conductor layer 12 is formed on top of the first insulating layer 11. Simultaneously with the formation of the first conductor layer 12, a first via conductor 13 is formed integrally with the first conductor layer 12. The first insulating layer 11 is laminated over a plurality of wiring board formation regions BA, and the first conductor layer 12 and the first via conductor 13 are formed in the plurality of wiring board formation regions BA. A second insulating layer 21 is formed to cover the second surface 100s of the core substrate 100, and then a second conductor layer 22 is formed on top of the second insulating layer 21. Simultaneously with the formation of the second conductor layer 22, a second via conductor 23 is formed integrally with the second conductor layer 22. The second insulating layer 21 is laminated over a plurality of wiring board formation regions BA, and the second conductor layer 22 and the second via conductor 23 are formed in the plurality of wiring board formation regions BA.
[0033] The first insulating layer 11 and the second insulating layer 21 can be formed by thermocompression bonding of a film-like insulating resin (e.g., epoxy resin) onto the surface (first surface 100f and second surface 100s) of the core substrate 100. A through-hole 13a is formed in the first insulating layer 11 at the position where the first via conductor 13 is to be formed, for example by irradiation with carbon dioxide laser light. The first conductor layer 12 and the first via conductor 13 are formed on the inner surface of the through-hole 13a and the upper surface of the first insulating layer 11 by electroless plating or sputtering, and by electroplating a plating film (not shown) using a plating resist with appropriate openings and using the metal film layer as a power supply layer. A through-hole 23a is formed in the second insulating layer 21 at the position where the second via conductor 23 is to be formed, for example by irradiation with carbon dioxide laser light. The second conductor layer 22 and the second via conductor 23 are formed by forming a metal film layer (not shown) on the inner surface of the through hole 23a and the upper surface of the second insulating layer 21 by electroless plating or sputtering, and by forming a plating film (not shown) by electroplating using a plating resist having appropriate openings and using the metal film layer as a power supply layer.
[0034] Next, as shown in Figure 2C, on the upper side of the first surface 100f of the core substrate 100, the same process as the formation of the first insulating layer 11 and the integral formation of the first via conductor 13 and the first conductor layer 12 described above is repeated a desired number of times to form a desired number of first insulating layers 11 and first conductor layers 12. Also, on the upper side of the second surface 100s, the same process as the formation of the second insulating layer 21 and the integral formation of the second via conductor 23 and the second conductor layer 22 described above is repeated a desired number of times to form a desired number of second insulating layers 21 and second conductor layers 22. The outermost first conductor layer 12 is formed in a pattern including a conductor pad 12fp. The outermost second conductor layer 22 is formed in a pattern including a conductor pad 22sp.
[0035] In the illustrated example, the number of times the process of forming the first insulating layer 11, the first via conductor 13, and the first conductor layer 12, which are repeated on the upper side of the first surface 100f, is equal to the number of times the process of forming the second insulating layer 21, the second via conductor 23, and the second conductor layer 22, which are repeated on the upper side of the second surface 100s, is equal. Therefore, a laminate can be formed in which the number of layers of the first insulating layer 11 and the number of layers of the second insulating layer 22 are equal. In the illustrated example, a total of 3 layers of the first insulating layer 11 and a total of 3 layers of the second insulating layer 21 are laminated, but it is possible that 4 or more layers of the first insulating layer 11 and 4 or more layers of the second insulating layer 21 may be formed. Note that the number of times the process of forming the first insulating layer 11, the first via conductor 13, and the first conductor layer 12, which are repeated on the upper side of the first surface 100f, may differ from the number of times the process of forming the 2 insulating layers 21, the second via conductor 23, and the second conductor layer 22, which are repeated on the upper side of the second surface 100s, is equal. In this case, a laminate may be formed in which the number of layers of the first insulating layer 11 and the number of layers of the second insulating layer 21 are different.
[0036] Next, as shown in Figure 2D, a solder resist layer 10Rf is formed over multiple wiring board formation regions BA on the outermost first conductor layer 12 and first insulating layer 11 on the first surface 100f side of the core substrate 100, having an opening 10Rfa that exposes the conductor pad 12fp. The formation of the first build-up section 10 is completed. On the outermost second conductor layer 22 and second insulating layer 21 on the second surface 100s side of the core substrate 100, a solder resist layer 20Rs is formed over multiple wiring board formation regions BA, having an opening 20Rsa that exposes the conductor pad 22sp. The formation of the second build-up section 20 is completed. The formation of a laminate 1P in which multiple wiring boards 1, each having one surface 1F and the other surface 1S opposite to the one surface 1F, are connected is completed. In the illustration, an example of a laminate 1P is shown in which the number of layers of the first insulating layer 11 included in the first build-up section 10 is equal to the number of layers of the second insulating layer 21 included in the second build-up section 20, and the thickness of the first build-up section 10 is approximately equal to the thickness of the second build-up section 20. However, the thickness of the first build-up section 10 and the thickness of the second build-up section 20 may be different.
[0037] Next, with reference to Figures 3A to 3C, the process of dividing the formed laminate 1P into individual wiring boards 1 will be described. In the manufacturing method of the wiring board of this embodiment, dividing the laminate includes forming a first groove that drills a first build-up portion in the thickness direction, forming a second groove that drills a second build-up portion in the thickness direction at a position that overlaps with the first groove in a plan view, and cutting the laminate from the bottom surface of the first groove to the bottom surface of the second groove.
[0038] First, as shown in Figure 3A, a first groove GB1 for drilling a first build-up portion 10 in the thickness direction and a second groove GB2 for drilling a second build-up portion 20 in the thickness direction are formed along the boundary BD between the multiple wiring boards 1 in the laminate 1P. The first groove GB1 and the second groove GB2 can be formed, for example, by irradiating the laminate 1P with laser light, such as a carbon dioxide laser. The first groove GB1 and the second groove GB2 may also be formed by cutting the build-up portion (first build-up portion 10 or second build-up portion 20) along the boundary BD using a dicing blade, such as a diamond blade in which diamond abrasive grains are embedded in resin, which can be used for general dicing. The first groove GB1 and the second groove GB2 can be formed over the entire rectangular periphery of each wiring board 1 in plan view.
[0039] The first groove GB1 and the second groove GB2 are formed in positions that overlap in a plan view. That is, the bottom surfaces of the first groove GB1 and the second groove GB2 overlap in at least a portion of a plan view. When the formation of the first groove GB1 and the second groove GB2 is completed, the core substrate 100 is located between the bottom surfaces of the first groove GB1 and the second groove GB2. During the formation of the first groove GB1 or the second groove GB2, the thickness of the first build-up portion 10 between the bottom surface of the first groove GB1 and the first surface 100f is formed to be smaller than the thickness of the second build-up portion 20 between the bottom surface of the second groove GB2 and the second surface 100s. Therefore, depending on the relative thicknesses of the first build-up portion 10 and the second build-up portion 20, the depth of the first groove GB1 may be formed to be greater than the depth of the second groove GB2 (for example, when the thickness of the first build-up portion 10 and the thickness of the second build-up portion 20 are approximately equal).
[0040] In the illustrated example, the first groove GB1 penetrates the first build-up portion 10, exposing the first surface 100f of the core substrate 100 on its bottom surface. The second groove GB2 penetrates a portion of the second build-up portion 20 in the thickness direction, exposing the second insulating layer 21 on its bottom surface. In this case, the thickness of the first build-up portion 10 between the bottom surface of the first groove GB1 and the first surface 100f of the core substrate 100 is zero. In other words, the statement "the thickness of the first build-up portion 10 between the bottom surface of the first groove GB1 and the first surface 100f of the core substrate 100 is smaller than the thickness of the second build-up portion 20 between the bottom surface of the second groove GB2 and the second surface 100s of the core substrate 100" includes the case where the thickness of the first build-up portion 10 between the bottom surface of the first groove GB1 and the first surface 100f of the core substrate 100 is zero, and the thickness of the second build-up portion 20 between the bottom surface of the second groove GB2 and the second surface 100s of the core substrate 100 is greater than zero.
[0041] The formation of the first groove GB1 and the second groove GB2 creates the first groove side surface GS1 and the second groove side surface GS2, which become part of the side surface of the wiring board 1. Although not shown in the figures, the first groove GB1 may be formed as a groove that penetrates partway through the first build-up portion 10 in the thickness direction, in which case the first insulating layer 11 is exposed at the bottom surface of the first groove GB1. Even in this case, the first groove GB1 is formed such that the thickness of the first build-up portion 10 between the bottom surface of the first groove GB1 and the first surface 100f of the core substrate 100 (the thickness of the first insulating layer 11 exposed by the first groove GB1) is smaller than the thickness of the second build-up portion 20 between the bottom surface of the second groove GB2 and the second surface 100s of the core substrate 100.
[0042] Next, as shown in Figure 3B, the laminate 1P is cut from the bottom surface of the first groove GB1 to the bottom surface of the second groove GB2. For example, the core substrate 100 and the second build-up portion 20 are completely cut by a dicing blade DB, completely separating the multiple connected wiring boards 1 and separating them into individual wiring boards 1.
[0043] As described above regarding the prior art, when a laminate in which build-up portions are formed on both sides of a core substrate is continuously cut with a dicing blade from one surface to the other, defects such as cracks in the core substrate and delamination between the core substrate and the build-up portion may occur. Specifically, frictional heat may be generated due to friction between the dicing blade and the laminate during the cutting process from one surface of the laminate to one surface of the core substrate. Therefore, at the point when the dicing blade contacts one surface of the core substrate, localized thermal stress may be concentrated near the interface between one build-up portion and one surface of the core substrate, due to the frictional heat between the one build-up portion and the dicing blade. Due to this concentration of localized thermal stress, cracks may occur in the core substrate when one surface of the core substrate contacts the dicing blade, and delamination may occur between one build-up portion and one surface of the core substrate. Furthermore, when the dicing blade cuts the core substrate and then subsequently cuts the other build-up portion located on the upper side of the other surface of the core substrate, it is conceivable that thermal stress caused by frictional heat between the other build-up portion and the dicing blade may concentrate near the other surface of the core substrate. This may lead to delamination or cracking of the build-up portion on the other surface of the core substrate.
[0044] On the other hand, in the manufacturing method of the wiring board of this embodiment, the first groove GB1 is formed in the first build-up portion 10 in advance before the process in which the core substrate 100 and the second build-up portion 20 are completely cut. Therefore, there is little risk of localized stress concentration occurring near the bottom of the first groove GB1 when the dicing blade DB contacts the first surface 100f of the core substrate 100. Consequently, there is little risk of cracks occurring in the core substrate 100, and also little risk of delamination occurring between the first build-up portion 10 and the core substrate 100.
[0045] Furthermore, in the manufacturing method of the wiring board of this embodiment, the second groove GB2 is formed in the second build-up portion 20 at a position that overlaps with the first groove GB1 in a plan view of the second build-up portion 20. Therefore, on the second surface 100s side of the core substrate 100, the thickness of the second build-up portion 20 to be cut is relatively small, and the thermal stress caused by the frictional heat mentioned above is unlikely to occur. The risk of delamination between the second surface 100s of the core substrate 100 and the second build-up portion 20 is relatively small, and the risk of cracks occurring in the core substrate 100 is further suppressed. In addition, because the second insulating layer 21 is present between the bottom surface of the second groove GB2 and the second surface 100s of the core substrate 100, the stress generated when the core substrate 100 is cut can be effectively distributed to the second build-up portion 20 via the second insulating layer 21. The occurrence of cracks in the glass substrate 100 during the cutting process of the glass substrate 100 is suppressed.
[0046] In the illustrated example, the width DBw of the dicing blade DB is smaller than the opening width GB1w of the first groove GB1 and also smaller than the opening width GB2w of the second groove GB2. Therefore, when the dicing blade DB enters the first groove GB1 and the second groove GB2, there is little risk of it coming into contact with the inner wall surfaces of the first groove GB1 and the second groove GB2 and generating heat, and the generation of the thermal stress described above is suppressed. However, the width DBw of the dicing blade DB may be larger than the opening width GB1w of the first groove GB1 or the opening width GB2w of the second groove GB2. Even in such a case, because the grooves are formed in advance, the amount of heat generated by friction between the dicing blade DB and the laminate 1P is relatively small and suppressed, and the occurrence of cracks in the core substrate 100 and the delamination of the first build-up portion 10 or the second build-up portion 20 from the core substrate 100 can be suppressed.
[0047] In the illustrated example of a wiring board manufacturing method, the dicing blade DB continuously cuts the core substrate 100 which constitutes the bottom surface of the first groove GB1, and the second insulating layer 21 which is located between the bottom surface of the second groove GB2 and the second surface 100s of the core substrate, among the plurality of second insulating layers 21 which constitute the second build-up section 20. When the first groove GB1 is formed as a groove that penetrates partway into the first build-up section 10, and the first insulating layer 11 is exposed on the bottom surface of the first groove GB1, the dicing blade DB continuously cuts the first insulating layer 11, the core substrate 100, and a portion of the second build-up section 20.
[0048] As a result of cutting the core substrate 100 and the second build-up portion 20, the cut surfaces CS of the core substrate 100 and the second build-up portion 20 are exposed. As shown in Figure 3C, the manufacturing of a segmented wiring board 1 is completed, having one surface 1F and the other surface 1S extending perpendicular to the thickness direction of the core substrate 100, a first groove side surface GS1 and a second groove side surface GS2 extending in the thickness direction, and a cut surface CS, as well as a first surface 100f connecting the first groove side surface GS1 and the cut surface CS on its surface. In the illustrated example, the cut surface CS is formed in a position that does not overlap with the first groove side surface GS1 and the second groove side surface GS2 in a plan view. In the illustrated example, the thickness of the first insulating layer 11 above the first surface 100f is zero at the cut surface CS. That is, at the exposed cut surface CS, the thickness of the first insulating layer 11 above the first surface 100f is less than the thickness of the second insulating layer 21 above the second surface 100s.
[0049] Furthermore, when forming the first groove GB1 as described above with reference to Figure 3A, if the first groove GB1 is formed by irradiation with laser light, a metal film layer may be formed at a position that overlaps with the boundary BD in a plan view. The metal film layer can be formed by electroless plating or sputtering. The metal film layer functions as a laser light stopper layer in the formation of the first groove GB1 and protects the core substrate 100 from the laser light. As a result of the formation of the first groove GB1 by laser light, the metal film layer is exposed on the bottom surface of the first groove GB1. The metal film layer exposed on the bottom surface of the first groove GB1 is removed by etching before cutting the core substrate 100. If the thickness of the metal film layer is 1 μm or less, it may be cut together with the core substrate without being removed. In the process of forming the first groove GB1, the core substrate 100 is protected from laser light by the metal film layer, thereby preventing damage to the core substrate 100, and thus reducing the risk of cracks occurring in the core substrate 100 during cutting.
[0050] The metal film layer that functions as a laser beam stopper layer when forming the first groove GB1 may be formed in contact with the first surface 100f of the core substrate 100. The metal film layer may also be formed on the upper surface of the first insulating layer 11, in which case the first insulating layer 11 is interposed between the bottom surface of the formed first groove GB1 and the first surface 100f of the core substrate 100. Alternatively, the metal film layer may not be exposed to the bottom surface of the formed first groove GB1, and may be located below the bottom surface of the first groove GB1. Furthermore, the metal film layer that functions as a laser beam stopper layer when forming the second groove GB2 may be formed on the upper side of the second surface 100s of the core substrate 100, at a position that overlaps with the boundary BD in a plan view. In this case, the metal film layer may be formed in contact with the second surface 100s of the core substrate 100, or it may be formed on the upper surface of the second insulating layer 21. [Explanation of Symbols]
[0051] 1 Wiring board 10. First Build-up Department 20. Second Build-up Department 11. Insulating layer (first insulating layer) 21. Insulating layer (second insulating layer) 12 Conductor layer (First conductor layer) 22 Conductor layer (second conductor layer) 13 Via conductor (first via conductor) 23 Via conductor (2nd via conductor) 100 core boards 101 Through-conductor 12fp conductor pad 22sp Conductor Pad BA wiring board formation area BD boundary DB Dicing Blade GB1 First Groove GB2 Second Groove
Claims
1. To form a laminate comprising a core substrate having a first surface and a second surface opposite to the first surface, a first build-up portion including a first insulating layer laminated on the first surface, and a second build-up portion including a second insulating layer laminated on the second surface, Dividing the aforementioned laminate into multiple wiring boards, A method for manufacturing a wiring board, including, Dividing the laminate includes forming a first groove in the thickness direction of the first build-up portion, forming a second groove in the thickness direction of the second build-up portion at a position overlapping with the first groove in a plan view, and cutting the laminate from the bottom surface of the first groove to the bottom surface of the second groove. Forming the first groove or the second groove includes making the thickness of the first build-up portion between the bottom surface of the first groove and the first surface smaller than the thickness of the second build-up portion between the bottom surface of the second groove and the second surface.
2. A method for manufacturing a wiring board according to claim 1, wherein the core substrate includes a glass substrate.
3. A method for manufacturing a wiring board according to claim 1, wherein forming the first groove includes exposing the core substrate on the bottom surface of the first groove.
4. A method for manufacturing a wiring board according to claim 1, wherein forming the laminate includes forming a laminate in which the number of layers of the first insulating layer included in the first build-up portion is equal to the number of layers of the second insulating layer included in the second build-up portion.
5. A method for manufacturing a wiring board according to claim 1, wherein forming the laminate includes forming a first build-up portion including four or more first insulating layers, and forming a second build-up portion including four or more second insulating layers.
6. A method for manufacturing a wiring board according to claim 1, wherein forming the first groove and the second groove includes forming the second groove which is less deep than the first groove.
7. A method for manufacturing a wiring board according to claim 1, wherein cutting the laminate includes exposing a cut surface in which the thickness of the first insulating layer on the upper side of the first surface is smaller than the thickness of the second insulating layer on the upper side of the second surface.
8. A method for manufacturing a wiring board according to claim 1, wherein the cut surface formed by cutting the laminate is formed in a position that does not overlap with the first groove side surface of the first groove portion and the second groove side surface of the second groove portion in a plan view.
9. A glass substrate having a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface, A first build-up portion including a first insulating layer laminated on the first surface, A second build-up portion including a second insulating layer laminated on the second surface, A wiring board including, On the side surface of the glass substrate, the thickness of the first insulating layer on the upper side of the first surface and the thickness of the second insulating layer on the upper side of the second surface are different from each other.
10. The wiring board according to claim 9, wherein, on the side surface of the glass substrate, the thickness of the first insulating layer on the upper side of the first surface is smaller than the thickness of the second insulating layer on the upper side of the second surface.
11. A wiring board according to claim 10, wherein the first build-up portion has a side surface on an inward side of the glass substrate, and the second build-up portion has a side surface on an inward side of the glass substrate.
12. The wiring board according to claim 11, wherein the thickness of the first insulating layer on the upper side of the first surface is zero on the side surface of the glass substrate, and the first surface is exposed between the side surface of the glass substrate and the side surface of the first build-up portion.