Multilayer electronic components

The stacked electronic component design with recessed internal electrodes and dummy electrodes addresses step differences and stress imbalances in three-terminal MLCCs, improving mechanical strength and reliability by optimizing electrode overlap and adhesive strength.

JP2026114926APending Publication Date: 2026-07-08SAMSUNG ELECTRO MECHANICS CO LTD

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
SAMSUNG ELECTRO MECHANICS CO LTD
Filing Date
2025-10-03
Publication Date
2026-07-08

AI Technical Summary

Technical Problem

Three-terminal multilayer ceramic capacitors (MLCCs) experience significant step differences and stress imbalances during lamination and crimping processes, leading to reduced mechanical strength, warping of internal electrodes, and decreased dielectric layer density, which can cause delamination and reliability issues.

Method used

The solution involves a stacked electronic component design with recessed main portions of internal electrodes and dummy electrodes positioned to mitigate step differences, ensuring adequate overlap and adhesive strength between layers, and incorporating dielectric patterns to reinforce corners.

Benefits of technology

This design effectively reduces step differences and delamination, enhances mechanical strength, and maintains reliability by optimizing electrode overlap and adhesive strength without additional processing steps.

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Abstract

This reduces the step height in a three-terminal multilayer ceramic capacitor (MLCC). [Solution] The stacked electronic component has dummy electrodes 221 and 222 placed on a dielectric layer where the first internal electrode 121 and the second internal electrode 122 are not arranged, and the main portions 121a and 122a where the first internal electrode and the second internal electrode overlap in the stacking direction include recesses with a concave shape.
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Description

[Technical Field]

[0001] This invention relates to a stacked electronic component. [Background technology]

[0002] A multilayer ceramic capacitor (MLCC), a type of stacked electronic component, is a chip-type capacitor that is mounted on the printed circuit boards of various electronic products, such as video equipment like liquid crystal displays (LCDs) and plasma display panels (PDPs), computers, smartphones and mobile phones, on-board chargers (OBCs) in electric vehicles, and DC-DC converters, and plays the role of charging or discharging electricity.

[0003] In addition to two-terminal MLCCs with two external electrodes, three-terminal or four-terminal MLCCs have been developed with modified internal and external electrode structures to improve frequency characteristics.

[0004] Three-terminal MLCCs have a structure in which signal internal electrodes and ground internal electrodes are stacked alternately. Because the ground internal electrode pattern must be drawn in a different direction from the signal internal electrode pattern, the area on the dielectric layer where the internal electrode pattern is not formed during the stacking and crimping process of the laminate may be larger than that of a two-terminal MLCC, and the resulting step difference may be more pronounced than in a two-terminal MLCC.

[0005] On the other hand, steps that occur during the lamination and crimping processes to form the MLCC body can lead to stress imbalances in the body, potentially reducing the mechanical strength of the MLCC. This can also cause internal electrodes to warp and decrease the density of the dielectric layer, thus reducing the reliability of the MLCC.

[0006] Therefore, there is a need for structural improvements to MLCCs that can mitigate the step caused by the unformed regions of the internal electrodes in 3-terminal MLCCs. [Overview of the Initiative] [Problems that the invention aims to solve]

[0007] One of the several objectives of this invention is to mitigate the step difference that occurs in 3-terminal MLCCs.

[0008] One of the several objectives of the present invention is to prevent delamination that occurs in 3-terminal MLCCs.

[0009] However, the objectives of the present invention are not limited to those described above and can be more easily understood in the process of describing specific embodiments of the present invention. [Means for solving the problem]

[0010] A stacked electronic component according to one embodiment of the present invention includes a body containing a dielectric layer, first internal electrodes and second internal electrodes alternately arranged in a first direction with the dielectric layer in between, first and second surfaces facing the first direction, third and fourth surfaces facing a second direction perpendicular to the first direction, fifth and sixth surfaces facing a third direction perpendicular to the first and second directions, a first dummy electrode disposed at a distance from the first internal electrode and connected to the fifth or sixth surface, and a second dummy electrode disposed at a distance from the second internal electrode and connected to the third or fourth surface, a first external electrode disposed on the third surface and connected to the first internal electrode, and a second external electrode disposed on the fourth surface and connected to the first internal electrode. The first internal electrode includes a third external electrode positioned on the fifth surface and connected to the second internal electrode, and a fourth external electrode positioned on the sixth surface and connected to the second internal electrode, wherein the first internal electrode includes a first main portion overlapping the second internal electrode in a first direction, and a first lead portion extending from the first main portion in a second direction, the second internal electrode includes a second main portion overlapping the first internal electrode in a first direction, and a second lead portion extending from the second main portion in a third direction, the first main portion includes a first recess having a shape recessed from the center in the second direction in the third direction, and the second main portion may include a second recess having a shape recessed from the center in the second direction in the third direction. [Effects of the Invention]

[0011] One of the several effects of the present invention is that by including a recess in which the main portion of the first internal electrode and the second internal electrode is recessed in a first direction, the overlapping area of ​​the first internal electrode and the second internal electrode in the first direction can be improved, thereby mitigating the step difference of the stacked electronic component.

[0012] One of the several effects of the present invention is to adjust the relative positions between the first internal electrode, the second internal electrode, the first dummy electrode, and the second dummy electrode to mitigate the step difference in the stacked electronic component and suppress the occurrence of delamination due to a decrease in the adhesive strength between dielectric layers.

[0013] However, the diverse and beneficial advantages and effects of the present invention are not limited to the above-described content and can be more easily understood during the process of explaining the specific embodiments of the present invention.

Brief Description of the Drawings

[0014] [Figure 1] It schematically shows a perspective view of a multilayer electronic component according to an embodiment of the present invention. [Figure 2] It schematically shows a perspective view of a main body according to an example. [Figure 3] It is a plan view schematically showing a form in which internal electrodes, dummy electrodes, and dielectric patterns according to an example are arranged. [Figure 4] It schematically shows a cross-sectional view of a multilayer electronic component according to an example cut along the line A-A' of FIG. 3. [Figure 5] It schematically shows a cross-sectional view of a multilayer electronic component according to an example cut along the line B-B' of FIG. 3. [Figure 6] It schematically shows a cross-sectional view of a multilayer electronic component according to an example cut along the line C-C' of FIG. 3. [Figure 7] It schematically shows a cross-sectional view of a multilayer electronic component according to an example cut along the line D-D' of FIG. 3. [Figure 8] It is a plan view schematically showing the components of internal electrodes, dummy electrodes, and dielectric patterns according to an example.

Modes for Carrying Out the Invention

[0015] Hereinafter, embodiments of the present invention will be described with reference to specific embodiments and the accompanying drawings. However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Also, the embodiments of the present invention are provided to more fully explain the present invention to ordinary technicians. Therefore, the shape, size, etc. of the elements in the drawings can be exaggerated for a clearer explanation, and the elements indicated by the same reference numerals in the drawings are the same elements.

[0016] And, in order to clearly explain the present invention in the drawings, parts not related to the explanation are omitted, and the sizes and thicknesses of each configuration shown in the drawings are arbitrarily shown for convenience of explanation, so the present invention is not necessarily limited to what is shown in the drawings. Note that components having the same function within the scope of the same concept are described using the same reference numerals. Furthermore, throughout the specification, when a certain part says that a certain component "includes", this means that other components can be further included, rather than excluding other components, unless otherwise stated to the contrary.

[0017] In the drawings, the x - direction can be defined as the direction in which the first internal electrode and the second internal electrode are alternately arranged across the dielectric layer or the first direction. Among the y - direction and the z - direction, which are perpendicular to the x - direction, the y - direction can be defined as the second direction and the z - direction can be defined as the third direction.

[0018] Figure 1 schematically shows a perspective view of a stacked electronic component according to one embodiment of the present invention; Figure 2 schematically shows a perspective view of the main body according to one embodiment; Figure 3 schematically shows a plan view of the configuration in which the internal electrodes, dummy electrodes, and dielectric pattern are arranged according to one embodiment; Figure 4 schematically shows a cross-sectional view obtained by cutting the stacked electronic component according to one embodiment along the line A-A' in Figure 3; Figure 5 schematically shows a cross-sectional view obtained by cutting the stacked electronic component according to one embodiment along the line B-B' in Figure 3; Figure 6 schematically shows a cross-sectional view obtained by cutting the stacked electronic component according to one embodiment along the line C-C' in Figure 3; Figure 7 schematically shows a cross-sectional view obtained by cutting the stacked electronic component according to one embodiment along the line D-D' in Figure 3; and Figure 8 schematically shows a plan view of the components of the internal electrodes, dummy electrodes, and dielectric pattern according to one embodiment.

[0019] In the following, with reference to Figures 1 to 8, a stacked electronic component 100 according to one embodiment of the present invention and various embodiments thereof will be described in detail.

[0020] A stacked electronic component 100 according to one embodiment of the present invention includes a body containing a dielectric layer 111, first internal electrodes 121 and second internal electrodes 122 arranged alternately in a first direction with the dielectric layer 111 in between, first and second faces 1 and 2 facing each other in the first direction, third and fourth faces 3 and 4 facing each other in a second direction perpendicular to the first direction, fifth and sixth faces 5 and 6 facing each other in a third direction perpendicular to the first and second directions, a first dummy electrode 221 arranged at a distance from the first internal electrode and connected to the fifth face 5 or the sixth face 6, a second internal electrode 222 arranged at a distance from the second internal electrode 122 and connected to the third face 3 or the fourth face 4, a first external electrode 130 arranged on the third face 3 and connected to the first internal electrode 121, a second external electrode 140 arranged on the fourth face 4 and connected to the first internal electrode 121, and a body arranged on the fifth face 5 The first internal electrode 121 includes a third external electrode 150 connected to the second internal electrode 122, and a fourth external electrode 160 arranged on the sixth surface 6 and connected to the second internal electrode 122. The first internal electrode 121 includes a first main portion 121a overlapping the second internal electrode 122 in a first direction, and first lead portions 121b and 121c extending from the first main portion 121a in a second direction. The second internal electrode 122 includes a second main portion 122a overlapping the first internal electrode 121 in a first direction, and second lead portions 122b and 122c extending from the second main portion 122a in a third direction. The first main portion 121a includes a recess 121a-1 having a shape recessed from the center in a second direction in a third direction, and the second main portion 122a may include a recess 122a-1 having a shape recessed from the center in a second direction in a third direction.

[0021] The main body 110 may include a dielectric layer 111, a first internal electrode 121, a second internal electrode 122, a first dummy electrode 221, a second dummy electrode 222, and first to sixth surfaces 1 to 6.

[0022] The dielectric layer 111 and the first internal electrode 121 and the second internal electrode 122 can be arranged alternately within the main body 110, and the direction in which the internal electrodes 121, 122 and the main body 110 are arranged alternately can be defined as the stacking direction or the first direction.

[0023] There is no particular limitation on the specific shape of the main body 110. However, as shown in FIG. 2, the main body 110 can be formed in a hexahedron shape or a shape similar thereto. Further, the shape of the main body 110 can be substantially a hexahedron shape, although the corners are not in a hexahedron shape with perfect straight lines due to shrinkage during the firing process or a separate polishing process.

[0024] Referring to FIG. 2, the main body 110 can have a first surface 1 and a second surface 2 facing each other in the first direction, a third surface 3 and a fourth surface 4 facing each other in a second direction perpendicular to the first direction, and a fifth surface 5 and a sixth surface 6 facing each other in a third direction perpendicular to the first direction and the second direction.

[0025] The plurality of dielectric layers 111 forming the main body 110 are in a fired state, and the boundaries between adjacent dielectric layers 111 can be integrated so as to be difficult to confirm without using a scanning electron microscope (SEM).

[0026] The main component of the dielectric composition forming the dielectric layer 111 is not particularly limited as long as sufficient capacitance can be obtained. For example, the dielectric layer 111 can contain a perovskite compound represented by ABO3 as a main component. The perovskite compound represented by ABO3 includes, for example, BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O3 (0 < y < 1), CaZrO3, and (Ca 1-x Sr x )(Zr 1-y Ti y )O3 (0 < x ≤ 0.5, 0 < y ≤ 0.5), and can include one or more of them.

[0027] Referring to Figures 4 to 7, cover portions 112 and 113 can be arranged in the region from the outermost external electrode of the first internal electrode 121 and second internal electrode 122 to the first surface 1 or second surface 2 of the main body 110.

[0028] The cover portions 112 and 113 can be formed by laminating a single dielectric layer or two or more dielectric layers in the thickness direction on the upper and lower surfaces of the laminate in which the first internal electrode 121 and the second internal electrode 122 and the dielectric layer 111 are laminated, and can essentially serve to prevent damage to the internal electrodes due to physical or chemical stress.

[0029] The cover portions 112 and 113 do not include the first internal electrode 121 and the second internal electrode, the first dummy electrode 221 and the second dummy electrode 222, and the dielectric patterns 321 and 322, and may contain the same material as the dielectric layer 111. That is, the cover portions 112 and 113 may contain ceramic material, for example, the same ceramic material as the dielectric layer 11.

[0030] The average thickness tc of the cover portions 112 and 113 is not particularly limited. However, in order to more easily achieve miniaturization and high capacitance of the stacked electronic component 100, the average thickness tc of the cover portions 112 and 113 may be 15 μm or less.

[0031] The average thickness tc of the cover portions 112 and 113 can represent the size in the first direction, and can be the average value of the sizes of the cover portions 112 and 113 in the first direction measured at five equally spaced points on the upper or lower part of the volume forming portion Ac.

[0032] The internal electrodes 121 and 122 can be included in the main body 110 together with the dielectric layer 111, and may include a first internal electrode 121 and a second internal electrode 122.

[0033] The first internal electrode 121 is connected to the third surface 3 and the fourth surface 4, and can be connected to the first external electrode 130 and the second external electrode 140, which will be described later, via the third surface 3 and the fourth surface 4. On the other hand, the first internal electrode 121 may be positioned at a distance from the fifth surface 5 and the sixth surface 6.

[0034] Referring to Figure 3, the first internal electrode 121 may include a first main portion 121a which overlaps with the second internal electrode 122 in a first direction, and first lead portions 122b and 122c which extend from the first main portion 121a in a second direction.

[0035] The first lead portions 122b and 122c may include a first-first lead portion 122b whose end is in direct contact with the first external electrode 130, and a first-second lead portion 122c whose end is in direct contact with the second external electrode 140.

[0036] The second internal electrode 122 is connected to the fifth surface 5 and the sixth surface 6, and can be connected to the third external electrode 150 and the fourth external electrode 160, which will be described later, via the fifth surface 5 and the sixth surface 6. On the other hand, the second internal electrode 122 may be positioned at a distance from the third surface 3 and the fourth surface 4.

[0037] Referring to Figure 3, the second internal electrode 122 may include a second main portion 122a, which is a region overlapping with the first internal electrode 121 in a first direction, and second lead portions 122b and 122c, which are arranged extending from the second main portion 122a in a third direction.

[0038] The second lead portions 122b and 122c may include a second-first lead portion 122b whose end is in direct contact with the fifth surface 5, and a second-second lead portion 122c whose end is in direct contact with the sixth surface 6.

[0039] The first internal electrode 121 and the second internal electrode 122 can be electrically isolated by the dielectric layer 111 placed between them, and can be electrically isolated from external electrodes that are not connected via a space separated from the surface of the main body 110.

[0040] The materials used to form the internal electrodes 121 and 122 are not particularly limited, and any material with excellent electrical conductivity can be used. For example, the internal electrodes 121 and 122 may include one or more of the following: nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.

[0041] The main body 110 may include first dummy electrodes 221a and 221b, which are positioned apart from the first internal electrode 121 and connected to the fifth surface 5 or the sixth surface 6, and second dummy electrodes 222a and 222b, which are positioned apart from the second internal electrode 122 and connected to the third surface 3 or the fourth surface 4.

[0042] Referring to Figure 3, the first dummy electrodes 221a and 221b may include a first-first dummy electrode 221a whose end is in contact with the fifth surface 5, and a first-second dummy electrode 221b whose end is in contact with the sixth surface 6. The second dummy electrodes 222a and 222b may include a second-first dummy electrode 222a whose end is in contact with the third surface 3, and a second-second dummy electrode 222b whose end is in contact with the fourth surface 4.

[0043] The first dummy electrode 221a and the second dummy electrode 221b are placed on a dielectric layer where the first internal electrode 121 and the second internal electrode 122 are not located, respectively, thereby playing a role in mitigating the step difference of the stacked electronic component.

[0044] The materials used to form the first dummy electrode 221a and the second dummy electrode 221b are not particularly limited, and the same materials as those used for the first internal electrode 121 and the second internal electrode 122 can be used. For example, the first dummy electrode 221a and the second dummy electrode 221b may include one or more of the following: nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.

[0045] On the other hand, steps that occur during the lamination and crimping processes to form the MLCC body can lead to stress imbalances in the body, potentially reducing the mechanical strength of the MLCC. This can also cause internal electrodes to warp and decrease the density of the dielectric layer, thus reducing the reliability of the MLCC.

[0046] Furthermore, such step differences may be even more pronounced in the case of a 3-terminal MLCC due to structural and morphological differences between the signal internal electrode and the ground internal electrode.

[0047] Specifically, in the case of a 3-terminal MLCC, the lead-out portions of the signal internal electrode and the ground internal electrode are formed in different directions from each other. Therefore, the region where the signal internal electrode and the ground internal electrode overlap in the first direction may not be sufficient compared to the internal electrode structure of a 2-terminal MLCC, which may result in an increase in the region on the dielectric layer where no internal electrodes are formed compared to a 2-terminal MLCC structure.

[0048] As a way to mitigate the step in a 3-terminal MLCC structure, one can consider printing a step-mitigation pattern on the dielectric layer where no signal or ground internal electrodes are formed. Forming a separate step-mitigation pattern requires a separate, further process, and during the firing process, material migration may occur in adjacent dielectric layers, potentially adversely affecting the properties of the dielectric layers.

[0049] Therefore, in one embodiment of the present invention, by having the first main portion 121a of the first internal electrode 121 include a first recess 121a-1 having a shape that is recessed from the center in the second direction in the third direction, and the second main portion 122a of the second internal electrode 122 include a second recess 122a-1 having a shape that is recessed from the center in the second direction in the third direction, it is possible to effectively reduce the step difference of the stacked electronic component 100 without further processes while ensuring a sufficient overlapping region of the first internal electrode 121 and the second internal electrode 122 in the first direction.

[0050] In this case, the center of the first internal electrode 121 in the second direction can mean the central region of the area obtained by dividing the first main portion 121a into three equal parts in the second direction, and the center of the second internal electrode 122 in the second direction can mean the central region of the area obtained by dividing the second main portion 122a into three equal parts in the second direction. That is, in one embodiment, the first recess 121a-1 can be located in the central region of the area obtained by dividing the first main portion 121a into three equal parts in the second direction, and the second recess 122a-1 can be located in the central region of the area obtained by dividing the second main portion 122a into three equal parts in the second direction.

[0051] The method for forming the first dummy patterns 221a, 221b and the second dummy patterns 222a, 222b is not particularly limited. For example, the first dummy patterns 221a, 221b can be formed by cutting a part of the second internal electrode 122, and the second dummy patterns 222a, 222b can be formed by cutting a part of the first internal electrode 121. By arranging such first dummy patterns 221a, 221b and second dummy patterns 222a, 222c on a dielectric layer 111 where the first internal electrode 121 and second internal electrode 122 are not formed, the effect of mitigating the step difference can be achieved, and since no further printing process is performed other than the process of printing the internal electrodes 121, 122, the efficiency of the process can be improved.

[0052] In one embodiment, the second lead portions 122b and 122c are arranged extending in a third direction from the second recess 122a-1, and the average length of the second lead portions 122b and 122c in the second direction may be shorter than the average length of the second recess in the second direction. This not only minimizes the exposed area of ​​the lead portions 122b and 122c to which external moisture can penetrate, but also reduces the step of the multilayer electronic component 100 by forming the first dummy electrodes 221a and 221b in the margin portion adjacent to the first recess 121a-1. At this time, the difference between the average length of the second lead portions 122b and 122c in the second direction and the average length of the second recess in the second direction may be 10 μm or more, but is not limited to this and may vary depending on the size of the multilayer electronic component.

[0053] In one embodiment, at least a portion of the first dummy electrodes 221a and 221b can overlap with the second lead portions 122b and 122c in a first direction. A structure in which at least a portion of the first dummy electrodes 221a and 221b overlap with the second lead portions 122b and 122c in a first direction can be formed by adjusting the shapes of the pattern for forming the first internal electrode 121 and the pattern for forming the second internal electrode 122, thereby further improving the effect of mitigating the step difference of the stacked electronic component 100.

[0054] Similarly, in one embodiment, at least a portion of the second dummy electrodes 222a and 222b can overlap with the first lead portions 112b and 112c in the first direction.

[0055] Referring to Figures 2 and 3, the main body 110 can include dielectric patterns 321 and 322 that are in contact with the corner where the third surface 3 and the fifth surface 5 meet, the corner where the fourth surface 4 and the fifth surface 5 meet, the corner where the third surface 3 and the sixth surface 6 meet, and the corner where the fourth surface 4 and the sixth surface 6 meet.

[0056] The dielectric patterns 321 and 322 can be arranged for each dielectric layer 111 on which the first internal electrode 121 and the second internal electrode 122 are formed. By arranging them at the corners of the main body 110, which is subject to severe sintering shrinkage, the step difference of the stacked electronic component 100 can be mitigated, and the occurrence of delamination can be reduced.

[0057] The dielectric patterns 321 and 322 may contain the same material as the dielectric layer 111, but may further contain dye to distinguish them from the dielectric layer 111 and to identify any cracks that may occur at the corners of the main body 110.

[0058] The dyes included in dielectric patterns 321 and 322 are not particularly limited, and dielectric patterns 321 and 322 may include one or more inorganic dyes such as iron oxide (Fe2O3) and manganese oxide (MnO2), ceramic dyes such as zirconium oxide (ZrO2) and cobalt oxide (Co3O4), and mixtures thereof. By including one or more of these inorganic dyes, ceramic dyes, and mixtures thereof in dielectric patterns 321 and 322, it is possible to identify cracks that may occur at the corners of the main body 110 even after firing.

[0059] Referring to Figure 3, the dielectric patterns 321 and 322 can be distinguished by their placement. Specifically, the dielectric pattern placed on the same dielectric layer as the first internal electrode 121 can be classified as the first dielectric pattern 321, and the dielectric pattern placed on the same dielectric layer as the second internal electrode 122 can be classified as the second dielectric pattern 322.

[0060] The first dielectric pattern 321 may include a first-first dielectric pattern 321a in contact with the third surface 3 and the fifth surface 5, a first-second dielectric pattern 321b in contact with the fourth surface 4 and the fifth surface 5, a first-third dielectric pattern 321c in contact with the third surface 3 and the sixth surface 6, and a first-fourth dielectric pattern 321d in contact with the fourth surface and the sixth surface 6.

[0061] The second dielectric pattern 322 may include a second-first dielectric pattern 322a in contact with the third surface 3 and the fifth surface 5, a second-second dielectric pattern 322b in contact with the fourth surface 4 and the fifth surface 5, a second-third dielectric pattern 322c in contact with the third surface 3 and the sixth surface 6, and a second-fourth dielectric pattern 322d in contact with the fourth surface and the sixth surface 6.

[0062] Referring to Figure 4, the first internal electrode 121 and the second internal electrode 122 can overlap in the first direction, and the second dummy electrodes 222a and 222b can be connected to the first external electrode 130 or the second external electrode 140 and positioned separately from the second internal electrode 122.

[0063] Referring to Figure 5, the first dummy electrodes 221a and 221b can be positioned at a distance from the first main portion 121a and can overlap with the second lead portion 122b in the first direction. In Figure 5, the first main portion 121a and the second main portion 122a are positioned at a distance from the first external electrode 130 and the second external electrode 140, but the first internal electrode 121 may be connected to the first external electrode 130 and the second external electrode 140 via the first lead portions 121b and 121c, and the second internal electrode 122 may be connected to the third external electrode 150 and the fourth external electrode 160 via the second lead portions 122b and 122c.

[0064] Referring to Figure 6, the first main portion 121a is a region that overlaps with the second internal electrode 122 in the first direction, and the first dummy electrodes 221a and 221b can be arranged at a distance from the first main portion 121a. On the other hand, the first dummy electrodes 221a and 222b and the second internal electrode 122 can overlap in the first direction.

[0065] Referring to Figure 7, the first main section 121a and the second main section 122a may overlap in the first direction, and the overlapping area of ​​the first main section 121a and the second main section 122a in the first direction may be larger than the overlapping area of ​​the first dummy electrodes 221a and 222b and the second internal electrode 122 in Figure 6.

[0066] Referring to Figure 8, WM represents the distance between the first lead portions 121b and 122c and the fifth surface 5 or sixth surface 6 in the third direction, and L1 represents the distance between the first main portion 121a and the fifth surface 5 or sixth surface 6 in the third direction.

[0067] In one embodiment, L1 may be 10 μm or more, and L1 / WM may be 0.1 or less. This improves the effect of mitigating the step height of the multilayer electronic component 100 and mitigates the occurrence of delamination due to a decrease in adhesive strength between dielectric layers. If L1 is less than 10 μm, the effect of mitigating the step height may be insufficient, and if L1 / WM exceeds 0.1, delamination may occur due to a decrease in adhesive strength between dielectric layers.

[0068] Referring to Figure 8, the distance between the second dummy electrodes 222a and 222b and the fifth surface 5 or sixth surface 6 in the third direction is represented by WM, and the distance between the second main section 122a and the fifth surface 5 or sixth surface 6 in the third direction is represented by L1'.

[0069] In one embodiment, L1' may be 10 μm or more, and L1' / WM' may be 0.1 or less. This can improve the effect of mitigating the step height of the multilayer electronic component 100 and mitigate the occurrence of delamination due to a decrease in adhesive strength between dielectric layers. If L1' is less than 10 μm, the effect of mitigating the step height may be insufficient, and if L1' / WM' exceeds 0.1, delamination may occur due to a decrease in adhesive strength between dielectric layers.

[0070] Referring to Figure 8, L2 represents the distance in the third direction between the first recess 121a-1 and the first dummy electrodes 221a and 221b.

[0071] In one embodiment, L2 may be 10 μm or more, and L2 / WM may be 0.2 or less. This improves the effect of mitigating the step height of the stacked electronic component 100 and prevents short circuits from occurring between the internal electrode and the dummy electrode. If L2 is less than 10 μm, the effect of mitigating the step height may be insufficient, and if L2 / WM exceeds 0.2, the gap between the internal electrode and the dummy electrode becomes narrow, which may cause problems such as short circuits.

[0072] Referring to Figure 8, L3 represents the distance between the second internal electrode 122 and the second dummy electrodes 222a and 222b in the second direction, and LM represents the distance between the second internal electrode 122 and the third surface 3 or the fourth surface 4 in the second direction.

[0073] In one embodiment, L3 / LM may be between 0.05 and 0.3. This ensures sufficient mitigation of the step height of the stacked electronic component 100 and prevents short circuits from occurring between the internal electrode and the dummy electrode. If L3 / LM is less than 0.05, there is a possibility of short circuits occurring between the internal electrode and the dummy electrode, and if L3 / LM is greater than 0.3, the mitigation of the step height may be insufficient.

[0074] Referring to Figure 8, the first main portion 121a may include a first convex portion 121a-2 which is a region located on both sides of the first recess 121a-1 in the second direction, and the second main portion 122a may include a second convex portion 122a-2 which is a region located on both sides of the second recess 122a-1 in the second direction.

[0075] In Figure 8, L4 represents the distance in the second direction between the second lead portions 222a and 222b and the second protrusion 122a-2.

[0076] In one embodiment, L4 may be 10 μm or more, which prevents overlapping of the patterns between the main portion 122a and the lead portions 122b and 122c of the second internal electrode 122. The upper limit of L4 is not particularly limited and may vary depending on the size of the multilayer electronic component 100.

[0077] In Figure 8, L5 represents the average length of the second dummy electrodes 222a and 222b in the second direction.

[0078] In one embodiment, L5 may be 5 μm or more, which can mitigate delamination due to a decrease in adhesive strength between dielectric layers and prevent short circuits between the dummy electrode and the internal electrode. The upper limit of L5 is not particularly limited and may vary depending on the size of the LM.

[0079] In Figure 8, L6 represents the average length of the second lead sections 222a and 222b in the third direction.

[0080] In one embodiment, L6 may be 5 μm or more, which can mitigate delamination due to a decrease in adhesive strength between dielectric layers and prevent short circuits between the dummy electrode and the internal electrode. The upper limit of L6 is not particularly limited and may vary depending on the size of the LM.

[0081] Examples of methods for measuring L1-L6, L1', WM, WM', and LM include measuring the cross-sections of the stacked electronic component 100 in the second and third directions using measuring equipment such as an optical microscope (OM) or a scanning electron microscope (SEM). When measuring the separation distance among L1-L6, L1', WM, WM', and LM, the minimum value of the separation distance can be measured, and when determining the average length or average width, the average value of values ​​measured at three or more equally spaced points perpendicular to the length or width can be measured.

[0082] Referring to Figure 1, external electrodes 130, 140, 150, and 160 may be placed on the main body 110.

[0083] Referring to Figures 3 and 4, the external electrodes 130, 140, 150, and 160 may include a first external electrode 130 positioned on the third surface 3 of the main body 110 and connected to the first internal electrode 121, a second external electrode 140 positioned on the fourth surface 4 and connected to the first internal electrode 121, a third external electrode 150 positioned on the fifth surface 5 and connected to the second internal electrode 122, and a fourth external electrode 160 positioned on the sixth surface 6 and connected to the second internal electrode 122.

[0084] On the other hand, the external electrodes 130, 140, 150, and 160 may be formed using any material that has electrical conductivity, such as metal, and the specific material may be determined by considering electrical properties, structural stability, etc., and may also have a multilayer structure.

[0085] For example, the external electrodes 130, 140, 150, and 160 may include electrode layers 131, 141, 151, and 161 disposed on the main body 110, and plating layers 132, 142, 152, and 162 formed on the electrode layers 131, 141, 151, and 161.

[0086] As a more specific example for electrode layers 131, 141, 151, and 161, the electrode layers may be fired electrodes containing a conductive metal and glass, or resin-based electrodes containing a conductive metal and resin.

[0087] Furthermore, the electrode layers 131, 141, 151, and 161 may be formed in a manner in which a fired electrode and a resin-based electrode are sequentially formed on the main body. In addition, the electrode layers may be formed by transferring a sheet containing a conductive metal onto the main body, or by transferring a sheet containing a conductive metal onto a fired electrode.

[0088] The conductive metal contained in the electrode layers 131, 141, 151, and 161 can be a material with excellent electrical conductivity, but is not particularly limited. For example, the conductive metal may be one or more of nickel (Ni), copper (Cu), and alloys thereof, and preferably copper (Cu) to improve adhesion to the main body.

[0089] The plating layers 132, 142, 152, and 162 play a role in improving mounting characteristics. The types of plating layers 132, 142, 152, and 162 are not particularly limited and may be plating layers containing one or more of Ni, Sn, Pd, and their alloys, and may be formed in multiple layers.

[0090] As a more specific example for the plating layers 132, 142, 152, and 162, the plating layer may be a Ni plating layer or an Sn plating layer, and may be a configuration in which a Ni plating layer and an Sn plating layer are sequentially formed on the electrode layers 131, 141, 151, and 161, or may be a configuration in which an Sn plating layer, a Ni plating layer, and an Sn plating layer are sequentially formed. Furthermore, the plating layer may include multiple Ni plating layers and / or multiple Sn plating layers.

[0091] (Example of experiment) Table 1 shows the results of determining whether cracks or delamination occurred after firing, as well as the printability and DC resistance compatibility, for samples with different L1 / WM values.

[0092] The sample size is 1005, and the number of layers of internal electrodes is 450 to 500.

[0093] For each test number, a total of 63 lots were used, and 35 samples were randomly selected from each lot to determine each characteristic.

[0094] Test number 1 is the case in which the first internal electrode and the second internal electrode do not include a recess as in the present invention, and test numbers 2 to 6 are the case in which, as in one embodiment of the present invention, the first dummy electrode 221 is arranged apart from the first internal electrode and connected to the fifth surface 5 or the sixth surface 6, and the second dummy electrode 222 is arranged apart from the second internal electrode 122 and connected to the third surface 3 or the fourth surface 4, and the first main portion 121a of the first internal electrode 121 includes a first recess 121a-1 having a shape that is recessed from the center in the second direction in the third direction, and the second main portion 122a of the second internal electrode 122 includes a second recess 122a-1 having a shape that is recessed from the center in the second direction in the third direction.

[0095] The defect rate for cracks and delamination was assessed by observing the cross-sections of WT and LT samples with an optical microscope to evaluate whether cracks or delamination occurred. A rate of 10% or more with cracks or delamination was rated as △, and a rate of less than 5% was rated as ◎.

[0096] Printability was evaluated as follows: △ if the dummy electrode overlapped with the internal electrode, or if either the dummy electrode or the internal electrode was exposed on an unintended surface of the main body in 10% or more of cases, and ◎ if it occurred in less than 5% of cases.

[0097] DC resistance was evaluated by measuring the DC insulation resistance of multiple samples using a DC resistance measuring device that can test multiple samples simultaneously. A ratio of the decrease in DC insulation resistance to the initial DC insulation resistance was evaluated as follows: △ if 0.7% or more, ○ if 0.5% or more and less than 0.7%, and ◎ if less than 0.5%.

[0098] [Table 1]

[0099] Referring to Table 1, it can be seen that the defect rate ratio for cracks and delamination increases as L1 / WM increases, and when L1 / WM exceeds 0.1, more than 19% of defects occur, and it can be seen that the DC resistance characteristics deteriorate as the defect rate increases. Therefore, as in one embodiment, by keeping L1 / WM below 0.1, the step difference in the multilayer electronic component can be reduced, and the problem of cracks and delamination can be mitigated.

[0100] On the other hand, L1 / WM is preferably greater than 0.05, which prevents overlapping between electrodes during electrode printing.

[0101] Furthermore, the results in Table 1 can also be applied to L1' / LM. That is, when L1' / WM' is 0.1 or less, the step height of the multilayer electronic component can be reduced, and the problems of cracking and delamination can be mitigated.

[0102] Although embodiments of the present invention have been described in detail above, the present invention is not limited by the embodiments described above and the accompanying drawings, but is limited by the claims provided herein. Therefore, within the scope of the technical idea of ​​the present invention as described in the claims, various forms of substitution, modification, and alteration are possible by persons with ordinary skill in the art, and these also fall within the scope of the present invention.

[0103] Furthermore, the expression “one embodiment” as used in this disclosure does not mean that each embodiment is the same as another, but is provided to highlight and illustrate the unique and distinct features of each embodiment. However, the embodiments presented above do not preclude their realization in combination with the features of other embodiments. For example, even if a matter described in one embodiment is not described in another embodiment, it can be understood as a description related to the other embodiment unless there is a contradictory or contrary description of that matter in the other embodiment.

[0104] The terms used in this disclosure are used solely to illustrate one embodiment and are not intended to limit the disclosure. Where otherwise clearly the context indicates otherwise, singular expressions include plural expressions. [Explanation of Symbols]

[0105] 100: Stacked Electronic Components 110: Main unit 111: Dielectric layer 112, 113: Cover section 121, 122: Internal electrode 121a, 122a: Main section 121b, 121c, 122b, 122c: Lead section 221, 222: Dummy electrodes 321, 322: Dielectric patterns 130, 140, 150, 160: External electrode 131, 141, 151, 161: Electrode layer 132, 142, 152, 162: Plating layer

Claims

1. A body including a dielectric layer, first internal electrodes and second internal electrodes arranged alternately in a first direction with the dielectric layer in between, first and second surfaces facing the first direction, third and fourth surfaces facing a second direction perpendicular to the first direction, fifth or sixth surface facing a third direction perpendicular to the first and second directions, a first dummy electrode positioned at a distance from the first internal electrode and connected to the fifth or sixth surface, and a second dummy electrode positioned at a distance from the second internal electrode and connected to the third or fourth surface, A first external electrode is arranged on the third surface and connected to the first internal electrode, A second external electrode is positioned on the fourth surface and connected to the first internal electrode, A third external electrode is positioned on the fifth surface and connected to the second internal electrode, The system includes a fourth external electrode, which is positioned on the sixth surface and connected to the second internal electrode, The first internal electrode includes a first main portion that overlaps with the second internal electrode in the first direction, and a first lead portion that extends from the first main portion in the second direction. The second internal electrode includes a second main portion that overlaps the first internal electrode in the first direction, and a second lead portion that extends from the second main portion in the third direction. A stacked electronic component wherein the first main portion includes a first recess having a shape that is recessed from the center in the second direction in the third direction, and the second main portion includes a second recess having a shape that is recessed from the center in the second direction in the third direction.

2. The second lead portion is arranged extending from the second recess in the third direction, The stacked electronic component according to claim 1, wherein the average length of the second lead portion in the second direction is shorter than the average length of the second recess in the second direction.

3. The stacked electronic component according to claim 2, wherein the difference between the average length of the second lead portion in the second direction and the average length of the second recess in the second direction is 10 μm or more.

4. The stacked electronic component according to claim 1, wherein at least a portion of the first dummy electrode overlaps with the second lead portion in the first direction.

5. The stacked electronic component according to claim 1, wherein at least a portion of the second dummy electrode overlaps with the first lead portion in the first direction.

6. The first recess is located in the central region of the area obtained by dividing the first main portion into three equal parts in the second direction. The stacked electronic component according to claim 1, wherein the second recess is located in the central region of the region obtained by dividing the second main portion into three equal parts in the second direction.

7. The stacked electronic component according to claim 1, wherein the main body further includes a dielectric pattern in contact with a corner where the third surface and the fifth surface meet, a corner where the fourth surface and the fifth surface meet, a corner where the third surface and the sixth surface meet, and a corner where the fourth surface and the sixth surface meet.

8. The distance between the first lead portion and the fifth or sixth surface in the third direction is WM. When L1 is the distance between the first main portion and the fifth or sixth surface in the third direction, A multilayer electronic component according to any one of claims 1 to 7, wherein L1 is 10 μm or more and L1 / WM is 0.1 or less.

9. The distance between the second dummy electrode and the fifth or sixth surface in the third direction is WM'. When L1' is the distance between the second main portion and the fifth or sixth surface in the third direction, A multilayer electronic component according to any one of claims 1 to 7, wherein L1' is 10 μm or more, and L1' / WM' is 0.1 or less.

10. The distance between the first lead portion and the fifth or sixth surface in the third direction is WM. If L2 is the distance between the first recess and the first dummy electrode in the third direction, A multilayer electronic component according to any one of claims 1 to 7, wherein L2 is 10 μm or more and L2 / WM is 0.2 or less.

11. The distance between the second internal electrode and the second dummy electrode in the second direction is L3. When LM is the distance between the second internal electrode and the third or fourth surface in the second direction, A stacked electronic component according to any one of claims 1 to 7, wherein L3 / LM is 0.05 or more and 0.3 or less.

12. When the regions located on both sides of the second recess of the second internal electrode in the second direction are defined as the second convex portion, and the distance L4 is the distance at which the second lead portion separates from the second convex portion in the second direction, The multilayer electronic component according to any one of claims 1 to 7, wherein L4 is 10 μm or more.

13. When the average length of the second dummy electrode in the second direction is L5, The multilayer electronic component according to any one of claims 1 to 7, wherein L5 is 5 μm or more.

14. When the average length of the second lead portion in the third direction is L6, The multilayer electronic component according to any one of claims 1 to 7, wherein L6 is 5 μm or more.