Comparator circuit and semiconductor integrated circuit device thereof
The CMOS comparator circuit addresses the issue of large offset in conventional designs by direct positive voltage input and fixed reference voltage settings, enhancing reliability and stability in zero-crossing detection and battery charging control.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- SHINDENGEN ELECTRIC MANUFACTURING CO LTD
- Filing Date
- 2024-12-27
- Publication Date
- 2026-07-09
Smart Images
Figure 2026115145000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a comparator circuit that compares a signal voltage that varies within a positive and negative voltage range with positive and negative reference voltages, and a semiconductor integrated circuit device thereof.
Background Art
[0002] Conventionally, as a comparator circuit that inputs a signal voltage that varies within a positive and negative voltage range such as an alternating current voltage and compares it with positive and negative reference voltages to output a detection signal, for example, the one shown in FIG. 8 is known.
[0003] FIG. 8 shows the functional configuration of a comparator circuit, which includes a differential amplifier circuit 160, a positive reference voltage source +Vref, a negative reference voltage source -Vref, a reference voltage switching circuit 145, and an input signal control unit 156.
[0004]
[0004] Here, semiconductor integrated circuit devices constituting the comparator circuit include a bipolar configuration and a CMOS configuration. The bipolar configuration has the merit that the offset (variation) is small and the circuit is simple, but it has the demerit that the wafer process becomes expensive due to the large circuit area. On the other hand, the CMOS configuration has the demerit that the offset (variation) becomes large, but it has the merit that the wafer process becomes inexpensive due to the small circuit area. Therefore, a comparator circuit with a CMOS configuration is adopted.
[0005]
[0006] Also, in a comparator circuit with a CMOS configuration, it is operated with a ground-connected power supply in which the negative side of the positive power supply voltage VCC is connected to the ground GND.
[0006] The comparator circuit in FIG. 8 is configured with a CMOS configuration and is operated with a ground-connected power supply. The operation in this case will be as shown in the time chart in Figure 9.
[0007] In Figure 9, the signal voltage input from input terminal 116 ranges from positive voltage to negative voltage. It changes within a range, for example, in a sinusoidal manner.
[0008] Here, since the comparator circuit operates with a ground-connected power supply, the input signal voltage is 0 volts is level-shifted to a predetermined voltage, for example, 1.0 volts, and relative to 0 volts... Therefore, the positive reference voltage +Vref and the negative reference voltage -Vref are at the same level as the input signal voltage. Due to the shift, the positive reference voltage +Vref is, for example, +10 millivolts greater than 1.0 volt. Set to a high 1.01 volts, the negative reference voltage - Vref is, for example, 1.0 volts higher. It is set to 0.99 volts, which is 0 millivolts lower.
[0009] When the signal voltage is in the positive voltage range, the reference voltage switching circuit 145 sets the positive reference voltage. +Vref is set to the differential amplifier circuit 160, and the signal voltage is greater than the positive reference voltage +Vref. When the voltage is high, the comparator output from the differential amplifier circuit 160 is at a high level.
[0010] At the falling edge where the signal voltage drops from a positive voltage range to a negative voltage range, the signal voltage When the positive reference voltage +Vref is reached, the comparator output inverts to an L level, and this As the inversion of the comparator output to the L level occurs, the input signal control unit 156 switches to the reference voltage switching circuit 1 Switch 45 to set a negative reference voltage -Vref to the differential amplifier circuit 160.
[0011] Next, at the rising edge where the signal voltage rises from the negative voltage range to the positive voltage range, When the voltage reaches a negative reference voltage -Vref, the comparator output inverts to a high level. As the comparator output is inverted to a high level, the input signal control unit 156 switches off the reference voltage. Switch the replacement circuit 145 to set a positive reference voltage +Vref to the differential amplifier circuit 160, and thereafter And this is being repeated.
[0012] Figure 10 shows the equivalent circuit diagram when the comparator circuit in Figure 8 is configured using CMOS.
[0013] As shown in Figure 10, the comparator circuit consists of an input circuit section 100, a differential amplifier circuit 102 and It is divided into a reference voltage setting unit 104.
[0014] The differential amplifier circuit 102 includes a constant current source 146, differential pair FETs 128 and 130, and an active load. It consists of FET152 and 154, and the characteristics of FET128, 130, 152, and 154 are as follows. They are considered identical.
[0015] The input circuit section 100 turns on when the power supply voltage VCC is applied following the input terminal 116. T118 and constant current source 120 are connected in series, followed by constant current source 122, resistor 123 and A level shift circuit is provided with FET126 connected in series, and a constant current source 122 and resistor 12 The level-shifted signal voltage is taken from the connection point between 3 and F of the differential amplifier circuit 102. Inputting into gate ET128.
[0016] The reference voltage setting circuit section 104 calculates the voltage divider voltage of the series circuit of the constant current source 136 and the resistor 137. A constant current source 158 and a resistor 160 are supplied to the gate of FET162 as a reference voltage generation circuit. And FET162 is connected in series, and the level shift is from the connection point of constant current source 158 and resistor 160 The positive reference voltage +Vref is used as the reference voltage source 134 for the changeover switch element 142. is set to the gate of the FET 130 of the differential amplifier circuit 102 through, and also the resistor 160 and FE A negative reference voltage -Vref level-shifted from the connection point of T162 is used as the reference voltage source 140 and is set to the gate of the FET 130 of the differential amplifier circuit 102 through the switching switch element 144. is set.
[0017] The switching switch elements 142 and 144 are switched and controlled by the input signal control unit 156. As shown in FIG. 9, when the signal voltage is in the positive voltage range, the switching switch element 142 is on, the switching switch element 144 is off, and the positive reference voltage +Vr from the reference voltage source 134 ef is set to the gate of the FET 130 of the differential amplifier circuit 102.
[0018] When the signal voltage for the gate of the FET 128 is higher than the positive reference voltage +Vref, the differential pair of FETs 128 is on, the FET 130 is off, and also the active load FETs 15 2 and 154 are off. When the FET 128 is on, current flows out from the constant current source 146 through the output point A to the output line, and the comparator output signal E100 becomes the H level, and the comparator output signal E102 from the input signal control unit 156 is also at the H level. At the falling edge when the signal voltage E1 drops from the positive voltage range to the negative voltage range, when the signal voltage reaches the positive reference voltage +Vref at point a, the comparator output signal E100 is inverted to the L
[0019] level. That is, when the signal voltage reaches the positive reference voltage +Vref, the differential pair of F ET128 is off, the FET 130 is on, and the active load FETs 152 and FET15 4 are also on. Current flows into the FET 152 from the output line 58 through the output point A, and flows into the FET 152 through the output point A from the output line 58, The comparator output signal E100 falls to a low level, and the signal from the input signal control unit 156 The comparator output signal E102 also becomes L level. As the comparator output signal E100 is inverted to an L level, the input signal control unit 156 This switches the changeover switch element 142 off and the changeover switch element 144 on, increasing the differential A negative reference voltage -Vref is set at the gate of FET130 in the width circuit 102.
[0020] Next, at the rising edge where the signal voltage rises from the negative voltage range to the positive voltage range, When the voltage reaches the negative reference voltage -Vref at point b, the comparator output signal E100 The signal inverts to a high level. That is, FET128 of the differential pair is on and FET130 is off. Furthermore, the active loads FET152 and FET154 are off, and are turned on by the constant current source 146. Current flows out through the output point A of the FET128, and the comparator output signal E10 0 rises to an H level, and the comparator output signal E102 from the input signal control unit 156 also This corresponds to level H.
[0021] As the comparator output signal E100 is inverted to an H level, the input signal control unit 156 This switches the changeover switch element 142 on and the changeover switch element 144 off, increasing the differential A positive reference voltage +Vref is set in the width circuit 102, and this is repeated thereafter. [Prior art documents] [Patent Documents]
[0022] [Patent Document 1] Japanese Patent Publication No. 2006-332731 [Patent Document 2] Japanese Patent Publication No. 2014-147035 [Patent Document 3] Japanese Patent Publication No. 2011-217458 [Overview of the project] [Problems that the invention aims to solve]
[0023] By the way, in conventional CMOS comparator circuits, the entire circuit is disorganized There are many pinpoint locations, which leads to a problem of large overall circuit offset.
[0024] Figure 11 shows the variation points in a conventional comparator circuit, where the signal voltage is positive. When there is a voltage range (on the positive side), the point of variation and when the signal voltage is in a negative voltage range. For the case of a positive result (negative side), there are six identical variation points P1 to P6. The variation point P1 is the pair variation of constant current sources 122 and 158, and variation point P 2 is the variation in the pairing of resistors 123 and 160, and the variation point P3 is FET126, This represents a variation of 162 pairs.
[0025] Furthermore, the variation point P4 is the differential pair of FETs 128 and 130 in the differential circuit section 102. This is variation due to the offset, and variation point P5 is variation in resistance 137, Point P6 represents the variation in the constant current source 136.
[0026] Here, if we assume that the offset of one variation point is, for example, 4 millivolts, then there are 6 variation points. The overall circuit offset due to points P1 to P6 is approximately 24 millivolts, which is quite large. There is a problem. Here, offset refers to the range of positive and negative voltage fluctuations, and the offset is 4 millivolts. The bolt indicates a variation range from +4 mmVolt to -4 mmVolt, with an offset of 24 mm. Revolt refers to a variation range from +24 millivolts to -24 millivolts.
[0027] This invention makes it possible to reduce the offset of the entire circuit by reducing the number of variation points in the circuit. The objective is to provide a comparator circuit and a semiconductor integrated circuit device thereof. [Means for solving the problem]
[0028] (Comparator circuit) This invention takes a signal voltage that changes within a positive and negative voltage range as input and compares it with positive and negative reference voltages. Output the comparison results and use a grounded power supply with the negative side of the power supply connected to the ground line. A working comparator circuit, The positive voltage side directly inputs a signal voltage that changes within the positive voltage range without level shifting. Input circuit and, Level shifting of a signal voltage that changes within the negative voltage range to a signal voltage that changes within the positive voltage range. The negative voltage input circuit that is input as follows: Input voltage switching that switches the signal voltage from the positive voltage input circuit to the negative voltage input circuit and outputs the result. Circuits and, A positive reference voltage (+Vref) is set to be a positive voltage that is a predetermined voltage higher than the ground voltage. A quasi-voltage setting circuit, A negative reference voltage (-Vref) that is a predetermined voltage lower than the ground voltage is set within the positive voltage range. A negative reference voltage setting circuit that sets the level by shifting, Reference voltage output that switches between a positive reference voltage setting circuit and a negative reference voltage setting circuit. Switching circuit and The input voltage from the input voltage switching circuit and the positive or negative reference voltage from the reference voltage switching circuit. A differential amplifier circuit that generates a comparator output signal by comparing quasi-voltages, Based on the comparator output signal from the differential amplifier circuit, the input voltage switching circuit and An input signal control unit that controls the switching of the reference voltage switching circuit, It is characterized by having the following features.
[0029] (Bandgap reference circuit) The positive reference voltage setting circuit is set to the voltage that is fixedly generated in the bandgap reference circuit. Based on this, the aforementioned positive reference voltage is set.
[0030] (Differential amplifier circuit: detection of falling edge zero crossing) A differential amplifier circuit has a signal voltage input terminal, a reference voltage input terminal, and an output terminal, and the signal voltage The falling edge of the input voltage to the input terminal reaches the positive reference voltage, and the falling edge is zero. If a problem is detected, the comparator output signal from the output terminal is inverted to a logic level of 1. .
[0031] (Differential amplifier circuit: detection of rising edge zero crossing) In a differential amplifier circuit, the rising edge of the input voltage to the signal voltage input terminal reaches a negative reference voltage. When this occurs, the rising edge zero crossing is detected and the comparator output signal from the output terminal is detected. Invert to another logical level.
[0032] (Input signal control unit when detecting falling edge zero crossing) The input signal control unit checks when the comparator output signal from the differential amplifier circuit is on the falling edge zero. When loss is detected and the signal is inverted to an L level, which corresponds to a logic level of 1, the input voltage switching circuit Switching the signal voltage output from the negative voltage input circuit and the reference voltage switching circuit Switches the output from the negative reference voltage from the reference voltage setting circuit to a positive voltage range with level shifted. ru.
[0033] (Input signal control unit when detecting rising edge zero crossing) The input signal control unit receives the comparator output signal from the differential amplifier circuit as the rising edge zeros... When loss is detected and the signal is inverted to a different logic level, which is a high level, the input voltage switching circuit Switching the signal voltage output from the positive voltage input circuit and the reference voltage switching circuit to positive Switch to the output of the positive reference voltage from the reference voltage setting circuit.
[0034] (Delay circuit) The reference voltage input from the reference voltage switching circuit is delayed at the reference voltage input terminal of the differential amplifier circuit. A delay circuit is provided for input, and there is a level shift due to the detection of zero crossing of the signal voltage. In contrast to switching without bell shifting, the switching of the reference voltage is delayed to prevent noise generation.
[0035] (Examples of comparator circuit applications) A comparator circuit takes the output of an AC power supply as input and uses a group of rectifier elements and a group of switching elements. A battery charging device that charges the battery using a DC voltage rectified by a rectifier circuit. It is installed in the control circuit.
[0036] (Semiconductor integrated circuit equipment) Furthermore, the present invention takes a signal voltage that changes within a positive and negative voltage range as input and compares it with a positive and negative reference voltage. Compare and output the comparison results, and connect the negative side of the power supply to the ground line. A semiconductor integrated circuit device equipped with a comparator circuit that operates on a power supply, The positive voltage side directly inputs a signal voltage that changes within the positive voltage range without level shifting. Input circuit and, Level shifting of a signal voltage that changes within the negative voltage range to a signal voltage that changes within the positive voltage range. The negative voltage input circuit that is input as follows: Input voltage switching that switches the signal voltage from the positive voltage input circuit to the negative voltage input circuit and outputs the result. Circuits and, Positive reference voltage setting circuit that sets a positive reference voltage that is a predetermined voltage higher than the ground voltage. and, A negative reference voltage, which is a predetermined voltage lower than the ground voltage, is level-shifted into the positive voltage range. A negative reference voltage setting circuit is used to set the voltage, Reference voltage output that switches between a positive reference voltage setting circuit and a negative reference voltage setting circuit. Switching circuit and The input voltage from the input voltage switching circuit and the positive or negative reference voltage from the reference voltage switching circuit. A differential amplifier circuit that generates a comparator output signal by comparing quasi-voltages, Based on the comparator output signal from the differential amplifier circuit, the input voltage switching circuit and An input signal control unit that controls the switching of the reference voltage switching circuit, It is characterized by comprising a differential amplifier circuit, an input signal control unit, a delay circuit and The application examples of the comparator circuit are the same as those described above. [Effects of the Invention]
[0037] (Effect of a comparator circuit) This invention takes a signal voltage that changes within a positive and negative voltage range as input and compares it with positive and negative reference voltages. Output the comparison results and use a grounded power supply with the negative side of the power supply connected to the ground line. A CMOS comparator circuit in operation, wherein the signal voltage changes over a positive voltage range. A positive voltage input circuit that directly inputs the voltage without level shifting, and a negative voltage range that changes in the negative voltage range. The negative voltage input is a signal voltage that is level-shifted to a signal voltage that changes within a positive voltage range. The input circuit switches between outputting signal voltages from the positive voltage input circuit and the negative voltage input circuit. A voltage switching circuit and a positive reference voltage (+Vref) that is a predetermined voltage higher than the ground voltage. A positive reference voltage setting circuit that sets the ground voltage, and a negative reference voltage that is a predetermined voltage lower than the ground voltage. A negative reference voltage setting circuit that sets the voltage (-Vref) by level-shifting it to a positive voltage range, A reference voltage switch that switches between outputting reference voltages from a positive reference voltage setting circuit and a negative reference voltage setting circuit. The switching circuit, the input voltage from the input voltage switching circuit and the positive reference voltage from the reference voltage switching circuit or This is a differential amplifier circuit that generates a comparator output signal by comparing a negative reference voltage, and a differential amplifier Based on the comparator output signal from the circuit, the input voltage switching circuit and the reference voltage switching circuit are switched. Because it includes an input signal control unit that controls the switching of the replacement circuit, the positive side circuit is the signal voltage The input is taken directly without level shifting, and the reference voltage is also band-dependent without level shifting. By using a fixed voltage via a gap reference circuit, the number of variation points can be significantly reduced. This reduces the offset and minimizes it.
[0038] (Effect of the bandgap reference circuit) Furthermore, the positive reference voltage setting circuit is fixed in the bandgap reference circuit. Since the positive reference voltage is set based on the voltage, the negative circuit is as follows: Similar to before, the signal voltage and reference voltage are level-shifted, but the positive reference voltage is... By using a fixed voltage for the negative gap reference circuit, the negative reference voltage The level shift simplifies the circuit configuration, and the number of variation points is reduced compared to conventional circuits. Therefore, the offset is reduced. For this reason, the entire circuit, including both the positive and negative sides, This allows for optimization by significantly reducing the offset.
[0039] (Effect of detecting falling edge zero-crossing in a differential amplifier circuit) Furthermore, the differential amplifier circuit has a signal voltage input terminal, a reference voltage input terminal, and an output terminal. The falling edge of the input voltage to the signal voltage input terminal reaches the positive reference voltage and the falling edge zero When a cross is detected, the comparator output signal from the output terminal is reversed to a logic level of 1. By making it rotate, it is possible to reliably detect the edge zero crossing of the falling edge of the input voltage. Let's assume that.
[0040] (Effect of detecting the rising edge zero-crossing in a differential amplifier circuit) Furthermore, in a differential amplifier circuit, the rising edge of the input voltage to the signal voltage input terminal is a negative reference voltage. When the pressure is reached, the rising edge zero crossing is detected and a comparator output is generated from the output terminal. Because the signal is inverted to another logic level, the rising edge of the input voltage is affected. This ensures reliable detection of Rocross.
[0041] (Effect of the input signal control unit when detecting a falling edge zero crossing) Furthermore, the input signal control unit detects when the comparator output signal from the differential amplifier circuit falls on its falling edge. When a zero-crossing is detected and the signal is inverted to an L level, which corresponds to a logic level of 1, the input voltage is switched off. The replacement circuit is switched to the output of the signal voltage from the negative voltage side input circuit, and the reference voltage switching circuit The path is used to output a negative reference voltage from a negative reference voltage setting circuit, which has been level-shifted to a positive voltage range. Because it was made switchable, the zero-crossing of the falling edge of the signal voltage is determined by the setting of the reference voltage. Input switching of positive and negative signal voltages and setting of reference voltage synchronized with detection. By doing this, we can ensure that the falling edge of the signal voltage, which changes within the positive voltage range, crosses zero. This makes detection possible.
[0042] (Effect of the input signal control unit when detecting rising edge zero crossing) Furthermore, the input signal control unit detects the rising edge of the comparator output signal from the differential amplifier circuit. When a zero-crossing is detected and the logic level is inverted to a high level, the input voltage is switched off. The replacement circuit is switched to the output of the signal voltage from the positive voltage side input circuit, and the reference voltage switching circuit The circuit was switched to the output of the positive reference voltage from the positive reference voltage setting circuit, so the reference voltage The positive and negative sides are synchronized with the detection of zero-crossing of the rising edge of the signal voltage based on the pressure setting. By switching the input signal voltage on the side and switching the reference voltage setting, the voltage can be changed within the positive voltage range. This enables reliable detection of zero-crossing at the rising edge of the signal voltage.
[0043] (Effect of delay circuit) Furthermore, the reference voltage input terminal of the differential amplifier circuit is connected to the reference voltage input from the reference voltage switching circuit. A delay circuit is provided to delay the input, and there is a level shift associated with the detection of zero-crossing of the signal voltage. By delaying the switching of the reference voltage compared to switching without level shift, noise generation is prevented. Therefore, in zero-crossing detection of the rising edge of the signal voltage, a level-shifted signal is used. Switching of signal voltage by direct input from the reference voltage, and switching from a negative reference voltage to a positive reference voltage. When the signals overlap, the likelihood of the comparator output signal chattering increases, but the reference By delaying the voltage switching, the switching of the signal voltage and the switching of the reference voltage do not overlap. This prevents contact bounce and enables stable operation of the comparator circuit.
[0044] (Effects of applying a comparator circuit) Furthermore, the comparator circuit takes the output of the AC power supply as input and consists of a group of rectifier elements and a switching element. A battery charger uses a rectifier circuit equipped with a group of components to charge the battery with the rectified DC voltage. Because it is installed in the control circuit of an electrical device, it is an AC power source, for example, the three-phase power output of a three-phase AC generator. By inputting this into the comparator circuit, the switching elements of each phase of the rectifier circuit are controlled by the signal voltage. The zero-crossing of the rising edge is detected, the battery is turned off to charge, and the falling edge of the signal voltage... By detecting a zero crossover and turning it on, the battery voltage is returned to the three-phase AC generator. This enables appropriate charge control to prevent charging.
[0045] Furthermore, the semiconductor integrated circuit device of the present invention is similar to the comparator circuit described above. It is effective. [Brief explanation of the drawing]
[0046] [Figure 1] This is an explanatory diagram showing an equivalent circuit of an embodiment of a comparator circuit using a CMOS configuration. [Figure 2] This is a time chart showing an example of a voltage waveform in a comparator circuit. [Figure 3] This is a time chart diagram showing an example of a voltage waveform used to prevent malfunctions by a delay circuit. [Figure 4] This is an explanatory diagram showing the variation points on the positive side of a comparator circuit. [Figure 5] This is an explanatory diagram showing the variation point on the negative side of a comparator circuit. [Figure 6] This is an explanatory diagram showing a battery charging device to which the comparator circuit of the embodiment is applied. [Figure 7] This is a time chart showing an example of the voltage waveform of a battery charging device. [Figure 8] This is an explanatory diagram showing the functional blocks of a conventional comparator circuit. [Figure 9] This is a time chart showing the voltage waveform of a conventional comparator circuit. [Figure 10] This is an explanatory diagram showing the equivalent circuit of a conventional CMOS-based comparator circuit. [Figure 11] This is an explanatory diagram showing the variation points of a conventional comparator circuit. [Modes for carrying out the invention]
[0047] The following are embodiments of the comparator circuit and semiconductor integrated apparatus according to the present invention, based on the drawings. This will be explained in detail below. However, the present invention is not limited to the following embodiments. .
[0048] [Basic Concepts of the Embodiment] First, the basic concept of the embodiment will be explained. The embodiment is, in general terms, a positive and negative voltage It takes a signal voltage that changes within a range as input, compares it with positive and negative reference voltages, and outputs the comparison result. A CMOS configuration that operates with a grounded power supply, with the negative side connected to ground. This concerns inverter circuits.
[0049] Here, "signal voltage that changes within the positive and negative voltage range" refers to a signal voltage that changes sinusoidally within the positive and negative range. It includes AC voltages. Furthermore, it outputs a detection signal by comparing it with positive and negative reference voltages. "Detecting" means comparing a signal voltage that changes within the positive voltage range with a positive reference voltage and outputting a detection signal. Furthermore, it compares a signal voltage that changes within the negative voltage range with a negative reference voltage to output a detection signal. It means two functions that exert force.
[0050] Furthermore, "ground-connected power supply" refers to a DC power supply, such as the positive terminal of a battery, which is connected to the ground. Connect to the power line of the comparator circuit, and connect the negative terminal of the battery to the graph of the comparator circuit. The comparator circuit is connected to the ground and operates using a ground-connected power supply.
[0051] Furthermore, "CMOS configuration" refers to the P-type and N-type metal-oxide-semiconductor field-effect transient By combining stas in a complementary manner, logic gates and other digital circuits are implemented. ru.
[0052] The "comparator circuit" of the embodiment includes a positive voltage side input circuit, a negative voltage side input circuit, and an input voltage Voltage switching circuit, positive reference voltage setting circuit, negative reference voltage setting circuit, reference voltage switching circuit, differential amplifier It consists of a circuit and an input signal control unit.
[0053] Here, the "positive voltage side input circuit" refers to a circuit that changes the signal voltage within the positive voltage range and then shifts the level. This circuit allows for direct input without any processing, and is specific to this particular embodiment.
[0054] Furthermore, a "negative voltage side input circuit" is a circuit that takes a signal voltage that changes within the negative voltage range and inputs it within the positive voltage range. This circuit levels-shifts the signal voltage to the changing signal voltage and inputs it, similar to conventional circuits.
[0055] Furthermore, the "input voltage switching circuit" is a circuit that receives signals from the positive voltage input circuit and the negative voltage input circuit. This is a circuit that switches and outputs voltage, and it is a circuit specific to this embodiment.
[0056] Furthermore, the "positive reference voltage setting circuit" is a circuit that uses a fixed bandgap reference circuit. Based on the predetermined voltage generated, a positive reference voltage + is set to be a predetermined voltage higher than the ground voltage. This is a circuit for setting Vref (for example, +10mV). Here, "bandgap reference A "lens circuit" is a fixed (absolute) reference circuit that is independent of power supply voltage, temperature, and process. It is a circuit that generates voltage, and the reference voltage is used in power supply circuits and comparators.
[0057] Furthermore, a "negative reference voltage setting circuit" is a negative reference voltage that is lower by a predetermined voltage relative to the ground voltage. This is a circuit that sets a quasi-voltage (e.g., -10mV) by level-shifting it to a positive voltage range. This will be the same as the conventional circuit.
[0058] Furthermore, the "reference voltage switching circuit" is a circuit that switches between the positive reference voltage setting circuit and the negative reference voltage setting circuit. This circuit switches and outputs a reference voltage, similar to conventional circuits.
[0059] Furthermore, a "differential amplifier circuit" is a circuit that switches between the input voltage from an input voltage switching circuit and a reference voltage switching circuit. A circuit that generates a comparator output signal by comparing a positive or negative reference voltage. It includes a pair of FETs that constitute the differential section and a pair of FETs that constitute the active load. A typical "differential amplifier circuit" has a signal voltage input terminal, a reference voltage input terminal, and an output terminal. When the falling edge of the input voltage to the signal voltage input terminal reaches the positive reference voltage +Vref, The falling edge zero crossing is detected, and the comparator output signal from the output terminal is used to determine the value of the signal. It inverts to a rational level. Also, the "differential amplifier circuit" is an input to the signal voltage input terminal. Zero-cross rise edge when the rising edge of the power voltage reaches the negative reference voltage -Vref. This device detects a signal and inverts the comparator output signal from the output terminal to another logic level. be.
[0060] Furthermore, the "input signal control unit" refers to the comparator output signal output from the differential amplifier circuit. This is a control unit that controls the switching between the input voltage switching circuit and the reference voltage switching circuit based on the above.
[0061] Therefore, the positive side of the comparator circuit directly shifts the signal voltage without level shifting. The input is connected, and the reference voltage is not level-shifted, but is connected to a bandgap reference circuit. By using absolute voltage, the number of variation points is significantly reduced, minimizing the offset. This makes it possible to do so.
[0062] Furthermore, the negative side of the comparator circuit levels the signal voltage and reference voltage, as in conventional designs. Although it is shifted, the positive side reference voltage is the absolute voltage of the bandgap reference circuit. By using voltage, the level shift is limited to the negative reference voltage only, simplifying the circuit configuration. It becomes simpler, and the offset due to the number of variation points is reduced compared to conventional circuits, but it is still more on the positive side. It becomes larger. As a result, the offset of the entire comparator circuit is sufficiently reduced. Enables optimization.
[0063] Furthermore, the "input signal control unit" is controlled when the comparator output signal from the differential amplifier circuit falls to the falling edge. When a zero crossover is detected and the signal is inverted to an L level which corresponds to a logic level of 1, the input power The voltage switching circuit outputs the signal voltage (level-shifted signal voltage) from the negative voltage input circuit. At the same time, the reference voltage switching circuit switches the negative reference voltage from the negative reference voltage setting circuit to positive. This switches to an output that has been level-shifted to a specific voltage range.
[0064] Furthermore, the "input signal control unit" receives the rising edge of the comparator output signal from the differential amplifier circuit. When a zero cross is detected and the logic level is inverted to an H level, the input power Switch the voltage switching circuit to output the signal voltage from the positive voltage input circuit (directly input signal voltage). In addition to replacing it, the reference voltage switching circuit is set to output the positive reference voltage from the positive reference voltage setting circuit. It's something that can be switched.
[0065] Therefore, in synchronization with the detection of zero-crossing of the signal voltage by setting the reference voltage, the positive side and the multiplier By switching the input signal voltage on the INAS side and switching the reference voltage setting, the positive and negative voltage range can be controlled. Reliably detects zero-crossings at the falling and rising edges of the signal voltage that changes within the range. This makes it possible to do so.
[0066] Here, "logic level 1" and "other logic levels" refer to different logic levels of a binary logic signal. It is a logic level, and "H level" is one level of a binary logic signal, a high level. This includes concepts such as high level, high potential, and "1". Furthermore, "L level" refers to a binary logic signal. The other level, which includes concepts such as low level, low potential, and "0". Furthermore, the "comparator circuit" is a reference voltage switch at the reference voltage input terminal of the differential amplifier circuit. A delay circuit is provided to delay the input of the reference voltage from the circuit, and zero-crossing detection of the signal voltage is performed. The switch from level shift with output to level shift without output delays the switching of the reference voltage. This delays the signal to prevent noise generation.
[0067] In the "comparator circuit" of the embodiment, the zero-crossing of the rising edge of the signal voltage The detection involves switching from a level-shifted signal voltage to a directly input signal voltage, and a negative base The simultaneous switching from a quasi-voltage to a positive reference voltage causes chatter in the comparator output signal. A delay occurs. Therefore, the switching of the reference voltage is performed using a "delay circuit," for example, the charging of a capacitor. By delaying the switching of the signal voltage and the reference voltage, the switching of the signal voltage and the reference voltage do not overlap. This prevents chattering and enables stable operation of the comparator circuit.
[0068] Furthermore, while the circuits and devices to which a "comparator circuit" is applied are arbitrary, one example is... This is applied to the control circuit of a battery charging device. The "battery charging device" is a permanent magnet type three-phase The three-phase power output of the AC generator is used as the input, and the rectifier elements connected to the positive side and the negative side A group of switch elements connected to it is used, and a DC voltage rectified by a full-wave rectifier circuit is used. The battery is charged, and the comparator circuit of this embodiment is powered by a three-phase AC generator. It is provided at the input section for the control circuit of the power generation output voltage of each phase.
[0069] Therefore, the output voltages of each phase of a three-phase AC generator are input to the comparator circuit. Then, the switching elements of each phase of the three-phase full-wave rectifier circuit are zero-crossed at the rising edge of the signal voltage. It turns off when it detects a zero crossing of the falling edge of the signal voltage to charge the battery, and then detects the zero crossing of the falling edge of the signal voltage. By turning it on, the battery voltage is returned to the three-phase AC generator, and the charging control is applied to prevent charging. This makes it possible to perform the task immediately.
[0070] Furthermore, the semiconductor integrated circuit device of the embodiment is substantially the same as the comparator circuit described above. It possesses certain characteristics.
[0071] The following describes specific embodiments in detail, using a "comparator circuit" as an example. The content will be explained in the following sections.
[0072] a. Embodiment of a comparator circuit b. Operation of the comparator circuit c. Operation of the delay circuit d. Variation in comparator circuits d1. Variation on the positive side of the comparator circuit d2. Variation on the negative side of the comparator circuit e. Application to battery charging devices e1. Battery charging device e2. Control circuit operation f. Semiconductor integrated circuit equipment g. Modified form of the present invention
[0073] [a. Embodiment of a comparator circuit] An embodiment of a comparator circuit will be described. In this description, a CMOS configuration will be used. Refer to Figure 1, which shows an equivalent circuit that is an embodiment of the comparator circuit. As such, the comparator circuit 10 consists of an input circuit section 12, a differential amplifier circuit 16, and a reference voltage The setting section 14 is divided, and the power supply voltage VCC from a DC power source such as a battery is connected to the power line 78 The negative side of the DC power supply is connected to the ground line 80, and the ground connection power It operates based on the source.
[0074] The differential amplifier circuit 16 includes a constant current source 46, differential pair FETs 48 and 50, and an active load FET. Composed of FETs 52 and 54, this N-type CMO has the same characteristics as FETs 48, 50, 52, and 54. An S-FET is formed. The area between FETs 48 and 52 is output point A, and output line 55 The comparator output signal E3 is then input to the input signal control unit 56, and the comparator... It is output as the E4 output signal. The input circuit section 12 has an FET1 that turns on when the power supply voltage VCC is applied following the input terminal 15. 8 and the constant current source 20 are connected in series, and the connection point between FET 18 and the constant current source 20 is a signal power It is connected to one of the changeover switch elements 28 of the pressure switching circuit, and to one of the differential pairs of the differential amplifier circuit 16. The signal voltage E1 is input to the gate of FET48, and the signal voltage E1 is level-shifted. It configures a positive voltage input circuit that directly accepts the input without any further processing.
[0075] Furthermore, a level shift is used to change a signal voltage that changes in the negative voltage range to change in the positive voltage range. As the negative voltage input circuit that is input, a constant current source 22, a resistor 24, and a FET 26 are connected in a straight line. A series circuit is provided, and the connection point between FET18 and constant current source20 is connected to the gate of FET26. Connect the FET 26 with the signal voltage E1 and determine the voltage division voltage across the constant current source 22 and resistor 24. The signal voltage E2 is level-shifted, and the other switching element 30 of the input voltage switching circuit It is input to the gate of FET48, which is one of the differential pairs in the differential amplifier circuit 16, via this signal.
[0076] The reference voltage setting unit 14 includes a positive reference voltage setting circuit and a negative reference voltage setting circuit. The voltage setting circuit is provided in the circuit device that implements the comparator circuit 10. The power supply voltage output from the cap reference circuit 32 is independent of temperature and circuit operation. Based on a constant (absolute) reference voltage, a predetermined positive reference voltage +Vref is generated, and the positive reference The voltage source 34 is transmitted to the differential amplifier circuit via one of the switching elements 42 of the reference voltage switching circuit. It is input to the gate of FET 50, the other FET in the 16 differential pair.
[0077] The negative reference voltage setting circuit is a series circuit of a constant current source 36 and an FET 38, and the constant current source 36 A predetermined negative reference voltage -Vref is generated at the connection point of FET38, and the negative Differential amplification via the other switching element 44 of the reference voltage switching circuit from the reference voltage source 40 This is input to the gate of the other FET 50 in the differential pair of circuit 16.
[0078] Furthermore, the input line for the reference voltage to the gate of the differential pair FET50 has a malfunction prevention feature. A capacitor 60, which constitutes a delay circuit, is connected to it.
[0079] The input signal control unit 56 receives the comparator output signal E3 output from the differential amplifier circuit 16. The input is used to switch between the input voltage switching circuit's switching elements 28, 30 and the reference voltage switching circuit. Switch elements 42 and 44 are controlled to switch between modes.
[0080] [b. Operation of the comparator circuit] Next, we will explain the operation of the comparator circuit. Refer to Figure 2, which is a time chart showing an example of the voltage waveform. Note that in Figure 2, Comparison operation, comparator output signal E3, input voltage switching circuit switching element 28,3 Indicates the ON / OFF state of 0 and the ON / OFF state of the selector switch elements 42 and 44 of the reference voltage switching circuit. They are doing it.
[0081] First, let's explain the positive and negative reference voltages. The comparator circuit 10 is connected to the ground power supply. As it operates, as shown in the comparative operation in Figure 2, a signal voltage of 0 volts corresponds to a predetermined voltage. For example, if the level is shifted to 1.0 volts, it becomes a relative 0 volts, and the positive reference voltage is +V ref is based on the fixed voltage of the bandgap reference circuit 32, for example, 1.0 volt. It is set to 1.01 volts, which is, for example, +10 millivolts higher than the base. The quasi-voltage -Vref is, for example, 10 millivolts lower than 1.0 volt due to level shift. It is set to 0.99 volts.
[0082] Changeover switch elements 28, 30 of the input voltage switching circuit and changeover switch of the reference voltage switching circuit Elements 42 and 44 are synchronously switched by the input signal control unit 56.
[0083] The input signal control unit 56, as shown in the comparison operation, receives the directly input signal up to time t1. Until the falling edge of voltage E1, the changeover switch element 28 is turned ON, and the changeover switch element 30 The signal voltage E1 is input to the differential amplifier circuit 16 by turning it off, and the reference voltage switching circuit is also turned off. The switch element 42 is turned ON, the changeover switch element 44 is turned OFF, and the positive reference voltage +Vre f is set to the differential amplifier circuit 16.
[0084] Therefore, the differential pair FET 48 of the differential amplifier circuit 16 turns on and FET 52 turns off. The active loads FETs 50 and 54 are turned off, and the current from the constant current source 46 is turned on. The signal flows from ET48 through output point A to output line 55, and the comparator output signal E3 This is designated as the H level.
[0085] At the falling edge when the signal voltage E1 drops from the positive voltage range to the negative voltage range, the positive reference voltage At time t1, when the voltage reaches +Vref at point a, the comparator output voltage E3 inverts to the L level. That is, when the signal voltage E1 reaches the positive reference voltage +Vref, the differential pair FET48 When the switch is turned off, FET52 turns on, and the active loads FET52 and FET54 also turn on. Current flows from output line 55 through output point A to FET 52, and the comparator output Signal E3 drops to L level.
[0086] As the comparator output voltage E3 is inverted to the L level, the input signal control unit 56 switches By turning off the switch element 28 and turning on the changeover switch element 30, the signal that was directly input The signal voltage E1 is switched to a level-shifted signal voltage E2 and input to the differential amplifier circuit 16. At the same time, the changeover switch element 42 is switched off and the changeover switch element 44 is switched on to negative The reference voltage -Vref is set to the differential amplifier circuit 16.
[0087] Next, at the rising edge where the signal voltage E2 rises from the negative voltage range to the positive voltage range, At time t2, when the signal voltage E2 reaches the negative reference voltage -Vref at point b, the comparator output The power voltage E3 reverses to a high level. That is, FET48 of the differential pair turns on and FET50 turns off. The active loads FET52 and FET54 are off, and the constant current source 46 turns them on. Current flows out of FET48 through output point A to output line 55, and the comparator The output voltage E3 rises to the high level.
[0088] As the comparator output voltage E3 is inverted to a high level, the input signal control unit 56 switches The signal voltage E1 is differentially amplified by turning on the switch element 28 and turning off the changeover switch element 30. The signal is input to circuit 16, and the changeover switch element 42 is turned ON, and the changeover switch element 44 is turned OFF. A positive reference voltage +Vref is set to the operating amplifier circuit 16, and this is repeated thereafter. In addition, in the comparison operation shown in Figure 2, the directly input signal voltage E1 and the level-shifted signal are shown. Voltage E2 is continuous at points a and b, which are the switching points, but this is without offset. This is an ideal state, but in reality, the signal voltage E2 is affected by variations in the level shift circuit. There is a offset, and it is off from the directly input signal voltage E1, therefore point a At point b, the signal voltage becomes discontinuous and changes in a step-like manner.
[0089] [c. Operation of the delay circuit] Next, we will explain the operation of the delay circuit provided on the input side of the reference voltage of the differential amplifier circuit. In this explanation, an example of a voltage waveform for preventing malfunctions using a delay circuit is shown. Refer to the chart in Figure 3. Note that Figure 3(A) shows the case without delay, and Figure 3(B) shows the case with delay. This indicates the case where there is a delay.
[0090] The reference current to the gate of the other FET 50 of the differential pair in the differential amplifier circuit 16 in Figure 1 A capacitor 60, which constitutes a delay circuit, is provided on the voltage input line.
[0091] Here, if the delay circuit using capacitor 60 is not provided, the result is as shown in Figure 3(A). Thus, at the rising edge of the signal voltage E2, the signal voltage E2 is negative to the reference voltage -Vre When f is reached at point b, the signal voltage E2, which is shifted by the offset due to the level shift, is directly Switching to the input signal voltage E1, and switching from a negative reference voltage -Vref to a positive reference voltage The switching to +Vref occurs repeatedly, causing the signal voltage and reference voltage to rise simultaneously. The comparator output signal E3, which rises to an H level, becomes more prone to chattering. The likelihood of malfunctions due to ping increases.
[0092] Therefore, in this embodiment, the base of the FET 50 of the differential amplifier circuit 16 relative to the gate A delay circuit is created by connecting capacitor 60 to the input line of the quasi-voltage, as shown in Figure 3(B). This also smooths out the rise from the negative reference voltage -Vref to the positive reference voltage +Vref. By applying a delay of 6010, the timing of the reference voltage rising is delayed, thus comparing This prevents chattering of the output signal E3, enabling stable operation.
[0093] [d. Variation in comparator circuits] Next, regarding the offset due to variations in the comparator circuit of this embodiment shown in Figure 1... I will explain this. In this explanation, I will show the variation point on the positive side of the comparator circuit. Refer to Figure 4 and Figure 5, which show the variation points on the negative side of the comparator circuit. "The positive side of the comparator circuit" refers to directly inputting the signal voltage E1 to the differential amplifier circuit 16. This also means that a positive reference voltage +Vref is set, and therefore, the comparator circuit The "negative side" refers to the case where the level-shifted signal voltage E2 is input to the differential amplifier circuit 16. This also means that a negative reference voltage -Vref is set.
[0094] (d1. Variation on the positive side of the comparator circuit) As shown in Figure 4, the positive variation points are P1 and P2. Here, The variability point P1 is the offset of the differential amplifier circuit 16, and the variation point P2 is the band gap This results in variations in the preference circuit 32.
[0095] The variation points P1 and P2 on the positive side of the comparator circuit 10 are located at the changeover switch element 28 By turning it on, the signal voltage E1 is directly input to the differential amplifier circuit 16 without level shifting. Furthermore, a positive reference voltage +Vref is used as the bandgap reference regardless of level shift. This is based on the setting of the fixed voltage of circuit 32.
[0096] Therefore, the variation point on the positive side is the conventional comparator circuit 100 shown in Figure 11. Compared to the six points, this embodiment reduces the number to two, less than half, and uses a conventional offset 24 mm bolt. This makes it possible to reduce the size to, for example, 8mm bolts.
[0097] (d2. Variation on the negative side of the comparator circuit) As shown in Figure 5, the negative variation points are the four points Q1 to Q4. Here, Variation point Q1 is the variation in the pairing of constant current sources 22 and 36, and variation point Q2 is the variation in resistor 24 The variation, variation point Q3 is the variation in the pairing of FET26 and 38, variation point Q4 This represents the offset of the differential amplifier circuit 16.
[0098] The negative side variation points Q1 to Q4 of the comparator circuit 10 correspond to the signal voltage on the positive side. Furthermore, by preventing level shifting of the reference voltage, the signal voltage on the negative side and This is based on the simplification of the level-shifting circuit for the reference voltage.
[0099] Therefore, the negative variation point is the conventional comparator circuit 10 shown in Figure 11. Compared to 6 points of 0, this embodiment reduces the number to 4, and the conventional offset 24 mm bolt, for example... This makes it possible to reduce the voltage to as low as 16 millivolts. As a result, comparator circuit 1 This minimizes the overall offset of the circuit, enabling stable operation.
[0100] [e. Application to battery charging devices] Next, the application of the comparator circuit of this embodiment to a battery charging device will be described. In this description, a battery charging device to which the comparator circuit of the embodiment is applied is shown. Figure 6 shows the above, and Figure 7 is a time chart showing an example of the voltage waveform of a battery charging device. Refer to.
[0101] (e1. Battery charging device) A battery charging device will be described. As shown in Figure 6, the comparator of the embodiment An example of a battery charging device is a permanent magnet type three-phase AC generator 61 with a three-phase AC output U With V and W as inputs, the DC voltage rectified by the three-phase full-wave rectifier circuit 62 is used to fuse 6 The battery 64 is charged via 5, and DC power is supplied to the load 66 to operate it. It consists of a three-phase full-wave rectifier circuit 62 and a control circuit 68.
[0102] The three-phase full-wave rectifier circuit 62 takes the three-phase output voltage of the three-phase AC generator 61 as input and converts it to a DC voltage. This is a rectifier circuit. The three-phase full-wave rectifier circuit 62 has a group of rectifier elements 70 connected to the positive side. It consists of a group of switch elements 72 connected to the negative side.
[0103] The rectifier element group 70 has rectifier elements 7010, 7012, and 7014 connected to each phase. The configuration and type of rectifier elements 7010, 7012, and 7014 are arbitrary, but this is an example of a rectifier element. It uses a Schottky barrier diode or equivalent, and is intended for power supply use. It is used as a diode in the context of power semiconductors.
[0104] Furthermore, the switching element group 72 has FET7210,7 as an example of a switching element for each phase. 212 and 7214 are connected, and since they are used for power supply, they are FETs, which are power semiconductors. That is what they say.
[0105] The control circuit 68 uses the DC voltage rectified by the three-phase full-wave rectifier circuit 62 to power the battery 64. During charging, the FETs 7210, 7212, and 7214 of the switch element group 72 are controlled. This is the circuit. Furthermore, the control circuit 68 connects the positive terminal of the battery 64 to the power line 74. Next, the negative terminal of battery 64 is connected to ground line 76, creating a grounded power supply. It operates on [this].
[0106] The control circuit 68 is equipped with a charging control circuit 84, which controls the input of each phase from the three-phase AC generator 61. The comparator circuit 10U, 10V, 10V of this embodiment is provided as a force circuit. Taking the U phase as an example, the converter circuit 10U consists of an input circuit section 12 and a reference voltage setting section 14 and a differential amplifier circuit 16 is provided. The U-phase input voltage E11 from the three-phase AC generator 61 is The input to the parator circuit 10U is based on the zero-crossing of the falling edge of the U-phase input voltage E11. The comparator output signal E21 is set to L level by detecting a comparison with the quasi-voltage +Vref, and then... Next, compare the zero-crossing of the rising edge of the U-phase input voltage E11 with the reference voltage -Vref. The system detects this and inputs the comparator output signal E21 as a high level to the charging control circuit 84. Yes, they are.
[0107] (e2. Operation of the control circuit) In the voltage waveform of the battery charging device shown in Figure 7, for example, the U-phase voltage is taken as an example. And, for example, at the rising edge of the U-phase input voltage E11 when it rises from negative to positive at time t1, The crossover is detected as the timing for synchronous rectification, and the U-phase gate signal E3 of the FET7210 is used. By changing 1 from a high level to a low level, the FET7210 is turned off, and the U-phase input voltage E The current from 11 is rectified by the rectifier element 7010 to charge the battery 64.
[0108] Next, the zero at the falling edge of the U-phase input voltage E11 at time t2 when it falls from positive to negative. The crossover is detected, and the U-phase gate signal E31 of the FET7210 is changed from a low level to a high level. By doing so, the FET7210 is turned on, and the battery 64 is returned to the three-phase AC generator 10. The device will not be charged. At time t3, a zero-crossing at the rising edge will be detected, similar to time t1. Furthermore, by changing the U-phase gate signal E31 of the FET7210 from a high level to a low level, F With ET7210 turned off, the U-phase input voltage E11 is rectified by the rectifier element 7010 and then connected to the battery. Charge the 64, and repeat this process thereafter.
[0109] The same applies to the V-phase voltage and W-phase voltage, and the zero-crossing of the rising edge is detected. Turn off FET7212 and 7214 and charge battery 64, then the falling edge The control repeatedly detects the zero-crossing and turns off FET7212 and 7214 to prevent charging. It's happening again.
[0110] [f. Semiconductor integrated circuit equipment] In the example configuration of the comparator circuit 10 shown in Figure 1, the entire comparator circuit 10 By integrating a portion of the circuit, for example, the input signal control unit 56, into an integrated circuit, Cost reduction is also possible by reducing the number of parts and the mounting area. The circuits are formed on a semiconductor chip with a CMOS configuration and commercialized as a semiconductor integrated device. Furthermore, semiconductor integrated devices for integrated comparator circuits and other components. An example of a configuration in which this is mounted on a wiring board is shown as an application example of a comparator circuit. This constitutes a battery charging circuit that makes up a battery charging device.
[0111] [g. Variations of the present invention] Modifications of the comparator circuit according to the present invention will be described. The road includes the following variations in addition to the embodiments described above.
[0112] (Delay circuit) In the above embodiment, the input of the reference voltage to the gate of the FET 50 of the differential amplifier circuit 16 A capacitor 60 that constitutes a delay circuit is connected to the power line, but the comparator detection signal The chattering in E3 is caused by the detection of a zero crossing of the rising edge of the signal voltage, which is associated with the positive reference voltage. Since this occurs when switching to voltage + Vref, it is provided on the input side of the changeover switch element 42. Alternatively, only the switching timing of the positive reference voltage +Vref may be delayed.
[0113] (Examples of comparator circuit applications) Furthermore, the above embodiment is an example of the application of a comparator circuit to the power generation of a three-phase AC generator. While the example uses a battery charging device that charges the battery via its output, it is not limited to this. A signal voltage that changes within a positive and negative voltage range is input and compared with positive and negative reference voltages to output the comparison result. This includes applications to appropriate devices, equipment, and circuits that require force.
[0114] (Differential amplifier circuit) Furthermore, while the differential amplifier circuit in the comparator circuit of the above embodiment has a constant current source on the power line side and a differential pair of FETs and an active load FET on the ground line side, it is not limited to this, and similar to Patent Document 2, a differential pair of FETs and an active load FET may be provided on the power line side and a constant current source on the ground line side.
[0115] (others) Furthermore, the present invention includes appropriate modifications that do not impair its purpose and advantages, and furthermore, this invention The definition is not limited by the numerical values shown in the above embodiments.
[0116] For example, in the above embodiment, the AC power source is a three-phase AC generator, etc., "three-phase" As explained in the example, the technical concept of the present invention can be applied to multiphase systems other than three-phase systems to achieve the desired effects. It is possible to do this. Furthermore, although the rectifier circuit is a full-wave rectifier circuit, it can also be applied to half-wave rectifier circuits. The desired effect can be achieved in the same way. [Explanation of Symbols]
[0117] 10, 10U, 10V, 10W: Comparator circuit 12: Input Circuit Section 14: Reference voltage setting section 16: Differential Amplifier Circuit 18,26,38,48,50,52,54:FET 20,22,36,46: Constant current source 24: Resistor 28, 30, 42, 44: Changeover switch elements 32: Bandgap Reference Circuit 34: Positive reference voltage source 40: Negative reference voltage source 55: Output Line 56: Input signal control unit 60: Capacitor 61: Three-phase AC generator 62: Three-phase full-wave rectifier circuit 64: Battery 65: Fuse 66: Load 68: Control circuit 70: Rectifier element group 7010, 7012, 7014: Rectifier elements 72: Switching element group 7210, 7212, 7214: Switching elements 74, 78: Power lines 76,80: Grand Line 84: Charging control circuit
Claims
1. A signal voltage that changes within a positive and negative voltage range is input and compared with positive and negative reference voltages to obtain the comparison result. It outputs power and operates with a grounded power supply, where the negative side of the power supply is connected to the ground line. It is a comparator circuit, The positive voltage side directly inputs a signal voltage that changes within the positive voltage range without level shifting. Input circuit and, The signal voltage, which varies in the negative voltage range, is leveled to a signal voltage that varies in the positive voltage range. A negative voltage input circuit that is input via a futile process, The input switches between outputting the signal voltage from the positive voltage input circuit and the negative voltage input circuit. Voltage switching circuit, Positive reference voltage setting circuit that sets a positive reference voltage that is a predetermined voltage higher than the ground voltage. and, A negative reference voltage, which is a predetermined voltage lower than the ground voltage, is level-shifted into the positive voltage range. A negative reference voltage setting circuit is used to set the voltage, The system switches between outputting reference voltages from the positive reference voltage setting circuit and the negative reference voltage setting circuit. Reference voltage switching circuit, The input voltage from the input voltage switching circuit and the positive reference voltage from the reference voltage switching circuit A differential amplifier circuit that generates a comparator output signal by comparing the voltage or the negative reference voltage, Based on the comparator output signal output from the differential amplifier circuit, the input voltage is switched off. An input signal control unit that controls the switching between the replacement circuit and the reference voltage switching circuit, A comparator circuit characterized by having the following features.
2. A comparator circuit according to claim 1, The aforementioned positive reference voltage setting circuit is fixed in the bandgap reference circuit A comparator circuit characterized by setting the positive reference voltage based on the pressure.
3. A comparator circuit according to claim 1, The differential amplifier circuit has a signal voltage input terminal, a reference voltage input terminal and an output terminal, When the falling edge of the input voltage to the signal voltage input terminal reaches the positive reference voltage, the falling edge When a zero cross is detected, the comparator output signal from the output terminal is set to logic 1. A comparator circuit characterized by its ability to invert levels.
4. A comparator circuit according to claim 3, The differential amplifier circuit is configured such that the rising edge of the input voltage to the signal voltage input terminal is the negative edge When the reference voltage is reached, the rising edge zero crossing is detected and the output terminal is converted. A comparator circuit characterized by inverting the Logic Output signal to another logic level.
5. A comparator circuit according to claim 3, The input signal control unit receives the comparator output signal from the differential amplifier circuit when the falling edge of the signal is detected. When the zero-cross is detected and the signal is inverted to an L level which is a logic level of 1, the input The voltage switching circuit is switched to the output of the signal voltage from the negative voltage side input circuit, and the The reference voltage switching circuit levels the negative reference voltage from the negative reference voltage setting circuit to the positive voltage range. A comparator circuit characterized by switching to a shifted output.
6. A comparator circuit according to claim 4, The input signal control unit detects when the comparator output signal from the differential amplifier circuit rises. When the zero-cross is detected and the input is inverted to an H level, which is another logic level, The voltage switching circuit is switched to the output of the signal voltage from the positive voltage side input circuit, and the Switching the reference voltage switching circuit to the output of the positive reference voltage from the positive reference voltage setting circuit. A comparator circuit characterized by the following.
7. A comparator circuit according to claim 3 or 4, The reference voltage input terminal of the differential amplifier circuit is connected to the reference voltage input from the reference voltage switching circuit. A delay circuit is provided to delay the input of the voltage, and a level shift occurs when the zero crossing of the signal voltage is detected. When switching from a level-shifted to a level-shifted state, the reference voltage switching is delayed, generating noise. A comparator circuit characterized by preventing [unspecified problem].
8. A comparator circuit according to any one of claims 1 to 6, The output of an AC power supply is used as input, and a rectifier circuit is provided which includes a group of rectifier elements and a group of switching elements. It is provided in the control circuit of a battery charging device that charges the battery using the applied DC voltage. A comparator circuit characterized by the following.
9. A signal voltage that changes within a positive and negative voltage range is input and compared with positive and negative reference voltages to obtain the comparison result. It outputs power and operates with a grounded power supply, where the negative side of the power supply is connected to the ground line. A semiconductor integrated circuit device equipped with an imparator circuit, The positive voltage side directly inputs a signal voltage that changes within the positive voltage range without level shifting. Input circuit and, The signal voltage, which varies in the negative voltage range, is leveled to a signal voltage that varies in the positive voltage range. A negative voltage input circuit that is input via a futile process, The input switches between outputting the signal voltage from the positive voltage input circuit and the negative voltage input circuit. Voltage switching circuit, Positive reference voltage setting circuit that sets a positive reference voltage that is a predetermined voltage higher than the ground voltage. and, A negative reference voltage, which is a predetermined voltage lower than the ground voltage, is level-shifted into the positive voltage range. A negative reference voltage setting circuit is used to set the voltage, The system switches between outputting reference voltages from the positive reference voltage setting circuit and the negative reference voltage setting circuit. Reference voltage switching circuit, The input voltage from the input voltage switching circuit and the positive reference voltage from the reference voltage switching circuit A differential amplifier circuit that generates a comparator output signal by comparing the voltage or the negative reference voltage, Based on the comparator output signal output from the differential amplifier circuit, the input voltage is switched off. An input signal control unit that controls the switching between the replacement circuit and the reference voltage switching circuit, A semiconductor integrated circuit device characterized by having the following features.
10. A semiconductor integrated circuit apparatus according to claim 9, The aforementioned positive reference voltage setting circuit is fixed in the bandgap reference circuit A semiconductor integrated circuit device characterized by setting the positive reference voltage based on pressure.
11. A semiconductor integrated circuit apparatus according to claim 9, The differential amplifier circuit has a signal voltage input terminal, a reference voltage input terminal and an output terminal, When the falling edge of the input voltage to the signal voltage input terminal reaches the positive reference voltage, the falling edge When a zero cross is detected, the comparator output signal from the output terminal is set to logic 1. A semiconductor integrated circuit device characterized by its ability to invert to a specific level.
12. A semiconductor integrated circuit apparatus according to claim 11, The differential amplifier circuit is configured such that the rising edge of the input voltage to the signal voltage input terminal is the negative edge When the reference voltage is reached, the rising edge zero crossing is detected and the output terminal is converted. A semiconductor integrated circuit device characterized by inverting the illuminator output signal to another logic level.
13. A semiconductor integrated circuit apparatus according to claim 11, The input signal control unit receives the comparator output signal from the differential amplifier circuit when the falling edge of the signal is detected. When the zero-cross is detected and the signal is inverted to an L level which is a logic level of 1, the input The voltage switching circuit is switched to the output of the signal voltage from the negative voltage side input circuit, and the The reference voltage switching circuit levels the negative reference voltage from the negative reference voltage setting circuit to the positive voltage range. A semiconductor integrated circuit device characterized by switching to a shifted output.
14. A semiconductor integrated circuit apparatus according to claim 12, The input signal control unit detects when the comparator output signal from the differential amplifier circuit rises. When the zero-cross is detected and the input is inverted to an H level, which is another logic level, The voltage switching circuit is switched to the output of the signal voltage from the positive voltage side input circuit, and the Switching the reference voltage switching circuit to the output of the positive reference voltage from the positive reference voltage setting circuit. A semiconductor integrated circuit device characterized by the following.
15. A semiconductor integrated circuit apparatus according to claim 11 or 12, The reference voltage input terminal of the differential amplifier circuit is connected to the reference voltage input from the reference voltage switching circuit. A delay circuit is provided to delay the input of the voltage, and a level shift occurs when the zero crossing of the signal voltage is detected. When switching from a level-shifted to a level-shifted state, the reference voltage switching is delayed, generating noise. A semiconductor integrated circuit device characterized by preventing [the following].
16. A semiconductor integrated circuit apparatus according to any one of claims 9 to 14, The output of an AC power supply is used as input, and a rectifier circuit equipped with a group of rectifier elements and a group of switch elements is used to rectify the AC power. It is provided in the control circuit of a battery charging device that charges the battery using the applied DC voltage. A semiconductor integrated circuit device characterized by the following.