Quantum semiconductor devices and quantum computers

Abstract

In quantum semiconductor devices, this prevents cracking of semiconductor elements that originates from bumps. [Solution] A quantum semiconductor device having bumps has a cavity disposed between the semiconductor element and the resin.

Description

Technical Field

[0001] The present invention relates to a quantum semiconductor device and a quantum computer.

Background Art

[0002] A flip-chip mounting method for mounting an IC chip face-down on a wiring board is well known, and there is a flip-chip mounted semiconductor device formed by the flip-chip mounting method.

[0003] By the way, in a quantum computer (for example, a silicon quantum computer) capable of large-scale integration, a quantum chip (for example, a CMOS operation quantum chip) at an extremely low temperature (4K / 0.1K) suitable for large-scale integration may use flip-chip mounting for proximity to a wiring board (interposer chip). In such a quantum computer operating at an extremely low temperature, the reliability of chip mounting at extremely low temperatures is particularly required. A quantum computer is a computer that manipulates data using quantum mechanical phenomena (quantum bits).

[0004] As related technology, for example, there is Patent Document 1. Patent Document 1 discloses a structure including a layer for relaxing stress applied from a resin (underfill) to a semiconductor element (LSI). Further, Patent Document 1 discloses a quantum device as an example of a semiconductor element.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] For semiconductor elements (quantum chips) of quantum computers that operate at extremely low temperatures (4K / 0.1K), suitable for large-scale applications, flip-chip mounting is sometimes used to bring them closer to the substrate (interposer). In this case, the quantum computer is left in a dilution refrigerator at extremely low temperatures of 0.1K and 4K. Alternatively, the quantum computer is subjected to repeated thermal cycles between extremely low temperatures and room temperature.

[0007] Under these circumstances, reliability of flip-chip packaging at cryogenic temperatures is required. Specifically, a highly reliable junction between the substrate and the semiconductor element is necessary.

[0008] Patent Document 1 discloses a structure that includes a layer for relieving stress on a semiconductor element from the resin (underfill). However, Patent Document 1 does not address the problem of cracking of the semiconductor element originating from bumps.

[0009] The objective of this invention is to prevent cracking of semiconductor elements in quantum semiconductor devices that originates from bumps. [Means for solving the problem]

[0010] A quantum semiconductor device according to one aspect of the present invention is characterized by comprising: a semiconductor element; a substrate; a first electrode disposed on the semiconductor element; a second electrode disposed on the substrate; a bump disposed between the first electrode and the second electrode; a resin disposed around the bump; and a cavity disposed between the semiconductor element and the resin. [Effects of the Invention]

[0011] According to one aspect of the present invention, it is possible to prevent cracking of semiconductor elements that originate from bumps in a quantum semiconductor device. [Brief explanation of the drawing]

[0012] [Figure 1] This figure shows the challenges of flip-chip implementation at low temperatures. [Figure 2] This is a cross-sectional view of the semiconductor device of Example 1. [Figure 3] This is a plan view of the semiconductor device of Example 2. [Figure 4] This is a diagram showing the configuration of a quantum computer. [Modes for carrying out the invention]

[0013] Flip-chip mounting is a method of connecting semiconductor devices to a substrate. In this method, the electrodes of the semiconductor device are mounted inverted relative to the substrate. Bumps that act as electrodes are formed on the semiconductor device. Then, the chip is flipped over and placed on the substrate, and the bumps are made to directly contact the wiring on the substrate to connect them. Next, the substrate and semiconductor device are firmly bonded by heating in a reflow oven to melt the solder bumps.

[0014] Flip-chip packaging enables high-density mounting, reducing wiring delays and resistance, and improving signal processing speed. The bumps act as heat conduction paths, allowing for efficient heat dissipation from semiconductor elements, thus stabilizing performance. For these reasons, flip-chip packaging can be applied to some components of quantum computers. However, because the structure and requirements of quantum computers differ significantly from those of conventional semiconductor elements, quantum computers may be subject to their own unique constraints.

[0015] Applying flip-chip packaging to quantum computers makes it possible to shorten the wiring for controlling qubits and integrate them at high density. Furthermore, since qubits and other components operate at extremely low temperatures, cooling is crucial. The bumps in the flip-chip packaging function as heat dissipation paths, helping to improve cooling efficiency. Embodiments of the present invention prevent cracking of semiconductor elements at extremely low temperatures (4K / 0.1K) due to changes in the shape of the resin (underfill) between bumps caused by tensile stress on the sides of the bumps.

[0016] First, referring to Figure 1, we will explain the challenges of quantum semiconductor devices that operate at extremely low temperatures.

[0017] The quantum semiconductor device 10 in FIG. 1 includes a semiconductor element 11 (chip), a substrate 12 (interposer), bumps 13 disposed between the semiconductor element 11 and the substrate 12, and a resin (underfill) 14 disposed around the bumps 13.

[0018] As shown in FIG. 1, due to the tensile stress applied to the side surfaces of the bumps 13 during low-temperature storage, a compressive stress A is generated in the resin (underfill) 14 between the bumps 13 near the central plane of the height of the bumps 13. Due to this compressive stress A, a load (stress) B is generated in the vertical direction between the bumps 13. Specifically, the resin 14 sealed between the bumps 13 is compressed by the compressive stress A of the bumps 13 at extremely low temperatures, and a load (stress) B is applied in the vertical direction, causing damage to the semiconductor element 11 (chip) or the substrate 12 (interposer).

[0019] In an embodiment of the present invention, paying attention to the problem that cracks occur in the semiconductor element 11 starting from the above-described bumps 13, cracks in the semiconductor element 11 starting from the bumps 13 are prevented. Specifically, by reducing the load (stress) B generated in the vertical direction between the bumps 13 at extremely low temperatures, cracks in the semiconductor element 11 are prevented.

[0020] Hereinafter, examples will be described with reference to the drawings.

Example

[0021] Referring to FIG. 2, the quantum semiconductor device of Example 1 will be described. In Example 1, by disposing a cavity 27 between the semiconductor element 21 and the resin 24, cracks in the semiconductor element 11 starting from the bumps 13 are prevented.

[0022] The quantum semiconductor device 20 of Example 1 includes a semiconductor element 21, a substrate 22, a first electrode 25 disposed on the semiconductor element 21, a second electrode 26 disposed on the substrate 22, a bump 23 disposed between the first electrode 25 and the second electrode 26, a resin 24 disposed around the bump 23, and a cavity 27 disposed between the semiconductor element 21 and the resin 24. By having such a cavity 27, the load (stress) generated in the longitudinal direction between the bump 23 at extremely low temperatures is reduced, preventing cracking of the semiconductor element 21 (see Figure 1).

[0023] Here, the semiconductor element 21 is not in contact with the resin 24. The height of the resin 24 is preferably 3 / 4 or less of the height (a) of the bump 23. The distance (M) between the semiconductor element 21 and the resin 24 is preferably 1 / 4 or more of the height (a) of the bump.

[0024] The semiconductor element 21 is, for example, a silicon quantum semiconductor element. The bump 23 is made of, for example, gold (Au). The semiconductor element 21 operates in an extremely low temperature state in the range of 0.1K to 20K (preferably 0.1K to 4K). An example of the semiconductor element 21 is disclosed, for example, in Japanese Patent Application Publication No. 2021-027142.

[0025] Gold (Au) is preferred for the bump 23 used in silicon quantum devices. Gold is resistant to oxidation and has high connection reliability, allowing for stable connections even in cryogenic environments. It also has excellent electrical properties and low contact resistance even at cryogenic temperatures. Alternatively, silver (Ag) can also be used. Silver (Ag) has very high conductivity and low contact resistance.

[0026] The materials used for bump-23 in silicon quantum devices are primarily selected for their high stability and reliable connectivity even in cryogenic environments. Other materials may be used in combination depending on the application and design requirements, but their selection should take into account mechanical stress and electrical properties in cryogenic environments.

[0027] Resin materials used in quantum devices are crucial for providing protection, insulation, and mechanical stability. These resin materials must meet the requirement for stability at extremely low temperatures so as not to affect the performance of qubits or quantum circuits. For example, silicon-based and epoxy-based materials are preferred. Silicon-based materials are highly flexible and easily absorb stress even in low-temperature environments. Epoxy-based materials have high mechanical strength and are stable even at low temperatures.

[0028] According to Example 1, by placing a cavity 27 between the semiconductor element 21 and the resin 24, it is possible to prevent cracking of the semiconductor element 11 that originates from the bump 13. [Examples]

[0029] Referring to Figure 3, the quantum semiconductor device of Example 2 will be described. In Example 2, cracking of the semiconductor element 31 that originates from the bump 33 is prevented by increasing the distance (L) between the semiconductor element 31 and the substrate 32 during bonding. In that respect, it solves the same problem as Example 1 in that it prevents cracking of the semiconductor element 31 that originates from the bump 33.

[0030] The quantum semiconductor device 30 of Example 2 includes a semiconductor element 31, a substrate 32, a first electrode 35 disposed on the semiconductor element 31, a second electrode 36 disposed on the substrate 32, a bump 33 disposed between the first electrode 35 and the second electrode 36, and a resin 34 disposed around the bump 33. Here, the distance (L) between the semiconductor element 31 and the substrate 32 is 3 / 2 or more of the height (a) of the bump. By setting the distance (L) to be large in this way, the load (stress) generated in the vertical direction between the bumps 23 at extremely low temperatures is reduced, preventing cracking of the semiconductor element 21 (see Figure 1).

[0031] The first electrode 35, which is placed on the semiconductor element 31, protrudes from the surface facing the substrate 32, and it is preferable that the height of the first electrode 35 is at least half the height (a) of the bump 33.

[0032] The second electrode 36, positioned on the substrate 32, protrudes from the surface facing the semiconductor element 31, and it is preferable that the height of the second electrode 36 is at least half the height (a) of the bump 33.

[0033] The first electrode 35, positioned on the semiconductor element 31, protrudes from the surface facing the substrate 32, and the second electrode 36, positioned on the substrate 32, protrudes from the surface facing the semiconductor element 31. In this case, it is preferable that the distance (L) between the semiconductor element 31 and the substrate 32 is at least twice the height (a) of the bump.

[0034] The semiconductor element 31 is, for example, a silicon quantum semiconductor element. The bump 33 is made of, for example, gold. The semiconductor element 31 operates in an extremely low temperature range of 0.1K to 20K (preferably 0.1K to 4K). An example of the semiconductor element 31 is disclosed, for example, in Japanese Patent Application Publication No. 2021-027142.

[0035] Gold (Au) is preferred for the bump 33 used in silicon quantum devices. Gold is resistant to oxidation and has high connection reliability, allowing for stable connections even in cryogenic environments. It also exhibits excellent electrical properties and low contact resistance even at cryogenic temperatures. Alternatively, silver (Ag) can also be used. Silver (Ag) has very high conductivity and low contact resistance.

[0036] The materials used for bump 33 in silicon quantum devices are primarily selected for their high stability and reliable connectivity even in cryogenic environments. Other materials may be used in combination depending on the application and design requirements, but their selection should take into account mechanical stress and electrical properties in cryogenic environments.

[0037] Resin materials used in quantum devices are crucial for providing protection, insulation, and mechanical stability. These resin materials must meet the requirement for stability at extremely low temperatures so as not to affect the performance of qubits or quantum circuits. For example, silicon-based and epoxy-based materials are preferred. Silicon-based materials are highly flexible and easily absorb stress even in low-temperature environments. Epoxy-based materials have high mechanical strength and are stable even at low temperatures.

[0038] According to Example 2, by increasing the distance (L) between the semiconductor element 31 and the substrate 32 and bonding them together, it is possible to prevent cracking of the semiconductor element 31 that originates from the bump 33. [Examples]

[0039] Referring to Figure 4, the configuration of the computer (quantum computer) in Example 3 will be described.

[0040] Figure 4 is similar to the configuration of a conventional computer, but is characterized by the inclusion of a quantum computing device 1000. The quantum computing device 1000 is a quantum computing device having either the quantum semiconductor device 20 of Example 1 (see Figure 2) or the quantum semiconductor device 30 of Example 2 (see Figure 3). Other general calculations are performed by the general computing device 2002.

[0041] The above configuration may be set up as an all-in-one computer, or any part such as the main memory 2001, general processing unit 2002, control unit 2003, auxiliary storage device 2004, input device 2005, output device 2006, etc., may be set up in other computers connected via a network.

[0042] General calculations are performed using the same procedures as a regular computer. Data is exchanged between the main memory 2001 (the memory unit) and the general arithmetic unit 2002 (the calculation unit), and calculations are carried out by repeating this process. The control unit 2003 directs the entire process. Programs executed by the general arithmetic unit 2002 are stored in the main memory 2001. If the storage capacity of the main memory 2001 is insufficient, the auxiliary memory 2004, also a memory unit, is used. Input devices 2005 are used for inputting data and programs, and output devices 2006 are used for outputting results. Input devices 2005 include manual input devices such as keyboards, as well as interfaces for network connectivity. This interface also doubles as an output device.

[0043] Quantum computation is performed using a similar procedure. Data is exchanged between the main memory 2001, which is the memory unit, and the quantum computing device 1000, which is the calculation unit, and the calculation proceeds by repeating this process. The control unit 2003 directs the entire process. The program executed by the quantum computing device 1000 is stored in the main memory 2001, which is the memory unit.

[0044] The program is converted into a language used by the quantum computing device 1000 using the general processing unit 2002 and stored in the main memory 2001. If the storage capacity is insufficient, the auxiliary memory device 2004, which is also a memory unit, is used. This language-based program is sent from the main memory 2001 to the quantum computing device 1000, and the control unit 2003 sends control signals to the quantum computing device 1000 according to the language-based program to execute the calculations. The results of the quantum computing device 1000 are sent to the main memory 2001 and processed by the general processing unit 2002 as needed.

[0045] Thus, the quantum computer of Example 3 comprises a quantum computing device 1000 having a quantum semiconductor device and a control device 2003 for controlling the quantum computing device 1000. The quantum semiconductor device may be either the quantum semiconductor device 20 of Example 1 (see Figure 3) or the quantum semiconductor device 30 of Example 2 (see Figure 3). The quantum computing device 1000 operates in an extremely low temperature state within the range of 0.1K to 20K.

[0046] According to the above embodiment, it is possible to prevent cracking of semiconductor elements that originate from bumps in a quantum semiconductor device.

[0047] In this example, to prevent cracking of the semiconductor element originating from a bump, a cavity was placed between the semiconductor element and the resin, and in Example 2, the distance between the semiconductor element and the substrate was set to be large. However, the present invention is not limited to the above structures, and other structures may be adopted as long as they can prevent cracking of the semiconductor element originating from a bump. In other words, it is sufficient to have a means to prevent cracking of the semiconductor element originating from a bump. [Explanation of symbols]

[0048] 10 Quantum Semiconductor Devices 11 Semiconductor devices 12 circuit boards 13 Bump 14 resin 20 Quantum Semiconductor Devices 21 Semiconductor devices 22 circuit boards 23 Bump 24 resin 25 electrodes 26 electrodes 27 Cavity 30 Quantum Semiconductor Devices 31 Semiconductor devices 32 circuit boards 33 Bump 34 Resin 35 electrodes 36 electrodes

Claims

1. Semiconductor elements and circuit board and A first electrode arranged in the semiconductor element, A second electrode placed on the substrate, A bump positioned between the first electrode and the second electrode, A resin arranged around the bump, A cavity disposed between the semiconductor element and the resin, A quantum semiconductor device characterized by having the following features.

2. The aforementioned semiconductor device is The quantum semiconductor device according to claim 1, characterized in that it is not in contact with the aforementioned resin.

3. The height of the aforementioned resin is The quantum semiconductor device according to claim 1, characterized in that the height of the bump is 3 / 4 or less.

4. The distance between the semiconductor element and the resin is, The quantum semiconductor device according to claim 1, characterized in that the height of the bump is 1 / 4 or more.

5. The aforementioned semiconductor device is It is a silicon quantum semiconductor device, The aforementioned bump is, The quantum semiconductor device according to claim 1, characterized in that it is made of gold.

6. The aforementioned semiconductor device is The quantum semiconductor device according to claim 1, characterized in that it operates in an extremely low temperature state within the range of 0.1K to 20K.

7. Semiconductor elements and circuit board and A first electrode arranged in the semiconductor element, A second electrode placed on the substrate, A bump positioned between the first electrode and the second electrode, The bump has a resin arranged around it, A quantum semiconductor device characterized in that the distance between the semiconductor element and the substrate is 3 / 2 or more of the height of the bump.

8. The first electrode arranged in the semiconductor element is It protrudes from the surface facing the substrate, The height of the first electrode is The quantum semiconductor device according to claim 7, characterized in that the height of the bump is 1 / 2 or more.

9. The second electrode placed on the substrate is It protrudes from the surface facing the semiconductor element, The height of the second electrode is, The quantum semiconductor device according to claim 7, characterized in that the height of the bump is 1 / 2 or more.

10. The first electrode arranged in the semiconductor element is It protrudes from the surface facing the substrate, The second electrode placed on the substrate is It protrudes from the surface facing the semiconductor element, The quantum semiconductor device according to claim 7, characterized in that the distance between the semiconductor element and the substrate is at least twice the height of the bump.

11. The aforementioned semiconductor device is It is a silicon quantum semiconductor device, The aforementioned bump is, The quantum semiconductor device according to claim 7, characterized in that it is made of gold.

12. The aforementioned semiconductor device is The quantum semiconductor device according to claim 7, characterized in that it operates in an extremely low temperature state within the range of 0.1K to 20K.

13. A quantum computing device having a quantum semiconductor device, A quantum computer having a control device for controlling the quantum computing device, The aforementioned quantum semiconductor device is Semiconductor elements and circuit board and A first electrode arranged in the semiconductor element, A second electrode placed on the substrate, A bump positioned between the first electrode and the second electrode, A resin arranged around the bump, A cavity disposed between the semiconductor element and the resin, A quantum computer characterized by having the following features.

14. The height of the aforementioned resin is The quantum computer according to claim 13, characterized in that the height of the bump is 3 / 4 or less.

15. The aforementioned quantum computing device, The quantum computer according to claim 13, characterized in that it operates in an extremely low temperature state within the range of 0.1K to 20K.

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