Method for manufacturing a wiring circuit board, a wiring circuit board manufacturing system, and an electrolytic plating apparatus.

Abstract

The present invention provides a method for manufacturing a wiring circuit board, a manufacturing system for a wiring circuit board, and an electroplating apparatus that can reduce the depth (amount of recess) of recesses formed on the surface of the conductor layer. [Solution] The manufacturing method for the wiring circuit board 1 includes a conductor layer formation step. In the conductor layer formation step, a conductor layer 32 is formed in the recess R1 of a substrate S having a recess R1. The conductor layer formation step includes a first plating step, a surface treatment step, and a second plating step. In the first plating step, a portion of the conductor layer 32 (conductor layer 32A) is formed by electroplating. In the surface treatment step, the surface of the conductor layer 32A is treated with a treatment solution. In the second plating step, a portion of the conductor layer 32 is further formed on the surface-treated conductor layer 32A by electroplating. The treatment solution contains a plating accelerator component.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a wiring circuit board, a manufacturing system for a wiring circuit board, and an electrolytic plating apparatus.

Background Art

[0002] Conventionally, as a wiring circuit board, a wiring circuit board including an insulating layer having through holes and a conductor layer formed so as to fill the through holes is known (for example, see Patent Document 1 below).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the manufacture of a wiring circuit board as described in Patent Document 1 above, when the conductor layer is formed by electrolytic plating, the plating growth may be low in the through holes, and recesses may be formed on the surface of the conductor layer.

[0005] The present invention provides a method for manufacturing a wiring circuit board, a manufacturing system for a wiring circuit board, and an electrolytic plating apparatus that can reduce the depth (amount of indentation) of recesses formed on the surface of the conductor layer.

Means for Solving the Problems

[0006] The present invention [1] includes a conductor layer forming step of forming a conductor layer in a recess of a substrate having a recess, the conductor layer forming step includes a first plating step of forming a part of the conductor layer by electroplating, a surface treatment step of treating the surface of the part of the conductor layer formed in the first plating step with a treatment solution, and a second plating step of forming a further part of the conductor layer on the surface-treated part of the conductor layer by electroplating, wherein the treatment solution contains a plating accelerator component, and the present invention includes a method for manufacturing a wiring circuit board.

[0007] According to this method, the conductor layer formation process includes multiple plating processes (a first plating process and a second plating process), and between each plating process, the surface of the conductor layer is treated with a treatment solution containing a plating accelerator.

[0008] This allows the second plating process to begin while the plating accelerator is present on the surface of the conductive layer.

[0009] Therefore, even if recesses are formed on the surface of the conductive layer formed in the first plating process, the plating growth within those recesses can be promoted.

[0010] As a result, the depth (amount of recess) of the recesses formed on the surface of the conductor layer can be reduced.

[0011] The present invention [2] includes a method for manufacturing a wiring circuit board according to [1], wherein the processing solution does not contain a plating inhibitory component.

[0012] According to this method, the surface treatment process can be carried out using a treatment solution that does not contain plating-inhibiting components but contains plating-promoting components.

[0013] Therefore, plating growth within recesses on the surface of the conductive layer can be reliably promoted.

[0014] As a result, the depth (amount of recess) of the depressions formed on the surface of the conductor layer can be reliably reduced.

[0015] The present invention [3] includes a method for manufacturing a wiring circuit board according to [2] above, wherein the plating promoting component is a brightener and the plating inhibiting component is a leveler and a carrier.

[0016] The present invention [4] includes a method for manufacturing a wiring circuit board according to any one of the above [1] to [3], wherein the plating accelerating component in the processing solution is the same as the plating accelerating component in the plating solution used in the second plating step.

[0017] The present invention [5] includes a method for manufacturing a wiring circuit board according to any one of the above [1] to [4], wherein the processing solution further contains an acid.

[0018] This method allows for the removal of oxide films formed on the surface of the conductive layer during the surface treatment process.

[0019] Therefore, it is possible to suppress the inhibition of plating growth within recesses on the surface of the conductive layer by the oxide film.

[0020] As a result, the depth (amount of recess) of the depressions formed on the surface of the conductor layer can be reduced more reliably.

[0021] The present invention [6] includes a method for manufacturing a wiring circuit board according to [5], wherein the acid in the processing solution is the same as the acid in the plating solution used in the second plating step.

[0022] The present invention [7] includes a method for manufacturing a wiring circuit board according to any one of the above [1] to [6], wherein the electroplating in the first plating step and the electroplating in the second plating step are electrolytic copper plating.

[0023] The present invention [8] includes a method for manufacturing any one of the above [1] to [7] wiring circuit boards, wherein the substrate comprises a metal layer and an insulating layer disposed on the metal layer and having through holes, and the recess includes the through holes.

[0024] The manufacturing method of the wiring circuit board according to any one of [1] to [8] of the present invention [9] includes immersing the substrate having a part of the conductor layer in the treatment liquid in the surface treatment step.

[0025] According to such a method, the surface of the conductor layer can be surely treated with the treatment liquid.

[0026] The present invention

[10] is an electrolytic plating apparatus used for manufacturing a wiring circuit board, including a first plating tank capable of forming a part of a conductor layer on a substrate, and the first plating tank on the downstream side in the flow direction of the substrate. A surface treatment apparatus disposed on the downstream side of the first plating tank and capable of treating the surface of the part of the conductor layer formed in the first plating tank with a treatment liquid containing a plating acceleration component and not containing a plating suppression component, and a second plating tank disposed on the downstream side of the surface treatment apparatus in the flow direction.

[0027] According to such a configuration, the electrolytic plating apparatus includes a plurality of plating tanks (the first plating tank and the second plating tank), and a surface treatment apparatus is disposed between the plating tanks. The surface treatment apparatus treats the surface of the conductor layer with a treatment liquid containing a plating acceleration component.

[0028] Therefore, the substrate can be introduced into the second plating tank with a plating accelerator present on the surface of the conductor layer.

[0029] As a result, even if a recess is formed on the surface of the conductor layer formed in the first plating tank, the plating growth in the recess can be promoted in the second plating tank.

[0030] As a result, the depth (amount of dent) of the recess formed on the surface of the conductor layer can be reduced.

Advantages of the Invention

[0031] According to the manufacturing method of the wiring circuit board, the manufacturing system of the wiring circuit board, and the electrolytic plating apparatus of the present invention, the depth (amount of dent) of the recess formed on the surface of the conductor layer can be reduced.

Brief Description of the Drawings

[0032] s [Figure 1] Figure 1 is a cross-sectional view of a wiring circuit board manufactured by the wiring circuit board manufacturing method of the present invention. [Figure 2] Figures 2A to 2D are process diagrams showing one embodiment of the manufacturing method for a wiring circuit board according to the present invention, where Figure 2A shows the insulating layer formation process, Figure 2B shows the seed layer formation process, Figure 2C shows the first plating process, and Figure 2D shows the second plating process. [Figure 3] Figure 3 is a configuration diagram showing one embodiment of the electroplating apparatus of the present invention. [Modes for carrying out the invention]

[0033] 1. Wiring circuit board First, a wiring circuit board 1 to which the manufacturing method of the wiring circuit board of the present invention can be applied will be described. The wiring circuit board 1 is, for example, a rewiring board for semiconductor packages. The wiring circuit board 1 may be a flexible wiring circuit board or a suspension board with circuits.

[0034] As shown in Figure 1, the wiring circuit board 1 comprises, for example, an insulating layer 2, a circuit pattern 3, and a metal layer 4.

[0035] (1) Insulating layer 2 The insulating layer 2 is positioned between the circuit pattern 3 and the metal layer 4 in the thickness direction of the insulating layer 2. The insulating layer 2 insulates the circuit pattern 3 from the metal layer 4. The insulating layer 2 is made of resin. Examples of resins include polyimide, maleimide, epoxy resin, polybenzoxazole, and polyester. The insulating layer 2 has through holes 21. The through holes 21 are, for example, via holes.

[0036] The thickness of the insulating layer 2 is, for example, 15 μm to 50 μm or more, preferably 25 μm to 40 μm.

[0037] (2) Circuit Pattern The circuit pattern 3 is positioned on one side of the insulating layer 2 in the thickness direction. The circuit pattern 3 is positioned on one side surface of the insulating layer 2 in the thickness direction. The circuit pattern 3 is positioned on the opposite side of the metal layer 4 from the insulating layer 2 in the thickness direction. The shape of the circuit pattern 3 is not limited. The circuit pattern 3 is connected to the metal layer 4 through a through hole 21. The circuit pattern 3 has a seed layer 31 and a conductor layer 32.

[0038] The seed layer 31 is placed between the insulating layer 2 and the conductive layer 32. The seed layer 31 is made of metal. Examples of materials for the seed layer 31 include chromium, copper, nickel, titanium, and alloys thereof.

[0039] The conductive layer 32 is placed on the seed layer 31. The conductive layer 32 is made of metal. Examples of materials for the conductive layer 32 include copper, silver, gold, iron, aluminum, chromium, and alloys thereof. The conductive layer 32 is preferably made of copper.

[0040] The thickness T1 of the conductive layer 32 on one side surface of the insulating layer 2 is, for example, 3 μm to 12 μm, preferably 6 μm to 10 μm.

[0041] The thickness T2 of the conductive layer 32 inside the through hole 21 is greater than the thickness T1. The thickness T2 is, for example, 15 μm to 50 μm or more, preferably 25 μm to 40 μm.

[0042] The ratio of thickness T2 to thickness T1 (T2 / T1) is, for example, 2 to 10, preferably 3 to 5.

[0043] The conductive layer 32 may have a recess R.

[0044] The recess R is located on one side surface of the conductor layer 32 in the thickness direction. The recess R overlaps with the through hole 21 of the insulating layer 2 in the thickness direction.

[0045] The depth of the recess R in the thickness direction (amount of recess D) is less than the thickness T1. Preferably, the conductive layer 32 does not have a recess R. In other words, the amount of recess D may be 0.

[0046] (3) Metal layer The metal layer 4 is positioned on the other side of the insulating layer 2 in the thickness direction. The metal layer 4 is positioned on the other side surface of the insulating layer 2 in the thickness direction. Examples of materials for the metal layer 4 include stainless steel, Invar, 42 alloy, copper alloy, and copper.

[0047] 2. Manufacturing method of a wiring circuit board Next, a method for manufacturing a wiring circuit board as one embodiment of the present invention will be described.

[0048] As shown in Figures 2A to 2D, the method for manufacturing a wiring circuit board includes an insulating layer formation step (see Figure 2A), a seed layer formation step (see Figure 2B), and a conductor layer formation step (see Figures 2C and 2D).

[0049] (1) Insulating layer formation process As shown in Figure 2A, in the insulating layer formation process, an insulating layer 2 is formed on one side surface of the metal layer 4 in the thickness direction.

[0050] In the insulating layer formation process, for example, a photosensitive resin solution (varnish) is applied to one side surface of the metal layer 4 in the thickness direction and dried to form a photosensitive resin coating. Next, the photosensitive resin coating is exposed to light and developed.

[0051] In addition, during the insulating layer formation process, a film made of insulating resin may be attached to one side surface of the metal layer 4 in the thickness direction, and through holes 21 may be formed in the film using a laser or drill.

[0052] This results in a substrate S having a metal layer 4 and an insulating layer 2 disposed on the metal layer 4. The substrate S has a recess R1. The recess R1 includes a through hole 21.

[0053] (2) Seed layer formation process Next, as shown in Figure 2B, in the seed layer formation step, a seed layer 31 is formed on the substrate S.

[0054] The seed layer 31 covers one side surface of the substrate S in the thickness direction and the inner surface of the recess R1. More specifically, the seed layer 31 covers one side surface of the insulating layer 2 in the thickness direction, the inner surface of the through hole 21, and the surface of the metal layer 4 inside the through hole 21.

[0055] The seed layer 31 is formed, for example, by sputtering. The seed layer 31 may also be formed by electroless plating or vapor deposition.

[0056] (3) Conductor layer formation process Next, as shown in Figures 2C and 2D, in the conductor layer formation process, a conductor layer 32 is formed on the seed layer 31.

[0057] The conductor layer formation process includes multiple plating steps. Specifically, the conductor layer formation process includes a first plating step (see Figure 2C), a surface treatment step, and a second plating step (see Figure 2D).

[0058] Furthermore, the number of plating steps in the conductor layer formation process is not limited to two. The number of plating steps in the conductor layer formation process may be three or more. That is, the conductor layer formation process may include a third plating step after the second plating step, and a surface treatment step may also be included between the second and third plating steps.

[0059] (3-1) First plating process As shown in Figure 2C, in the first plating process, a portion of the conductive layer 32 is formed by electroplating.

[0060] For more details, first, the seed layer 31 is coated with plating resist PR.

[0061] Next, the plating resist PR is exposed and developed. This removes the plating resist PR in the areas where the conductive layer 32 will be formed, exposing the seed layer 31 in those areas. On the other hand, the plating resist PR remains in the areas where the conductive layer 32 will not be formed.

[0062] Next, a conductive layer 32 is formed on the exposed seed layer 31 by electroplating. If the conductive layer 32 is made of copper, the electroplating in the first plating step is electrolytic copper plating. If the conductive layer 32 is made of copper, the plating solution (first plating solution) used in the first plating step is, for example, copper sulfate plating solution.

[0063] The copper sulfate plating solution contains copper sulfate pentahydrate, sulfuric acid, and chloride ions.

[0064] The proportion of copper sulfate pentahydrate in the copper sulfate plating solution is, for example, 100 g / L to 320 g / L, preferably 180 g / L to 280 g / L.

[0065] The proportion of sulfuric acid in the copper sulfate plating solution is, for example, 15 g / L to 150 g / L, preferably 25 g / L to 100 g / L.

[0066] The proportion of chloride ions in the copper sulfate plating solution is, for example, 10 ppm to 100 ppm by mass, preferably 15 ppm to 60 ppm.

[0067] The first plating solution may contain a brightener, a leveler, and a carrier.

[0068] Examples of brighteners include sulfur-containing compounds. Examples of sulfur-containing compounds include bis(3-sulfopropyl) disulfide sodium salt and 3-sulfopropylthiol.

[0069] Examples of levelers include nitrogen compounds, and examples of nitrogen compounds include dyes. Examples of dyes include Janus green, brilliant green, crystal violet, and cyanine dyes.

[0070] Examples of carriers include polymers containing ether bonds. Examples of polymers containing ether bonds include polyethylene glycol, polyvinyl alcohol, and gelatin.

[0071] A portion of the conductive layer 32 formed in the first plating process (hereinafter referred to as conductive layer 32A) has a recess R2 corresponding to the recess R1 of the substrate S.

[0072] (3-2) Surface treatment process The surface treatment process is performed between each plating process, that is, in this embodiment, between the first plating process and the second plating process. In the surface treatment process, the surface of the conductive layer 32A is treated with a treatment solution. The "surface of the conductive layer 32A" refers to one side surface of the conductive layer 32A in the thickness direction, and the inner surface of the recess R2.

[0073] The processing solution contains a plating accelerator. Examples of plating accelerators include the brightener described above. Preferably, the processing solution contains the brightener described above. Preferably, the plating accelerator in the processing solution is the same as the plating accelerator in the plating solution used in the second plating step (second plating solution). The second plating solution will be described later. The plating accelerator in the processing solution may be different from the plating accelerator in the second plating solution.

[0074] The proportion of the plating-promoting component in the treatment solution is, for example, 0.050 ppm or more by mass, preferably 0.075 ppm or more. The proportion of the plating-promoting component in the treatment solution is, for example, 0.200 ppm or less.

[0075] The treatment solution preferably further contains an acid. Examples of acids include inorganic acids and organic acids. Examples of inorganic acids include sulfuric acid, hydrochloric acid, and phosphoric acid. Examples of organic acids include citric acid, acetic acid, formic acid, oxalic acid, malonic acid, and glycolic acid. The acid in the treatment solution is preferably the same as the acid in the second plating solution.

[0076] The pH of the treatment solution is, for example, less than 7, preferably 5 or less.

[0077] The treatment solution preferably does not contain plating inhibiting components. Examples of plating inhibiting components include the leveler, chloride ions, and carriers mentioned above. In other words, the treatment solution preferably does not contain the leveler, chloride ions, and carriers mentioned above.

[0078] The proportion of the plating-inhibiting component in the treatment solution is, for example, 5 ppm or less by mass, preferably 0.

[0079] The surface treatment process is not limited. For example, the substrate S having the conductive layer 32A may be immersed in a treatment solution, or the treatment solution may be sprayed onto the substrate S having the conductive layer 32A. Preferably, in the surface treatment process, the substrate S having the conductive layer 32A is immersed in a treatment solution.

[0080] The manufacturing method for the wiring circuit board 1 does not include a step of cleaning the substrate S or a step of drying the substrate S between the surface treatment step and the second plating step. In other words, the treatment liquid applied to the surface of the conductor layer 32A in the surface treatment step remains attached to the surface of the conductor layer 32A and is carried over to the second plating step. More specifically, the treatment liquid that enters the recess R2 of the conductor layer 32A in the surface treatment step remains accumulated in the recess R2 of the conductor layer 32A and is carried over to the second plating step.

[0081] The manufacturing method of the wiring circuit board 1 may include a step (second surface treatment step) between the surface treatment step and the second plating step in which the treatment solution or plating solution is applied to the surface of the conductor layer 32A. In the second surface treatment step, the substrate S having the conductor layer 32A may be immersed in the treatment solution or plating solution, or the treatment solution or plating solution may be sprayed onto the substrate S having the conductor layer 32A.

[0082] (3-3) Second plating process As shown in Figure 2D, in the second plating step, a portion of the conductor layer 32 is further formed on the surface-treated conductor layer 32A (see Figure 2C) by electroplating. In the second plating step, electroplating is started with a plating accelerator present in the recess R2 of the conductor layer 32A (see Figure 2C). This promotes plating growth within the recess R2 and fills the recess R2. This reduces the depth (amount of recess D) of the recess R formed on the surface of the conductor layer 32. If the conductor layer 32 is made of copper, the electroplating in the second plating step is electrolytic copper plating.

[0083] The second plating solution is the same as the first plating solution. If the first plating solution is a copper sulfate plating solution, then the second plating solution is also a copper sulfate plating solution.

[0084] The plating conditions for the second plating process (for example, the temperature of the plating solution, the current density, or the processing time) may be the same as or different from those for the first plating process.

[0085] 3. Manufacturing system for wiring circuit boards Next, an embodiment of the wiring circuit board manufacturing system of the present invention will be described. The wiring circuit board manufacturing system can be used in the wiring circuit board manufacturing method described above.

[0086] The wiring circuit board manufacturing system comprises a seed layer forming apparatus and an electroplating apparatus 10 (see Figure 3). In other words, the electroplating apparatus 10 is used for manufacturing wiring circuit boards.

[0087] (1) Seed layer forming apparatus The seed layer forming apparatus is used in the seed layer forming process described above. The seed layer forming apparatus is capable of forming a seed layer 31 on a substrate S. When the seed layer 31 is formed by sputtering, the seed layer forming apparatus is a sputtering apparatus. When the seed layer 31 is formed by electroless plating, the seed layer forming apparatus is a plating apparatus. When the seed layer 31 is formed by vapor deposition, the seed layer forming apparatus is a vapor deposition apparatus.

[0088] (2) Electrolytic plating apparatus The electroplating apparatus 10 is used in the conductor layer formation process described above. The electroplating apparatus 10 is capable of forming a conductor layer 32 on the seed layer 31 by electroplating.

[0089] More specifically, as shown in Figure 3, the electrolytic plating apparatus 10 is a roll-to-roll type continuous plating apparatus. The transport direction of the substrate S may be horizontal or vertical. The plating electrode may be a soluble electrode or an insoluble electrode.

[0090] The electroplating apparatus 10 comprises a first plating tank 11, a power supply roller 12, a surface treatment device 13, and a second plating tank 14.

[0091] (2-1) First plating tank The first plating tank 11 is used in the first plating process described above. In other words, a conductive layer 32A (part of the conductive layer 32) is formed in the first plating tank 11. To put it another way, the first plating tank 11 is capable of forming a conductive layer 32A (part of the conductive layer 32) on the seed layer 31 of the substrate S on which the seed layer 31 is formed. The first plating solution described above is stored in the first plating tank 11.

[0092] (2-2) Power supply roller The power supply roller 12 is positioned between the first plating tank 11 and the second plating tank 14 in the flow direction of the substrate S. The power supply roller 12 is positioned between the first plating tank 11 and the surface treatment apparatus 13 in the flow direction. The power supply roller 12 can contact a portion of the seed layer 31. For example, the power supply roller 12 contacts the seed layer 31 exposed from the plating resist PR at both ends in the width direction of the substrate S. This allows power to be supplied to the seed layer 31 of the substrate S moving in the first plating tank 11 and to the seed layer 31 of the substrate S moving in the second plating tank 14.

[0093] (2-3) Surface treatment apparatus The surface treatment apparatus 13 is used in the surface treatment process described above. The surface treatment apparatus 13 can treat the surface of the conductive layer 32A (part of the conductive layer 32, see Figure 2C) formed in the first plating tank 11 with a treatment solution.

[0094] The surface treatment apparatus 13 is positioned downstream of the first plating tank 11 in the flow direction. The surface treatment apparatus 13 is positioned between the first plating tank 11 and the second plating tank 14 in the flow direction. In this embodiment, the surface treatment apparatus 13 is positioned between the power supply roller 12 and the second plating tank 14 in the flow direction.

[0095] In this embodiment, the surface treatment apparatus 13 has a treatment tank in which a treatment liquid is stored. The substrate S having the conductive layer 32A is immersed in the treatment liquid in the treatment tank.

[0096] (2-5) Second plating tank The second plating tank 14 is used in the second plating process described above. In other words, in the second plating tank 14, a portion of the conductive layer 32 is further formed on top of the surface-treated conductive layer 32A (see Figure 2C).

[0097] The second plating tank 14 is located downstream of the surface treatment apparatus 13 in the flow direction. The electroplating apparatus 10 does not include any equipment for washing the substrate S (e.g., a water spray) or for drying the substrate S (e.g., an air blower or a hot air device) between the surface treatment apparatus 13 and the second plating tank 14 in the flow direction. However, the electroplating apparatus 10 may include a second surface treatment apparatus (e.g., a spray device for spraying the treatment solution or plating solution) between the surface treatment apparatus 13 and the second plating tank 14 in the flow direction for treating the surface of the conductive layer 32A with a treatment solution or plating solution. The second plating solution described above is stored in the second plating tank 14.

[0098] 4. Effects (1) According to the method for manufacturing a wiring circuit board, as shown in Figures 2C and 2D, the conductor layer formation step includes multiple plating steps (first plating step and second plating step), and between each plating step, the surface of the conductor layer 32A (see Figure 2C) is treated with a treatment solution containing a plating accelerator.

[0099] This allows the second plating process to be started while the plating accelerator is present on the surface of the conductor layer 32A.

[0100] Therefore, even if a recess R2 (see Figure 2C) is formed on the surface of the conductive layer 32A formed in the first plating process, plating growth within the recess R2 can be promoted.

[0101] As a result, the depth of the recess R formed on the surface of the conductor layer 32 (recess amount D, see Figure 1) can be reduced.

[0102] (2) According to the method for manufacturing a wiring circuit board, the processing solution does not contain a plating inhibiting component. In other words, the surface treatment process can be performed with a processing solution that does not contain a plating inhibiting component but contains a plating promoting component.

[0103] Therefore, the plating growth within the recess R2 on the surface of the conductor layer 32A can be reliably promoted.

[0104] As a result, the depth of the recess R (amount of recess D) formed on the surface of the conductor layer 32 can be reliably reduced.

[0105] (3) According to the method for manufacturing a wiring circuit board, the processing solution further contains an acid.

[0106] Therefore, the oxide film formed on the surface of the conductive layer 32A can be removed during the surface treatment process.

[0107] This prevents the plating growth within the recess R2 on the surface of the conductor layer 32A from being inhibited by the oxide film.

[0108] As a result, the depth (amount of recess) of the recess R formed on the surface of the conductor layer 32 can be reduced more reliably.

[0109] (4) According to the method for manufacturing a wiring circuit board, in the surface treatment step, a substrate S having a conductive layer 32A is immersed in a treatment solution.

[0110] Therefore, the surface of the conductive layer 32A can be reliably treated with the treatment solution.

[0111] (5) As shown in Figure 3, the electrolytic plating apparatus 10 is equipped with a plurality of plating tanks (first plating tank 11 and second plating tank 14), and the surface treatment apparatus 13 is positioned between the first plating tank 11 and the second plating tank 14.

[0112] Therefore, the substrate S can be introduced into the second plating tank 14 while the plating accelerator is present on the surface of the conductive layer 32A (see Figure 2C).

[0113] As a result, even if a recess R2 is formed on the surface of the conductive layer 32A formed in the first plating bath 11, the plating growth within the recess R2 can be promoted in the second plating bath 14.

[0114] As a result, the depth (amount of recess D) of the recess R formed on the surface of the conductor layer 32 can be reduced.

[0115] 5. Variations Next, a modified example will be described. In the modified example, the same reference numerals are used for components similar to those in the above-described embodiment, and their descriptions are omitted.

[0116] The wiring circuit board 1 may include a circuit pattern 3 formed on one surface of the substrate S in the thickness direction, and a circuit pattern 3 formed on the other surface of the substrate S in the thickness direction.

[0117] In that case, the electroplating apparatus 10 may include a power supply roller 12 that can contact one side surface of the substrate S in the thickness direction, and a power supply roller 12 that can contact the other side surface of the substrate S in the thickness direction.

[0118] This modified example also provides the same effects and benefits as the embodiment described above. [Examples]

[0119] The present invention will be further described below with reference to examples and comparative examples. However, the present invention is not limited in any way to the examples and comparative examples. Furthermore, specific numerical values ​​such as blending ratios (content ratios), physical properties, and parameters used in the following description may be replaced with the upper limits (numerical values ​​defined as "less than or equal to" or "less than") or lower limits (numerical values ​​defined as "greater than or equal to" or "greater than or equal to") of the corresponding blending ratios (content ratios), physical properties, and parameters described in the "Modes for Carrying Out the Invention" above.

[0120] 1. Manufacturing of wiring circuit boards (1) Example 1 A photosensitive polyimide solution (varnish) was applied to a stainless steel metal layer and dried to form a photosensitive resin coating. Next, the photosensitive polyimide coating was exposed to light and developed to form an insulating layer (30 μm thick) with via holes (insulating layer formation step).

[0121] Next, a seed layer was formed by sputtering. The seed layer covers one side surface of the insulating layer in the thickness direction, the inner surface of the via hole, and the surface of the metal layer inside the via hole (seed layer formation process).

[0122] Next, a plating resist was formed on the seed layer, and a conductive layer was formed by electrolytic copper plating using a roll-to-roll continuous plating apparatus (number of plating baths: 5) (conductive layer formation process).

[0123] In the conductive layer formation process, copper sulfate plating solution (copper sulfate pentahydrate: 220 g / L, sulfuric acid: 60 g / L, chloride ions: 40 ppm) is used in each plating bath, with a plating solution temperature of 25°C and a current density of 0.8 A / dm². 2 Under these conditions, electrolytic copper plating was performed for 8 minutes.

[0124] The copper sulfate plating solution contains bis(3-sulfopropyl) disulfide sodium salt (brightener), Janus Green (leveler), and polyethylene glycol (carrier).

[0125] Furthermore, between each plating bath, the substrate was immersed in a treatment solution (pH:1) containing bis(3-sulfopropyl) disulfide sodium salt (surface treatment step).

[0126] The proportion of bis(3-sulfopropyl) disulfide sodium salt in the treatment solution is 0.1 ppm.

[0127] (2) Example 2 A wiring circuit board was obtained in the same manner as in Example 1, except that a treatment solution (pH: 0.2) containing sulfuric acid and bis(3-sulfopropyl) disulfide sodium salt was used.

[0128] (3) Comparative Example A wiring circuit board was obtained in the same manner as in Example 1, except that the surface treatment process was omitted.

[0129] 2. Measurement of the amount of indentation The amount of recess in the conductor layer surface of the wiring circuit boards obtained in each example and comparative example was measured using a laser microscope. The results are shown in Table 1.

[0130] [Table 1]

[0131] In Table 1, "SPS" refers to bis(3-sulfopropyl) disulfide sodium salt. [Explanation of symbols]

[0132] 1 Wiring circuit board 2. Insulating layer 21 Through holes 32 Conductor layer 32A Conductor layer (part of conductor layer 32) 4 metal layer 10 Electrolytic plating apparatus 11. First Plating Tank 13 Surface treatment equipment 14. Second plating tank S base material R1 recess

Claims

1. The process includes forming a conductor layer in a recess of a substrate having a recess, The aforementioned conductor layer formation step is, A first plating step in which a portion of the conductor layer is formed by electroplating, A surface treatment step in which the surface of a portion of the conductive layer formed in the first plating step is treated with a treatment solution, A second plating step is performed in which a portion of the conductive layer is further formed on the surface-treated portion of the conductive layer by electroplating. Includes, The aforementioned processing solution contains a plating-promoting component, and the method is used to manufacture a wiring circuit board.

2. The method for manufacturing a wiring circuit board according to claim 1, wherein the processing solution does not contain a plating inhibiting component.

3. The aforementioned plating-promoting component is a brightener, The method for manufacturing a wiring circuit board according to claim 2, wherein the plating suppression component is a leveler and a carrier.

4. The method for manufacturing a wiring circuit board according to claim 1, wherein the plating accelerating component in the processing solution is the same as the plating accelerating component in the plating solution used in the second plating step.

5. The method for manufacturing a wiring circuit board according to claim 1, wherein the processing solution further contains an acid.

6. The method for manufacturing a wiring circuit board according to claim 5, wherein the acid in the processing solution is the same as the acid in the plating solution used in the second plating step.

7. The method for manufacturing a wiring circuit board according to claim 1, wherein the electroplating in the first plating step and the electroplating in the second plating step are electrolytic copper plating.

8. The aforementioned substrate is Metal layer, An insulating layer having through holes is disposed on the metal layer and It has, The method for manufacturing a wiring circuit board according to claim 1, wherein the recess includes the through hole.

9. A method for manufacturing a wiring circuit board according to claim 1, wherein in the surface treatment step, the substrate having the part of the conductive layer is immersed in the treatment liquid.

10. An electroplating apparatus used in the manufacture of wiring circuit boards, A first plating tank capable of forming a portion of a conductive layer on a substrate, A surface treatment apparatus is provided, which is positioned downstream of the first plating tank in the flow direction of the substrate, and capable of treating a portion of the surface of the conductive layer formed in the first plating tank with a treatment solution containing a plating accelerator component. A second plating tank is located downstream of the surface treatment apparatus in the flow direction. An electrolytic plating apparatus equipped with the following features.

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