Multilayer electronic components

Abstract

To provide a multilayer electronic component with superior reliability, suppressed chipping defects, and improved moisture resistance. [Solution] The stacked electronic component includes a body that includes a dielectric layer and internal electrodes arranged alternately with the dielectric layer in a first direction, and is connected to first and second faces 2, first and second faces facing the first direction, third and fourth faces facing the second direction, and fifth and sixth faces 6 connected to the first to fourth faces and facing the third direction, and external electrodes arranged on the third and fourth faces, and in at least one of the cross-sections in the first and second directions and the cross-sections in the first and third directions, at least one of the corner regions Cz of the cover portion 112 connecting two adjacent faces from the first to sixth faces includes a first curved section Rz1 connected to one of the two faces, a second curved section Rz2 connected to the other of the two faces, and a straight section Lz connecting the first curved section and the second curved section.

Description

[Technical Field]

[0001] This invention relates to a stacked electronic component. [Background technology]

[0002] A multilayer ceramic capacitor (MLCC), a type of multilayer electronic component, is a chip-type capacitor that is mounted on the printed circuit boards of various electronic products such as liquid crystal displays (LCDs) and plasma display panels (PDPs), computers, smartphones, and mobile phones, and plays the role of charging or discharging electricity.

[0003] Multilayer ceramic capacitors offer the advantages of being small yet guaranteeing high capacitance and being easy to mount, making them suitable for use as components in various electronic devices. As computers, mobile devices, and other electronic equipment become smaller and more powerful, the demand for smaller and higher-capacitance multilayer ceramic capacitors is increasing.

[0004] On the other hand, the polishing process, which is one of the manufacturing steps for MLCCs, is a very important stage and can directly affect the surface condition and quality of the MLCC tip.

[0005] The MLCC polishing process involves trimming the surface and edges of the MLCC chip after high-temperature heat treatment (sintering) to expose the internal electrodes and optimize the physical morphology of the chip. Such MLCC polishing is known as an essential step to ensure the electrical properties and reliability of the MLCC.

[0006] In the MLCC polishing process, it is important to form an appropriate level of roundness on the tip surface to ensure moisture resistance reliability and prevent chipping defects.

[0007] Conventional MLCC polishing processes are carried out by introducing tens of thousands of chips and auxiliary materials into a sealed rotating structure to induce chip wear. However, such processes may have the problem that it is technically difficult to monitor the polishing behavior of the chips in real time in a sealed structure. Furthermore, in order to manage or improve the quality dispersion evaluation of the polishing process, thousands of sampling measurements are required, and for this purpose, a lot of time and resources are consumed to analyze the cross-section of the chips each time.

[0008] In addition, in order to form an appropriate level of roundness on the chip surface by the conventional MLCC polishing process, sufficient polishing time is required, and there was a possibility of chipping defects occurring during the polishing process.

[0009] Therefore, there is a need to develop a new structure of multilayer electronic components that can prevent chipping defects and improve moisture resistance reliability. Furthermore, there is a need to develop a new structure of multilayer electronic components that can overcome the inefficiencies of quality control and the limitations of real-time monitoring that occur in conventional MLCC polishing processes.

Prior Art Documents

Patent Documents

[0010]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0011] One of the various objects of the present invention is to provide a multilayer electronic component with excellent reliability.

[0012] One of the various objects of the present invention is to provide a multilayer electronic component in which chipping defects are suppressed.

[0013] One of the various objects of the present invention is to provide a laminated electronic component with improved moisture resistance reliability.

[0014] One of the various objects of the present invention is to provide a method for manufacturing a laminated electronic component capable of suppressing chipping defects.

[0015] However, the object of the present invention is not limited to the above-described content and can be more easily understood in the process of explaining specific embodiments of the present invention.

Means for Solving the Problems

[0016] A laminated electronic component according to an embodiment of the present invention includes a dielectric layer, a main body including internal electrodes alternately arranged with the dielectric layer in a first direction, a first surface and a second surface facing each other in the first direction, a third surface and a fourth surface connected to the first surface and the second surface and facing each other in a second direction, a main body including a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface and the fourth surface and facing each other in a third direction, and external electrodes disposed on the third surface and the fourth surface. In at least one of the cross-sections in the first direction and the second direction and the cross-sections in the first direction and the third direction, at least one of the corner regions connecting two adjacent surfaces among the first surface, the second surface, the third surface, the fourth surface, the fifth surface and the sixth surface may include a first curved section connected to one of the two surfaces, a second curved section connected to the other one of the two surfaces, and a straight section connecting the first curved section and the second curved section.

[0017] A method for manufacturing a laminated electronic component according to an embodiment of the present invention includes a step of laminating a plurality of ceramic green sheets in a first direction to form a laminated bar, a step of forming grooves in a second direction perpendicular to the first direction and a third direction perpendicular to the first direction and the second direction on the upper surface and the lower surface of the laminated bar in the first direction, a step of cutting the laminated bar along the grooves to obtain a unit laminated bar, a step of sintering the unit laminated bar to obtain a main body, and a step of forming external electrodes on the main body. The method may include a polishing step of polishing the unit laminated bar before sintering or polishing the main body before forming the external electrodes. [Effects of the Invention]

[0018] One of the various effects of the present invention is that it can improve the reliability of stacked electronic components.

[0019] One of the various effects of the present invention is the provision of a stacked electronic component in which chipping defects are suppressed.

[0020] One of the various effects of the present invention is the provision of a multilayer electronic component with improved moisture resistance reliability.

[0021] One of the various effects of the present invention is to provide a method for manufacturing stacked electronic components that can suppress chipping defects.

[0022] However, the diverse yet significant advantages and effects of the present invention are not limited to those described above and can be more easily understood in the process of describing specific embodiments of the present invention. [Brief explanation of the drawing]

[0023] [Figure 1] This is a schematic perspective view of a stacked electronic component according to one embodiment of the present invention. [Figure 2] This is a schematic cross-sectional view along the line I-I' in Figure 1. [Figure 3] This is a schematic cross-sectional view along the line II-II' in Figure 1. [Figure 4] This is an enlarged view of the K1 region in Figure 1. [Figure 5] This diagram corresponds to the K1 region in Figure 1 of the conventional example. [Figure 6] This is a schematic perspective view showing the steps involved in obtaining a laminated bar. [Figure 7] This is a schematic perspective view showing the laminated bar before grooves are formed. [Figure 8] This is a front view of a laminated bar in the process of forming grooves. [Figure 9] This is an enlarged view of the K2 region in Figure 8. [Figure 10] This is a side view of a laminated bar with grooves formed on both sides in the first direction. [Figure 11] This is a front view of a laminated bar with grooves formed on both sides in the first direction. [Figure 12] This is a perspective view of a laminated bar with grooves formed on both sides in the first direction. [Modes for carrying out the invention]

[0024] Embodiments of the present invention will be described below with reference to specific embodiments and accompanying drawings. However, embodiments of the present invention can be modified into several other forms, and the scope of the present invention is not limited to the embodiments described below. Furthermore, embodiments of the present invention are provided to give a more complete explanation of the present invention to a person of the ordinary skill. Accordingly, the shapes and sizes of elements in the drawings may be enlarged or reduced (or highlighted or simplified) for a clearer explanation, and elements indicated by the same reference numerals in the drawings are the same elements.

[0025] Furthermore, in order to clearly illustrate the present invention in the drawings, parts unrelated to the description have been omitted, and the size and thickness of each component shown are arbitrarily indicated for the convenience of explanation; therefore, the present invention is not necessarily limited by the illustrations. Also, components with the same function within the scope of the same concept are described using the same reference numerals. Moreover, throughout the specification, when a part "includes" a certain component, unless otherwise stated to the contrary, it does not mean that other components are excluded, but rather that other components may be further included.

[0026] In drawings, the first direction can be defined as the lamination direction or thickness (T) direction, the second direction as the length (L) direction, and the third direction as the width (W) direction.

[0027] Multilayer electronic components Figure 1 is a schematic perspective view of a stacked electronic component according to one embodiment of the present invention, Figure 2 is a schematic cross-sectional view along the line I-I' in Figure 1, Figure 3 is a schematic cross-sectional view along the line II-II' in Figure 1, and Figure 4 is an enlarged view of the K1 region in Figure 1.

[0028] The following describes in detail a multilayer electronic component 100 according to one embodiment of the present invention with reference to Figures 1 to 4. While a multilayer ceramic capacitor (MLCC) will be described as an example of a multilayer electronic component, the present invention is not limited to this and can be applied to various multilayer electronic components using ceramic materials, such as inductors, piezoelectric elements, varistors, or thermistors.

[0029] A stacked electronic component 100 according to one embodiment of the present invention includes a main body 110 including a dielectric layer 111 and internal electrodes 121 and 122 arranged alternately with the dielectric layer in a first direction, a main body 110 including first faces 1 and second faces 2 facing the first direction, third faces 3 and fourth faces 4 connected to the first and second faces and facing the second direction, and fifth faces 5 and sixth faces 6 connected to the first, second, third and fourth faces and facing the third direction, and external electrodes arranged on the third and fourth faces. Including 131 and 132, in at least one of the cross-sections in the first and second directions and the cross-sections in the first and third directions, at least one of the corner regions Cz connecting two adjacent faces from the first, second, third, fourth, fifth, and sixth faces may include a first curved section Rz1 connected to one of the two faces, a second curved section connected to the other of the two faces, and a straight section Lz connecting the first and second curved sections.

[0030] Conventionally, attempts were made to prevent chipping defects and improve moisture resistance reliability by polishing the corner areas into a rounded shape. However, sufficient polishing time was required to form the appropriate level of roundness, and there was a possibility of chipping defects occurring during the polishing process.

[0031] According to one embodiment of the present invention, the corner region Cz connecting two adjacent surfaces includes a first curved section Rz1 connected to one of the two surfaces, a second curved section Rz2 connected to the other of the two surfaces, and a straight section Lz connecting the first and second curved sections. This not only prevents chipping defects and improves moisture resistance reliability, but also shortens the polishing time and suppresses the occurrence of chipping defects during the polishing process, thereby fundamentally suppressing chipping defects.

[0032] The following describes the various components included in the stacked electronic component 100 according to one embodiment of the present invention.

[0033] The main body 110 may have dielectric layers 111 and internal electrodes 121 and 122 stacked alternately.

[0034] There are no particular restrictions on the specific shape of the main body 110, but as shown in the figure, the main body 110 can be hexahedral or a similar shape. Due to the shrinkage of the ceramic powder contained in the main body 110 during the firing process, the main body 110 may not be a perfectly straight hexahedron.

[0035] The main body 110 may have a first surface 1 and a second surface 2 facing each other in a first direction, a third surface 3 and a fourth surface 4 connected to the first surface 1 and the second surface 2 and facing each other in a second direction, and a fifth surface 5 and a sixth surface 6 connected to the first surface 1 and the second surface 2 and connected to the third surface 3 and the fourth surface 4 and facing each other in a third direction.

[0036] The main body 110 may include a corner region Cz connecting two adjacent surfaces from among the first, second, third, fourth, fifth, and sixth surfaces.

[0037] According to one embodiment of the present invention, in the cross-sections in the first and second directions and at least one of the cross-sections in the first and third directions, at least one of the corner regions connecting two adjacent surfaces from the first, second, third, fourth, fifth, and sixth surfaces includes a first curved section Rz1 connected to one of the two surfaces, a second curved section R2 connected to the other of the two surfaces, and a straight section Lz connecting the first and second curved sections. This not only prevents chipping defects and improves moisture resistance, but also shortens the polishing time and suppresses the occurrence of chipping defects during the polishing process, thereby fundamentally suppressing chipping defects.

[0038] In the cross-sections in the first and third directions, the corner region Cz may include the first-to-fifth corner region Cz1-5 connecting the first and fifth surfaces, the first-to-sixth corner region Cz1-6 connecting the first and sixth surfaces, the second-to-fifth corner region Cz2-5 connecting the second and fifth surfaces, and the second-to-sixth corner region Cz2-6 connecting the second and sixth surfaces.

[0039] In the cross-sections in the first and second directions, the corner region may include a first-to-third corner region Cz1-3 connecting the first and third surfaces, a first-to-fourth corner region Cz1-4 connecting the first and fourth surfaces, a second-to-third corner region Cz2-3 connecting the second and third surfaces, and a second-to-fourth corner region Cz2-4 connecting the second and fourth surfaces.

[0040] Figure 5 is a diagram corresponding to the K1 region in Figure 1 of the conventional example. Comparing Figure 4 and Figure 5, in the conventional example, in order to form an appropriate level of roundness, it was necessary to polish the edge so that it had a radius of curvature R' of approximately 0.6 times the thickness T1' of the cover portion 112' in the first direction. In this case, sufficient polishing time was required, and there was a possibility of chipping defects occurring during the polishing process.

[0041] On the other hand, referring to Figure 4, it can be seen that the corner region Cz of the present invention includes a first curved section Rz1 connected to the second surface, a second curved section Rz2 connected to the sixth surface, and a straight section Lz connecting the first and second curved sections. As a result, the radius of curvature R1 of the first curved section and the radius of curvature R2 of the second curved section are significantly smaller than the radius of curvature R' of the conventional example. This reduces the polishing time compared to the conventional example and fundamentally reduces the possibility of chipping defects.

[0042] In one embodiment, the acute angle θL that the straight section Lz makes with the first direction (X direction) may be greater than 30 degrees but less than 60 degrees. Referring to Figure 4, the acute angle θL that the straight section Lz and the line XL showing the first direction make may be greater than 30 degrees but less than 60 degrees.

[0043] This allows for further improvement of the chipping defect suppression effect and moisture resistance reliability improvement effect of the corner region Cz. When the above θL is 30 degrees or less or 60 degrees or more, the radius of curvature of the first curved section or the second curved section becomes too large, and the chipping defect suppression effect and moisture resistance reliability improvement effect of the corner region Cz of the present invention may be insufficient.

[0044] Therefore, the acute angle θL that the straight section Lz makes with the first direction is preferably greater than 30 degrees and less than 60 degrees, and more preferably 40 degrees or more and 50 degrees or less.

[0045] In one embodiment, when the radius of curvature of the first curved section is R1 and the radius of curvature of the second curved section is R2, R1 / R2 can be between 0.78 and 1.28.

[0046] When the radius of curvature of the first curved section is R1 and the radius of curvature of the second curved section is R2, the closer the values ​​of R1 and R2 are, the better the chipping defect suppression effect and moisture resistance reliability improvement effect according to the present invention can be. However, R1 and R2 do not necessarily have to be the same or similar. For example, R1 / R2 can be between 0.78 and 1.28. More preferably, R1 / R2 can be between 0.8 and 1.2, and even more preferably, R1 / R2 can be between 0.9 and 1.1.

[0047] In one embodiment, the main body 110 includes a capacitance forming section Ac containing the internal electrodes 121 and 122, a first cover section 112 positioned above the capacitance forming section in the first direction, and a second cover section 113 positioned below the capacitance forming section in the first direction, and the corner regions can be positioned above the first cover section 112 and the second cover section 113.

[0048] In one embodiment, when the average thickness of the first cover portion in the first direction is T1 and the length of the straight section of the corner region arranged in the first cover portion is L1, the ratio 0.207 ≤ L1 / T1 can be satisfied. This makes it possible to further improve the effect of suppressing chipping defects due to the corner region Cz and the effect of improving moisture resistance reliability.

[0049] There is no particular need to limit the upper limit of L1 / T1, but if L1 is too long, it may be difficult to secure a sufficient curved section, so L1 / T1 ≤ 1.248 can be satisfied. Therefore, according to one embodiment, T1 and L1 can satisfy 0.207 ≤ L1 / T1 ≤ 1.248.

[0050] In one embodiment, when the average thickness of the first cover portion in the first direction is T1, and the radii of curvature of the first round section and the second round section of the corner region located in the first cover portion are R1 and R2, respectively, R1 / T1 and R2 / T1 may be 0.2 or greater. This makes it possible to further improve the effect of suppressing chipping defects due to the corner region Cz and the effect of improving moisture resistance reliability.

[0051] Furthermore, there is no need to specifically limit the upper limits of R1 / T1 and R2 / T1; for example, R1 / T1 and R2 / T1 may be less than 0.6.

[0052] In one embodiment, when the average thickness of the first cover portion in the first direction is T1 and the thickness of the corner region Cz arranged in the first cover portion in the first direction is TCz, the condition TCz / T1 ≤ 0.75 can be satisfied.

[0053] On the other hand, the method for measuring L1, R1, R2, θL, T1, and TCz is not particularly limited, but for example, the main body 110 can be polished to the center in the second direction to expose the cross-sections in the first and third directions, or the main body 110 can be polished to the center in the third direction to expose the cross-sections in the first and second directions, and then measured using an optical microscope, scanning electron microscope (SEM), etc.

[0054] The first, second, third, fourth, fifth, and sixth surfaces of the main body 110 may be generally flat surfaces, and the area from the edge of each surface to the edge of the adjacent surface can be considered as a corner region Cz.

[0055] Referring to Figure 4, the ends of each surface can represent the point where a flat surface ends, or the point where the curvature increases sharply and a curved section begins. Furthermore, the first, second, third, fourth, fifth, and sixth surfaces and the straight sections can represent regions where the radius of curvature is very large or close to infinity.

[0056] Looking at the change in the radius of curvature along the outer outline of the main body from left to right in Figure 4, the radius of curvature is close to infinity until the end of the second surface 2, but then it decreases sharply to R1 at the start of the first curved section Rz1. After this, the radius of curvature increases sharply at the start of the straight section Lz, becoming close to infinity. After this, the radius of curvature is close to infinity until the end of the straight section Lz, but then it decreases sharply to R2 at the start of the second curved section Rz2. After this, the radius of curvature increases sharply at the start of the sixth surface 6, becoming close to infinity.

[0057] After scanning the area corresponding to Figure 4 with a scanning electron microscope (SEM) to obtain an image, the outline of the main body is obtained from the image using an image analysis program. Then, the radius of curvature of the outline is measured and analyzed using CAD software, allowing for the distinction between corner regions, straight sections within corner regions, first curved sections, and second curved sections.

[0058] The radius of curvature of the straight section Lz and the first, second, third, fourth, fifth, and sixth faces of the main body are not particularly limited, but for example, they may be in a region where the radius of curvature is 100 times or more than that of the first and second curved sections.

[0059] The multiple dielectric layers 111 forming the main body 110 are in a fired state, and the boundaries between adjacent dielectric layers 111 can be integrated to such an extent that they are difficult to confirm without using a scanning electron microscope (SEM). There is no particular limit to the number of dielectric layers stacked, and it can be determined considering the size of the multilayer electronic component. For example, the main body can be formed by stacking 400 or more dielectric layers.

[0060] The dielectric layer 111 can be formed by manufacturing a ceramic slurry containing ceramic powder, an organic solvent, and a binder, applying and drying the slurry on a carrier film to provide a ceramic green sheet, and then firing the ceramic green sheet. The ceramic powder is not particularly limited as long as sufficient capacitance can be obtained. For example, as the ceramic powder, barium titanate-based (BaTiO3) powder, normal dielectric powder of a CaZrO3 substrate, etc. can be used. More specifically, as the barium titanate-based (BaTiO3) powder, BaTiO3, (Ba 1-x Ca x )TiO3(0 < x < 1), Ba(Ti 1-y Ca y )O3(0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3(0 < x < 1, 0 < y < 1), and Ba(Ti 1-y Zr y )O3(0 < y < 1) may be one or more of them, and the normal dielectric powder of the CaZrO3 substrate may be (Ca 1-x Sr x )(Zr 1-y Ti y )O3(0 < x < 1, 0 < y < 1).

[0061] Therefore, the dielectric layer 111 can contain one or more of BaTiO3, (Ba 1-x Ca x )TiO3(0 < x < 1), Ba(Ti 1-y Ca y )O3(0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3(0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O3(0 < y < 1), and (Ca 1-x Sr x )(Zr 1-y Ti y )O3(0 < x < 1, 0 < y < 1).

[0062] The main body 110 may include a capacitance forming section Ac which is disposed inside the main body 110 and includes a first internal electrode 121 and a second internal electrode 122 which are arranged to face each other with a dielectric layer 111 in between, and cover sections 112 and 113 which are formed on the upper and lower parts of the capacitance forming section Ac in the first direction.

[0063] Furthermore, the capacitance-forming portion Ac can be formed by repeatedly stacking multiple first internal electrodes 121 and second internal electrodes 122 with a dielectric layer 111 in between, as a portion that contributes to the capacitance formation of the capacitor.

[0064] The cover portions 112 and 113 may be arranged on both sides of the capacity forming portion Ac in the first direction.

[0065] The cover portions 112 and 113 may include a first cover portion 112 positioned at the upper part of the volume-forming portion Ac in the first direction and a second cover portion 113 positioned at the lower part of the volume-forming portion Ac in the first direction. The first cover portion 112 may be referred to as the upper cover portion, and the second cover portion 113 as the lower cover portion.

[0066] The first cover portion 112 and the second cover portion 113 can be formed by stacking a single dielectric layer or two or more dielectric layers in the thickness direction on the upper and lower surfaces of the capacitance forming portion Ac, respectively, and can essentially serve to prevent damage to the internal electrodes due to physical or chemical stress.

[0067] The first cover portion 112 and the second cover portion 113 do not include internal electrodes and may contain the same material as the dielectric layer 111.

[0068] In other words, the first cover portion 112 and the second cover portion 113 may include a ceramic material, for example, a barium titanate (BaTiO3) based ceramic material.

[0069] On the other hand, the thickness of the cover portions 112 and 113 is not particularly limited. However, in order to more easily achieve miniaturization and high capacitance of the stacked electronic component, the thickness of the first cover portion 112 and the thickness of the second cover portion 113 may each be 20 μm or less.

[0070] On the other hand, the thickness of the first cover portion 112 and the thickness of the second cover portion 113 may be the same, but are not limited to this, and may have different values.

[0071] The thickness of the first cover portion 112 can represent its size in the first direction, and the average value of the size of the first cover portion 112 in the first direction measured at five equally spaced points in the third direction can be taken as the average thickness T1 of the first cover portion 112. The average thickness of the second cover portion 113 can be measured in a similar manner.

[0072] The margin portions 114 and 115 can be arranged on the fifth and sixth surfaces of the main body 110.

[0073] The margin portions 114 and 115 may include a first margin portion 114 located on the fifth surface of the main body 110 and a second margin portion 115 located on the sixth surface. That is, the margin portions 114 and 115 can be located on opposite surfaces of the ceramic main body 110 facing each other in the width direction.

[0074] As shown in Figure 3, the margin portions 114 and 115 can represent the regions between the interface between both ends of the first internal electrode 121 and the second internal electrode 122 and the interface surface of the main body 110 in a cross-section obtained by cutting the main body 110 in the width-thickness (WT) direction.

[0075] The margins 114 and 115 can essentially serve to prevent damage to the internal electrodes due to physical or chemical stress.

[0076] The margin portions 114 and 115 may be formed by applying conductive paste to the ceramic green sheet, except where the margin portions are formed, to form internal electrodes.

[0077] Furthermore, in order to suppress the step caused by the internal electrodes 121 and 122, after cutting the laminated internal electrodes so that they are exposed on the fifth and sixth surfaces 5 and 6 of the main body, a single dielectric layer or two or more dielectric layers can be laminated in the third direction (width direction) on both sides of the capacitance forming portion Ac to form margin portions 114 and 115.

[0078] On the other hand, the width of the margin portions 114 and 115 does not need to be particularly limited. However, in order to more easily achieve miniaturization and high capacitance of the multilayer electronic component, the average width of the margin portions 114 and 115 may be 20 μm or less.

[0079] The average width of the margin portions 114 and 115 can represent the average size MW1 in the third direction of the region where the internal electrode is separated from the fifth surface and the average size MW2 in the third direction of the region where the internal electrode is separated from the sixth surface, and can be the average value of the sizes of the margin portions 114 and 115 in the third direction measured at five equally spaced points on the side surface of the capacitance forming portion Ac.

[0080] Therefore, in one embodiment, the average size MW1 and MW2 in the third direction of the region where the internal electrodes 121 and 122 are separated from the fifth and sixth surfaces may be 20 μm or less, respectively.

[0081] The internal electrodes 121 and 122 may include a first internal electrode 121 and a second internal electrode 122. The first internal electrode 121 and the second internal electrode 122 are arranged alternately so as to face each other across the dielectric layer 111 that constitutes the main body 110, and can be exposed on the third surface 3 and the fourth surface 4 of the main body 110, respectively.

[0082] The first internal electrode 121 is separated from the fourth surface 4 and exposed via the third surface 3, and the second internal electrode 122 can be separated from the third surface 3 and exposed via the fourth surface 4. The first external electrode 131 is positioned on the third surface 3 of the main body and connected to the first internal electrode 121, and the second external electrode 132 is positioned on the fourth surface 4 of the main body and connected to the second internal electrode 122.

[0083] In other words, the first internal electrode 121 is not connected to the second external electrode 132, but is connected to the first external electrode 131, and the second internal electrode 122 is not connected to the first external electrode 131, but is connected to the second external electrode 132. Therefore, the first internal electrode 121 can be formed at a certain distance from the fourth surface 4, and the second internal electrode 122 can be formed at a certain distance from the third surface 3.

[0084] In one embodiment, the internal electrodes 121 and 122 may include a first internal electrode 121 that extends to the third, fifth, and sixth surfaces, and a second internal electrode 122 that extends to the fourth, fifth, and sixth surfaces. The third-direction ends of the first internal electrode 121 and the second internal electrode 122 can contact the margin portions 114 and 115.

[0085] The conductive metals contained in the internal electrodes 121 and 122 may be one or more of Ni, Cu, Pd, Ag, Au, Pt, In, Sn, Al, Ti, and alloys thereof, but the present invention is not limited thereto.

[0086] The average thickness td of the dielectric layer 111 does not need to be particularly limited, but can be, for example, 0.1 μm to 10 μm. The average thickness te of the internal electrodes 121 and 122 does not need to be particularly limited, but can be, for example, 0.05 μm to 3.0 μm. Furthermore, the average thickness td of the dielectric layer 111 and the average thickness te of the internal electrodes 121 and 122 can be arbitrarily set according to the desired characteristics and application. For example, in the case of small IT electronic components to achieve miniaturization and high capacitance, the average thickness td of the dielectric layer 111 can be 0.45 μm or less, and the average thickness te of the internal electrodes 121 and 122 can be 0.45 μm or less.

[0087] The average thickness td of the dielectric layer 111 and the average thickness te of the internal electrodes 121 and 122 can represent the dimensions of the dielectric layer 111 and the internal electrodes 121 and 122 in the first direction, respectively. The average thickness td of the dielectric layer 111 and the average thickness te of the internal electrodes 121 and 122 can be measured by scanning the cross-sections of the main body 110 in the first and second directions with a scanning electron microscope (SEM) at 10,000x magnification. More specifically, the average thickness td of the dielectric layer 111 can be measured by taking the average value of the thickness at multiple points on one dielectric layer 111, for example, 30 points equally spaced in the second direction. Similarly, the average thickness te of the internal electrodes 121 and 122 can be measured by taking the average value of the thickness at multiple points on one internal electrode 121 or 122, for example, 30 points equally spaced in the second direction. The 30 equally spaced points can be specified in the capacitance forming section Ac. On the other hand, if such average value measurements are performed on 10 dielectric layers 111 and 10 internal electrodes 121 and 122, and then the average value is measured, the average thickness td of the dielectric layer 111 and the average thickness te of the internal electrodes 121 and 122 can be further generalized.

[0088] External electrodes 131 and 132 can be arranged on the third surface 3 and fourth surface 4 of the main body 110.

[0089] The external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132, which are arranged on the third surface 3 and fourth surface 4 of the main body 110, respectively, and connected to a first internal electrode 121 and a second internal electrode 122, respectively.

[0090] Referring to Figure 1, the external electrodes 131 and 132 can be positioned to cover both end faces of the margin portions 114 and 115 in the second direction.

[0091] In this embodiment, a structure in which the stacked electronic component 100 has two external electrodes 131 and 132 is described, but the number and shape of the external electrodes 131 and 132 can be changed depending on the form of the internal electrodes 121 and 122 or other purposes.

[0092] On the other hand, the external electrodes 131 and 132 can be formed using any material that has electrical conductivity, such as metal, and the specific material can be determined by considering electrical properties, structural stability, etc. Furthermore, they can have a multilayer structure.

[0093] For example, the external electrodes 131 and 132 may include electrode layers 131a and 132a placed on the main body 110 and plating layers 131b and 132b formed on the electrode layers.

[0094] To give a more specific example for the electrode layers 131a and 132a, the electrode layers may be firing electrodes containing a conductive metal and glass, or resin-based electrodes containing a conductive metal and resin.

[0095] Furthermore, the electrode layers 131a and 132a may be formed in a manner in which a fired electrode and a resin-based electrode are sequentially formed on the main body 110. Alternatively, the electrode layers 131a and 132a may be formed by transferring a sheet containing a conductive metal onto the main body 110, or by transferring a sheet containing a conductive metal onto the fired electrode.

[0096] The conductive metal contained in the electrode layers 131a and 132a can be any material with excellent electrical conductivity, and is not particularly limited. For example, the conductive metal may be one or more of nickel (Ni), copper (Cu), and their alloys.

[0097] The plating layers 131b and 132b play a role in improving mounting characteristics. The types of the above plating layers 131b and 132b are not particularly limited and can be plating layers containing one or more of Ni, Sn, Pd, and their alloys, and can be formed in multiple layers.

[0098] To give a more specific example for the plating layers 131b and 132b, the plating layers 131b and 132b may be Ni plating layers or Sn plating layers, and may be in a form in which Ni plating layers and Sn plating layers are formed sequentially on the electrode layers 131a and 132a, or may be in a form in which Sn plating layers, Ni plating layers and Sn plating layers are formed sequentially. Furthermore, the plating layers 131b and 132b may include multiple Ni plating layers and / or multiple Sn plating layers.

[0099] The size of the stacked electronic component 100 does not need to be particularly limited.

[0100] For example, in order to miniaturize and increase the capacity of the stacked electronic component 100, the size of the stacked electronic component 100 can be 0603 (length: 0.6 mm, width: 0.3 mm) or less. Considering manufacturing tolerances, the maximum length L in the second direction of the main body 110 can be 0.69 mm or less, and the maximum width W in the third direction of the main body 110 can be 0.39 mm or less.

[0101] Here, the maximum length L of the main body 110 in the second direction can mean the maximum size of the main body 110 in the second direction, the maximum width W of the main body 110 in the third direction can mean the maximum size of the main body 110 in the third direction, and the maximum thickness T of the main body 110 in the first direction can mean the maximum size of the main body 110 in the first direction.

[0102] However, the size of the stacked electronic component 100 is not limited to a small size, and the effects and structural differences of the present invention may become clearer as the size of the stacked electronic component 100 increases. Therefore, the size of the stacked electronic component 100 may be 1005 (length: 1.0 mm, width: 0.5 mm) or larger. When considering manufacturing tolerances, the maximum length L in the second direction of the main body 110 may be 1.1 mm or larger, and the maximum width W in the third direction of the main body 110 may be 0.55 mm or larger.

[0103] Manufacturing method for multilayer electronic components Figure 6 is a schematic perspective view showing the steps for obtaining a laminated bar; Figure 7 is a schematic perspective view showing a laminated bar before grooves are formed; Figure 8 is a front view of a laminated bar during groove formation; Figure 9 is an enlarged view of the K2 region in Figure 8; Figure 10 is a side view of a laminated bar with grooves formed on both sides in the first direction; Figure 11 is a front view of a laminated bar with grooves formed on both sides in the first direction; and Figure 12 is a perspective view of a laminated bar with grooves formed on both sides in the first direction.

[0104] The manufacturing method for stacked electronic components will be described in detail below with reference to Figures 6 to 12. The manufacturing method for stacked electronic components described below is an example of manufacturing the stacked electronic component 100 described above, and it is not necessary to manufacture the stacked electronic component 100 only by the manufacturing method described later.

[0105] A method for manufacturing a stacked electronic component according to one embodiment of the present invention includes the steps of: stacking a plurality of ceramic green sheets p111 in a first direction to form a stacked bar 200; forming grooves H1 and H2 on the upper surface Sa and lower surface Sb of the stacked bar in the first direction in a second direction perpendicular to the first direction and in a third direction perpendicular to the first and second directions; cutting the stacked bar along the grooves H1 and H2 to obtain a unit stacked bar; sintering the unit stacked bar to obtain a body 110; and forming external electrodes 131 and 132 on the body, and may include a polishing step of polishing the unit stacked bar before sintering or polishing the body before forming the external electrodes.

[0106] According to one embodiment of the present invention, by forming grooves H1 and H2 in a laminated bar 200 and then cutting along the grooves H1 and H2 to obtain a unit laminated bar, it is possible to suppress chipping defects with fewer polishing steps, as well as improve the moisture resistance reliability of laminated electronic components.

[0107] The following describes in detail each stage of the stacked electronic component according to one embodiment of the present invention.

[0108] Laminated bar formation First, multiple ceramic green sheets GS1, GS2, and GS3 can be stacked in a first direction to form a laminated bar 200. At least a portion of the laminated bar 200 can become the part that forms the main body 110 of the present invention after sintering.

[0109] In this case, the ceramic green sheets GS1, GS2, and GS3 include a first ceramic green sheet GS1 on which a first internal electrode pattern p121 is printed, a second ceramic green sheet GS2 on which a second internal electrode pattern p122 is printed, and a third ceramic green sheet GS3 on which the first and second internal electrode patterns are not printed. The third ceramic green sheet GS3 is laminated on the upper p112 and lower p113 of the laminated bar in the first direction, and the first ceramic green sheet GS1 and the second ceramic green sheet GS2 can be alternately laminated in the central part of the laminated bar in the first direction.

[0110] In the lamination bar 200 formation stage, first, multiple ceramic green sheets GS1, GS2, and GS3 can be laminated onto the support film 310.

[0111] The support film 310 can serve to support the laminated bar 200, which is made up of multiple ceramic green sheets GS1, GS2, and GS3. In this case, the support film 310 may contain adhesive substances such as latex, starch, cellulose, protein, IR (Isoprene Rubber), NBR (Nitrile Butadiene Rubber), SBR (Styrene Butadiene Rubber), CR (Chloroprene Rubber), Silicon Rubber, Silicon-based, Urethane-based, Acryl-based, and mixtures thereof in order to effectively support and adhere the laminated bar 200.

[0112] The plurality of ceramic green sheets GS1, GS2, GS3 can be formed of a ceramic paste containing a ceramic powder, an organic solvent, a dispersant, and a binder. The above-mentioned ceramic powder can be a barium titanate-based material, a lead composite perovskite-based material, a strontium titanate-based material, etc. as a raw material for forming the dielectric layer 111 of the multilayer electronic component 100. The above-mentioned barium titanate-based material can contain BaTiO3-based ceramic powder. Examples of the above-mentioned ceramic powder include BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1) in which Ca (calcium), Zr (zirconium), etc. are partially solid-solved in BaTiO3, Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1) or Ba(Ti 1-y Zr y )O3 (0 < y < 1), etc. When the first ceramic green sheet GS1 and the second ceramic green sheet GS2 are fired, they can become the dielectric layer 111 constituting the capacitance forming portion Ac. When the third ceramic green sheet GS3 is fired, it can constitute the first cover portion 112 and the second cover portion 113. On the other hand, the third ceramic green sheet GS3 may be composed of the same materials and components as the first ceramic green sheet GS1 and the second ceramic green sheet GS2, but is not limited thereto.

[0113] Internal electrode patterns p121 and p122 can be formed on ceramic green sheets GS1 and GS2 using an internal electrode paste containing a conductive metal. The conductive metal included in the internal electrode patterns p121 and p122 is not particularly limited, and any material with excellent electrical conductivity can be used. For example, the conductive metal may include one or more of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof. The method for forming the internal electrode patterns p121 and p122 on ceramic green sheets GS1 and GS2 is not particularly limited. For example, the conductive paste for internal electrodes containing the conductive metal can be formed by screen printing or gravure printing on ceramic green sheets GS1 and GS2.

[0114] The internal electrode patterns p121 and p122 may include a first internal electrode pattern p121 formed on the ceramic green sheet GS1 and a second internal electrode pattern p122 formed on the other ceramic green sheet GS2.

[0115] Groove formation stage Subsequently, grooves H1 and H2 can be formed on the upper surface Sa and lower surface Sb of the laminated bar 200 in the first direction, in the second direction (Y direction) perpendicular to the first direction (X direction), and in the third direction (Z direction) perpendicular to the first and second directions. This allows the corner region Cz to include a straight section Lz after the polishing process, thereby suppressing chipping defects and improving moisture resistance reliability.

[0116] Referring to Figure 7, grooves H1 and H2 can be formed in the laminated bar 200 along groove forming lines C1-C1 and C2-C2. The groove forming lines C1-C1 and C2-C2 may include lines C1-C1 parallel to a second direction and lines C2-C2 parallel to a third direction, with C1-C1 being arranged substantially equally spaced in the third direction and C2-C2 being arranged substantially equally spaced in the second direction.

[0117] Figure 5 is a diagram corresponding to the K1 region in Figure 4 of the conventional example. In the conventional example, the laminated bar was cut along C1-C1 and C2-C2 without forming grooves in the laminated bar, and then a polishing process was performed. As a result, a round shape was formed by the polishing process as shown in Figure 5, and in order to form a round shape of the appropriate level, it was necessary to polish the edges so that the radius of curvature R' was approximately 0.6 times the thickness T1' of the cover portion 112' in the first direction. In this case, a sufficient polishing time was required, and there was a possibility of chipping defects occurring during the polishing process.

[0118] On the other hand, in the present invention, after forming grooves H1 and H2 in the laminated bar 200, the laminated bar is cut along C1-C1 and C2-C2, and then a polishing process is performed. As a result of the polishing process, a portion of the grooves H1 and H2 remains in the straight section Lz, and curved sections Rz1 and Rz2 are formed at both ends of the straight section Lz by polishing. Referring to Figure 4, it can be seen that the corner region Cz of the present invention includes a first curved section Rz1 connected to the second surface, a second curved section Rz2 connected to the sixth surface, and a straight section Lz connecting the first and second curved sections, so that the radius of curvature R1 of the first curved section and the radius of curvature R2 of the second curved section are significantly smaller than the radius of curvature R' of the conventional example. As a result, the polishing time is reduced compared to the conventional example, the possibility of chipping defects is fundamentally reduced, and moisture resistance reliability can be improved.

[0119] The method for forming grooves H1 and H2 in the laminated bar 200 is not particularly limited. For example, grooves H1 and H2 can be formed using a blade DB.

[0120] In one embodiment, the grooves H1 and H2 formed on the upper surface Sa of the laminated bar 200 in the first direction may have a thickness Th in the first direction of 50% or less of the thickness Tp1 of the upper part p112 in the first direction. Similarly, the grooves H1 and H2 formed on the lower surface Sb of the laminated bar 200 in the first direction may have a thickness in the first direction of 50% or less of the lower part p113 in the first direction.

[0121] In one embodiment, grooves H1 and H2 can be arranged in a region that does not overlap with at least one of the first internal electrode pattern p121 and the second internal electrode pattern p122 in the first direction. Of the groove forming lines C1-C1 and C2-C2, C1-C1 may not overlap with the first internal electrode pattern p121 and the second internal electrode pattern p122 in the first direction, and a portion of C2-C2 may be set to overlap with the first internal electrode pattern p121 or the second internal electrode pattern p122 in the first direction.

[0122] In one embodiment, grooves H1 and H2 may be V-shaped. Specifically, referring to Figure 11, a groove formed in the second direction may be V-shaped in cross-sections in the first and third directions. Referring to Figure 10, a groove formed in the third direction may be V-shaped in cross-sections in the first and second directions. Because grooves H1 and H2 are V-shaped, it is easy to ensure that the corner region Cz after polishing includes a straight section Lz.

[0123] The V-shaped grooves H1 and H2 may be formed by creating grooves using a V-shaped blade DB.

[0124] In one embodiment, the angle θV formed by the two sides of the V-shape can be greater than 60 degrees but less than 120 degrees. This allows the acute angle θL formed by the straight section Lz with the first direction (X direction) to be controlled to be greater than 30 degrees but less than 60 degrees, thereby further improving the chipping defect suppression effect and moisture resistance reliability improvement effect due to the corner region Cz.

[0125] More preferably, the angle θV formed by the two sides of the V-shape can be 80 degrees or more and 100 degrees or less.

[0126] Cutting stage A unit stacked bar can be obtained by cutting the stacked bar 200 along grooves H1 and H2.

[0127] Referring to Figure 12, the laminated bar 200 can be cut along mutually orthogonal C1-C1 and C2-C2.

[0128] The means for cutting the laminated bar 200 are not particularly limited. For example, the laminated bar 200 can be cut using a blade cutting method, a guillotine cutting method, or a laser cutting method.

[0129] In one embodiment, the cutting can be performed along the point where the two sides of the V-shape meet. That is, the cutting can be performed along the vertex of the V-shape.

[0130] Polishing stage After this, a polishing process may be performed to polish the unit stacked bar. Alternatively, after sintering the unit stacked bar to obtain the main body, a polishing process may be performed to polish the main body before forming the external electrodes.

[0131] The polishing process can be carried out by placing tens of thousands of unit stacked bars or bodies (hereinafter referred to as "tips") and auxiliary materials into a sealed rotating structure to induce wear on the tips. Auxiliary materials include abrasives and lubricants, and abrasives such as ceramic particles and polishing beads can be used.

[0132] Because tens of thousands of chips are processed in a sealed state during the polishing process, it is difficult to check the polishing status of individual chips in real time. Furthermore, analyzing thousands of sample chips is necessary for distribution management and improvement evaluation, which consumes a great deal of time and resources.

[0133] According to one embodiment of the present invention, after forming grooves H1 and H2 in the laminated bar 200, a polishing process is performed, thereby shortening the polishing time and fundamentally reducing the possibility of chipping defects, and improving moisture resistance reliability.

[0134] Sintering stage The main body 110 can be obtained by sintering the unit stacked bar. The sintering temperature is not particularly limited, but it can be fired at, for example, 1000 to 1300°C. Sintering can be carried out in a reducing atmosphere.

[0135] If the polishing process before sintering is omitted, the polishing process of the main body can be performed before the formation of the external electrodes.

[0136] External electrode formation stage After this, external electrodes can be formed on the main body. External electrodes 131 and 132 can be formed on one and the other surface of the main body 110 in the second direction, respectively, to manufacture a stacked electronic component 100.

[0137] For example, if the base electrode layers 131a and 132a include a fired electrode layer, the main body 110 can be dipped in a conductive paste for external electrodes containing metal powder, glass frit, binder, and organic solvent, and then the conductive paste for external electrodes can be fired at a temperature of 500°C to 900°C to form a fired electrode layer.

[0138] For example, if the base electrode layers 131a and 132a include a resin electrode layer, the main body can be dipped in a conductive resin composition containing metal powder, resin, binder, and organic solvent, and then cured at a temperature of 250°C to 550°C to form the resin electrode layer.

[0139] Furthermore, electroplating and / or electroless plating may be performed to form plating layers 131b and 132b on the underlying electrode layers 131a and 132a.

[0140] (Examples) Sample chips were manufactured according to the manufacturing method described above, and sample chips were produced such that θL and R1 / R2 in Figure 4 satisfy Table 1 below. Humidity resistance reliability evaluation was performed and the results are shown in Table 1 below.

[0141] For the humidity resistance reliability evaluation, 20,000 sample chips were prepared for each test number. A voltage of 3Vr was applied for 12 hours at a temperature of 85°C and a relative humidity of 85%. Sample chips whose insulation resistance value dropped to 1 / 100 or less of the initial value were judged to be defective, and the number of defective sample chips was recorded.

[0142] [Table 1]

[0143] Referring to Table 1, it can be seen that in all of the tests from test number 1 to 5, fewer than 40 out of 20,000 sample chips exhibited moisture resistance reliability failure, resulting in a low moisture resistance reliability failure rate of 0.2% or less. This is interpreted as a result of fundamentally suppressing chipping defects during the polishing process by shortening the polishing time, as mentioned above.

[0144] In particular, when θL is greater than 30 degrees but less than 60 degrees, it can be confirmed that out of 20,000 sample chips, 4 or fewer chips exhibited moisture resistance reliability failure, resulting in a very low moisture resistance reliability failure rate of 0.02% or less.

[0145] Although embodiments of the present invention have been described in detail above, the present invention is not limited by the embodiments described above and the accompanying drawings, but is limited by the claims provided. Therefore, within the scope of the technical idea of ​​the present invention as described in the claims, various forms of substitution, modification, and alteration are possible by persons with ordinary skill in the art, and these also fall within the scope of the present invention.

[0146] Furthermore, the expression "one embodiment" as used in this disclosure does not mean that each embodiment is identical to the others, but is provided to highlight and describe the unique and distinct features of each embodiment. However, the present embodiments are not excluded from being realized in combination with features of other embodiments. For example, even if a matter described in one embodiment is not described in another embodiment, it can be understood as a description related to the other embodiment, unless there is a description in the other embodiment that contradicts or is inconsistent with that matter.

[0147] The terms used in this disclosure are used solely to describe one embodiment and are not intended to limit the disclosure. Where otherwise, singular expressions include plural expressions unless the context clearly indicates otherwise. [Explanation of symbols]

[0148] 100 Stacked Electronic Components 110 Main Unit 111 Dielectric layer 112, 113 Cover section 114, 115 Margin section Cz corner area Rz1 First Curve Section Lz straight section Rz2 Second Curve Section 121, 122 Internal electrode 131, 132 External electrode

Claims

1. A body including a dielectric layer and internal electrodes arranged alternately with the dielectric layer in a first direction, a body including a first and second surface facing the first direction, a third and fourth surface connected to the first and second surfaces and facing the second direction, and a fifth and sixth surface connected to the first, second, third and fourth surfaces and facing the third direction, Includes external electrodes arranged on the third and fourth surfaces, In at least one of the cross-sections in the first and second directions and the cross-sections in the first and third directions, A stacked electronic component in which at least one of the corner regions connecting two adjacent faces from the first, second, third, fourth, fifth, and sixth faces includes a first curved section connected to one of the two faces, a second curved section connected to the other of the two faces, and a straight section connecting the first and second curved sections.

2. The stacked electronic component according to claim 1, wherein the straight section has an acute angle with the first direction that is greater than 30 degrees and less than 60 degrees.

3. The stacked electronic component according to claim 1, wherein when the radius of curvature of the first curved section is R1 and the radius of curvature of the second curved section is R2, R1 / R2 is 0.78 or more and 1.28 or less.

4. The main body includes a capacitance forming portion including the internal electrodes, a first cover portion disposed above the capacitance forming portion in the first direction, and a second cover portion disposed below the capacitance forming portion in the first direction. The stacked electronic component according to claim 1, wherein the corner region is arranged in the first cover portion and the second cover portion.

5. The laminated electronic component according to claim 4, wherein when the average thickness of the first cover portion in a first direction is T1 and the length of the straight section of the corner region arranged in the first cover portion is L1, 0.207 ≤ L1 / T1 is satisfied.

6. The stacked electronic component according to claim 5, wherein L1 and T1 satisfy 0.207 ≤ L1 / T1 ≤ 1.

248.

7. When the average thickness of the first cover portion in the first direction is T1, and the radii of curvature of the first round section and the second round section of the corner region arranged in the first cover portion are R1 and R2, respectively, The stacked electronic component according to claim 4, wherein R1 / T1 and R2 / T1 are 0.2 or greater.

8. The stacked electronic component according to claim 7, wherein R1 / T1 and R2 / T1 are 0.2 or more and less than 0.

6.

9. When the average thickness of the first cover portion in the first direction is T1, and the thickness of the corner region arranged in the first cover portion in the first direction is Cz, A multilayer electronic component according to claim 4, satisfying TCz / T1 ≤ 0.

75.

10. A stacked electronic component according to any one of claims 1 to 9, wherein in the cross-section in the first and third directions, the corner region includes a first-to-fifth corner region connecting the first and fifth surfaces, a first-to-sixth corner region connecting the first and sixth surfaces, a second-to-fifth corner region connecting the second and fifth surfaces, and a second-to-sixth corner region connecting the second and sixth surfaces.

11. A stacked electronic component according to any one of claims 1 to 9, wherein in the cross-section in the first and second directions, the corner region includes a first-to-third corner region connecting the first and third surfaces, a first-to-fourth corner region connecting the first and fourth surfaces, a second-to-third corner region connecting the second and third surfaces, and a second-to-fourth corner region connecting the second and fourth surfaces.

12. The stacked electronic component according to any one of claims 1 to 9, wherein the maximum length in the second direction of the stacked electronic component is 1.1 mm or more, and the maximum width in the third direction is 0.55 mm or more.

13. The steps include: stacking multiple ceramic green sheets in a first direction to form a stacked bar; The steps include forming grooves on the upper and lower surfaces of the stacked bar in the first direction in a second direction perpendicular to the first direction and in a third direction perpendicular to the first and second directions, The steps include cutting the laminated bar along the groove to obtain a unit laminated bar, The steps include: obtaining the main body by sintering the aforementioned unit stacked bar; The step includes forming an external electrode on the main body, A method for manufacturing a stacked electronic component, comprising a polishing step of polishing the unit stacked bar before sintering or polishing the body before forming the external electrodes.

14. The plurality of ceramic green sheets include a first ceramic green sheet on which a first internal electrode pattern is printed, a second ceramic green sheet on which a second internal electrode pattern is printed, and a third ceramic green sheet on which neither the first nor the second internal electrode pattern is printed. The method for manufacturing a stacked electronic component according to claim 13, wherein the third ceramic green sheet is stacked on the upper and lower parts of the stacking bar in the first direction, and the first ceramic green sheet and the second ceramic green sheet are alternately stacked in the central part of the stacking bar in the first direction.

15. The method for manufacturing a laminated electronic component according to claim 14, wherein the groove formed on the upper surface of the laminated bar in the first direction has a thickness in the first direction of 50% or less of the upper part in the first direction.

16. The method for manufacturing a stacked electronic component according to claim 14, wherein the groove is arranged in a region that does not overlap in a first direction with at least one of the first internal electrode pattern and the second internal electrode pattern.

17. A method for manufacturing a stacked electronic component according to any one of claims 13 to 16, wherein the groove formed in the second direction is V-shaped in cross-section in the first and third directions, and the groove formed in the third direction is V-shaped in cross-section in the first and second directions.

18. The method for manufacturing a stacked electronic component according to claim 17, wherein the angle between the two V-shaped sides is 80 degrees to 100 degrees.

19. The method for manufacturing a stacked electronic component according to claim 17, wherein the cutting is performed along the point where the two V-shaped sides meet.

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