Indication device

Abstract

To provide a display device with improved reliability. [Solution] The display device according to the embodiment of the present disclosure includes a substrate including a display area including a light-emitting element, a power line extending from a pad area, a non-display area surrounding the display area, and an open area, and including an optical area located within the display area; a first moisture-proof structure including a first metal layer extending from a portion of the power line; and a second moisture-proof structure including a second metal layer disposed between the display area and the open area.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to a reliable display device.

Background Art

[0002] With the development of technology, in addition to the image display function, a display device can provide a photographing function and various sensing functions. For this purpose, the display device can include optoelectronic devices (also referred to as light receiving devices or sensors) such as cameras and sensing sensors.

[0003] Since the optoelectronic device needs to receive light from the front of the display device, it must be installed in a place where light reception is advantageous. Therefore, a camera (camera lens) and a sensing sensor can be exposed on the front surface of the display device. As a result, the bezels of the display panel become wider, a notch is formed in the display area of the display panel, or a camera or a sensing sensor is provided there.

[0004] Among display devices, an organic light emitting display device uses a light emitting diode that emits light by itself, and thus has advantages in terms of response speed, contrast ratio, luminous efficiency, luminance, and

[0005] viewing angle. In this case, the light emitting diode can be implemented with an inorganic material or an organic material.

[0006] On the other hand, various display devices including a display device may have a decrease in performance such as reliability when moisture flows in, so it is necessary to block the penetration or propagation of moisture in various ways.

Summary of the Invention

Problems to be Solved by the Invention

[0007] Embodiments of the present disclosure can provide a display device with improved reliability.

[0008] Embodiments of this disclosure can provide a display device that includes a moisture-proof structure in the power line region and the optical region.

[0009] Embodiments of this disclosure can provide a display device that can increase the number of moisture permeability paths by including moisture-proof structures in the power line region and the optical region.

[0010] Embodiments of this disclosure can provide a display device that can block or reduce the penetration of external moisture into the display area by incorporating a moisture-proof structure.

[0011] The problems of the embodiments of this disclosure are not limited to those mentioned herein, and other problems not mentioned herein will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0012] Embodiments of the present disclosure can provide a display device comprising a substrate including a display area including a light-emitting element, a power line extending from a pad area, a non-display area surrounding the display area, and an open area, and including an optical area located within the display area; a first moisture-proof structure including a first metal layer extending from a portion of the power line; and a second moisture-proof structure including a second metal layer disposed between the display area and the open area.

[0013] Embodiments of the present disclosure can provide a display device comprising a substrate including a display area containing a light-emitting element, a power line extending from a pad area, a non-display area surrounding the display area, and an optical area located within the display area; a moisture-proof structure disposed within the power line or the optical area; and a light-emitting element comprising an intermediate layer extending from the display area to the optical area, wherein the intermediate layer comprises a plurality of parts, the plurality of parts being spaced apart from each other.

[0014] According to embodiments of this disclosure, a display device with improved reliability can be provided.

[0015] According to embodiments of this disclosure, a display device can be provided that includes a moisture-proof structure in the power line region and the optical region.

[0016] According to embodiments of this disclosure, a display device can be provided that can increase the number of moisture permeability paths by including moisture-proof structures in the power line region and the optical region.

[0017] According to embodiments of this disclosure, a display device can be provided that, by incorporating a moisture-proof structure, can block or reduce the penetration of external moisture into the display area.

[0018] According to embodiments of this disclosure, a low-power display device can be provided by blocking or reducing the penetration of external moisture into the display area, which can lead to a decrease in the lifespan of the light-emitting elements or the occurrence of defects in the light-emitting elements.

[0019] The effects of the embodiments of this disclosure are not limited to those described above, and other effects not mentioned will be clearly understood by those skilled in the art from the claims. [Brief explanation of the drawing]

[0020] This disclosure can be better understood from the detailed description and accompanying drawings provided below, which are provided for illustrative purposes only and do not limit the content of this disclosure. [Figure 1] This is an exemplary system configuration diagram of a display device according to an embodiment of the present disclosure. [Figure 2] This is an exemplary plan view of a display device according to an embodiment of the present disclosure. [Figure 3] This is an exemplary cross-sectional view of a display device according to an embodiment of the present disclosure, cut along line AB in Figure 2. [Figure 4] This is an illustrative plan view of a display device according to an embodiment of the present disclosure, with the SA region of Figure 2 enlarged. [Figure 5] Figure 4 is an exemplary cross-sectional view of a display device according to an embodiment of the present disclosure, cut along the CD line. [Figure 6] FIG. 2 is an exemplary plan view of a display device according to an embodiment of the present disclosure in which the OA region is enlarged. [Figure 7] FIG. 5 is an exemplary cross-sectional view of a display device according to an embodiment of the present disclosure taken along the line E-F of FIG. 6. [Figure 8] FIG. 8 is a view showing a phenomenon in which a seam occurs in a metal layer of a moisture barrier structure. [Figure 9] FIG. 11 is an exemplary cross-sectional view of a first moisture barrier structure and a second moisture barrier structure according to an embodiment of the present disclosure. [Figure 10] FIG. 14 is an exemplary view showing a process for manufacturing a first moisture barrier structure and a second moisture barrier structure according to an embodiment of the present disclosure. [Figure 11] FIG. 17 is an exemplary view showing a process for manufacturing a first moisture barrier structure and a second moisture barrier structure according to an embodiment of the present disclosure. [Figure 12] FIG. 20 is an exemplary view showing a process for manufacturing a first moisture barrier structure and a second moisture barrier structure according to an embodiment of the present disclosure. [Figure 13] FIG. 23 is another exemplary cross-sectional view of a first moisture barrier structure and a second moisture barrier structure according to an embodiment of the present disclosure. [Figure 14] FIG. 26 is another exemplary cross-sectional view of a first moisture barrier structure and a second moisture barrier structure according to an embodiment of the present disclosure. [Figure 15] FIG. 29 is another exemplary cross-sectional view of a first moisture barrier structure and a second moisture barrier structure according to an embodiment of the present disclosure. [Figure 16] FIG. 32 is another exemplary cross-sectional view of a first moisture barrier structure and a second moisture barrier structure according to an embodiment of the present disclosure. [Figure 17] FIG. 35 is an exemplary view showing a process for manufacturing a first moisture barrier structure and a second moisture barrier structure according to an embodiment of the present disclosure. [Figure 18] FIG. 38 is an exemplary view showing a process for manufacturing a first moisture barrier structure and a second moisture barrier structure according to an embodiment of the present disclosure. [Figure 19]This is an illustrative diagram showing a process for manufacturing a first moisture-proof structure and a second moisture-proof structure according to embodiments of the present disclosure. [Figure 20] This is an illustrative diagram showing a process for manufacturing a first moisture-proof structure and a second moisture-proof structure according to embodiments of the present disclosure. [Figure 21] This is an illustrative diagram showing a process for manufacturing a first moisture-proof structure and a second moisture-proof structure according to embodiments of the present disclosure. [Figure 22] This is an illustrative diagram showing a process for manufacturing a first moisture-proof structure and a second moisture-proof structure according to embodiments of the present disclosure. [Figure 23] This is another exemplary cross-sectional view of the first moisture-proof structure and the second moisture-proof structure according to embodiments of the present disclosure. [Figure 24] This is another exemplary cross-sectional view of the first moisture-proof structure and the second moisture-proof structure according to embodiments of the present disclosure. [Figure 25] This is another exemplary cross-sectional view of the first moisture-proof structure and the second moisture-proof structure according to embodiments of the present disclosure. [Modes for carrying out the invention]

[0021] Hereinafter, some embodiments of this disclosure will be described in detail with reference to illustrative drawings. In assigning reference numerals to components in each drawing, the same reference numeral may be used for the same component whenever possible, even if it is shown in other drawings. In describing this disclosure, if it is determined that a specific description of a relevant known configuration or function would obscure the gist of this disclosure, such detailed description will be omitted. Where the terms “includes,” “has,” “consists of,” etc., used herein, other parts may be added unless “only” is used. When a component is expressed singularly, it may include multiple components unless otherwise explicitly stated.

[0022] Furthermore, in describing the components of this disclosure, terms such as 1, 2, A, B, (a), (b), etc., may be used. These terms are used solely to distinguish a component from other components, and do not limit the nature, order, sequence, or number of such components.

[0023] In descriptions of the positional relationships of components, when it is stated that two or more components are “linked,” “joined,” or “connected,” it should be understood that while two or more components can be directly “linked,” “joined,” or “connected,” it is also possible for two or more components to be further “interposed” with other components before being “linked,” “joined,” or “connected.” Here, the other components may be included in at least one of the two or more components that are “linked,” “joined,” or “connected” to each other.

[0024] In descriptions of temporal relationships concerning constituent elements, operating methods, or manufacturing methods, when temporal order or sequential relationships are described using phrases such as "after," "following," "next," or "before," unless "immediately" or "directly" is used, this can include cases that are not continuous.

[0025] On the other hand, if numerical values ​​or corresponding information (e.g., levels) relating to components are mentioned, even without further explicit mention, these numerical values ​​or corresponding information may be interpreted as including a range of errors that can occur due to various factors (e.g., process factors, internal or external shocks, noise, etc.).

[0026] Various embodiments of this disclosure will be described in detail below with reference to the attached drawings.

[0027] Figure 1 is an exemplary system configuration diagram of a display device 100 according to an embodiment of the present disclosure.

[0028] Referring to Figure 1, the display device 100 of this disclosure is a component for displaying images and may include a display panel 110 and a display driving circuit. The display driving circuit is a circuit for driving the display panel 110 and may include a data driving circuit 120, a gate driving circuit 130, and a controller 140, etc.

[0029] The display panel 110 may include a display area DA and a non-display area NDA. The display area DA is also called the active area, and may contain multiple subpixels SP for displaying images. The non-display area NDA may be an area located outside the display area DA.

[0030] The non-display area (NDA) is an area where no image is displayed and is also called a "bezel." In the display panel 110, the non-display area (NDA) may be very small. The non-display area (NDA) is also called an inactive area and may include a pad area. All or part of the non-display area (NDA) may be an area visible from the front of the display device 100, an area that is bent and not visible from the front of the display device 100, or an area covered by the case or housing (not shown) of the display device 100. The non-display area (NDA) may include a first non-display area (NDA1) and a second non-display area (NDA2).

[0031] Referring to Figure 1, the display device 100 according to an embodiment of the present disclosure may include one or more optical areas (Optical Areas). The optical area OA may include an open area or a camera hole obtained by removing at least a portion of the substrate 111. Various optical electronic devices provided on the display device 100 may be located in the area that overlaps at least a portion with the optical area OA. The one or more optical devices may include, for example, one or more of the following: a camera (image sensor) or other imaging device, a proximity sensor, a face recognition sensor, an illuminance sensor or other sensing sensor. For example, the camera is located below the substrate of the display device 100, but may be located on a plane that overlaps with the optical area OA.

[0032] Figure 1 shows a configuration with one optical region OA, but it is not limited to this and can be arranged in various ways. For example, one or two optical regions OA may be arranged inside the display region DA, with an imaging device such as a camera being additionally placed in the first optical region OA, and a sensing sensor or camera additionally placed in the second optical region OA.

[0033] Figure 1 shows that the optical region OA is circular in shape, but the embodiments of this disclosure are not limited thereto. For example, the optical region OA can have various shapes such as circular, elliptical, square, hexagonal, or octagonal. Also, when multiple optical regions OA are arranged inside the display region DA, the size of the first optical region OA may differ from the size of the second optical region OA2. For example, the size of the first optical region OA where a camera or other imaging device is placed may be larger than the size of the second optical region OA2 where a sensing sensor or the like is placed.

[0034] For example, the shape of the first optical region OA and the shape of the second optical region OA2 can have various shapes such as a circle, an ellipse, a square, a hexagon, or an octagon.

[0035] On the other hand, one or more optical regions OA are located in areas where the substrate 111 has been removed, and such optical regions OA may be non-display regions NDA where no subpixels SP are located. Optical regions OA located within display regions DA are sometimes also called "HiAA (Hole in Active Area)".

[0036] The second non-display area NDA2 can be positioned while surrounding the display area DA. The second non-display area NDA2 may also be a bezel area located outside the display area DA of the display device 100. The second non-display area NDA2 is a bezel area located outside the display area DA and is sometimes called an outer bezel area. Drive circuits such as data drive circuits and gate drive circuits for driving multiple light-emitting elements located in the display area DA may be located in the second non-display area NDA2, and signal lines such as data lines and gate lines may be located there.

[0037] In the embodiment of the present disclosure, the display device 100 can increase or maximize the display area DA by reducing the area of ​​the second non-display area NDA2, which is the outer bezel area, because the optical area OA is located within the display area DA.

[0038] Referring to Figure 1, the display panel 110 may include a substrate 111 and a plurality of subpixels SP arranged on the substrate 111.

[0039] Various types of signal lines for driving multiple subpixels SP can be arranged on the substrate 111 of the display panel 110.

[0040] The display device 100 according to the embodiments of this disclosure may be a liquid crystal display device or the like, or it may be a self-emissive display device in which the display panel 110 emits light on its own. When the display device 100 according to the embodiments of this disclosure is a self-emissive display device, each of the plurality of subpixels SP may include a light-emitting element.

[0041] For example, the display device 100 according to an embodiment of the present disclosure may be an organic light-emitting display device in which the light-emitting element is realized by an organic light-emitting diode (OLED). Another example is the display device 100 according to an embodiment of the present disclosure may be an inorganic light-emitting display device in which the light-emitting element is realized by an inorganic-based light-emitting diode. Yet another example is the display device 100 according to an embodiment of the present disclosure may be a quantum dot display device in which the light-emitting element is realized by a quantum dot, which is a semiconductor crystal that emits light itself.

[0042] The structure of each of the multiple subpixels SP may vary depending on the type of display device 100. For example, if the display device 100 is a self-emissive display device in which the subpixels SP emit light themselves, each subpixel SP may include a light-emitting element that emits light itself, one or more transistors, and one or more capacitors.

[0043] Referring to Figure 1, a subpixel SP may include a light-emitting element ED and a subpixel circuit SPC for driving the light-emitting element ED.

[0044] Referring to Figure 1, the subpixel circuit SPC may include a plurality of transistors for driving the light-emitting element ED and at least one capacitor. In this disclosure, the subpixel circuit SPC can drive the light-emitting element ED by supplying a drive current to the light-emitting element ED at predetermined timings. The light-emitting element ED can emit light when driven by the drive current.

[0045] Multiple transistors may include a drive transistor DT for driving a light-emitting element ED, and a scan transistor ST that is turned on or turned off in response to a scan signal SC.

[0046] The drive transistor DT can supply drive current to the light-emitting element ED. When the drive transistor DT is turned on, it can supply drive current to the light-emitting element ED.

[0047] The scan transistor ST may be configured to control the electrical state of the corresponding node in the subpixel circuit SPC, or to control the state or operation of the drive transistor DT. The scan transistor ST may be configured to control the state or operation of the drive transistor DT corresponding to the scan signal SC.

[0048] At least one capacitor may include a storage capacitor Cst to maintain a constant voltage during the frame.

[0049] To drive the subpixel SP, a video signal such as the data signal VDATA and a gate signal such as the scan signal SC can be applied to the subpixel SP. Furthermore, to drive the subpixel SP, a common drive voltage including a first common drive voltage VDD and a second common drive voltage VSS can be applied to the subpixel SP.

[0050] The light-emitting element ED may include a pixel electrode PE, an intermediate layer EL, and a common electrode CE. The intermediate layer EL can be placed between the pixel electrode PE and the common electrode CE.

[0051] For example, the pixel electrode PE is an electrode placed on each subpixel SP, and the common electrode CE may be an electrode placed in common on multiple subpixels SP. As an example, the pixel electrode PE may be the anode electrode and the common electrode CE may be the cathode electrode. As another example, the pixel electrode PE may be the cathode electrode and the common electrode CE may be the anode electrode. For the sake of explanation, the following example will assume that the pixel electrode PE is the anode electrode and the common electrode CE is the cathode electrode. On the other hand, the pixel electrode PE is sometimes called the first electrode and the common electrode CE is sometimes called the second electrode.

[0052] If the light-emitting element ED is an organic light-emitting element, the intermediate layer EL may include a light-emitting layer EML, a first common intermediate layer COM1 between the pixel electrode PE and the light-emitting layer EML, and a second common intermediate layer COM2 between the light-emitting layer EML and the common electrode CE. The first common intermediate layer COM1 and the second common intermediate layer COM2 together are called the common intermediate layer EL_COM.

[0053] The light-emitting layer (EML) can be placed for each subpixel (SP), and the common intermediate layer (EL_COM) can be placed in common across multiple subpixels (SP).

[0054] The emissive layer EML can be placed in each emissive region, and the common intermediate layer EL_COM can be placed in common across multiple emissive and non-emissive regions. The emissive layer EML may, but is not limited to, an organic emissive layer containing organic material.

[0055] The emissive layer (EML) and the common intermediate layer (EL_COM) can be arranged in common across multiple subpixels (SP).

[0056] The emissive layer EML and the common intermediate layer EL_COM can be arranged in common across multiple emissive and non-emissive regions.

[0057] For example, the first common intermediate layer COM1 may include a hole injection layer (HIL) and a hole transfer layer (HTL). The second common intermediate layer COM2 may include an electron transfer layer (ETL) and an electron injection layer (EIL).

[0058] The hole injection layer injects holes from the pixel electrode PE into the hole transport layer, and the hole transport layer can transport the holes to the light-emitting layer EML. The electron injection layer injects electrons from the common electrode CE into the electron transport layer, and the electron transport layer can transport the electrons to the light-emitting layer EML.

[0059] For example, the common electrode CE can be electrically connected to a second common drive voltage line VSSL. The second common drive voltage VSS can be applied to the common electrode CE via the second common drive voltage line VSSL. The pixel electrode PE can be electrically connected directly or indirectly (via other transistors) to the first node N1 of the drive transistor DT of each subpixel SP. In this disclosure, “second common drive voltage VSS” may also be referred to as “base voltage,” and “second common drive voltage line VSSL” may also be referred to as “low power supply voltage line,” “low voltage line,” or “base voltage line.”

[0060] Each light-emitting element ED can be composed of a superimposed portion of a pixel electrode PE, an emissive layer EML within the intermediate layer EL, and a common electrode CE. Each light-emitting element ED can form a predetermined light-emitting region. For example, the light-emitting region of each light-emitting element ED may include the superimposed region of the pixel electrode PE, the emissive layer EML within the intermediate layer EL, and the common electrode CE.

[0061] For example, the light-emitting element ED may be an organic light-emitting diode (OLED), an inorganic light-emitting diode (LED), or a quantum dot light-emitting element. For example, if the light-emitting element ED is an organic light-emitting diode (OLED), the intermediate layer EL in the light-emitting element ED may include an intermediate layer EL containing organic material.

[0062] For example, the display device 100 according to an embodiment of the present disclosure may be an organic light-emitting display device in which the light-emitting element is an organic light-emitting diode (OLED). In another example, the display device 100 according to an embodiment of the present disclosure may be an inorganic light-emitting display device in which the light-emitting element is an inorganic substrate light-emitting diode. In yet another example, the display device 100 according to an embodiment of the present disclosure may be a quantum dot display device in which the light-emitting element is a quantum dot, which is a semiconductor crystal that emits light itself. However, the embodiments of the present disclosure are not limited thereto.

[0063] The drive transistor DT may be a drive transistor for supplying drive current to the light-emitting element ED. The drive transistor DT may be electrically connected between the first common drive voltage line VDDL and the light-emitting element ED.

[0064] The drive transistor DT may include a first node N1, a second node N2, and a third node N3. The first node N1 may be electrically connected to the light-emitting element ED. A data signal VDATA may be applied to the second node N2. A first common drive voltage VDD may be applied to the third node N3 from a first common drive voltage line VDDL. The drive transistor DT may be connected between the first node N1 and the second node N2.

[0065] In the drive transistor DT, the second node N2 is the gate node, the first node N1 is the source node or drain node, and the third node N3 may be the drain node or source node. For the sake of explanation, the following example will be given in which the second node N2 is the gate node (or gate electrode), the first node N1 is the source node (or source electrode), and the third node N3 is the drain node (drain electrode), but the embodiments of this disclosure are not limited thereto.

[0066] In the embodiments of this disclosure, for the sake of explanation, the source electrode and the drain electrode will be described separately. However, the source electrode and the drain electrode can be used in combination. The source electrode can be the drain electrode, and the drain electrode can be the source electrode. Furthermore, in one embodiment of this disclosure, the source electrode can be the drain electrode in another embodiment of this disclosure, and in any embodiment of this disclosure, the drain electrode can be the source electrode in another embodiment of this disclosure.

[0067] The scan transistor ST included in the subpixel circuit SPC shown in Figure 1 may be a switching transistor that transmits the data signal VDATA, which is the video signal, to the second node N2, which is the gate node of the drive transistor DT. When the scan transistor ST is turned on, the data signal VDATA is transmitted to the drive transistor DT.

[0068] The scan transistor ST is controlled on / off by a scan signal SC, which is a gate signal applied via a scan line SCL, a type of gate line GL, and can control the electrical connection between the second node N2 of the drive transistor DT and the data line DL. The drain or source electrode of the scan transistor ST can be electrically connected to the data line DL. The source or drain electrode of the scan transistor ST can be electrically connected to the second node N2 of the drive transistor DT. The gate electrode of the scan transistor ST can be electrically connected to the scan line SCL. The scan transistor ST can be connected between the data line DL and the second node N2 of the drive transistor DT.

[0069] The storage capacitor Cst can be electrically connected between the first node N1 and the second node N2 of the drive transistor DT. The storage capacitor Cst may be electrically connected to the first node N1 of the drive transistor DT, or may include a first capacitor electrode corresponding to the first node N1 of the drive transistor DT, and a second capacitor electrode electrically connected to the second node N2 of the drive transistor DT, or corresponding to the second node N2 of the drive transistor DT.

[0070] The storage capacitor Cst may be an external capacitor designed outside the drive transistor DT, rather than a parasitic capacitor (e.g., Cgs, Cgd) which is an internal capacitor that may exist between the first node N1 and the second node N2 of the drive transistor DT.

[0071] The drive transistor DT and the scan transistor ST can each be either an n-type or p-type transistor.

[0072] The display panel 110 may have a top-emission structure or a bottom-emission structure.

[0073] When the display panel 110 has a top emission structure, at least a portion of the subpixel circuit SPC can be superimposed on at least a portion of the light-emitting element ED in the vertical direction. This allows the area of ​​the light-emitting region to be increased and the aperture ratio to be increased.

[0074] If the display panel 110 has a bottom-emission structure, the subpixel circuit SPC may not overlap with the light-emitting element ED in the vertical direction.

[0075] The subpixel circuit SPC may have a 2T (Transistor) 1C (Capacitor) structure, as shown in Figure 1, including two transistors DT and ST and one capacitor Cst, and may optionally include one or more transistors or one or more capacitors.

[0076] For example, a subpixel circuit SPC may have an 8T1C structure comprising eight transistors and one capacitor. In another example, a subpixel circuit SPC may have a 6T2C structure comprising six transistors and two capacitors. In yet another example, a subpixel circuit SPC may have a 7T1C structure comprising seven transistors and one capacitor. Embodiments of this disclosure are not limited thereto. For example, a subpixel circuit SPC may be embodied in a subpixel to which 3T1C, 4T1C, 5T1C, 3T2C, 4T2C, 5T2C, 6T2C, 7T2C, 8T2C, etc., are applied.

[0077] The structure of the subpixel circuit SPC can affect the type and number of signal lines supplied to the subpixel SP. Furthermore, the structure of the subpixel circuit SPC can affect the type and number of common drive voltages supplied to the subpixel SP.

[0078] For example, some types of signal lines may include multiple data lines DL that transmit data signals (also called data voltages or video signals) and multiple gate lines GL that transmit gate signals (also called scan signals).

[0079] For example, multiple data lines DL and multiple gate lines GL can intersect each other. Each of the multiple data lines DL can be arranged extending in a first direction, and each of the multiple gate lines GL can be arranged extending in a second direction. The first direction may be the column direction, and the second direction may be the row direction. Alternatively, the first direction may be the row direction, and the second direction may be the column direction. For the sake of explanation, in the following examples, we will assume that the first direction is the column direction and the second direction is the row direction. Therefore, we will take the example that each of the multiple data lines DL is arranged in the column direction and each of the multiple gate lines GL is arranged in the row direction, but embodiments of this disclosure are not limited thereto.

[0080] The data drive circuit 120 is a circuit for driving multiple data lines DL and can output data signals to multiple data lines DL.

[0081] The data drive circuit 120 receives digital video data DATA from the controller 140, converts the received video data DATA into an analog data signal, and outputs it to multiple data lines DL.

[0082] For example, the data drive circuit 120 may be electrically connected to the display panel 110 by a tape automated bonding (TAB) method, or electrically connected to the bonding pad of the display panel 110 by a chip-on-glass (COG) or chip-on-panel (COP) method, or implemented by a chip-on-film (COF) method, but is not limited to these.

[0083] The data drive circuit 120 may be connected to one side of the display panel 110 (for example, the top or bottom). Alternatively, depending on the drive method, panel design method, etc., the data drive circuit 120 may be connected to both sides of the display panel 110 (for example, the top and bottom), or to two or more of the four sides of the display panel 110.

[0084] The data drive circuit 120 may be connected to the outer casing of the display area DA of the display panel 110, but in another example, it may be located in the display area DA of the display panel 110.

[0085] The gate drive circuit 130 is a circuit for driving multiple gate lines GL and can output gate signals to multiple gate lines GL.

[0086] The gate drive circuit 130 is supplied with various gate drive control signals GCS, a first gate voltage corresponding to the turn-on level voltage, and a second gate voltage corresponding to the turn-off level voltage, and generates a gate signal. The generated gate signal can then be supplied to multiple gate lines GL. The gate drive circuit 130 can supply the gate signal to multiple gate lines GL according to the timing control of the controller 140.

[0087] For example, the gate drive circuit 130 may be electrically connected to the display panel 110 by a tape automated bonding (TAB) method, or electrically connected to the bonding pad of the display panel 110 by a chip-on-glass (COG) or chip-on-panel (COP) method, or implemented by a chip-on-film (COF) method, but is not limited to these.

[0088] In the display device 100 according to the embodiment of this disclosure, the gate drive circuit 130 is of the gate-in-panel (GIP) type and can be built into the display panel 110. When the gate drive circuit 130 is of the gate-in-panel type, the gate drive circuit 130 can be formed on the substrate 111 of the display panel 110 during the manufacturing process of the display panel 110.

[0089] For example, the gate drive circuit 130 can be placed in the non-display area (NDA) of the display panel 110. In examples implemented using chip-on-glass (COG) or chip-on-panel (COP) technologies, the gate drive circuit 130 can be connected to the substrate 111.

[0090] As another example, the gate drive circuit 130 can be located in the display area DA of the display panel 110. In this case, for example, the gate drive circuit 130 may be located in a first partial area within the display area DA (for example, the left or right area within the display area DA). As yet another example, the gate drive circuit 130 may be located in a first partial area within the display area DA (for example, the left or right area within the display area DA) and a second partial area (for example, the right or left area within the display area DA).

[0091] In this disclosure, the gate drive circuit 130 built into the display panel 110 in a gate-in-panel type can be referred to as a "gate-in-panel circuit".

[0092] The controller 140 is a device for controlling the data drive circuit 120 and the gate drive circuit 130, and can control the drive timing for multiple data lines DL and the drive timing for multiple gate lines GL.

[0093] The controller 140 can supply a data drive control signal DCS to the data drive circuit 120 to control the data drive circuit 120, and can supply a gate drive control signal GCS to the gate drive circuit 130 to control the gate drive circuit 130.

[0094] The controller 140 can receive input video data from the host system 150 and supply video data DATA to the data drive circuit 120 based on the input video data.

[0095] The controller 140 can be implemented as a separate component from the data drive circuit 120, or it can be implemented as an integrated circuit by integrating it with the data drive circuit 120.

[0096] The controller 140 may be a timing controller used in display technology, a control device that can perform other control functions in addition to the timing controller, a control device different from the timing controller, or a circuit within the control device. The controller 140 can be implemented as various circuits or electronic components such as an IC (Integrated Circuit), FPGA (Field Programmable Gate Array), ASIC (Application Specific Integrated Circuit), or processor, and is not limited to these.

[0097] The controller 140 can be mounted on a printed circuit board, a flexible printed circuit board, etc., and can be electrically connected to the data drive circuit 120 and the gate drive circuit 130 via the printed circuit board, flexible printed circuit board, etc.

[0098] The controller 140 can send and receive signals with the data drive circuit 120 according to one or more predetermined interfaces. For example, the interface may include, but is not limited to, an LVDS (Low Voltage Differential Signaling) interface, an EPI (Embedded Clock Point-Point Interface), or an SPI (Serial Peripheral Interface).

[0099] The display device 100 according to the embodiments of this disclosure may include, in addition to a video display function, a touch sensor and a touch sensing circuit that senses the touch sensor to detect whether a touch has occurred by a touch object such as a finger or pen, or to detect the touch position, in order to further provide a touch sensing function.

[0100] A touch sensing circuit may include a touch drive circuit that drives and senses a touch sensor, generates and outputs touch sensing data, and a touch controller that can detect a touch or determine the touch position using the touch sensing data.

[0101] A touch sensor may include multiple touch electrodes. A touch sensor may further include multiple touch lines for electrically connecting the multiple touch electrodes to a touch drive circuit.

[0102] The touch sensor may be located outside the display panel 110 in the form of a touch panel, or it may be located inside the display panel 110. When the touch sensor is located outside the display panel 110 in the form of a touch panel, the touch sensor is called an external type. When the touch sensor is an external type, the touch panel and the display panel 110 can be manufactured separately and joined together during the assembly process. An external type touch panel may include a substrate for the touch panel and multiple touch electrodes on the substrate.

[0103] If the touch sensor is located inside the display panel 110, it may be formed on the substrate during the manufacturing process of the display panel 110, along with signal lines and electrodes related to display driving.

[0104] The touch drive circuit can supply a touch drive signal to at least one of multiple touch electrodes, sense at least one of the multiple touch electrodes, and generate touch sensing data.

[0105] The touch sensing circuit can perform touch sensing using either a self-capacitance sensing method or a mutual-capacitance sensing method.

[0106] When a touch sensing circuit performs touch sensing using a self-capacitance sensing method, the touch sensing circuit can perform touch sensing based on the capacitance between each touch electrode and the touch object (e.g., finger, pen, etc.). According to the self-capacitance sensing method, each of the multiple touch electrodes can act as both a driving touch electrode and a sensing touch electrode. The touch driving circuit can drive all or some of the multiple touch electrodes and sense all or some of the multiple touch electrodes.

[0107] When a touch sensing circuit performs touch sensing using a mutual capacitance sensing method, the touch sensing circuit can perform touch sensing based on the capacitance between touch electrodes. According to the mutual capacitance sensing method, multiple touch electrodes are divided into driving touch electrodes and sensing touch electrodes. The touch driving circuit can drive the driving touch electrodes and sense the sensing touch electrodes.

[0108] The touch driving circuit and the touch controller included in the touch sensing circuit may be implemented in separate devices or in a single device. Furthermore, the touch driving circuit and the data driving circuit may be implemented in separate devices or in a single device.

[0109] The display device 100 may further include a power supply circuit that supplies various power sources to the display driving circuit and / or touch sensing circuit.

[0110] The display device 100 according to the embodiments of this disclosure may be a mobile device such as a smartphone or tablet, or it may be a monitor or television (TV) of various sizes, but is not limited thereto, and may be any type or size of display capable of displaying information or images.

[0111] The display device 100 according to the embodiments of this disclosure may further include electronic devices such as a camera (image sensor) and a sensing sensor. For example, the sensing sensor may be a sensor that receives light such as infrared rays, ultrasonic waves, or ultraviolet rays to sense an object or a human body.

[0112] Figure 2 is an exemplary plan view of the display device 100 according to an embodiment of the present disclosure. Content in the following description that is the same as or similar to that described with reference to Figure 1 will be omitted or briefly described.

[0113] Referring to Figure 2, the second non-display area NDA2 may include a bending area BA and a pad area PA. The bending area BA may be located on one side of the display area DA, and the pad area PA may be located on the same side as the bending area BA. The bending area BA is the area where the substrate 111 is bent, and can be located between the pad area PA and the display area DA. The area between the pad area PA and the display area DA where various connection wirings and power lines are located can be called the link area.

[0114] The pad area PA can accommodate pads that are electrically connected to various signal lines and data drive circuits. The pad area PA can also accommodate pads for applying external signals to the panel, such as probe pads for lighting inspection and pads for adhesion.

[0115] A power line can be a low-voltage line that transmits low voltage, a high-voltage line that transmits high voltage, or an initialization voltage line that transmits initialization voltage.

[0116] The power lines may include a first power line 210 and a second power line 220. For example, the first power line 210 may include a second common drive voltage line VSSL or a first common drive voltage line VDDL, and the second power line 220 may include a first common drive voltage line VDDL or a second common drive voltage line VSSL. As another example, the first power line 210 may include one of a low voltage line, a high voltage line, and an initialization voltage line, and the second power line 220 may include a voltage line different from the first power line 210 among the low voltage line, the high voltage line, and the initialization voltage line. For example, the first power line 210 may include a low voltage line, and the second power line 220 may include one of a high voltage line and an initialization voltage line.

[0117] In embodiments of the present disclosure, for convenience of explanation, the first power line 210 is described as including a second common drive voltage line VSSL, and the second power line 220 is described as including a first common drive voltage line VDDL.

[0118] The first power line 210 is for supplying a low voltage to the common electrode CE, and a portion of it may be located in a second non-display area NDA2 formed below the display area DA.

[0119] The second power line 220 is for supplying a higher voltage than the low voltage, and a portion of it can be placed alongside the first power line 210 in the second non-display area NDA2. That is, the first power line 210 and the second power line 220 can be placed facing each other but separated.

[0120] Figure 3 is an exemplary cross-sectional view of the display device 100 according to an embodiment of the present disclosure, cut along line A and B in Figure 2. Content in the following description that is the same as or similar to that described with reference to Figures 1 and 2 will be omitted or briefly described.

[0121] Referring to Figure 3, the display panel 110 according to the embodiment of the present disclosure may include a transistor formation section, a light-emitting element formation section, and a sealing section from the viewpoint of the vertical structure.

[0122] The substrate 111 may be single-layer or multilayer. If the substrate 111 is multilayer, it may include a first substrate 301, a substrate intermediate layer 302, and a second substrate 303. The substrate intermediate layer 302 may be located between the first substrate 301 and the second substrate 303. For example, the substrate intermediate layer 302 may be placed on the first substrate 301. The second substrate 303 may be placed on top of the substrate intermediate layer 302. For example, each of the first substrate 301 and the second substrate 303 may be a polyimide (PI) layer. The substrate intermediate layer 302 may be an inorganic insulating layer. The substrate intermediate layer 302 can block the charge from affecting the transistor located on the second substrate 303 via the polyimide layer of the second substrate 303 when the first substrate 301, which is a polyimide layer, is charged.

[0123] Furthermore, the substrate intermediate layer 302 can block moisture components from penetrating the first substrate 301 and permeating to the upper layer. For example, the substrate intermediate layer 302 may consist of a single layer or multiple layers of silicon nitride (SiNx) or silicon oxide (SiOx), or it may be formed from a bilayer of silicon dioxide (SiO2) and silicon nitride (SiNx), but is not limited to these.

[0124] The transistor formation section may include a substrate 111, various insulating layers 311, 312, 313, 321, 322, 323 on the substrate 111, various transistors TFT1, TFT2, storage capacitor Cst, and various electrodes or signal wiring.

[0125] The transistors TFT1 and TFT2 included in the transistor formation section may include a first transistor TFT1 and a second transistor TFT2.

[0126] The first transistor TFT1 may include a first active layer ACT1, a first electrode E1a, a second electrode E1b, and a third electrode E1c. The first active layer ACT1 may be a first semiconductor layer, and embodiments of the disclosure are not limited thereto. For example, the first active layer ACT1 may be composed of an oxide semiconductor, amorphous silicon, polysilicon, or low-temperature polysilicon (LTPS), but embodiments of the disclosure are not limited thereto. The first transistor TFT1 may be implemented as a p-channel transistor or an n-channel transistor, but embodiments of the disclosure are not limited thereto.

[0127] The first electrode E1a is a gate electrode, the second electrode E1b is a source electrode or drain electrode, and the third electrode E1c may be a drain electrode or source electrode. For the sake of explanation, in the following, the first electrode E1a is the first gate electrode E1a, the second electrode E1b is the first source electrode E1b, and the third electrode E1c is the first drain electrode E1c. However, embodiments of the present disclosure are not limited thereto.

[0128] The second transistor TFT2 may include a second active layer ACT2, a fourth electrode E2a, a fifth electrode E2b, and a sixth electrode E2c. The second active layer ACT2 may be a second semiconductor layer, and embodiments of the disclosure are not limited thereto. For example, the second active layer ACT2 may be composed of an oxide semiconductor, amorphous silicon, polysilicon, or low-temperature polysilicon (LTPS), but embodiments of the disclosure are not limited thereto. The second transistor TFT2 may be implemented as a p-channel transistor or an n-channel transistor, but embodiments of the disclosure are not limited thereto.

[0129] For example, one of the first transistor TFT1 and the second transistor TFT2 can be configured with an oxide semiconductor as the active layer. In another example, one of the first transistor TFT1 and the second transistor TFT2 can be configured with low-temperature polysilicon as the active layer. In yet another example, the first transistor TFT1 and the second transistor TFT2 can be configured with an oxide semiconductor as the active layer. In yet another example, the first transistor TFT1 and the second transistor TFT2 can be configured with low-temperature polysilicon as the active layer. In yet another example, of the first transistor TFT1 and the second transistor TFT2, the driving transistor DT can be configured with an oxide semiconductor as the active layer, and the scanning transistor ST can be configured with low-temperature polysilicon as the active layer. In yet another example, of the first transistor TFT1 and the second transistor TFT2, the driving transistor DT can be configured with low-temperature polysilicon as the active layer, and the scanning transistor ST can be configured with an oxide semiconductor as the active layer. In yet another example, the transistors included in the gate-in-panel (GIP) type gate drive circuit 130 can be configured with an oxide semiconductor or low-temperature polysilicon as the active layer. In yet another example, all transistors configured on the substrate 111 and the transistors included in the gate-in-panel (GIP) type gate drive circuit 130 can be configured with an oxide semiconductor as the active layer.

[0130] The fourth electrode E2a is a gate electrode, the fifth electrode E2b is a source electrode or drain electrode, and the sixth electrode E2c may be a drain electrode or source electrode. For the sake of explanation, in the following, the fourth electrode E2a is assumed to be the second gate electrode E2a, the fifth electrode E2b is assumed to be the second source electrode E2b, and the sixth electrode E2c is assumed to be the second drain electrode E2c. However, embodiments of the present disclosure are not limited thereto.

[0131] The second active layer ACT2 of the second transistor TFT2 may be positioned higher from the substrate 111 than the first active layer ACT1 of the first transistor TFT1. The second gate electrode E2a of the second transistor TFT2 may be positioned higher from the substrate 111 than the first gate electrode E1a of the first transistor TFT1.

[0132] A first buffer layer 311 may be located beneath the first active layer ACT1 of the first transistor TFT1, and a second buffer layer 321 may be located beneath the second active layer ACT2 of the second transistor TFT2. For example, the first active layer ACT1 of the first transistor TFT1 may be located on the first buffer layer 311, and the second active layer ACT2 of the second transistor TFT2 may be located on the second buffer layer 321. The second buffer layer 321 may be located higher than the first buffer layer 311.

[0133] The storage capacitor Cst can be placed within various metal layers in the display panel 110. For example, the storage capacitor Cst may include a first capacitor electrode CAPE1 and a second capacitor electrode CAPE2.

[0134] The light-emitting element forming section may include a plurality of light-emitting elements ED arranged on at least one planarization layer 331, 332. Each of the plurality of light-emitting elements ED may include a pixel electrode PE, an intermediate layer EL, and a common electrode CE.

[0135] The sealing portion may include sealing layers 340 on multiple light-emitting elements ED. The sealing layers 340 may be single-layer or multi-layer. In addition to the sealing layers 340, the sealing portion may further include a dam structure.

[0136] The sealing layer 340 may, but is not limited to, include a plurality of sealing layers, each comprising at least one inorganic sealing layer and at least one organic sealing layer. For example, the sealing layer 340 may have a structure in which at least one organic sealing layer is placed between two inorganic sealing layers. The uppermost layer of the sealing layer 340 may be an inorganic sealing layer. For example, the top and sides of an organic sealing layer may be covered with an inorganic sealing layer.

[0137] The inorganic encapsulation layer may include inorganic insulating materials. For example, the inorganic encapsulation layer may include inorganic insulating materials that can be deposited at low temperatures, such as silicon nitride (SiN), silicon oxide (SiO), silicon oxynitride (SiON), and aluminum oxide (Al2O3).

[0138] The organic encapsulation layer may include organic insulating materials such as acrylic resin, epoxy resin, polyimide, polyethylene, and silicon oxycarbide (SiOC).

[0139] The vertical structure of the display panel 110 according to the embodiment of this disclosure will be described in more detail below with reference to Figure 3.

[0140] Referring to Figure 3, the first buffer layer 311 can be placed on the substrate 111. The first buffer layer 311 may be single-layer or multi-layer. If the first buffer layer 311 is multi-layer, it may include a multi-buffer layer 311a and an active buffer layer 311b.

[0141] Various transistors, storage capacitors, and various electrodes or signal wiring can be formed on the first buffer layer 311. For example, transistors formed on the first buffer layer 311 can be made of the same material and located on the same layer. Alternatively, transistors formed on the first buffer layer 311 can be made of different materials and located on different layers.

[0142] The first active layer ACT1 of the first transistor TFT1 may be located on the first buffer layer 311. The first active layer ACT1 may include a channel region where a channel is formed, a source connection region on one side of the channel region, and a drain connection region on the other side of the channel region. The first active layer ACT1 may refer to the active layer of a transistor, or it may refer to a semiconductor layer formed of the same material. Therefore, the first active layer ACT1 may constitute a transistor, or it may constitute other circuit elements and signal lines.

[0143] The first gate insulating layer 312 can be placed on the first active layer ACT1 of the first transistor TFT1. The second gate insulating layer 322 may consist of a single layer or multiple layers of silicon nitride (SiNx) or silicon oxide (SiOx), and is not limited to these.

[0144] The first gate electrode E1a of the first transistor TFT1 may be located on the first gate insulating layer 312. The first gate electrode E1a can refer to the gate electrode of a transistor, or it can refer to a metal layer formed of the same material. Thus, the first gate electrode E1a may constitute a transistor, or it may constitute other circuit elements and signal lines. The first gate electrode E1a may contain a conductive material. For example, the first gate electrode E1a may contain, but is not limited to, a single or multilayer of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), and tungsten (W), or an alloy thereof. For example, the first gate electrode E1a may consist of a Mo / Ti bilayer.

[0145] The first interlayer insulating layer 313 can be placed on the first gate electrode E1a of the first transistor TFT1. The first interlayer insulating layer 313 may consist of a single layer or multiple layers of silicon nitride (SiNx) or silicon oxide (SiOx), and is not limited thereto.

[0146] A second buffer layer 321 can be placed on the first interlayer insulating layer 313. The second buffer layer 321 may consist of a single layer or multiple layers of silicon nitride (SiNx) or silicon oxide (SiOx), and is not limited to these.

[0147] The second active layer ACT2 of the second transistor TFT2 can be placed on the second buffer layer 321. The second active layer ACT2 may include a channel region where a channel is formed, a source connection region on one side of the channel region, and a drain connection region on the other side of the channel region. The second active layer ACT2 may refer to the active layer of a transistor, or it may refer to a semiconductor layer formed of the same material. Therefore, the second active layer ACT2 may constitute a transistor, or it may constitute other circuit elements and signal lines.

[0148] The second gate insulating layer 322 may be located on the second active layer ACT2 of the second transistor TFT2. The second gate insulating layer 322 may consist of a single layer or multiple layers of silicon nitride (SiNx) or silicon oxide (SiOx), and is not limited to these.

[0149] A second gate electrode E2a of a second transistor TFT2 can be provided. The second gate electrode E2a can refer to the gate electrode of a transistor, or it can refer to a metal layer formed of the same material. Thus, the second gate electrode E2a may constitute a transistor, or it may constitute other circuit elements and signal lines. The second gate electrode E2a may contain a conductive material. For example, the second gate electrode E2a may contain, but is not limited to, one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), and tungsten (W), or an alloy thereof, as a single or multilayer. For example, the second gate electrode E2a may consist of a Mo / Ti bilayer.

[0150] The second interlayer insulating layer 323 can be placed on the second gate electrode E2a of the second transistor TFT2. The second interlayer insulating layer 323 may consist of a single layer or multiple layers of silicon nitride (SiNx) or silicon oxide (SiOx), and is not limited thereto.

[0151] The first source electrode E1b and first drain electrode E1c of the first transistor TFT1, and the second source electrode E2b and second drain electrode E2c of the second transistor TFT2 can be arranged on the same layer.

[0152] The first source electrode E1b and first drain electrode E1c of the first transistor TFT1, and the second source electrode E2b and second drain electrode E2c of the second transistor TFT2 can be arranged on the second interlayer insulating layer 323.

[0153] The first source electrode E1b and first drain electrode E1c of the first transistor TFT1 can be electrically connected to the source connection region and drain connection region of the first active layer ACT1, respectively. The second source electrode E2b and second drain electrode E2c of the second transistor TFT2 can be electrically connected to the source connection region and drain connection region of the second active layer ACT2, respectively.

[0154] The first source electrode E1b and the first drain electrode E1c of the first transistor TFT1 can be electrically connected to the source connection region and drain connection region of the first active layer ACT1, respectively, through the holes in the second interlayer insulating layer 323, the second gate insulating layer 322, the second buffer layer 321, the first interlayer insulating layer 313, and the first gate insulating layer 312.

[0155] The second source electrode E2b and second drain electrode E2c of the second transistor TFT2 can be electrically connected to the source connection region and drain connection region of the second active layer ACT2, respectively, through holes in the second interlayer insulating layer 323 and the second gate insulating layer 322.

[0156] The first source electrode E1b and first drain electrode E1c of the first transistor TFT1, and the second source electrode E2b and second drain electrode E2c of the second transistor TFT2, may include a first metal and be arranged within a first metal layer. Here, the first metal and the first metal layer may be referred to as the first source-drain metal and the first source-drain metal layer, and can refer to a metal layer formed of the same material. Thus, the first source-drain electrodes E1b / E1c may constitute a transistor, or other circuit elements and signal lines. The first source-drain electrodes E1b / E1c may include a conductive material. For example, the first source-drain electrode E1b / E1c may, but may not be, comprise a single or multilayer of any one of the following: molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), and tungsten (W), or an alloy thereof. For example, the first source-drain electrode E1b / E1c may consist of a Ti / Al / Ti triple layer.

[0157] Referring to Figure 3, as an example, the storage capacitor Cst may be formed by a first capacitor electrode CAPE1 and a second capacitor electrode CAPE2. In some cases, the storage capacitor Cst may be formed by three or more capacitor electrodes, or in a configuration in which two or more capacitors are connected in parallel. For example, the first interlayer insulating layer 313 may be placed between the first capacitor electrode CAPE1 and the second capacitor electrode CAPE2.

[0158] The first capacitor electrode CAPE1 and the second capacitor electrode CAPE2 may each be placed on various metal layers arranged within the display panel 110.

[0159] For example, the first capacitor electrode CAPE1 may include the same first gate metal as the first gate electrode E1a of the first transistor TFT1 on the first gate insulating layer 312 and be located within the first gate metal layer.

[0160] For example, a second capacitor electrode CAPE2 may be placed on the first interlayer insulating layer 313.

[0161] The second source electrode E2b of the second transistor TFT2 may be electrically connected to the second capacitor electrode CAPE2 through the holes in the second interlayer insulating layer 323, the second gate insulating layer 322, and the second buffer layer 321.

[0162] For example, the first transistor TFT1 may be the scan transistor ST in Figure 1, and the second transistor TFT2 may be the drive transistor DT in Figure 1.

[0163] The transistor formation section may further include various metal layers MP1 and MP2. For example, the first metal layer MP1 may be disposed between the multi-buffer layer 311a and the active buffer layer 311b included in the first buffer layer 311. The second metal layer MP2 may contain the same first gate metal as the first gate electrode E1a of the first transistor TFT1 and be disposed within the first gate metal layer. The second metal layer MP2 may be disposed on the same layer as the first gate electrode E1a of the first transistor TFT1. The first metal layer MP1 may be a first metal pattern, and the second metal layer MP2 may be a second metal pattern, but embodiments of this disclosure are not limited thereto.

[0164] The first metal layer MP1 and the second metal layer MP2 may be placed in the display area DA or the second non-display area NDA2, respectively.

[0165] Referring to Figure 3, the transistor formation section may further include a first shielding metal BSM1 disposed on the substrate 111, superimposed on the first active layer ACT1 of the first transistor TFT1, and disposed beneath the first active layer ACT1 of the first transistor TFT1. For example, the first shielding metal BSM1 may be disposed between the substrate 111 and the first buffer layer 311, or between the multi-buffer layer 311a and the active buffer layer 311b.

[0166] The transistor formation section is arranged on the substrate 111 and superimposed on the second active layer ACT2 of the second transistor TFT2, and may further include a second shield metal BSM2 arranged beneath the second active layer ACT2 of the second transistor TFT2.

[0167] For example, the second shielding metal BSM2 can be placed in the metal layer between the first interlayer insulating layer 313 and the second buffer layer 321. The second shielding metal BSM2 can be placed in the same metal layer as the second capacitor electrode CAPE2. The first gate electrode E1a of the first transistor TFT1 can be placed in the same metal layer as the first capacitor electrode CAPE1.

[0168] As another example, the second shield metal BSM2 can be placed in the same first gate metal layer as the first gate electrode E1a of the first transistor TFT1.

[0169] At least one planarization layer can be placed on the first transistor TFT1 and the second transistor TFT2. An example in Figure 3 shows a case where two planarization layers 331 and 332 are placed on the first transistor TFT1 and the second transistor TFT2. In some cases, three or more planarization layers may be placed on the first transistor TFT1 and the second transistor TFT2, but embodiments of this disclosure are not limited thereto.

[0170] The two planarization layers (first and second planarization layers 331, 332) may contain organic insulating materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, unsaturated polyester resin, polyphenylene resin, polyphenylene sulfide resin, and benzocyclobutene.

[0171] Referring to Figure 3, the first planarization layer 331 can be placed on the first source electrode E1b and first drain electrode E1c of the first transistor TFT1, and on the second source electrode E2b and second drain electrode E2c of the second transistor TFT2. For example, the first planarization layer 331 can be placed so as to cover both the first transistor TFT1 and the second transistor TFT2. For example, the first planarization layer 331 can be configured to protect the first transistor TFT1 and the second transistor TFT2 and to planarize the step formed by the first transistor TFT1 and the second transistor TFT2.

[0172] Referring to Figure 3, the relay electrode RE can be placed on the first planarization layer 331. The relay electrode RE can be electrically connected to the second transistor TFT2. The second transistor TFT2 may be electrically connected to the storage capacitor Cst. The relay electrode RE can be electrically connected to the second source electrode E2b of the second transistor TFT2 through a hole in the first planarization layer 331. Here, the second source electrode E2b of the second transistor TFT2 may be electrically connected to the second capacitor electrode CAPE2 of the storage capacitor Cst.

[0173] The relay electrode RE can be placed within a second metal layer on the first planarization layer 331 and may contain a second metal. The second metal and the second metal layer may be referred to as the second source-drain metal and the second source-drain metal layer. The second source-drain electrodes E2b / E2c may refer to electrodes for electrically connecting the first source-drain electrodes E1b / E1c and the light-emitting element ED, and may refer to a metal layer formed of the same material. Thus, the second source-drain electrodes E2b / E2c may constitute electrodes for electrically connecting the transistor and the light-emitting element, or they may constitute other circuit elements and signal lines. The second source-drain electrodes E2b / E2c may contain a conductive material. For example, the second source-drain electrode E2b / E2c may, but may not, contain a single or multilayer of any one of the following: molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), and tungsten (W), or an alloy thereof. For example, the second source-drain electrode E2b / E2c may consist of a Ti / Al / Ti triple layer.

[0174] The second planarization layer 332 can be placed on the relay electrode RE. For example, the second planarization layer 332 can be placed so as to cover the relay electrode RE.

[0175] Referring to Figure 3, the light-emitting element forming section can be arranged on the second planarization layer 332. The light-emitting element ED can be formed on the second planarization layer 332. The light-emitting element ED may include a pixel electrode PE, an intermediate layer EL, and a common electrode CE. The intermediate layer EL may be arranged between the pixel electrode PE and the second and common electrodes CE. The light-emitting region of the light-emitting element ED can be formed in the region where the pixel electrode PE, the intermediate layer EL, and the common electrode CE are superimposed and in contact.

[0176] The pixel electrode PE can be placed on the second planarization layer 332, and the bank 333 can be placed on the pixel electrode PE. The opening of the bank 333 can expose a portion of the pixel electrode PE to form a light-emitting region. For example, the opening of the bank 333 can overlap with a portion of the pixel electrode PE. Alternatively, a spacer (334 in Figure 5) can be further placed on the bank 333.

[0177] Bank 333 can define subpixels SP. Therefore, Bank 333 can be formed of an insulating material containing black material. Bank 333 may consist of, for example, a mixture of transparent carbon series, and specifically may include carbon black. However, it is not limited to this, and Bank 333 may consist of a transparent insulating material.

[0178] The intermediate layer EL of the light-emitting element ED can be placed on a portion of the pixel electrode PE and on bank 333. The common electrode CE can be placed on the intermediate layer EL.

[0179] Referring to Figure 3, the sealing portion can be arranged on the light-emitting element forming portion and located on the common electrode CE. The sealing portion may include a sealing layer 340 formed on the common electrode CE.

[0180] The sealing layer 340 can prevent moisture and oxygen from penetrating the light-emitting element ED. For example, the sealing layer 340 can prevent moisture and oxygen from penetrating the organic matter contained in the intermediate layer EL of the light-emitting element ED. Here, the sealing layer 340 may be composed of a single layer or a multilayer, but the embodiments of this disclosure are not limited thereto.

[0181] Referring to Figure 3, as an example, the sealing layer 340 may include a first sealing layer 341, a second sealing layer 342, and a third sealing layer 343. For example, the first sealing layer 341 and the third sealing layer 343 may include inorganic layers, and the second sealing layer 342 may include an organic layer. For example, the second sealing layer 342 may be placed between the first sealing layer 341 and the third sealing layer 343.

[0182] The first sealing layer 341 and the third sealing layer 343 may include inorganic insulating materials that can be deposited at low temperatures, such as silicon nitride (SiN), silicon oxide (SiO), silicon oxynitride (SiON), and aluminum oxide (Al2O3). The second sealing layer 342 may include organic insulating materials such as acrylic resin, epoxy resin, polyimide, polyethylene, and silicon oxycarbide (SiOC).

[0183] The display panel 110 according to the embodiments of the present disclosure may also incorporate a touch sensor. In this case, the display panel 110 according to the embodiments of the present disclosure may include a touch sensor layer 350 formed on the sealing layer 340.

[0184] Referring to Figure 3, the touch sensor layer 350 may include a plurality of touch electrodes TE, and may include a sensor metal TSM and a bridge metal (BRG) to form the plurality of touch electrodes TE. In embodiments of this disclosure, the sensor metal TSM may also be called the sensor metal layer TSM, and the bridge metal BRG may also be called the bridge metal layer BRG.

[0185] The touch sensor layer 350 may further include insulating layers such as a sensor buffer layer 351 on the sealing layer 340, an inter-sensor layer insulating layer 352 on the sensor buffer layer 351, and a sensor protection layer 353 on the inter-sensor layer insulating layer 352. Here, the sensor buffer layer 351 may be omitted.

[0186] A bridge metal (BRG) may be placed between the sensor buffer layer 351 and the sensor interlayer insulating layer 352, and a sensor metal (TSM) may be placed between the sensor interlayer insulating layer 352 and the sensor protective layer 353.

[0187] Each of the multiple touch electrodes TE can be made from a sensor metal TSM. Each of the multiple touch electrodes TE may be a mesh-like electrode having multiple openings.

[0188] Multiple touch electrodes TE may include a first touch electrode TE1 and a second touch electrode TE2. The sensor metal TSM included in the first touch electrode TE1 may be electrically connected via a bridge metal BRG. That is, a single first touch electrode TE1 can be constructed by electrically connecting sensor metal TSMs spaced apart from each other via a bridge metal BRG. For example, the first touch electrode TE1 may include two sensor metal TSMs and a bridge metal BRG, with each spaced apart from the others being electrically connected to the bridge metal BRG. The sensor metal TSMs may be placed on a sensor interlayer insulating layer 352.

[0189] The bridge metal BRG can be placed on the sensor buffer layer 351, and the sensor interlayer insulating layer 352 can be placed on the bridge metal layer BRG. Specifically, the sensor interlayer insulating layer 352 can be placed on the bridge metal BRG and the sensor buffer layer 351. The sensor metal TSM can be placed on the sensor interlayer insulating layer 352. A portion of the sensor metal TSM can be electrically connected to the corresponding bridge metal BRG through holes in the sensor interlayer insulating layer 352.

[0190] Referring to Figure 3, the sensor metal TSM and bridge metal BRG can be arranged so as not to overlap with the light-emitting element ED. The sensor metal TSM and bridge metal BRG can overlap with bank 333.

[0191] Multiple sensor metal TSMs can constitute a single touch electrode TE, which can be arranged in a mesh and electrically connected. Parts of one sensor metal TSM and other parts of the sensor metal TSM can be electrically connected via a bridge metal BRG to constitute a single touch electrode TE.

[0192] The sensor protection layer 353 can be positioned to cover the sensor metal TSM and the bridge metal BRG. For example, the sensor protection layer 353 can be positioned on the sensor metal TSM, the bridge metal BRG, and a portion of the sensor layer insulating layer 352.

[0193] Referring to Figure 3, the touch line TL can electrically connect the touch electrode TE and the touch pad TP. The touch line TL can consist of at least one of the sensor metal TSM and the bridge metal BRG.

[0194] If the display panel 110 is of the type that incorporates a touch sensor, the touch line TL may extend along the outer inclined surface SLP_ENCAP of the sealing layer 340, beyond the top of the dam structure (e.g., outer dam structure DMO), to the touchpad in the non-display area NDA.

[0195] Figure 4 is an exemplary plan view of the display device 100 according to an embodiment of the present disclosure, showing an enlarged view of the SA region in Figure 2, and Figure 5 is an exemplary cross-sectional view of the display device 100 according to an embodiment of the present disclosure, cut along the CD line in Figure 4. Content in the following description that is the same as or similar to that described with reference to Figures 1 to 3 will be omitted or briefly explained.

[0196] Referring to Figures 4 and 5, the display device 100 may include a power line and a first moisture-proof structure MPS1. The SA region is the region located between the display region DA and the bending region BA, and is sometimes called the link region of the power supply.

[0197] The display device 100 may include a plurality of insulating layers 311, 312, 313, 321, 322, and 323 on the substrate 111. Each of the plurality of insulating layers 311, 312, 313, 321, 322, and 323 may be an inorganic insulating layer containing an inorganic insulating material.

[0198] The power lines may include a first power line 210 and a second power line 220. For example, the first power line 210 may include a second common drive voltage line VSSL or a first common drive voltage line VDDL, and the second power line 220 may include a first common drive voltage line VDDL or a second common drive voltage line VSSL.

[0199] For example, the first power line 210 and the second power line 220 may each include a first moisture-proof structure MPS1. The first moisture-proof structure MPS1 located on the first power line 210 and the first moisture-proof structure MPS1 located on the second power line 220 can be arranged side by side, facing each other, but spaced apart.

[0200] In embodiments of the present disclosure, for convenience of explanation, the first power line 210 is described as including a second common drive voltage line VSSL, and the second power line 220 is described as including a first common drive voltage line VDDL.

[0201] The first power line 210 is for supplying a low voltage to the common electrode CE, and a portion of it may be located in a second non-display area NDA2 formed below the display area DA. The first power line 210 may include a first source-drain metal layer and a second source-drain metal layer. For example, the first portion 211 and the third portion 213 of the first power line 210 may be formed of the first source-drain metal layer and the second source-drain metal layer, and the second portion 212 and the fourth portion 214 of the first power line 210 may be formed of the second source-drain metal layer.

[0202] The second power line 220 is for supplying a higher voltage than the low voltage, and a portion of it may be positioned alongside the first power line 210 in the second non-display area NDA2. That is, the first power line 210 and the second power line 220 may be positioned opposite each other but spaced apart. The second power line 220 may include a first source-drain metal layer and a second source-drain metal layer. For example, the first portion 221 and the third portion 223 of the second power line 220 may be formed of the first source-drain metal layer and the second source-drain metal layer, and the second portion 222 and the fourth portion 224 of the second power line 220 may be formed of the second source-drain metal layer.

[0203] For example, the second portion 212 of the first power line 210 and the second portion 222 of the second power line 220 may be spaced apart and facing each other, depending on the potential increase between low voltage and high voltage, and consist of a single structure of the second source-drain metal layer.

[0204] On the other hand, although not shown in Figure 4, the second portion 212 of the first power line 210 and the second portion 222 of the second power line 220 may be positioned so as to overlap at least part with the dam structure (DMO, see Figure 5).

[0205] The second non-display area NDA2 is an area located on the outer casing of the display device 100, and is located directly or in close proximity to the outside. As a result, it may be an area from which external moisture preferentially penetrates into the interior of the display device 100.

[0206] The first moisture-proof structure MPS1 is intended to form a long moisture permeability path for external moisture to penetrate, and can be placed in the second non-display area NDA2. For example, the first moisture-proof structure MPS1 can form a long moisture flow path that can enter on the power lines 210 and 220 that extend from the pad area PA to the display area DA. For example, the first moisture-proof structure MPS1 may be placed in the second non-display area NDA2 between the display area DA and the bending area BA. For example, the first power line 210 and the second power line 220 can each contain multiple first moisture-proof structures MPS1. Multiple first moisture-proof structures MPS1 placed on the first power line 210 and multiple first moisture-proof structures MPS1 placed on the second power line 220 can be placed side by side, facing each other, and spaced apart. Figure 4 shows that six first moisture-proof structures MPS1 are provided, but is not limited to this, and more may be provided. The first moisture-proof structure MPS1 may be included in greater or lesser quantities. As the number of the first moisture-proof structure MPS1 increases, the moisture permeability paths of the power lines 210, 220 may become longer.

[0207] The first moisture-proof structure MPS1 may include a first metal layer MTL1. For example, at least one of the first moisture-proof structures MPS1 may include a first metal layer MTL1. The first metal layer MTL1 may be placed on each power line 210, 220. The first metal layer MTL1 may contain the same material as the second portions 212, 222 of the power lines 210, 220. For example, the first metal layer MTL1 may be formed integrally with the second portions 212, 222 of the power lines 210, 220, or may be formed in a pattern on one side of the power lines 210, 220. The first metal layer MTL1 may contain the same material as the second source-drain metal layer. For example, the first metal layer MTL1 may contain the same material as the relay electrode RE. The first metal layer MTL1 may be placed on the same layer as the relay electrode RE. The first metal layer MTL1 may be formed from the same material and in the same process as the relay electrode RE.

[0208] For example, the first metal layer MTL1 may include, but is not limited to, a single or multilayer of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), and tungsten (W), or an alloy thereof. For example, the first metal layer MTL1 may consist of a Ti / Al / Ti triple layer.

[0209] Multiple first moisture-proof structures MPS1 can be arranged, each projecting from one side of the power lines 210 and 220 at a distance from the other. By providing the first moisture-proof structures MPS1, which include the first metal layer MTL1, to the power lines 210 and 220 in this way, the moisture permeability paths of the power lines 210 and 220 can be lengthened, thereby improving moisture resistance.

[0210] The first moisture-proof structure MPS1 can be placed on the first power line 210 and the second power line 220, respectively. For example, the first moisture-proof structure MPS1 placed on the first power line 210 and the first moisture-proof structure MPS1 placed on the second power line 220 can be placed side by side, facing each other but spaced apart. The first moisture-proof structure MPS1 placed on the first power line 210 may be positioned to protrude towards the second power line 220, and the first moisture-proof structure MPS1 placed on the second power line 220 may be positioned to protrude towards the first power line 210.

[0211] The first moisture-proof structure MPS1 may include extensions and heads. For example, the first metal layer MTL1 included in the first moisture-proof structure MPS1 may include extensions and heads. The extensions may extend from a portion of the power lines 210, 220 and may be provided in multiples, spaced apart from each other. The heads may be located at the ends of each extension and may be formed to have a wider width than the extensions. In this way, since the width of the heads is formed to be greater than the width of the extensions, the first moisture-proof structure MPS1 may have a hammer-like pattern and be able to form longer paths for moisture to travel.

[0212] The dam structure DMO may be located in the link area of ​​the power supply unit where the first moisture-proof structure MPS1 is located. The dam structure DMO may be located outside the display area DA and is sometimes called the outer dam structure DMO. The dam structure DMO may also be located in the non-display area NDA.

[0213] The first moisture-proof structure MPS1 may include a first inner moisture-proof structure positioned between the display area DA and the dam structure DMO, and a first outer moisture-proof structure positioned between the outer dam structure DMO and the pad area PA.

[0214] Figure 6 is an exemplary plan view of the display device 100 according to an embodiment of the present disclosure, showing an enlarged view of the OA area in Figure 2, and Figure 7 is an exemplary cross-sectional view of the display device 100 according to an embodiment of the present disclosure, cut along the EF line in Figure 6. Content in the following description that is the same as or similar to that described with reference to Figures 1 to 5 will be omitted or briefly described.

[0215] Referring to Figures 6 and 7, the optical region OA can be placed within the display region DA. Subpixels SP can be placed around the optical region OA.

[0216] Referring to Figures 6 and 7, the optical area OA may include a camera hole CH and a first non-display area NDA1 surrounding the camera hole CH. The camera hole CH is sometimes called the open area. The first non-display area NDA1, located between the camera hole CH and the display area DA, is sometimes called the inner bezel area. The inner bezel area is sometimes called the "HiAA Bezel Area (HBA)".

[0217] The camera hole CH can be formed by removing the substrate along the trimming line. The shape of the camera hole CH may be circular as shown in Figure 6, but it may also have various shapes such as elliptical, square, hexagonal, or octagonal.

[0218] A dam structure DMI can be located in the HiAA bezel region HBA, which is the first non-display region NDA1. The dam structure DMI is located within the display region DA and may be referred to as the inner dam structure DMI. The dam structure DMI can refer to a structure for controlling the flow of one of a plurality of insulating layers included in the display device 100. For example, the dam structure DMI may be a structure for controlling the flow of an organic insulating layer located above a light-emitting element. More specifically, the insulating layer may be an organic film that is part of a sealing layer that seals a plurality of light-emitting elements. Figure 6 shows an embodiment in which there is one dam structure DMI in the first non-display region NDA1, but embodiments of the present disclosure are not limited thereto, and embodiments in which two or more dam structures are located in the first non-display region NDA1 are also included in embodiments of the present disclosure.

[0219] At least one second moisture-proof structure MPS2 may include a second internal moisture-proof structure IMPS2 located between the display area DA and the dam structure DMI, and a second external moisture-proof structure OMPS2 located between the dam structure DMI and the camera hole CH.

[0220] The dam structure DMI may have a structure in which multiple insulating layers are laminated. For example, the dam structure DMI may be formed by laminating a second flattening layer 332 and a bank 333.

[0221] The shape of the dam structure DMI may correspond to the shape of the camera hole CH, and may have the shape of a closed curve surrounding the camera hole CH. The dam structure DMI and the camera hole CH may have different closed curve shapes, or they may have the same shape but different sizes. For example, the dam structure DMI and the camera hole CH may have different shapes and different sizes of closed curves. As an example, the dam structure DMI and the camera hole CH may be concentric circles and arranged at regular intervals apart.

[0222] Referring to Figure 6, the second moisture-proof structure MPS2 can be located in the first non-display area NDA1. The second moisture-proof structure MPS2 can mean an area in which multiple second moisture-proof structures MPS2 are located. The second moisture-proof structure MPS2 is a structure for blocking external moisture from penetrating from the camera hole CH to the display area DA, and can refer to a structure for cutting the intermediate layer and / or cathode electrode of the light-emitting element to block the moisture penetration path.

[0223] The second moisture-proof structure MPS2 may include a second metal layer MTL2. The second metal layer MTL2 may contain the same material as the second source-drain metal layer. For example, the second metal layer MTL2 may contain the same material as the intermediate electrode RE. The second metal layer MTL2 may be placed on the same layer as the intermediate electrode RE. The second metal layer MTL2 may be formed from the same material and in the same process as the intermediate electrode RE.

[0224] The second metal layer MTL2 may include, but is not limited to, a single or multilayer of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), and tungsten (W), or an alloy thereof. For example, the second metal layer MTL2 may consist of a Ti / Al / Ti triple layer.

[0225] The second moisture-proof structure MPS2 may include a second internal moisture-proof structure IMPS2 and a second external moisture-proof structure OMPS2. The second internal moisture-proof structure IMPS2 may be located between the display area DA and the dam structure DMI. The second external moisture-proof structure OMPS2 may be located between the dam structure DMI and the camera hole CH. The cutting structure may include an internal cutting structure located in the internal cutting area ISTA and an external cutting structure located in the external cutting area OSTA.

[0226] The second moisture-proof structure MPS2 can have a closed circuit shape that surrounds the camera hole CH on a plane. For example, the second moisture-proof structure MPS2 can form an annular closed loop at a certain distance from the camera hole CH.

[0227] The shape of at least one second moisture-proof structure MPS2 can correspond to the shape of the camera hole CH. For example, the second moisture-proof structure MPS2 and the camera hole CH may have different closed curve shapes. For example, the second moisture-proof structure MPS2 and the camera hole CH may have the same shape but different closed curve shapes of different sizes. For example, the second moisture-proof structure MPS2 and the camera hole CH may have different shapes and different closed curve shapes of different sizes.

[0228] Referring to Figures 6 and 7, the subpixels SP located in the display area DA may include light-emitting elements. An intermediate layer EL containing a light-emitting layer may be located in the display area DA. If the light-emitting elements are organic light-emitting elements, such an intermediate layer EL may include at least one organic layer containing organic material. The intermediate layer EL may extend to at least a portion of the optical area OA. For example, the intermediate layer EL may extend to the boundary between the first non-display area NDA1 and the camera hole CH.

[0229] On the other hand, if moisture penetrates the intermediate EL layer, defects such as subpixel dark spots may occur. Moisture may penetrate the area where the camera hole CH is located, and through the intermediate EL layer placed in the first non-display area NDA1, the moisture may penetrate into the display area. In this case, the intermediate EL layers can be spaced apart to cut off the path of moisture penetration, and a second moisture-proof structure MPS2 can be provided to increase the spacing between the intermediate EL layer patterns, thereby blocking or reducing the penetration of external moisture into the display area DA.

[0230] Referring to Figure 7, in the second outer moisture-proofing structure OMPS2, a crack-preventing structure CSP can be placed at the outermost part adjacent to the camera hole CH. The crack-preventing structure CSP can prevent cracks that may occur at the cross-section of the camera hole CH from being transmitted to the display area DA. The crack-preventing structure CSP can be formed by placing metal layers CSP1 and CSP2 on the substrate 111 of the display panel 110. An organic insulating layer can be placed on the metal layers CSP1 and CSP2.

[0231] For example, the metal layers CSP1 and CSP2 may include a first layer CSP1 and a second layer CSP2 positioned on the first layer CSP1. For example, the second layer CSP2 may be positioned to cover the top surface of the first layer CSP1 and the sides of the first buffer layer 311, the first gate insulating layer 312, the first interlayer insulating layer 313, the second buffer layer 321, the second gate insulating layer 322, and the second interlayer insulating layer 323.

[0232] For example, a first layer CSP1 is formed from the same material as the first shield metal BSM1, and a second layer CSP2 containing the same material as the first source-drain metal can be formed by placing it in the space obtained by removing the first buffer layer 311, the first gate insulating layer 312, the first interlayer insulating layer 313, the second buffer layer 321, the second gate insulating layer 322, and the second interlayer insulating layer 323 within a plurality of inorganic insulating layers so as to overlap with the first layer CSP1. The second layer CSP2 and its surrounding region can be covered with an organic insulating layer including the first layer 331 formed from the first planarization layer 331 and / or the second layer 332 formed from the second planarization layer 332.

[0233] Multiple inorganic layers are removed so that the substrate 111 is exposed, and the area where the multiple inorganic layers have been removed is covered with a crack-preventing structure CSP formed of a metal layer and an organic insulating layer, so that cracks that occur in the open area can be absorbed by the crack-preventing structure CSP.

[0234] A crack prevention structure (CSP) can have a closed circuit shape that encloses an open region on a plane. For example, a crack prevention structure (CSP) can form an annular closed loop at a certain distance from the open region.

[0235] Figure 8 shows the phenomenon of shim formation in the metal layers MTL1 / MTL2 of a moisture-permeable structure. Content in the following explanation that is the same as or similar to that explained with reference to Figures 1 to 7 will be omitted or briefly explained.

[0236] Referring to Figure 8, after forming the metal layers MTL1 / MTL2, and then forming the planarization layer and bank (including spacers) in a subsequent process, the metal layers MTL1 / MTL2 are exposed to the developer and etched in a developing process to form bank undercuts. When the metal layers MTL1 / MTL2 are composed of a Ti / Al / Ti triple layer, due to the difference in etching rates of the metals constituting the metal layers MTL1 / MTL2 with respect to the developer, the aluminum (Al) located in the middle may be etched more than the titanium (Ti), resulting in the formation of aluminum voids. These voids can be formed by titanium (Ti) tips located above and below the aluminum (Al).

[0237] When forming a sealing layer (e.g., a first sealing layer 341) on top of the metal layers MTL1 / MTL2, the aluminum void prevents the first sealing layer 341 from completely covering the sides of the metal layers MTL1 / MTL2, and a recessed shim SE may be formed on the first sealing layer 341. In this process, the shim SE forms a pathway through which foreign substances such as moisture can penetrate, while also being easily damaged, such as by cracking. The penetrating moisture can cause corrosion of the metal layers MTL1 / MTL2 or cause malfunctions in the display device.

[0238] Figure 9 is an exemplary cross-sectional view of the first moisture-proof structure MPS1 and the second moisture-proof structure MPS2 according to embodiments of the present disclosure. Content in the following description that is the same as or similar to that described with reference to Figures 1 to 8 will be omitted or briefly described.

[0239] Referring to Figure 9, the first moisture-proof structure MPS1 and the second moisture-proof structure MPS2 can each include a first metal layer MTL1 and a second metal layer MTL2 arranged on a plurality of insulating layers.

[0240] Referring to Figure 9, the first moisture-proof structure MPS1 may include a first metal layer MTL1 placed on the second interlayer insulating layer 323. A first sealing layer 341 and a third sealing layer 343 can be placed on the first metal layer MTL1.

[0241] The first sealing layer 341 and the third sealing layer 343 can be arranged to cover the side and top surfaces of the first metal layer MTL1 and the top surface of the second interlayer insulating layer 323. The third sealing layer 343 can be arranged on top of the first sealing layer 341.

[0242] The first sealing layer 341 and the third sealing layer 343 can be arranged to cover the side and top surfaces of the first metal layer MTL1 of the first moisture-proof structure MPS1. Alternatively, the first sealing layer 341 and the third sealing layer 343 can be arranged to cover a portion of the side and a portion of the top surface of the second interlayer insulating layer 323.

[0243] The first metal layer MTL1 may have a bottom surface, a top surface, and an inclined surface extending from the bottom surface to the top surface. The inclined surface of the first metal layer MTL1 may be formed continuously from the bottom surface to the top surface with the same taper angle. For example, the width of the top surface of the first metal layer MTL1 may be smaller than the width of the bottom surface.

[0244] The first metal layer MTL1 may have a positive tapered vertical cross-sectional shape. For example, the first metal layer MTL1 may have a trapezoidal vertical cross-sectional shape in which the length of the top side is shorter than the length of the bottom side.

[0245] The first metal layer MTL1 can be composed of, for example, three layers. If the first metal layer MTL1 is a triple layer, it may include a first layer ML1, a second layer ML2 located on the first layer ML1, and a third layer ML3 located on the second layer ML2.

[0246] The first layer ML1, the second layer ML2, and the third layer ML3 may each have a positive tapered vertical cross-sectional shape. For example, the first layer ML1, the second layer ML2, and the third layer ML3 may each have a trapezoidal vertical cross-sectional shape in which the length of the top side is shorter than the length of the bottom side.

[0247] The width of the upper surface of the first layer ML1 may be smaller than the width of the lower surface of the first layer ML1. The width of the upper surface of the first layer ML1 may be substantially the same as the width of the lower surface of the second layer ML2. The width of the upper surface of the second layer ML2 may be smaller than the width of the lower surface of the second layer ML2. The width of the upper surface of the second layer ML2 may be substantially the same as the width of the lower surface of the third layer ML3. The width of the upper surface of the third layer ML3 may be smaller than the width of the lower surface of the third layer ML3. In this structure, the inclined surfaces of the first metal layer MTL1, which includes the first layer ML1, the second layer ML2, and the third layer ML3, can be formed continuously from the lower surface to the upper surface with the same taper angle.

[0248] The first metal layer MTL1 may be, for example, a second source-drain electrode.

[0249] The first layer ML1 and the third layer ML3 are metal layers of the same material, while the second layer ML2 may be a metal layer of a different material from the first layer ML1 and the third layer ML3. For example, the first layer ML1 and the third layer ML3 may contain titanium (Ti), and the second layer ML2 may contain aluminum (Al). For example, the first metal layer MTL1, which includes the first layer ML1, the second layer ML2, and the third layer ML3, may be a multilayer with a Ti / Al / Ti structure. By selecting such materials for the first to third layers ML1 to ML3, the second layer ML2 can be made of a material with better conductivity, and the first layer ML1 and the third layer ML3 can be made of materials that can protect the second layer ML2 during the manufacturing process.

[0250] The first metal layer MTL1 included in the first moisture-proof structure MPS1 may have a continuous positive tapered inclined surface. Having such a structure in the first metal layer MTL1 can prevent the formation of voids caused by titanium (Ti) tips. For example, in Figure 8, the phenomenon of aluminum void formation may occur. Such voids can be formed by titanium (Ti) tips located above / below the aluminum (Al). The embodiment shown in Figure 9 can prevent the formation of voids that may occur due to titanium (Ti) tips in the first metal layer MTL1.

[0251] Referring to Figure 9, the second moisture-proof structure MPS2 may include a first metal layer MTL1 placed on the second interlayer insulating layer 323. A first sealing layer 341 and a third sealing layer 343 may be placed on the first metal layer MTL1. The first sealing layer 341 and the third sealing layer 343 may be placed covering the sides and top of the second metal layer MTL2. The third sealing layer 343 may be placed on the first sealing layer 341.

[0252] Referring to Figure 9, the second moisture-proof structure MPS2 may include an undercut region UCA. The undercut region UCA may include a side pattern PS located on the substrate and beneath the light-emitting element. The side pattern PS can be formed by patterning an organic insulating layer. The inclusion of the side pattern PS in the undercut region UCA may mean that at least one organic insulating layer is etched to form the undercut region UCA. The organic insulating layer on which the undercut region UCA is formed may be, for example, one or more of the first planarization layer PLN1 and the second planarization layer PLN2. Figure 9 shows that the second moisture-proof structure MPS2 includes a single-layer side pattern PS, but embodiments of the present disclosure are not limited thereto. For example, embodiments of the present disclosure may include an embodiment in which the second moisture-proof structure MPL2 includes one or more of the first planarization layer PLN1 and the second planarization layer PLN2, and the undercut region UCA is formed on at least one of the first planarization layer PLN1 and the second planarization layer PLN2.

[0253] The second moisture-proof structure MPS2 may include at least one recessed region among a plurality of insulating layers. For example, the recessed region may be located in an inorganic insulating layer that is positioned on the substrate 111 and beneath the light-emitting element. The location of the recessed region in an inorganic insulating layer may mean that at least one of the inorganic insulating layers is etched to form the recessed region. The inorganic insulating layer may be an inorganic insulating layer that is positioned on the substrate 111 and beneath the light-emitting element. For example, the inorganic insulating layer may be one or more of the second interlayer insulating layer 323 and the second buffer layer 321 and an insulating layer located between the two layers. Figure 9 shows an embodiment in which a recessed region is included in a portion of the second interlayer insulating layer 323, but embodiments of the present disclosure are not limited thereto.

[0254] The side pattern PS and undercut region UCA formed by the organic insulating layer can be located within the recessed region. The undercut region UCA of the organic insulating layer can expose a portion of the inorganic insulating layer. For example, the undercut region UCA of the organic insulating layer can expose the second interlayer insulating layer 323, and the intermediate layer EL can be located on the exposed second interlayer insulating layer 323. The intermediate layer EL can be cut by the undercut region UCA. For example, a portion of the intermediate layer EL may be located on the exposed second interlayer insulating layer 323, and a portion of the side of the second interlayer insulating layer 323 may not be covered by the intermediate layer EL.

[0255] The second moisture-proof structure MPS2 may include a second metal layer MTL2 located on the undercut region UCA. The second metal layer MTL2 may be positioned to protrude beyond the side pattern PS. The intermediate layer EL may be cut below the second metal layer MTL.

[0256] The second metal layer MTL2 may have a bottom surface, a top surface, and an inclined surface extending from the bottom surface to the top surface. The inclined surface of the second metal layer MTL2 may be formed continuously from the bottom surface to the top surface with the same taper angle. For example, the width of the top surface of the second metal layer MTL2 may be smaller than the width of the bottom surface.

[0257] The second metal layer MTL2 may have a positive tapered vertical cross-sectional shape. For example, the second metal layer MTL2 may have a trapezoidal vertical cross-sectional shape in which the length of the top side is shorter than the length of the bottom side. The second metal layer MTL2 may also have the same shape as the first metal layer MTL1.

[0258] The second metal layer MTL2 can be composed of, for example, a triple layer. If the second metal layer MTL2 is a triple layer, it may include a fourth layer ML4, a fifth layer ML5 located on the fourth layer ML4, and a sixth layer ML6 located on the fifth layer ML5.

[0259] The fourth layer ML4, the fifth layer ML5, and the sixth layer ML6 may each have a positive tapered vertical cross-sectional shape. For example, the fourth layer ML4, the fifth layer ML5, and the sixth layer ML6 may each have a trapezoidal vertical cross-sectional shape in which the length of the top side is shorter than the length of the bottom side. For example, the fifth layer ML5 may be thicker than the sixth layer ML6 and the fourth layer ML4.

[0260] The width of the upper surface of the fourth layer ML4 may be smaller than the width of the lower surface of the fourth layer ML4. The width of the upper surface of the fourth layer ML4 may be substantially the same as the width of the lower surface of the fifth layer ML5. The width of the upper surface of the fifth layer ML5 may be smaller than the width of the lower surface of the fifth layer ML5. The width of the upper surface of the fifth layer ML5 may be substantially the same as the width of the lower surface of the sixth layer ML6. The width of the upper surface of the sixth layer ML6 may be smaller than the width of the lower surface of the sixth layer ML6. In this structure, the inclined surfaces of the second metal layer MTL2, including the fourth layer ML4, the fifth layer ML5, and the sixth layer ML6, can be formed continuously from the lower surface to the upper surface with the same taper angle.

[0261] The second metal layer MTL2 may be, for example, a second source-drain electrode.

[0262] The fourth layer ML4 and the sixth layer ML6 are metal layers of the same material, while the fifth layer ML5 may be a metal layer of a different material from the fourth layer ML4 and the sixth layer ML6. For example, the fourth layer ML4 and the sixth layer ML6 may contain titanium (Ti), and the fifth layer ML5 may contain aluminum (Al). For example, the second metal layer MTL2, which includes the fourth layer ML4, the fifth layer ML5, and the sixth layer ML6, may be a multilayer with a Ti / Al / Ti structure. By selecting such materials for the fourth to sixth layers ML6, the fifth layer ML5 can be made of a material with better conductivity, and the fourth layer ML4 and the sixth layer ML6 can be made of materials that can protect the fifth layer ML5 during the manufacturing process.

[0263] The second metal layer MTL2 included in the second moisture-proof structure MPS2 may have a continuous positive tapered inclined surface. Having such a structure in the second metal layer MTL2 can prevent the formation of voids caused by titanium (Ti) tips. For example, in Figure 8, the phenomenon of aluminum void formation may occur. Such voids can be formed by titanium (Ti) tips located above / below the aluminum (Al). The embodiment shown in Figure 9 can prevent the formation of voids that may occur due to titanium (Ti) tips in the second metal layer MTL2.

[0264] A first sealing layer 341 and a third sealing layer 343 can be formed on the intermediate layer EL and the common electrode CE.

[0265] Referring to Figure 9, in the region where the second moisture-proof structure MPS2 is located, the intermediate layer EL may have several parts. The intermediate layer EL may include a first part EL1, a second part EL2, and a third part EL3. As shown in the figure, the first part EL1, the second part EL2, and the third part EL3 of the intermediate layer EL can be separated from each other. It can also be said that the first part EL1, the second part EL2, and the third part EL3 of the intermediate layer EL are separated from each other.

[0266] Here, the first portion EL1 of the intermediate layer EL can be located on the sixth layer ML6 of the second metal layer MTL2. The second portion EL2 of the intermediate layer EL can be located on the inclined surface (e.g., the side surface) of the second metal layer MTL2. The fourth layer ML4, the fifth layer ML5, and the sixth layer ML6 of the second metal layer MTL2 can extend further in the first direction (e.g., the side direction) than a portion of the insulating film in order to form an undercut region UCA. For example, the fourth layer ML4, the fifth layer ML5, and the sixth layer ML6 of the second metal layer MTL2 can extend further than a portion of the insulating film, such as the second interlayer insulating layer 323, in order to form an undercut region UCA.

[0267] The third portion EL3 of the intermediate layer EL can be positioned adjacent to the undercut region UCA. For example, the third portion EL3 of the intermediate layer EL can be seated in a recessed region. For example, the third portion EL3 of the intermediate layer EL can be positioned on the second interlayer insulating layer 323 in the recessed region. The third portion EL3 of the intermediate layer EL is spaced apart from the second portion EL2 of the intermediate layer EL, and on a plane, the third portion EL3 and the second portion EL2 of the intermediate layer EL can overlap each other.

[0268] Furthermore, the common electrode CE may have several parts. The common electrode CE may include a first part CE1, a second part CE2, and a third part CE3. As shown in the figure, the first part CE1, the second part CE2, and the third part CE3 of the common electrode CE may be separated from each other. Alternatively, it can be said that the first part CE1, the second part CE2, and the third part CE3 of the common electrode CE are separated from each other.

[0269] Here, the first portion CE1 of the common electrode CE can be located on the sixth layer ML6 of the second metal layer MTL2. The second portion CE2 of the common electrode CE can be located on the second portion EL2 of the intermediate layer EL. The second portion CE2 of the common electrode CE can also be located on the inclined surface (e.g., side surface) of the second metal layer MTL2.

[0270] The third portion CE3 of the common electrode CE can be positioned adjacent to the undercut region UCA. For example, the third portion CE3 of the common electrode CE can be located on the third portion EL3 of the intermediate layer EL. The third portion CE3 of the common electrode CE is spaced apart from the second portion CE2 of the common electrode CE, and on a plane, the third portion CE3 and the second portion CE2 of the common electrode CE can superimpose on each other.

[0271] Figures 10 to 12 are illustrative diagrams showing the process for manufacturing the first moisture-proof structure MPS1 and the second moisture-proof structure MPS2 according to embodiments of the present disclosure. Content in the following description that is the same as or similar to that described with reference to Figures 1 to 9 will be omitted or briefly explained.

[0272] First, referring to Figure 10, a recessed region can be formed in the portion of the second interlayer insulating layer 323 of the optical region OA where the second moisture-permeable structure MPS2 is formed, and the first planarization layer 331a material can be formed so as to fill the recessed region.

[0273] After the first planarization layer 331a material is formed, the first metal layer MTL1 can be formed in the area where the first moisture-proof structure MPS1 is formed, and the second metal layer MTL2 can be formed in the area where the second moisture-proof structure MPS2 is formed, using the second source-drain electrode material.

[0274] For example, the first metal layer MTL1 and the second metal layer MTL2 can be formed in a Ti / Al / Ti multilayer structure.

[0275] Next, as shown in Figure 11, a second planarization layer 332a material can be formed using a mask so as to cover a portion of the side and top surfaces of the first metal layer MTL1 and the second metal layer MTL2.

[0276] Next, pixel electrodes PE and bank 333 defining light-emitting elements ED can be sequentially formed in the display area DA where subpixels SP are formed.

[0277] In this process, the pixel electrode material can be etched using an anode etching solution for forming the pixel electrode PE. However, due to the material of the second planarization layer 332a formed on the side surfaces and a part of the upper surfaces of the first metal layer MTL1 and the second metal layer MTL2, the first metal layer MTL1 and the second metal layer MTL2 may not be exposed to the anode etching solution. As a result, etching of the metals contained in the first metal layer MTL1 and the second metal layer MTL2, particularly aluminum (Al), can be prevented, and the phenomenon of forming aluminum voids can be avoided.

[0278] For example, the material of the second planarization layer 332a is formed so as to cover at least one side surface and a part of the upper surface of each of the first metal layer MTL1 and the second metal layer MTL2, protecting the first metal layer MTL1 and the second metal layer MTL2 and preventing the formation of aluminum voids.

[0279] Next, as shown in FIG. 12, the material of the second planarization layer 332a and the material of the first planarization layer 331a can be etched to form the first metal layer MTL1 structure and the second metal layer MTL2 structure.

[0280] FIG. 13 is another exemplary cross-sectional view of the first moisture barrier structure MPS1 and the second moisture barrier structure MPS2 according to an embodiment of the present disclosure. Among the following descriptions, the same or similar contents as those described with reference to FIGS. 1 to 10 will be omitted or briefly described.

[0281] The first moisture barrier structure MPS1 shown in FIG. 13 is substantially the same as the first moisture barrier structure MPS1 shown in FIG. 9, and thus a specific description thereof will be omitted.

[0282] The second moisture barrier structure MPS2 shown in FIG. 13 may have the same configuration as the second moisture barrier structure MPS2 shown in FIG. 9, except that the second gate insulating layer 322 is exposed in the recessed region. For example, in FIG. 9, the second moisture barrier structure MPS2 is not exposed, but in FIG. 13, the second moisture barrier structure MPS2 may be exposed.

[0283] Referring to Figure 13, the second moisture-proof structure MPS2 may include at least one recessed region among a plurality of insulating layers. For example, the recessed region may be formed by etching the second interlayer insulating layer 323 to expose a portion of the second gate insulating layer 322. The side pattern PS and the third portion EL3 of the intermediate layer EL may be positioned on the second gate insulating layer 322. The third portion CE3 of the common electrode CE may be positioned adjacent to the undercut region UCA. For example, the third portion CE3 of the common electrode CE may be located on the third portion EL3 of the intermediate layer EL.

[0284] Figure 14 is another exemplary cross-sectional view of a second moisture-proof structure MPS2 according to an embodiment of the present disclosure. Content in the following description that is the same as or similar to that described with reference to Figures 1 to 13 will be omitted or briefly described.

[0285] The second moisture-proof structure MPS2 shown in Figure 14 may have the same configuration as the second moisture-proof structure MPS2 shown in Figure 13, except that an auxiliary metal layer MLA is placed between the inorganic insulating films located in the undercut region UCA.

[0286] Referring to Figure 14, the second moisture-proof structure MPS2 may include an undercut region UCA or an auxiliary metal layer MLA located below it. Referring to Figure 14, the auxiliary metal layer MLA may be positioned between a plurality of insulating films located below the second metal layer MTL2. It may be positioned seated within the recessed region of the auxiliary metal layer MLA. For example, the auxiliary metal layer MLA may be positioned partially between the second gate insulating layer 322 and the second interlayer insulating layer 323 located below the second metal layer MTL2, and extending to seat within the recessed region. The side pattern PS may be positioned on a portion of the auxiliary metal layer MLA positioned within the recessed region. For example, the auxiliary metal layer MLA may be positioned on the second gate insulating layer 322. For example, the auxiliary metal layer MLA may be exposed by the undercut region UCA of the organic insulating layer, and an intermediate layer EL may be positioned on the exposed auxiliary metal layer MLA. For example, a common electrode CE may be positioned on the intermediate layer EL.

[0287] The auxiliary metal layer (MLA) may contain metallic materials. For example, the auxiliary metal layer (MLA) may contain, but is not limited to, a single or multilayer of any one of the following: molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), and tungsten (W), or an alloy thereof. The auxiliary metal layer (MLA) may contain the same material as the gate electrode material or shield metal. For example, the auxiliary metal layer (MLA) may consist of a Mo / Ti bilayer or a single layer of Mo.

[0288] The auxiliary metal layer MLA can prevent over-etching of some of the insulating layers located below during the etching process in which metallic materials such as pixel electrodes PE and metal layers MTL1 / MTL2 are patterned, or multiple insulating films are patterned to form recessed regions, in the process of forming the second moisture-proof structure MPS2. For example, in the embodiment shown in Figure 14, a portion of the second interlayer insulating layer 323 placed on the auxiliary metal layer MLA may be etched, and an undercut region UCA of the structure where the auxiliary metal layer MLA is not etched may be formed.

[0289] Referring to Figure 14, the third portion EL3 of the intermediate layer EL can be positioned adjacent to the undercut region UCA. For example, the third portion EL3 of the intermediate layer EL can be located below the second portion EL2 of the intermediate layer EL. For example, the third portion EL3 of the intermediate layer EL can be seated in a recessed region. The third portion EL3 of the intermediate layer EL may be positioned on an auxiliary metal layer MLA located within the recessed region. The third portion EL3 of the intermediate layer EL is spaced apart from the second portion EL2 of the intermediate layer EL, and on a plane, the third portion EL3 and the second portion EL2 of the intermediate layer EL can overlap each other.

[0290] Referring to Figure 14, the third portion CE3 of the common electrode CE can be positioned adjacent to the undercut region UCA. For example, the third portion CE3 of the common electrode CE may be positioned in the recessed region. For example, the third portion CE3 of the common electrode CE can be located on the third portion EL3 of the intermediate layer EL. The third portion CE3 of the common electrode CE is spaced apart from the second portion CE2 of the common electrode CE, and on a plane, the third portion CE3 and the second portion CE2 of the common electrode CE can overlap each other.

[0291] On the other hand, the second moisture-proof structure MPS2 shown in Figure 14 is different from the second moisture-proof structure MPS2 shown in Figure 13, but the first moisture-proof structure MPS1 may be substantially identical to the first moisture-proof structure MPS1 shown in Figure 13.

[0292] Figure 15 is another exemplary cross-sectional view of a second moisture-proof structure MPS2 according to an embodiment of the present disclosure. Content in the following description that is the same as or similar to that described with reference to Figures 1 to 14 will be omitted or briefly described.

[0293] The second moisture-proof structure MPS2 shown in Figure 15 may have the same configuration as the second moisture-proof structure MPS2 shown in Figure 13, except that an auxiliary metal layer MLA is placed between the inorganic insulating films located in the undercut region UCA.

[0294] Referring to Figure 15, the auxiliary metal layer MLA may be positioned between multiple insulating films located below the second metal layer MTL2. For example, a portion of the auxiliary metal layer MLA may be positioned between the second interlayer insulating layer 323 and the second gate insulating layer 322, both located below the second metal layer MTL2. Unlike the auxiliary metal layer MLA shown in Figure 14, the auxiliary metal layer MLA can be positioned between insulating films without seating in recessed regions. For example, during the etching process, the auxiliary metal layer MLA may be over-etched, with a portion of it being etched and removed. For instance, a portion of the auxiliary metal layer MLA within the recessed region may be etched and removed, while the remaining portion outside the recessed region does not need to be etched and removed. That is, the auxiliary metal layer MLA may not be positioned in the recessed region. The side pattern PS may be positioned on a portion of the second gate insulating layer 322 positioned within the recessed region. For example, the undercut region UCA of the organic insulating layer exposes the second gate insulating layer 322, and the intermediate layer EL can be positioned on the exposed second gate insulating layer 322.

[0295] Referring to Figure 15, the third portion EL3 of the intermediate layer EL can be positioned adjacent to the undercut region UCA. For example, the third portion EL3 of the intermediate layer EL can be located below the second portion EL2 of the intermediate layer EL. For example, the third portion EL3 of the intermediate layer EL can be seated in a recessed region. The third portion EL3 of the intermediate layer EL may be positioned on the second gate insulating layer 322 located within the recessed region. The third portion EL3 of the intermediate layer EL is spaced apart from the second portion EL2 of the intermediate layer EL, and on a plane, the third portion EL3 of the intermediate layer EL and the second portion EL2 of the intermediate layer EL can overlap each other.

[0296] The third portion CE3 of the common electrode CE can be positioned adjacent to the undercut region UCA. For example, the third portion CE3 of the common electrode CE can be located on the third portion EL3 of the intermediate layer EL. The third portion CE3 of the common electrode CE is spaced apart from the second portion CE2 of the common electrode CE, and on a plane, the third portion CE3 and the second portion CE2 of the common electrode CE can superimpose on each other.

[0297] On the other hand, the second moisture-proof structure MPS2 shown in Figure 15 is different from the second moisture-proof structure MPS2 shown in Figure 13, but the first moisture-proof structure MPS1 may be substantially identical to the first moisture-proof structure MPS1 shown in Figure 13.

[0298] Figure 16 is another exemplary cross-sectional view of the first moisture-proof structure MPS1 and the second moisture-proof structure MPS2 according to embodiments of the present disclosure. Content in the following description that is the same as or similar to that described with reference to Figures 1 to 15 will be omitted or briefly described.

[0299] The first moisture-proof structure MPS1 shown in Figure 16 may have the same configuration as the first moisture-proof structure MPS1 shown in Figure 9, except that it covers the side surface of the first metal layer MTL1 and has a protective layer PAS. For example, the protective layer PAS can be placed between the first metal layer MTL1 and the first sealing layer 341. Specifically, the protective layer PAS is placed so as to cover a part of the top surface and the side surface of the first metal layer MTL1.

[0300] The second moisture-proof structure MPS2 shown in Figure 16 may have the same configuration as the second moisture-proof structure MPS2 shown in Figure 9, except that it covers the side surface of the second metal layer MTL2 and has a protective layer PAS.

[0301] The protective layer PAS can be disposed on the first metal layer MTL1 and the second metal layer MTL2. Although not shown in FIG. 3, the protective layer PAS may cover the relay electrode RE and be disposed between the first planarization layer 331 and the second planarization layer 332. For example, the protective layer PAS can cover the second source-drain metal layer and be disposed between the first planarization layer 331 and the second planarization layer 332. The protective layer PAS can be composed of a single layer or multiple layers of silicon nitride (SiNx) or silicon oxide (SiOx), but is not limited thereto.

[0302] Referring to FIG. 16, the first moisture barrier structure MPS1 can include a first metal layer MTL1 disposed on the second interlayer insulating layer 323. The protective layer PAS can be disposed to cover the side surface of the first metal layer MTL1.

[0303] The protective layer PAS can be disposed to cover the side surface and a part of the upper surface of the first metal layer MTL1. The protective layer PAS can extend from the side surface of the first metal layer MTL1 and be disposed to cover a part of the side surface and a part of the upper surface of the second interlayer insulating layer 323.

[0304] By disposing the protective layer PAS to cover the side surface of the first metal layer MTL1, it is possible to prevent a partial layer (e.g., aluminum (Al)) of the first metal layer MTL1 from being etched during the process.

[0305] Referring to FIG. 16, the second moisture barrier structure MPS2 can include a second metal layer MTL2 disposed on the second interlayer insulating layer 323. The protective layer PAS can be disposed to cover the side surface of the second metal layer MTL2.

[0306] The protective layer PAS can be disposed to cover the side surface and a part of the upper surface of the second metal layer MTL2. The intermediate layer EL and the common electrode CE can be disposed on the protective layer PAS. For example, the intermediate layer EL and the common electrode CE may be disposed on the protective layer PAS and the second metal layer MTL2 exposed by the protective layer PAS.

[0307] By positioning the protective layer PAS to cover the sides of the second metal layer MTL2, it is possible to prevent etching of a portion of the second metal layer MTL2 (e.g., aluminum (Al)) during the process.

[0308] Referring to Figure 16, the third portion EL3 of the intermediate layer EL can be positioned adjacent to the undercut region UCA. For example, the third portion EL3 of the intermediate layer EL can be seated in the recessed region. The third portion EL3 of the intermediate layer EL is spaced apart from the second portion EL2 of the intermediate layer EL, and on a plane, the third portion EL3 and the second portion EL2 of the intermediate layer EL can overlap each other.

[0309] The third portion CE3 of the common electrode CE can be positioned adjacent to the undercut region UCA. For example, the third portion CE3 of the common electrode CE can be located on the third portion EL3 of the intermediate layer EL. For example, the third portion EL3 of the intermediate layer EL can be located on the second interlayer insulating layer 323. The third portion CE3 of the common electrode CE is spaced apart from the second portion CE2 of the common electrode CE, and on a plane, the third portion CE3 and the second portion CE2 of the common electrode CE can overlap each other.

[0310] Referring to Figure 16, the protective layer PAS can be superimposed on the second portion EL2 of the intermediate layer EL and the second portion CE2 of the common electrode CE on a plane. The protective layer PAS is separated from the third portion EL3 of the intermediate layer EL and the third portion CE3 of the common electrode CE, and can be superimposed on the third portion EL3 of the intermediate layer EL and the third portion CE3 of the common electrode CE on a plane.

[0311] Figures 17 to 22 are illustrative diagrams showing the process for manufacturing the first moisture-proof structure MPS1 and the second moisture-proof structure MPS2 according to embodiments of the present disclosure. Content in the following description that is the same as or similar to that described with reference to Figures 1 to 16 will be omitted or briefly described.

[0312] First, referring to Figure 17, a recessed region can be formed in the portion of the second interlayer insulating layer 323 of the optical region OA where the second moisture-permeable structure MPS2 is formed, and the first planarization layer 331a material can be formed so as to fill the recessed region.

[0313] After the first planarization layer 331a material is formed, the first metal layer MTL1 can be formed in the area where the first moisture-proof structure MPS1 is formed, and the second metal layer MTL2 can be formed in the area where the second moisture-proof structure MPS2 is formed, using the second source-drain electrode material.

[0314] For example, the first metal layer MTL1 and the second metal layer MTL2 can be formed in a Ti / Al / Ti multilayer structure.

[0315] Next, as shown in Figure 18, the protective layer PASa material can be deposited over the entire surface so that the entirety of the first metal layer MTL1 and the second metal layer MTL2 is covered. For example, the protective layer (PASa) material can be deposited to cover the top and side surfaces of the first metal layer MTL1 and the second metal layer MTL2.

[0316] Next, as shown in Figure 19, a second planarization layer 332a material can be formed on the protective layer PASa material using a mask so as to overlap with the sides and parts of the top surfaces of the first metal layer MTL1 and the second metal layer MTL2. For example, the second planarization layer (332a) material can be placed on parts of the top surface and sides of the protective layer (PASa) material.

[0317] Next, pixel electrodes PE and bank 333 defining light-emitting elements ED can be sequentially formed in the display area DA where subpixels SP are formed.

[0318] In this process, the pixel electrode material can be etched using an anode etching solution for forming the pixel electrode PE. However, due to the protective layer PASa material and the second planarization layer 332a material formed on the side and top surfaces of the first metal layer MTL1 and the second metal layer MTL2, the first metal layer MTL1 and the second metal layer MTL2 may not be exposed to the anode etching solution. This prevents etching of the metals contained in the first metal layer MTL1 and the second metal layer MTL2, particularly aluminum (Al), and prevents the formation of aluminum voids.

[0319] Next, as shown in Figure 20, the protective layer PASa material can be etched using the second planarization layer 332a material as a mask to pattern the protective layer PASa.

[0320] Next, as shown in Figure 21, the second planarization layer 332a material and the first planarization layer 331a material can be etched to form a structure with a protective layer PAS on the side and upper parts of the first metal layer MTL1 and the second metal layer MTL2.

[0321] Next, as shown in Figure 22, the intermediate layer EL, the common electrode CE, and the sealing layer 340 can be sequentially formed to create the first moisture-proof structure MPS1 and the second moisture-proof structure MPS2 according to the embodiment of this disclosure.

[0322] In this case, the first moisture-proof structure MPS1 is located in the second non-display area NDA2, which is located outside the display area DA, and the intermediate layer EL, common electrode CE, and second sealing layer 342 may not be placed on the first metal layer MTL1. Also, the second moisture-proof structure MPS2 is located in the optical area OA, which is inside the display area DA, and the second sealing layer 342 may not be placed on the second metal layer MTL2.

[0323] Figure 23 is another exemplary cross-sectional view of a second moisture-proof structure MPS2 according to an embodiment of the present disclosure. Content in the following description that is the same as or similar to that described with reference to Figures 1 to 22 will be omitted or briefly described.

[0324] The second moisture-proof structure MPS2 shown in Figure 23 may have the same configuration as the second moisture-proof structure MPS2 shown in Figure 16, except that the second gate insulating layer 322 is exposed in the recessed region.

[0325] Referring to Figure 23, the second moisture-proof structure MPS2 may include at least one recessed region among a plurality of insulating layers. For example, the recessed region may be formed by etching the second interlayer insulating layer 323, thereby exposing a portion of the second gate insulating layer 322. The side pattern PS and the third portion EL3 of the intermediate layer EL can be placed on the second gate insulating layer 322.

[0326] The protective layer PAS can be positioned to cover the sides of the second metal layer MTL2. The protective layer PAS can be positioned to cover the sides and part of the top surface of the second metal layer MTL2. The intermediate layer EL and the common electrode CE can be positioned on the protective layer PAS. The intermediate layer EL and the common electrode CE can be positioned on part of the top surface of the second metal layer MTL2 and on the top and sides of the protective layer PAS.

[0327] Referring to Figure 23, the protective layer PAS can be superimposed on the second portion EL2 of the intermediate layer EL and the second portion CE2 of the common electrode CE on a plane. The protective layer PAS is separated from the third portion EL3 of the intermediate layer EL and the third portion CE3 of the common electrode CE, and can be superimposed on the third portion EL3 of the intermediate layer EL and the third portion CE3 of the common electrode CE on a plane.

[0328] On the other hand, the second moisture-proof structure MPS2 shown in Figure 23 is different from the second moisture-proof structure MPS2 shown in Figure 16, but the first moisture-proof structure MPS1 may be substantially identical to the first moisture-proof structure MPS1 shown in Figure 16.

[0329] Figure 24 is another exemplary cross-sectional view of the second moisture-proof structure MPS2 according to an embodiment of the present disclosure. Content in the following description that is the same as or similar to that described with reference to Figures 1 to 23 will be omitted or briefly described.

[0330] The second moisture-proof structure MPS2 shown in Figure 24 may have the same configuration as the second moisture-proof structure MPS2 shown in Figure 23, except that an auxiliary metal layer MLA is placed between the inorganic insulating films located in the undercut region UCA. For example, the auxiliary metal layer MLA can be placed on the second gate insulating layer 322.

[0331] Referring to Figure 24, the second moisture-proof structure MPS2 may include an undercut region UCA or an auxiliary metal layer MLA located below it. Referring to Figure 24, the auxiliary metal layer MLA may be positioned between a plurality of insulating films located below the second metal layer MTL2. It can be positioned seated within a recessed region of the auxiliary metal layer MLA. For example, the auxiliary metal layer MLA may be positioned partially between the second gate insulating layer 322 and the second interlayer insulating layer 323 located below the second metal layer MTL2, and extending to seat within a recessed region. The side pattern PS may be positioned on a portion of the auxiliary metal layer MLA positioned within the recessed region. For example, the undercut region UCA of the organic insulating layer may expose the auxiliary metal layer MLA, and the intermediate layer EL may be positioned on the exposed auxiliary metal layer MLA.

[0332] The auxiliary metal layer MLA may contain the same metal material as the auxiliary metal layer MLA shown in Figure 14.

[0333] The auxiliary metal layer MLA can prevent over-etching of some of the insulating layers located underneath during the etching process in which metallic materials such as pixel electrodes PE and metal layers MTL1 / MTL2 are patterned, or multiple insulating films are patterned to form recessed regions, in the process of forming the second moisture-proof structure MPS2. For example, in the embodiment shown in Figure 24, a portion of the second interlayer insulating layer 323 placed on the auxiliary metal layer MLA is etched, and an undercut region UCA of the unetched structure can be formed on the auxiliary metal layer MLA.

[0334] Referring to Figure 24, the intermediate layer EL and the common electrode CE may have the same arrangement and configuration as shown in Figure 14.

[0335] Referring to Figure 24, the protective layer PAS can be superimposed on each other on a plane with respect to the second portion EL2 of the intermediate layer EL and the second portion CE2 of the common electrode CE. For example, the first portion EL1 of the intermediate layer EL and the first portion CE1 of the common electrode CE can be placed on the upper surface of the protective layer PAS, the second portion EL2 of the intermediate layer EL and the second portion CE2 of the common electrode CE can be placed on the side surface of the protective layer PAS, and the third portion CE3 of the intermediate layer EL3 and the third portion CE3 of the common electrode CE can be placed on the auxiliary metal layer MLA. The protective layer PAS is spaced apart from the third portion EL3 of the intermediate layer EL and the third portion CE3 of the common electrode CE, and can overlap each other on a plane with respect to the third portion EL3 of the intermediate layer EL and the third portion CE3 of the common electrode CE.

[0336] On the other hand, the second moisture-proof structure MPS2 shown in Figure 24 is different from the second moisture-proof structure MPS2 shown in Figure 16, but the first moisture-proof structure MPS1 may be substantially identical to the first moisture-proof structure MPS1 shown in Figure 16.

[0337] Figure 25 is another exemplary cross-sectional view of a second moisture-proof structure MPS2 according to an embodiment of the present disclosure. Content in the following description that is the same as or similar to that described with reference to Figures 1 to 24 will be omitted or briefly described.

[0338] The second moisture-proof structure MPS2 shown in Figure 25 may have the same configuration as the second moisture-proof structure MPS2 shown in Figure 23, except that an auxiliary metal layer MLA is placed between the inorganic insulating films located in the undercut region UCA.

[0339] Referring to Figure 25, the auxiliary metal layer MLA may be positioned between multiple insulating films located below the second metal layer MTL2. For example, a portion of the auxiliary metal layer MLA may be positioned between the second interlayer insulating layer 323, located below the second metal layer MTL2, and the second gate insulating layer 322. Unlike the auxiliary metal layer MLA shown in Figure 24, the auxiliary metal layer MLA can be positioned between insulating films without seating in recessed regions. For example, during the etching process, the auxiliary metal layer MLA may be over-etched, causing a portion of the auxiliary metal layer MLA to be etched and removed. For example, a portion of the auxiliary metal layer MLA within the recessed region may be etched away, while the remaining portion outside the recessed region is not etched away. That is, the auxiliary metal layer MLA may not be positioned in the recessed region. The side pattern PS may be positioned on a portion of the second gate insulating layer 322 positioned within the recessed region. For example, the undercut region UCA of the organic insulating layer exposes the second gate insulating layer 322, and the intermediate layer EL can be positioned on the exposed second gate insulating layer 322.

[0340] Referring to Figure 25, the intermediate layer EL and the common electrode CE may have the same arrangement and configuration as shown in Figure 15.

[0341] Referring to Figure 25, the protective layer PAS can be superimposed on each other on a plane with respect to the second portion EL2 of the intermediate layer EL and the second portion CE2 of the common electrode CE. For example, the first portion EL1 of the intermediate layer EL and the first portion CE1 of the common electrode CE can be placed on the upper surface of the protective layer PAS, the second portion EL2 of the intermediate layer EL and the second portion CE2 of the common electrode CE can be placed on the side surface of the protective layer PAS, and the third portion CE3 of the intermediate layer EL3 and the third portion CE3 of the common electrode CE can be placed on the second gate insulating layer 322. The protective layer PAS is spaced apart from the third portion EL3 of the intermediate layer EL and the third portion CE3 of the common electrode CE, and can overlap each other on a plane with respect to the third portion EL3 of the intermediate layer EL and the third portion CE3 of the common electrode CE.

[0342] On the other hand, the second moisture-proof structure MPS2 shown in Figure 25 is different from the second moisture-proof structure MPS2 shown in Figure 16, but the first moisture-proof structure MPS1 may be substantially identical to the first moisture-proof structure MPS1 shown in Figure 16.

[0343] The display device according to the embodiment of this disclosure can be described as follows.

[0344] According to embodiments of the present disclosure, a display device can be provided which includes a substrate including a display area including a light-emitting element, a power line extending from a pad area, a non-display area surrounding the display area, and an open area, and which includes an optical area located within the display area; a first moisture-proof structure including a first metal layer extending from a portion of the power line; and a second moisture-proof structure including a second metal layer disposed between the display area and the open area.

[0345] In the display device according to the embodiments of this disclosure, the first metal layer and the second metal layer may contain the same material and have a positive tapered shape.

[0346] In a display device according to an embodiment of the present disclosure, the display device may further include a thin-film transistor and a relay electrode that electrically connects the light-emitting element and the thin-film transistor. The first metal layer and the second metal layer may contain the same material as the relay electrode.

[0347] In a display device according to an embodiment of the present disclosure, the display device may further include an outer dam structure disposed in a non-display area. The first moisture-proof structure may include a first inner moisture-proof structure disposed between the display area and the outer dam structure; and a first outer moisture-proof structure disposed between the outer dam structure and the pad area.

[0348] In a display device according to an embodiment of the present disclosure, the display device may further include an inner dam structure disposed in the optical region. The second moisture-proof structure may include a second inner moisture-proof structure disposed between the display region and the inner dam structure; and a second outer moisture-proof structure disposed between the inner dam structure and the open region.

[0349] In a display device according to an embodiment of the present disclosure, the display device may further include a sealing layer disposed on a light-emitting element. The sealing layer may be disposed to cover a first metal layer and a second metal layer.

[0350] In the display device according to the embodiments of the present disclosure, the display device may further include a protective layer disposed to cover the sides of the first metal layer and the second metal layer.

[0351] In the display device according to the embodiment of the present disclosure, the non-display area includes a bent area located between the pad area and the display area, and the first moisture-proof structure can be placed between the display area and the bent area.

[0352] In the display device according to the embodiments of the present disclosure, the first moisture-proof structure may include extensions and heads. The extensions extend from a portion of the power line, are provided in multiples, and are spaced apart from each other, while the heads are located at the ends of the extensions and may have a wider width than the extensions.

[0353] In the display device according to the embodiments of the present disclosure, the power line may include a first power line and a second power line. The first power line and the second power line may each include a first moisture-proof structure. The first moisture-proof structure located on the first power line and the first moisture-proof structure located on the second power line may be facing each other and spaced apart.

[0354] In a display device according to an embodiment of the present disclosure, the first power line may include one of a low-voltage line, a high-voltage line, and an initialization voltage line. The second power line may include a voltage line different from the first power line, among the low-voltage line, the high-voltage line, and the initialization voltage line.

[0355] In the display device according to the embodiment of the present disclosure, the first moisture-proof structure arranged on the first power line is arranged to protrude toward the second power line, and the first moisture-proof structure arranged on the second power line may be arranged to protrude toward the first power line.

[0356] In a display device according to an embodiment of the present disclosure, the first metal layer may include a first layer disposed on an insulating layer; a second layer disposed on the first layer; and a third layer disposed on the second layer. The second metal layer may include a fourth layer disposed on an insulating layer; a fifth layer disposed on the fourth layer; and a sixth layer disposed on the fifth layer.

[0357] In the display device according to the embodiments of the present disclosure, the first layer and the third layer are made of a material that protects the second layer during the manufacturing process, and the first metal layer included in the first moisture-proof structure and the second metal layer included in the second moisture-proof structure may include a continuous positive tapered inclined surface.

[0358] In the display device according to the embodiments of the present disclosure, the second moisture-proof structure may include a side pattern positioned in a recessed area of ​​the insulating layer. The side pattern may be positioned overlapping with the second metal layer on a plane.

[0359] In a display device according to an embodiment of the present disclosure, the light-emitting element may include an intermediate layer that extends from the display area to the optical area. The intermediate layer is disposed on a second metal layer and may be cut in a recessed area.

[0360] In a display device according to an embodiment of the present disclosure, the intermediate layer includes a first portion and a second portion located on a second metal layer, and a third portion located in a recessed region, wherein the second portion is spaced apart from the third portion and can be superimposed on each other on a plane.

[0361] In the display device according to the embodiments of this disclosure, the second metal layer can be positioned to protrude beyond the side pattern.

[0362] In the display device according to the embodiments of the present disclosure, the display device may further include an auxiliary metal layer that is separated from the second metal layer and disposed below the second metal layer.

[0363] In the display device according to the embodiments of the present disclosure, the auxiliary metal layer is arranged extending inward into the recessed region, and a side pattern can be arranged on the auxiliary metal layer.

[0364] In the display device according to the embodiments of this disclosure, the auxiliary metal layer can be positioned outside the recessed region.

[0365] In the display device according to the embodiments of this disclosure, the intermediate layer may be located on a second gate insulating layer or auxiliary metal layer exposed in a recessed region.

[0366] In a display device according to an embodiment of the present disclosure, the display device may further include a thin-film transistor electrically connected to a light-emitting element and including a gate electrode. The auxiliary metal layer and the gate electrode may be made of the same material.

[0367] In a display device according to an embodiment of the present disclosure, the display device may further include a crack-preventing structure forming an annular closed loop at a certain distance from an open area. The crack-preventing structure may include a first layer and a second layer that overlap each other.

[0368] According to embodiments of the present disclosure, a display device can be provided in which a substrate includes a display area including a light-emitting element, a power line extending from a pad area, a non-display area surrounding the display area, and an optical area located within the display area; a moisture-proof structure disposed within the power line or the optical area; and a light-emitting element including an intermediate layer that extends from the display area to the optical area, the intermediate layer comprising a plurality of parts, the plurality of parts being spaced apart from each other.

[0369] According to embodiments of the present disclosure, a display device can be provided that includes a substrate including a display area including at least one light-emitting element, a non-display area disposed outside the display area and including a power line extending from a pad area, an open area located in the display area and having a portion of the substrate removed, an optical electronic device disposed on a plane so as to overlap with the open area, a projection disposed between the pad area of ​​the non-display area and the display area and protruding from the power line and including a first metal layer, and an undercut area disposed between the outside of the display area and the open area within the optical area and including a second metal layer.

[0370] According to embodiments of this disclosure, a display device with improved reliability can be provided.

[0371] According to embodiments of this disclosure, a display device can be provided that includes a moisture-proof structure in the power line region and the optical region.

[0372] According to embodiments of this disclosure, a display device can be provided that can increase the number of moisture permeability paths by including moisture-proof structures in the power line region and the optical region.

[0373] According to embodiments of this disclosure, a display device can be provided that, by incorporating a moisture-proof structure, can block or reduce the penetration of external moisture into the display area.

[0374] According to embodiments of this disclosure, a low-power display device can be provided by blocking or reducing the penetration of external moisture into the display area, which can lead to a decrease in the lifespan of the light-emitting elements or the occurrence of defects in the light-emitting elements.

[0375] The above description is merely illustrative of the technical concept of this disclosure, and any person with ordinary skill in the art to which this disclosure belongs could make various modifications and variations without departing from the essential characteristics of this disclosure. Furthermore, the embodiments disclosed herein are for illustrative purposes only and not to limit the technical concept of this disclosure, and the scope of the technical concept of this disclosure is not limited by such embodiments.

Claims

1. A substrate including a display area containing at least one light-emitting element, a non-display area surrounding the display area and including at least one power line extending from a pad area, and an open area and including an optical area located within the display area. Extending from a portion of the aforementioned power line, a first moisture-proof structure including a first metal layer, and A display device comprising a second moisture-proof structure, which includes a second metal layer, and is disposed between the display area and the open area.

2. The display device according to claim 1, wherein the first metal layer and the second metal layer contain the same material and have a positive tapered shape.

3. Thin-film transistors, and The system further includes a relay electrode that electrically connects the light-emitting element and the thin-film transistor to each other. The display device according to claim 1, wherein the first metal layer and the second metal layer contain the same material as the relay electrode.

4. The system further includes an outer dam structure located in the aforementioned non-display area, The first moisture-proof structure is, A first internal moisture-proofing structure is disposed between the display area and the outer dam structure, and The display device according to claim 1, further comprising a first outer moisture-proofing structure disposed between the outer dam structure and the pad area.

5. The system further includes an inner dam structure located in the aforementioned optical region, The second moisture-proof structure is, A second internal moisture-proofing structure is positioned between the display area and the internal dam structure, and The display device according to claim 1, further comprising a second outer moisture-permeable structure disposed between the inner dam structure and the open region.

6. The light-emitting element further includes a sealing layer disposed on the light-emitting element, The display device according to claim 1, wherein the sealing layer is arranged to cover the first metal layer and the second metal layer.

7. The display device according to claim 6, further comprising a protective layer disposed to cover the side surface of the first metal layer and the side surface of the second metal layer, respectively.

8. The non-display area includes a curved area located between the pad area and the display area. The display device according to claim 1, wherein the first moisture-proofing structure is disposed between the display area and the bending area.

9. The first moisture-proof structure includes an extension and a head portion, The extension extends from a part of the power line, and when multiple first moisture-proof structures are provided, the multiple extensions are arranged spaced apart from each other. The display device according to claim 1, wherein the head portion is located at the end of the extension portion and has a wider width than the extension portion.

10. The power line includes a first power line and a second power line. The first power line and the second power line each include the first moisture-proof structure, The display device according to claim 1, wherein the first moisture-proof structure arranged on the first power line and the first moisture-proof structure arranged on the second power line are arranged opposite each other at a distance from each other.

11. The first metal layer is A first layer placed on the insulating layer, A second layer placed on the first layer, and Including a third layer disposed on the second layer, The aforementioned second metal layer is A fourth layer disposed on the insulating layer, A fifth layer placed on the fourth layer, and The display device according to claim 1, further comprising a sixth layer disposed on the fifth layer.

12. The second moisture-proof structure includes a side pattern arranged in the recessed region of the insulating layer, The display device according to claim 11, wherein the side pattern is positioned on a plane, overlapping with the second metal layer.

13. The light-emitting element includes an intermediate layer that extends from the display area to the optical area, The display device according to claim 12, wherein the intermediate layer is disposed on the second metal layer and cut in the recessed region.

14. The display device according to claim 12, wherein the second metal layer is arranged to protrude beyond the side pattern.

15. The display device according to claim 12, further comprising an auxiliary metal layer separated from the second metal layer and disposed below the second metal layer.

16. The display device according to claim 15, wherein the auxiliary metal layer extends inward into the recessed region and the side pattern is arranged on the auxiliary metal layer.

17. The display device according to claim 15, wherein the auxiliary metal layer is disposed outside the recessed region.

18. The light-emitting element is electrically connected to the thin-film transistor which includes a gate electrode, The display device according to claim 15, wherein the auxiliary metal layer and the gate electrode contain the same substance.

19. A substrate including a display area containing a light-emitting element, a power line area extending from a pad area, a non-display area surrounding the display area, and an optical area located within the display area, and Includes at least one moisture-proof structure located within the power line region or the optical region, The light-emitting element includes an intermediate layer that extends from the display area to the optical area, The intermediate layer comprises a plurality of parts, the plurality of parts being arranged apart from each other, in a display device.

20. A substrate including a display area containing at least one light-emitting element, A non-display area located outside the aforementioned display area, including a power line extending from the pad area, An open area located in the aforementioned display area, where a part of the substrate has been removed, Optical electronic equipment arranged on a plane so as to overlap with the open region, A projection is located between the non-display area, the pad area and the display area, and protrudes from the power line, including a first metal layer, and A display device disposed between the outside of the display area within the optical region and the open region, and including an undercut region containing a second metal layer.

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