Comparator circuit, A / D converter
JP2026120036APending Publication Date: 2026-07-21THE UNIV OF TOKYO
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Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- THE UNIV OF TOKYO
- Filing Date
- 2025-01-08
- Publication Date
- 2026-07-21
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Figure 2026120036000001_ABST
Abstract
To provide a comparator circuit capable of high-speed operation. [Solution] The first preamplifier 110 amplifies the difference between the first input voltage VIP and the second input voltage VIN to generate complementary first positive signal FP and first negative signal FN. The second preamplifier 120 amplifies the difference between the first positive signal FP and the first negative signal FN to generate complementary second positive signal SP and second negative signal SN. The latch circuit 130 transitions to a first state in response to the assertion of at least one of the first positive signal FP and the second positive signal SP, and transitions to a second state in response to the assertion of at least one of the first negative signal FN and the second negative signal SN.
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