Method for controlling processing in a battery management system
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- FDK CORP
- Filing Date
- 2025-01-17
- Publication Date
- 2026-07-30
Smart Images

Figure 2026123590000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a method for controlling processes executed in a battery management system (hereinafter referred to as "BMS") that monitors and controls the state of a battery so that the battery can be used safely and efficiently, and more particularly, to a method for controlling processes in a BMS provided with a watchdog timer (hereinafter referred to as "WDT").
Background Art
[0002] In a BMS, in order to ensure the safety of the battery, the voltage and temperature are periodically measured to check the state of the battery. However, if such measurements cannot be executed normally due to some malfunction, it becomes impossible to check the latest state of the battery, and danger may occur. Therefore, a WDT is provided in the BMS. When the WDT cannot receive a periodic signal from the microcontroller that controls the processes in the BMS within a certain period of time, it is generally considered that an abnormality has occurred in the microcontroller, and a reset signal is output to the microcontroller to reset the microcontroller.
[0003] There are two types of WDTs: one that regards it as an abnormality when the reception of the periodic signal from the microcontroller is delayed, and one that regards it as an abnormality when the period of reception of the periodic signal is disrupted (the periodic signal is received within the closed window period or cannot be received within the open window period). The latter is more suitable for a BMS with high safety requirements. Non-Patent Document 1 discloses the specifications of a WDT circuit that can be configured as either type.
Prior Art Documents
Patent Documents
[0004]
Non-Patent Document 1
[0005] In a BMS (Building Management System) equipped with a WDT (Wave Timed Test), the WDT timeout period is pre-set based on the execution intervals and durations of various processes incorporated into the system. When adding another process in such an environment, it is necessary to consider the configuration of the process to avoid timing out the WDT.
[0006] Therefore, the present invention aims to provide a technology for incorporating new processing into the BMS without causing the WDT to time out. [Means for solving the problem]
[0007] To solve the above problems, the present invention provides a control method for processing in a battery management system (BMS) that monitors the state of a battery, and includes a signal output step of outputting a signal to a watchdog timer (WDT) provided in the battery management system at predetermined first cycle intervals; a voltage measurement step of measuring a voltage at predetermined second cycle intervals and storing the measured value in RAM; a temperature measurement step of measuring a temperature at predetermined third cycle intervals and storing the measured value in RAM in RAM; and a data storage step of saving data stored in RAM to a non-volatile memory at predetermined fourth cycle intervals, dividing the saving to the non-volatile memory into page units and releasing the processor resources each time the saving of a page unit is completed. [Effects of the Invention]
[0008] According to the present invention, since data is stored in non-volatile memory on a page-by-page basis, the time that processor resources are occupied during data storage can be significantly reduced compared to storing all data at once. This allows various processes incorporated into the BMS to be executed smoothly and at appropriate timings according to their respective execution cycles. In this way, by dividing the newly incorporated process into multiple parts and configuring the system to release resources after each execution of the divided process, new processes can be incorporated into the BMS without causing the WDT to time out. [Brief explanation of the drawing]
[0009] [Figure 1] This diagram summarizes the details of the various processes performed in BMS10. [Figure 2] This flowchart shows examples of procedures for various BMS processes in the embodiment. [Figure 3] This sequence diagram shows an example of the operation of various BMS processes during a specific time period. [Figure 4] This flowchart shows example procedures for various BMS processing steps as a comparative example. [Modes for carrying out the invention]
[0010] The embodiments of the present invention will be described below with reference to the drawings. The following embodiments are preferred examples of BMS to which the control method of the present invention is applied, and the present invention is not limited to these examples.
[0011] Figure 1 is a diagram summarizing the various processes performed in BMS10 according to one embodiment and the time required for them.
[0012] The BMS10 is a system that periodically monitors the battery voltage and temperature to ensure battery safety. As shown in Figure 1(A), the BMS10 primarily performs four processes: clearing the WDT counter, measuring voltage, measuring temperature, and saving data to the EEPROM. These processes are executed at regular intervals according to the priority order shown. These processes are controlled by the microcontroller 1 mounted on the BMS10.
[0013] The highest priority action is clearing the WDT counter, which is performed every 30ms and takes 200μs to execute. In this process, microcontroller 1 outputs a signal to WDT4 to clear its counter (hereinafter referred to as the "clear signal"). In response, if the clear signal is input within the appropriate period, WDT4 clears the counter and restarts the time count from zero.
[0014] The second priority is voltage measurement, which is performed every 10ms and takes 400μs to execute. In this process, microcontroller 1 obtains the measured voltage value at that time from the voltage measurement unit 2 (for example, a voltage measurement IC) and temporarily stores it in the RAM within microcontroller 1.
[0015] The third priority task is temperature measurement, which is performed every second (1s) and takes 200μs to execute. In this process, the microcontroller 1 obtains the temperature measurement value at that time from the temperature measurement unit 3 (for example, a temperature measurement IC) and temporarily stores it in the RAM within the microcontroller 1.
[0016] The fourth priority task is saving data to the EEPROM, which is performed every minute (60 seconds) and takes 25ms to execute. In this process, the voltage and temperature measurement data that the microcontroller 1 had temporarily held in RAM is saved to the EEPROM 5.
[0017] Thus, of the four processes, clearing the WDT counter has the highest priority, and saving data to the EEPROM has the lowest priority. By prioritizing the clearing of the WDT counter, it becomes less likely for the WDT to time out, thus stabilizing the operation of the BMS10. In addition, the voltage measurement execution cycle is the shortest, and because voltage and temperature measurements are prioritized over data saving and executed at short cycles, the battery status can be checked at the appropriate time, changes in status can be quickly grasped, and battery safety can be more reliably ensured.
[0018] The WDT4 provided in the BMS10 is a windowed WDT. As shown in Figure 1(B), the timeout period for the WDT4 is set to 50ms, of which the open window period and the close window period are each set to 25ms. If a clear signal is input from the microcontroller 1 within the open window period, the WDT4 considers the microcontroller 1 to be normal, clears the counter, and starts counting again. On the other hand, if the clear signal is input within the close window period, or if it is not input within the open window period, the WDT4 considers the microcontroller 1 to be abnormal and outputs a reset signal to the microcontroller 1.
[0019] Incidentally, the data to be saved to the EEPROM corresponds to 5 pages of the EEPROM, and the total time required is 25ms, which is equivalent to the length of the WDT4 open window period. Therefore, it is expected that a WDT4 timeout will easily occur if the start of processing is slightly delayed or takes a little longer than expected. However, the WDT4 timeout period is set to meet safety requirements, and it is not possible to change the timeout period for low-priority processing. Therefore, in this embodiment, the data saving process is divided into multiple parts and executed in separate parts to prevent the resources of the microcontroller 1 from being occupied for a long period of time.
[0020] Figure 2 is a flowchart showing an example of the procedures for various processes of the BMS in the embodiment. The following will be described along with the example of the procedures.
[0021] Steps S10, S11: The microcomputer 1 checks whether the execution period (30 ms) of the WDT counter clear has arrived. If the execution period has arrived (step S10: Yes), the microcomputer 1 outputs a clear signal to the WDT 4 to clear the counter of the WDT 4 (step S11). On the other hand, if the execution period of the WDT counter clear has not arrived (step S10: No), the microcomputer 1 proceeds to step S20.
[0022] Steps S20, S21: The microcomputer 1 checks whether the execution period (10 ms) of the voltage measurement has arrived. If the execution period has arrived (step S20: Yes), the microcomputer 1 acquires the measured value of the voltage at that time from the voltage measurement unit 2 and stores it in the RAM (step S21). On the other hand, if the execution period of the voltage measurement has not arrived (step S20: No), the microcomputer 1 proceeds to step S30.
[0023] Steps S30, S31: The microcomputer 1 checks whether the execution period (1 s) of the temperature measurement has arrived. If the execution period has arrived (step S30: Yes), the microcomputer 1 acquires the measured value of the temperature at that time from the temperature measurement unit 3 and stores it in the RAM (step S31). On the other hand, if the execution period of the temperature measurement has not arrived (step S30: No), the microcomputer 1 proceeds to step S40.
[0024] Steps S40~S42: The microcomputer 1 checks whether the execution period (60 s) of the data storage to the EEPROM has arrived. If the execution period has arrived (step S40: Yes), first, the microcomputer 1 sets 1 as the initial value of the variable PageNo that holds the page number to be the target of the storage process (step S41), and sets the storage flag indicating whether to perform the storage process to ON (step S42). On the other hand, if the execution period of the data storage to the EEPROM has not arrived (step S40: No), the microcomputer 1 proceeds to step S43.
[0025] Step S43: Microcontroller 1 checks whether the save flag is ON or OFF. If it is ON (Step S43: Yes), it proceeds to step S44. On the other hand, if the save flag is OFF (Step S43: No), microcontroller 1 returns to step S10.
[0026] Steps S44-S47: Microcontroller 1 checks whether the value of the variable PageNo is 5 or less. If the value of the variable PageNo is 5 or less (Step S44: Yes), it saves the RAM data to the page of EEPROM 5 corresponding to the variable PageNo (Step S45), adds 1 to the variable PageNo (Step S46), and returns to step S10. On the other hand, if the value of the variable PageNo is greater than 5 (Step S44: No), microcontroller 1 sets the save flag to OFF (Step S47) and returns to step S10.
[0027] Then, returning to step S10, microcontroller 1 executes the series of processes again. This series of processes is executed in a loop throughout the entire time microcontroller 1 is running.
[0028] As described above, the various processes in BMS are incorporated into a series of loop processes according to the priority order shown in Figure 1, and each process is executed when its execution cycle arrives. If the execution cycles of multiple processes arrive simultaneously, they will be executed in order according to the priority order. This makes it possible to stabilize the operation of BMS.
[0029] Furthermore, although the process for saving data to the EEPROM is configured from step S40 onwards, when the data saving execution cycle arrives, the page number is set to 1 (step S41), the save flag is turned ON (step S42), data is saved to page 1 of EEPROM 5, the page number is set to 2, and the process returns to S10. In the loop immediately following this, the execution cycle has not yet arrived (step S40: No), and the save flag is ON (step S43: Yes), so data is saved to page 2 of EEPROM 5, the page number is set to 3, and the process returns to S10. After this process is repeated, in the loop immediately following the completion of saving data to page 5 of EEPROM 5, the execution cycle has not yet arrived (step S40: No), the save flag is ON (step S43: Yes), and the value of the variable PageNo is 6 (step S44: No), so the save flag is turned OFF (step S47). In the loops from this point onward, no data saving process is executed until the next data saving execution cycle arrives.
[0030] As mentioned above, the time required to save data to the EEPROM is 25ms, but this is the time required to save the entire amount of data for 5 pages in the EEPROM. If the data is divided and saved in page units (for example, 256 bytes), the time required for each unit will be 5ms. By saving the data in page units instead of saving all the data at once, the time that the microcontroller 1's resources are occupied when saving data to the EEPROM can be significantly reduced, and resources can be released after saving each page.
[0031] Figure 3 is a sequence diagram showing an example of the operation of various BMS processes over time. In Figure 3, the execution time or scheduled execution time of each process is shown to the left of the microcontroller 1's lifeline. In addition, the operations related to voltage measurement, temperature measurement, and WDT counter clearing, which require very short time, are illustrated in a simplified manner. The following is a chronological explanation.
[0032] At time t1, in response to the arrival of the voltage measurement execution cycle (10ms), microcontroller 1 performs a voltage measurement. At time t2, the microcontroller 1 performs temperature measurement in response to the arrival of the temperature measurement execution cycle (1 s). At time t3, when the WDT counter clearing cycle (30ms) arrives, microcontroller 1 outputs a clear signal to WDT4.
[0033] At times t4 and t5, in response to the arrival of the execution cycle (60s) for saving data to the EEPROM, the microcontroller 1 starts the process of saving the RAM data to page 1 of the EEPROM 5 (at time t4), and finishes after 5ms (at time t5).
[0034] Time t6~t8: In the loop immediately following the completion of saving data to page 1, microcontroller 1 starts the process of saving data to page 2 (time t6) and finishes after 5ms (time t8). During this time, the voltage measurement execution cycle arrives at time t7, but microcontroller 1 cannot perform the voltage measurement at this time because its resources are occupied by the data saving process.
[0035] Time t9~t11: In the loop immediately following the completion of saving data to page 2 by microcontroller 1, the voltage measurement scheduled for time t7 is performed (time t9), and then the RAM data is saved to page 3 of EEPROM 5 (time t10~t11).
[0036] Time t12~t14: In the loop immediately following the completion of saving data to page 3 by microcontroller 1, voltage measurement is performed in accordance with the arrival of the voltage measurement execution cycle (time t12), and furthermore, the RAM data is saved to page 4 of EEPROM 5 (time t13~t14).
[0037] Time t15~t17: In the loop immediately following the completion of saving data to page 4, microcontroller 1 starts the process of saving data to page 5 (time t15) and finishes 5ms later (time t17). During this time, the voltage measurement execution cycle arrives at time t16, but microcontroller 1 cannot perform the voltage measurement at this time because its resources are occupied by the data saving process.
[0038] At times t18 and t19, in the loop immediately following the completion of saving data to page 5, microcontroller 1 outputs a clear signal to WDT4 in response to the arrival of the WDT counter clearing execution cycle (time t18), and further performs the voltage measurement that was scheduled to be performed at time t16 (time t19).
[0039] From this point onward, each process is executed according to its cycle, following a similar flow. If the resources of microcontroller 1 are occupied by another process when it is time for an execution cycle, the process will be executed after the resources are released. By saving data to the EEPROM in page units, the resource occupancy time (processing time) is limited to a maximum of 5ms. Therefore, even if there are some fluctuations in this time, the resources will not remain occupied for extended periods, allowing each process to be executed smoothly and at the appropriate timing according to its respective execution cycle.
[0040] Figure 4 is a flowchart showing example procedures for various BMS processes as a comparative example. The BMS processes in the comparative example differ from those in the embodiment (Figure 2) in that the steps from step S40' onwards, which involve processing related to saving data to the EEPROM, are configured.
[0041] In the comparative example, when the execution cycle for saving data to the EEPROM (60s) arrives (step S40': Yes), microcontroller 1 sets the initial value of the variable PageNo to 1 (step S41'), and as long as the value of the variable PageNo is 5 or less (step S42': Yes), it saves the RAM data to the page in EEPROM 5 corresponding to the variable PageNo (step S43'), and adds 1 to the variable PageNo (step S44'), and this process is repeated. Then, when the data saving to page 5 is finished and the value of the variable PageNo becomes 6 (step S42': No), it returns to step S10'. In other words, in the comparative example, the resources of microcontroller 1 remain occupied for 25ms, which is required to save data for all 5 pages from page 1 to 5. Therefore, a WDT4 timeout is likely to occur.
[0042] In contrast, in the above-described embodiment, data is saved to the EEPROM on a page-by-page basis, significantly reducing the time that the microcontroller 1's resources are occupied during data saving. As a result, the microcontroller 1 can perform other processes whose execution cycles have arrived (WDT counter clearing, voltage measurement, temperature measurement) between the end of saving one page and the start of saving the next page. Therefore, even if data saving to the EEPROM is added, the BMS can be operated without causing a WDT4 timeout.
[0043] The present invention is not limited to the embodiments described above and can be implemented in various modified forms. In the embodiments described above, data in the RAM of the microcontroller 1 is periodically saved to the EEPROM 5, but the data storage location is not limited to EEPROM and can be any non-volatile memory. Also, in the embodiments described above, measured values of voltage and temperature are stored in the built-in RAM of the microcontroller 1, but instead, they may be stored in RAM outside the microcontroller 1.
[0044] In the embodiments described above, the control method was explained using the four main processes in BMS10 as examples, but it is also possible to incorporate and control other processes. If the required time for the incorporated processes is long and there is a risk of causing a WDT timeout, the process can be divided into multiple parts in some way, similar to the case of saving data to non-volatile memory described above, and the process can be configured so that the time the resources of the microcontroller 1 are occupied by each of the divided processes is sufficiently shorter than the WDT timeout time (or the open window period if the WDT is windowed).
[0045] Furthermore, the configurations and numerical values presented in the process of explaining the control methods for various processes in BMS10 are merely examples, and it goes without saying that they can be modified as appropriate when implementing the present invention. [Explanation of Symbols]
[0046] 1. Microcontroller (processor) 2 Voltage Measurement Unit 3. Temperature measurement unit 4 WDT (Watchdog Timer) 5. EEPROM (Non-Volatile Memory) 10 BMS (Battery Management System)
Claims
1. A method for controlling processing in a battery management system that monitors the state of a battery, A signal output step that outputs a signal to a watchdog timer provided in the battery management system at predetermined first cycle intervals, A voltage measurement step in which the voltage is measured at predetermined second cycle intervals and the measured value is stored in RAM, A temperature measurement step that measures the temperature at predetermined third cycles and stores the measured value in RAM, A data saving step in which, when saving the data stored in the RAM to non-volatile memory at predetermined fourth cycles, the saving to the non-volatile memory is divided into page units, and the processor resources are released each time the saving of a page unit is completed. A control method including
2. In the control method described in claim 1, The aforementioned signal output step has the highest execution priority. The aforementioned data saving step has the lowest execution priority. A control method characterized in that, when the execution cycles of multiple steps occur simultaneously, the multiple steps are executed in order from the highest priority to the lowest priority.
3. In the control method according to claim 1 or 2, The first period is longer than the second period. The third period is longer than the first period. A control method characterized in that the fourth period is longer than the third period.
4. In the control method according to claim 1 or 2, A control method characterized in that the time required for saving the data on a page-by-page basis in the data saving step is shorter than the open window period in the timeout period of the watchdog timer.