Magnetic sensor device

Abstract

To provide a magnetic sensor device that can be miniaturized and optimized for operation under environmental magnetic fields. [Solution] The support 4 has at least one power pad 41A to 41D and a ground pad 41E. The first coil group 70 has a first end 21A connected to at least one power pad 41A and a second end 21C located at the end opposite to the first end 21A. The second coil group 80 has a third end 31A connected to the second end 21C of the first coil group 70 and a fourth end 31D located at the end opposite to the third end 31A and connected to the ground pad 41E. The number of at least one power pad 41A to 41D is less than or equal to the total number of at least one first coil 71, 72 and at least one second coil 81, 82.

Description

Technical Field

[0001] The present disclosure relates to a magnetic sensor device.

Background Art

[0002] Patent Document 1 describes a magnetic sensor module and an IC chip used therefor. Patent Document 2 describes a magnetic sensor and a current amount detector. Patent Document 3 describes a push-pull bridge magnetic sensor. Patent Document 4 describes a magnetic sensor. Patent Document 5 describes a magnetic sensor device.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

Patent Document 5

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, Patent Documents 1 to 5 all have room for improvement from the viewpoints of miniaturization and optimization of operations under an environmental magnetic field (for example, suitably performing set / reset operations, self-test operations, etc.).

[0005] The present disclosure has been made in view of such problems, and an object thereof is to provide a magnetic sensor device capable of achieving miniaturization and optimization of operations under an environmental magnetic field.

Means for Solving the Problems

[0006] A magnetic sensor device according to a first aspect of the present disclosure includes a first chip including a plurality of first magnetoresistive elements, a second chip including a plurality of second magnetoresistive elements, a support for supporting the first chip and the second chip, a first coil group including at least one first coil configured to apply a magnetic field to the plurality of first magnetoresistive elements, and a second coil group including at least one second coil configured to apply a magnetic field to the plurality of second magnetoresistive elements. The support has at least one power pad and a ground pad. The first coil group has a first end connected to at least one power pad and a second end located at the end opposite to the first end. The second coil group has a third end connected to the second end of the first coil group and a fourth end located at the end opposite to the third end and connected to the ground pad. The number of at least one power pad is less than or equal to the total number of at least one first coil and at least one second coil.

[0007] A magnetic sensor device according to a second aspect of the present disclosure comprises a chip including a plurality of magnetoresistive elements, a support for the chip, and a coil group including a plurality of coils configured to apply a magnetic field to the plurality of magnetoresistive elements. The support has at least one power pad and a ground pad. The coil group has a first end connected to at least one power pad and a second end located on the opposite end from the first end and connected to the ground pad. The number of at least one power pad is less than or equal to the total number of coils.

[0008] A magnetic sensor device according to a third aspect of the present disclosure includes a chip containing a plurality of magnetoresistive elements, a support for supporting the chip, a group of coils containing a plurality of coils configured to apply a magnetic field to the plurality of magnetoresistive elements, and a plurality of bridge circuits composed of the plurality of magnetoresistive elements. The support has a plurality of first power pads for the plurality of bridge circuits and at least one second power pad for the group of coils. The number of at least one second power pad is less than the number of the plurality of first power pads. [Effects of the Invention]

[0009] In this disclosure, the support has at least one power pad and a ground pad. The first coil group has a first end connected to at least one power pad and a second end located on the opposite end from the first end. The second coil group has a third end connected to the second end of the first coil group and a fourth end located on the opposite end from the third end and connected to a ground pad. The number of at least one power pad is less than or equal to the total number of at least one first coil and at least one second coil. As a result, according to this disclosure, it is possible to realize a magnetic sensor device that can be miniaturized and optimized for operation under ambient magnetic fields. [Brief explanation of the drawing]

[0010] [Figure 1] This is a perspective view showing a magnetic sensor device according to the first embodiment of this disclosure. [Figure 2] This is a plan view showing a magnetic sensor device according to the first embodiment of the present disclosure. [Figure 3] This is a functional block diagram showing the configuration of a magnetic sensor device according to the first embodiment of this disclosure. [Figure 4] This is a circuit diagram showing the circuit configuration of the first detection circuit in the first embodiment of the present disclosure. [Figure 5] This is a circuit diagram showing the circuit configuration of the second detection circuit in the first embodiment of the present disclosure. [Figure 6] It is a circuit diagram showing the circuit configuration of the third detection circuit in the first embodiment of the present disclosure. [Figure 7] It is a perspective view showing a part of one resistance part in the first embodiment of the present disclosure. [Figure 8] It is a perspective view showing a magnetoresistive effect element in the first embodiment of the present disclosure. [Figure 9] It is a circuit diagram showing the circuit configuration of the first coil group and the second coil group in the first embodiment of the present disclosure. [Figure 10] It is a plan view showing a part of the first chip in the first embodiment of the present disclosure. [Figure 11] It is a plan view showing a part of the second chip in the first embodiment of the present disclosure. [Figure 12] It is a cross-sectional view showing a part of the first chip in the first embodiment of the present disclosure. [Figure 13] It is a cross-sectional view showing a part of the first chip in the first embodiment of the present disclosure. [Figure 14] It is a cross-sectional view showing a part of the first chip in the first embodiment of the present disclosure. [Figure 15] It is a plan view showing a part of the first chip in the first embodiment of the present disclosure. [Figure 16] It is a plan view showing a part of the second chip in the first embodiment of the present disclosure. [Figure 17] It is a cross-sectional view showing a part of the second chip in the first embodiment of the present disclosure. [Figure 18] It is an enlarged plan view showing the configuration of a plurality of first electrode pads of the first chip, a plurality of second electrode pads of the second chip, and a plurality of third electrode pads of the support in the first embodiment of the present disclosure. [Figure 19] It is a circuit diagram showing the circuit configuration of the first coil group and the second coil group of the magnetic sensor device of the comparative example. [Figure 20] It is a plan view showing a part of the second chip in the second embodiment of the present disclosure. [Figure 21]This is a plan view showing a magnetic sensor device according to a third embodiment of the present disclosure. [Figure 22] This is a plan view showing a magnetic sensor device according to a fourth embodiment of the present disclosure. [Figure 23] This is a circuit diagram showing the circuit configuration of the second detection circuit in the fourth embodiment of the present disclosure. [Figure 24] This is a plan view showing a portion of the second chip in the fourth embodiment of the present disclosure. [Figure 25] Figure 13 is a cross-sectional view showing a modified example in which the arrangement of the first coil has been changed. [Figure 26] This is a plan view showing a magnetic sensor device in a fifth embodiment of the present disclosure. [Modes for carrying out the invention]

[0011] [First Embodiment] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. First, the configuration of a magnetic sensor device according to the first embodiment of the present disclosure will be described with reference to Figures 1 to 3. Figure 1 is a perspective view showing the magnetic sensor device 100. Figure 2 is a plan view showing the magnetic sensor device 100. Figure 3 is a functional block diagram showing the configuration of the magnetic sensor device 100. The magnetic sensor device 100 includes a magnetic sensor 1. The magnetic sensor 1 may be a geomagnetic sensor for detecting the Earth's magnetic field, a magnetic sensor for a position detection device for detecting the position of a magnet moving in a predetermined direction, a magnetic sensor for an angle sensor or magnetic encoder for detecting a rotating magnetic field, or a magnetic sensor for a current sensor for detecting a magnetic field that generates a detected current.

[0012] The magnetic sensor device 100 comprises a first chip 2, a second chip 3, and a support 4 that supports the first and second chips 2 and 3. The magnetic sensor 1 is composed of the first chip 2 and the second chip 3. The first chip 2, the second chip 3, and the support 4 all have a rectangular parallelepiped shape. The support 4 has a reference plane 4a which is the top surface, a bottom surface located on the opposite side of the reference plane 4a, and four sides connecting the reference plane 4a and the bottom surface.

[0013] Here, with reference to Figures 1 and 2, the reference coordinate system in this embodiment will be described. The reference coordinate system is a coordinate system based on the magnetic sensor device 100, and is a Cartesian coordinate system defined by three axes. In the reference coordinate system, the X, Y, and Z directions are defined. The X, Y, and Z directions are orthogonal to each other. In this embodiment in particular, the Z direction is the direction perpendicular to the reference plane 4a of the support 4, and the direction from the bottom surface of the support 4 toward the reference plane 4a. The direction opposite to the X direction is defined as the -X direction, the direction opposite to the Y direction is defined as the -Y direction, and the direction opposite to the Z direction is defined as the -Z direction. The three axes that define the reference coordinate system are the axis parallel to the X direction, the axis parallel to the Y direction, and the axis parallel to the Z direction.

[0014] Hereinafter, a position located at the end of the Z-direction relative to a given reference position will be referred to as "above," and a position opposite to "above" relative to a given reference position will be referred to as "below." Furthermore, with respect to the components of the magnetic sensor device 100, the surface located at the end in the Z-direction will be referred to as the "top surface," and the surface located at the end in the -Z-direction will be referred to as the "bottom surface." In addition, the expression "when viewed from a predetermined direction (for example, the Z-direction)" means viewing the object from a position at a distance in a predetermined direction or a direction parallel to the predetermined direction.

[0015] The first chip 2 has an upper surface 2a and a lower surface located on opposite sides, and four sides connecting the upper surface 2a and the lower surface. The second chip 3 has an upper surface 3a and a lower surface located on opposite sides, and four sides connecting the upper surface 3a and the lower surface.

[0016] The first chip 2 is mounted on the reference plane 4a of the support 4 with its lower surface facing the reference plane 4a of the support 4. The second chip 3 is mounted on the reference plane 4a of the support 4 with its lower surface facing the reference plane 4a of the support 4. The first chip 2 and the second chip 3 are joined to the support 4 by adhesives 6 and 7, respectively.

[0017] The first chip 2 has a plurality of first electrode pads 21 provided on its upper surface 2a. In Figure 2, the plurality of first electrode pads are denoted by the representative reference numeral 21, but as will be described later, the plurality of first electrode pads 21 have six first electrode pads 21A, 21B, 21C, 21D, 21E, and 21F.

[0018] The second chip 3 has a plurality of second electrode pads 31 provided on its upper surface 3a. In Figure 2, the plurality of second electrode pads are denoted by the representative reference numeral 31, but as will be described later, the plurality of second electrode pads 31 have 12 second electrode pads 31A, 31B, 31C, 31D, 31E, 31F, 31G, 31H, 31I, 31J, 31K, and 31L.

[0019] The support 4 has a plurality of third electrode pads 41 provided on a reference plane 4a. In Figure 2, the plurality of third electrode pads are denoted by the representative reference numeral 41, but as will be described later, the plurality of third electrode pads 41 have 14 third electrode pads 41A, 41B, 41C, 41D, 41E, 41F, 41G, 41H, 41I, 41J, 41K, 41L, 41M, and 41N.

[0020] Although not shown in the diagram, in the magnetic sensor device 100, two corresponding electrode pads from among the multiple first electrode pads 21, multiple second electrode pads 31, and multiple third electrode pads 41 are connected to each other by a conductor such as a bonding wire or redistribution layer (RDL).

[0021] As shown in Figure 3, the magnetic sensor 1 comprises a first detection circuit 10, a second detection circuit 20, and a third detection circuit 30. The first chip 2 includes the first detection circuit 10. The second chip 3 includes the second detection circuit 20 and the third detection circuit 30. Since the magnetic sensor 1 is a component of the magnetic sensor device 100, it can also be said that the magnetic sensor device 100 comprises the first to third detection circuits 10, 20, and 30.

[0022] The magnetic sensor device 100 further includes a signal processing circuit 40 and a drive circuit 45. The support 4 includes the signal processing circuit 40 and the drive circuit 45. The first to third detection circuits 10, 20, 30 and the signal processing circuit 40 are connected via a plurality of first electrode pads 21, a plurality of second electrode pads 31, a plurality of third electrode pads 41 and a plurality of conductors such as bonding wires or redistribution layers (RDLs).

[0023] Each of the first to third detection circuits 10, 20, and 30 includes a plurality of magnetic detection elements and is configured to detect a target magnetic field and generate at least one detection signal. In this embodiment, the plurality of magnetic detection elements are a plurality of magnetoresistive elements. Hereinafter, magnetoresistive elements will be referred to as MR elements.

[0024] The signal processing circuit 40 is configured to generate a first, second, and third detection value that corresponds to the components of the magnetic field at a predetermined reference position in three different directions, by processing a plurality of detection signals generated by the first to third detection circuits 10, 20, and 30. In this embodiment, the three different directions are two directions parallel to the XY plane and a direction parallel to the Z direction.

[0025] The signal processing circuit 40 and the drive circuit 45 may be composed of a single processor or of different processors. The processor may be, for example, an application-specific integrated circuit (ASIC). The drive circuit 45 will be described in detail later.

[0026] Figure 4 is a circuit diagram showing the circuit configuration of the first detection circuit 10. Figure 5 is a circuit diagram showing the circuit configuration of the second detection circuit 20. Figure 6 is a circuit diagram showing the circuit configuration of the third detection circuit 30. Figure 7 is a perspective view showing a part of one resistor. Figure 8 is a perspective view showing a magnetoresistive element. Figure 9 is a circuit diagram showing the circuit configuration of the first coil group 70 and the second coil group 80. Figure 10 is a plan view showing a part of the first chip 2. Figure 11 is a plan view showing a part of the second chip 3. Figures 12, 13, and 14 are cross-sectional views showing a part of the first chip 2. Figure 12 is a cross-sectional view along line 12-12 in Figure 10, Figure 13 is a cross-sectional view along line 13-13 in Figure 10, and Figure 14 is a cross-sectional view along line 14-14 in Figure 10.

[0027] Here, as shown in Figure 10, the U and V directions are defined as follows: The U direction is the direction of rotation from the X direction toward the Y direction. The V direction is the direction of rotation from the Y direction toward the -X direction. In this embodiment, the U direction is specifically defined as the direction of rotation by α from the X direction toward the Y direction, and the V direction is defined as the direction of rotation by α from the Y direction toward the -X direction. Note that α is an angle greater than 0° and less than 90°. In one example, α is 45°. Furthermore, the direction opposite to the U direction is defined as the -U direction, and the direction opposite to the V direction is defined as the -V direction.

[0028] Furthermore, as shown in Figures 5, 6, and 11 (and later in Figure 17), the W1 and W2 directions are defined as follows: The W1 direction is the direction of rotation from the V direction toward the -Z direction. The W2 direction is the direction of rotation from the V direction toward the Z direction. In this embodiment, the W1 direction is specifically defined as the direction of rotation by β from the V direction toward the -Z direction, and the W2 direction is defined as the direction of rotation by β from the V direction toward the Z direction. Note that β is an angle greater than 0° and less than 90°. The direction opposite to the W1 direction is defined as the -W1 direction, and the direction opposite to the W2 direction is defined as the -W2 direction. The W1 and W2 directions are orthogonal to the U direction, respectively.

[0029] The first detection circuit 10 is configured to detect a component of the target magnetic field parallel to the U direction and generate at least one first detection signal corresponding to this component. The second detection circuit 20 is configured to detect a component of the target magnetic field parallel to the W1 direction and generate at least one second detection signal corresponding to this component. The third detection circuit 30 is configured to detect a component of the target magnetic field parallel to the W2 direction and generate at least one third detection signal corresponding to this component.

[0030] As shown in Figure 4, the first detection circuit 10 is a bridge circuit including a power supply terminal V1, a ground terminal G1, signal output terminals E11 and E12, and resistors R11, R12, R13, and R14. The multiple MR elements of the first detection circuit 10 constitute the resistors R11, R12, R13, and R14.

[0031] Resistor R11 is located between the power supply terminal V1 and the signal output terminal E11. Resistor R12 is located between the signal output terminal E11 and the ground terminal G1. Resistor R13 is located between the signal output terminal E12 and the ground terminal G1. Resistor R14 is located between the power supply terminal V1 and the signal output terminal E12.

[0032] As shown in Figure 5, the second detection circuit 20 is a bridge circuit including a power supply terminal V2, a ground terminal G2, signal output terminals E21 and E22, and resistors R21, R22, R23, and R24. The multiple MR elements of the second detection circuit 20 constitute the resistors R21, R22, R23, and R24.

[0033] Resistor R21 is located between the power supply terminal V2 and the signal output terminal E21. Resistor R22 is located between the signal output terminal E21 and the ground terminal G2. Resistor R23 is located between the signal output terminal E22 and the ground terminal G2. Resistor R24 ​​is located between the power supply terminal V2 and the signal output terminal E22.

[0034] As shown in Figure 6, the third detection circuit 30 is a bridge circuit including a power supply terminal V3, a ground terminal G3, signal output terminals E31 and E32, and resistors R31, R32, R33, and R34. The multiple MR elements of the third detection circuit 30 constitute the resistors R31, R32, R33, and R34.

[0035] Resistor R31 is located between the power supply terminal V3 and the signal output terminal E31. Resistor R32 is located between the signal output terminal E31 and the ground terminal G3. Resistor R33 is located between the signal output terminal E32 and the ground terminal G3. Resistor R34 is located between the power supply terminal V3 and the signal output terminal E32.

[0036] The first detection circuit 10 is configured to generate a signal corresponding to the potential of the signal output terminal E11 as the first detection signal S11, and a signal corresponding to the potential of the signal output terminal E12 as the first detection signal S12. The second detection circuit 20 is configured to generate a signal corresponding to the potential of the signal output terminal E21 as the second detection signal S21, and a signal corresponding to the potential of the signal output terminal E22 as the second detection signal S22. The third detection circuit 30 is configured to generate a signal corresponding to the potential of the signal output terminal E31 as the third detection signal S31, and a signal corresponding to the potential of the signal output terminal E32 as the third detection signal S32.

[0037] The signal processing circuit 40 is configured to generate a first detection value Su based on the first detection signals S11 and S12, and to generate a second detection value Sv and a third detection value Sz based on the second detection signals S21 and S22 and the third detection signals S31 and S32. The first detection value Su is the detection value corresponding to the component of the target magnetic field in the direction parallel to the U direction. The second detection value Sv is the detection value corresponding to the component of the target magnetic field in the direction parallel to the V direction. The third detection value Sz is the detection value corresponding to the component of the target magnetic field in the direction parallel to the Z direction.

[0038] A predetermined voltage or current is applied to each of the power supply terminals V1 to V3. Each of the ground terminals G1 to G3 is connected to ground.

[0039] Figure 7 shows a portion of arbitrary resistors from the resistors R11-R14 of the first detection circuit 10, the resistors R21-R24 of the second detection circuit 20, and the resistors R31-R34 of the third detection circuit 30. Figure 7 shows an example of connecting CPP (Current Perpendicular-to-Plane) type MR elements in series. The arbitrary resistor includes a plurality of lower electrodes 61, a plurality of MR elements 50, and a plurality of upper electrodes 62. The plurality of lower electrodes 61 are arranged on a support member, which will be described later. Each lower electrode 61 has an elongated shape. A gap is formed between two lower electrodes 61 that are adjacent in the longitudinal direction of the lower electrode 61. As shown in Figure 7, the MR elements 50 are arranged near both ends in the longitudinal direction on the upper surface of the lower electrode 61.

[0040] Figure 8 is a perspective view showing an MR element (magnetoresistive element) 50. As shown in Figure 8, the MR element 50 includes an antiferromagnetic layer 51, a magnetization-fixed layer 52, a gap layer 53, and a free layer 54, which are stacked in order from the lower electrode 61 side. The antiferromagnetic layer 51 is electrically connected to the lower electrode 61. The antiferromagnetic layer 51 is made of an antiferromagnetic material and creates exchange coupling with the magnetization-fixed layer 52, thereby fixing the direction of magnetization of the magnetization-fixed layer 52.

[0041] As shown in Figure 7, multiple upper electrodes 62 are arranged on multiple MR elements 50. Each upper electrode 62 has an elongated shape and is positioned on two lower electrodes 61 adjacent to each other in the longitudinal direction, electrically connecting the free layers 54 of two adjacent MR elements 50. With this configuration, any resistive section shown in Figure 7 includes multiple MR elements 50 connected in series by multiple lower electrodes 61 and multiple upper electrodes 62.

[0042] The magnetization fixed layer 52 may be a so-called self-pinned fixed layer (Synthetic Ferri Pinned layer, SFP layer). The self-pinned fixed layer has a laminated ferri structure in which a ferromagnetic layer, a non-magnetic intermediate layer, and a ferromagnetic layer are stacked, and two ferromagnetic layers are antiferromagnetically coupled. If the magnetization fixed layer 52 is a self-pinned fixed layer, the antiferromagnetic layer 51 may be omitted.

[0043] Furthermore, the arrangement of layers 51-54 in the MR element 50 may be reversed vertically from the arrangement shown in Figure 8.

[0044] Furthermore, any resistor may include multiple sets of multiple MR elements 50 connected in parallel. These sets may be connected in series. Also, the MR elements 50 may be CIP (Current In-Plane) type MR elements.

[0045] Figures 4 to 6 schematically show one MR element 50 as a graphic representation of the resistive sections R11-R14, R21-R24, and R31-R34, respectively. In Figures 4 to 6, the filled arrows represent the direction of magnetization of the magnetization fixed layer 52 of the MR element 50. The open arrows represent the direction of magnetization of the free layer 54 of the MR element 50 when no target magnetic field is applied to the MR element 50.

[0046] In the example shown in Figure 4, the magnetization direction of the magnetization fixed layer 52 of the MR element 50 in each of the resistive sections R11 and R13 is in the -U direction. The magnetization direction of the magnetization fixed layer 52 of the MR element 50 in each of the resistive sections R12 and R14 is in the U direction. Furthermore, the magnetization direction of the free layer 54 of the MR element 50 when no target magnetic field is applied in each of the resistive sections R11 and R14 is in the -V direction. The magnetization direction of the free layer 54 of the MR element 50 when no target magnetic field is applied in each of the resistive sections R12 and R13 is in the V direction.

[0047] In the example shown in Figure 5, the magnetization direction of the magnetization fixed layer 52 of the MR element 50 in each of the resistive sections R21 and R23 is in the -W1 direction. The magnetization direction of the magnetization fixed layer of the MR element 50 in each of the resistive sections R22 and R24 is in the W1 direction. Furthermore, the magnetization direction of the free layer 54 of the MR element 50 when no target magnetic field is applied in each of the resistive sections R21 and R24 is in the U direction. The magnetization direction of the free layer 54 of the MR element 50 when no target magnetic field is applied in each of the resistive sections R22 and R23 is in the -U direction.

[0048] In the example shown in Figure 6, the magnetization direction of the magnetization fixed layer 52 of the MR element 50 in each of the resistive sections R31 and R33 is in the -W2 direction. The magnetization direction of the magnetization fixed layer of the MR element 50 in each of the resistive sections R32 and R34 is in the W2 direction. Furthermore, the magnetization direction of the free layer 54 of the MR element 50 when no target magnetic field is applied in each of the resistive sections R31 and R34 is in the U direction. The magnetization direction of the free layer 54 of the MR element 50 when no target magnetic field is applied in each of the resistive sections R32 and R33 is in the -U direction.

[0049] Hereinafter, the multiple MR elements of the first detection circuit 10 may be referred to as "multiple first MR elements," and the multiple MR elements of the second detection circuit 20 and the third detection circuit 30 may be referred to as "multiple second MR elements." Since the first to third detection circuits 10, 20, and 30 are components of the magnetic sensor 1, it can also be said that the magnetic sensor 1 includes "multiple first MR elements" and "multiple second MR elements." Furthermore, any MR element including "multiple first MR elements" and "multiple second MR elements" will continue to be denoted by reference numeral 50.

[0050] The magnetic sensor 1 includes a magnetic field generator configured to apply a magnetic field in a predetermined direction to the free layer 54 of each of the multiple MR elements 50 (multiple first MR elements and multiple second MR elements). In this embodiment, the magnetic field generator includes a first coil group 70, which includes at least one first coil configured to apply a magnetic field in a predetermined direction to the free layer 54 of each of the multiple MR elements 50 (multiple first MR elements) of the first detection circuit 10, and a second coil group 80, which includes at least one second coil configured to apply a magnetic field in a predetermined direction to each of the free layer 54 of the multiple MR elements 50 (multiple second MR elements) of the second and third detection circuits 20, 30. The first coil group 70 and the second coil group 80 are made of a conductive material such as Cu.

[0051] The first chip 2 includes a first coil group 70; that is, the first chip 2 and the first coil group 70 are integrated. The second chip 3 includes a second coil group 80; that is, the second chip 3 and the second coil group 80 are integrated. The support 4 also includes a drive circuit 45 configured to drive the first coil group 70 and the second coil group 80.

[0052] As shown in Figure 9, the first coil group 70 includes two first coils 71 and 72. The second coil group 80 includes two second coils 81 and 82. The two first coils 71 and 72 and the two second coils 81 and 82 are connected in series in this order. The drive circuit 45 includes a switch 46. The switch 46 has an input terminal 46a and an output terminal 46b. The input terminal 46a is connected to a power supply (not shown). The output terminal 46b is connected to the first coil 71. The second coil 82 is connected to ground.

[0053] Now, with reference to Figure 10, the arrangement of resistors R11 to R14 in the first chip 2 will be explained. In Figure 10, the region where resistor R11 is located is indicated by the symbol R11, the region where resistor R12 is located is indicated by the symbol R12, the region where resistor R13 is located is indicated by the symbol R13, and the region where resistor R14 is located is indicated by the symbol R14. In the example shown in Figure 10, resistors R11 and R12 are arranged in this order in the -Y direction. Resistors R13 and R14 are located ahead of resistors R12 and R11 in the -X direction, respectively.

[0054] As shown in Figure 10, the first coil 71 is configured to apply a magnetic field to the MR elements 50 (multiple first MR elements) corresponding to the resistive parts R11 and R14. The first coil 72 is configured to apply a magnetic field to the MR elements 50 (multiple first MR elements) corresponding to the resistive parts R12 and R13.

[0055] The first coil 71 is composed of multiple coil portions, including a coil portion configured to generate a magnetic field in a first direction applied to the MR element 50 (multiple first MR elements) corresponding to the resistor R11, and a coil portion configured to generate a magnetic field in a first direction applied to the MR element 50 (multiple first MR elements) corresponding to the resistor R14. The first coil 72 is composed of multiple coil portions, including a coil portion configured to generate a magnetic field in a second direction applied to the MR element 50 (multiple first MR elements) corresponding to the resistor R13, and a coil portion configured to generate a magnetic field in a second direction applied to the MR element 50 (multiple first MR elements) corresponding to the resistor R12.

[0056] Here, with reference to Figure 11, the arrangement of resistors R21-R24 and R31-R34 in the second chip 3 will be explained. In Figure 11, the region where the resistors R21 and R31 are located is indicated by the symbols R21 and R31, the region where the resistors R22 and R32 are located is indicated by the symbols R22 and R32, the region where the resistors R23 and R33 are located is indicated by the symbols R23 and R33, and the region where the resistors R24 and R34 are located is indicated by the symbols R24 and R34. In the example shown in Figure 11, the resistors R21 and R31 and the resistors R22 and R32 are arranged in this order in the Y direction. The resistors R23 and R33 are located ahead of the resistors R22 and R32 in the -X direction. The resistors R24 and R34 are positioned ahead of the resistors R21 and R31 in the -X direction.

[0057] As shown in Figure 11, the second coil 81 is configured to apply a magnetic field to the MR elements 50 (multiple second MR elements) corresponding to the resistive sections R22, R23, R32, and R33. The second coil 82 is configured to apply a magnetic field to the MR elements 50 (multiple second MR elements) corresponding to the resistive sections R21, R24, R31, and R34.

[0058] The second coil 81 is composed of multiple coil portions, including a coil portion configured to generate a magnetic field in a first direction applied to MR elements 50 (multiple second MR elements) corresponding to the resistive portions R22 and R32, and a coil portion configured to generate a magnetic field in a first direction applied to MR elements 50 (multiple second MR elements) corresponding to the resistive portions R23 and R33. The second coil 82 is composed of multiple coil portions, including a coil portion configured to generate a magnetic field in a second direction applied to MR elements 50 (multiple second MR elements) corresponding to the resistive portions R24 and R34, and a coil portion configured to generate a magnetic field in a second direction applied to MR elements 50 (multiple second MR elements) corresponding to the resistive portions R21 and R31.

[0059] Referring to Figures 12 to 14, the structure of the first coils 71 and 72 of the first coil group 70 will be further described. Each of the first coils 71 and 72 has a plurality of upper coil elements 70A, a plurality of lower coil elements 70B, and a plurality of connecting parts 70C that connect the plurality of upper coil elements 70A and the plurality of lower coil elements 70B. The plurality of upper coil elements 70A are arranged in a direction parallel to the Y direction. The plurality of lower coil elements 70B are arranged in a direction parallel to the Y direction. In addition, each of the plurality of upper coil elements 70A and the plurality of lower coil elements 70B includes at least one conductive layer extending in a direction parallel to the X direction. The plurality of connecting parts 70C connect the plurality of upper coil elements 70A and the plurality of lower coil elements 70B so that the upper coil elements 70A and the plurality of lower coil elements 70B are connected alternately.

[0060] Furthermore, multiple MR elements 50 (multiple first MR elements) are arranged between multiple upper coil elements 70A and multiple lower coil elements 70B. At least one conductor layer is arranged so as to overlap with at least one MR element 50 (multiple first MR elements) when viewed from the Z direction.

[0061] In the examples shown in Figures 10, 12 to 14, each of the first coils 71 and 72 has two upper coil elements 70A, two lower coil elements 70B, and three connecting parts 70C. One of the two lower coil elements 70B of the first coil 71 and one of the two lower coil elements 70B of the first coil 72 are connected to each other. Each of the two upper coil elements 70A contains two upper conductor layers that extend in a direction parallel to the X direction and are connected in parallel. Each of the two lower coil elements 70B contains twelve lower conductor layers that extend in a direction parallel to the X direction and are connected in parallel to each other. Each of the two upper conductor layers is arranged to overlap with six lower conductor layers when viewed from the Z direction. Note that the number of lower and upper conductor layers is not limited to the above examples and can be arbitrary. The number of lower and upper conductor layers in the Z direction can also be arbitrary. The lower conductor layer (upper conductor layer) may extend in a direction parallel to the Z direction and be connected in parallel. Figure 25 is a cross-sectional view showing a modified example in which the arrangement of the first coil 71 is changed in Figure 13. In Figure 25, the first coil 71 has a set of upper coil elements 70A (first upper conductor layer) and upper coil elements 170A (second upper conductor layer) arranged in a direction parallel to the Z direction. The first coil 71 also has a set of lower coil elements 70B (first lower conductor layer) and lower coil elements 170B (second lower conductor layer) arranged in a direction parallel to the Z direction.

[0062] The first coil 71 and the first coil 72 are configured to apply magnetic fields in opposite directions to the MR element 50 (multiple first MR elements). The first coil 71 applies a magnetic field in the -Y direction or the Y direction to the MR element 50 (multiple first MR elements) corresponding to the resistors R11 and R14. The first coil 72 applies a magnetic field in the Y direction or the -Y direction to the MR element 50 (multiple first MR elements) corresponding to the resistors R12 and R13.

[0063] Although not shown in the diagram, the second coils 81 and 82 of the second coil group 80 have the same structure as the first coils 71 and 72 of the first coil group 70. That is, each of the second coils 81 and 82 has a plurality of upper coil elements, a plurality of lower coil elements, and a plurality of connecting parts that connect the plurality of upper coil elements and the plurality of lower coil elements. The plurality of upper coil elements are arranged in a direction parallel to the Y direction. The plurality of lower coil elements are arranged in a direction parallel to the Y direction. In addition, each of the plurality of upper coil elements and the plurality of lower coil elements includes at least one conductive layer extending in a direction parallel to the X direction. The plurality of connecting parts connect the plurality of upper coil elements and the plurality of lower coil elements so that the upper coil elements and lower coil elements are connected alternately.

[0064] Furthermore, multiple MR elements 50 (multiple second MR elements) are arranged between multiple upper coil elements and multiple lower coil elements. At least one conductor layer is arranged so as to overlap with at least one MR element 50 (multiple second MR elements) when viewed from the Z direction.

[0065] In the examples shown in Figures 11 to 14, each of the second coils 81 and 82 has four upper coil elements, four lower coil elements, and seven connection points. One of the four lower coil elements of the second coil 81 and one of the four lower coil elements of the second coil 82 are connected to each other. Each of the four upper coil elements contains two upper conductor layers that extend in a direction parallel to the X direction and are connected in parallel. Each of the four lower coil elements contains twelve lower conductor layers that extend in a direction parallel to the X direction and are connected in parallel to each other. Each of the two upper conductor layers is arranged to overlap with six lower conductor layers when viewed from the Z direction. Note that the number of lower and upper conductor layers is not limited to the above example and is arbitrary. The number of lower and upper conductor layers in the Z direction is also arbitrary. The lower conductor layers (upper conductor layers) may extend in a direction parallel to the Z direction and be connected in parallel. For example, referring to Figure 25 above, the second coil 81 may have a set of first upper coil elements (first upper conductor layer) and second upper coil elements (second upper conductor layer) arranged in a direction parallel to the Z direction. Alternatively, the second coil 81 may have a set of second lower coil elements (first lower conductor layer) and second lower coil elements (second lower conductor layer) arranged in a direction parallel to the Z direction.

[0066] The second coil 81 and the second coil 82 are configured to apply magnetic fields in opposite directions to the MR element 50 (multiple second MR elements). The second coil 81 applies a magnetic field in the -Y direction or the Y direction to the MR element 50 (multiple second MR elements) corresponding to the resistors R22, R23, R32, and R33. The second coil 82 applies a magnetic field in the Y direction or the -Y direction to the MR element 50 (multiple second MR elements) corresponding to the resistors R21, R24, R31, and R34.

[0067] Figure 15 is a plan view showing a part of the first chip 2. The first chip 2 has a support member 22 made of an insulating material. Multiple MR elements 50 (multiple first MR elements), multiple lower electrodes 61 (not shown), and multiple upper electrodes 62 (not shown) are arranged on the upper surface of the support member 22. The MR elements 50 (multiple first MR elements) provided in the first detection circuit 10 are arranged so that multiple elements are lined up in the U direction and multiple elements are lined up in the V direction. The multiple MR elements 50 (multiple first MR elements) are connected in series by multiple lower electrodes 61 and multiple upper electrodes 62 (see Figure 7). Any two adjacent MR elements 50 (multiple first MR elements) in the U direction may be offset in a direction parallel to the V direction when viewed from the Z direction.

[0068] Each of the multiple upper coil elements 70A of the first coils 71 and 72 are positioned on the support member 22 and on the multiple MR elements 50 (multiple first MR elements), multiple lower electrodes 61, and multiple upper electrodes 62. Each of the multiple lower coil elements 70B of the first coils 71 and 72 are positioned between a substrate (not shown) and the support member 22. Each of the multiple connection portions 70C of the first coils 71 and 72 are provided so as to penetrate the support member 22.

[0069] Figure 16 is a plan view showing a part of the second chip 3. Figure 17 is a cross-sectional view showing a part of the second chip 3. The second chip 3 has a support member 32 made of an insulating material. A plurality of MR elements 50 (a plurality of second MR elements), a plurality of lower electrodes 61 (not shown), and a plurality of upper electrodes 62 (not shown) are arranged on the upper surface of the support member 32. The support member 32 has a plurality of convex surfaces 32c that extend in the U direction and are arranged at predetermined intervals in the V direction. The convex surfaces 32c have an inclined surface 32a that becomes higher in the Z direction as it proceeds in the -V direction, and an inclined surface 32b that becomes higher in the Z direction as it proceeds in the V direction, and have a shape that connects the tops of the inclined surfaces 32a and 32b. The inclined surfaces 32a and 32b may be flat or curved. Between adjacent convex surfaces 32c (inclined surface 32a and inclined surface 32b) in the V direction, there is a flat portion 32d that extends in the U direction and includes multiple parts parallel to the XY plane.

[0070] The convex surface 32c may be a protruding surface formed on the upper surface of the support member 32. Alternatively, the convex surface 32c may be the surface of a groove formed on the upper surface of the support member 32. In this case, the flat portion 32d becomes the bottom surface of the groove.

[0071] Multiple MR elements 50 (multiple second MR elements) provided in the second detection circuit 20 are arranged on the inclined surface 32a in a row in the U direction. Multiple MR elements 50 (multiple second MR elements) provided in the third detection circuit 30 are arranged on the inclined surface 32b in a row in the U direction. One MR element 50 placed on the inclined surface 32a and another MR element 50 adjacent to this one MR element 50 and placed on the inclined surface 32b may be offset in a direction parallel to the U direction when viewed from the Z direction.

[0072] Each of the upper coil elements of the second coils 81 and 82 are positioned on the support member 32 and on the multiple MR elements 50 (multiple second MR elements), the multiple lower electrodes 61, and the multiple upper electrodes 62. Each of the lower coil elements of the second coils 81 and 82 are positioned between a substrate (not shown) and the support member 32. Each of the multiple connection portions of the second coils 81 and 82 are provided so as to penetrate the support member 32.

[0073] Figure 18 is an enlarged plan view showing the configuration of multiple first electrode pads 21 on the first chip 2, multiple second electrode pads 31 on the second chip 3, and multiple third electrode pads 41 on the support 4.

[0074] The first chip 2 has two ends 2c, 2d located at both ends in a direction parallel to the X direction, and two ends 2e, 2f located at both ends in a direction parallel to the Y direction. End 2c is located at the -X end of the first chip 2. End 2d is located at the X end of the first chip 2. End 2e is located at the Y end of the first chip 2. End 2f is located at the -Y end of the first chip 2. The four ends 2c to 2f are also the four sides connecting the upper surface 2a and the lower surface of the first chip 2.

[0075] The magnetic sensor 1 has multiple first electrode pads 21 as multiple sensor terminals provided on the first chip 2. The multiple first electrode pads 21 of the first chip 2 consist of six first electrode pads 21A, 21B, 21C, 21D, 21E, and 21F. Three first electrode pads 21A to 21C and three first electrode pads 21D to 21F are arranged to be spaced apart in the X direction and aligned in the Y direction.

[0076] The first electrode pads 21D and 21E are multiple (two) signal terminals. The first electrode pads 21A, 21B, 21C, and 21F are multiple (four) power terminals. The first electrode pads 21D to 21F are located on the end 2c side of the first chip 2. The first electrode pads 21D to 21F are arranged in this order in the -Y direction along the end 2c of the first chip 2.

[0077] The first electrode pads 21A to 21C are located on the end 2d side of the first chip 2. The first electrode pads 21A to 21C are arranged in this order in the -Y direction along the end 2d side of the first chip 2. In the first chip 2, the number of terminals located on the end 2c side of the first chip 2 is the same as the number of terminals located on the end 2d side of the first chip 2 (3 each).

[0078] The second chip 3 has two ends 3c, 3d located at both ends in a direction parallel to the X direction, and two ends 3e, 3f located at both ends in a direction parallel to the Y direction. End 3c is located at the -X end of the second chip 3. End 3d is located at the X end of the second chip 3. End 3e is located at the Y end of the second chip 3. End 3f is located at the -Y end of the second chip 3. The four ends 3c to 3f are also the four sides connecting the upper surface 3a and the lower surface of the second chip 3.

[0079] The magnetic sensor 1 has multiple second electrode pads 31 as multiple sensor terminals provided on the second chip 3. The multiple second electrode pads 31 of the second chip 3 consist of 12 second electrode pads 31A, 31B, 31C, 31D, 31E, 31F, 31G, 31H, 31I, 31J, 31K, and 31L. The six second electrode pads 31A to 31F and the six second electrode pads 31G to 31L are arranged to be spaced apart in the X direction and aligned in the Y direction.

[0080] The second electrode pads 31I, 31J, 31K, and 31L are multiple (four) signal terminals. The second electrode pads 31A, 31B, 31C, 31D, 31E, 31G, and 31H are multiple (seven) power terminals. The second electrode pad 31F is an electrode pad (dummy pad) that does not correspond to either a signal terminal or a power terminal. The second electrode pads 31G to 31L are located on the end 3c side of the second chip 3. The second electrode pads 31G to 31L are arranged in this order in the -Y direction along the end 3c of the second chip 3.

[0081] The second electrode pads 31A to 31F are located on the end 3d side of the second chip 3. The second electrode pads 31A to 31F are arranged in this order in the -Y direction along the end 3d side of the second chip 3. In the second chip 3, the number of terminals located on the end 3c side of the second chip 3 is the same as the number of terminals located on the end 3d side of the second chip 3 (6 each).

[0082] The first chip 2 and the second chip 3 are arranged in this order along the Y direction. The first chip 2 and the second chip 3 are arranged such that the first electrode pad 21C of the first chip 2 and the second electrode pad 31A of the second chip 3 are adjacent to each other, and the first electrode pad 21F of the first chip 2 and the second electrode pad 31G of the second chip 3 are adjacent to each other.

[0083] The first chip 2 has 6 first electrode pads 21. The second chip 3 has 12 second electrode pads 31, which is more than the number of first electrode pads 21 on the first chip 2.

[0084] The support 4 has two ends 4c, 4d located at both ends in a direction parallel to the X direction, and two ends 4e, 4f located at both ends in a direction parallel to the Y direction. End 4c is located at the -X end of the support 4. End 4d is located at the X end of the support 4. End 4e is located at the Y end of the support 4. End 4f is located at the -Y end of the support 4. The four ends 4c to 4f are also the four sides connecting the reference plane 4a and the bottom surface of the support 4.

[0085] The signal processing circuit 40 has a plurality of third electrode pads 41 as a plurality of circuit terminals provided on the support 4. The plurality of third electrode pads 41 of the support 4 consist of 14 third electrode pads 41A, 41B, 41C, 41D, 41E, 41F, 41G, 41H, 41I, 41J, 41K, 41L, 41M, and 41N. The seven third electrode pads 41A to 41G and the third electrode pads 41H to 41N are arranged to be spaced apart in the X direction and aligned in the Y direction.

[0086] The third electrode pads 41H, 41I, 41K, 41L, 41M, and 41N are multiple (6) signal terminals. The third electrode pads 41A, 41B, 41C, 41D, 41E, 41F, and 41J are multiple (7) power terminals. The third electrode pad 41G is an electrode pad that does not correspond to either a signal terminal or a power terminal (dummy pad). The third electrode pads 41H to 41N are located on the end 4c side of the support 4. The third electrode pads 41H to 41N are arranged in this order in the -Y direction along the end 4c of the support 4.

[0087] The third electrode pads 41A to 41G are positioned on the end 4d side of the support 4. The third electrode pads 41A to 41G are arranged in this order in the -Y direction along the end 4d of the support 4.

[0088] The first and second chips 2 and 3 are positioned between the third electrode pads 41A to 41G and the third electrode pads 41H to 41N.

[0089] Next, the connection relationships between multiple electrode pads will be described. Any two of the multiple electrode pads are connected by a conductor, such as a bonding wire or a redistribution layer (RDL). In Figure 18, the conductor is omitted.

[0090] The first electrode pads 21A and 21B, which are power supply terminals of the first chip 2, are connected to the third electrode pads 41A and 41B, which are power supply terminals of the support 4, respectively. The first electrode pads 21D and 21E, which are signal terminals of the first chip 2, are connected to the third electrode pads 41H and 41I, which are signal terminals of the support 4, respectively. The first electrode pads 21C and 21F, which are power supply terminals of the first chip 2, are connected to the second electrode pads 31A and 31G, which are power supply terminals of the second chip 3, respectively.

[0091] The second electrode pads 31B, 31C, 31D, and 31E, which are power supply terminals of the second chip 3, are connected to the third electrode pads 41C, 41D, 41E, and 41F, which are power supply terminals of the support 4, respectively. The second electrode pad 31H, which is a power supply terminal of the second chip 3, is connected to the third electrode pad 41J, which is a power supply terminal of the support 4. The second electrode pads 31I, 31J, 31K, and 31L, which are signal terminals of the second chip 3, are connected to the third electrode pads 41K, 41L, 41M, and 41N, which are signal terminals of the support 4, respectively.

[0092] The second electrode pad 31F of the second chip 3 may or may not be connected to the third electrode pad 41G of the support 4.

[0093] Next, the relationship between the multiple terminals and the circuit components shown in Figures 3 to 6 will be explained. The first electrode pads 21D and 21E, which are signal terminals, and the first electrode pads 21B and 21F, which are power supply terminals, provided on the first chip 2 are electrically connected to the first detection circuit 10 shown in Figure 4. The first electrode pads 21D and 21E are electrically connected to the signal output terminals E11 and E12, respectively. The first electrode pad 21B is electrically connected to the power supply terminal V1. The first electrode pad 21F is electrically connected to the ground terminal G1. The first electrode pads 21A and 21C, provided on the first chip 2, are connected to the first coil group 70 shown in Figure 3 and are used as terminals for the coils.

[0094] The second electrode pads 31I to 31L, which are signal terminals, and the second electrode pads 31D, 31E, 31G, and 31H, which are power supply terminals, provided on the second chip 3 are electrically connected to the second detection circuit 20 shown in Figure 5 and the third detection circuit 30 shown in Figure 6. The second electrode pads 31I to 31L are electrically connected to the signal output terminals E21, E22, E31, and E32, respectively. The second electrode pads 31D and 31E are electrically connected to the power supply terminals V2 and V3, respectively. The second electrode pads 31G and 31H are both electrically connected to both the ground terminals G2 and G3. The second electrode pads 31A to 31C, provided on the second chip 3, are connected to the second coil group 80 shown in Figure 3 and are used as terminals for the coils.

[0095] The first electrode pad 21F and the second electrode pads 31G, 31H are electrically connected to the third electrode pad 41J of the support 4. The first electrode pad 21F, the second electrode pads 31G, 31H, and the third electrode pad 41J are connected to ground.

[0096] Here, the third electrode pad 41B of the support 4 is a power supply pad (first power supply pad) for a bridge circuit that drives the first detection circuit 10 (applies voltage or current to the power supply terminal V1 in Figure 4). The third electrode pad 41C of the support 4 is a power supply pad (second power supply pad) for a bridge circuit that drives the second detection circuit 20 (applies voltage or current to the power supply terminal V2 in Figure 5). The third electrode pad 41D of the support 4 is a power supply pad (third power supply pad) for a bridge circuit that drives the third detection circuit 30 (applies voltage or current to the power supply terminal V3 in Figure 6).

[0097] Furthermore, one of the third electrode pads 41A, 41E of the support 4 is a power supply pad (fourth power supply pad) for driving coils (first and second coil groups 70, 80) that apply a magnetic field to the magnetoresistive element (MR element 50). The other of the third electrode pads 41A, 41E is a ground pad connected to ground. In the following description, unless otherwise specified, the third electrode pad 41A is the power supply pad (fourth power supply pad) and the third electrode pad 41E is the ground pad.

[0098] Referring to Figure 9, the first coils 71 and 72 of the first coil group 70 are driven by a drive current supplied from the first electrode pad 21A of the first chip 2 to the first electrode pad 21C via the third electrode pad 41A of the support 4, and then the second coils 81 and 82 of the second coil group 80 are driven by a drive current supplied from the second electrode pad 31A of the second chip 3 to the second electrode pad 31D.

[0099] The support body 4 has four power pads, at least one of which are power pads: first, second, and third power pads 41B, 41C, and 41D for driving the detection circuit, and a fourth power pad 41A for driving the coil.

[0100] The second chip 3 has a second electrode pad 31D, which is an electrode pad connected to the ground pad (the third electrode pad 41E of the support 4). On the other hand, the first chip 2 does not have an electrode pad connected to the ground pad (the third electrode pad 41E of the support 4).

[0101] The magnetic sensor device 100 of this embodiment includes a first chip 2 containing a plurality of first MR elements (a plurality of MR elements 50 of the first detection circuit 10). The magnetic sensor device 100 also includes a second chip 3 containing a plurality of second MR elements (a plurality of MR elements 50 of the second detection circuit 20 and the third detection circuit 30). The magnetic sensor device 100 also includes a support 4 that supports the first chip 2 and the second chip 3. The magnetic sensor device 100 also includes a first coil group 70 containing at least one first coil configured to apply a magnetic field to the plurality of first MR elements. The magnetic sensor device 100 also includes a second coil group 80 containing at least one second coil configured to apply a magnetic field to a plurality of second MR elements.

[0102] The support 4 has at least one power pad (first, second, third, and fourth power pads 41B, 41C, 41D, and 41A) and a ground pad 41E.

[0103] The first coil group 70 has a first end (the portion corresponding to the first electrode pad 21A, the first coil 71) connected to at least one power pad (for example, a fourth power pad 41A for driving the coils), and a second end (the portion corresponding to the first electrode pad 21C, the first coil 72) located at the end opposite to the first end.

[0104] The second coil group 80 has a third end (the part corresponding to the second electrode pad 31A, the second coil 81) connected to the second end (the part corresponding to the first electrode pad 21C, the first coil 72) of the first coil group 70, and a fourth end (the part corresponding to the second electrode pad 31D, the second coil 82) located on the opposite end from the third end and connected to the ground pad 41E.

[0105] Furthermore, the number of power pads is less than or equal to the total number of at least one first coil and at least one second coil. More specifically, the at least one power pad consists of four power pads: the first, second, and third power pads 41B, 41C, and 41D for driving the detection circuit, and the fourth power pad 41A for driving the coil. In contrast, the at least one first coil and at least one second coil consists of four coils: the first coils 71 and 72 of the first coil group 70, and the second coils 81 and 82 of the second coil group 80.

[0106] This enables miniaturization of the magnetic sensor device 100 and optimization of its operation under relatively strong ambient magnetic fields. Examples of operation under ambient magnetic fields include set-reset operation using coils and self-test operation. The set-reset operation is an operation that enables more accurate detection of the target magnetic field by aligning the magnetization of the free layer 54 in each MR element in a predetermined direction before performing the target magnetic field detection operation. The self-test operation is an operation that confirms that the magnetic sensor device 100 is operating normally and verifies its sensitivity and offset before performing the target magnetic field detection operation.

[0107] In this embodiment, the magnetic sensor device 100 can be miniaturized by connecting the first coils 71 and 72 of the first coil group 70 and the second coils 81 and 82 of the second coil group 80, thereby reducing the number of electrode pads and switches. For example, when the drive circuit 45 is composed of an application-specific integrated circuit (ASIC), the voltage that the ASIC can apply is generally fixed, so it is necessary to reduce the overall resistance of the circuit. In this embodiment, as described above, by making the number of at least one power pads less than or equal to the total number of at least one first coil and at least one second coil, the number of switches can be reduced, the size of the ASIC can be reduced, and the resistance within the ASIC can be reduced. In particular, by shortening the length of each connected coil (the first coils 71 and 72 of the first coil group 70 and the second coils 81 and 82 of the second coil group 80), the resistance of each coil can be reduced, and the current value that can flow through each coil can be increased. Furthermore, by increasing the magnetic field that can be applied from the coil to the MR element 50, suitable set / reset and self-test operations can be achieved even under strong environmental magnetic fields.

[0108] Here, the effects of the magnetic sensor device 100 of this embodiment will be explained in comparison with the magnetic sensor device of the comparative example. Figure 19 is a circuit diagram (corresponding to Figure 9) showing the circuit configuration of the first coil group and the second coil group of the magnetic sensor device of the comparative example. The magnetic sensor device of the comparative example includes a first coil group 170 and a second coil group 180. In Figure 19, the first coil group 170, which includes two first coils 171 and 172, and the second coil group 180, which includes two second coils 181 and 182, are depicted.

[0109] In the comparative example shown in Figure 19, a switch 146 is provided to drive the first coil group 170 (two first coils 171 and 172), and two switches 147 and 148 are provided to drive the two second coils 181 and 182 of the second coil group 180, respectively. As a result, the magnetic sensor device inevitably becomes larger. Furthermore, in the comparative example, as the magnetic sensor device becomes larger, the length of each coil increases, and the resistance of each coil increases. Therefore, it is not possible to increase the current value that can flow through each coil, and consequently the magnetic field that can be applied from each coil to the MR element. Consequently, in the comparative example, suitable set / reset operations and self-test operations under strong environmental magnetic fields become difficult.

[0110] In contrast, according to this embodiment shown in Figure 9, the first coil group 70 (two first coils 71 and 72) and the second coil group 80 (two second coils 81 and 82) connected in series can be driven and controlled by a single switch 46 of the drive circuit 45. As a result, according to this embodiment, as described above, the magnetic sensor device 100 can be miniaturized, and suitable set / reset and self-test operations can be achieved even under strong environmental magnetic fields.

[0111] [Second Embodiment] Next, a second embodiment of the present disclosure will be described with reference to Figure 20. Figure 20 is a plan view showing a portion of the second chip 3 in this embodiment. The plan view in Figure 20 corresponds to the plan view in Figure 11 in the first embodiment.

[0112] Similar to the first embodiment, the second coil 81 of the second coil group 80 is configured to apply a magnetic field to the MR elements 50 (multiple second MR elements) corresponding to the resistive sections R22, R23, R32, and R33. Furthermore, the second coil 82 of the second coil group 80 is configured to apply a magnetic field to the MR elements 50 (multiple second MR elements) corresponding to the resistive sections R21, R24, R31, and R34.

[0113] In this embodiment, the arrangement of resistors R21-R24 and R31-R34 in the second chip 3 differs from the example shown in Figure 11 in the first embodiment. In the example shown in Figure 20, resistors R21-R24 and R31-R34 are arranged such that the pairs of resistors R22 and R32, R23 and R33, R21 and R31, and R24 and R34 are arranged in this order in the -Y direction.

[0114] Furthermore, in the example shown in Figure 20, the coil portion of the second coil 81 configured to generate a magnetic field in a first direction applied to the MR elements 50 (multiple second MR elements) corresponding to the resistors R22 and R32, the coil portion of the second coil 81 configured to generate a magnetic field in a first direction applied to the MR elements 50 (multiple second MR elements) corresponding to the resistors R23 and R33, the coil portion of the second coil 82 configured to generate a magnetic field in a second direction applied to the MR elements 50 (multiple second MR elements) corresponding to the resistors R21 and R31, and the coil portion of the second coil 82 configured to generate a magnetic field in a second direction applied to the MR elements 50 (multiple second MR elements) corresponding to the resistors R24 and R34 are arranged in this order in the Y direction.

[0115] Other configurations, operations, and effects in this embodiment are the same as those in the first embodiment.

[0116] [Third Embodiment] Next, a third embodiment of the present disclosure will be described with reference to Figure 21. Figure 21 is a plan view showing a magnetic sensor device 200 according to this embodiment. The plan view in Figure 21 corresponds to the plan view in Figure 2 of the first embodiment.

[0117] In this embodiment, the positional relationship between the first chip 2 and the second chip 3 is reversed compared to the example shown in Figure 2 of the first embodiment. Accordingly, in this embodiment, the first end of the first coil group 70 (the portion corresponding to the first electrode pad 21A (see Figure 18), the first coil 71 (see Figures 9 and 10)) is connected to the ground pad (the third electrode pad 41E of the support 4 (see Figure 18)). Also, the fourth end of the second coil group 80 (the portion corresponding to the second electrode pad 31D (see Figure 18), the second coil 82 (see Figures 9 and 11)) is connected to the power supply pad for coil driving (for example, the fourth power supply pad 41A of the support 4 (see Figure 18)).

[0118] The functions of the multiple third electrode pads 41 on the support 4, excluding the third electrode pads 41A and 41E, may be appropriately rearranged depending on the positional relationship between the first chip 2 and the second chip 3. The other configurations, operations, and effects in this embodiment are the same as in the first embodiment.

[0119] [Fourth Embodiment] Next, a fourth embodiment of the present disclosure will be described with reference to Figures 22 to 24. Figure 22 is a plan view showing a magnetic sensor device 300 according to this embodiment. Figure 23 is a circuit diagram showing the circuit configuration of the second detection circuit 120 in this embodiment. Figure 24 is a plan view showing a part of the second chip 102 in this embodiment.

[0120] In this embodiment, a second chip 102 is provided in place of the second chip 3 in the first embodiment shown in Figure 2. The magnetic sensor 1 is composed of the first chip 2 and the second chip 102. The configuration of the second chip 102 is basically the same as that of the first chip 2. That is, the second chip 102 has a rectangular parallelepiped shape. The second chip 102 has an upper surface 102a and a lower surface located on opposite sides, and four sides connecting the upper surface 102a and the lower surface. The second chip 102 is mounted on the reference plane 4a of the support 4 with its lower surface facing the reference plane 4a.

[0121] The second chip 102 has a plurality of second electrode pads 121 provided on its upper surface 102a. In Figure 22, the plurality of second electrode pads are denoted by the representative reference numeral 121, but the plurality of second electrode pads 121 have six second electrode pads, similar to the plurality of first electrode pads 21. In other words, the first chip 2 and the second chip 102 have the same (common) chip structure (electrode pad structure).

[0122] As shown in Figure 23, the second chip 102 includes a second detection circuit 120. The second detection circuit 120 is configured to detect a component of the target magnetic field parallel to the V direction and to generate at least one second detection signal corresponding to this component. The configuration of the second detection circuit 120 is basically the same as that of the first detection circuit 10 of the first chip 2. That is, the second detection circuit 120 is a bridge circuit including a power supply terminal V12, a ground terminal G12, signal output terminals E111, E112, and resistors R111, R112, R113, R114. The multiple MR elements 50 (see Figure 8) of the second detection circuit 120 constitute the resistors R111, R112, R113, R114.

[0123] Resistor R111 is located between the power supply terminal V12 and the signal output terminal E111. Resistor R112 is located between the signal output terminal E111 and the ground terminal G13. Resistor R113 is located between the signal output terminal E112 and the ground terminal G13. Resistor R114 is located between the power supply terminal V12 and the signal output terminal E112. A predetermined voltage or current is applied to the power supply terminal V12. The ground terminal G12 is connected to ground.

[0124] The second detection circuit 120 is configured to generate two second detection signals: one corresponding to the potential at signal output terminal E111 and the other to the potential at signal output terminal E112. The signal processing circuit 40 (see Figure 3) is configured to generate a second detection value Sv based on the two second detection signals. The second detection value Sv is the detection value corresponding to the component of the target magnetic field in a direction parallel to the V direction.

[0125] Figure 23 schematically shows one MR element 50 as a figure representing the resistive sections R111 to R114. In Figure 23, the filled arrows represent the direction of magnetization of the magnetization fixed layer 52 (see Figure 8) of the MR element 50. The open arrows represent the direction of magnetization of the free layer 54 (see Figure 8) of the MR element 50 when no target magnetic field is applied to the MR element 50.

[0126] In the example shown in Figure 23, the magnetization direction of the magnetization fixed layer 52 of the MR element 50 in each of the resistive sections R111 and R113 is in the -V direction. The magnetization direction of the magnetization fixed layer of the MR element 50 in each of the resistive sections R112 and R114 is in the V direction. Furthermore, the magnetization direction of the free layer 54 of the MR element 50 when no target magnetic field is applied in each of the resistive sections R111 and R114 is in the U direction. The magnetization direction of the free layer 54 of the MR element 50 when no target magnetic field is applied in each of the resistive sections R22 and R23 is in the -U direction.

[0127] In the following, the multiple MR elements of the second detection circuit 120 may be referred to as "multiple second MR elements."

[0128] As shown in Figure 24, in this embodiment, the magnetic sensor 1 includes a second coil group, which includes two second coils 73 and 74, instead of the second coil group 80 in the first embodiment. The second coil 73 is configured to apply a magnetic field to the MR elements 50 (multiple second MR elements) corresponding to the resistive parts R111 and R114. The second coil 74 is configured to apply a magnetic field to the MR elements 50 (multiple second MR elements) corresponding to the resistive parts R112 and R113. The second coil group is made of a conductive material such as Cu.

[0129] Now, with reference to Figure 24, the arrangement of resistors R111 to R114 in the second chip 102 will be explained. In Figure 24, the region where resistor R111 is located is indicated by the symbol R111, the region where resistor R112 is located is indicated by the symbol R112, the region where resistor R113 is located is indicated by the symbol R113, and the region where resistor R114 is located is indicated by the symbol R114. In the example shown in Figure 24, resistors R111 and R112 are arranged in this order in the -Y direction. Resistors R113 and R114 are located ahead of resistors R112 and R111 in the -X direction, respectively.

[0130] The second coil 73 is composed of multiple coil portions, including a coil portion configured to generate a magnetic field in a first direction applied to the MR element 50 (multiple second MR elements) corresponding to the resistor R111, and a coil portion configured to generate a magnetic field in a first direction applied to the MR element 50 (multiple second MR elements) corresponding to the resistor R114. The second coil 74 is composed of multiple coil portions, including a coil portion configured to generate a magnetic field in a second direction applied to the MR element 50 (multiple second MR elements) corresponding to the resistor R113, and a coil portion configured to generate a magnetic field in a second direction applied to the MR element 50 (multiple second MR elements) corresponding to the resistor R112.

[0131] The second coil 73 and the second coil 74 are configured to apply magnetic fields in opposite directions to the MR element 50 (multiple second MR elements). The second coil 73 applies a magnetic field in the -Y direction or the Y direction to the MR element 50 (multiple second MR elements) corresponding to the resistors R111 and R114. The second coil 74 applies a magnetic field in the Y direction or the -Y direction to the MR element 50 (multiple first MR elements) corresponding to the resistors R112 and R113.

[0132] Other configurations, operations, and effects in this embodiment are the same as those in the first embodiment.

[0133] [Fifth Embodiment] Figure 26 is a plan view showing a magnetic sensor device 400 in a fifth embodiment of the present disclosure. In the magnetic sensor device 400 of Figure 26, the first chip 2 and the second chip 3 are not separated but formed as a single chip (1 chip) 103, and this single chip 103 can be supported on the support 4. Furthermore, the single chip 103, which is provided with a plurality of electrode pads 131 that integrate the first electrode pad 21 of the first chip 2 and the second electrode pad 31 of the second chip 3, is supported on the support 4. By forming a single chip without separating the first chip 2 and the second chip 3, the plurality of electrode pads 131 can be reduced (omitted) by one coil terminal and one sensor terminal each, rather than being a simple sum of the first electrode pad 21 of the first chip 2 and the second electrode pad 31 of the second chip 3. The magnetic sensor device 400 includes a chip containing a plurality of magnetoresistive elements, a support for the chip, and a group of coils containing a plurality of coils configured to apply a magnetic field to the plurality of magnetoresistive elements. Furthermore, the support has at least one power pad and a ground pad. The coil group has a first end connected to at least one power pad and a second end located on the opposite end from the first end and connected to a ground pad. The number of at least one power pad is less than or equal to the total number of coils.

[0134] From another perspective, the magnetic sensor device comprises a chip containing multiple magnetoresistive elements, a support for the chip, a group of coils containing multiple coils configured to apply a magnetic field to the multiple magnetoresistive elements, and a group of bridge circuits composed of the multiple magnetoresistive elements. The support also has a group of first power pads for the bridge circuits and at least one second power pad for the group of coils. The number of at least one second power pad is less than the number of first power pads.

[0135] Furthermore, in the magnetic sensor device of this disclosure, the components that were previously provided on the first chip 2 and the second chip 3 (first to third detection circuits 10, 20, 30, first and second electrode pads 21, 31, first and second coil groups 70, 80, etc.) can be provided on the support 4 to form a monolithic type integrated into a single chip.

[0136] Furthermore, in the magnetic sensor device of this disclosure, the first coil group 70 and the second coil group 80 may be configured to generate an alternating magnetic field.

[0137] As described above, a magnetic sensor device according to a first aspect of the present disclosure comprises a first chip including a plurality of first magnetoresistive elements, a second chip including a plurality of second magnetoresistive elements, a support for supporting the first chip and the second chip, a first coil group including at least one first coil configured to apply a magnetic field to the plurality of first magnetoresistive elements, and a second coil group including at least one second coil configured to apply a magnetic field to the plurality of second magnetoresistive elements. The support has at least one power pad and a ground pad. The first coil group has a first end connected to at least one power pad and a second end located at the end opposite to the first end. The second coil group has a third end connected to the second end of the first coil group and a fourth end located at the end opposite to the third end and connected to the ground pad. The number of at least one power pad is less than or equal to the total number of at least one first coil and at least one second coil.

[0138] In a magnetic sensor device according to a first aspect of the present disclosure, at least one of the at least one first coil and at least one second coil may be a plurality of coils.

[0139] Furthermore, in the magnetic sensor device of the first aspect of this disclosure, the multiple coils may be connected in series.

[0140] Furthermore, in a magnetic sensor device according to the first aspect of this disclosure, the plurality of coils may include coils configured to generate a magnetic field in a first direction and coils configured to generate a magnetic field in a second direction.

[0141] Furthermore, in the magnetic sensor device of the first aspect of this disclosure, the first coil group may be integrated with the first chip. The second coil group may be integrated with the second chip.

[0142] Furthermore, in the magnetic sensor device of the first aspect of this disclosure, the second chip may have an electrode pad connected to a ground pad. The first chip may not have an electrode pad connected to a ground pad.

[0143] Furthermore, in the magnetic sensor device of the first aspect of this disclosure, a conductor may be provided to connect the second end of the first coil group and the third end of the second coil group.

[0144] Furthermore, in the magnetic sensor device of the first aspect of this disclosure, the device may further include a plurality of bridge circuits composed of a plurality of first magnetoresistive elements and a plurality of second magnetoresistive elements. At least one power supply pad may consist of a plurality of power supply pads for the plurality of bridge circuits and a single power supply pad for the first coil group and the second coil group.

[0145] Furthermore, in a magnetic sensor device according to a first aspect of this disclosure, the support may include a signal processing circuit connected to a plurality of first magnetoresistive elements and a plurality of second magnetoresistive elements, and a drive circuit configured to drive a first group of coils and a second group of coils.

[0146] A magnetic sensor device according to a second aspect of the present disclosure comprises a chip including a plurality of magnetoresistive elements, a support for the chip, and a coil group including a plurality of coils configured to apply a magnetic field to the plurality of magnetoresistive elements. The support has at least one power pad and a ground pad. The coil group has a first end connected to at least one power pad and a second end located on the opposite end from the first end and connected to the ground pad. The number of at least one power pad is less than or equal to the total number of coils.

[0147] Furthermore, the magnetic sensor device of the second aspect of this disclosure may further include at least one bridge circuit composed of a plurality of magnetoresistive elements. The at least one power supply pad may be at least one power supply pad for at least one bridge circuit and one power supply pad for the coil group.

[0148] A magnetic sensor device according to a third aspect of the present disclosure includes a chip containing a plurality of magnetoresistive elements, a support for supporting the chip, a group of coils containing a plurality of coils configured to apply a magnetic field to the plurality of magnetoresistive elements, and a plurality of bridge circuits composed of the plurality of magnetoresistive elements. The support has a plurality of first power pads for the plurality of bridge circuits and at least one second power pad for the group of coils. The number of at least one second power pad is less than the number of the plurality of first power pads. [Explanation of symbols]

[0149] 1…Magnetic sensor, 2…First chip, 3…Second chip, 4…Support, 10…First detection circuit, 20…Second detection circuit, 21…First electrode pad, 21A…First electrode pad (first end), 21B…First electrode pad, 21C…First electrode pad (second end), 21D…First electrode pad, 21E…First electrode pad, 21F…First electrode pad, 30…Third detection circuit, 31…Second electrode pad, 31A…Second electrode pad (third end), 31B…Second electrode pad, 31C…Second electrode pad 31D…Second electrode pad (fourth end), 31E…Second electrode pad, 31F…Second electrode pad (dummy pad), 31G…Second electrode pad, 31H…Second electrode pad, 31I…Second electrode pad, 31J…Second electrode pad, 31K…Second electrode pad, 31L…Second electrode pad, 40…Signal processing circuit (processor), 41…Third electrode pad, 41A…Third electrode pad (power pad, fourth power pad), 41B…Third electrode pad (power pad, first power pad) ,41C...Third electrode pad (power pad, second power pad), 41D...Third electrode pad (power pad, third power pad), 41E...Third electrode pad (ground pad), 41F...Third electrode pad, 41G...Third electrode pad (dummy pad), 41H...Third electrode pad, 41I...Third electrode pad, 41J...Third electrode pad, 41K...Third electrode pad, 41L...Third electrode pad, 41M...Third electrode pad, 41N...Third electrode pad, 45...Drive circuit (processor) S) 46...Switch, 50...MR element (magnetoresistive effect element), 51...Antiferromagnetic layer, 52...Magnetization fixed layer, 53...Gap layer, 54...Free layer, 61...Lower electrode, 62...Upper electrode, 70...First coil group, 70A, 170A...Upper coil element, 70B, 170B...Lower coil element, 70C...Connection part, 71, 72...First coil, 80...Second coil group, 81, 82...Second coil, 100, 200, 300, 400...Magnetic sensor device, 103...Single chip (1 chip), 131...Electrode pad.

Claims

1. A first chip including multiple first magnetoresistive elements, A second chip including multiple second magnetoresistive elements, A support that supports the first chip and the second chip, A first coil group including at least one first coil configured to apply a magnetic field to the plurality of first magnetoresistive elements, A second coil group including at least one second coil configured to apply a magnetic field to the plurality of second magnetoresistive elements, Equipped with, The aforementioned support is At least one power pad, Ground pad and, It has, The first group of coils is, A first end connected to at least one power pad, A second end located at the end opposite to the first end, It has, The second group of coils is, The third end of the first coil group is connected to the second end, A fourth end is located at the end opposite to the third end and is connected to the ground pad, It has, A magnetic sensor device in which the number of the at least one power pad is less than or equal to the total number of the at least one first coil and the at least one second coil.

2. The magnetic sensor device according to claim 1, wherein at least one of the at least one first coil and the at least one second coil is a plurality of coils.

3. The magnetic sensor device according to claim 2, wherein the plurality of coils are connected in series.

4. The magnetic sensor device according to claim 2, wherein the plurality of coils include a coil configured to generate a magnetic field in a first direction and a coil configured to generate a magnetic field in a second direction.

5. The first group of coils is integrated with the first chip, The magnetic sensor device according to claim 1, wherein the second group of coils is integrated with the second chip.

6. The second chip has an electrode pad connected to the ground pad, The magnetic sensor device according to claim 5, wherein the first chip has no electrode pad connected to the ground pad.

7. Furthermore, the magnetic sensor device according to claim 5, further comprising a conductor connecting the second end of the first coil group and the third end of the second coil group.

8. Furthermore, the system includes a plurality of bridge circuits composed of the plurality of first magnetoresistive elements and the plurality of second magnetoresistive elements, The magnetic sensor device according to claim 1, wherein the at least one power supply pad comprises a plurality of power supply pads for the plurality of bridge circuits and a single power supply pad for the first coil group and the second coil group.

9. The aforementioned support is The plurality of first magnetoresistive elements and the plurality of second magnetoresistive elements are connected to a signal processing circuit, A drive circuit configured to drive the first group of coils and the second group of coils, A magnetic sensor device according to claim 1, including the following:

10. A chip including multiple magnetoresistive elements, A support that supports the chip, A group of coils including a plurality of coils configured to apply a magnetic field to the plurality of magnetoresistive elements, Equipped with, The aforementioned support is At least one power pad, Ground pad and, It has, The aforementioned group of coils A first end connected to at least one power pad, A second end located on the opposite end from the first end and connected to the ground pad, It has, A magnetic sensor device in which the number of at least one power pad is less than or equal to the total number of coils.

11. Furthermore, it includes at least one bridge circuit composed of the plurality of magnetoresistive elements, The magnetic sensor device according to claim 10, wherein the at least one power supply pad comprises at least one power supply pad for the at least one bridge circuit and one power supply pad for the coil group.

12. A chip including multiple magnetoresistive elements, A support that supports the chip, A group of coils including a plurality of coils configured to apply a magnetic field to the plurality of magnetoresistive elements, A plurality of bridge circuits composed of the plurality of magnetoresistive elements, Equipped with, The aforementioned support is Multiple first power pads for the multiple bridge circuits, At least one second power pad for the coil group, It has, A magnetic sensor device in which the number of at least one second power pad is less than the number of the plurality of first power pads.

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