Semiconductor switching element drive device

JP2026125360AActive Publication Date: 2026-08-03MITSUBISHI ELECTRIC BUILDING SOLUTIONS CORP +1
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
MITSUBISHI ELECTRIC BUILDING SOLUTIONS CORP
Filing Date
2025-01-22
Publication Date
2026-08-03

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Abstract

This suppresses overcurrent during short circuits in the upper and lower arms, reducing damage to semiconductor switching elements such as IGBTs. [Solution] The system includes a first gate drive unit that applies a voltage to the gate terminal of a first semiconductor switching element to turn the first semiconductor switching element on and off; a second gate drive unit that applies a voltage to the gate terminal of a second semiconductor switching element connected in series with the first semiconductor switching element to turn the second semiconductor switching element on and off; a first isolation transmission unit that detects the voltage at the gate terminal of the first semiconductor switching element on the primary side, and generates a first ON signal on the secondary side when the voltage exceeds a first reference value and the second semiconductor switching element is turned on; and a second isolation transmission unit that detects the voltage at the gate terminal of the second semiconductor switching element on the primary side, and generates a second ON signal on the secondary side when the voltage exceeds a second reference value and the first semiconductor switching element is turned on.
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Description

Technical Field

[0001] The present disclosure relates to a driving device for a semiconductor switching element.

Background Art

[0002] In a power conversion circuit such as an inverter, when a short circuit occurs between the upper arm and the lower arm, an overcurrent flows. In Patent Document 1, after detecting that a short circuit has occurred and an overcurrent has flowed, before a failure of the IGBT occurs, a protection circuit operates to turn off the IGBT.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the case of Patent Document 1, when a short circuit occurs between the upper and lower arms, there is a period during which an overcurrent flows through the IGBT, so damage accumulates in the IGBT. In addition, when an overcurrent flows, the voltage between the gate and emitter rises due to the current flowing in from the capacitance between the collector and gate of the IGBT, and there is a risk of failure exceeding the absolute maximum rating of the voltage between the gate and emitter of the IGBT.

[0005] The present disclosure has been made to solve the above problems, and by operating the short-circuit protection circuit before detecting a short circuit, it aims to suppress the overcurrent during a short circuit between the upper and lower arms and reduce the damage to semiconductor switching elements such as IGBTs.

Means for Solving the Problems

[0006] The semiconductor switching element driving device of this disclosure includes a first gate driving unit that applies a voltage to the gate terminal of a first semiconductor switching element to turn the first semiconductor switching element on and off, a second gate driving unit that applies a voltage to the gate terminal of a second semiconductor switching element connected in series with the first semiconductor switching element to turn the second semiconductor switching element on and off, and a primary side that detects the voltage at the gate terminal of the first semiconductor switching element, and when this voltage exceeds a first reference value and the second semiconductor switching element is turned on, a secondary The system includes a first isolation transmission unit that generates a first ON signal on the primary side, a second isolation transmission unit that generates a second ON signal on the secondary side when the primary side detects the voltage at the gate terminal of the second semiconductor switching element, and this voltage exceeds a second reference value and the first semiconductor switching element turns ON, a first gate voltage reduction unit that reduces the voltage applied to the gate terminal of the first semiconductor switching element based on the second ON signal, and a second gate voltage reduction unit that reduces the voltage applied to the gate terminal of the second semiconductor switching element based on the first ON signal. [Effects of the Invention]

[0007] This disclosure makes it possible to suppress overcurrent during short circuits of the upper and lower arms and reduce damage to semiconductor switching elements. [Brief explanation of the drawing]

[0008] [Figure 1] This figure shows the schematic configuration of the semiconductor switching element driving device in Embodiment 1. [Figure 2] This is a time-series diagram showing the state at each point in the semiconductor switching element driving device in Embodiment 1. [Figure 3] This is a time-series diagram showing the state at each point in a conventional semiconductor switching element drive device. [Figure 4] Figure 2 and Figure 3 show the time series superimposed on each other. [Modes for carrying out the invention]

[0009] The embodiments for implementing this disclosure will be described with reference to the attached drawings. In each drawing, the same or corresponding parts are denoted by the same reference numerals, and redundant explanations are simplified or omitted as appropriate.

[0010] Embodiment 1. Figure 1 shows a schematic configuration of a semiconductor switching element driving device in Embodiment 1. The driving device controls the first IGBT 101a, which is a semiconductor switching element forming the upper arm 100a, and the second IGBT 101b, which is a semiconductor switching element forming the lower arm 100b. Specifically, it controls the on / off state by applying a gate voltage to the gate terminal of the first IGBT 101a. It also controls the on / off state by applying a gate voltage to the gate terminal of the second IGBT 101b.

[0011] In addition, when an IGBT is "on," it means that the collector terminal C and the emitter terminal E are in a conductive state, and when it is "off," it means that the collector terminal C and the emitter terminal E are in a non-conductive state. Furthermore, the drive device mainly consists of a gate drive circuit (gate drive unit) 1 and an RTC circuit (overcurrent protection circuit) 20.

[0012] The upper arm 100a has a first IGBT 101a and a first freewheeling diode 102a connected in antiparallel. The lower arm 100b has a second IGBT 101b and a second freewheeling diode 102b connected in antiparallel.

[0013] The gate drive circuit 1 consists of a first gate drive circuit 1a and a second gate drive circuit 1b. The first gate drive circuit 1a includes an upper arm output stage circuit composed of a first power supply 2a and a second power supply 3a, and a first MOSFET 4a and a second MOSFET 5a. Here, the voltage of the first power supply 2a is set to +15V relative to the reference potential VG1, and the voltage of the second power supply 3a is set to -10V relative to the reference potential VG1.

[0014] Furthermore, the first gate drive circuit 1a includes a first control unit 6a that controls the first MOSFET 4a and the second MOFSET 5a, a first resistor 8a located between the terminal 7a of the upper arm output stage circuit and the gate terminal G of the first IGBT 101a, and a first protection operation detection unit 9a.

[0015] The connection point 103a on the emitter terminal side of the first IGBT 101a is connected to the reference potential VG1 of the first power supply 2a and the second power supply 3a. The first control unit 6a receives an on / off command signal SIN1 transmitted from a higher-level control unit (not shown) and controls the first MOSFET 4a and the second MOFSET 5a based on the signal GSD from the first protection operation detection unit 9a.

[0016] In other words, when the first MOSFET 4a is turned on and the second MOSFET 5a is turned off, the positive voltage of the first power supply 2a is applied from terminal 7a of the upper arm output stage circuit to the gate terminal G of the first IGBT 101a, causing the collector terminal C and emitter terminal E to conduct, i.e., to turn on.

[0017] Furthermore, when the first MOSFET 4a is turned off and the second MOSFET 5a is turned on, a negative voltage from the second power supply 3a is applied from terminal 7a of the upper arm output stage circuit to the gate terminal G of the first IGBT 101a, causing the collector terminal C and emitter terminal E to become non-conductive, i.e., in an off state.

[0018] Similarly, the second gate drive circuit 1b includes a lower arm output stage circuit consisting of a third power supply 2b and a fourth power supply 3b, and a third MOSFET 4b and a fourth MOSFET 5b. Here, the voltage of the third power supply 2b is set to +15V relative to the reference potential VG2, and the voltage of the fourth power supply 3b is set to -10V relative to the reference potential VG2.

[0019] Furthermore, the second gate drive circuit 1b includes a second control unit 6b that controls the third MOSFET 4b and the fourth MOFSET 5b, a second resistor 8b located between the terminal 7b of the lower arm output stage circuit and the gate terminal G of the second IGBT 101b, and a second protection operation detection unit 9b.

[0020] The connection point 103b on the emitter terminal side of the second IGBT 101b is connected to the reference potential VG2 of the third power supply 2b and the fourth power supply 3b. The second control unit 6b receives the on / off command signal SIN2 transmitted from an upper control device (not shown) and controls the third MOSFET 4b and the fourth MOFSET 5b based on the signal GSD from the second protection operation detection unit 9b.

[0021] That is, when the third MOSFET 4b is on and the fourth MOFSET 5b is off, a positive voltage of the third power supply 2b is applied from the terminal 7b of the lower arm output stage circuit to the gate terminal G of the second IGBT 101b, and the collector terminal C and the emitter terminal E are conducting, that is, in the on state.

[0022] Also, when the third MOSFET 4b is off and the fourth MOFSET 5b is on, a negative voltage of the fourth power supply 3b is applied from the terminal 7b of the lower arm output stage circuit to the gate terminal G of the second IGBT 101b, and the collector terminal C and the emitter terminal E are non-conducting, that is, in the off state.

[0023] The RTC circuit (overcurrent protection circuit) 20 consists of a first RTC circuit 20a and a second RTC circuit 20b.

[0024] The first RTC circuit 20a has a third resistor 21a located between the gate terminal G of the first IGBT 101a and the first resistor 8a.

[0025] The first RTC circuit 20a is connected in parallel with the first IGBT 101a and includes a branch circuit that connects from the collector terminal connection point 104a of the first IGBT 101a to the emitter terminal connection point 103a of the first IGBT 101a via the fourth resistor 22a and the fifth resistor 23a. The midpoint between the fourth resistor 22a and the fifth resistor 23a is connected to the base terminal of the transistor of the first overcurrent detection unit 24a.

[0026] On the line between terminal 7a of the upper arm output stage circuit and the gate terminal of the first IGBT 101a, one end of the first gate voltage reduction unit 27a is connected from the connection point 25a between the first resistor 8a and the third resistor 21a, via the first diode 26a. The other end of the first gate voltage reduction unit 27a is connected to the reference potential VG1.

[0027] The line connecting terminal 7a of the upper arm output stage circuit and the gate terminal of the first IGBT 101a branches off from connection point 28a between the third resistor 21a and the gate terminal of the first IGBT 101a, and is connected to the sixth resistor 29a, the primary side of the first insulating transfer unit, and one end of the first Zener diode 31a. The other end of the first Zener diode 31a is connected to a reference potential VG1. The connection between the sixth resistor 29a and the first Zener diode 31a stabilizes this line at a predetermined voltage. In this embodiment, the first photocoupler 30a is used as the first insulating transfer unit.

[0028] The first photocoupler 30a consists of a first light-emitting diode 30a1 on the primary side and a first phototransistor 30a2 on the secondary side. The first light-emitting diode 30a1 emits light when the detected voltage exceeds a first reference value. The first phototransistor 30a2 receives this light, which turns it on, meaning the collector terminal and emitter terminal become conductive.

[0029] The collector terminal of the first phototransistor 30a2 is connected to Gun in the second RTC circuit 20b, between the second resistor 8b and connection point 25b. The emitter terminal of the first phototransistor 30a2 is connected to the second gate voltage reduction unit 27b.

[0030] Similarly, the second RTC circuit 20b has a seventh resistor 21b located between the gate terminal G of the second IGBT 101b and the second resistor 8b.

[0031] The second RTC circuit 20b is connected in parallel with the second IGBT 101b and includes a branch circuit that connects from the collector terminal connection point 104b of the second IGBT 101b to the emitter terminal connection point 103b of the second IGBT 101b via the eighth resistor 22b and the ninth resistor 23b. The midpoint between the eighth resistor 22b and the ninth resistor 23b is connected to the base terminal of the transistor of the second overcurrent detection unit 24b.

[0032] The line connecting terminal 7b of the lower arm output stage circuit to the gate terminal of the second IGBT 101b connects one end of the second gate voltage reduction unit 27b via the second diode 26b from the connection point 25b between the second resistor 8b and the seventh resistor 21b. The other end of the second gate voltage reduction unit 27b is connected to the reference potential VG2.

[0033] The line connecting terminal 7b of the lower arm output stage circuit to the gate terminal of the second IGBT 101b branches off from connection point 28b between the seventh resistor 21b and the gate terminal of the second IGBT 101b, and is connected to the tenth resistor 29b, the primary side of the second insulating transmission unit, and one end of the second Zener diode 31b. The other end of the second Zener diode 31b is connected to the reference potential VG2. The connection between the tenth resistor 29b and the second Zener diode 31b stabilizes this line at a predetermined voltage. In this embodiment, a second photocoupler 30b is used as the second insulating transmission unit.

[0034] The second photocoupler 30b consists of a second light-emitting diode 30b1 on the primary side and a second phototransistor 30b2 on the secondary side. The second light-emitting diode 30b1 emits light when the detected voltage exceeds a second reference value. The second phototransistor 30b2 receives this light, turning it into an ON state, i.e., conducting from the collector terminal to the emitter terminal. The second reference value is the same as the first reference value.

[0035] The collector terminal of the second phototransistor 30b2 is connected to Gup between the first resistor 8a and connection point 25a in the first RTC circuit 20a. The emitter terminal of the second phototransistor 30b2 is connected to the first gate voltage reduction unit 27a.

[0036] In this circuit configuration, normally, the first IGBT 101a on the upper arm 100a and the second IGBT 101b on the lower arm 100b are controlled to be turned on alternately. However, if a malfunction occurs in the gate drive circuit or the IGBT, and a short circuit occurs that turns on both the first IGBT 101a and the second IGBT 101b simultaneously, an overcurrent will flow through both IGBT 101a and the second IGBT 101b. If this overcurrent continues to flow and exceeds the short-circuit withstand capability of the IGBT, the normal IGBT will also fail. Therefore, it is necessary to forcibly turn off the IGBT.

[0037] The following describes the control procedures in the event of this short circuit.

[0038] Possible causes of a short circuit include a failure in the gate drive circuit, resulting in a continuous positive voltage being applied to the IGBT's gate terminal. Alternatively, even if the IGBT fails and the voltage applied to the gate terminal from the gate drive circuit changes from positive to negative, the conductivity between the collector and emitter terminals may not be broken.

[0039] Figure 2 is a time-series diagram showing the state at each point in the semiconductor switching element driving device shown in Figure 1. The state will be explained based on Figures 1 and 2. Under normal conditions, an on / off command signal SIN1 is sent from a higher-level control device (not shown) to the first control unit 6a. Additionally, an on / off command signal SIN2 is sent to the second control unit 6b. These on / off command signals SIN1 and SIN2 alternately switch on and off with a dead time Td in between.

[0040] The first control unit 6a receives an ON command signal of SIN1, which turns on the first MOSFET 4a, turns off the second MOSFET 5a, and applies a positive voltage to the gate terminal of the first IGBT 101a. As a result, the first IGBT 101a turns on, and current flows to the load. The current flowing through the collector and emitter terminals of the first IGBT 101a is Icp.

[0041] In this case, the voltage detected by the first light-emitting diode 30a1 exceeds the first reference value, but since the voltage of Gun is not applied, no current flows to the secondary first phototransistor 30a2. Therefore, the first ON signal Ip-n is not transmitted from the first phototransistor 30a2 to the second gate voltage reduction unit 27b.

[0042] Similarly, the second control unit 6b receives the ON command signal SIN2, which turns on the third MOSFET 4b and turns off the fourth MOSFET 5b, applying a positive voltage to the gate terminal of the second IGBT 101b. This causes the collector and emitter terminals of the second IGBT 101b to conduct, and current flows from the load. The current flowing through the collector and emitter terminals of the second IGBT 101b is Icn.

[0043] In this case, the voltage detected by the second light-emitting diode 30b1 exceeds the second reference value, but since the Gup voltage is not applied, no current flows through the second phototransistor 30b2 on the secondary side. Therefore, the second ON signal In-p is not transmitted from the second phototransistor 30b2 to the first gate voltage reduction unit 27a.

[0044] Next, in Figure 2, assume that at time t1, SIN1 remains in the ON command signal state, and SIN2 outputs an ON command signal.

[0045] First, a positive voltage is applied from the gate drive circuit 1b to the gate terminal of the second IGBT101b, turning it on. During the rise of this voltage, a voltage is also applied to Gun.

[0046] In the first photocoupler 30a, the first light-emitting diode 30a1 is emitting light. As a result, current flows through the first phototransistor 30a2 on the secondary side, generating the first ON signal Ip-n. This first ON signal Ip-n is then transmitted to the second gate voltage reduction unit 27b. The second gate voltage reduction unit 27b is activated based on the first ON signal Ip-n, and current IB flows from the connection point 25b. This maintains the voltage across the gate terminal of the second IGBT 101b at a lower value compared to normal operation.

[0047] Furthermore, when the voltage across the gate terminal of the second IGBT 101b rises, the second light-emitting diode 30b1 emits light when the voltage detected by the second light-emitting diode 30b1 exceeds the second reference value. Since there is voltage across Gup, current flows through the secondary-side second phototransistor 30b2, generating the second ON signal In-p. This second ON signal In-p is then transmitted to the first gate voltage reduction unit 27a. The first gate voltage reduction unit 27a is activated based on the second ON signal In-p, and current IA flows from the connection point 25a. As a result, the voltage across the gate terminal of the second IGBT 101b is reduced and maintained at a lower value compared to normal operation.

[0048] In this state, although the first IGBT10a1 and the second IGBT10b1 are short-circuited, the voltage applied to the gate terminal is reduced, making it more difficult for current to flow between the collector and emitter terminals compared to normal conditions. Therefore, overcurrent flow is suppressed.

[0049] In the first gate drive circuit 1a, the first protection operation detection unit 9a detects that the first gate voltage reduction unit 27a has reduced the gate voltage, and generates a signal GSD at time t2, which is sent to the first control unit 6a. Upon receiving the signal GSD, the first control unit 6a ignores the command signal SIN1 and turns off the first MOSFET 4a, turns on the second MOSFET 5a, and turns off the first IGBT 101a. The same control is performed in the second gate drive circuit 1b.

[0050] Subsequently, at time t3, it fails, and the higher-level control unit (not shown) stops sending SIN1 and SIN2.

[0051] For reference, the control method in the event of a short circuit in a conventional semiconductor switching element drive device will be explained. Conventional devices do not include the sixth resistor 29a, the first photocoupler 30a, or the first Zener diode 31a. They also do not include the tenth resistor 29b, the second photocoupler 30b, or the second Zener diode 31b.

[0052] Figure 3 is a time-series diagram showing the state at each point in a conventional semiconductor switching element drive device. In Figure 3, assume that at time t1, SIN1 remains in the ON command signal state and SIN2 outputs an ON command signal.

[0053] First, a positive voltage is applied to the gate terminal of the second IGBT101b from the second gate drive circuit 1b, turning it on. This causes the collector and emitter terminals of the second IGBT101b to conduct. As a result, a short circuit occurs between the first IGBT101a and the second IGBT101b, causing an overcurrent to flow.

[0054] When this overcurrent causes the voltage divided by the fourth resistor 22a and the fifth resistor 23a to exceed the voltage Vbe applied to the base terminal necessary to drive the transistor of the first overcurrent determination unit 24a, the transistor turns on. In other words, an overcurrent is determined. Then, the first overcurrent determination unit 24a sends a first determination signal to the first gate voltage reduction unit 27a. The first gate voltage reduction unit 27a is activated based on the first determination signal, and current IA flows from the connection point 25a.

[0055] Similarly, the transistor of the second overcurrent detection unit 24b is turned on. Then, the second overcurrent detection unit 24b sends a second determination signal to the second gate voltage reduction unit 27b. The second gate voltage reduction unit 27b is activated, and current IB flows from the connection point 25b.

[0056] Figure 4 shows the time series from Figure 2 and Figure 3 superimposed on each other. The solid lines are based on Figure 2, and the dashed lines are based on Figure 3. Comparing Gup, Figure 2 shows that the rise in gate-emitter voltage after time t1 is suppressed. Furthermore, comparing Icp and Icn, Figure 2 shows that the sharp current increase is suppressed.

[0057] In addition, even if the IGBT fails and the voltage applied to the gate terminal from the gate drive circuit changes from positive to negative, the conductivity between the collector terminal and the emitter terminal may not be broken. In this case, the first ON signal Ip-n will not be generated by the first photocoupler 30a. Similarly, the second ON signal In-p will not be generated by the second photocoupler 30b.

[0058] Therefore, a first determination signal is sent from the first overcurrent determination unit 24a to the first gate voltage reduction unit 27a. Also, a second determination signal is sent from the second overcurrent determination unit 24b to the second gate voltage reduction unit 27b. As a result, conduction between the collector and emitter terminals of the normal IGBT is suppressed, and failure of the normal IGBT can be avoided.

[0059] Thus, in this embodiment, by operating the gate voltage reduction unit before detecting a short circuit, overcurrent during a short circuit in the upper and lower arms can be suppressed, thereby reducing damage to semiconductor switching elements such as IGBTs.

[0060] In Figure 1, IGBTs are used as the switching elements for the upper and lower arms, but other semiconductor switching elements such as MOFSETs with gate terminals may also be used.

[0061] Furthermore, although a photocoupler is used as the insulating transmission part in Figure 1, any device capable of insulating transmission, such as an isolator, can be used.

[0062] Furthermore, although the first and second reference values ​​were set to the same value, they could also be set to different values. By adjusting them to different values, it becomes possible to choose whether to operate on both arms or only one arm in the event of a short circuit, making it possible to use this for sorting the short-circuited arm location.

[0063] Although preferred embodiments have been described in detail above, the invention is not limited to these embodiments, and various modifications and substitutions can be made to the embodiments described above without departing from the scope of disclosure.

[0064] Furthermore, when referring to the number, quantity, amount, range, etc., of each element in the embodiments, the apparatus of this disclosure is not limited to the referred number unless specifically stated or clearly defined in principle. Also, the structures, etc., described in these embodiments are not necessarily essential unless specifically stated or clearly defined in principle. [Explanation of Symbols]

[0065] 1 gate drive circuit, 1a first gate drive circuit, 1b second gate drive circuit, 2a First power supply, 3a Second power supply, 4a First MOSFET, 5a Second MOFSET, 6a First control unit, 7a Terminals of the output stage circuit for the upper arm, 8a First resistor 8a, 9a First protection operation detection unit, 2b Third power supply, 3b Fourth power supply, 4b Third MOSFET, 5b Fourth MOFSET, 6b Second control unit, 7b Terminals of the output stage circuit for the lower arm, 8b Second resistor, 9b Second protection operation detection unit, 20 RTC circuit, 20a First RTC circuit, 20b Second RTC circuit, 21a Third resistor, 22a Fourth resistor, 23a Fifth resistor, 24a First overcurrent detection unit, 25a Connection point, 26a First diode, 27a First gate voltage reduction section, 28a Connection point, 29a The sixth resistor, 30a First photocoupler, 30a1 First light-emitting diode, 30a2 First phototransistor, 31a First Zener diode, 21b The 7th resistor, 22b The 8th resistor, 23b The 9th resistor, 24b Second overcurrent detection unit, 25b Connection point, 26b Second diode, 27b Second gate voltage reduction section, 28a Connection point, 29b The 10th resistor, 30b Second photocoupler, 30b1 Second light-emitting diode, 30b2 Second phototransistor, 31b Second Zener diode, 100a Upper arm, 100b Lower arm, 101a First IGBT, 101b Second IGBT, 102a First freewheeling diode, 102b Second freewheeling diode, 103a Connection point, 103b Connection point, 104a connection point, 104b connection point

Claims

1. A first gate drive unit that applies a voltage to the gate terminal of a first semiconductor switching element to turn the first semiconductor switching element on and off, A second gate drive unit that applies a voltage to the gate terminal of a second semiconductor switching element connected in series with the first semiconductor switching element to turn the second semiconductor switching element on and off, A first isolation transmission unit in which the primary side detects the voltage at the gate terminal of the first semiconductor switching element, and when the voltage exceeds a first reference value and the second semiconductor switching element turns on, a first ON signal is generated on the secondary side, A second isolation transmission unit in which the primary side detects the voltage at the gate terminal of the second semiconductor switching element, and when the voltage exceeds a second reference value and the first semiconductor switching element turns on, a second ON signal is generated on the secondary side. A first gate voltage reduction unit that reduces the voltage applied to the gate terminal of the first semiconductor switching element based on the second ON signal, A semiconductor switching element driving device characterized by comprising: a second gate voltage reduction unit that reduces the voltage applied to the gate terminal of the second semiconductor switching element based on the first ON signal.

2. A first gate drive unit that applies a voltage to the gate terminal of a first semiconductor switching element forming an upper arm to turn the first semiconductor switching element on and off, A second gate drive unit that applies a voltage to the gate terminal of a second semiconductor switching element that forms a lower arm connected in series with the upper arm to turn the second semiconductor switching element on and off, A first overcurrent determination unit for determining the overcurrent flowing through the first semiconductor switching element, A second overcurrent determination unit for determining the overcurrent flowing through the second semiconductor switching element, A first gate voltage reduction unit reduces the voltage applied to the gate terminal of the first semiconductor switching element based on a first determination signal output when the first overcurrent determination unit determines that an overcurrent has occurred. A second gate voltage reduction unit reduces the voltage applied to the gate terminal of the second semiconductor switching element based on a second determination signal output when the second overcurrent determination unit determines that an overcurrent has occurred. The primary side detects the voltage at the gate terminal of the first semiconductor switching element, and when the voltage exceeds a first reference value and the second semiconductor switching element turns on, the secondary side transmits a first ON signal to the second gate voltage reduction unit, the first isolation transmission unit The primary side detects the voltage at the gate terminal of the second semiconductor switching element, and when the voltage exceeds a second reference value and the first semiconductor switching element turns on, the secondary side transmits a second ON signal to the first gate voltage reduction unit, comprising: A semiconductor switching element driving device characterized in that the first gate voltage reduction unit reduces the voltage applied to the gate terminal of the first semiconductor switching element based on the second ON signal, and the second gate voltage reduction unit reduces the voltage applied to the gate terminal of the second semiconductor switching element based on the first ON signal.

3. The semiconductor switching element driving device according to claim 1 or 2, wherein the first gate drive unit includes a first protection operation detection unit that detects the voltage at the gate terminal of the first semiconductor switching element, and when the first protection operation detection unit detects a voltage reduction by the first gate voltage reduction unit, the first semiconductor switching element is turned off.

4. The semiconductor switching element driving device according to claim 3, wherein the second gate driving unit includes a second protection operation detection unit that detects the voltage at the gate terminal of the second semiconductor switching element, and when the second protection operation detection unit detects a voltage reduction by the second gate voltage reduction unit, the second semiconductor switching element is turned off.

5. The semiconductor switching element driving device according to claim 1 or 2, characterized in that the first reference value and the second reference value are different values.