Information processing system, information processing method, and information processing program
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- AKUSERU KK
- Filing Date
- 2025-01-22
- Publication Date
- 2026-08-03
Smart Images
Figure 2026125378000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an information processing system, an information processing method, and a program.
Background Art
[0002] In order to correct defects in a computer program, it is known to perform debugging (analysis, correction) using hardware or software called a debugger. When performing debugging, a method of operating a debugger during the execution of a target program to perform debugging is common. However, this method always requires operating the debugger. Therefore, it is impossible to perform debugging on an embedded program after the release of the product, and it is also difficult to debug rarely occurring defects. On the other hand, there is a method of performing debugging by outputting information on the state of memory and an OS (Operating System) when a program hangs up (abnormally terminates) (Patent Document 1). For example, a computer operating on a UNIX (registered trademark) - based OS such as Linux (registered trademark) outputs a dump file storing the state of the main memory when a hang - up occurs in a program. A user can discover defects at the time of the hang - up and correct the program by debugging the output dump file using a software debugger.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] As an example of an embedded system, the performance control program for amusement machines was traditionally run on a so-called non-OS system without an operating system, but in recent years it has become increasingly common to run it on an OS such as Linux (registered trademark). In embedded systems running on such an OS, the memory area used by the program may include areas managed by the OS and areas not managed by the OS. As a result, when a program hangs, the OS only outputs a dump file for memory areas it manages, but not for memory areas it does not manage. Therefore, users cannot analyze memory areas not managed by the OS during debugging. Consequently, it may be difficult to accurately identify the cause of the hang during debugging. One aspect of this invention is to enable the output of a dump file that includes memory areas not managed by the OS when a program hangs up. [Means for solving the problem]
[0005] The information processing system of the present invention, in one aspect, is an information processing system that generates a dump file when a hang-up occurs in a program executed by a first information processing device using a memory area, wherein the first information processing device has an operating system incorporated into it, and the dump file indicates the state of the memory area, and comprises: a first generation unit that generates a first core dump file containing core dump data that stores the state of a first area of the memory area used by the program and managed by the operating system when a hang-up occurs; a second generation unit that generates a memory dump file containing memory dump data that stores the state of a second area of the memory area used by the program and not managed by the operating system when a hang-up occurs; and a third generation unit that generates a second core dump file based on the first core dump file and the memory dump file. [Effects of the Invention]
[0006] One aspect of the present invention is that, when a program hangs up, it is possible to output a dump file that includes memory areas not managed by the OS. [Brief explanation of the drawing]
[0007] [Figure 1] This is a functional block diagram of the information processing system according to this embodiment. [Figure 2] This diagram provides a detailed explanation of the internal memory device in the first information processing device. [Figure 3] This figure shows an example of the internal structure of the first core dump file. [Figure 4] This diagram shows the management information for the first core dump file. [Figure 5] This figure shows an example of the internal structure of a memory dump file. [Figure 6] This figure shows an example of the internal structure of the second core dump file. [Figure 7] This diagram shows the management information for the second core dump file. [Figure 8] This is a flowchart illustrating the dump file generation process performed by the first information processing unit. [Figure 9] This is a flowchart illustrating the dump file generation process performed by the second information processing unit. [Figure 10] This is a block diagram showing an embodiment of a computer device. [Modes for carrying out the invention]
[0008] Embodiments of the present invention will be described in detail below with reference to the drawings. The system of this embodiment generates a dump file of the entire memory area used by the embedded program, including areas not managed by the OS, through the configuration described below, enabling accurate debugging. Furthermore, the method of this embodiment is not limited to devices that incorporate embedded programs, but can also be applied to ordinary PCs (Personal Computers) and workstations.
[0009] Figure 1 is a functional block diagram of the information processing system according to this embodiment. As shown in Figure 1, the information processing system 100 includes a first information processing device 10 that controls the performance control device of a gaming machine and other embedded systems as debugging targets, and a second information processing device 20 that acts as a debugger. When a hang-up occurs in the program executed by the first information processing device 10, the information processing system 100 generates a dump file and uses the second information processing device 20 to debug the dump file. The first information processing device 10 and the second information processing device 20 are connected via Ethernet or USB (Universal Serial Bus). However, the communication path and communication standard between the first information processing device 10 and the second information processing device 20 are not limited to those described above, as long as communication is possible between the first information processing device 10 and the second information processing device 20.
[0010] The first information processing device 10 comprises a control unit 10A and a storage unit (internal storage device) 10B. The first information processing device 10 uses a predetermined storage area of the internal storage device 10B to perform control, for example, regarding the performance of a gaming machine, according to a program 13. In the following explanation, the period when no hang-up occurs in the program 13 of the first information processing device 10 is referred to as "normal operation," and any period from the time a hang-up occurs in the program 13 of the first information processing device 10 until the dump process is executed is referred to as "hang-up period." In the following description, the dump file of the memory area managed by the OS 11 and used by the program 13 in the first information processing apparatus 10 is referred to as the first core dump file 23. Also, in the following description, the dump file including the memory area used by the program 13 but not managed by the OS 11 in the first information processing apparatus 10 is referred to as the memory dump file 24. Both the core dump and the memory dump dump the memory, but in this embodiment, they will be described separately according to whether the OS 11 manages them. Also, while the core dump acquires the memory area managed by the OS 11 by the function of the OS 11 at the time of program hang-up, the memory dump is not necessarily acquired only at the time of hang-up. The memory dump can be acquired by a dump tool described later that is activated in response to a user operation or a call from another process.
[0011] As will be described in detail in FIG. 2, the internal storage device 10B of the first information processing apparatus 10 includes an OS management area 51 managed by the OS 11 and an OS non-management area 52 not managed by the OS 11. The internal storage device 10B includes a first area 15 belonging to either the OS management area 51 or the OS non-management area 52, a second area 16, a third area 17, and a fourth area 18. As shown in the following table, each area is distinguished by whether the OS 11 manages it and whether the program 13 uses it.
[0012] The first area 15 is an area managed by the OS 11 by a memory allocator and used by the program 13 during normal times. The second area 16 is an area not managed by the OS 11 by a memory allocator and used by the program 13 during normal times. The third area 17 is an area not managed by the OS 11 by a memory allocator and not used by the program 13 during normal times. The fourth area 18 is an area managed by the OS 11 by a memory allocator and not used by the program 13 during normal times. Therefore, during normal operation, Program 13 uses the first area 15 managed by OS 11 and the second area 16 not managed by OS 11. Also, in the OS management area 51, there are areas used by Program 13 (the first area 15) and areas not used by Program 13 (the fourth area 18). In the non-OS management area 52, there are also areas used by Program 13 (the second area 16) and areas not used by Program 13 (the third area 17).
[0013]
Table 1
[0014] As described below, in this embodiment, the entire second area 16 and the entire third area 17 among the above are described as the targets to be referred to by the memory dump. However, at least a part of the third area 17 not used by Program 13 may not be included in the targets to be referred to by the memory dump. That is, the memory area in which the dump tool described later generates the memory dump file 24 can be set as appropriate.
[0015] Also, the core dump dumps the memory for the hung-up process. In this embodiment, since the program operating on OS 11 is only Program 13, the first area 15 becomes the target to be referred to by the core dump. The fourth area 18 managed by OS 11 is not the target to be referred to by the core dump because Program 13 does not use it. This embodiment generates a second core dump file 25 that includes both core dump data and memory dump data. In the following description, when core dump data and memory dump data are not distinguished, these are referred to as dump data.
[0016] The control unit 10A includes OS 11, Program 13, and a memory dump unit (second generation unit) 14 as a dump tool. [[ID=2b]] OS11 is an operating system such as Linux (registered trademark) embedded in the first information processing unit 10. OS11 is a system that combines a kernel with various drivers and libraries, and controls the entire first information processing unit 10, including input / output, memory management, and execution control of application programs such as program 13. Regarding memory management, OS11 manages the OS-managed area 51 of the internal storage device 10B, but does not manage the OS-unmanaged area 52. Program 13 is an application program that runs on OS 11 during normal operation, for example, to control the effects of a gaming machine. The memory areas used by Program 13 are the first area 15 and the second area 16. As described above, the processing of Program 13 stops when a hang-up occurs. If the first information processing device 10 is an embedded device, program 13 may be called and automatically started by the OS 11. If the first information processing device 10 is a PC or the like, program 13 may be started automatically, but it may also be started in response to user input.
[0017] OS11 includes a core dump unit (first generation unit) 12 as part of its functionality. When a hang-up occurs, OS11 stops program 13, executes the core dump unit 12 to generate a first core dump file 23, and stores it in the internal storage device 10B. Note that under normal circumstances, OS11 does not execute the core dump unit 12. The state of the internal storage device 10B contained in the first core dump file 23 is limited to the state of the first memory area 15, which is managed by the OS 11, and does not include the state of the second memory area 16, which is not managed by the OS 11. Therefore, when a hang-up occurs, the memory dump unit 14, which is an application program executed on the OS 11, refers to the state of the OS-unmanaged memory area 52, including the second memory area 16, dumps the memory dump file 24, and stores it in the internal storage device 10B. Note that the OS 11 does not execute the processing of the memory dump unit 14 under normal circumstances. If the first information processing device 10 is an embedded device, the memory dump unit 14 can be automatically started by the OS 11 after the program 13 stops during a hang-up, and a memory dump file 24 can be generated. If the first information processing device 10 is a PC or the like, the memory dump unit 14 may be started automatically, or it may be started in response to user input.
[0018] In other words, during a hang-up, the first area 15 of the internal storage device 10B is accessed by the core dump unit 12, and the second area 16 and the third area 17 (OS-unmanaged area 52) are accessed by the memory dump unit 14. As a result, the internal storage device 10B is accessed by the core dump unit 12 and the memory dump unit 14, and the state at the time of the hang-up is output as a dump file. These dump files may be stored in the internal storage device 10B, or in a volatile or non-volatile storage device other than the internal storage device 10B. The first information processing device 10 transmits the first core dump file 23 and the memory dump file 24 to the second information processing device 20 via the Ethernet or USB described above.
[0019] The second information processing device 20 generates and debugs a second core dump file 25, which is a combination of the first core dump file 23 and the memory dump file 24. The second information processing device 20 comprises a control unit 20A and a storage unit 20B.
[0020] The control unit 20A includes a coupling unit (third generation unit) 21 and a debugging unit 22. The coupling unit 21 acquires the first core dump file 23 and the memory dump file 24 from the first information processing device 10 via Ethernet or USB, combines them to generate a second core dump file 25, and stores it in the storage unit 20B. The process of obtaining information from the first core dump file 23 and the memory dump file 24 from the first information processing device 10 may be performed by the user rather than by the coupling unit 21. That is, if the first information processing device 10 is a PC, the user may input the first core dump file 23 and the memory dump file 24 generated by the first information processing device 10 into the second information processing device 20 using a storage medium such as a USB memory or by network sharing. The debug unit 22 receives program 13 and the second core dump file 25 as input and debugs program 13 to identify the cause of the hang-up. The debug unit 22 may be a software debugging tool such as GDB (GNU Debugger). The second core dump file 25 stores the state of the internal storage device 10B that program 13 was using at the time of the hang-up.
[0021] The memory unit 20B is, for example, a rewritable ROM (Read Only Memory), non-volatile RAM, or RAM, and stores the second core dump file 25 output from the coupling unit 21 for debugging by the debugging unit 22. The memory unit 20B is not limited to these and can be any storage device, such as an SSD (Solid State Drive) or a hard disk.
[0022] Figure 2 is a diagram illustrating the internal memory of the first information processing device in detail. The internal storage device 10B of the first information processing device 10 is, for example, RAM (Random Access Memory), and includes, for instance, SRAM and DRAM. The SRAM may be the cache memory of a processor such as the CPU that constitutes the control unit 10A. Alternatively, the internal storage device 10B may be the registers of a processor such as the CPU that constitutes the control unit 10A. DRAM, for example, includes a DMA buffer and has a larger capacity than SRAM. DRAM may also include areas for frame buffers and areas for storing decoded video and texture data.
[0023] As shown in Figure 2(a), in the internal storage device 10B, a portion of the DRAM is the OS-managed area 51, which is managed by the OS. As shown in Figure 2(b), in the internal storage device 10B, the area other than the OS-managed area 51 is the OS-unmanaged area 52, which is not managed by the OS. As shown in Figure 2(c), the first area 15 is the area of the OS management area 51 used by program 13. The fourth area 18 is the area of the OS management area 51 that is not used by program 13. As shown in Figure 2(d), the area of the OS-unmanaged area 52 used by program 13 (part of the DMA buffer, part of the DRAM, and part of the SRAM) is the second area 16. The area of the OS-unmanaged area 52 other than the second area 16 (part of the DRAM, part of the SRAM, and part of the DMA buffer) is the third area 17 not used by program 13.
[0024] As shown in Figure 2(e), the first region 15 is referenced by the core dump unit 12 when a hang-up occurs, and the state at the time of the hang-up is dumped as the first core dump file 23. As shown in Figure 2(f), the second region 16 and the third region 17 are referenced by the memory dump unit 14 when a hang-up occurs, and the state at the time of the hang-up is dumped as a memory dump file 24. In the example in Figure 2, the SRAM does not include the first region 15 and is not referenced by the core dump unit 12, but the first region 15 may include a part of the SRAM (the SRAM may be managed by the OS 11, used by the program 13, and referenced by the core dump unit 12). Furthermore, the internal storage device 10B only needs to have areas managed by the OS 11 and areas that are not managed by the OS 11, and is not limited to the DRAM and SRAM configuration shown in Figure 3.
[0025] As mentioned above, the second region 16 includes a portion of the DMA buffer, a portion of the DRAM, and a portion of the SRAM. Memory dump files 24 are generated for the DMA buffer, SRAM, and DRAM, respectively. The memory dump file 24 generated for the DMA buffer contains some memory dump data corresponding to the DMA buffer in the second region 16. The memory dump file 24 generated for the SRAM contains some memory dump data corresponding to the SRAM in the second region 16. The memory dump file 24 generated for the DRAM also contains some memory dump data corresponding to the DRAM in the second region 16. In this embodiment, the memory dump also includes the third region 17 as the target of the memory dump. As a result, the memory dump files 24 for the DMA buffer, SRAM, and DRAM each contain memory dump data corresponding to a portion of the third region 17 that corresponds to the DMA buffer, SRAM, and DRAM, respectively. Since the purpose of this embodiment is to generate a dump file of the memory area used by program 13, it is necessary to identify the memory dump data for a portion of the second area 16 from each of the memory dump files 24. In the following explanation, the "memory dump data for a portion of the second region" contained in memory dump file 24 may sometimes be simply referred to as "a portion of the second region." Similarly, the "memory dump data for a portion of the third region" contained in memory dump file 24 may sometimes be simply referred to as "a portion of the third region."
[0026] Figure 3 shows an example of the internal structure of the first core dump file. As explained in Figure 3, the first core dump file 23 is data that the core dump unit 12 directly references and outputs to the state of the first area 15 of the internal storage device 10B at the time of the hang-up, and stores in the internal storage device 10B. Only one first core dump file 23 is generated at the time of the hang-up. The first core dump file 23 is the data that was stored in the internal memory device 10B regarding program 13 at the time of the hang-up. Therefore, when describing the structure of the first core dump file 23, the state of the internal memory device 10B is also described. The same applies to the memory dump file 24, which will be described later. As shown in Figure 3, the first core dump file 23 is broadly divided into management information 23A (header) for the dump data and a storage location 23B for storing the dump data itself. Management information 23A includes management information 23A related to the core dump data of the first area 15 and incomplete management information 23A related to the memory dump data of the second area 16. The structure of the header is described in detail in Figure 4. The dump data itself is simply referred to as dump data. Management information 23A regarding core dump data is an example of first management information. Management information 23A regarding memory dump data is an example of second management information. Storage location 23B is an example of first storage location.
[0027] The storage location 23B contains dump data that records the state of the internal storage device 10B. Management information 23A includes individual management information A1 to A9… corresponding to each dump data stored in storage destination 23B. Management information A1 to A9… each includes location information for the corresponding dump data, storage location information, file size, memory size, and page offset. Location information for core dump data in the first core dump file 23 is an example of first location information. Location information for memory dump data in the first core dump file 23 is an example of second location information. If the dump data is stored in storage location 23B corresponding to management information A1 to A9..., the storage location information for the dump data on the first core dump file 23 will be appropriately recorded in A1 to A9.... As will be described later, the storage location information is the offset information in the first core dump file 23. The location information includes the memory area within the internal storage device 10B, and the file paths of processes, devices, programs, and libraries that use that memory area. In UNIX-based operating systems, including Linux, memory regions are virtualized and represented as files (device nodes). For example, if the target memory region is SRAM, the file path, which is the location information, is / dev / sram0. If the target memory region is a DMA buffer on DRAM, the file path is / dev / dma0, etc. In addition to / dev / sram0, there may be multiple device nodes related to SRAM, such as / dev / sram1, / dev / sram2, etc., and a memory dump is performed for each of these device nodes. Similarly, for DMA buffers, there can be multiple device nodes besides / dev / dma0, such as / dev / dma1 and / dev / dma2. These filenames are just examples.
[0028] File size and memory size will be discussed later. The page offset indicates the position of the dump data from the beginning of the storage location 24B (described later) in the memory dump file 24, which is generated once for each device node. File size, memory size, and page offset may be included in the location information or storage location information, but they will be explained separately here.
[0029] The storage destination information is the offset of the dump data from the beginning of the first core dump file 23. This offset from the beginning of the first core dump file 23 allows us to identify the offset from the beginning of the storage destination 23B, and thereby identify the storage order (1, etc.) of the dump data in storage destination 23B. In Figure 3, the storage location information indicates the storage order of the dump data based on the offset, such as [1], [2], etc. The storage location 23B contains a number corresponding to the storage order of the stored dump data. The actual first core dump file 23 does not necessarily have such number information. The storage location information is information for identifying the dump data within the first core dump file 23. Management information 23A may contain a pointer that associates the storage location information with the dump data. Dump data is generated for each device node and file. Furthermore, management information A1-A9… may exist that share the same location information but differ in parts of the corresponding first area 15 and second area 16.
[0030] As a result of the core dump unit 12 performing a core dump, a first core dump file 23 is generated, as shown in Figure 4, in which management information 23A and core dump data are included in the storage location 23B. On the other hand, the dump data of the second area 16, which is not referenced by the core dump unit 12, is not included in the storage location 23B of the first core dump file 23. Therefore, the management information 23A related to the dump data of the second area 16 is stored in an incomplete state in the management information 23A of the first core dump file 23. For example, in storage location 23B in Figure 3, core dump data is not stored in locations 3, 5, 6, and 8 in the core dump data storage order. As a result, the storage location information [3], [5], [6], and [8] in management information A3, A5, A6, and A8 do not contain normal values. This storage location information does not show correct information regarding the dump data. This data loss is due to the fact that the unstored dump data is located in the second area 16, which is not referenced by the core dump unit 12. Therefore, in this embodiment, a memory dump is performed on the second region 16 to obtain the missing dump files in the first core dump file 23 and combine them with the first core dump file 23 to generate a second core dump file 25 that covers the memory area used by the program 13.
[0031] Figure 4 shows the management information for the first core dump file. Before explaining the generation of the second core dump file 25, we will specifically describe the first core dump file 23 using Figure 4. In Figure 4, the horizontal axis represents the management information A1 to A9 of the core dump data. Management information A1 to A9 corresponds to management information A1 to A9 in Figure 3, respectively. The Type parameter indicates the data type (NOTE or LOAD). Since 0x00000001 represents the dump data and 0x00000004 represents the management information itself, the management information A1 to A9, which have data type 0x00000001, are the management information 23A of the dump data. The offset indicates the offset on the first core dump file 23 of the dump data. This corresponds to the storage location information in Figure 3. A virtual address indicates the address of the dumped data. A virtual address is a logical address created for each program managed by OS11. Memory size indicates the size of the dumped data in memory. The file size indicates the size of the dump data in the file. As mentioned above, the page offset indicates the position from the beginning of the dump data in each dump file for a single device node. The file path indicates the file path of the device node, program, or library, and corresponds to the location information in Figure 4.
[0032] Two sets of management information, A1 and A2, are set for the same file path / lib / libgcc_s.so.1. This is because, as described above, program 13 used different areas within the same file (device node or shared library), resulting in the generation of dump data containing multiple parts. In the dump data for the file path / lib / libgcc_s.so.1, the beginning of the dump data where the management information is management information A1 and management information A2 is indicated by page offsets 0x00000000 and 0x0000f000.
[0033] As shown in Figure 4, if the dump data corresponding to storage destination 23B is not stored, the management information A3 explained in Figure 3 has an offset value equal to the value of management information A4 (0x00007000), and since there is no actual file, the file size is 0x00000000, or 0. Management information A5 and A6 also have an offset value equal to the value of management information A7 (0x00028000), and since they do not exist as actual files, their file size is 0x00000000, or 0. Management information A8 also has an offset value equal to the value of management information A9 (0x00029000), and its file size is 0. Although not included in the first core dump file 23, it is presumed that data with a certain memory size corresponding to management information A3, A5, A6, and A8 exists in the second area 16 (DRAM, SRAM, DMA buffer, etc.) of the internal storage device 10B. Management information A3 indicates a memory size of 0x00004000 and a page offset of 0x00000000. Management information A5 and A6 indicate memory sizes of 0x00700000 and 0x001f0000, respectively, and page offsets of 0x00000000 and 0x00800000, respectively. Management information A8 indicates a memory size of 0x00010000 and a page offset of 0x00000000. Management information A3, A5, A6, and A8 correspond to the second area 16, which is not managed by OS11. Therefore, in the first core dump file 23, the file path is set, but the storage location 23B and file size are not indicated. The file path for management information A3 is / dev / mem, the file paths for management information A5 and A6 are / dev / sram0, and the file path for management information A8 is / dev / dma0.
[0034] Note that the file path / dev / sram0 contains two management information entries, A5 and A6. As described above, program 13 used different areas within the same device node ( / dev / sram0), resulting in the core dump unit 12 generating multiple management information A5 and A6 in the first core dump file 23. The dump data related to management information A5 and A6 should be considered not as two separate dump data sets, but rather as a single dump data set generated when program 13 used different areas within / dev / sram0, resulting in the area being divided by a portion of the third area 17 for program 13.
[0035] In this embodiment, the system searches for memory dump files 24 corresponding to management information A3, A5, A6, and A8, which do not contain dump data corresponding to storage destination 23B and have a file size of 0. Then, the memory dump data corresponding to a portion of the second area 16 within the memory dump data contained in the discovered memory dump file 24 is stored in the first core dump file 23, and the management information 23A is updated based on the memory dump data.
[0036] Figure 5 shows an example of the internal structure of a memory dump file. The memory dump file 24 is data that the memory dump unit 14 (memory dump acquisition tool) directly references and outputs to the internal storage device 10B at the time of the hang-up, showing the state of the second area 16 and the third area 17 of the internal storage device 10B, and storing it in the internal storage device 10B. Therefore, the memory dump file 24 contains information about the state of the second area 16 and the third area 17 of the internal storage device 10B at the time of the hang-up. The memory dump unit 14 performs a dump for each necessary device node ( / dev / sram0, / dev / dma0, / dev / mem, etc.). Therefore, the memory dump file 24 is generated corresponding to the area indicated by the file path, i.e., the area of the internal storage device 10B such as DRAM, SRAM, or DMA buffer. The memory dump file 24 is generated for each device node, spanning the second area 16 and the third area 17. As described above, the memory dump file 24 generated for each device node contains memory dump data corresponding to a portion of the second area 16 and a portion of the third area 17 corresponding to each device node. In this embodiment, one memory dump file 24 is generated for one device node and contains the memory dump data of one device node. However, it is not limited to this, and one memory dump file 24 may be generated for multiple device nodes, and the memory dump data for multiple device nodes may be included in one memory dump file 24.
[0037] The memory dump unit 14 uses, for example, the mmap function, a system call provided by OS 11, to take a memory dump of a device node such as / dev / sram0, / dev / dma0, or / dev / mem. The memory dump unit 14 is executed with the device node as an argument and maps the contents of the device node to virtual addresses, starting from a fixed page size (e.g., 4kbyte) and offsetting in units of the page size. The offset when the mmap function fails is the size of the memory dump data. Alternatively, the user may explicitly specify the size as an argument to the memory dump unit 14, or the size may be defined in advance as a constant. The memory dump file 24 may include not only the memory dump data for the second area 16 used by program 13, but also the memory dump data for the third area 17 not used by program 13. For example, the memory dump file 24 may include the memory dump data for the entire device node / dev / sram0. The second area 16 of the memory dump data can be identified from the page offset and memory size in the management information 23A.
[0038] In Figure 5, (1) memory dump file 24-1 shows the memory dump file 24 relating to the DMA buffer ( / dev / dma0). (2) memory dump file 24-2 shows the memory dump file 24 relating to the SRAM ( / dev / sram0). (3) memory dump file 24-3 shows the memory dump file 24 relating to the DRAM ( / dev / mem).
[0039] As shown in Figure 6, the memory dump file 24 is broadly divided into memory dump data management information 24A and storage location 24B for storing the memory dump data. Storage location 24B is an example of a second storage location. Management information 24A includes management information corresponding to the memory dump data to be stored in storage destination 24B. Each piece of management information 24A includes location information (file path) on the internal storage device 10B. The location information is the file path (device node) of the storage area (SRAM or DRAM) of the internal storage device 10B. The location information of the memory dump data in the memory dump file 24 is an example of second location information.
[0040] The memory dump file 24-1 relating to the DMA buffer contains one memory dump data (X) in storage location 24B, corresponding to a portion of the second region 16. The remaining area of storage location 24B is a portion of the third region 17. The memory dump data (X) can be identified in the memory dump file 24-1 by its page offset and memory size. The page offset of the memory dump data (X) is 0, and its memory size is 0x00010000. Since the memory dump data (X) starts from the beginning of storage location 24B (0x00000000), the page offset of the memory dump data (X) is not shown in the figure. The memory dump file 24-2 relating to the SRAM contains two memory dump data (Y, Z) in storage location 24B, corresponding to a portion of the second region 16. The remaining area of storage location 24B is a portion of the third region 17. The memory dump data (Y, Z) can be identified in the memory dump file 24-2 by its page offset and memory size. The page offset of memory dump data Y is 0, and the memory size is 0x00700000. Since the memory dump data (Y) starts from the beginning position (0x00000000) of storage location 24B, the page offset of the memory dump data (Y) is not shown in the figure. The page offset of the memory dump data (Z) is 0x00800000, and the memory size is 0x001f0000. The memory dump file 24-3 relating to the DRAM contains one memory dump data (W) in storage location 24B, which corresponds to a portion of the second region 16. The remaining area of storage location 24B is a portion of the third region 17. The memory dump data (W) can be identified in the memory dump file 24-3 by its page offset and memory size. The page offset of the memory dump data (W) is 0, and the memory size is 0x00004000. Because the memory dump data (W) starts from the beginning position (0x00000000) of storage location 24B, the page offset of the memory dump data (W) is not shown in the figure. A portion of the identified second region 16 is combined with the first core dump file 23 shown below.
[0041] [Combination Procedure] The procedure for the coupling unit 21 of the second information processing device 20 to combine the first core dump file 23 and the memory dump file 24 to generate the second core dump file 25 will be described. If one memory dump file 24 contains a memory dump file for one device node, the coupling unit 21 matches the first core dump file 23 and the memory dump file 24 by referring to the location information (file path) in the first core dump file 23 and the location information (file path) in the memory dump file 24. In this matching process, the coupling unit 21 searches for and identifies a memory dump file 24 that has a destination information (file path) that matches the destination information (file path) of the management information 23A of the first core dump file 23, which has a file size of 0. In this embodiment, the management information for a file with a size of 0 is management information A3, where the file path is / dev / mem; management information A5 and A6, where the file path is / dev / sram0; and management information A8, where the file path is / dev / dma0. The memory dump files 24 whose file paths match this management information are memory dump file 24-1 with file path / dev / dma0, memory dump file 24-2 with file path / dev / sram0, and memory dump file 24-3 with file path / dev / mem.
[0042] The only piece of management information with the file path / dev / mem is management information A3. The only piece of management information with the file path / dev / dma0 is management information A8. There are two pieces of management information, A5 and A6, for which the file path is / dev / sram0. The page offset and memory size information contained in management information A3, A5, A6, and A8 can be used to identify the memory dump data corresponding to a portion of the second area 16 within the corresponding memory dump data. The coupling unit 21 identifies the memory dump data (its start and end positions) corresponding to a portion of the second region 16 within the memory dump data in the memory dump files 24 (24-1, 24-2, 24-3) based on the page offset and memory size of the memory dump data specified in each management information. The coupling unit 21 obtains portions of the second region 16 of the memory dump data from the memory dump file 24 based on the start and end positions of the identified portion of the second region 16. The coupling unit 21 stores a portion of the second area 16 of all acquired memory dump data at the end of the storage location 23B of the first core dump file 23, and rewrites the file size with the memory size of the management information 23A. Subsequently, the coupling unit 21 updates the storage location information (offset) of the management information 23A corresponding to the memory dump data, in this case management information A3, A5, A6, and A8, based on the new file size.
[0043] In this embodiment, the device nodes that use the second region 16 are limited to / dev / sram*, / dev / dma*, and / dev / mem*. Therefore, the second region 16 of the memory dump data to be combined may be identified based only on the memory size and page offset, without using a file path. Here, "*" represents a wildcard and is used to generalize branch numbers such as sram0, sram1, sram2... and dma0, dma1, dma2.... Even if a single memory dump file 24 contains memory dump data for multiple device nodes, the memory dump data to be merged can be identified in the same way as described above. In that case, the merging unit 21 performs matching by referring to the location information (file path) in the first core dump file 23 and the multiple locations information contained in the memory dump file 24. The memory dump data corresponding to the matched file path in the memory dump file 24 can then be identified within the memory dump file 24 and acquired in the same manner.
[0044] Figure 6 shows an example of the internal structure of the second core dump file. The second core dump file 25 is a file formed by combining the second area 16 of the memory dump file 24 with the first core dump file 23, and therefore has basically the same structure as the first core dump file 23. As shown in Figure 7, the second core dump file 25 is broadly divided into dump data management information 25A (header) and storage location 25B where the dump data itself is stored. More specifically, the second core dump file 25 is a dump file created by combining the first core dump file 23 with the following: memory dump data (X) for the DMA buffer in memory dump file 24-1, two memory dump data (Y, Z) for the SRAM in memory dump file 24-2, and one memory dump data (W) for the DRAM in memory dump file 24-3. Only one second core dump file 25 is generated. Furthermore, in the first core dump file 23, the file size and offset of management information A3, A5, A6, and A8, which correspond to the memory dump data (W, Y, Z, X), are updated according to the memory size of the memory dump data (W, Y, Z, X). Otherwise, the structure is the same as the first core dump file 23 described in Figure 3. The pointer that associates management information 25A with memory dump data may also be updated accordingly.
[0045] The storage location 25B of the generated second core dump file 25, shown in Figure 6, contains dump data that records the state of the internal storage device 10B. In addition to the core dump data of the first area 15 that the first core dump file 23 contained, the storage location 25B also stores memory dump data of the second area 16, which was used by program 13 and not managed by OS 11. Management information 25A includes management information 25A concerning the core dump data of the first area 15 used by program 13, and complete management information 25A concerning the memory dump data of the second area 16 used by program 13. Management information 25A includes the file size and offset (storage location information) for the second area 16, which were missing from the management information 23A of the first core dump file 23, as the memory dump data of the second area 16 has been stored in storage location 25B. Of the management information 25A, management information A1, A2, A4, A7, and A9 related to the core dump data of the first area 15 remain unchanged from the content of the first core dump file 23, while management information A3, A5, A6, and A8 of the second area 16 are updated according to the memory dump data of the second area 16 stored in the storage destination 25B.
[0046] The second core dump file 25 integrates the dump data from the second area 16 of the internal storage device 10B, which was used by program 13 and not managed by OS 11, and which was missing from the first core dump file 23. Furthermore, in accordance with the integrated dump data, the management information 23A, which was incomplete in the first core dump file 23, is now present in its complete form as management information 25A. Therefore, by using the second core dump file 25 to debug with the second information processing unit 20, accurate debugging of the entire memory area used by the program 13, including the OS-unmanaged area 52, can be performed.
[0047] Figure 7 shows the management information for the second core dump file. In the second core dump file 25 shown in Figure 7, appropriate file sizes and offsets are set for management information A3, A5, A6, and A8. In management information A3, the file size is 0x00004000, reflecting the memory size of the corresponding memory dump data. In management information A5, the file size is 0x00700000, reflecting the memory size of the corresponding memory dump data. In management information A6, the file size is 0x001f0000, reflecting the memory size of the corresponding memory dump data. In management information A8, the file size is 0x00010000, reflecting the memory size of the corresponding memory dump data. Furthermore, since the memory dump data is concatenated to the end of storage location 23B, the offsets are set to match that value. The offset for management information A5 is 0x00200000, which is the starting point of the memory dump data; the offset for management information A6 is 0x00900000, which is the file size of management information A5; and the offset for management information A8 is 0x00af0000, which is the file size of management information A6. The offset for management information A3 is 0x00b00000, which is the file size of management information A8.
[0048] Figure 8 is a flowchart illustrating the process of generating the first core dump file and memory dump file executed by the first information processing device. In step S101, the first information processing device 10 determines whether or not a program hang-up has occurred. If it is determined that a hang-up has occurred (Yes in step S101), the first information processing device 10, in step S102, refers to the state of the first area 15 of the internal storage device 10B and generates one first core dump file 23 which is a dump of the state of the first area 15. Then, in step S103, the first information processing device 10 stores the generated first core dump file 23 in the internal storage device 10B. In step S104, the first information processing device 10 refers to the state of areas of the internal storage device 10B other than the first area 15 (including the second area 16), generates one or more memory dump files 24 containing these states, and in step S105, stores the memory dump files 24 in the internal storage device 10B. If it is determined that no hang-up has occurred (No in step S101), the first information processing device 10 terminates the dump file generation process. In step S106, the first information processing device 10 transmits the generated first core dump file 23 and memory dump file 24 to the second information processing device 20. The processes in steps S102 and S103 related to the generation of the first core dump file 23 and the processes in steps S104 and S105 related to the generation of the memory dump file 24 may be performed in any order, or they may be performed simultaneously.
[0049] Figure 9 is a flowchart illustrating the process of generating the second core dump file executed by the second information processing unit. In step S201, the second information processing device 20 determines whether or not it has obtained the first core dump file 23 and the memory dump file 24 from the first information processing device 10. If it is determined that the data has been acquired (Yes in step S201), the second information processing device 20 starts matching the file paths of the first core dump file 23 and the memory dump file 24 in step S202. In step S202, the second information processing device 20 refers to the file path of the management information 23A in the first core dump file 23, which has a file size of 0, and the file path in the memory dump file 24, and matches them to find the same file path. In step S203, the second information processing device 20 uses the page offset and memory size in the management information 23A for which the file path matches to identify and acquire memory dump data corresponding to a portion of the second area 16 in the memory dump data that corresponds to the management information 23A in the memory dump data. In step S204, the second information processing device 20 stores the acquired memory dump data in the storage location 23B of the first core dump file 23. In step S205, the second information processing device 20 updates the management information 23A of the first core dump file 23. Specifically, the second information processing device 20 updates the file size and offset values in the management information 23A of the first core dump file 23.
[0050] In step S206, the second information processing device 20 determines whether or not there is an uncombined memory dump file 24. If it is determined that there is an uncombined memory dump file 24 (Yes in step S206), the second information processing device 20 returns to step S202, refers to the file paths of the first core dump file 23 and the memory dump file 24, matches the same file paths, and then performs the processing in steps S203 to S206. If it is determined that there are no uncombined memory dump files 24 (No in step S206), the second information processing device 20 stores the second core dump file 25, which was generated after the combining of the memory dump files 24 was completed, in the storage unit 20B in step S207 for subsequent debugging. If it is determined that the data has not been acquired (No in step S201), the second information processing device 20 terminates the dump file generation process. The second information processing device 20 can debug the second core dump file 25 stored in the memory unit 20B, check the state of the internal memory device 10B that the program 13 was using at the time of the hang-up, and identify the cause of the hang-up.
[0051] The second information processing device 20 only performs the process of generating a second core dump file 25 by combining the first core dump file 23 and the memory dump file 24, and the debugging itself may be performed by another device. In other words, the debugging unit 22 may operate on another information processing device instead of the second information processing device 20. Furthermore, the process of combining the first core dump file 23 and the memory dump file 24 may be performed by the first information processing device 10. In other words, the combining unit 21 described in this embodiment may operate in the first information processing device 10 instead of the second information processing device 20. In that case, the second information processing device 20 will only perform debugging processing on the second core dump file 25. Although specific embodiments of the information processing system 100 of this embodiment have been described above, the information processing system 100 of this embodiment is merely an example to facilitate understanding of the present invention and does not limit the present invention.
[0052] [Differentiation] The above description assumes that only program 13 is executed by the first information processing device 10. However, it is not limited to this case; two or more programs, including program 13, may be executed simultaneously. Here, one program other than program 13 will be referred to as "another program." In many cases, program 13 and "other programs" operate independently and do not affect each other; for example, only program 13 may hang up while "other programs" do not. In such cases, there is no difference from the embodiment described above. "Other programs" operate using at least one of at least a portion of the fourth area 18 managed by OS11 and at least a portion of the third area 17 not managed by OS11. In the above embodiment, the core dump unit 12 of OS11 performs a core dump on the first area 15 to generate a first core dump file 23 for program 13, and the memory dump unit 14 performs a memory dump on the second area 16 and the third area 17 to generate a memory dump file 24 for program 13. Then, the merging unit 21 merges the memory dump data corresponding to a portion of the second area 16 related to program 13 contained in the memory dump file 24 with the first core dump file 23 using the procedure described above to obtain the final second core dump file 25.
[0053] On the other hand, when program 13 and "other programs" work together, for example, if only program 13 hangs up, "other programs" may also hang up. "Other programs" operate using at least one of at least a portion of the fourth area 18 managed by OS11 and at least a portion of the third area 17 not managed by OS11. In that case, the core dump unit 12 of OS11 performs a core dump on the first area 15 and generates a first core dump file 23 for program 13. The core dump unit 12 then performs a core dump on the area in the fourth area 18 that was used by "other programs" and generates a first core dump file 23 for "other programs". The memory dump unit 14 performs a memory dump on the second area 16 and the third area 17, generating a memory dump file 24 for the DMA buffer, SRAM, and DRAM. This memory dump contains memory dump data corresponding to the memory used by both program 13 and "other programs".
[0054] When multiple programs are running, unlike the embodiment described above, different programs may use the same file path (e.g., / dev / sram0), which could result in a single memory dump file 24 containing memory dump data from different programs. The merging unit 21 identifies the file path, memory size, and page offset of the memory dump data for the DMA buffer, SRAM, and DRAM related to program 13, and the memory dump data for the DMA buffer, SRAM, and DRAM related to "other programs," which are contained in the memory dump file 24. The merging unit 21 then combines the identified memory dump data into first core dump files 23 for program 13 and "other programs," respectively, to obtain the final second core dump files 25 for program 13 and "other programs." Here, the merging unit 21 combines the memory dump data related to the identified program 13 with a first core dump file 23 for program 13 to generate a second core dump file 25 for program 13. Subsequently, the merging unit 21 performs processing again and combines the memory dump data related to the identified "other program" with a first core dump file 23 for the "other program" to generate a second core dump file 25 for the "other program". In this case, the second information processing device 20 may receive the memory dump file 24 and the first core dump file 23 for program 13 from the first information processing device 10, generate the second core dump file 25 for program 13, and then receive the memory dump file and the first core dump file 23 for "other programs" from the first information processing device 10. Alternatively, the second information processing device 20 may receive the memory dump data for program 13 and "other programs" and the first core dump file 23 together from the first information processing device 10. Alternatively, the merging unit 21 may perform the following operations in a single process: merging the memory dump data for the identified program 13 into a first core dump file 23 for program 13 to obtain a second core dump file 25 for program 13, and merging the memory dump data for the identified "other program" into a first core dump file 23 for the "other program" to obtain a second core dump file 25 for the "other program". In this case, the second information processing unit 20 receives the memory dump files for program 13 and the "other program," as well as the first core dump file 23, all together from the first information processing unit 10. The debugging unit 22 uses the second core dump files 25, one for program 13 and one for "other programs," to debug program 13 and "other programs" respectively.
[0055] Figure 10 is a block diagram showing one embodiment of a computer device. Referring to Figure 10, the configuration of the computer device 300 will be described. In Figure 10, the computer device 300 includes a control circuit 301, a storage device 302, a reading device 303, a recording medium 304, a communication interface 305, an input / output interface 306, an input device 307, and a display device 308. The communication interface 305 is connected to a network 309. Each component is connected by a bus 310. The first information processing device 10 and the second information processing device 20 can be configured by appropriately selecting some or all of the components described in the computer device 300. The control circuit 301 controls the entire computer device 300. The control circuit 301 is a processor such as a CPU (Central Processing Unit), a multi-core CPU, an FPGA (Field Programmable Gate Array), and a PLD (Programmable Logic Device). In Figure 1, for example, the control circuit 301 functions as control unit 10A and control unit 20A.
[0056] The storage device 302 stores various types of data. The storage device 302 is, for example, a memory such as ROM (Read Only Memory) and RAM (Random Access Memory), or a non-temporary recording medium such as HD (Hard Disk) and SSD (Solid State Drive). In Figure 1, for example, the storage device 302 functions as the internal storage device 10B and the storage unit 20B. The ROM stores programs such as the boot program. The RAM is used as the work area for the control circuit 301. The HD stores programs such as the OS, application programs, firmware, and various data. When performing various processes, the first information processing device 10 and the second information processing device 20 read the control program stored in the memory device 302 into RAM. If a hang-up occurs while the control circuit 301 is executing the performance control program read into RAM, the first information processing device 10 executes a process that includes one or more of the following: core dump processing, memory dump processing, and merging processing. By executing the control program read into RAM using the control circuit 301, the second information processing unit 20 performs a process that includes one or more of the following: a coupling process and a debugging process. Furthermore, each of the above programs may be stored in a storage device on a server on the network 309, provided that the control circuit 301 can access it via the communication interface 305.
[0057] The reading device 303 is controlled by the control circuit 301 and performs read / write operations on the removable recording medium 304. The reading device 303 communicates with, for example, the performance control device and the storage unit 20B. The reading device 303 is, for example, an FDD (Floppy Disk Drive), CDD (Compact Disc Drive), DVDD (Digital Versatile Disk Drive), BDD (Blu-ray® Disk Drive), USB (Universal Serial Bus), SATA, etc. The recording medium 304 stores various types of data. The recording medium 304 may store, for example, the control program for the first information processing device 10 or the control program for the second information processing device 20. The control program for the first information processing device 10 includes one or more of the following: core dump processing, memory dump processing, and merging processing. The control program for the second information processing device 20 includes one or more of the following: merging processing and debugging processing. The recording medium 304 is connected to the bus 310 via the reading device 303, and data is read / written by the control circuit 301 controlling the reading device 303. Furthermore, the recording medium 304 is a non-temporary recording medium such as an SD memory card, floppy disk, compact disc, digital versatile disc, Blu-ray disc, and flash memory.
[0058] The communication interface 305 connects the computer device 300 to other devices via the network 309, enabling communication between them. The communication interface 305 may also include an interface with wireless LAN functionality and an interface with short-range wireless communication functionality. The wireless LAN interface may support, for example, Wi-Fi® as the wireless LAN standard. The short-range wireless interface may support, for example, Bluetooth® as the short-range wireless communication standard. LAN stands for Local Area Network.
[0059] The input / output interface 306 is connected to, for example, an input device 307. When signals indicating various information are input from the connected input device 307, the input / output interface 306 outputs the input signals to the control circuit 301 via the bus 310. Conversely, when signals indicating various information output from the control circuit 301 are input to the input / output interface 306 via the bus 310, the input / output interface 306 outputs those signals to the connected devices. The input device 307 may be, for example, a keyboard, mouse, or touch panel. The display device 308 displays various types of information. For example, the display device 308 displays an image drawn by the performance control device. The display device 308 may also display information for accepting input via the touch panel. Furthermore, the input / output interface 306, input device 307, and display device 308 may function as a GUI (Graphical User Interface). This allows the computer device 300 to accept intuitive operation via a touch panel, mouse, or the like. The network 309 is, for example, a LAN, wireless communication, or the Internet, and connects the computer device 300 with other devices for communication.
[0060] As described above, in this embodiment, when a hang-up occurs in the program 13 running on the OS 11 of the first information processing device 10, the information processing system 100 generates a dump file and the second information processing device 20 performs debugging. OS11 manages the first area 15 of the internal storage device 10B, and under normal circumstances, program 13 operates using the first area 15 and the second area 16 of the internal storage device 10B. When a hang-up occurs in program 13, the core dump unit 12, which is part of the OS 11's functionality, dumps the state of the first area 15 managed by the OS 11 and generates a first core dump file 23. Simultaneously or immediately afterward, the memory dump unit 14 dumps the state of the internal storage device 10B other than the first area 15 and generates a memory dump file 24, which is stored in the internal storage device 10B. The memory dump unit 14 is part of the functionality of the memory dump output tool executed on the OS 11. The second information processing device 20 receives the first core dump file 23 and the memory dump file 24 from the first information processing device 10. The second information processing device 20 identifies the second region 16 in the memory dump data on the memory dump file 24 that should be merged with the first core dump file 23, based on the file path and memory size stored in the management information 23A of the first core dump file 23. The second information processing device 20 combines the memory dump data identified in the first core dump file 23 and updates the management information 23A to generate a new second core dump file 25. The generated second core dump file 25 is stored in the storage unit 20B and debugged by the debug unit 22 of the second information processing device 20.
[0061] With the above configuration, the information processing system 100 can store the state of the internal storage device 10B, which includes the memory area used by the program 13 and managed by the OS 11, and the memory area used by the program 13 that was not managed by the OS 11, when a hang-up occurs in the program 13 of the first information processing device 10. Therefore, the information processing system 100 can debug the state of the internal storage device 10B that was in use when the hang-up occurred. This embodiment is not limited to the embodiments described above, and various configurations or embodiments can be taken without departing from the spirit of this embodiment. [Explanation of Symbols]
[0062] 10 First information processing device, 10A Control unit, 10B Storage unit, 11 OS, 12 Core dump unit, 13 Program, 14 Memory dump unit, 15 First area, 16 Second area, 17 Third area, 20 Second information processing device, 20A Control unit, 20B Storage unit, 21 Integration unit, 22 Debug unit, 23 First core dump file, 23A Management information, 23B Storage location, 24 Memory dump file, 24A Management information, 24B Storage location, 25 Second core dump file, 25A Management information, 25B Storage location
Claims
1. An information processing system that generates a dump file when a hang-up occurs in a program executed by a first information processing device using its memory area, The first information processing device incorporates an operating system. The dump file shows the state of the storage area. A first generation unit generates a first core dump file that, when the hang-up occurs, includes core dump data that stores the state of a first area of the memory used by the program and managed by the operating system, A second generation unit generates a memory dump file that, when the aforementioned hang-up occurs, includes memory dump data that stores the state of a second area of the memory area used by the program and not managed by the operating system. A third generation unit generates a second core dump file based on the first core dump file and the memory dump file, An information processing system characterized by comprising the following features.
2. The first core dump file is: The core dump data stored in the first storage location within the first core dump file, First management information that associates at least the first location information indicating the location of the storage area corresponding to the core dump data with the first storage location, Second management information that associates second location information indicating the location of the memory dump data with the memory dump data, and information indicating the second region within the memory dump data, The information processing system according to claim 1, characterized by comprising the following:
3. The aforementioned memory dump file is: The information processing system according to claim 2, characterized in that it includes the memory dump data stored in the second storage location within the memory dump file and the second location information.
4. The third generation unit associates the second management information with the memory dump file based on the second location information contained in the first core dump file and the second location information contained in the memory dump file. The memory dump data contained in the associated memory dump file, which is identified based on the page offset and memory size included in the second management information, is stored in the first storage location in association with the second management information. The information processing system according to feature 3.
5. The third generation unit updates the corresponding second management information based on the memory size of the stored memory dump data. The information processing system according to feature 4.
6. The system comprises the first information processing device and the second information processing device, The first information processing device comprises the first generation unit and the second generation unit, The information processing system according to any one of claims 1 to 5, characterized in that the second information processing device comprises the third generation unit and the debug unit which analyzes the generated second core dump file and confirms the state of the storage area when the hang-up occurred.
7. The system comprises the first information processing device and the second information processing device, The first information processing device comprises the first generation unit, the second generation unit, and the third generation unit. The information processing system according to any one of claims 1 to 5, characterized in that the second information processing device comprises a debug unit that analyzes the generated second core dump file and confirms the state of the storage area when the hang-up occurred.
8. An information processing method for generating a dump file when a hang-up occurs in a program executed by a first information processing device using its memory area, The first information processing device incorporates an operating system. The dump file shows the state of the storage area. When the aforementioned hang-up occurs, a first core dump file is generated, which includes core dump data that stores the state of the first area of the memory used by the program and managed by the operating system. When the aforementioned hang-up occurs, a memory dump file is generated that includes memory dump data that stores the state of the second area of the memory area used by the program and not managed by the operating system. A second core dump file is generated based on the first core dump file and the memory dump file. An information processing method characterized by including the following.
9. An information processing program that causes the processor of the first information processing device to execute an information processing method for generating a dump file when a hang-up occurs in a control program executed by the first information processing device using its memory area, The first information processing device incorporates an operating system. The dump file shows the state of the storage area. The aforementioned processor, When the hang-up occurs, a first core dump file is generated that includes core dump data storing the state of the first memory area used by the control program and managed by the operating system. When the aforementioned hang-up occurs, a memory dump file is generated that includes memory dump data storing the state of the second area of the memory area used by the control program and not managed by the operating system. A second core dump file is generated based on the first core dump file and the memory dump file. An information processing program characterized by including the following.
10. An information processing program that causes the processor of a second information processing device to execute an information processing method for generating a dump file when a hang-up occurs in a control program executed by a first information processing device using its memory area, The first information processing device incorporates an operating system. The dump file shows the state of the storage area. When the hang-up occurs, a first core dump file is generated, which contains core dump data that stores the state of a first area of the storage area used by the control program and managed by the operating system; and a memory dump file is generated, which contains memory dump data that stores the state of a second area of the storage area used by the control program and not managed by the operating system. The processor generates a second core dump file based on the first core dump file and the memory dump file. An information processing program characterized by including the following.