Semiconductor equipment
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- KK TOSHIBA
- Filing Date
- 2025-01-22
- Publication Date
- 2026-08-03
Smart Images

Figure 2026125431000001_ABST
Abstract
Description
Technical Field
[0001] The embodiment relates to a semiconductor device.
Background Art
[0002] In a vertical power control semiconductor device, there is a configuration in which an end portion on the end region side of the upper surface electrode is protected with resin.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Patent Document 2
Patent Document 3
Summary of the Invention
Problems to be Solved by the Invention
[0004] The embodiment provides a semiconductor device capable of reducing deformation of an electrode due to thermal stress.
Means for Solving the Problems
[0005] According to the embodiment, a semiconductor device includes a semiconductor layer having an element region and a termination region surrounding the element region, the semiconductor layer having a first surface and a second surface located on the opposite side of the first surface, a first electrode provided in contact with the first surface, a second electrode provided in contact with the second surface, a first resin member provided on the first surface in the termination region and covering an end portion of the first electrode, and a second resin member covering the semiconductor layer, the first resin member, and the first electrode, and the first resin member has irregularities on a surface side located on the opposite side of the first surface.
Brief Description of the Drawings
[0006] [Figure 1] This is a schematic plan view of a semiconductor device according to an embodiment. [Figure 2] This is a cross-sectional view of AA in Figure 1. [Figure 3] This is a cross-sectional view of BB in Figure 1. [Modes for carrying out the invention]
[0007] The embodiments will be described below with reference to the drawings. In each drawing, the same components are denoted by the same reference numerals. In the following embodiments, the first conductivity type in the semiconductor layer is described as n-type and the second conductivity type as p-type, but the first conductivity type may be p-type and the second conductivity type as n-type.
[0008] Figure 1 is a schematic plan view of the semiconductor device 1 according to the embodiment. Figure 2 is a cross-sectional view of AA in Figure 1. Figure 3 is a cross-sectional view of BB in Figure 1. Note that the second resin member 50 is not shown in Figure 1.
[0009] In the diagrams shown below, directions may be indicated by the X, Y, and Z axes. The X, Y, and Z axes are orthogonal to each other. For example, in this specification, the Z-axis direction is referred to as the first direction Z, the X-axis direction as the second direction X, and the Y-axis direction as the third direction Y. Also, in this specification, "thickness" refers to the maximum thickness of the target portion in the first direction Z.
[0010] The semiconductor device 1 according to this embodiment comprises a semiconductor layer 10, a first electrode 20, and a second electrode 30. The semiconductor layer 10 is located between the first electrode 20 and the second electrode 30 in a first direction Z. The semiconductor layer 10 has a first surface 10A and a second surface 10B located on the opposite side of the first surface 10A in the first direction Z. In this embodiment, the semiconductor layer 10 is, for example, a silicon carbide (SiC) layer.
[0011] The semiconductor device 1 comprises an element region 100 and a termination region 200 that surrounds the element region 100 in a plan view. In this specification, "plan view" means observing the semiconductor device 1 from the first surface 10A side. The semiconductor layer 10 has a side surface 10C in the termination region 200 that connects the first surface 10A and the second surface 10B.
[0012] The semiconductor layer 10 comprises an n-type first semiconductor layer 11, a p-type second semiconductor layer 12, and an n-type third semiconductor layer 13. In the semiconductor layer 10, which is a silicon carbide layer, for example, nitrogen and phosphorus can be used as n-type impurities, and boron and aluminum can be used as p-type impurities.
[0013] The semiconductor device 1 according to this embodiment is, for example, a diode. In this diode, the first electrode 20 functions as an anode electrode, the second electrode 30 as a cathode electrode, the second semiconductor layer 12 as an anode layer, the third semiconductor layer 13 as a cathode layer, and the first semiconductor layer 11 as a drift layer.
[0014] The second semiconductor layer 12 (anode layer) is provided on the first surface 10A side of the device region 100 and forms a pn junction with the first semiconductor layer 11. In this specification, the edge of the second semiconductor layer 12 (anode layer) on the terminal region 200 side is defined as the boundary between the device region 100 and the terminal region 200.
[0015] The first electrode 20 is in contact with the first surface 10A of the semiconductor layer 10. The first surface 10A of the semiconductor layer 10 includes the upper surface of the second semiconductor layer 12 and the upper surface of the first semiconductor layer 11. The first electrode 20 is in contact with the upper surface of the second semiconductor layer 12 in the device region 100. The end 20A of the first electrode 20 is in contact with the upper surface of the first semiconductor layer 11 in the termination region 200. The end 20A of the first electrode 20 is located between the edge of the second semiconductor layer 12 (anode layer) and the side surface 10C of the semiconductor layer 10 in both the second direction X and the third direction Y.
[0016] In this embodiment, the first electrode 20 has a stacked structure including, for example, a first film 21 and a second film 22. The first film 21 is in contact with the first surface 10A of the semiconductor layer 10, and the second film 22 is provided on the first film 21. The first film 21 contains, for example, vanadium (V) and / or molybdenum (Mo). Vanadium forms a Schottky contact with the semiconductor layer 10. Molybdenum functions as a barrier metal. The second film 22 contains aluminum (Al). The second film 22 may further contain copper (Cu). In this embodiment, the second film 22 is made of, for example, an AlCu alloy.
[0017] The third semiconductor layer 13 (cathode layer) is located between the first semiconductor layer 11 and the second electrode 30 in the first direction Z. The n-type impurity concentration of the third semiconductor layer 13 is higher than that of the first semiconductor layer 11. The second electrode 30 is in contact with the third semiconductor layer 13. The surface of the third semiconductor layer 13 in contact with the second electrode 30 is the second surface 10B of the semiconductor layer 10.
[0018] The semiconductor layer 10 may further have a p-type fourth semiconductor layer 14 in the termination region 200. The fourth semiconductor layer 14 functions as a guard ring layer for improving the breakdown voltage in the termination region 200. In this embodiment, for example, a plurality of fourth semiconductor layers 14 continuously surround the element region 100 in plan view.
[0019] The semiconductor device 1 according to the embodiment further includes a first resin member 40 and a second resin member 50. [[ID=u13]]
[0020] The first resin member 40 is provided on the first surface 10A in the termination region 200 and covers the end portion 20A of the first electrode 20. As the material of the first resin member 40, for example, a polyimide resin can be used.
[0021] The second resin member 50 covers the first surface 10A of the semiconductor layer 10, the side surface 10C of the semiconductor layer 10, the first resin member 40, and the first electrode 20. The second resin member 50 is a package that constitutes the outer surface of the semiconductor device 1. As the material of the second resin member 50, for example, an epoxy resin can be used. A part of the upper surface of the first electrode 20 is exposed from the first resin member 40 and the second resin member 50, and is electrically connected to an external circuit via a connection member such as a gold wire.
[0022] The semiconductor device 1 may further include an insulating film 60 in the terminal region 200. The insulating film 60 is provided between the first surface 10A of the semiconductor layer 10 and the first resin member 40 in the terminal region 200, and covers the first surface 10A of the semiconductor layer 10 in the terminal region 200. The insulating film 60 covers the upper surface of the fourth semiconductor layer 14 (guard ring layer). The fourth semiconductor layer 14 (guard ring layer) is located directly below the insulating film 60. In a plan view, the insulating film 60 continuously surrounds the element region 100. The insulating film 60 enhances the insulation of the first surface 10A in the terminal region 200. As the insulating film 60, for example, a silicon oxide film can be used.
[0023] The first resin member 40 covers at least the upper surface 60A of the insulating film 60. The first resin member 40 suppresses cracks and wiring misalignment that may occur due to the difference in the thermal expansion coefficients between the second resin member 50 and the semiconductor layer 10. Further, the first resin member 40 is flexible and heat-resistant, improves the adhesion with the second resin member 50, and enhances the reliability of the semiconductor device 1.
[0024] The first resin member 40 has irregularities on the upper surface side located on the opposite side of the first surface 10A in the first direction Z. In the present embodiment, the irregularities of the first resin member 40 have a plurality of convex portions and a plurality of concave portions. The plurality of convex portions include, for example, a first convex portion 41A, a second convex portion 41B, a third convex portion 41C, and a fourth convex portion 41D in order from the element region 100 side toward the side surface 10C side. The plurality of concave portions include, for example, a first concave portion 42A, a second concave portion 42B, and a third concave portion 42C in order from the element region 100 side toward the side surface 10C side. The number of convex and concave portions is not limited to the number shown in the figure.
[0025] In a plan view, the irregularities of the first resin member 40 (first protrusion 41A, second protrusion 41B, third protrusion 41C, fourth protrusion 41D, first recess 42A, second recess 42B, third recess 42C) continuously surround the element region 100.
[0026] The second resin member 50 is filled into the recesses (first recess 42A, second recess 42B, and third recess 42C) of the first resin member 40.
[0027] A high voltage is applied between the first electrode 20 and the second electrode 30 of the semiconductor device 1 according to this embodiment. In particular, when a silicon carbide layer is used as the semiconductor layer 10, an even higher voltage can be applied and used. When a high voltage is applied to the semiconductor device 1, thermal stress may be generated in the second resin member 50 due to the temperature rise. The end 20A of the first electrode 20 may deform due to pressure from the thermal stress in the second resin member 50. The second film 22 containing Al is particularly susceptible to deformation. For example, the end 20A of the first electrode 20 may deform so as to become lodged between the first resin member 40 and the insulating film 60. For example, if the end 20A of the second electrode 20 extends due to deformation to the position of the fourth semiconductor layer 14 (guard ring layer), which is a terminating breakdown structure, the device becomes more prone to failure.
[0028] According to this embodiment, by forming irregularities on the upper surface of the first resin member 40, the thermal stress of the second resin member 50 can be absorbed by the first resin member 40. This reduces the stress on the end portion 20A of the first electrode 20 and reduces the deformation of the end portion 20A of the first electrode 20.
[0029] Furthermore, by forming irregularities on the upper surface of the first resin member 40, the contact area between the first resin member 40 and the second resin member 50 can be increased, thereby improving the adhesion between the first resin member 40 and the second resin member 50.
[0030] Of the multiple recesses in the first resin member 40, the first recess 42A, which is located closest to the element region 100, is formed at the position closest to the end 20A of the first electrode 20. Preferably, the width of the first recess 42A is larger than that of the recesses located further out (the width of the second recess 42B and the width of the third recess 42C). This enhances the effect of absorbing thermal stress in the second resin member 50 at the first recess 42A, making it easier to reduce the stress on the end 20A of the first electrode 20. The width of the recess represents the width in the second direction X and / or the width in the third direction Y.
[0031] As shown in Figure 1, the end portion 20A of the first electrode 20 has, in a plan view, a corner portion 20A1 facing the corner 10E of the semiconductor layer 10 and a side portion 20A2 extending along the outer edge 10D of the semiconductor layer 10. Figure 2 shows a cross-section of the corner portion 20A1 at the end portion 20A of the first electrode 20, and Figure 3 shows a cross-section of the side portion 20A2 at the end portion 20A of the first electrode 20.
[0032] The corner portion 20A1 of the end portion 20A of the first electrode 20 is more susceptible to greater stress and deformation than the edge portion 20A2. In this embodiment, as shown in Figure 2, the corner portion 20A1 is located on the element region 100 side of the inner surface 60B of the insulating film 60 on the element region 100 side, and is not located on the insulating film 60. The corner portion 20A1 of the end portion 20A of the first electrode 20 does not overlap the upper surface 60A of the insulating film 60. With this configuration, the insulating film 60 restricts the extension of the corner portion 20A1 of the end portion 20A of the first electrode 20 toward the termination (side surface 10C of the semiconductor layer 10), thereby reducing deformation of the corner portion 20A1.
[0033] Furthermore, the edge portion 20A2 of the end portion 20A of the first electrode 20 may also be located on the element region 100 side of the inner surface 60B of the insulating film 60 so as not to overlap with the upper surface 60A of the insulating film 60. This allows the insulating film 60 to restrict the extension of the edge portion 20A2 of the end portion 20A2 of the first electrode 20 toward the terminal side (side surface 10C of the semiconductor layer 10).
[0034] Furthermore, in this embodiment, the first resin member 40 covers the outer surface 60C of the insulating film 60. The first resin member 40 continuously covers the upper surface 60A and the outer surface 60C of the insulating film 60. This improves the adhesion between the first resin member 40 and the insulating film 60, and reduces deformation of the end 20A of the first electrode 20 so that it becomes trapped between the first resin member 40 and the insulating film 60.
[0035] Furthermore, in this embodiment, the thickness of the corner portion 20A1 of the end 20A of the first electrode 20 is thinner than the thickness of the side portion 20A2 of the end 20A of the first electrode 20. In other words, the volume of the corner portion 20A1 of the end 20A of the first electrode 20 is smaller than the volume of the side portion 20A2 of the end 20A of the first electrode 20. This makes it possible to reduce the deformation of the first electrode 20 in the corner portion 20A1, where stress tends to be high.
[0036] Furthermore, the thickness of the edge portion 20A2 of the end portion 20A of the first electrode 20 may be made the same as the thickness of the corner portion 20A1 to reduce the volume.
[0037] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of symbols]
[0038] 1…Semiconductor device, 10…Semiconductor layer, 10A…First surface, 10B…Second surface, 10C…Side surface, 20…First electrode, 20A…End, 20A1…Corner, 20A2…Edge, 21…First film, 22…Second film, 30…Second electrode, 40…First resin member, 41A…First protrusion, 41B…Second protrusion, 41C…Third protrusion, 41D…Fourth protrusion, 42A…First recess, 42B…Second recess, 42C…Third recess, 50…Second resin member, 60…Insulating film, 100…Element region, 200…Terminal region
Claims
1. A semiconductor device comprising an element region and a termination region surrounding the element region, A semiconductor layer having a first surface and a second surface located opposite the first surface, A first electrode provided in contact with the first surface, A second electrode provided in contact with the second surface, A first resin member provided on the first surface in the terminal region and covering the end of the first electrode, The semiconductor layer, the first resin member, and the second resin member covering the first electrode, Equipped with, The first resin member is a semiconductor device having irregularities on the side opposite to the first surface.
2. The semiconductor device according to claim 1, wherein the aforementioned irregularities continuously surround the element region.
3. The semiconductor device according to claim 1 or 2, wherein the aforementioned irregularities have a plurality of recesses.
4. The plurality of recesses include a first recess located closest to the element region and a second recess located further out than the first recess. The semiconductor device according to claim 3, wherein the width of the first recess is greater than the width of the second recess.
5. The terminal region further comprises an insulating film provided between the first surface and the first resin member, The end of the first electrode has a corner portion facing the corner of the semiconductor layer, The semiconductor device according to claim 1 or 2, wherein the corner portion is located on the element region side of the insulating film and is not located on the insulating film.
6. The semiconductor device according to claim 5, wherein the first resin member covers the outer surface of the insulating film.
7. The end of the first electrode has a corner portion facing the corner of the semiconductor layer and a side portion extending along the outer edge of the semiconductor layer. The semiconductor device according to claim 1 or 2, wherein the thickness of the corner portion is thinner than the thickness of the edge portion.
8. The semiconductor device according to claim 1 or 2, wherein the semiconductor layer is a silicon carbide layer.
9. A semiconductor device comprising an element region and a termination region surrounding the element region, A semiconductor layer having a first surface and a second surface located opposite the first surface, A first electrode provided in contact with the first surface, A second electrode provided in contact with the second surface, A first resin member provided on the first surface in the terminal region and covering the end of the first electrode, The semiconductor layer, the first resin member, and the second resin member covering the first electrode, An insulating film is provided between the first surface and the first resin member in the terminal region, Equipped with, The end of the first electrode has a corner portion facing the corner of the semiconductor layer, The aforementioned corner portion is located on the element region side of the insulating film and is not located on the insulating film, in a semiconductor device.
10. The semiconductor device according to claim 9, wherein the first resin member covers the outer surface of the insulating film.
11. The semiconductor device according to claim 9 or 10, wherein the semiconductor layer is a silicon carbide layer.
12. A semiconductor device comprising an element region and a termination region surrounding the element region, A semiconductor layer having a first surface and a second surface located opposite the first surface, A first electrode provided in contact with the first surface, A second electrode provided in contact with the second surface, A first resin member provided on the first surface in the terminal region and covering the end of the first electrode, The semiconductor layer, the first resin member, and the second resin member covering the first electrode, Equipped with, The end of the first electrode has a corner portion facing the corner of the semiconductor layer and a side portion extending along the outer edge of the semiconductor layer. A semiconductor device in which the thickness of the corner portion is thinner than the thickness of the edge portion.
13. The semiconductor device according to claim 12, wherein the semiconductor layer is a silicon carbide layer.