Gate driver used for threshold voltage detection and compensation

Abstract

The present invention provides a gate driver that can provide desired switching performance and, in a system including power semiconductor devices, can provide desired efficiency and electromagnetic compatibility (EMC) performance. [Solution] The gate driver 104 includes a detection circuit 104A arranged to detect a threshold voltage of a power semiconductor device 106, and a gate drive circuit 104B arranged to supply a drive signal to the power semiconductor device 106 for operating the power semiconductor device 106, at least in part based on the threshold voltage detected by the detection circuit 104A. The drive signal has a waveform shaped to compensate for deviations or fluctuations in the threshold voltage from the nominal threshold voltage for the power semiconductor device 106.

Description

[Technical Field]

[0001] The embodiments described herein relate to gate drivers for use in power semiconductor devices. [Background technology]

[0002] Power semiconductor devices are used in industrial applications such as renewable energy systems and electric vehicles.

[0003] Power semiconductor devices are typically operated by gate drivers. Gate drivers are configured to supply suitable voltages and / or currents to power semiconductor devices to control their switching (e.g., turning them on or off). Ideally, gate drivers should switch power semiconductors on and off quickly, efficiently, and safely.

[0004] One type of gate driver is the active gate driver (AGD) (also sometimes called a digital gate driver). Unlike conventional gate drivers that apply a drive signal with a constant waveform to switch power semiconductor devices, active gate drivers use a drive signal with a shaped waveform to switch power semiconductor devices. By using a drive signal with a shaped waveform, desired switching performance (e.g., the trade-off between voltage / current overshoot and switching losses) can be provided, and / or desired efficiency and electromagnetic compatibility (EMC) performance can be provided in a system including power semiconductor devices.

[0005] In practice, various operating parameters of a power semiconductor device are susceptible to unintentional variations (especially deviations or variations from nominal values). Such unintentional variations can be caused, for example, by manufacturing tolerances and / or errors, aging or degradation of the power semiconductor device, or the operating conditions of the power semiconductor device (e.g., operating voltage, operating temperature). One operating parameter that is susceptible to such unintentional variations is the threshold voltage corresponding to the minimum (gate) voltage required to turn on the power semiconductor device. Unintentional variations in the threshold voltage, especially its deviation or variation from the nominal threshold voltage value, may affect the switching performance of the power semiconductor device and may be undesirable.

[0006] Next, embodiments will be described with reference to the following accompanying drawings.

Brief Description of the Drawings

[0007] [Figure 1] FIG. 1 is a schematic block diagram illustrating a system having a gate driver in one embodiment. [Figure 2] FIG. 2 is a schematic block diagram illustrating a gate driver in one embodiment. [Figure 3] FIG. 3 is a schematic circuit diagram illustrating a circuit having an active gate driver in one embodiment. [Figure 4] FIG. 4 is a graph showing drive signals that can be supplied by the active gate driver in the circuit of FIG. 3 in one embodiment. [Figure 5] FIG. 5 is a graph showing exemplary multiple transfer characteristics of a power semiconductor device in the circuit of FIG. 3. [Figure 6] FIG. 6 is a flowchart illustrating threshold voltage detection and compensation operations in one embodiment. [Figure 7] FIG. 7 is a flowchart illustrating operations for detecting the threshold voltage of a MOSFET in the circuit of FIG. 3 in one embodiment. [Figure 8]Figure 8 is a flowchart illustrating the operation for detecting the threshold voltage of the MOSFET in the circuit of Figure 3 in one embodiment. [Figure 9] Figure 9 is a flowchart illustrating the operation to compensate for fluctuations in the threshold voltage of the MOSFET in the circuit of Figure 3 in one embodiment. [Modes for carrying out the invention]

[0008] According to a first embodiment, a gate driver for a power semiconductor device is provided. The gate driver comprises a detection circuit arranged to detect a threshold voltage of the power semiconductor device, and a gate drive circuit arranged to supply a drive signal to the power semiconductor device for operating the power semiconductor device, at least in part based on the threshold voltage detected by the detection circuit. The drive signal has a waveform shaped to compensate for deviations or fluctuations of the threshold voltage from a nominal threshold voltage for the power semiconductor device.

[0009] The gate drive circuit may include a memory that stores a gate drive pattern, a control unit arranged to modify the gate drive pattern based at least partially on a threshold voltage detected by a detection circuit, and a gate drive unit arranged to generate a drive signal based at least partially on the gate drive pattern modified by the control unit and to supply the drive signal to a power semiconductor device.

[0010] The control unit may be positioned to control the detection circuit to facilitate the detection of the threshold voltage of the power semiconductor device.

[0011] The gate drive unit may include a current source or a voltage source arranged to supply drive signals.

[0012] A power semiconductor device may comprise a gate terminal, a first terminal, and a second terminal. The threshold voltage may be substantially equal to the minimum gate voltage required to bring about or provide a conductive channel between the first terminal and the second terminal.

[0013] The gate driver may further include a switch arrangement that can operate in a first state in which the gate terminal of a power semiconductor device is electrically connected to a first terminal of the power semiconductor device so that the gate terminal and the first terminal are electrically short-circuited, allowing current from a current source to flow to the gate terminal of the power semiconductor device, and a second state in which the gate terminal of the power semiconductor device is electrically disconnected from the first terminal of the power semiconductor device so that the gate terminal and the first terminal are not electrically short-circuited, preventing current from a current source from flowing to the gate terminal of the power semiconductor device.

[0014] The control unit may be configured to operate a switch configuration in a first state to allow current from a current source to flow to the gate terminal of the power semiconductor device, thereby enabling the gate voltage of the power semiconductor device to reach a threshold voltage, and to operate a detection circuit to detect the gate voltage of the power semiconductor device when the gate voltage is at the threshold voltage.

[0015] The control unit may be further configured to control or operate a current source to provide current flow to the gate terminals of a power semiconductor device in order to facilitate the detection of the threshold voltage of the power semiconductor device.

[0016] The gate drive unit may be equipped with a current source.

[0017] The gate driver may further include a desaturation protection circuit arranged to provide short-circuit protection for the power semiconductor device. The desaturation protection circuit may include a current source. The current source may be operable to supply current to a capacitor to prevent false fault triggering when a fault condition of the power semiconductor device is detected.

[0018] The detection circuit may include a first detector for detecting electrical characteristics associated with a first terminal and / or a second terminal of a power semiconductor device, wherein the electrical characteristics represent the operating state of the power semiconductor device, and a second detector for detecting the gate voltage of the power semiconductor device.

[0019] The memory may store multiple gate drive patterns. The control unit may be configured to select a gate drive pattern from the multiple gate drive patterns based at least partially on detected electrical characteristics associated with a first and / or second terminal of the power semiconductor device, and to modify the gate drive pattern at least partially on a threshold voltage detected by a detection circuit. The gate drive unit may be configured to generate a drive signal at least partially on the selected and modified gate drive pattern and to supply the drive signal to the power semiconductor device.

[0020] The power semiconductor device may include a metal-oxide-semiconductor field-effect transistor (MOSFET), where the first terminal may be a drain terminal and the second terminal may be a source terminal.

[0021] The power semiconductor device may include an insulated-gate bipolar transistor (IGBT), where the first terminal may be the emitter terminal and the second terminal may be the collector terminal.

[0022] According to a second embodiment, an integrated circuit is provided comprising the gate driver of the first embodiment. The integrated circuit may further comprise a power semiconductor device.

[0023] According to a third aspect, a system is provided comprising the gate driver described in the first aspect and a controller operably connected to the gate driver. The detection circuit is arranged to provide the controller with a detected threshold voltage. The controller is arranged to compare the detected threshold voltage with a nominal threshold voltage and, at least in part, supply a signal to the gate drive circuit based on the comparison. The gate drive circuit is arranged to supply a drive signal based at least in part on the signal received from the controller.

[0024] The controller may be configured to supply a start signal to the gate driver circuit to initiate detection of the threshold voltage of the power semiconductor device.

[0025] The system may further include power semiconductor devices operably connected to the gate driver.

[0026] A fourth aspect provides a method for controlling the operation of a power semiconductor device. The method comprises using a gate driver to detect a threshold voltage of the power semiconductor device, and using the gate driver to supply a drive signal to the power semiconductor device for operating the power semiconductor device, at least in part based on the detected threshold voltage. The drive signal has a waveform shaped to compensate for deviations or fluctuations of the threshold voltage from a nominal threshold voltage for the power semiconductor device.

[0027] The method may further comprise modifying a gate drive pattern stored in the gate driver's memory based at least partially on a detected threshold voltage, and generating a drive signal in the gate driver based at least partially on the modified gate drive pattern.

[0028] Figure 1 shows a system 100 in one embodiment. The system 100 includes a controller 102, a gate driver 104 operably connected to the controller 102, and a power semiconductor device 106 operably connected to the gate driver 104. The controller 102 and the gate driver 104 are connected directly or indirectly via electrical connections. The controller 102 is operable to control the operation of the gate driver 104, and the gate driver 104 is operable to operate the power semiconductor device (e.g., turn it on and / or off). The gate driver 104 provides isolation between the controller 102 and the power semiconductor device 106.

[0029] The controller 102 includes a processor and memory. The processor may include one or more CPUs, MCUs, MPUs, TPUs, NPUs, GPUs, logic circuits, Raspberry Pi chips, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital circuits, and / or analog circuits. The processor is configured to interpret program instructions, execute program instructions, and / or process signals, information, and / or data. The memory may include one or more volatile memories (e.g., RAM, DRAM, SRAM, etc.), one or more non-volatile memories (e.g., ROM, PROM, EPROM, EEPROM®, FRAM®, MRAM, FLASH®, SSD, NAND, NVDIMM, etc.), or any combination thereof. The memory is configured to store appropriate program instructions, commands, codes, information, and / or data. For example, the memory may store program instructions to perform or facilitate one or more operations in this disclosure. The processor and memory may be integrated or separate.

[0030] The power semiconductor device 106 includes a field-effect transistor (FET).

[0031] In one embodiment, the power semiconductor device 106 includes an insulated-gate bipolar transistor (IGBT), which includes an emitter terminal (electrode), a collector terminal (electrode), and a gate terminal (electrode). The IGBT provides or provides the minimum gate voltage (i.e., minimum gate-emitter voltage V) required to provide or not provide a conductive channel between the collector terminal and the emitter terminal. ge It has a threshold voltage (also called the gate threshold voltage) equivalent to ). The IGBT can be a P-channel IGBT or an N-channel IGBT.

[0032] In one embodiment, the power semiconductor device 106 includes a metal-oxide-semiconductor field-effect transistor (MOSFET), which includes a gate terminal (electrode), a drain terminal (electrode), and a source terminal (electrode). The MOSFET provides or provides the minimum gate voltage (i.e., minimum gate-source voltage V) required to provide or not provide a conductive channel between the source terminal and the drain terminal. gs It has a threshold voltage (also called the gate threshold voltage) equivalent to ). The MOSFET can be a P-channel MOSFET or an N-channel MOSFET.

[0033] The gate driver 104 includes one or more circuits that operate the power semiconductor device 106, particularly suitable for driving it. The circuits may include active and / or passive circuit components. The gate driver 104 is an active gate driver arranged to supply multiple drive signals having multiple shaped (non-constant) waveforms for switching (turning on and / or off) the power semiconductor device 106.

[0034] The gate driver 104 includes a detection circuit 104A and a gate drive circuit 104B. The detection circuit 104A is configured to detect the threshold voltage of the power semiconductor device 106. The detection circuit 104A may be configured to detect the load state of the power semiconductor device 106. The gate drive circuit 104B is configured to supply a drive signal to the power semiconductor device based at least partially on the detected threshold voltage. The gate drive circuit 104B may be configured to supply a drive signal to the power semiconductor device 106 based at least partially on the detected threshold voltage and load state of the power semiconductor device 106. The drive signal has a waveform shaped to compensate for undesirable deviations or fluctuations of the threshold voltage from a reference threshold voltage for the power semiconductor device 106. The reference threshold voltage for the power semiconductor device 106 may be a nominal or standard threshold voltage for the power semiconductor device 106, which is determined during the design, manufacture, and / or post-manufacturing testing of the power semiconductor device 106. The nominal or standard threshold voltage can be found in the product datasheet for the power semiconductor device 106 (typically provided by the manufacturer of the power semiconductor device 106).

[0035] The gate drive circuit 104B is configured to supply a shaped drive signal to the power semiconductor device 106 in order to switch the power semiconductor device 106 to achieve desired switching performance (e.g., a trade-off between voltage / current overshoot and switching loss). More specifically, the gate drive circuit 104B is configured to supply a shaped drive signal to the power semiconductor device 106 in order to drive the power semiconductor device 106 and to compensate for undesirable deviations or fluctuations in the threshold voltage from a reference threshold voltage.

[0036] In one embodiment, the gate drive circuit 104B is configured to control the operation of the detection circuit 104A to facilitate the detection of the threshold voltage of the power semiconductor device 106. The gate drive circuit 104B may be configured to control the operation of the detection circuit 104A to facilitate the detection of the load state of the power semiconductor device 106. For example, the gate drive circuit 104B may be configured to control when the detection circuit 104A should operate to detect the threshold voltage of the power semiconductor device 106, and optionally when the detection circuit 104A should operate to detect the load state of the power semiconductor device 106. In another embodiment, the detection circuit 104A may be controlled by another circuit or component to facilitate the detection of the threshold voltage and / or load state of the power semiconductor device 106.

[0037] The detection circuit 104A is configured to provide the detected threshold voltage to the controller 102. The detection circuit 104A may also be configured to provide the detected load state of the power semiconductor device 106 to the gate drive circuit 104B. The controller 102 is configured to compare the detected threshold voltage with a reference threshold voltage and, at least in part, supply a signal to the gate drive circuit 104B based on the comparison. The reference threshold voltage may be received, accessed, or stored by the controller 102 to facilitate the comparison. The gate drive circuit 104B is configured to generate and supply a drive signal at least in part based on the signal received from the controller 102. The gate drive circuit 104B may also be configured to generate and supply a drive signal at least in part based on the signal received from the controller 102 and the detected load state of the power semiconductor device 106. The signal received from the controller 102 is configured to influence the waveform (e.g., amplitude, duration, shape, etc.) of the drive signal supplied by the gate drive circuit 104B.

[0038] In one embodiment, the controller 102 is configured to supply a start signal to the gate driver 104 to initiate detection of the threshold voltage of the power semiconductor device 106.

[0039] Various modifications can be made to system 100. For example, the controller 102 may be at least partially integrated with the gate driver 104. For example, one or more functions of the controller 102 may be performed by the gate driver 104. For example, one or more functions of the gate driver 104 may be performed by the controller 102.

[0040] In one implementation configuration, the gate driver 104 is located within an integrated circuit (IC) or semiconductor package. In one implementation configuration, the gate driver 104 and the power semiconductor device 106 are located within the same integrated circuit or semiconductor package. In one implementation configuration, the gate driver 104 has multiple separate electronic components and is located within an electronic device or system. The gate driver 104, the controller 102, and the power semiconductor device 106 may be located within the same electronic device or system.

[0041] Figure 2 shows a gate driver 204 in one embodiment. The gate driver 204 may be operably connected to a controller and a power semiconductor device. The gate driver 204 may be a gate driver 104 in system 100.

[0042] The gate driver 204 includes a detection circuit 204A and a gate drive circuit 204B that are operably connected to each other. The function of the detection circuit 204A may be the same as that of the detection circuit 104A, and the function of the gate drive circuit 204B may be the same as that of the gate drive circuit 104B.

[0043] The detection circuit 204A is configured to detect the threshold voltage of a power semiconductor device operably connected to the gate driver 204. For example, the gate driver 204 can operate the power semiconductor device such that its gate voltage is clamped to a substantially threshold voltage, and when the gate voltage of the power semiconductor device is substantially at the threshold voltage, the detection circuit 204A can detect the gate / threshold voltage. The detection circuit 204A may also be configured to detect at least one other electrical characteristic associated with one or more other terminals (not the gate terminal) of the power semiconductor device. The at least one other electrical characteristic may represent the operating (e.g., load) state of the power semiconductor device. For example, if the power semiconductor device is a MOSFET, the electrical characteristic may include the drain current of the MOSFET. For example, if the power semiconductor device is an IGBT, the electrical characteristic may include the collector current of the IGBT. The detection circuit 204A may be electrically connected to the gate terminal and one or more other terminals of the power semiconductor device. The detection circuit 204A may communicate the detected threshold voltage and at least one other electrical characteristic to the controller and / or gate drive circuit 204B, which is operably connected to the gate driver 204, in order to facilitate the control and / or operation of the power semiconductor device. In one example, the detection circuit 204A may communicate the detected threshold voltage to the controller and at least one other detected electrical characteristic of the power semiconductor device to the gate drive circuit 204B.

[0044] The gate drive circuit 204B includes a control unit 204B1, a memory 204B2, and a gate drive unit 204B3. The control unit 204B1, the memory 204B2, and the gate drive unit 204B3 are connected directly or indirectly via electrical connections.

[0045] Memory 204B2 stores one or more gate drive patterns. Control unit 204B1 is configured to modify the gate drive pattern based at least partially on a threshold voltage detected by detection circuit 204A. For example, if memory 204B2 stores multiple gate drive patterns, control unit 204B1 may be configured to select one of the gate drive patterns stored in memory 204B2 based at least partially on the load state of the power semiconductor device (represented by at least one other detected electrical characteristic of the power semiconductor device), and to modify the selected gate drive pattern based at least partially on a threshold voltage detected by detection circuit 204A. Gate drive unit 204B3 is configured to generate a drive signal based at least partially on the modified gate drive pattern and to supply the drive signal to switch the power semiconductor device on and / or off. For example, gate drive unit 204B3 may be configured to generate a drive signal based at least partially on the selected and modified gate drive pattern and to use the drive signal to switch the power semiconductor device on and / or off. The drive signal includes a waveform shaped to compensate for deviations or variations in the threshold voltage from a reference (nominal or standard) threshold voltage for the power semiconductor device. For example, the detection circuit 204A may provide the detected threshold voltage to a controller operably connected to the gate driver 204. The detection circuit 204A may further provide at least one other detected electrical characteristic of the power semiconductor device to the control unit 204B1. The controller may compare the detected threshold voltage to a reference threshold voltage (e.g., a threshold voltage nominally designed to be present in the power semiconductor device) and supply a signal to the control unit 204B1 based at least in part on the comparison. The reference threshold voltage may be received, accessed, or stored by the controller to facilitate the comparison. The control unit 204B1 may modify the gate drive pattern stored in memory 204B2 based at least in part on the signal received from the controller.For example, the control unit 204B1 may select one of several gate drive patterns stored in memory 204B2 based at least partially on the load state of the power semiconductor device, and modify the selected gate drive pattern based at least partially on a signal received from the controller. The signal received from the controller may affect the waveform (e.g., amplitude, duration, shape, etc.) of the drive signal supplied by the gate drive unit 204B3, which in turn may affect the threshold voltage of the power semiconductor device.

[0046] The gate drive unit 204B3 may include a power source arranged to supply drive signals to the gate terminals of a power semiconductor device. The power source may include a current source or a voltage source. The gate drive unit 204B3 may include a plurality of transistors (such as p-type metal-oxide-semiconductor (PMOS) transistors and / or n-type metal-oxide-semiconductor (NMOS) transistors) electrically connected to each other that provide the power source. The memory 204B2 may store one or more gate drive patterns. For example, the memory 204B2 may store a lookup table including at least one turn-on gate drive pattern and at least one turn-off gate drive pattern. Each gate drive pattern is [N1, T1, N2, T2, ..., N n ,T n It can be defined as ], where N refers to the number of transistors turned on in the gate drive unit 204B3, T refers to the corresponding turn-on time, and n is an integer. The control unit 204B1 can select one of the gate drive patterns to use when generating a drive signal, and / or modify one or more of the gate drive patterns (for example, by modifying the values ​​of N and / or T of the gate drive pattern). The control unit 204B1 and memory 204B2 together can define memory and logic control units.

[0047] In one example where memory 204B2 stores more than one gate drive pattern, the control unit 204B1 may select one of the multiple gate drive patterns stored in memory 204B2 based at least partially on at least one other electrical characteristic detected by detection circuit 204A, and modify the selected gate drive pattern based at least partially on a threshold voltage detected by detection circuit 204A.

[0048] In another example where memory 204B2 stores more than one gate drive pattern, control unit 204B1 may modify the multiple gate drive patterns stored in memory 204B2 based at least partially on a threshold voltage detected by detection circuit 204A, and select one of the modified multiple gate drive patterns based at least partially on at least one other detected electrical characteristic of the power semiconductor device (representing the operating state of the power semiconductor device and which may be detected by detection circuit 204A).

[0049] As shown in Figure 2, the gate driver 204 further includes a non-saturation protection circuit 204C and a switch arrangement 204D that are electrically connected to each other. The control unit 204B1 may be configured to control the operation of one or more of the non-saturation protection circuit 204C and the switch arrangement 204D.

[0050] The non-saturated protection circuit 204C is arranged to provide short-circuit protection for the power semiconductor device. The non-saturated protection circuit 204C may include a current source that can operate to supply current to an external capacitor to prevent false fault triggering when the power semiconductor device is in a fault condition (e.g., a short circuit). The current source of the non-saturated protection circuit 204C may further be operable to supply current to the gate terminal of the power semiconductor device.

[0051] The switch configuration 204D may include one or more switches (e.g., transistors). The switch configuration 204D is operable in at least two different states. In the first state, the switch configuration 204D electrically connects the gate terminal of a power semiconductor device to another terminal of the power semiconductor device (e.g., the drain terminal of a MOSFET or the collector terminal of an IGBT) so that the two terminals are electrically short-circuited, allowing current from a current source (e.g., the current source of the unsaturated protection circuit 204C or the current source of the gate drive unit 204B3) to flow to the gate terminal of the power semiconductor device. In the second state, the switch configuration 204D electrically disconnects the gate terminal of the power semiconductor device to another terminal of the power semiconductor device (e.g., the drain terminal of a MOSFET or the collector terminal of an IGBT) so that the two terminals are not electrically short-circuited, preventing current from a current source (e.g., the current source of the unsaturated protection circuit 204C or the current source of the gate drive unit 204B3) from flowing to the gate terminal of the power semiconductor device.

[0052] The control unit 204B1 may be configured to facilitate the detection of the threshold voltage of the power semiconductor device. For example, the control unit 204B1 may operate the switch configuration 204D in a first state to electrically connect the gate terminal of the power semiconductor device to another terminal (e.g., the drain terminal of a MOSFET or the collector terminal of an IGBT) so that they are electrically short-circuited, and then allow current from a current source to flow to the gate terminal of the power semiconductor device so that the gate voltage of the power semiconductor device reaches the threshold voltage. The control unit 204B1 may operate the detection circuit 204A to detect the threshold voltage of the power semiconductor device when the gate voltage is at the threshold voltage. By electrically short-circuiting the gate terminal of the power semiconductor device to the other terminal (e.g., the drain terminal of a MOSFET or the collector terminal of an IGBT), the gate voltage of the power semiconductor device is effectively clamped to the threshold voltage even if the current source continues to supply current to the gate terminal of the power semiconductor device after the threshold voltage has been reached as a result of current flowing to the gate terminal from the current source. The control unit 204B1 may be configured to control and supply current sources to enable the flow of current to the gate terminals of the power semiconductor device. In one example where the gate driver 204 includes multiple current sources, the control unit 204B1 may select current sources to supply current to the gate terminals of the power semiconductor device.

[0053] Various modifications can be made to the gate driver 204. For example, one or more components or modules of the gate driver 204 may be combined. For example, the gate driver 204 may include only one current source (e.g., either the current source of the non-saturation protection circuit 204C or the current source of the gate drive unit 204B3). In one implementation configuration, the gate driver 204 is located within an integrated circuit (IC) or a semiconductor package.

[0054] Figure 3 shows a circuit 300 in one embodiment. For simplicity, the circuit 300 shows only the components relevant to this disclosure. The circuit 300 includes a microcontroller 302, an active gate driver 304, and a switch Q1 provided by an N-channel MOSFET 306 (having a gate terminal, a drain terminal, and a source terminal, as well as an illustrated body diode). The active gate driver 304 is configured to drive the MOSFET 306, in particular to switch it on and off.

[0055] Circuit 300 can be considered an exemplary implementation of system 100. Specifically, microcontroller 302 can be considered an exemplary implementation of controller 102. Active gate driver 304 can be considered an exemplary implementation of gate drivers 104, 204. For example, MOSFET 306 can be considered an exemplary implementation of power semiconductor device 106. In one implementation, the active gate driver 304 is located on a chip or within an integrated circuit.

[0056] The active gate driver 304 includes a memory and logic control unit 3040 and a gate drive unit 3041. The memory and logic control unit 3040 may be considered an exemplary implementation of the control unit 204B1 and the memory 204B2. The gate drive unit 3041 may be considered an exemplary implementation of the gate drive unit 204B3.

[0057] The gate drive unit 3041 includes a CMOS array that provides a voltage source or a current source. The memory and logic control unit 3040 stores a lookup table containing four turn-on gate drive patterns and four turn-off gate drive patterns. Each gate drive pattern is [N1, T1, N2, T2, ..., N n ,T nDefined as ], where N refers to the number of transistors turned on in the gate drive unit 3041, T refers to the corresponding turn-on time, and n is an integer. Different turn-on gate drive patterns are arranged for different operating states of MOSFET 306 (e.g., load states). Different turn-off gate drive patterns are arranged for different operating states of MOSFET 306 (e.g., multiple load states).

[0058] The memory and logic control unit 3040 is configured to select a suitable gate drive pattern from a plurality of stored gate drive patterns based on the detected operating state of the MOSFET 306 (e.g., load state). In one example, the memory and logic control unit 3040 is configured to select a gate drive pattern from the memory unit based on the detected drain current of the MOSFET 306 (representing the load state of the MOSFET 306, which may be detected, for example, via the analog front-end circuit 312 described below). The memory and logic control unit 3040 is further configured to modify the selected gate drive pattern based on a signal received from the microcontroller 302 (as a result of the microcontroller 302 comparing the detected threshold voltage of the MOSFET 306 with a reference threshold voltage for the MOSFET 306) and provide the selected and modified gate drive pattern to the gate drive unit 3041.

[0059] The gate drive unit 3041 is configured to generate a shaped drive signal based on the gate drive pattern received from the memory and logic control unit 3040, and to supply a drive signal with a shaped waveform to drive the MOSFET 306. The gate drive unit 3041 is connected to the gate and source terminals of the MOSFET 306 via terminals T2 and T1 of the active gate driver 304 to perform active gate driving.

[0060] The active gate driver 304 also includes a non-saturation protection circuit 3042 operable to provide short-circuit protection for the MOSFET 306. The non-saturation protection circuit 3042 is connected to the drain terminal of the MOSFET 306 via the terminal T3 of the active gate driver 304, the resistor 310, and a high-voltage (e.g., 600V, 1200V, 3300V, etc.) diode 308. The high-voltage diode 308 is associated with the non-saturation protection circuit 3042. The resistor 310 and the diode 308 are connected between the active gate driver 304 (terminal T3) and the drain terminal of the MOSFET 306. The cathode of the diode 308 is connected to the drain terminal of the MOSFET 306. The active gate driver 304 also includes a current source I cc 3043. The current source I cc 3043 is connected to the anode of the diode 308 via the terminal T3 and the resistor 310.

[0061] The active gate driver 304 also includes a switch arrangement having transistor switches S1 3044 and S2 3045. The switches 3044, 3045 are connected in an anti-parallel manner. The operation of the switches 3044, 3045 is controlled by the memory and logic control unit 3040. The current source I cc 3043 is connected to the gate terminal of the MOSFET 306 via the switch arrangement. In one operation, when the switch 3044 is turned on, the current source I cc 3043 is electrically connected to the gate terminal of the MOSFET 306 to supply current to the gate terminal of the MOSFET 306, and the sensing node of the non-saturation protection circuit 3042 is connected to the gate terminal of the MOSFET 306 via the switch 3044. In another operation, when the switch 3045 is turned on, the gate drive unit 3041 is electrically connected to the gate terminal of the MOSFET 306 to supply current to the gate terminal of the MOSFET 306, and the sensing node of the non-saturation protection circuit 3042 is connected to the gate terminal of the MOSFET 306 via the switch 3045.

[0062] In the faulty state of MOSFET306, current source I cc 3043 is positioned to charge an external capacitor (not shown) to provide blanking time in order to prevent false fault triggering of MOSFET 306, and high-voltage diode 308 is positioned to block high voltage from the drain terminal of MOSFET 306.

[0063] The active gate driver 304 also includes an analog-to-digital converter (ADC) 3049 and a selector 3046 for the ADC 3049. The selector 3046 may be a multiplexer. The selector 3046 includes a first input connected to the drain terminal of MOSFET 306 via terminal T4 and an analog front-end circuit 312. An amplifier 3047 is connected between the first input of the selector 3046 and terminal T4. The analog front-end circuit 312 is connected between the active gate driver 304 (terminal T4) and the drain terminal of MOSFET 306. The analog front-end circuit 312 is operable to detect the drain current of MOSFET 306 (the drain current of MOSFET 306 may represent the load state of MOSFET 306). The selector 3046 includes a second input connected to the gate terminal of MOSFET 306 via terminal T2 to detect the gate voltage of MOSFET 306. An amplifier 3048 is connected between the second input of the selector 3046 and terminal T2. The ADC3049 and selector 3046 provide a detection circuit for detecting the threshold voltage of MOSFET 306 (by detecting the gate voltage of MOSFET 306 when the gate and drain terminals of MOSFET 306 are electrically short-circuited and the gate voltage is clamped to a threshold voltage, for example by detecting the drain voltage of MOSFET 306 (i.e., the gate voltage and drain voltage are substantially the same)). In this example, the detection of the threshold voltage of MOSFET 306 is via terminal T2 and amplifier 3048.

[0064] The active gate driver 304 may have a voltage limit (e.g., 5V, 10V, 15V, 18V, etc.). The active gate driver 304 may have overvoltage protection that is activated when the gate voltage of MOSFET 306 exceeds this voltage limit.

[0065] The memory and logic control unit 3040 is configured to receive signals from the ADC 3049 (e.g., signals containing information about detected gate / threshold voltage or detected drain current), signals from the non-saturation protection circuit 3042 (e.g., signals to turn off MOSFET 306 using a suitable turn-off gate drive pattern when a fault condition is detected), and signals from the microcontroller 302 (e.g., data, commands). The memory and logic control unit 3040 is configured to supply signals (e.g., gate drive patterns) to the gate drive unit 3041, signals (e.g., control signals) to switches 3044 and 3045, and signals (e.g., control signals) to the selector 3046 in order to facilitate the detection of the threshold voltage of MOSFET 306. The memory and logic control unit 3040 is configured to cooperate with the microcontroller 302 to control or coordinate the operation of the active gate driver 304.

[0066] The microcontroller 302 is configured to receive an output signal (e.g., detected gate / threshold voltage or detected drain current) from the ADC 3049 via terminal T7 and an output signal from the unsaturated protection circuit 3042 via terminal T6. The microcontroller 302 is configured to supply signals (e.g., PWM signals, clock signals) to the memory and logic control unit 3040 and to supply signals (e.g., control signals) to the unsaturated protection circuit 3042 via terminal T5.

[0067] Various modifications can be made to the circuit 300. For example, one or more components or modules of the gate driver 304 may be combined. For example, the gate driver 304 may include only one current source (for example, either the current source 3043 or the current source of the gate drive unit 3041).

[0068] Figure 4 shows an exemplary drive signal that can be supplied by the active gate driver 304. The drive signal includes a shaped (non-constant) waveform and is output by the gate drive unit 3041. In this example, the gate drive pattern [N1, T1, N2, T2, N3, T3] is stored in the memory and logic control unit 3040, and the shaped waveform of the drive signal is a three-stage drive waveform as shown in Figure 4 (the y-axis of the graph shows the amplitude for the gate current, i.e., the current output by the gate drive unit 3041 and applied to the gate of MOSFET 306).

[0069] Figure 5 is a graph showing multiple transfer characteristics of MOSFET 306 in circuit 300 in one embodiment. The solid line in the graph represents the drain current I of MOSFET 306. d and gate voltage (i.e., gate-source voltage V) gs This shows the relationship with ).

[0070] When the drain and gate terminals of MOSFET306 are electrically short-circuited, MOSFET306 enters diode mode, where it behaves like a diode (i.e., allows current to flow from the drain terminal to the source terminal). When MOSFET306 is in diode mode, current source I cc Alternatively, a constant small current I is supplied from either the gate drive unit 3041 to the gate terminal of the MOSFET 306. cnt (Dotted line) When power is supplied, MOSFET306 can be charged, and as a result the gate-source voltage V gs The threshold voltage V th It can reach a gate-source voltage V gs The threshold voltage V thWhen the gate current I is reached, MOSFET306 turns on and a conductive channel is formed in MOSFET306. cnt The current can flow through the conductive channel of MOSFET306, and the drain current of MOSFET306 is I cnt It becomes equal to the threshold voltage V, and the gate voltage is effectively equal to the threshold voltage V th It is clamped.

[0071] In Figure 5, the drain current is I d =I cnt When this is the case, the intersection of the solid line and the dotted line is the gate-source voltage V gs This corresponds to the threshold voltage V. th is, I d This is the value when =0A. However, in reality, I cnt Because it is very small (usually on the order of milliamperes (mA)), the gate-source voltage V at the intersection gs This is the theoretical threshold voltage V th The value is sufficiently close to this. In this case, the threshold voltage V is small. th Any value within the value window corresponds to the actual threshold voltage V of MOSFET306. th It can represent this.

[0072] Figure 6 shows a threshold voltage detection and compensation operation 600 in one embodiment. Operation 600 is performed by gate drivers such as gate drivers 104, 204, and 304, and is configured to detect the threshold voltage of a power semiconductor device and to compensate for any deviation or variation in the threshold voltage from the nominal threshold voltage for the power semiconductor device.

[0073] Operation 600 includes, in 602, detecting a threshold voltage of a power semiconductor device, and, in 604, supplying a drive signal to the power semiconductor device based at least partially on the detected threshold voltage to compensate for any deviation or variation in the threshold voltage from the nominal threshold voltage. Operation 600 may further include, after 602 and before 604, modifying a gate drive pattern stored in the gate driver's memory based at least partially on the detected threshold voltage, and in the gate driver, generating a drive signal based at least partially on the modified gate drive pattern.

[0074] Figure 7 illustrates an operation 700 for detecting the threshold voltage of MOSFET 306 in one embodiment. Operation 700 is performed using an active gate driver 304 and a microcontroller 302.

[0075] Operation 700 includes initiating a threshold voltage detection operation in 702. This initiation can be performed by the microcontroller 302 or the active gate driver 304. For example, the microcontroller 302 may supply an initiation signal to the memory and logic control unit 3040. Then, in 704, switch S13044 is turned on. For example, the memory and logic control unit 3040 may supply a signal to switch 3044 to turn it on. When switch 3044 is turned on, the drain and gate terminals of MOSFET 306 are electrically short-circuited. In 706, current source I cc Current from begins to flow through switch 3044 to MOSFET 306, charging the gate terminal of MOSFET 306. The gate charge accumulates at the gate terminal of MOSFET 306, thereby increasing the gate voltage of MOSFET 306. At 708, the gate voltage of MOSFET 306 reaches the threshold voltage. In this way, a conductive channel is formed in MOSFET 306, and MOSFET 306 is turned on. After MOSFET 306 is turned on, at 710, (since the drain and gate terminals of the MOSFET are electrically short-circuited, and the MOSFET is in diode mode) current source Icc Current flows through the conductive channel in MOSFET 306, and the gate voltage is clamped to a threshold voltage. In 712, the gate voltage clamped to the threshold voltage is detected. This detection may be performed by selector 3046 under the control of memory and logic control unit 3040. For example, memory and logic control unit 3040 may supply a signal to operate selector 3046 to perform the detection. In 714, the detected gate voltage (detected threshold voltage) is transmitted, for example, from selector 3046 to microcontroller 302 via ADC 3049 and terminal T7.

[0076] Figure 8 illustrates another operation 800 for detecting the threshold voltage of MOSFET 306 in one embodiment. Operation 800 is performed using an active gate driver 304 and a microcontroller 302.

[0077] Operation 800 includes initiating a threshold voltage detection operation in 802. This initiation can be performed by the microcontroller 302 or the active gate driver 304. For example, the microcontroller 302 may supply an initiation signal to the memory and logic control unit 3040. Then, in 804, switch S23045 is turned on. For example, the memory and logic control unit 3040 may supply a signal to switch 3045 to turn it on. When switch 3045 is turned on, the drain and gate terminals of MOSFET 306 are electrically short-circuited. In 806, current I from the current source of the gate drive unit 3041 is supplied. gHowever, current begins to flow into MOSFET306, charging its gate terminal. The gate charge accumulates at the gate terminal of MOSFET306, causing the gate voltage of MOSFET306 to increase. At 808, the gate voltage of MOSFET306 reaches the threshold voltage. In this way, a conductive channel is formed in MOSFET306, and MOSFET306 is turned on. After MOSFET306 is turned on, at 810, (since the drain and gate terminals of the MOSFET are electrically short-circuited and the MOSFET is in diode mode) current I from the current source of the gate drive unit 3041 flows. g The current flows through the conductive channel in MOSFET 306, and the gate voltage is clamped to a threshold voltage. In 812, the gate voltage clamped to the threshold voltage is detected. This detection may be performed by selector 3046 under the control of memory and logic control unit 3040. For example, memory and logic control unit 3040 may supply a signal to operate selector 3046 to perform the detection. In 814, the detected gate voltage (detected threshold voltage) is transmitted, for example, from selector 3046 to microcontroller 302 via ADC 3049 and terminal T7. In one example, in operation 800, current I supplied by the current source g This can be designed or modified by controlling the operation of the gate drive unit 3041 (for example, by controlling the number of transistors that are turned on in the CMOS array of the gate drive unit 3041).

[0078] Figure 9 is a flowchart illustrating an operation 900 for compensating the threshold voltage of MOSFET 306 in one embodiment. Operation 900 is performed using an active gate driver 304 and a microcontroller 302. Operation 900 can be performed after operation 700 or operation 800.

[0079] Operation 900 includes, in 902, receiving the detected gate voltage (detected threshold voltage) in the microcontroller 302. In 904, the microcontroller 302 compares the detected gate voltage (detected threshold voltage) with a reference (nominal or standard) threshold voltage for MOSFET 306. The reference threshold voltage for MOSFET 306 is either stored in the microcontroller 302 or, if not, accessible by the microcontroller 302. The microcontroller 302 generates a signal based at least in part on the comparison and supplies it to the memory and logic control unit 3040. If the detected threshold voltage is the same as the reference threshold voltage, the signal supplied by the microcontroller 302 is configured to maintain (i.e., not modify) the gate drive pattern in the memory and logic control unit 3040. If the detected threshold voltage is different from or fluctuates from the reference threshold voltage, the signal supplied by the microcontroller 302 is configured to modify the gate drive pattern in the memory and logic control unit 3040. In 906, if the detected threshold voltage deviates from or fluctuates from the reference threshold voltage, the memory and logic control unit 3040 modifies the stored gate drive pattern based on the signal received from the microcontroller 302 and provides the modified gate drive pattern to the gate drive unit 3041. The memory and logic control unit 3040 may select the gate drive pattern to be modified from a plurality of stored gate drive patterns, at least in part, based on the detected operating state of the MOSFET 306 (e.g., the drain current of the MOSFET 306 detected by the detection circuit). In 908, the gate drive unit 3041 generates a corresponding drive signal (voltage / current signal) with a shaped waveform based on the received gate drive pattern and supplies the drive signal to the gate terminal of the MOSFET 306. In 910, the MOSFET 306 is driven using the corresponding drive signal (voltage / current signal) which compensates for the deviation or fluctuation of the threshold voltage from the nominal threshold voltage.

[0080] In one example related to the modification of the gate drive pattern in 906, the memory and logic control unit 3040 selects the gate drive pattern [N1, T1, N2, T2, ..., N n ,T n ] is the modified gate drive pattern [N1, T1', N2, T2, ..., N n ,T n The modified gate drive pattern [N1, T1', N2, T2, ..., N n ,T n This can be provided to the gate drive unit 3041.

[0081] In this example, the following formula can be applied to charge the gate terminal of MOSFET306 to the threshold voltage.

[0082]

number

[0083] Here, I g V is the gate current of MOSFET306. gs This is the gate-source voltage of MOSFET306, and C iss This is the input capacitance of MOSFET306, and C gs This is the gate-source capacitance of MOSFET306, and C gd This is the gate-drain capacitance of MOSFET306. The gate current I g The amplitude corresponds to the value of N in the gate drive pattern. iss (=C gs +C gd ) is V gs It remains virtually constant until it reaches the threshold voltage.

[0084] T1' is the reference threshold voltage V th The detected threshold voltage V th It can be calculated based on the deviation or variation of '.

[0085] Turn-on delay time t associated with MOSFET306 d This is defined as the time t0 when the gate driver started outputting current / voltage and the gate voltage V of the MOSFET306. g This can be defined as the difference between the time t1 at which the threshold voltage was reached and the time t1 at which the threshold voltage was reached.

[0086] In this article, the reference turn-on delay time t d This can be obtained based on the following:

[0087]

number

[0088] I g0 This is a constant gate current value corresponding to the value of N1 in the gate drive pattern, and V th This is the reference threshold voltage.

[0089] (Reference threshold voltage V th (A new threshold voltage V that is deviating from the original) th 'When detected in operation 700 or 800, (reference turn-on delay time t d (A new turn-on delay time t that is off from the original) d ' can be obtained based on the following.

[0090]

number

[0091] Therefore, T1' can be determined based on the following:

[0092]

number

[0093] In one embodiment, operations 700 and 900 can be combined as a single operation that occurs once or multiple times during the operation of the active gate driver 304. In one example, the combined operation is performed continuously or periodically during the operation of the active gate driver 304. In one embodiment, operations 800 and 900 can be combined as a single operation that occurs once or multiple times during the operation of the active gate driver 304. In one example, the combined operation is performed continuously or periodically during the operation of the active gate driver 304.

[0094] Embodiments of the present invention include a variety of unique features. For example, in some embodiments, an active gate driver is used to drive a power semiconductor device, and in particular, to detect and compensate for the threshold voltage of the power semiconductor device. For example, in some embodiments, the detected threshold voltage represents very accurately the actual threshold voltage of the power semiconductor device. For example, in some embodiments, more than one method is provided for detecting the threshold voltage (e.g., using a current source and switch associated with a non-saturation protection circuit, or using a current source and switch in a gate drive unit). In some embodiments, only one of these methods is implemented in the active gate driver. For example, in some embodiments, the threshold voltage is compensated in the same active gate driver by selecting and modifying a gate drive pattern stored in memory. For example, in some embodiments, a one-chip solution is provided for detecting and compensating the threshold voltage.

[0095] Some embodiments address the challenge of threshold voltage fluctuations in power semiconductor devices by using active gate drivers specifically designed and configured to address such challenges. Some exemplary features of these embodiments include: (1) the threshold voltage of the power semiconductor device can be immediately and easily detected by the active gate driver; (2) the detected threshold voltage accurately represents the actual threshold voltage; (3) the threshold voltage can be detected using multiple different methods (i.e., redundancy is incorporated); (4) the detected threshold voltage can be immediately processed to modify the gate drive pattern(s) (if the threshold voltage deviates from or fluctuates from the nominal threshold voltage and is undesirable), and / or (5) the modified gate drive pattern can compensate for deviations or fluctuations in the threshold voltage. By compensating for deviations or fluctuations in the threshold voltage of power semiconductor devices, active gate drivers can be applied to a wider range of devices or applications, facilitating optimal / desired switching performance of the power semiconductor devices.

[0096] In some embodiments, the active gate driver controls the threshold voltage V in power semiconductor devices such as MOSFETs and IGBTs. th This includes on-chip switch placement for online (real-time) detection and compensation.

[0097] Embodiments of the system, circuit, and gate driver can be applied to a variety of applications, including power electronics converters such as PFCs, motor drives, or DC-DC converters for electric vehicles, renewable energy systems, power grids, and industrial applications.

[0098] It will be understood by those skilled in the art that modifications and / or alterations (e.g., additions, omissions, substitutions, etc.) can be made to the described and / or illustrated embodiments to provide other embodiments. Therefore, the described and / or illustrated embodiments should be considered in all respects as illustrative and not restrictive. Other features and aspects of this disclosure will become apparent by considering the detailed description and accompanying drawings. Any feature(s) described herein in relation to one aspect or embodiment may be combined with any other feature(s) described herein in relation to any other aspect or embodiment, where appropriate and applicable. Where used herein, terms of degree such as “approximately,” “about,” “substantially,” or “similar” are used, depending on the context, to take into account manufacturing tolerances, degradation, trends, tendencies, imperfect actual conditions, etc.

Claims

1. A gate driver for use in power semiconductor devices, A detection circuit arranged to detect the threshold voltage of the power semiconductor device, A gate drive circuit is provided to supply a drive signal to the power semiconductor device for operating the power semiconductor device, at least partially based on the threshold voltage detected by the detection circuit, wherein the drive signal has a waveform shaped to compensate for deviations or fluctuations of the threshold voltage from the nominal threshold voltage of the power semiconductor device. A gate driver equipped with the following features.

2. The gate drive circuit is, A memory that stores the gate drive pattern, A control unit is arranged to modify the gate drive pattern based at least partially on the threshold voltage detected by the detection circuit, A gate drive unit is provided to generate the drive signal based at least partially on the gate drive pattern modified by the control unit and to supply the drive signal to the power semiconductor device. The gate driver according to claim 1, comprising:

3. The gate driver according to claim 2, wherein the control unit is arranged to control the detection circuit to facilitate the detection of the threshold voltage of the power semiconductor device.

4. The gate driver according to claim 2, wherein the gate drive unit comprises a current source arranged to supply the drive signal.

5. The gate driver according to claim 2, wherein the gate drive unit comprises a voltage source arranged to supply the drive signal.

6. The power semiconductor device comprises a gate terminal, a first terminal, and a second terminal. The threshold voltage is substantially equal to the minimum gate voltage required to bring about or provide a conductive channel between the first terminal and the second terminal. The gate driver further includes a switch configuration that allows it to operate in a first state in which the gate terminal of the power semiconductor device and the first terminal of the power semiconductor device are electrically connected so that the gate terminal of the power semiconductor device and the first terminal of the power semiconductor device are electrically short-circuited, thereby allowing current from a current source to flow to the gate terminal of the power semiconductor device, and a second state in which the gate terminal of the power semiconductor device and the first terminal of the power semiconductor device are electrically disconnected so that the gate terminal of the power semiconductor device and the first terminal of the power semiconductor device are not electrically short-circuited, thereby preventing current from the current source from flowing to the gate terminal of the power semiconductor device. The control unit is The switch configuration is operated in the first state to allow current from the current source to flow to the gate terminal of the power semiconductor device, and to enable the gate voltage of the power semiconductor device to reach the threshold voltage. The detection circuit is operated to detect the gate voltage of the power semiconductor device when the gate voltage of the power semiconductor device is at the threshold voltage, Arranged to perform the following, and to facilitate the detection of the threshold voltage of the power semiconductor device, The gate driver according to claim 2.

7. The control unit is Further arranged to control or operate the current source to provide current flow to the gate terminal of the power semiconductor device, thereby facilitating the detection of the threshold voltage of the power semiconductor device, The gate driver according to claim 6.

8. The gate driver according to claim 6, wherein the gate drive unit comprises the current source.

9. The aforementioned gate driver is The system further comprises a non-saturation protection circuit arranged to provide short-circuit protection for the power semiconductor device, The non-saturation protection circuit includes the current source, The current source is operable to supply current to a capacitor that prevents false fault triggering when a fault condition of the power semiconductor device is detected. The gate driver according to claim 6.

10. The detection circuit is A first detector for detecting the electrical characteristics associated with the first terminal and / or the second terminal of the power semiconductor device, wherein the electrical characteristics represent the operating state of the power semiconductor device. A second detector for detecting the gate voltage of the power semiconductor device, The gate driver according to claim 6, comprising:

11. The memory stores multiple gate drive patterns. The control unit is configured to select one gate drive pattern from the plurality of gate drive patterns based at least partially on the detected electrical characteristics associated with the first and / or second terminals of the power semiconductor device, and to modify the one gate drive pattern based at least partially on the threshold voltage detected by the detection circuit. The gate drive unit is arranged to generate the drive signal based at least partially on the selected and modified gate drive pattern and to supply the drive signal to the power semiconductor device. The gate driver according to claim 10.

12. The gate driver according to claim 6, wherein the power semiconductor device comprises a metal-oxide-semiconductor field-effect transistor (MOSFET), the first terminal being a drain terminal, and the second terminal being a source terminal.

13. The gate driver according to claim 6, wherein the power semiconductor device comprises an insulated gate bipolar transistor (IGBT), the first terminal being an emitter terminal, and the second terminal being a collector terminal.

14. An integrated circuit comprising the gate driver described in claim 1.

15. The integrated circuit according to claim 14, further comprising the power semiconductor device.

16. The gate driver according to claim 1, A controller operably connected to the aforementioned gate driver, A system comprising the above, wherein the detection circuit is arranged to provide the detected threshold voltage to the controller, The controller is configured to compare the detected threshold voltage with the nominal threshold voltage and, at least in part, to supply a signal to the gate drive circuit. The system is configured such that the gate drive circuit supplies the drive signal based at least partially on the signal received from the controller.

17. The system according to claim 16, wherein the controller is arranged to supply a start signal to the gate drive circuit to initiate detection of the threshold voltage of the power semiconductor device.

18. The power semiconductor device further comprises the gate driver operably connected to the gate driver. The system according to claim 16.

19. A method for controlling the operation of a power semiconductor device, A gate driver is used to detect the threshold voltage of the power semiconductor device, Using the gate driver, a drive signal is supplied to the power semiconductor device to operate the power semiconductor device, at least in part, based on the detected threshold voltage, wherein the drive signal has a waveform shaped to compensate for deviations or fluctuations in the threshold voltage from the nominal threshold voltage of the power semiconductor device. A method that includes [a certain feature].

20. Modify the gate drive pattern stored in the gate driver's memory based at least partially on the detected threshold voltage, The gate driver generates the drive signal based at least partially on the modified gate drive pattern, The method according to claim 19, further comprising:

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