Gaming machines

Abstract

We provide gaming machines with distinctive circuit boards. [Solution] The gaming machine comprises a first circuit board, the first circuit board having a first signal wiring formed on it, the first circuit board having a second signal wiring formed on it, the second signal wiring being a signal wiring formed including a meander portion, the first circuit board having a first interlayer conductive portion provided in a specific region including the location where the distance between the first signal wiring and the second signal wiring is maximized by the meander portion, the first interlayer conductive portion is provided on one side in the width direction of the first signal wiring, and on the other side in the width direction of the first signal wiring, there is no interlayer conductive portion provided at a symmetrical position with respect to the first interlayer conductive portion.

Description

Technical Field

[0006] ,

[0001] The present invention relates to a gaming table represented by a pachinko machine, a reel gaming machine (slot machine), an enclosed gaming machine, or a medal-less slot machine.

Background Art

[0002] Conventionally, as one type of gaming table, for example, a slot machine is known. Inside such a slot machine, there is a board with electronic components such as a CPU and a ROM and signal lines, and those boards are connected by a harness via a connector (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0007] According to the present invention, it is possible to provide a gaming machine that can improve performance. [Brief explanation of the drawing]

[0008] [Figure 1] This is a perspective view showing the appearance of a slot machine according to one embodiment of the present invention. [Figure 2] This is a circuit block diagram of the control unit of a slot machine relating to one embodiment of the present invention. [Figure 3] This is a view of the first layer of the liquid crystal connection substrate 500a from the surface side. [Figure 4] This is a view of the pattern silk screen printing on the first layer of the liquid crystal connection substrate 500a, seen from the surface side. [Figure 5] This is a view of the wiring of the first layer of the liquid crystal connection substrate 500a, seen from the surface side. [Figure 6] This is a circuit diagram showing the connection destination of the third connector CN3. [Figure 7] This is a magnified view of the differential pair wiring connected to the operating signal line terminals of the third connector. [Figure 8] This is a magnified view showing the area around the pads on which the terminals of the third connector CN3 are mounted. [Figure 9]This is a magnified view of the area around vias V4 to V7 in the first layer of the liquid crystal connection substrate 500a. [Figure 10] This is a diagram used to explain a specific area. [Figure 11] This is a magnified view of the area around vias V1 to V3 in the first layer of the liquid crystal connection substrate 500a. [Figure 12] This diagram shows a wiring structure related to a modified example. [Figure 13] This is a view of the second layer L2 and the third layer L3 of the conductor layer of the liquid crystal connection substrate 500a, as seen from the surface side. [Figure 14] This is a view of the 4th layer L4 to the 6th layer L6 of the conductor layer of the liquid crystal connection substrate 500a, as seen from the surface side. [Modes for carrying out the invention]

[0009] Embodiment 1 of the present invention will be described below with reference to the drawings.

[0010] <<Embodiment 1>> The slot machines described below employ a so-called "coinless" configuration, using information equivalent to the actual number of tokens (virtual token count). However, in the following explanation, this information will be referred to as "token count."

[0011] The slot machine of this embodiment is a gaming machine that proceeds through a series of games in which a predetermined number of game tokens are inserted, and multiple reels, each decorated with multiple types of symbols, start to rotate when a predetermined rotation start instruction operation is received, and based on the receipt of the rotation start instruction operation, the success or failure of an internal win of one of multiple types of winning combinations is determined by lottery, each of the multiple reels stops rotating individually when a predetermined rotation stop instruction operation is received, and if the conditions determined by the winning combination based on the result of the lottery and the combination of symbols when the multiple reels stop match predetermined payout conditions, a process of paying out the number of game tokens is executed and the game ends, and if the conditions do not match, the process of paying out the number of game tokens is not executed and the game ends.

[0012] In addition, the slot machine of the present embodiment is also a gaming table incorporating an inspection mode in which inspection of the slot machine can be executed, separately from the state in which the above-described game can be executed (hereinafter referred to as a playable state or a game mode).

[0013] In a conventional slot machine, the operation of the slot machine was confirmed at the time of factory shipment. At this time, since the operation confirmation was performed using an inspection board for operation confirmation, a process of replacing the board for the product with the inspection board was required. As a result, there were problems such as an increase in the man-hours for board replacement, breakage and wear of connectors during work, an increase in the burden on workers, and deterioration of parts. Also, when the store staff or the person in charge of the sales manufacturer of the game arcade confirms the operation, the increase in the burden on the worker is similarly a problem. For example, in order to confirm whether a reel effect using an operation mode of a reel such as reverse rotation or high-speed rotation operates properly, it is necessary to try out the gaming table (hereinafter also referred to as a trial play) until the timing when the reel effect occurs. Since such a reel effect often occurs when shifting to an advantageous game such as a bonus or an AT, there has been a work burden of continuing the trial play until hitting an AT.

[0014] In addition, a slot machine having a medal-less configuration can be played only when connected to a dedicated device. Therefore, connection to the dedicated device is also required for the above-described operation confirmation. However, when connected to the dedicated device, game history such as the number of inserted coins, the number of paid-out coins, and the number of BB times is also aggregated. Therefore, there is a problem that the game history is excessively aggregated even in the operation confirmation.

[0015] In the present embodiment, a slot machine that can solve the above problems is provided by newly introducing an inspection mode.

[0016] <Overall Configuration> First, the basic configuration of the slot machine 100 and the basic configuration of the lending machine 700 will be described using FIG. 1. FIG. 1 is an external perspective view of the slot machine 100 and the lending machine 700 as viewed from the front side (the player side).

[0017] The slot machine 100 shown in Figure 1 is an example of a gaming machine according to the present invention, and comprises a main body 101 and a front door 102 attached to the front side of the main body 101 and which can be opened and closed relative to the main body 101. Inside the center of the main body 101 (not shown), there are three reels (left reel 110, middle reel 111, right reel 112) with multiple types of symbols arranged on their outer surfaces, and are configured to rotate inside the slot machine 100. These reels 110 to 112 are driven to rotate by a drive device such as a stepping motor.

[0018] In this embodiment, each design is printed at equal intervals in appropriate numbers on a strip-shaped member, and this strip-shaped member is attached to a predetermined circular cylindrical frame to constitute each reel 110 to 112. From the player's perspective, approximately three designs are displayed vertically through the display window 113 on the reels 110 to 112, so that a total of nine designs are visible. The symbols displayed on the upper part of the left reel 110 are called the left reel upper symbols, the symbols displayed on the middle part of the left reel 110 are called the left reel middle symbols, the symbols displayed on the lower part of the left reel 110 are called the left reel lower symbols, the symbols displayed on the upper part of the middle reel 111 are called the middle reel upper symbols, the symbols displayed on the middle part of the left reel 111 are called the middle reel middle symbols, the symbols displayed on the lower part of the middle reel 111 are called the middle reel lower symbols, the symbols displayed on the upper part of the right reel 112 are called the right reel upper symbols, the symbols displayed on the middle part of the right reel 112 are called the right reel middle symbols, and the symbols displayed on the lower part of the right reel 112 are called the right reel lower symbols. Each symbol for each reel 110 to 112 is displayed three times vertically on each reel from 110 to 112 through the display window 113, for a total of nine symbols. Then, by rotating each of the reels 110 to 112, the combination of symbols visible to the player changes. In other words, each reel 110-112 functions as a display device that can display multiple combinations of symbols in a variable manner. Besides reels, other electronic image display devices such as liquid crystal displays can also be used as such display devices. Furthermore, while slot machine 100 has three reels located inside the center, the number of reels and their placement are not limited to this.

[0019] A backlight (not shown) is positioned on the back of each reel 110-112 to illuminate the individual symbols displayed in the display window 113. It is desirable that the backlight be shielded for each symbol so that each symbol is illuminated evenly. Inside the slot machine 100, an optical sensor (not shown) consisting of a light-emitting part and a light-receiving part is provided near each reel 110-112, and a light-shielding piece of a certain length provided on the reel passes between the light-emitting and light-receiving parts of this optical sensor. Based on the detection results of this optical sensor, the rotational position of the symbols on the reels is determined, and the reels 110-112 are stopped so that the target symbol is displayed on the winning line.

[0020] The winning line indicator lamp 120 is a lamp that indicates the valid winning lines. A winning line is a line on which it is determined whether or not a combination of symbols corresponding to a winning combination has been displayed. The valid winning lines are predetermined by the number of medals bet as the game medium. There are five winning lines. For example, if one medal is bet, the middle horizontal winning line becomes valid. If two medals are bet, the upper horizontal winning line and the lower horizontal winning line are added, making a total of three lines valid. If three medals are bet, the lower right downward winning line and the upper right upward winning line are added, making a total of five lines valid as winning lines. Note that the number of winning lines is not limited to five lines. For example, if one medal is bet, the middle horizontal winning line, the upper horizontal winning line, the lower horizontal winning line, the lower right downward winning line, and the upper right upward winning line may all be considered valid winning lines. Hereafter, the valid winning lines may be referred to as "valid lines."

[0021] The notification lamp 123 is a lamp that informs the player that, for example, they have internally won a specific winning combination (e.g., a bonus combination, a special combination) in the internal lottery described later, or that this internally won state has been carried over. The coin insertion lamp 124 is a lamp that informs the player that they can insert coins. The replay lamp 122 is a lamp that informs the player that they can replay the game (no coin insertion is required) if they won a replay combination, which is one of the winning combinations, in the previous game. The reel panel lamp 128 is a lamp for visual effects.

[0022] The bet buttons 130 or 132 are buttons for inserting a predetermined number of tokens (called credits) electronically stored in the slot machine 100. In the slot machine 100 shown in Figure 1, one token is inserted each time the bet button 130 is pressed. One token is inserted when pressed once, an additional token is inserted when pressed again (total of 2 tokens), and an additional token is inserted when pressed again (total of 3 tokens). When the bet button 132 is pressed, 3 tokens are inserted. Hereinafter, the bet button 130 may be referred to as the single-token bet button, and the bet button 132 may be referred to as the maximum bet button. The game token insertion lamp 129 lights up a number of lamps corresponding to the number of tokens inserted, and when the prescribed number of tokens have been inserted, the game start lamp 121 lights up to indicate that the game can be started.

[0023] The game information display unit 126 is a display unit for displaying various internal information (for example, the number of medals dispensed during bonus gameplay) numerically. The payout display unit 127 is a display unit for displaying the number of medals dispensed to the player as a result of winning a prize. In the following, the expression "dispensed to the player" may be used interchangeably with "given to the player." The game information display unit 126 and the payout display unit 127 are composed of 7-segment (SEG) displays.

[0024] The start lever 135 is a lever-type switch used to initiate the rotation of reels 110-112. That is, by operating the bet button 130 or 132 and then operating the start lever 135, reels 110-112 will begin to rotate. The operation of the start lever 135 is referred to as the game start operation.

[0025] The stop button unit 136 is equipped with stop buttons 137-139, consisting of a left stop button 137, a middle stop button 138, and a right stop button 139. The stop buttons 137-139 are button-type switches for individually stopping the reels 110-112 that have started rotating due to the operation of the start lever 135, and each button is associated with a specific reel. More specifically, the left reel 110 can be stopped by operating the left stop button 137, the middle reel 111 can be stopped by operating the middle stop button 138, and the right reel 112 can be stopped by operating the right stop button 139. Hereinafter, operations on the stop buttons 137-139 will be referred to as stop operations, with the first stop operation being the first stop operation, the next stop operation being the second stop operation, and the last stop operation being the third stop operation. The reels that are stopped in response to these stop operations will be referred to as the first stop reel, the second stop reel, and the third stop reel, respectively. Furthermore, the order in which the stop buttons 137-139 are pressed to stop all of the rotating reels 110-112 is called the operation order or pressing order. Moreover, the operation order in which the first stop operation is the left reel 110, the second stop operation is the middle reel 111, and the third stop operation is the right reel 112 is called the "forward pressing order" or simply "forward pressing," and the operation order in which the first stop operation is the right reel 112, the second stop operation is the middle reel 111, and the third stop operation is the left reel 110 is called the "reverse pressing order" or simply "reverse pressing." In addition, a light-emitting element may be provided inside each of the stop buttons 137-139, and if the stop buttons 137-139 can be operated, the light-emitting element can be illuminated to inform the player.

[0026] The instruction monitor 125 is a display unit that shows information regarding the operation order (pressing order) of the stop buttons 137 to 139, as well as error codes, setting values, etc. This instruction monitor 125 is also composed of a 7-segment (SEG) display unit. For example, if the instruction is to operate the left stop button 137, the middle stop button 138, and the right stop button 139 in that order, "1" will be displayed on the instruction monitor 125. If the instruction is to operate the left stop button 137, the right stop button 139, and the middle stop button 138 in that order, "2" will be displayed on the instruction monitor 125.

[0027] The settlement button 134 is a button for returning the inserted game tokens (number of tokens wagered) to the token count control unit 350. The door keyhole 140 is a hole for inserting a key to unlock the front door 102 of the slot machine 100.

[0028] The game token count display device 170 is a 7-segment (SEG) display that displays the number of game tokens recorded by the token count control unit 350 shown in Figure 2.

[0029] The counting button 171 is an operating means for transmitting information about the number of game tokens recorded in the token count control unit 350 shown in Figure 2 to the dispensing machine 700.

[0030] A title panel 162 is provided at the bottom of the stop button unit 136 for displaying the model name and for attaching various certification labels.

[0031] The sound hole 145 is a hole for outputting sound from the speaker 277 (see Figure 2) located inside the slot machine 100 to the outside. The side lamps 144 located on the left and right sides of the front door 102 are decorative lamps to enhance the gaming experience. A performance device 160 is located above the front door 102, and a sound hole 143 for outputting sound from the speaker 272 (see Figure 2) to the outside is provided above the performance device 160. This display device 160 includes a shutter (shielding device) 163 consisting of two horizontally opening and closing shutters, a right shutter 163a and a left shutter 163b, and a display image display device 157 (liquid crystal display device) positioned behind the shutter 163. When the right shutter 163a and the left shutter 163b are opened horizontally outward in front of the display image display device 157, the display screen of the display image display device 157 appears on the front (player side, front side) of the slot machine 100. Note that any display device capable of displaying various display images and various game information is acceptable, rather than a liquid crystal display device. For example, a multi-segment display (7-segment display), a dot matrix display, an organic EL display, a plasma display, a reel (drum), or a display device consisting of a projector and a screen may be used. The display screen is rectangular and configured so that the entire screen is visible to the player. In this embodiment, the display screen is rectangular, but it may also be square. Furthermore, decorative elements (not shown) can be placed around the periphery of the display screen, so that a portion of the periphery of the display screen is hidden by these elements, resulting in the display screen appearing to have an irregular shape. In this embodiment, the display screen is a flat surface, but it may also be a curved surface. Note that this presentation image display device 157 is an example of a presentation means.

[0032] The PUSH button 190 is an operation button that becomes operable when a predetermined effect (for example, an effect that prompts the player to press the button) is being executed. For example, when the PUSH button 190 is pressed, an effect that suggests the expectation of being awarded an AT or bonus, or an effect that suggests the awarding of benefits such as an additional number of coins in an AT, may be executed as a response effect. In addition, by operating the PUSH button 190, the player may be able to adjust the effect settings (light intensity setting, volume setting, adjustment of effect frequency (frequent effects, normal effects, infrequent effects), selection of character voices for operation navigation during AT, etc.).

[0033] The dispensing machine 700 shown in Figure 1 may also be referred to as a card unit and is an example of the gaming media management device of the present invention. This dispensing machine 700 is installed in a one-to-one relationship with the slot machine 100.

[0034] The rental machine 700 accepts cards. There are two types of "cards" referred to here. One is a visitor card (also called a general card), a prepaid gaming memory medium issued to general players who are not registered members. The other is a membership card, a gaming memory medium issued to registered players who have registered with the arcade. IC cards are used for both types of cards.

[0035] The cards store monetary value. This monetary value includes the "number of medals held" and the "money balance," which is the remaining balance of prepaid money.

[0036] The card-receiving dispensing machine 700 has a function to convert the "number of tokens held" stored on the card into "number of game tokens (credits)". The "number of game tokens (credits)" is data that can be used to set the number of bets and can also be converted into the "number of tokens held". The "number of game tokens" is obtained by deducting the "money balance" or "number of tokens held" from the card. The "number of game tokens" also includes the number of tokens won through winning. This "number of game tokens" is managed by the token count control unit 350 shown in Figure 2 and is the number of electronic tokens (amount of electronic game value) stored electromagnetically. The "number of game tokens" is decreased by performing the insertion operation using the bet buttons 130 and 132.

[0037] "Number of tokens held" is the numerical value obtained by converting the "number of tokens (credits) used for gameplay." This "number of tokens held" is stored in a way that can be identified by the player's card. In other words, by operating the counting button 171, the "number of tokens played" is converted to the "number of tokens held" and can be stored on the card. Alternatively, the "number of tokens held" may be managed by a token count management device installed in the arcade.

[0038] The front of the lending machine 700 is provided with a banknote slot 701 at the top for inserting banknotes and a card slot 702 at the bottom for inserting cards. Member cards and visitor cards inserted into the card slot 702 are received by a card reader / writer, and the information stored on the card is read. Banknotes inserted into the banknote slot 701 are identified for authenticity and type, and the face value of the banknotes is stored as the "money balance" on the card inserted into the card slot 702.

[0039] Below the banknote slot 701, an information display 703 is provided. This information display 703 is a display that provides information such as operating instructions for the lending machine 700 and the status of the slot machine 100 in text and images. Alternatively, the surface may be configured as a touch panel, allowing various operations to be input by touching the displayed items with a finger.

[0040] Below the information display 703, the cash balance display 705 and the medal balance display 706 are arranged in two rows, one above the other. The cash balance display 705 displays the "cash balance" stored on the card inserted into the card slot 702 as an amount. On the other hand, the medal balance display 706 displays the "number of medals held" stored on the card inserted into the card slot 702 as the number of medals.

[0041] The central part of the dispensing machine 700 is provided with a dispensing button 707 and a card return button 708. The dispensing button 707 is an operating means for obtaining "game tokens" by withdrawing the "money balance" stored on the card inserted into the card slot 702. Specifically, if there is a "money balance" on the card inserted into the card slot 702, the LED lamp built into the dispensing button 707 lights up in a manner that indicates that withdrawal is possible. In this state, operating the lending button 707 will add "game tokens" according to the amount of money to be withdrawn. For example, "game tokens" equivalent to 1000 yen will be added as a predetermined amount. Also, if the card's "money balance" is less than a predetermined amount (for example, less than 1000 yen), only the "game tokens" calculated from the current balance at a predetermined rate will be added. Even if the card's "money balance" is less than a predetermined amount, it may be possible to add "game tokens" equivalent to the predetermined amount by replenishing the "number of tokens held" stored on the card. The card return button 708 is operated when the player finishes playing, and is a means of operation to store the "number of tokens held" determined at the end of the game on the card inserted in the card slot 702 and then eject it. The "number of tokens held" determined at the end of the game is calculated by subtracting the number of tokens converted to "number of game tokens" from the "number of tokens held" stored on the card inserted into the card slot 702, and then adding the number of game tokens counted by the counting operation. The "money balance," "number of tokens held," and "number of game tokens" data described above are converted in the following order: "money balance" and "number of tokens held" → "number of game tokens" → "number of tokens held." In this way, the "number of tokens held" is converted to "number of game tokens" according to the "number of tokens held" identified by the card, and in the slot machine 100 of this embodiment, the number of game tokens can be used to set the bet. Therefore, it is possible to provide a new type of slot machine (managed game machine) that does not use physical tokens without confusing players who are accustomed to conventional slot machines where players receive physical tokens, insert those physical tokens to secure credits, and then use those credits to set the bet.

[0042] Although this specification does not mention "stored medals," this "stored medals" refers to the number of medals deposited with the arcade, not stored on the card. The arcade may manage the number of medals a player has won through gameplay as "points" for the day, and as "stored medals" from the following day onward, using a hall management terminal or other management computer. If both "stored medals" and "held medals" are stored, the "held medals" will be deducted first. Both "held medals" and "stored medals" may also be stored in a higher-level server (not shown) in association with the card number. In the case of visitor cards, the "held medals" are stored directly on the visitor card, but the "held medals" may also be stored in a higher-level server in association with the card number. When storing the card number in association with the higher-level server, data that identifies the time the information was stored in the higher-level server may be written to the card (member card, visitor card) before it is dispensed. The "money balance" can be written directly to the card (member card, visitor card) before it is dispensed. The timing for storing the "number of medals held" on the card (member card, visitor card) or in the higher-level server is, for example, when the counting button 171 is operated and the counting process is performed. However, instead, the information may be stored all at once when the card is returned. Furthermore, when a player finishes playing and returns their card from the dispensing machine 700, the "number of tokens held" that was stored in the dispensing machine 700 may be temporarily stored as stored tokens in the hall management terminal 800. When the player inserts the card into the same or a different dispensing machine 700 again on the same day that the card was returned, only the "number of tokens held" for that day, which was temporarily stored as stored tokens, will be stored again in the dispensing machine 700, and the "number of tokens to play" will be added within the range of that "number of tokens held," allowing the player to play.

[0043] Furthermore, the rental machine 700 may be equipped with an IR photosensitive unit that receives infrared signals from a remote control held by an employee of the gaming hall, converts them into electronic signals, and outputs them.

[0044] Furthermore, while the lending machine 700 shown in Figure 1 allowed for the lending of "game tokens" by operating the lending button 707 to withdraw the "money balance" stored on the card, it may also be possible to withdraw the "number of tokens held" recorded on the card and convert it into "game tokens." Specifically, the lending machine 700 is provided with a "number of tokens held" button, and if there are "number of tokens held" on the card inserted in the card slot 702, the built-in LED lamp on that "number of tokens held" button lights up in a manner indicating that it is ready to withdraw. In this state, by operating the "number of tokens held" button, if there are a predetermined number of tokens (for example, 50 tokens) or more, the predetermined number (for example, 50 tokens) of "game tokens" will be added. In addition, the number of tokens held by the player during gameplay, as described above, can be stored on the card as "points held" for the rest of the day, or managed by the hall management terminal 800 or other management computer, and the lending machine 700 is provided with a replay button. If there are "points remaining," the built-in LED lamp on the replay button lights up in a manner that indicates it is ready to be played. In this state, operating the replay button may add a predetermined number of "game tokens" (for example, 50 tokens).

[0045] <Control Unit Circuit Configuration> Next, the circuit configuration of the control unit of the slot machine 100 will be explained in detail using Figure 2. Note that Figure 2 shows a circuit block diagram of the control unit.

[0046] The control unit of the slot machine 100 is broadly composed of a main control unit 300 that controls the progress of the game, a first sub-control unit 400 that controls the main effects in accordance with command signals (hereinafter simply referred to as "commands") transmitted by the main control unit 300, and a second sub-control unit 500 that controls various devices based on commands transmitted from the first sub-control unit 400. Here, regarding the main control unit 300, since a large data capacity would make it difficult to verify the program and could also lead to security problems such as becoming a breeding ground for illegal modifications, the data capacity of the ROM 306 and RAM 308 of the main control unit 300 is limited.

[0047] <Main Control Unit> First, the main control unit 300 of the slot machine 100 will be described. The main control unit 300 has a game control unit 302 that controls the progress of the game and a medal count control unit 350 that controls the number of game medals owned by the player. The game control unit 302 is an example of a game control means, and the medal count control unit 350 is an example of a game value control means. The game control unit 302 is equipped with a CPU 304, a ROM 306 that stores control program data, lottery data used when internally drawing winning combinations, the arrangement of reel symbols and stopping positions, etc., a RAM 308 for temporarily storing data, an I / O 310 for controlling the input and output of various devices, a counter timer 312 for measuring time, number of times, etc., and a WDT (watchdog timer) which is not shown. Note that other storage devices may be used instead of ROM 306 and RAM 308, and the same applies to the medal count control unit 350, the first sub-control unit 400, and the second sub-control unit 500 which will be described later. The CPU 304 of the game control unit 302 operates by inputting a clock signal of a predetermined period output by a crystal oscillator (not shown) as the system clock. Furthermore, when the power is turned on, the CPU 304 sends frequency division data stored in a predetermined area of ​​the ROM 306 to the counter timer 312. The counter timer 312 determines the interrupt time based on the received frequency division data and sends an interrupt request to the CPU 304 at each interrupt time. The CPU 304 then performs monitoring of various sensors and transmission of drive pulses based on this interrupt request. For example, if the clock signal output by the crystal oscillator 315b is set to 8MHz, the frequency division value of the counter timer 312 is set to 1 / 256, and the frequency division data in the ROM 306 is set to 47, the reference interrupt time will be 256 × 47 ÷ 8MHz = 1.504ms.

[0048] The main control unit 300 includes a random number generation circuit (not shown) used as a hardware random number counter that varies a value in the range of 0 to 65535 based on a clock signal input from a crystal oscillator (not shown), and a startup signal output circuit (not shown) that outputs a startup signal (reset signal) when the power is turned on. The CPU 304 of the game control unit 302 starts game control (starts the main processing of the main control unit, which will be described later) when it receives a startup signal from this startup signal output circuit.

[0049] Furthermore, the CPU 304 of the game control unit 302 monitors the status of each bet button 130, 132, start lever 135, each stop button 137-139, payout button 134, and PUSH button 190 at each interrupt time. For example, if it detects that the bet buttons 130 or 132 have been turned on, the medal count control unit 350 executes a process to electronically insert the medals electronically stored in the medal count control unit 350 as medals to be inserted into the game. If it detects that the start lever 135 has been turned on, it outputs a signal indicating this detection to the random number generation circuit. The random number generation circuit that receives this signal latches the value at that timing and stores it in a register that stores random values ​​used for the lottery. If it detects that the left stop button 137, middle stop button 138, or right stop button 139 has been turned on, and the reels 110-112 corresponding to each stop button are in a stopable state, it executes stop control for the reels 110-112. If it is detected that the settlement button 134 has been turned on, the system will execute a process to return the electronically inserted game tokens to the token count control unit 350.

[0050] Furthermore, the CPU 304 of the game control unit 302 also monitors the status of various sensors 318 (optical sensor for the left reel 110, optical sensor for the middle reel 111, optical sensor for the right reel 112, etc.) at each interrupt time. The optical sensors for the left reel 110, the middle reel 111, and the right reel 112 are installed at predetermined positions on the mounting bases of each reel 110-112, and each time a light-shielding piece provided on the reel frame passes over them, they reach an L level. The rotation position information, which indicates how much the reel has rotated from the reference position between the time it reaches an L level and the next time it reaches an L level, is calculated based on the value obtained by counting the clock signal output by the crystal oscillator 315b. When the CPU 304 detects the above L level signal, it determines that the reel has rotated once and resets the rotation position information of the reel to zero. This rotation position information is stored in the RAM 308 of the main control unit 300.

[0051] The main control unit 300 includes a drive circuit 322 that drives motors provided on reels 110 to 112, a drive circuit 324 that drives display devices such as an instruction monitor 125, a game information display 126, and a payout count display 127, and a drive circuit 326 that drives various lamps 336 (winning line indicator lamp 120, notification lamp 123, game token insertion ready lamp 124, replay lamp 122, game token insertion lamp 129, game start lamp 121, light-emitting element 137a provided inside stop button 137, light-emitting element 138a provided inside stop button 138, and light-emitting element 139a provided inside stop button 139).

[0052] In this specification, the light-emitting element 137a located inside the stop button 137 may be referred to as the "left stop button LED 137a" or "light-emitting element 137a," the light-emitting element 138a located inside the stop button 138 may be referred to as the "middle stop button LED 138a" or "light-emitting element 138a," the light-emitting element 139a located inside the stop button 139 may be referred to as the "right stop button LED 139a" or "light-emitting element 139a," and the left stop button LED 137a, middle stop button LED 138a, and right stop button LED 139a may be referred to as the "stop button LEDs 137a~139a" or "light-emitting elements 137a~139a."

[0053] Furthermore, slot machine 100 has different settings that affect the player's advantage. There are six settings available, from setting 1 to setting 6. Generally, the higher the setting, the greater the player's advantage. Specifically, an internal winning probability is determined for each setting. The game control unit 302 is connected to a setting change button 175, which is operated when changing these settings.

[0054] Furthermore, an information output circuit 328 is connected to the game control unit 302, and the main control unit 300 outputs game information of the slot machine 100 (for example, information indicating the state of the game) to an information input circuit 650 provided by an external hall computer (not shown) via this information output circuit 328.

[0055] Furthermore, the main control unit 300 is equipped with a voltage monitoring circuit (not shown) that monitors the voltage value of the power supply supplied to the main control unit 300 from the power management unit (not shown). This voltage monitoring circuit outputs a low voltage signal to the game control unit 302 and the medal count control unit 350, respectively, when the voltage value of the power supply falls below a predetermined value (for example, 9V), indicating that the voltage has dropped.

[0056] Furthermore, the main control unit 300 is equipped with an output interface for sending commands to the first sub-control unit 400, enabling communication with the first sub-control unit 400. Information communication between the main control unit 300 and the first sub-control unit 400 is unidirectional; the main control unit 300 is configured to send signals such as commands to the first sub-control unit 400, but the first sub-control unit 400 is configured not to send signals such as commands to the main control unit 300.

[0057] The medal count control unit 350, like the game control unit 302, is equipped with a CPU 354, ROM 356, RAM 358, I / O 360 for controlling the input / output of various devices, and a counter timer 362 for measuring time, counts, etc. The CPUs 304 and 354 are mounted on the same board and connected via a buffer IC. This allows the CPU 304 to use ROM 306 and RAM 308 without using ROM 356 and RAM 358, and vice versa. A WDT (watchdog timer), not shown in the diagram, is also included. The CPU 354 of the medal count control unit 350 also operates by receiving a clock signal of a predetermined period output by a crystal oscillator (not shown) as the system clock. Furthermore, when power is turned on, the CPU 354 transmits frequency division data stored in a predetermined area of ​​the ROM 356 to the counter timer 362. The counter timer 362 determines the interrupt time based on the received frequency division data and sends an interrupt request to the CPU 354 at each interrupt time. The CPU 354 operates in response to this interrupt request. The medal count control unit 350 executes interrupt processing (medal count control unit timer interrupt processing, described later) every 0.745ms. It also communicates with the dispensing machine 700 every 300ms.

[0058] The CPU 354 of the medal count control unit 350 is also equipped with a startup signal output circuit (not shown) that outputs a startup signal (reset signal) when the power is turned on. When the CPU 354 of the medal count control unit 350 receives a startup signal from this startup signal output circuit, it starts medal count control (starts the main processing of the medal count control unit, which will be described later).

[0059] The basic circuit of the medal count control unit 350 is connected to a game medal count display device 170 consisting of a 5-digit 7-segment (SEG) display, a counting button 171, and a game medal count clear button 172.

[0060] Furthermore, the basic circuit of the medal count control unit 350 is also connected to the lending machine 700 via the lending machine connection terminal board 790. The medal count control unit 350 communicates bidirectionally with the lending machine 700.

[0061] The medal count control unit 350 sends various commands to the game control unit 302. The game control unit 302 also sends various commands to the medal count control unit 350. In other words, communication between the medal count control unit 350 and the game control unit 302 is bidirectional.

[0062] Furthermore, the medal count control unit 350 stores the "number of game medals" in a predetermined area of ​​the RAM 358. Specifically, the "number of game medals" is stored in the credit counter. The medal count control unit 350 updates the "number of game medals" stored in the predetermined area of ​​the RAM 358 by addition or subtraction processing. Addition processing includes processing based on payout commands transmitted from the game control unit 302, processing based on settlement commands transmitted from the game control unit 302, and processing based on loan notifications transmitted from the loan machine 700. On the other hand, subtraction processing includes counting processing based on the operation of the counting button 171, and processing based on insert commands transmitted from the game control unit 302.

[0063] The game token count clear button 172 shown in Figure 2 is located in a position that cannot be operated by the player (for example, a position that cannot be operated without opening the front door 102), and is a means of clearing the "game token count" stored in a predetermined area of ​​the RAM 358. For example, if the game token count remains at "2" and the player is absent, it becomes difficult to determine whether the player who left "2" intends to continue playing or not, and another player may not be able to start playing. However, if the game token count can be cleared by an employee, another player can be welcomed sooner. Note that the game token count clear button 172 does not necessarily clear the "game token count" when it is operated. For example, it may be set to clear only when the game token count is 2 or less, and if there are 3 or more, the tokens may be counted in the same way as when the counting button 171 is operated. If the counting button 171 malfunctions and the system cannot recognize that it has been operated, it may become impossible to convert the "number of game tokens played" to the "number of tokens held," potentially causing disadvantage to the player. However, if counting is also possible through operation by a store employee, this disadvantage to the player can be avoided. Furthermore, there is no need to install a new counting button for employees, thus avoiding increased costs. In addition, instead of determining the number of game tokens to decide whether to clear or count, the clearing and counting actions could be determined by how the game token count clear button 172 is operated. For example, a short press could clear the tokens, and a long press could count them. This would allow for easy selection of either clearing or counting, regardless of the number of game tokens. Alternatively, if only the game token count clear button 172 is operated, the tokens would be cleared, and if the game token count clear button 172 and another button are operated simultaneously, the tokens would be counted. This would reduce the possibility of operational errors and allow for easy selection of either clearing or counting.

[0064] <Deputy Commander> Next, the first sub-control unit 400 of the slot machine 100 will be described. The first sub-control unit 400 receives control commands transmitted by the main control unit 300 (game control unit 302) via an input interface. The first sub-control unit 400 is equipped with a basic circuit 402 that controls the entire first sub-control unit 400 based on these control commands. This basic circuit 402 is equipped with a CPU 404, a RAM 408 for temporarily storing data, an I / O 410 for controlling the input and output of various devices, and a counter timer 412 for measuring time, number of times, etc. The CPU 404 of the basic circuit 402 operates by receiving a clock signal of a predetermined period output by a crystal oscillator 414 as the system clock. The ROM 406 stores control programs and data for controlling the entire first sub-control unit 400, data for controlling the backlight lighting patterns and various indicators, etc.

[0065] The CPU 404 transmits frequency division data stored in a predetermined area of ​​the ROM 406 to the counter timer 412 via the data bus at a predetermined timing. The counter timer 412 determines the interrupt time based on the received frequency division data and sends an interrupt request to the CPU 404 at each interrupt time. The CPU 404 controls each IC and circuit based on the timing of this interrupt request.

[0066] Furthermore, the first sub-control unit 400 is equipped with a sound source IC 418, and speakers 272 and 277 are connected to the sound source IC 418 via an output interface. The sound source IC 418 controls the sound output from the amplifier and speakers 272 and 277 in response to commands from the CPU 404. An S-ROM (sound ROM) containing sound data is connected to the sound source IC 418, and the sound data acquired from this ROM is amplified by the amplifier and output from speakers 272 and 277. These speakers 272 and 277 are examples of performance elements. Although it has been stated that the PUSH button 190 is connected to the game control unit 302 and its status is monitored, the PUSH button 190 may also be connected to the first sub-control unit 400 to monitor its status, detect whether the PUSH button 190 is operated or not, and execute corresponding displays or performances when it is operated.

[0067] Furthermore, the first sub-control unit 400 is equipped with a drive circuit 422, to which various lamps 420 (upper lamp, lower lamp, side lamp 144, title panel lamp, bet button lamp, reel backlight, etc.) are connected via an input / output interface. The various lamps 420 are examples of the effects and effects.

[0068] Furthermore, the first sub-control unit 400 is equipped with a drive circuit 424 that drives the motor of the shutter 163, and the shutter 163 is connected to the drive circuit 424 via an output interface. This drive circuit 424 outputs a drive signal to a stepping motor (not shown) provided on the shutter 163 in response to a command from the CPU 404.

[0069] Furthermore, the first sub-control unit 400 is equipped with a sensor circuit 426, to which a shutter sensor 428 is connected via an input interface. The CPU 404 monitors the status of the shutter sensor 428 at interrupt intervals.

[0070] Furthermore, the CPU 404 transmits and receives signals to the second sub-control unit 500 via an output interface. The second sub-control unit 500 performs various controls of the performance device 160, including the display control of the performance image display device 157. The second sub-control unit 500 may be composed of multiple control units, such as a control unit that controls the display of the performance image display device 157 and a control unit that controls various performance drive devices (for example, a control unit that controls the motor drive of the shutter 163).

[0071] The second sub-control unit 500 receives control commands transmitted by the first sub-control unit 400 via an input interface and includes a basic circuit 502 that controls the entire second sub-control unit 500 based on these control commands. This basic circuit 502 is equipped with a CPU 504, a RAM 508 for temporarily storing data, an I / O 510 for controlling the input and output of various devices, and a counter timer 512 for measuring time, counts, etc. The CPU 504 of the basic circuit 502 operates by receiving a clock signal of a predetermined period output by a crystal oscillator 514 as the system clock. The ROM 506 stores control programs and data for controlling the entire second sub-control unit 500, as well as data for image display, etc.

[0072] The CPU 504 transmits frequency division data stored in a predetermined area of ​​the ROM 506 to the counter timer 512 via the data bus at a predetermined timing. The counter timer 512 determines the interrupt time based on the received frequency division data and sends an interrupt request to the CPU 404 at each interrupt time. The CPU 504 controls each IC and circuit based on the timing of this interrupt request.

[0073] Furthermore, the second sub-control unit 500 is equipped with a VDP 516 (video display processor), to which a ROM 506 and a VRAM 518 are connected via a bus. Based on signals from the CPU 504, the VDP 516 reads image data stored in the ROM 506, generates a display image using the work area of ​​the VRAM 518, and displays the image on the image display device 157.

[0074] <LCD connection board> Next, we will describe the LCD connection board 500a that is included in the slot machine 100.

[0075] Here, the liquid crystal connection board 500a is a board that constitutes the second sub-control unit 500 as explained with reference to Figure 2, and is primarily a board that controls the performance image display device (liquid crystal display device) 157.

[0076] The configuration of the liquid crystal connection board 500a will be described below, but this configuration can be applied to other boards in the slot machine 100 (for example, the main control board 300a (the board that constitutes the main control unit 300 shown in Figure 2), the medal count control board 350a (the board that constitutes the medal count control unit 350 shown in Figure 2), the performance control board 400a (the board that constitutes the first sub-control unit 400 shown in Figure 2), etc.).

[0077] <LCD connection board> Figure 3 is a view of the first layer of the liquid crystal connection substrate 500a from the surface side, and Figure 4 is a view of the pattern silk screen printing of the first layer of the liquid crystal connection substrate 500a from the surface side.

[0078] The liquid crystal connection substrate 500a is a multilayer substrate having multiple conductive layers. In this example, it consists of a total of six layers: the first layer 500a(L1) shown in Figure 3, the second layer 500a(L2) and the third layer (L3) shown in Figure 13, and the fourth layer 500a(L4), fifth layer 500a(L5), and sixth layer 500a(L6) shown in Figure 14. It goes without saying that the liquid crystal connection substrate 500a is not limited to a six-layer substrate.

[0079] Each layer of the liquid crystal connection substrate 500a has resist, wiring patterns, pads, lands, interlayer conductive parts (vias, through-holes), silk screen printing, etc., and components such as connectors, IC chips, capacitors, resistors, and LEDs are mounted as appropriate.

[0080] The first layer 500a(L1) of the liquid crystal connection substrate 500a can be fitted with components such as connectors, IC chips, capacitors, resistors, and LEDs. As shown in Figure 3, in this example, the first connector CN1, the third connector CN3, and the fourth connector CN4 are fitted as connectors. The second connector CN2 is fitted on the sixth layer 500a(L6), which is connected to the first layer 500a(L1) of the liquid crystal connection substrate 500a via through-holes, and is electrically connected to some terminals of the third connector CN3, but its explanation is omitted in this specification.

[0081] The first connector CN1 is a connector to which a harness for supplying power to the backlight of the liquid crystal display device 157 is connected, and it has a total of eight terminals, including a DC12V terminal connected to the DC12V power supply of the liquid crystal display device 157, a GND terminal connected to the ground line of the liquid crystal display device 157, and a control terminal connected to the control line of the liquid crystal display device 157.

[0082] The third connector CN3 is a connector to which a harness for transmitting video and other data to the liquid crystal display device 157 is connected. It has a total of 30 terminals, including a D5V terminal connected to the DC 5V power supply of the liquid crystal display device 157, a GND terminal connected to the ground of the liquid crystal display device 157, and differential signal terminals connected to the differential signal lines (LVDS lines) of the liquid crystal display device 157.

[0083] The fourth connector CN4 is a connector to which a harness for transmitting video and other data to the liquid crystal display device 157 is connected, and it has a total of nine terminals, including a GND terminal connected to the ground of the liquid crystal display device 157 and a differential signal terminal connected to the differential signal line (LVDS line) of the liquid crystal display device 157.

[0084] Furthermore, the first layer 500a (L1) includes signal wiring patterns where signal lines are formed, as well as areas where ground plane patterns are not formed (so-called ground plane gaps) NGP.

[0085] As shown in Figures 4 and 5, the first layer 500a(L1) of the liquid crystal connection substrate 500a has eight pads CN1P1 to CN1P8 for mounting the first connector CN1 having eight terminals, pads CN3P1 to CN3P30 for mounting the third connector CN3 having 30 terminals, and nine pads CN4PD1 to CN4P9 for mounting the fourth connector CN4 having nine terminals.

[0086] <LCD connection board / 3rd connector> Next, the third connector CN3 will be explained in detail using Figures 5 and 6. Figure 5 is a view of the wiring of the first layer 500a(L1) of the liquid crystal connection substrate 500a from the surface side, and Figure 6 is a circuit diagram showing the connection destination of the third connector CN3.

[0087] The third connector CN3 consists of a total of 30 terminals, numbered CN3-1 through CN3-30.

[0088] <LCD connection board / 3rd connector / DC5V terminal> Terminals CN3-1 to CN3-3 of the third connector CN3 are DC5V terminals that are wired to the DC5V power supply line of the liquid crystal connection board 500a via pads CN3P1 to CN3P3 formed on the liquid crystal connection board 500a.

[0089] <LCD connection board / 3rd connector / GND terminal> Terminals CN3-4 to CN3-7, CN3-14, CN3-17, and CN3-24 of the third connector CN3 are GND terminals that are wired to the ground line of the liquid crystal connection board 500a via pads CN3P4 to CN3P7, CN3P14, CN3P17, and CN3P24 formed on the liquid crystal connection board 500a, respectively.

[0090] <LCD connection board / 3rd connector / differential signal line terminal> Terminal CN3-8 of the third connector CN3 is wired to the differential signal line LVDTD1_P (hereinafter sometimes referred to as "differential signal line D1P") of the liquid crystal connection board 500a via pad CN3P8 formed on the liquid crystal connection board 500a, and terminal CN3-9 is a differential signal line terminal wired to the differential signal line LVDTD1_N (hereinafter sometimes referred to as "differential signal line D1N") of the liquid crystal connection board 500a via pad CN3P9 formed on the liquid crystal connection board 500a. Differential signal lines D1P and D1N are differential pair wirings that transmit two signals with inverted polarity as a pair, and in this specification, this differential pair wiring may be referred to as the first differential pair wiring PL1 (D1P, D1N).

[0091] Terminal CN3-10 of the third connector CN3 is wired to the differential signal line LVDTCLK1_P (hereinafter sometimes referred to as "differential signal line CLK1P") of the liquid crystal connection board 500a via pad CN3P10 formed on the liquid crystal connection board 500a, and terminal CN3-11 is a differential signal line terminal wired to the differential signal line LVDTCLK1_N (hereinafter sometimes referred to as "differential signal line CLK1N") of the liquid crystal connection board 500a via pad CN3P11 formed on the liquid crystal connection board 500a. The differential signal line CLK1P and the differential signal line CLK1N are differential pair wirings that transmit two signals with inverted polarity as a pair, and in this specification, this differential pair wiring may be referred to as the second differential pair wiring PL2 (CLK1P, CLK1N).

[0092] Terminal CN3-12 of the third connector CN3 is wired to the differential signal line LVDTC1_P (hereinafter sometimes referred to as "differential signal line C1P") of the liquid crystal connection board 500a via pad CN3P12 formed on the liquid crystal connection board 500a, and terminal CN3-13 is a differential signal line terminal wired to the differential signal line LVDTC1_N (hereinafter sometimes referred to as "differential signal line C1N") of the liquid crystal connection board 500a via pad CN3P13 formed on the liquid crystal connection board 500a. Differential signal lines C1P and C1N are differential pair wirings that transmit two signals with inverted polarity as a pair, and in this specification, this differential pair wiring may be referred to as the third differential pair wiring PL3 (C1P, C1N).

[0093] Terminal CN3-15 of the third connector CN3 is wired to the differential signal line LVDTB1_P (hereinafter sometimes referred to as "differential signal line B1P") of the liquid crystal connection board 500a via pad CN3P15 formed on the liquid crystal connection board 500a, and terminal CN3-16 is a differential signal line terminal wired to the differential signal line LVDTB1_N (hereinafter sometimes referred to as "differential signal line B1N") of the liquid crystal connection board 500a via pad CN3P16 formed on the liquid crystal connection board 500a. Differential signal lines B1P and B1N are differential pair wirings that transmit two signals with inverted polarity as a pair, and in this specification, this differential pair wiring may be referred to as the fourth differential pair wiring PL4 (B1P, B1N).

[0094] Terminal CN3-18 of the third connector CN3 is wired to the differential signal line LVDTA1_P (hereinafter sometimes referred to as "differential signal line A1P") of the liquid crystal connection board 500a via pad CN3P18 formed on the liquid crystal connection board 500a, and terminal CN3-19 is a differential signal line terminal wired to the differential signal line LVDTA1_N (hereinafter sometimes referred to as "differential signal line A1N") of the liquid crystal connection board 500a via pad CN3P19 formed on the liquid crystal connection board 500a. Differential signal lines A1P and A1N are differential pair wirings that transmit two signals with inverted polarity as a pair, and in this specification, this differential pair wiring may be referred to as the fifth differential pair wiring PL5 (A1P, A1N).

[0095] Terminal CN3-20 of the third connector CN3 is wired to the differential signal line LVDTD0_P (hereinafter sometimes referred to as "differential signal line D0P") of the liquid crystal connection board 500a via pad CN3P20 formed on the liquid crystal connection board 500a, and terminal CN3-21 is a differential signal line terminal wired to the differential signal line LVDTD0_N (hereinafter sometimes referred to as "differential signal line D0N") of the liquid crystal connection board 500a via pad CN3P21 formed on the liquid crystal connection board 500a. Differential signal lines D0P and D0N are differential pair wirings that transmit two signals with inverted polarity as a pair, and in this specification, this differential pair wiring may be referred to as the sixth differential pair wiring PL6 (D0P, D0N).

[0096] Terminal CN3-22 of the third connector CN3 is wired to the differential signal line LVDTCLK0_P (hereinafter sometimes referred to as "differential signal line CLK0P") of the liquid crystal connection board 500a via pad CN3P22 formed on the liquid crystal connection board 500a, and terminal CN3-23 is a differential signal line terminal wired to the differential signal line LVDTCLK0_N (hereinafter sometimes referred to as "differential signal line CLK0N") of the liquid crystal connection board 500a via pad CN3P23 formed on the liquid crystal connection board 500a. The differential signal line CLK0P and the differential signal line CLK0N are differential pair wirings that transmit two signals with inverted polarity as a pair, and in this specification, this differential pair wiring may be referred to as the seventh differential pair wiring PL7 (CLK0P, CLK0N).

[0097] Terminal CN3-25 of the third connector CN3 is wired to the differential signal line LVDTC0_P (hereinafter sometimes referred to as "differential signal line C0P") of the liquid crystal connection board 500a via pad CN3P25 formed on the liquid crystal connection board 500a, and terminal CN3-26 is a differential signal line terminal wired to the differential signal line LVDTC0_N (hereinafter sometimes referred to as "differential signal line C0N") of the liquid crystal connection board 500a via pad CN3P26 formed on the liquid crystal connection board 500a. Differential signal lines C0P and C0N are differential pair wirings that transmit two signals with inverted polarity as a pair, and in this specification, this differential pair wiring may be referred to as the eighth differential pair wiring PL8 (C0P, C0N).

[0098] Terminal CN3-27 of the third connector CN3 is wired to the differential signal line LVDTB0_P (hereinafter sometimes referred to as "differential signal line B0P") of the liquid crystal connection board 500a via pad CN3P27 formed on the liquid crystal connection board 500a, and terminal CN3-28 is a differential signal line terminal wired to the differential signal line LVDTB0_N (hereinafter sometimes referred to as "differential signal line B0N") of the liquid crystal connection board 500a via pad CN3P28 formed on the liquid crystal connection board 500a. Differential signal lines B0P and B0N are differential pair wirings that transmit two signals with inverted polarity as a pair, and in this specification, this differential pair wiring may be referred to as the ninth differential pair wiring PL9 (B0P, B0N).

[0099] Terminal CN3-29 of the third connector CN3 is wired to the differential signal line LVDTA0_P (hereinafter sometimes referred to as "differential signal line A0P") of the liquid crystal connection board 500a via pad CN3P29 formed on the liquid crystal connection board 500a, and terminal CN3-30 is a differential signal line terminal wired to the differential signal line LVDTA0_N (hereinafter sometimes referred to as "differential signal line A0N") of the liquid crystal connection board 500a via pad CN3P30 formed on the liquid crystal connection board 500a. Differential signal lines A0P and A0N are differential pair wirings that transmit two signals with inverted polarity as a pair, and in this specification, this differential pair wiring may be referred to as the 10th differential pair wiring PL10 (A0P, A0N).

[0100] <LCD connection board / differential pair wiring> Next, differential pair wiring will be explained in detail using Figures 7 and 8. Figure 7 is a magnified partial view showing the differential pair wiring connected to the operating signal line terminals of the third connector, and Figure 8 is a magnified partial view showing the area around the pads on which the terminals of the third connector CN3 are mounted.

[0101] In the following explanation of the "Nth (where N is a positive integer) differential pair wiring," the term "left side" in the expression "bent to the left at the Mth (where M is a positive integer) left bend" refers to the direction of view when looking from connector CN3 towards the direction in which the Nth differential pair wiring is drawn out. For example, in the expression "the first differential pair wiring PL1 (D1P, D1N) is bent to the left at the first left bend PL1a," "left side" means that when looking from connector CN3 towards the direction in which the first differential pair wiring PL1 (D1P, D1N) is drawn out (downward in Figures 7 and 8), the first differential pair wiring PL1 (D1P, D1N) is bent to the left at the first left bend PL1a.

[0102] Furthermore, in the description of the "Nth (N is a positive integer) differential pair wiring," the phrase "bent to the right at the Mth (M is a positive integer) right bend" refers to the direction of view from the connector CN3 looking in the direction of the Nth differential pair wiring's exit. For example, in the phrase "bent to the right at the first right bend PL1c," "right" means that when viewed from the connector CN3 looking in the direction of the first differential pair wiring PL1 (D1P, D1N)'s exit (downward in Figures 7 and 8), the first differential pair wiring PL1 (D1P, D1N) is bent to the right at the first right bend PL1c. Also, in the following explanation, "plan view" refers to the direction in which each layer of the liquid crystal connection substrate 500a is viewed from the surface side (the direction toward the plane of the paper in each drawing).

[0103] <LCD connection board / first differential pair wiring> The first differential pair wiring PL1 (D1P, D1N) is wired such that the differential signal line D1P is routed downward in a plan view of the liquid crystal connection board 500a, with the base end being pad CN3P8 on which terminal CN3-8 of the third connector CN3 is mounted, and the differential signal line D1N is routed downward in a plan view of the liquid crystal connection board 500a, with the base end being pad CN3P9 on which terminal CN3-9 of the third connector CN3 is mounted. After that, the differential signal lines D1P and D1N approach each other in the lead-out section PL1z, with the distance between them gradually decreasing, and then in the subsequent parallel section PL1p, the differential signal lines D1P and D1N are routed in parallel.

[0104] In the parallel section PL1p, the first differential pair wiring PL1 (D1P, D1N), in which differential signal lines D1P and D1N are parallel, is routed in a straight line toward the downward direction in a plan view of the liquid crystal connection substrate 500a, then passes through the special shape section PL1s, is bent to the left in the first left bend section PL1a, and subsequently is routed in a straight line toward the right and downward direction in a plan view of the liquid crystal connection substrate 500a, then is bent to the left in the second left bend section PL1b, and subsequently is routed horizontally toward the right in a plan view of the liquid crystal connection substrate 500a. After being routed in a straight line toward the front, it is bent to the right at the first right bend PL1c, and then routed in a straight line toward the lower right in a plan view of the liquid crystal connection substrate 500a, after which it is bent to the left at the third left bend PL1d, and then routed in a straight line toward the horizontal right in a plan view of the liquid crystal connection substrate 500a, and the other end of the first differential pair wiring PL1 (D1P, D1N) is connected via via to the second connector CN2 mounted on the sixth layer 500a (L6) shown in Figure 14.

[0105] The characteristic impedance is low at the pads that form the boundary with the connector, while it is high in areas where the spacing between paired differential signal lines widens, such as in specially shaped sections. For this reason, it is common practice to design high-speed communication signals, such as LCD video signals used in gaming machines, so that the characteristic impedance is a predetermined value (e.g., 100Ω). However, if there are consecutive sections with low and high characteristic impedance, the change in characteristic impedance becomes large, which presents a problem.

[0106] In this respect, according to this example, the first differential pair wiring PL1 (D1P, D1N) is wired in the order of pads CN3P8, CN3P9 → lead section PL1z → parallel section PL1p → special shaped section PL1s, and since the pads and the special shaped section are not continuous, the amount of change in characteristic impedance can be reduced, and signal reflection can be reduced.

[0107] The left bends (first left bend PL1a to third left bend PL1d) are the parts that bend the first differential pair wiring PL1 (D1P, D1N) from the first direction to the second direction (left side). In these left bends (first left bend PL1a to third left bend PL1d), the differential signal line D1P is located on the outside and the differential signal line D1N is located on the inside, so the length of the differential signal line D1N is shorter than that of the differential signal line D1P.

[0108] On the other hand, the right bend (first right bend PL1c) is the part that bends the first differential pair wiring PL1 (D1P, D1N) from the second direction to the first direction (right side). In this right bend (first right bend PL1c), the differential signal line D1N is located on the outside and the differential signal line D1P is located on the inside, so the length of the differential signal line D1P is shorter than that of the differential signal line D1N.

[0109] In this example, the number of left bends (first left bend PL1a to third left bend PL1d) is different from the number of right bends (first right bend PL1c). Therefore, in the bends, the length of the differential signal line D1P and the differential signal line D1N are different, resulting in a difference in wiring length.

[0110] In the first differential pair wiring PL1 (D1P, D1N), a special shaped section PL1s is formed near pads CN3P8 and CN3P9. In this special shaped section PL1s, while one differential signal line D1P is straight, the other differential signal line D1N is U-shaped, curving over a length L1 so as to move away from the differential signal line D1P by a maximum width W1.

[0111] The special shaped section PL1s is a part for adjusting the difference in wiring length at the bend. The differential signal line D1N is curved in a U-shape so as to move away from the differential signal line D1P, and the wiring length of the differential signal line D1N is increased so that the wiring length of the differential signal line D1P and the wiring length of the differential signal line D1N in the first differential pair wiring PL1 (D1P, D1N) become the same.

[0112] In this example, by aligning the wiring lengths within a pair in paired wiring, it is possible to prevent delays in signal arrival timing. This provides a circuit board that suppresses delays in signal arrival timing and signal waveform distortion in high-speed signals such as LCD video signals, thereby providing accurate game information at the appropriate timing, preventing players from suffering disadvantages, and preventing a decline in the enjoyment of the game.

[0113] Furthermore, since the special-shaped section PL1s is located in the connector connection section (including CN3P8, pad CN3P9, lead section PL1z, and the special-shaped section PL1s) that connects to the third connector CN3, by concentrating points of change in characteristic impedance (boundaries between the connector and pattern wiring, and meandering sections within the pair) that cause signal reflections that disrupt the signal waveform, it is possible to reduce signal waveform distortion and lower the frequency of communication errors.

[0114] <LCD connection board / 2nd differential pair wiring> The second differential pair wiring PL2 (CLK1P, CLK1N) is wired such that the differential signal line CLK1P is routed downward in a plan view of the liquid crystal connection board 500a, with the pad CN3P10 on which terminal CN3-10 of the third connector CN3 is mounted as the base end, and the differential signal line CLK1N is routed downward in a plan view of the liquid crystal connection board 500a, with the pad CN3P11 on which terminal CN3-11 of the third connector CN3 is mounted as the base end, and then the differential signal lines CLK1 and CLK1N approach each other in the lead-out section PL2z, and then in the subsequent parallel section PL2p, the differential signal lines CLK1P and CLK1N are routed in parallel.

[0115] In the parallel section PL2p, the second differential pair wiring PL2 (CLK1P, CLK1N), in which the differential signal lines CLK1P and CLK1N are parallel, is routed in a straight line toward the downward direction in a plan view of the liquid crystal connection substrate 500a while maintaining the spacing S1 between it and the adjacent first differential pair wiring PL1 (D1P, D1N). Then, after passing through the special shaped section PL2s, it is bent to the left in the first left bend section PL2a, then meanders multiple times in the meander section PL2b, then bent to the right in the first right bend section PL2c, and then routed in a straight line toward the right-downward direction in a plan view of the liquid crystal connection substrate 500a. At the second left bend PL2d, it is bent to the left, and then routed in a straight line toward the right horizontal direction in a plan view of the liquid crystal connection substrate 500a. Then, at the second right bend PL2e, it is bent to the right, and then routed in a straight line toward the right-downward diagonal direction in a plan view of the liquid crystal connection substrate 500a. Then, at the third left bend PL2f, it is bent to the left, and then routed in a straight line toward the right horizontal direction in a plan view of the liquid crystal connection substrate 500a. The other end of the second differential pair wiring PL2 (CLK1P, CLK1N) is connected via via to the second connector CN2 mounted on the sixth layer 500a (L6) shown in Figure 14.

[0116] The characteristic impedance is low at the pads that form the boundary with the connector, while it is high in areas where the spacing between paired differential signal lines widens, such as in specially shaped sections. For this reason, it is common practice to design high-speed communication signals, such as LCD video signals used in gaming machines, so that the characteristic impedance is a predetermined value (e.g., 100Ω). However, if there are consecutive sections with low and high characteristic impedance, the change in characteristic impedance becomes large, which presents a problem.

[0117] In this respect, according to this example, the second differential pair wiring PL2 (CLK1P, CLK1N) is wired in the order of pads CN3P10, CN3P11 → lead section PL2z → parallel section PL2p → special shaped section PL2s, and since the pads and the special shaped section are not continuous, the amount of change in characteristic impedance can be reduced, and signal reflection can be reduced.

[0118] The meander section PL2b is bent twice to the right by two right bends, then twice to the left by two left bends, then twice to the right by two right bends, and then twice to the left by two left bends, starting from the end of the first left bend section PL2a. In other words, in the meander section PL2b, the number of right bends and the number of left bends are the same at four, so the differential signal lines CLK1P and CLK1N have the same wiring length.

[0119] The left bends (from the first left bend PL2a to the third bend PL2f) are the sections that bend the second differential pair wiring PL2 (CLK1P, CLK1N) from the first direction to the second direction (left side). In these left bends (from the first left bend PL2a to the third bend PL2f), the differential signal line CLK1P is located on the outside and the differential signal line CLK1N is located on the inside, so the length of the differential signal line CLK1N is shorter than that of the differential signal line CLK1P.

[0120] The right bend section (from the first right bend section PL2c to the second right bend section PL2e) is the part that bends the second differential pair wiring PL2 (CLK1P, CLK1N) from the second direction to the first direction (to the right). In this right bend section (from the first right bend section PL2c to the second right bend section PL2e), the differential signal line CLK1N is located on the outside and the differential signal line CLK1P is located on the inside, so the length of the differential signal line CLK1P is shorter than that of the differential signal line CLK1N.

[0121] In this example, the number of left bends (from the first left bend PL2a to the third bend PL2f) and the number of right bends (from the first right bend PL2c to the second right bend PL2e) are different. Therefore, in the bends, the length of the differential signal line CLK1P and the differential signal line CLK1N are different, resulting in a difference in wiring length.

[0122] In the vicinity of pads CN3P10 and CN3P11 of the second differential pair wiring PL2 (CLK1P, CLK1N), a special shaped section PL2s is formed. In this special shaped section PL2s, while one differential signal line CLK1P is straight, the other differential signal line CLK1N is U-shaped, curving over a length L2 so as to move away from the differential signal line CLK1P by a maximum width W2.

[0123] The special shaped section PL2s is a part for adjusting the difference in wiring length at the bend. The differential signal line CLK1N is curved in a U-shape so as to move away from the differential signal line CLK1P, and the wiring length of the differential signal line CLK1N is increased so that the wiring length of the differential signal line CLK1P and the wiring length of the differential signal line CLK1N in the second differential pair wiring PL2 (CLK1P, CLK1N) become the same.

[0124] In this example, by aligning the wiring lengths within a pair in paired wiring, it is possible to prevent delays in signal arrival timing. This provides a circuit board that suppresses delays in signal arrival timing and signal waveform distortion in high-speed signals such as LCD video signals, thereby providing accurate game information at the appropriate timing, preventing players from suffering disadvantages, and preventing a decline in the enjoyment of the game.

[0125] Furthermore, since the special-shaped section PL2s is located in the connector connection section (including CN3P10, pad CN3P11, lead section PL2z, and the special-shaped section PL2s) that connects to the third connector CN3, by concentrating points of change in characteristic impedance (boundaries between the connector and pattern wiring, and meandering sections within the pair) that cause signal reflections that disrupt the signal waveform, it is possible to reduce signal waveform distortion and lower the frequency of communication errors.

[0126] Furthermore, as shown in Figure 8, the positions of the special-shaped portion PL1s in the first differential pair wiring PL1 (D1P, D1N) and the special-shaped portion PL2s in the second differential pair wiring PL2 (CLK1P, CLK1N) are different in the horizontal direction with respect to the wiring output direction. In other words, the start and end points of the special-shaped portion PL1s and the start and end points of the special-shaped portion PL2s are formed so that they are not aligned horizontally (they are arranged in a staggered pattern). Note that both the start and end points may not be aligned horizontally, or at least one of the start and end points may not be aligned horizontally.

[0127] In this example, the regular arrangement of multiple specially shaped parts generates resonance, preventing the gaming machine from malfunctioning due to the incorporation of specific frequencies.

[0128] Furthermore, as shown in Figure 8, the length L1 and maximum width W1 of the special-shaped portion PL1s in the first differential pair wiring PL1 (D1P, D1N) are different from the length L2 and maximum width W2 of the special-shaped portion PL2s in the second differential pair wiring PL2 (CLK1P, CLK1N).

[0129] In this example, by having multiple specially shaped parts share the same shape, resonance can be generated, preventing the gaming machine from malfunctioning due to the incorporation of specific frequencies.

[0130] Furthermore, as shown in Figure 7, the second differential pair wiring PL2 (CLK1P, CLK1N) includes a meander section PL2b (specific shape section) that adjusts the difference in wiring length between the differential signal line CLK1P and the differential signal line CLK1N and the first differential pair wiring PL1 (D1P, D1N) and the third differential pair wiring PL3 (C1P, C1N) to the fifth differential pair wiring PL5 (A1P, A1N). This prevents timing discrepancies in signal transmission between different pairs of wiring.

[0131] <LCD connection board / 3rd differential pair wiring> The third differential pair wiring PL3 (C1P, C1N) is wired such that the differential signal line C1P is routed downward in a plan view of the liquid crystal connection board 500a, with the pad CN3P12 on which terminal CN3-12 of the third connector CN3 is mounted as the base end, and the differential signal line C1N is routed downward in a plan view of the liquid crystal connection board 500a, with the pad CN3P13 on which terminal CN3-13 of the third connector CN3 is mounted as the base end, and then the differential signal lines C1P and C1N approach each other in the lead-out section PL3z, and then in the subsequent parallel section PL3p, the differential signal lines C1P and C1N are routed in parallel.

[0132] In the parallel section PL3p, the third differential pair wiring PL3 (C1P, C1N), in which differential signal lines C1P and C1N are parallel, is routed in a straight line toward the downward direction in a plan view of the liquid crystal connection substrate 500a while maintaining the spacing S2 between it and the adjacent second differential pair wiring PL2 (CLK1P, CLK1N), then passes through the special shaped section PL3s, is bent to the left in the first left bend section PL3a, and subsequently is routed in a straight line toward the right-downward direction in a plan view of the liquid crystal connection substrate 500a, before being bent to the left in the second left bend section PL3b, and subsequently The wiring is routed in a straight line horizontally to the right in a plan view of the liquid crystal connection substrate 500a, then bent to the right at the first right bend PL3c, then routed in a straight line diagonally downward to the right in a plan view of the liquid crystal connection substrate 500a, then bent to the left at the third left bend PL3d, and then routed in a straight line horizontally to the right in a plan view of the liquid crystal connection substrate 500a, with the other end of the third differential pair wiring PL3 (C1P, C1N) connected via via to the second connector CN2 mounted on the sixth layer 500a (L6) shown in Figure 14.

[0133] The characteristic impedance is low at the pads that form the boundary with the connector, while it is high in areas where the spacing between paired differential signal lines widens, such as in specially shaped sections. For this reason, it is common practice to design high-speed communication signals, such as LCD video signals used in gaming machines, so that the characteristic impedance is a predetermined value (e.g., 100Ω). However, if there are consecutive sections with low and high characteristic impedance, the change in characteristic impedance becomes large, which presents a problem.

[0134] In this regard, according to this example, the third differential pair wiring PL3 (C1P, C1N) is wired in the order of pads CN3P12, CN3P13 → lead section PL3z → parallel section PL3p → special shaped section PL3s, and since the pads and the special shaped section are not continuous, the amount of change in characteristic impedance can be reduced, and signal reflection can be reduced.

[0135] The left bends (first left bend PL3a to third left bend PL3d) are the sections that bend the third differential pair wiring PL3 (C1P, C1N) from the first direction to the second direction (left side). In these left bends (first left bend PL3a to third left bend PL3d), the differential signal line C1P is located on the outside and the differential signal line C1N is located on the inside, so the length of the differential signal line C1N is shorter than that of the differential signal line C1P.

[0136] On the other hand, the right bend (first right bend PL3c) is the part that bends the third differential pair wiring PL3 (C1P, C1N) from the second direction to the first direction (right side). In this right bend (first right bend PL3c), the differential signal line C1N is located on the outside and the differential signal line D1P is located on the inside, so the length of the differential signal line C1P is shorter than that of the differential signal line C1N.

[0137] In this example, the number of left bends (first left bend PL3a to third left bend PL3d) is different from the number of right bends (first right bend PL3c). Therefore, in the bends, the length of the differential signal line C1P and the differential signal line C1N are different, resulting in a difference in wiring length.

[0138] In the third differential pair wiring PL3 (C1P, C1N), a special shaped section PL3s is formed near pads CN3P12 and CN3P13. In this special shaped section PL3s, while one differential signal line C1P is straight, the other differential signal line C1N is U-shaped, curving over a length L3 so as to move away from the differential signal line C1P by a maximum width W3.

[0139] The special shaped section PL3s is a part for adjusting the difference in wiring length at the bend. The differential signal line C1N is curved in a U-shape so as to move away from the differential signal line C1P, and the wiring length of the differential signal line C1N is increased so that the wiring length of the differential signal line C1P and the wiring length of the differential signal line C1N in the third differential pair wiring PL3 (C1P, C1N) become the same.

[0140] In this example, by aligning the wiring lengths within a pair in paired wiring, it is possible to prevent delays in signal arrival timing. This provides a circuit board that suppresses delays in signal arrival timing and signal waveform distortion in high-speed signals such as LCD video signals, thereby providing accurate game information at the appropriate timing, preventing players from suffering disadvantages, and preventing a decline in the enjoyment of the game.

[0141] Furthermore, since the special-shaped section PL3s is located in the connector connection section (including CN3P12, pad CN3P13, lead section PL3z, and the special-shaped section PL3s) that connects to the third connector CN3, by concentrating points of change in characteristic impedance (boundaries between the connector and pattern wiring, and meandering sections within the pair) that cause signal reflections that disrupt the signal waveform, it is possible to reduce signal waveform distortion and lower the frequency of communication errors.

[0142] Furthermore, as shown in Figure 8, the positions of the special-shaped portion PL1s in the first differential pair wiring PL1 (D1P, D1N), the positions of the special-shaped portion PL2s in the second differential pair wiring PL2 (CLK1P, CLK1N), and the positions of the special-shaped portion PL3s in the third differential pair wiring PL3 (C1P, C1N) are different in the horizontal direction with respect to the wiring output direction. In other words, the start and end points of the special-shaped portion PL1s, the start and end points of the special-shaped portion PL2s, and the start and end points of the special-shaped portion PL3s are formed so that they do not align horizontally (they are arranged in a staggered pattern). Note that both the start and end points may not align horizontally, or at least one of the start and end points may not align horizontally.

[0143] In this example, the regular arrangement of multiple specially shaped parts generates resonance, preventing the gaming machine from malfunctioning due to the incorporation of specific frequencies.

[0144] Furthermore, as shown in Figure 8, the length L1 and maximum width W1 of the special-shaped portion PL1s in the first differential pair wiring PL1 (D1P, D1N), the length L2 and maximum width W2 of the special-shaped portion PL2s in the second differential pair wiring PL2 (CLK1P, CLK1N), and the length L3 and maximum width W3 of the special-shaped portion PL3s in the third differential pair wiring PL3 (C1P, C1N) are different.

[0145] In this example, by having multiple specially shaped parts share the same shape, resonance can be generated, preventing the gaming machine from malfunctioning due to the incorporation of specific frequencies.

[0146] <LCD connection board / 4th differential pair wiring> The fourth differential pair wiring PL4 (B1P, B1N) is wired such that the differential signal line B1P is routed downward in a plan view of the liquid crystal connection board 500a, with the pad CN3P15 on which terminal CN3-15 of the third connector CN3 is mounted as the base end, and the differential signal line B1N is routed downward in a plan view of the liquid crystal connection board 500a, with the pad CN3P16 on which terminal CN3-16 of the third connector CN3 is mounted as the base end, and then the differential signal line B1P and the differential signal line B1N are routed in parallel in the subsequent parallel section PL4p.

[0147] In the parallel section PL4p, the fourth differential pair wiring PL4 (B1P, B1N), in which differential signal lines B1P and B1N are parallel, is routed in a straight line toward the downward direction in a plan view of the liquid crystal connection substrate 500a while maintaining the spacing S3 between it and the adjacent third differential pair wiring PL3 (C1P, C1N). Then, after passing through the special shaped section PL4s, it is bent to the left in the first left bend section PL4a, then meanders multiple times in the meander section PL4b, then bent to the left in the second left bend section PL4c, and then routed in a straight line toward the downward right in a plan view of the liquid crystal connection substrate 500a. At the left bend PL4d, it is bent to the left, and then routed in a straight line horizontally to the right in the plan view of the liquid crystal connection substrate 500a. Then, at the first right bend PL4e, it is bent to the right, and then routed in a straight line diagonally downward to the right in the plan view of the liquid crystal connection substrate 500a. Then, at the fourth left bend PL4f, it is bent to the left, and then routed in a straight line horizontally to the right in the plan view of the liquid crystal connection substrate 500a. The other end of the fourth differential pair wiring PL4 (B1P, B1N) is connected via via to the second connector CN2 mounted on the sixth layer 500a (L6) shown in Figure 14.

[0148] The characteristic impedance is low at the pads that form the boundary with the connector, while it is high in areas where the spacing between paired differential signal lines widens, such as in specially shaped sections. For this reason, it is common practice to design high-speed communication signals, such as LCD video signals used in gaming machines, so that the characteristic impedance is a predetermined value (e.g., 100Ω). However, if there are consecutive sections with low and high characteristic impedance, the change in characteristic impedance becomes large, which presents a problem.

[0149] In this regard, according to this example, the fourth differential pair wiring PL4 (B1P, B1N) is wired in the order of pads CN3P15, CN3P16 → lead section PL4z → parallel section PL4p → special shaped section PL4s, and since the pads and the special shaped section are not continuous, the amount of change in characteristic impedance can be reduced, and signal reflection can be reduced.

[0150] The meander section PL4b is bent twice to the right by two right bends, starting from the end of the first left bend section PL4a, then bent twice to the left by two left bends, and then bent twice to the right by two right bends. In this example, because the number of left bends and right bends in the meander section PL4b are different, the wiring lengths of the differential signal line B1P and the differential signal line B1N are different in the meander section PL4b, resulting in a difference in wiring length.

[0151] The left bends (first left bend PL4a to fourth left bend PL4f) are the sections that bend the fourth differential pair wiring PL4 (B1P, B1N) from the first direction to the second direction (left side). In these left bends (first left bend PL4a to fourth left bend PL4f), the differential signal line B1P is located on the outside and the differential signal line B1N is located on the inside, so the length of the differential signal line B1N is shorter than that of the differential signal line B1P.

[0152] The right bend (first right bend PL2e) is the section that bends the fourth differential pair wiring PL4 (B1P, B1N) from the second direction to the first direction (right side). In this right bend (first right bend PL2e), the differential signal line B1N is located on the outside and the differential signal line B1P is located on the inside, so the length of the differential signal line B1P is shorter than that of the differential signal line B1N.

[0153] In this example, the number of left bends (1st left bend PL4a to 4th left bend PL2f) is different from the number of right bends (1st right bend PL2e). Therefore, in the bends, the length of the differential signal line B1P and the differential signal line B1N are different, resulting in a difference in wiring length.

[0154] In the vicinity of pads CN3P15 and CN3P16 of the fourth differential pair wiring PL4 (B1P, B1N), a special shaped section PL4s is formed. In this special shaped section PL4s, while one differential signal line B1P is straight, the other differential signal line B1N is U-shaped, curving over a length L4 so as to move away from the differential signal line B1P by a maximum width W4.

[0155] The special shaped section PL4s is a part for adjusting the difference in wiring length between the meander section and the bent section. The differential signal line B1N is curved in a U-shape so as to move away from the differential signal line B1P, and the wiring length of the differential signal line B1N is increased so that the wiring length of the differential signal line B1P and the wiring length of the differential signal line B1N in the fourth differential pair wiring PL4 (B1P, B1N) become the same.

[0156] In this example, by aligning the wiring lengths within a pair in paired wiring, it is possible to prevent delays in signal arrival timing. This provides a circuit board that suppresses delays in signal arrival timing and signal waveform distortion in high-speed signals such as LCD video signals, thereby providing accurate game information at the appropriate timing, preventing players from suffering disadvantages, and preventing a decline in the enjoyment of the game.

[0157] Furthermore, since the special-shaped section PL4s is located in the connector connection section (including CN3P15, pad CN3P16, lead section PL4z, and the special-shaped section PL4s) that connects to the third connector CN3, by concentrating points of change in characteristic impedance (boundaries between the connector and pattern wiring, and meandering sections within the pair) that cause signal reflections that disrupt the signal waveform, it is possible to reduce signal waveform distortion and lower the frequency of communication errors.

[0158] Furthermore, as shown in Figure 8, the positions of the special-shaped parts PL1s in the first differential pair wiring PL1 (D1P, D1N), PL2s in the second differential pair wiring PL2 (CLK1P, CLK1N), PL3s in the third differential pair wiring PL3 (C1P, C1N), and PL4s in the fourth differential pair wiring PL4 (B1P, B1N) are different in the horizontal direction with respect to the wiring output direction. In other words, the start and end points of the special-shaped parts PL1s, PL2s, PL3s, and PL4s are formed so that they do not align horizontally (they are arranged in a staggered pattern). Note that both the start and end points may not align horizontally, or at least one of the start and end points may not align horizontally.

[0159] In this example, the regular arrangement of multiple specially shaped parts generates resonance, preventing the gaming machine from malfunctioning due to the incorporation of specific frequencies.

[0160] Furthermore, as shown in Figure 8, the length L1 and maximum width W1 of the special-shaped portion PL1s in the first differential pair wiring PL1 (D1P, D1N), the length L2 and maximum width W2 of the special-shaped portion PL2s in the second differential pair wiring PL2 (CLK1P, CLK1N), the length L3 and maximum width W3 of the special-shaped portion PL3s in the third differential pair wiring PL3 (C1P, C1N), and the length L4 and maximum width W4 of the special-shaped portion PL4s in the fourth differential pair wiring PL4 (B1P, B1N) are different.

[0161] In this example, by having multiple specially shaped parts share the same shape, resonance can be generated, preventing the gaming machine from malfunctioning due to the incorporation of specific frequencies.

[0162] Furthermore, as shown in Figure 7, the fourth differential pair wiring PL4 (B1P, B1N) includes a meander section PL4b (specific shape section) that adjusts the difference in wiring length between the first differential pair wiring PL1 (D1P, D1N) to the third differential pair wiring PL3 (C1P, C1N) and the fifth differential pair wiring PL5 (A1P, A1N), so that timing discrepancies in signal transmission between different pair wirings can be prevented.

[0163] <LCD connection board / 5th differential pair wiring> The fifth differential pair wiring PL5 (A1P, A1N) is wired such that differential signal line A1P is routed downward in a plan view of the liquid crystal connection board 500a, with pad CN3P18 on which terminal CN3-18 of the third connector CN3 is mounted as the base end, and differential signal line A1N is routed downward in a plan view of the liquid crystal connection board 500a, with pad CN3P19 on which terminal CN3-19 of the third connector CN3 is mounted as the base end, and then differential signal line A1P and differential signal line A1N approach each other while gradually narrowing the distance between them in the lead-out section PL5z, and then differential signal line A1P and differential signal line A1N are routed in parallel in the subsequent parallel section PL5p.

[0164] The first differential pair wiring PL5 (A1P, A1N), in which differential signal lines A1P and A1N are parallel in the parallel section PL5p, is routed in a straight line downward in a plan view of the liquid crystal connection substrate 500a while maintaining the spacing S4 between it and the adjacent fourth differential pair wiring PL4 (B1P, B1N), then passes through the special shaped section PL5s, is bent to the left in the first left bend section PL5a, and subsequently is routed in a straight line diagonally downward to the right in a plan view of the liquid crystal connection substrate 500a, then is bent to the right in the first right bend section PL5b, and subsequently is routed in a straight line downward in a plan view of the liquid crystal connection substrate 500a, then is bent to the left in the second left bend section PL5c, and subsequently is routed in a straight line diagonally downward to the right in a plan view of the liquid crystal connection substrate 500a After being routed, it is bent to the left at the third left bend PL5d, then routed in a straight line toward the right horizontal direction in a plan view of the liquid crystal connection substrate 500a, then bent to the left at the fourth left bend PL5e, then meandered multiple times at the meander section PL5f, then bent to the right at the second right bend PL5g, then routed in a straight line toward the right diagonally downward in a plan view of the liquid crystal connection substrate 500a, then bent to the left at the fifth left bend PL5h, then routed in a straight line toward the right horizontal direction in a plan view of the liquid crystal connection substrate 500a, and the other end of the fifth differential pair wiring PL5 (A1P, A1N) is connected via via to the second connector CN2 mounted on the sixth layer 500a (L6) shown in Figure 14.

[0165] The characteristic impedance is low at the pads that form the boundary with the connector, while it is high in areas where the spacing between paired differential signal lines widens, such as in specially shaped sections. For this reason, it is common practice to design high-speed communication signals, such as LCD video signals used in gaming machines, so that the characteristic impedance is a predetermined value (e.g., 100Ω). However, if there are consecutive sections with low and high characteristic impedance, the change in characteristic impedance becomes large, which presents a problem.

[0166] In this regard, according to this example, the fifth differential pair wiring PL5 (A1P, A1N) is wired in the order of pads CN3P18, CN3P19 → lead section PL5z → parallel section PL5p → special shaped section PL5s, and since the pads and the special shaped section are not continuous, the amount of change in characteristic impedance can be reduced, and signal reflection can be reduced.

[0167] The meander section PL5f is bent twice to the right by two right bends, starting from the end of the fourth left bend section PL5e, then bent twice to the left by two left bends, and then bent twice to the right by two right bends. In this example, because the number of left bends and right bends in the meander section PL5f are different, the wiring lengths of the differential signal line A1P and the differential signal line A1N are different in the meander section PL5f, resulting in a difference in wiring length.

[0168] The left bends (from the first left bend PL5a to the fifth left bend PL5h) are the sections that bend the fifth differential pair wiring PL4 (A1P, A1N) from the first direction to the second direction (left side). In these left bends (from the first left bend PL5a to the fifth left bend PL5h), the differential signal line A1P is located on the outside and the differential signal line A1N is located on the inside, so the length of the differential signal line A1N is shorter than that of the differential signal line A1P.

[0169] The right bends (first right bend PL5b to second right bend PL5g) are the sections that bend the fifth differential pair wiring PL4 (B1P, B1N) from the second direction to the first direction (right side). In these right bends (first right bend PL5b to second right bend PL5g), the differential signal line A1N is located on the outside and the differential signal line A1P is located on the inside, so the length of the differential signal line A1P is shorter than that of the differential signal line A1N.

[0170] In this example, the number of left bends (from the first left bend PL5a to the fifth left bend PL5h) is different from the number of right bends (from the first right bend PL5b to the second right bend PL5g). As a result, the wiring lengths of differential signal line A1P and differential signal line A1N are different in the bends, resulting in a difference in wiring length.

[0171] In the vicinity of pads CN3P18 and CN3P19 of the fifth differential pair wiring PL5 (A1P, A1N), a special shaped section PL5s is formed. In this special shaped section PL5s, while one differential signal line A1P is straight, the other differential signal line A1N is U-shaped, curving over a length L5 so as to move away from the differential signal line A1P by a maximum width W5.

[0172] The special shaped section PL5s is a part for adjusting the difference in wiring length between the meander section and the bent section. The differential signal line A1N is curved in a U-shape so as to move away from the differential signal line A1P, and the wiring length of the differential signal line A1N is increased so that the wiring length of the differential signal line A1P and the wiring length of the differential signal line A1N in the fifth differential pair wiring PL5 (A1P, A1N) become the same.

[0173] In this example, by aligning the wiring lengths within a pair in paired wiring, it is possible to prevent delays in signal arrival timing. This provides a circuit board that suppresses delays in signal arrival timing and signal waveform distortion in high-speed signals such as LCD video signals, thereby providing accurate game information at the appropriate timing, preventing players from suffering disadvantages, and preventing a decline in the enjoyment of the game.

[0174] Furthermore, since the special-shaped section PL5s is located in the connector connection section (including CN3P18, pad CN3P19, lead section PL5z, and the special-shaped section PL5s) that connects to the third connector CN3, by concentrating points of change in characteristic impedance (boundaries between the connector and pattern wiring, and meandering sections within the pair) that cause signal reflections that disrupt the signal waveform, it is possible to reduce signal waveform distortion and lower the frequency of communication errors.

[0175] Furthermore, as shown in Figure 8, the positions of the special-shaped parts PL1s in the first differential pair wiring PL1 (D1P, D1N), PL2s in the second differential pair wiring PL2 (CLK1P, CLK1N), PL3s in the third differential pair wiring PL3 (C1P, C1N), PL4s in the fourth differential pair wiring PL4 (B1P, B1N), and PL5s in the fifth differential pair wiring PL5 (A1P, A1N) differ in the horizontal direction with respect to the wiring output direction. In other words, the start and end points of the special-shaped parts PL1s, PL2s, PL3s, PL4s, and PL5s are formed so that they do not align horizontally (they are arranged in a staggered pattern). Furthermore, the starting point and ending point may not be aligned horizontally, or at least one of the starting point and ending point may not be aligned horizontally.

[0176] In this example, the regular arrangement of multiple specially shaped parts generates resonance, preventing the gaming machine from malfunctioning due to the incorporation of specific frequencies.

[0177] Furthermore, as shown in Figure 8, the length L1 and maximum width W1 of the special-shaped portion PL1s in the first differential pair wiring PL1 (D1P, D1N), the length L2 and maximum width W2 of the special-shaped portion PL2s in the second differential pair wiring PL2 (CLK1P, CLK1N), the length L3 and maximum width W3 of the special-shaped portion PL3s in the third differential pair wiring PL3 (C1P, C1N), the length L4 and maximum width W4 of the special-shaped portion PL4s in the fourth differential pair wiring PL4 (B1P, B1N), and the length L5 and maximum width W5 of the special-shaped portion PL5s in the fifth differential pair wiring PL5 (A1P, A1N) are different.

[0178] In this example, by having multiple specially shaped parts share the same shape, resonance can be generated, preventing the gaming machine from malfunctioning due to the incorporation of specific frequencies.

[0179] Furthermore, as shown in Figure 7, the fifth differential pair wiring PL5 (A1P, A1N) includes a meander section PL5f (specific shape section) that adjusts the difference in wiring length between the first differential pair wiring PL1 (D1P, D1N) to the fourth differential pair wiring PL4 (B1P, B1N), so that a timing difference in signal transmission between different pair wirings can be prevented.

[0180] <LCD connection board / 6th differential pair wiring> The sixth differential pair wiring PL6 (D0P, D0N) is wired such that the differential signal line D0P is routed downward in a plan view of the liquid crystal connection board 500a, with the pad CN3P20 on which terminal CN3-20 of the third connector CN3 is mounted as the base end, and the differential signal line D0N is routed downward in a plan view of the liquid crystal connection board 500a, with the pad CN3P21 on which terminal CN3-21 of the third connector CN3 is mounted as the base end, and then the differential signal lines D0P and D0N approach each other in the lead-out section PL6z, and then in the subsequent parallel section PL6p, the differential signal lines D0P and D0N are routed in parallel.

[0181] The sixth differential pair wiring PL6 (D0P, D0N), in which differential signal lines D0P and D0N are parallel at the parallel section PL6p, is routed in a straight line downward in a plan view of the liquid crystal connection substrate 500a while maintaining the spacing S5 between it and the adjacent fifth differential pair wiring PL5 (A1P, A1N). Then, at the first left bend section PL6a, which is above the first left bend section PL5a of the fifth differential pair wiring PL5 (A1P, A1N), it is bent to the left, widening the spacing S5 between it and the adjacent fifth differential pair wiring PL5 (A1P, A1N) to spacing S5', and is routed in a straight line diagonally downward to the right in a plan view of the liquid crystal connection substrate 500a. Then, at the first right bend section PL6b, it is bent to the right, and subsequently, after being routed in a straight line downward in a plan view of the liquid crystal connection substrate 500a, it is bent to the right at the second right bend section PL6c, and subsequently After meandering multiple times in the meander section PL6d, it is bent to the right in the third right bend section PL6e, then routed in a straight line downward in a plan view of the liquid crystal connection substrate 500a, then bent to the left in the second left bend section PL6f, then routed in a straight line diagonally downward to the right in a plan view of the liquid crystal connection substrate 500a, then bent to the left in the third left bend section PL6g, then routed in a straight line horizontally to the right in a plan view of the liquid crystal connection substrate 500a, and the other end of the sixth differential pair wiring PL6 (D0P, D0N) is connected to the second connector CN2 mounted on the sixth layer 500a (L6) via signal vias SV6a and SV6b (shown only in the second layer 500a (L2) shown in Figure 13), which connect the six layers from the first layer 500a (L1) to the sixth layer 500a (L6) shown in Figure 14.

[0182] The meander section PL6d is bent twice to the left by two left bends, then bent twice to the right by two right bends, and then bent twice to the left by two left bends, with the end of the second right bend section PL6c as its base. In this example, since the number of left bends and right bends in the meander section PL6d are different, the wiring lengths of the differential signal line D0P and the differential signal line D0N are different in the meander section PL6d, resulting in a difference in wiring length.

[0183] The left bends (first left bend PL6a to third left bend PL6g) are the parts that bend the sixth differential pair wiring PL6 (D0P, D0N) from the first direction to the second direction (left side). In these left bends (first left bend PL6a to third left bend PL6e), the differential signal line D0P is located on the outside and the differential signal line D0N is located on the inside, so the length of the differential signal line D0N is shorter than that of the differential signal line D0P.

[0184] The right bends (from the first right bend PL6b to the third right bend PL6e) are the sections that bend the sixth differential pair wiring PL6 (D0P, D0N) from the second direction to the first direction (to the right). In these right bends (from the first right bend PL6b to the third right bend PL6e), the differential signal line D0N is located on the outside and the differential signal line D0P is located on the inside, so the length of the differential signal line D0P is shorter than that of the differential signal line D0N.

[0185] In this example, since the number of left bends (from the first left bend PL6a to the third left bend PL6g) is the same as the number of right bends (from the first right bend PL6b to the third right bend PL6e), the length of the differential signal line D1P and the differential signal line D1N are the same in the bends.

[0186] <LCD connection board / 7th differential pair wiring> The seventh differential pair wiring PL7 (CLK0P, CLK0N) is wired such that the differential signal line CLK0P is routed downward in a plan view of the liquid crystal connection board 500a, with the base end being pad CN3P22 on which terminal CN3-22 of the third connector CN3 is mounted, and the differential signal line CLK0N is routed downward in a plan view of the liquid crystal connection board 500a, with the base end being pad CN3P23 on which terminal CN3-23 of the third connector CN3 is mounted, after which the differential signal lines CLK0P and CLK0N approach each other while gradually narrowing the distance between them in the derivation section PL7z, and then in the subsequent parallel section PL7p, the differential signal lines CLK0P and CLK0N are routed in parallel.

[0187] The seventh differential pair wiring PL7 (CLK0P, CLK0N), in which differential signal lines CLK0P and CLK0N are parallel in the parallel section PL7p, is routed in a straight line toward the downward direction in a plan view of the liquid crystal connection substrate 500a while maintaining the spacing S6 between it and the adjacent sixth differential pair wiring PL6 (D0P, D0N), then passes through the special shape section PL7s, is bent to the left in the first left bend section PL7a, and subsequently is routed in a straight line toward the right and downward in a plan view of the liquid crystal connection substrate 500a, then is bent to the right in the first right bend section PL7b, and subsequently is routed in a straight line toward the downward direction in a plan view of the liquid crystal connection substrate 500a, then is bent to the left in the second left bend section PL7c, and subsequently meanders multiple times in the meander section PL7d, and then the third left At the bend PL7e, it is bent to the left, and then routed in a straight line downward in a plan view of the liquid crystal connection substrate 500a. At the fourth left bend PL7f, it is bent to the right, and then routed in a straight line diagonally downward to the right in a plan view of the liquid crystal connection substrate 500a. At the fifth left bend PL7g, it is bent to the left, and then routed in a straight line horizontally to the right in a plan view of the liquid crystal connection substrate 500a. The other end of the seventh differential pair wiring PL7 (CLK0P, CLK0N) is connected to the second connector CN2 mounted on the sixth layer 500a(L6) via signal vias SV7a and SV7b (shown only in the second layer 500a(L2) shown in Figure 13), which connect the six layers from the first layer 500a(L1) to the sixth layer 500a(L6) shown in Figure 14.

[0188] The characteristic impedance is low at the pads that form the boundary with the connector, while it is high in areas where the spacing between paired differential signal lines widens, such as in specially shaped sections. For this reason, it is common practice to design high-speed communication signals, such as LCD video signals used in gaming machines, so that the characteristic impedance is a predetermined value (e.g., 100Ω). However, if there are consecutive sections with low and high characteristic impedance, the change in characteristic impedance becomes large, which presents a problem.

[0189] In this respect, according to this example, the seventh differential pair wiring PL7 (CLK0P, CLK0N) is wired in the order of pads CN3P22, CN3P23 → lead section PL7z → parallel section PL7p → special shaped section PL7s, and since the pads and the special shaped section are not continuous, the amount of change in characteristic impedance can be reduced, and signal reflection can be reduced.

[0190] The meander section PL7d is bent twice to the right by two right bends, starting from the end of the second left bend section PL7c, then bent twice to the left by two left bends, and then bent twice to the right by two right bends. In this example, because the number of left bends and right bends in the meander section PL7d are different, the wiring lengths of the differential signal line CLK0P and the differential signal line CLK0N are different in the meander section PL7d, resulting in a difference in wiring length.

[0191] The left bends (from the first left bend PL7a to the fifth left bend PL7g) are the sections that bend the seventh differential pair wiring PL7 (CLK0P, CLK0N) from the first direction to the second direction (left side). In these left bends (from the first left bend PL7a to the fifth left bend PL7g), the differential signal line CLK10P is located on the outside and the differential signal line CLK0N is located on the inside, so the length of the differential signal line CLK0N is shorter than that of the differential signal line CLK0P.

[0192] The right bend (first right bend PL7b) is the section that bends the seventh differential pair wiring PL7 (CLK0P, CLK0N) from the second direction to the first direction (right side). In this first right bend PL7b, the differential signal line CLK0N is located on the outside and the differential signal line CLK0P is located on the inside, so the length of the differential signal line CLK0P is shorter than that of the differential signal line CLK0N.

[0193] In this example, the number of left bends (1st left bend PL7a to 5th left bend PL7g) is different from the number of right bends (1st right bend PL7b). Therefore, in the bends, the length of the differential signal line CLK0P and the differential signal line CLK0N are different, resulting in a difference in wiring length.

[0194] In the vicinity of pads CN3P22 and CN3P23 of the seventh differential pair wiring PL7 (CLK0P, CLK0N), a special shaped section PL7s is formed. In this special shaped section PL7s, while one differential signal line CLK0P is straight, the other differential signal line CLK0N is curved in a U-shape over a length L7 so as to move away from the differential signal line CLK0P by a maximum width W7.

[0195] The specially shaped section PL7s is a part for adjusting the difference in wiring length between the meander section and the bent section. The differential signal line CLK0N is curved in a U-shape so as to move away from the differential signal line CLK0P, and the wiring length of the differential signal line CLK0N is increased so that the wiring length of the differential signal line CLK0P and the wiring length of the differential signal line CLK0N in the 7th differential pair wiring PL7 (CLK0P, CLK0N) become the same.

[0196] In this example, by aligning the wiring lengths within a pair in paired wiring, it is possible to prevent delays in signal arrival timing. This provides a circuit board that suppresses delays in signal arrival timing and signal waveform distortion in high-speed signals such as LCD video signals, thereby providing accurate game information at the appropriate timing, preventing players from suffering disadvantages, and preventing a decline in the enjoyment of the game.

[0197] Furthermore, since the special-shaped section PL7s is located in the connector connection section (including CN3P22, pad CN3P23, lead section PL7z, and the special-shaped section PL7s) that connects to the third connector CN3, by concentrating points of change in characteristic impedance (boundaries between the connector and pattern wiring, and meandering sections within the pair) that cause signal reflections that disrupt the signal waveform, it is possible to reduce signal waveform distortion and lower the frequency of communication errors.

[0198] Furthermore, as shown in Figure 8, the positions of the special-shaped portion PL1s in the first differential pair wiring PL1 (D1P, D1N), the special-shaped portion PL2s in the second differential pair wiring PL2 (CLK1P, CLK1N), the special-shaped portion PL3s in the third differential pair wiring PL3 (C1P, C1N), the special-shaped portion PL4s in the fourth differential pair wiring PL4 (B1P, B1N), the special-shaped portion PL5s in the fifth differential pair wiring PL5 (A1P, A1N), and the special-shaped portion PL7s in the seventh differential pair wiring PL7 (CLK0P, CLK0N) differ in the horizontal direction with respect to the wiring output direction. In other words, the start and end points of the special shaped section PL1s, the start and end points of the special shaped section PL2s, the start and end points of the special shaped section PL3s, the start and end points of the special shaped section PL4s, the start and end points of the special shaped section PL5s, and the start and end points of the special shaped section PL7s are formed so that they do not align horizontally (they are arranged in a staggered pattern). Note that both the start and end points may not align horizontally, or at least one of the start and end points may not align horizontally.

[0199] In this example, the regular arrangement of multiple specially shaped parts generates resonance, preventing the gaming machine from malfunctioning due to the incorporation of specific frequencies.

[0200] Furthermore, as shown in Figure 8, the length L1 and maximum width W1 of the special-shaped portion PL1s in the first differential pair wiring PL1 (D1P, D1N), the length L2 and maximum width W2 of the special-shaped portion PL2s in the second differential pair wiring PL2 (CLK1P, CLK1N), the length L3 and maximum width W3 of the special-shaped portion PL3s in the third differential pair wiring PL3 (C1P, C1N), the length L4 and maximum width W4 of the special-shaped portion PL4s in the fourth differential pair wiring PL4 (B1P, B1N), the length L5 and maximum width W5 of the special-shaped portion PL5s in the fifth differential pair wiring PL5 (A1P, A1N), and the length L7 and maximum width W7 of the special-shaped portion PL7s in the seventh differential pair wiring PL7 (CLK0P, CLK0N) are all different.

[0201] In this example, by having multiple specially shaped parts share the same shape, resonance can be generated, preventing the gaming machine from malfunctioning due to the incorporation of specific frequencies.

[0202] <LCD connection board / 8th differential pair wiring> The eighth differential pair wiring PL8 (C0P, C0N) is wired such that the differential signal line C0P is routed downward in a plan view of the liquid crystal connection board 500a, with the base end being pad CN3P25 on which terminal CN3-25 of the third connector CN3 is mounted, and the differential signal line C0N is routed downward in a plan view of the liquid crystal connection board 500a, with the base end being pad CN3P26 on which terminal CN3-26 of the third connector CN3 is mounted, after which the differential signal lines C0P and C0N approach each other while gradually narrowing the distance between them in the lead-out section PL8z, and then in the subsequent parallel section PL8p, the differential signal lines C0P and C0N are routed in parallel.

[0203] The eighth differential pair wiring PL8 (C0P, C0N), in which differential signal lines C0P and C0N are parallel in the parallel section PL8p, is routed in a straight line downward in a plan view of the liquid crystal connection substrate 500a while maintaining the spacing S7 between it and the adjacent seventh differential pair wiring PL7 (CLK0P, CLK0N). Then, it is bent to the left in the first left bend section PL8a, and subsequently routed in a straight line diagonally downward to the right in a plan view of the liquid crystal connection substrate 500a. Then, it is bent to the right in the first right bend section PL8b, and subsequently routed in a straight line downward in a plan view of the liquid crystal connection substrate 500a. Then, it is bent to the left in the second left bend section PL8c, and subsequently meanders multiple times in the meander section PL8d before reaching the second right bend section PL8e. At the third left bend PL8f, the wiring is bent to the right, then routed in a straight line downward in a plan view of the liquid crystal connection substrate 500a, then bent to the left at the third left bend PL8f, then routed in a straight line diagonally downward to the right in a plan view of the liquid crystal connection substrate 500a, then bent to the left at the fourth left bend PL8g, then routed in a straight line horizontally to the right in a plan view of the liquid crystal connection substrate 500a, and the other end of the eighth differential pair wiring PL8 (C0P, C0N) is connected to the second connector CN2 mounted on the sixth layer 500a (L6) via signal vias SV8a and SV8b (shown only in the second layer 500a (L2) shown in Figure 13), which connect the six layers from the first layer 500a (L1) to the sixth layer 500a (L6) shown in Figure 14.

[0204] The meander section PL8d is bent twice to the left by two left bends, with the end of the second left bend section PL8c as its base. In this example, since the number of left bends and right bends in the meander section PL8d are different, the wiring lengths of the differential signal line CLK0P and the differential signal line CLK0N are different in the meander section PL8d, resulting in a difference in wiring length.

[0205] The left bends (first left bend PL8a to fourth left bend PL8g) are the parts that bend the eighth differential pair wiring PL8 (C0P, C0N) from the first direction to the second direction (left side). In these left bends (first left bend PL8a to fourth left bend PL8g), the differential signal line C0P is located on the outside and the differential signal line C0N is located on the inside, so the length of the differential signal line C0N is shorter than that of the differential signal line C0P.

[0206] The right bend (first right bend PL8b) is the section that bends the eighth differential pair wiring PL8 (C0P, C0N) from the second direction to the first direction (right side). In this right bend (first right bend PL8b), the differential signal line C0N is located on the outside and the differential signal line C0P is located on the inside, so the length of the differential signal line C0P is shorter than that of the differential signal line C0N.

[0207] In this example, the number of left bends (1st left bend PL8a to 4th left bend PL8g) is different from the number of right bends (1st right bend PL8b). Therefore, in the bends, the length of the differential signal line C0P and the differential signal line C0N are different, resulting in a difference in wiring length.

[0208] <LCD connection board / 9th differential pair wiring> The ninth differential pair wiring PL9 (B0P, B0N) is wired such that the differential signal line B0P is routed downward in a plan view of the liquid crystal connection board 500a, with the pad CN3P27 on which terminal CN3-27 of the third connector CN3 is mounted as the base end, and the differential signal line B0N is routed downward in a plan view of the liquid crystal connection board 500a, with the pad CN3P28 on which terminal CN3-28 of the third connector CN3 is mounted as the base end, and then the differential signal lines B0P and B0N approach each other in the lead-out section PL9z, and then in the subsequent parallel section PL9p, the differential signal lines B0P and B0N are routed in parallel.

[0209] The ninth differential pair wiring PL9 (B0P, B0N), in which differential signal lines B0P and B0N are parallel in the parallel section PL9p, is routed in a straight line toward the downward direction in a plan view of the liquid crystal connection substrate 500a while maintaining the spacing S8 between it and the adjacent eighth differential pair wiring PL8 (C0P, C0N), then bends to the left in the first left bend section PL9a, and subsequently is routed in a straight line toward the right and downward in a plan view of the liquid crystal connection substrate 500a, then bends to the right in the first right bend section PL9b, and subsequently is routed in a straight line toward the downward direction in a plan view of the liquid crystal connection substrate 500a, then bends to the left in the second left bend section PL9c, and subsequently meanders multiple times in the meander section PL9d, then bends to the left in the third left bend section PL8e, and subsequently is routed toward the downward direction in a plan view of the liquid crystal connection substrate 500a After being routed in a straight line toward the front, it is bent to the left at the fourth left bend PL9f, and then routed in a straight line toward the right and downward in a plan view of the liquid crystal connection substrate 500a, then bent to the left at the fifth left bend PL9g, and then routed in a straight line toward the right horizontal direction in a plan view of the liquid crystal connection substrate 500a, then bent to the right at the second right bend PL9h, and then routed in a straight line toward the right horizontal direction in a plan view of the liquid crystal connection substrate 500a, and the other end of the ninth differential pair wiring PL9 (B0P, B0N) is connected to the second connector CN2 mounted on the sixth layer 500a(L6) via signal vias SV9a, SV9b (shown only in the second layer 500a(L2) shown in Figure 13) which connect the six layers from the first layer 500a(L1) to the sixth layer 500a(L6) shown in Figure 14.

[0210] The meander section PL9d is bent twice to the right by two right bends, with the end of the second left bend section PL9c as its base. In this example, since the number of left bends and right bends in the meander section PL9d are different, the wiring lengths of the differential signal line B0P and the differential signal line B0N are different in the meander section PL9d, resulting in a difference in wiring length.

[0211] The left bends (the first left bend PL9a to the fifth left bend PL9g) are the parts that bend the ninth differential pair wiring PL9 (B0P, B0N) from the first direction to the second direction (left side). In these left bends (the first left bend PL9a to the fifth left bend PL9g), the differential signal line B0P is located on the outside and the differential signal line B0N is located on the inside, so the length of the differential signal line B0N is shorter than that of the differential signal line B0P.

[0212] The right bend section (first right bend section PL9b to second right bend section PL9h) is the part that bends the ninth differential pair wiring PL9 (B0P, B0N) from the second direction to the first direction (right side). In this right bend section (first right bend section PL9b to second right bend section PL9h), the differential signal line B0N is located on the outside and the differential signal line B0P is located on the inside, so the length of the differential signal line B0P is shorter than that of the differential signal line B0N.

[0213] In this example, the number of left bends (from the first left bend PL9a to the fifth left bend PL9g) is different from the number of right bends (from the first right bend PL9b to the second right bend PL9h). As a result, in the bends, the length of the differential signal line B0P and the differential signal line B0N are different, resulting in a difference in wiring length.

[0214] In the bends, the differential signal line B0N is shorter than the differential signal line B0P by the length of three left bends. Conversely, in the meander section, the differential signal line B0N is longer than the differential signal line B0P by the length of two right bends. Therefore, in the 9th differential pair wiring PL9 (B0P, B0N), the differential signal line B0N is shorter than the differential signal line BC0P by the length of one left bend.

[0215] <LCD connection board / 10th differential pair wiring> In the 10th differential pair wiring PL10 (A0P, A0N), the differential signal line A0P is wired downward in a plan view of the liquid crystal connection board 500a, with the base end being pad CN3P29 on which terminal CN3-29 of the third connector CN3 is mounted, and the differential signal line A0N is wired downward in a plan view of the liquid crystal connection board 500a, with the base end being pad CN3P30 on which terminal CN3-30 of the third connector CN3 is mounted. After that, the differential signal lines A0P and A0N approach each other while gradually narrowing the distance between them in the lead-out section PL10z, and then in the subsequent parallel section PL10p, the differential signal lines A0P and A0N are wired in parallel.

[0216] The 10th differential pair wiring PL10 (A0P, A0N), in which differential signal lines A0P and A0N are parallel at the parallel section PL10p, is routed in a straight line toward the downward direction in a plan view of the liquid crystal connection substrate 500a while maintaining the spacing S9 between it and the adjacent 9th differential pair wiring PL9 (B0P, B0N). Then, at the first left bend section PL10a, which is above the first left bend section PL9a of the 9th differential pair wiring PL9 (B0P, B0N), it is bent to the left, widening the spacing S9 between it and the adjacent 9th differential pair wiring PL9 (B0P, B0N) to spacing S9', and is routed in a straight line toward the right-downward direction in a plan view of the liquid crystal connection substrate 500a. Then, at the first right bend section PL10b, it is bent to the right. Next, the differential signal line D1N is routed in a straight line toward the lower right in a plan view of the liquid crystal connection substrate 500a, then bent to the right at the second left bend PL10c, and then routed in a straight line toward the right horizontal in a plan view of the liquid crystal connection substrate 500a, while the differential signal line D1P is routed in a straight line. The other end of the 10th differential pair wiring PL10 (A0P, A0N) is connected to the second connector CN2 mounted on the 6th layer 500a (L6) via signal vias SV10a and SV10b (shown only in the 2nd layer 500a (L2) shown in Figure 13), which connect the six layers from the 1st layer 500a (L1) to the 6th layer 500a (L6) shown in Figure 14.

[0217] The left bend section (first left bend section PL01a to second left bend section PL10c) is the part that bends the 10th differential pair wiring PL10 (A0P, A0N) from the first direction to the second direction (left side). In this left bend section (first left bend section PL01a to second left bend section PL10c), the differential signal line A0P is located on the outside and the differential signal line A0N is located on the inside, so the length of the differential signal line A0N is shorter than that of the differential signal line A0P.

[0218] On the other hand, the right bend (first right bend PL10b) is the part that bends the 10th differential pair wiring PL10 (A0P, A0N) from the second direction to the first direction (right side). In this right bend (first right bend PL10b), the differential signal line A0N is located on the outside and the differential signal line A0P is located on the inside, so the length of the differential signal line A0P is shorter than that of the differential signal line A0N.

[0219] In this example, the number of left bends (first left bend PL1a to third left bend PL1d) is different from the number of right bends (first right bend PL1c). Therefore, in the bends, the length of the differential signal line D1P and the differential signal line D1N are different, resulting in a difference in wiring length.

[0220] A specially shaped section PL10s is formed at the other end of the 10th differential pair wiring PL10 (A0P, A0N). In this specially shaped section PL10s, one differential signal line A0P is straight, while the other differential signal line A0N is bent so as to move away from the differential signal line A0P.

[0221] The specially shaped section PL10s is a part for adjusting the difference in wiring length at the bend. By bending the differential signal line A0N away from the differential signal line A0P and increasing the wiring length of differential signal line A0N, the wiring length of differential signal line A0P and differential signal line A0N in the 10th differential pair wiring PL10 (A0P, A0N) are configured to be the same.

[0222] In this example, by aligning the wiring lengths within a pair in paired wiring, it is possible to prevent delays in signal arrival timing. This provides a circuit board that suppresses delays in signal arrival timing and signal waveform distortion in high-speed signals such as LCD video signals, thereby providing accurate game information at the appropriate timing, preventing players from suffering disadvantages, and preventing a decline in the enjoyment of the game.

[0223] <Wiring structure> Next, the wiring structure of the liquid crystal connection substrate 500a will be explained in detail using Figures 9 to 11.

[0224] Figure 9 is a magnified partial view showing the area around vias V4 to V7 in the first layer of the liquid crystal connection substrate 500a, and Figure 10 is a diagram illustrating a specific region. Figure 11 is a magnified partial view showing the area around vias V1 to V3 in the first layer of the liquid crystal connection substrate 500a.

[0225] <Wiring structure / Meander section> First, I will explain the meander section of the liquid crystal connection board 500a.

[0226] Here, "meander section" refers to a portion of a circuit board or wiring layer where a signal trace is not straight but bent back in a meandering (zigzag or wavy) pattern. The electrical characteristics of the meander section change depending on its geometry, such as the number of bends (folds), pitch (fold interval), and amplitude (height of the meander). Therefore, it is designed to meet desired characteristics, such as adjusting the signal propagation delay time, matching the timing between multiple signals (skew adjustment), and impedance control.

[0227] Figure 9 shows the meander section PL4b formed on the fourth differential pair wiring PL4 (B1P, B1N), the meander section PL6d formed on the sixth differential pair wiring PL6 (D0P, D0N), the meander section PL7d formed on the seventh differential pair wiring PL7 (CLK0P, CLK0N), and the meander section PL8d formed on the eighth differential pair wiring PL8 (C0P, C0N). Figure 11 shows a part of the meander section PL2b formed on the second differential pair wiring PL2 (CLK1P, CLK1N).

[0228] Hereafter, the first differential pair wiring PL1 (D1P, D1N), the second differential pair wiring PL2 (CLK1P, CLK1N), the fourth differential pair wiring PL4 (B1P, B1N), the fifth differential pair wiring PL5 (A1P, A1N), the sixth differential pair wiring PL6 (D0P, D0N), the seventh differential pair wiring PL7 (CLK0P, CLK0N), and the eighth differential pair wiring PL8 (C0P, C0N) will be simplified and referred to as the first differential pair wiring PL1, the second differential pair wiring PL2, the fourth differential pair wiring PL4, the fifth differential pair wiring PL5, the sixth differential pair wiring PL6, the seventh differential pair wiring PL7, and the eighth differential pair wiring PL8, respectively.

[0229] In Figures 9 to 11, the shaded "inner region" is the area enclosed by the signal wiring when the signal wiring is folded back in a meandering (zigzag or wavy) manner within the meander section. Specifically, as shown in Figure 9 as meander section PL4b, it is the region that is bounded by signal wirings SL1 and SL2, which are in an opposing positional relationship due to the folding, and by signal wiring SL3, which connects these signal wirings SL1 and SL2, and is recognized as being located inside the meander section. Alternatively, as shown in Figure 9 as inner region IR5, it may be an inner angle region formed by the bent portion of the meander section (e.g., meander section PL6d) of the signal wiring (e.g., sixth differential pair wiring PL6) and the straight portion other than the meander section (meander section PL6d) of the signal wiring (sixth differential pair wiring PL6).

[0230] The shape and size of the inner region are not particularly limited and can be determined as appropriate by the number of bends (folds), pitch (fold interval), amplitude (height of meandering), etc. of the meander section. Furthermore, the inner region may be a region with an opening (for example, an inner region where opposing signal lines SL1 and SL2 are separated) or a completely closed region (for example, an inner region where parts of opposing signal lines SL1 and SL2 are in close contact or adjacent).

[0231] In Figures 9 to 11, the dotted lines indicate a "specific region," which is a region created when a meander section is formed on a signal line, causing the gap between that signal line and other adjacent signal lines to widen compared to the case where the meander section does not exist. Specifically, it includes a region newly secured between a signal line and other adjacent signal lines due to the formation of a meander section on that signal line, and is recognized as a region demarcated by that signal line and the other signal lines.

[0232] For example, the specific region SR1 shown in Figure 9 includes a region (inner regions IR1, IR2) newly secured between the fourth differential pair wiring PL4 and the fifth differential pair wiring PL5 adjacent to the fourth differential pair wiring PL4, due to the formation of the meander portion PL4b of the fourth differential pair wiring PL4, and is recognized as a region demarcated by the fourth differential pair wiring PL4 and the fifth differential pair wiring PL5.

[0233] The specific region SR2 shown in Figure 9 includes a region (inner regions IR3, IR4, IR5) newly secured between the sixth differential pair wiring PL6 and the fifth differential pair wiring PL5 adjacent to the sixth differential pair wiring PL6, due to the formation of the meander portion PL6d of the sixth differential pair wiring PL6, and is recognized as a region demarcated by the sixth differential pair wiring PL6 and the fifth differential pair wiring PL5.

[0234] The specific region SR3 shown in Figure 11 includes a newly secured region (inner region IR6) between the second differential pair wiring PL2 and the first differential pair wiring PL1 adjacent to the second differential pair wiring PL2, due to the formation of the meander portion PL2b of the second differential pair wiring PL2, and is recognized as a region demarcated by the second differential pair wiring PL2 and the first differential pair wiring PL1.

[0235] The specific region SRa shown in Figure 10 includes a newly secured region (inner region IR1) between the fourth differential pair wiring PL4 and the fifth differential pair wiring PL5 adjacent to the fourth differential pair wiring PL4, due to the formation of the meander portion PL4b of the fourth differential pair wiring PL4, and is recognized as a region demarcated by the fourth differential pair wiring PL4 and the fifth differential pair wiring PL5.

[0236] More specifically, the specific region SRa can be defined as the region connecting virtual points A1, A3, A4, A5, A8, and A9, where the radius curve (R) of the meander portion PL4b of the fourth differential pair wiring begins, A4, A6, A7, A8, A9, and A9. Alternatively, the specific region SRa may be defined as the region connecting virtual points A2, A3, A4, A5, A8, and A9.

[0237] This specific region SRa is the maximum spacing region, which includes the location of the maximum spacing sra between the fourth differential pair wiring PL4 and the fifth differential pair wiring PL5, and via V4 is formed in this maximum spacing region. Note that vias (interlayer conduction holes) may be placed on the line of the maximum spacing sra, or vias (interlayer conduction holes) may be placed in the region including the maximum spacing sra, or at least a part of the vias (interlayer conduction holes) may be included in the specific region. Furthermore, it is not necessary to form vias (interlayer conduction holes) in the region in question.

[0238] The specific region SRb shown in Figure 10 includes a newly secured region (inner region IR2) between the fourth differential pair wiring PL4 and the fifth differential pair wiring PL5 adjacent to the fourth differential pair wiring PL4, due to the formation of the meander portion PL4b of the fourth differential pair wiring PL4, and is recognized as a region demarcated by the fourth differential pair wiring PL4 and the fifth differential pair wiring PL5.

[0239] This specific region SRb is the maximum spacing region, which includes the location of the maximum spacing srb between the fourth differential pair wiring PL4 and the fifth differential pair wiring PL5, and via V5 is formed in this maximum spacing region. Note that vias (interlayer conduction holes) may be placed on the line of the maximum spacing srb, or vias (interlayer conduction holes) may be placed in the region including the maximum spacing srb, or at least a part of the vias (interlayer conduction holes) may be included in the specific region. Furthermore, it is not necessary to form vias (interlayer conduction holes) in the region in question.

[0240] The specific region SRc shown in Figure 10 includes a newly secured region (inner region IR3) between the sixth differential pair wiring PL6 and the fifth differential pair wiring PL5 adjacent to the sixth differential pair wiring PL6, due to the formation of the meander portion PL6d of the sixth differential pair wiring PL6, and is recognized as a region demarcated by the sixth differential pair wiring PL6 and the fifth differential pair wiring PL5.

[0241] This specific region SRc is the maximum spacing region, which includes the location of the maximum spacing src between the sixth differential pair wiring PL6 and the fifth differential pair wiring PL5, and via V6 is formed in this maximum spacing region. Note that vias (interlayer conduction holes) may be placed on the line of the maximum spacing src, or vias (interlayer conduction holes) may be placed in the region including the maximum spacing src, or at least a part of the vias (interlayer conduction holes) may be included in the specific region. Furthermore, it is not necessary to form vias (interlayer conduction holes) in the region in question.

[0242] The specific region SRd shown in Figure 10 includes a newly secured region (inner region IR5) between the sixth differential pair wiring PL6 and the fifth differential pair wiring PL5 adjacent to the sixth differential pair wiring PL6, due to the formation of the meander portion PL6d of the sixth differential pair wiring PL6, and is recognized as a region demarcated by the sixth differential pair wiring PL6 and the fifth differential pair wiring PL5.

[0243] This specific region SRd is the maximum spacing region, which includes the location of the maximum spacing srd between the sixth differential pair wiring PL6 and the fifth differential pair wiring PL5, and via V7 is formed in this maximum spacing region. Note that vias (interlayer conduction holes) may be placed on the line of the maximum spacing srd, or vias (interlayer conduction holes) may be placed in the region including the maximum spacing srd, or at least a part of the vias (interlayer conduction holes) may be included in the specific region. Furthermore, it is not necessary to form vias (interlayer conduction holes) in the region in question.

[0244] The specific region SRe shown in Figure 10 includes a newly secured region (inner region IR4) between the sixth differential pair wiring PL6 and the fifth differential pair wiring PL5 adjacent to the sixth differential pair wiring PL6, due to the formation of the meander portion PL6d of the sixth differential pair wiring PL6. This region is recognized as a region demarcated by the sixth differential pair wiring PL6 and the fifth differential pair wiring PL5. This specific region SRe is a region that has expanded due to the formation of the meander portion, but it is a region where no vias are formed. Vias may be formed in this region.

[0245] The specific region SRf shown in Figure 10 includes a newly secured region (inner region IR6) between the fourth differential pair wiring PL4 and the third differential pair wiring PL3 adjacent to the fourth differential pair wiring PL4, due to the formation of the meander portion PL4b of the fourth differential pair wiring PL4. This region is recognized as being demarcated by the fourth differential pair wiring PL4 and the third differential pair wiring PL3. This specific region SRf is a region that has expanded due to the formation of the meander portion, but it is a region where no vias have been formed. Vias may be formed in this region.

[0246] The specific region SRg shown in Figure 10 includes a newly secured region (inner region IR7) between the fourth differential pair wiring PL4 and the third differential pair wiring PL3 adjacent to the fourth differential pair wiring PL4, due to the formation of the meander portion PL4b of the fourth differential pair wiring PL4. This region is recognized as a region demarcated by the fourth differential pair wiring PL4 and the third differential pair wiring PL3. This specific region SRg is a region that has expanded due to the formation of the meander portion, but it is a region where no vias are formed. Vias may be formed in this region.

[0247] The specific region SRh shown in Figure 10 includes a newly secured region (inner regions IR8, IR9) between the sixth differential pair wiring PL6 and the seventh differential pair wiring PL7, formed by the formation of the meander portion PL6d of the sixth differential pair wiring PL6 and the meander portion PL7d of the seventh differential pair wiring PL7. This region SRh is a region that has expanded due to the formation of the meander portion, but no vias have been formed in this region. Vias may be formed in this region.

[0248] The specific region SRi shown in Figure 10 includes a newly secured region (inner regions IR10, IR11) between the sixth differential pair wiring PL6 and the seventh differential pair wiring PL7, formed by the meander portion PL6d of the sixth differential pair wiring PL6 and the meander portion PL7d of the seventh differential pair wiring PL7, and is recognized as a region demarcated by the sixth differential pair wiring PL6 and the seventh differential pair wiring PL7. This specific region SRi is a region that has expanded due to the formation of the meander portion, but it is a region where no vias are formed. Vias may be formed in this region.

[0249] The specific region SRj shown in Figure 10 includes a newly secured region (inner region IR12) between the seventh differential pair wiring PL7 and the eighth differential pair wiring PL8 adjacent to it, due to the formation of the meander portion PL7d of the seventh differential pair wiring PL7. This region is recognized as being demarcated by the seventh differential pair wiring PL7 and the eighth differential pair wiring PL8. This specific region SRj is a region that has expanded due to the formation of the meander portion, but it is a region where no vias have been formed. Vias may be formed in this region.

[0250] The specific region SRk shown in Figure 10 consists only of the region newly secured between the seventh differential pair wiring PL7 and the eighth differential pair wiring PL8 due to the formation of the meander portion PL7d of the seventh differential pair wiring PL7 and the meander portion PL8d of the eighth differential pair wiring PL8, and is recognized as a region demarcated by the seventh differential pair wiring PL7 and the eighth differential pair wiring PL8. This specific region SRk is a region that has expanded due to the formation of the meander portion, but it is a region in which no vias have been formed. Vias may be formed in this region.

[0251] <Wiring structure / interlayer conduction section> Next, we will describe the interlayer conductive portion of the liquid crystal connection substrate 500a.

[0252] Here, "interlayer conduction section" refers to a conductor structure provided to electrically connect different wiring layers in a multilayer substrate, and includes vias and through-holes. Specifically, it refers to a portion in which a conductor is formed within a hole that penetrates or partially penetrates the insulating layer, and is electrically connected to the wiring patterns of the upper and lower layers. Depending on the combination of layers to be connected and the method of formation, the interlayer conduction section may include through-vias, blind vias, buried vias, etc. The shape, diameter, and arrangement are designed appropriately according to the electrical characteristics and mounting requirements, and can take shapes such as circular, elliptical, or polygonal.

[0253] <Wiring structure / Interlayer conductivity / Via V4, V5> Figure 9 shows vias V4 and V5 formed in the region SR1, which is demarcated by the fourth differential pair wiring PL4 and the fifth differential pair wiring PL5, excluding the inner regions IR1 and IR2. Vias V4 and V5 are also formed in the maximum spacing regions SR1a and SR1b, which include the locations where the maximum spacing between the fourth differential pair wiring PL4 and the fifth differential pair wiring PL5 is sr1a and sr1b. Although vias V4 and V5 are formed so that their through holes are included in the specific region SR1 and the maximum spacing regions SR1a and SR1b, it is sufficient that at least the copper foil portion for interlayer conductivity is included in the specific region SR1 and the maximum spacing regions SR1a and SR1b.

[0254] In this example, since the first interlayer conduction section (via V4) is provided in a specific region (specific region SR1, maximum gap region SR1a) that includes the point where the gap between the first signal wiring (fifth differential pair wiring PL5) and the second signal wiring (fourth differential pair wiring PL4) is at its maximum (maximum gap sr1a) due to the meander section (meander section PL4b), capacitive coupling can be prevented by the conductor of the interlayer conduction section (via), thereby preventing changes in the characteristic impedance of the signal wiring, enabling stable signal transmission, and preventing malfunctions of the gaming machine.

[0255] Furthermore, a first interlayer conduction section (via V4) is provided in a specific region (specific region SR1) where the distance between the first signal wiring (fifth differential pair wiring PL5) and the second signal wiring (fourth differential pair wiring PL4) is widened by the meander section (meander section PL4b). Since the first interlayer conduction section (via V4) is not provided in the inner region (inner regions IR1, IR2) surrounded by the meander section (meander section PL4b), capacitive coupling due to the conductor of the interlayer conduction section (via) is prevented, thereby preventing changes in the characteristic impedance of the signal wiring, enabling stable signal transmission, and preventing malfunctions of the gaming machine. Note that the number of vias formed in the specific region (specific region SR1) is not limited to two; it may be one or three or more.

[0256] Next, focusing on the positions where vias V4 and V5 are provided, with reference to the fourth differential pair wiring PL4 which includes the meander portion PL4b, vias V4 and V5 are provided on one side in the width direction of the fourth differential pair wiring PL4 (right side in Figure 9), and on the other side in the width direction of the fourth differential pair wiring PL4 (left side in Figure 9), vias are not provided, including the symmetrical positions of vias V4 and V5 with respect to the fourth differential pair wiring PL4.

[0257] In this example, the first interlayer conduction section (via V4, via V5) is provided on one side in the width direction of the second signal wiring (fourth differential pair wiring PL4) which is formed including the meander section, and no interlayer conduction section (via) is provided on the other side in the width direction of the second signal wiring (fourth differential pair wiring PL4) at a position symmetrical to the second signal wiring (fourth differential pair wiring PL4) of the first interlayer conduction section (via V4, via V5). Therefore, compared to the case where interlayer conduction sections are provided on both sides in the width direction of the second signal wiring which is formed including the meander section, excessive capacitive coupling between the signal wiring and the interlayer conduction section can be suppressed.

[0258] Next, considering the distance between the via and the signal wiring, the distance L4a from via V4 to the fourth differential pair wiring PL4 is longer than the distance L4b from via V4 to the fifth differential pair wiring PL5 (L4a > L4b). In other words, via V4 is a via that is located closer to the fifth differential pair wiring PL5 than to the fourth differential pair wiring PL4.

[0259] Here, the distance from a via (interlayer conduction section) to a differential pair wiring (signal wiring) refers to the shortest distance between the outer edge of the via (the outermost contour line of the conductor region) and the outer edge of the signal wiring (the outermost contour line of the conductor region). Specifically, it is defined as the length of the shortest line segment connecting the boundaries of the conductor regions of the interlayer conduction section and the signal wiring.

[0260] Note that the positional relationship among via V4, the fourth differential pair wiring PL4, and the fifth differential pair wiring PL5 is not limited to this example. For example, the distance L4a from via V4 to the fourth differential pair wiring PL4 may be shorter than the distance L4b from via V4 to the fifth differential pair wiring PL5 (L4a < L4b). Also, the distance L4a from via V4 to the fourth differential pair wiring PL4 may be the same as or substantially the same as the distance L4b from via V4 to the fifth differential pair wiring PL5 (L4a = L4b or L4a ≒ L4b).

[0261] The distance L5a from via V5 located below via V4 to the fourth differential pair wiring PL4 is longer than the distance L5b from via V5 to the fifth differential pair wiring PL5 (L5a > L5b). In other words, via V5 is a via arranged closer to the fifth differential pair wiring PL5 than to the fourth differential pair wiring PL4.

[0262] According to this example, since the first interlayer conduction part (via V5) is provided in a specific region (specific region SR1, maximum interval region SR1b) including a location where the interval between the first signal wiring (fifth differential pair wiring PL5) and the second signal wiring (fourth differential pair wiring PL4) becomes maximum (maximum interval sr1b) due to the meander part (meander part PL4b), it is possible to prevent the characteristic impedance of the signal wiring from changing due to capacitive coupling caused by the conductor of the interlayer conduction part (via), enabling stable signal transmission and preventing the game console from malfunctioning.

[0263] Also, since the first interlayer conduction part (via V5) is provided in a specific region (specific region SR1) where the interval between the first signal wiring (fifth differential pair wiring PL5) and the second signal wiring (fourth differential pair wiring PL4) is widened by the meander part (meander part PL4b), and the first interlayer conduction part (via V5) is not provided in the inner region (inner regions IR1, IR2) surrounded by the meander part (meander part PL4b), it is possible to prevent the characteristic impedance of the signal wiring from changing due to capacitive coupling caused by the conductor of the interlayer conduction part (via), enabling stable signal transmission and preventing the game console from malfunctioning.

[0264] Note that the positional relationship among via V5, the fourth differential pair wiring PL4, and the fifth differential pair wiring PL5 is not limited to this example. For example, the distance L5a from via V5 to the fourth differential pair wiring PL4 may be shorter than the distance L5b from via V5 to the fifth differential pair wiring PL5 (L5a < L5b). Also, the distance L5a from via V5 to the fourth differential pair wiring PL4 may be the same as or substantially the same as the distance L5b from via V5 to the fifth differential pair wiring PL5 (L5a = L5b or L5a ≒ L5b).

[0265] Also, as shown in FIG. 9, via V4 and via V5 are arranged at a predetermined distance from each other along the extending direction of a part (in this example, the straight part between the first right bending part PL5b and the second left bending part PL5c) other than the meander part PL5f (see FIG. 7) of the fifth differential pair wiring PL5 in the specific region SR1.

[0266] According to this example, since the first interlayer conduction part (via V4) and the second interlayer conduction part (via V5) are provided along a part other than the meander part of the second signal wiring (the fifth differential pair wiring PL5) including the meander part, the change in characteristic impedance can be made uniform by making the distance from the signal wiring uniform.

[0267] Note that via V4 and via V5 may be arranged along the extending direction of the fourth differential pair wiring PL4 including the meander part PL4b. In this case, via V4 and via V5 may be arranged along the meander part PL4b in the fourth differential pair wiring PL4, or may be arranged along a region other than the meander part PL4b in the fourth differential pair wiring PL4.

[0268] Next, focusing on the extension direction (longitudinal direction) of the fourth differential pair wiring PL4 and the positional relationship between vias V4 and V5, as explained using Figures 7 and 8, one end of the fourth differential pair wiring PL4 is connected to pads CN3P15 and CN3P16 on which the third connector CN3 is mounted. Subsequently, it passes through the lead-out section PL4z → parallel section PL4p → special-shaped section PL4s → first left bend section PL4a → meander section PL4b → second left bend section PL4c → third left bend section PL4d → first right bend section PL4e → fourth left bend section PL4f, and the other end is connected to the second connector CN2 mounted on layer 6 500a (L6) via signal vias.

[0269] As shown in Figure 9, vias V4 and V5 are located near the meander portion PL4b of the fourth differential pair wiring PL4. Therefore, when the extension direction (longitudinal direction) of the fourth differential pair wiring PL4 is taken as the reference, they are recognized as being eccentrically located on one end side of the fourth differential pair wiring PL4 (the side closer to the lead portion PL4z).

[0270] Similarly, focusing on the longitudinal direction of the fifth differential pair wiring PL5 and the positional relationship between vias V4 and V5, as explained using Figures 7 and 8, one end of the fifth differential pair wiring PL5 is connected to pads CN3P18 and CN3P19 on which the third connector CN3 is mounted. Then, it passes through the lead-out section PL5z → parallel section PL5p → special-shaped section PL5s → first left bend section PL5a → first right bend section PL5b → second left bend section PL5c → third left bend section PL5d → fourth left bend section PL5e → meander section PL5f → second right bend section PL5g → fifth left bend section PL5h, and the other end is connected to the second connector CN and 2 mounted on the sixth layer 500a (L6) via signal vias.

[0271] As shown in FIG. 9, since the vias V4 and V5 are provided in the vicinity of the straight portion between the first right bent portion PL5b and the second left bent portion PL5c in the fifth differential pair wiring PL5, when based on the extending direction (longitudinal direction) of the fifth differential pair wiring PL5, it is recognized that they are provided eccentrically on one end side (the side closer to the lead-out portion PL5z) of the fifth differential pair wiring PL5 rather than on the other end side of the fifth differential pair wiring PL5.

[0272] According to this example, since the first interlayer conduction portions (vias V4, V5) are provided on one end side of the first signal wiring (the fifth differential pair wiring PL5) and also on one end side of the second signal wiring (the fourth differential pair wiring PL4), by concentrating the change points of the characteristic impedance, the disturbance of the signal waveform can be reduced, stable signal transmission can be achieved, and the frequency of occurrence of communication errors and the like can be decreased. Also, although the ends of the wiring and the connection points with other components (for example, connector terminals, pads, vias, etc.) in the wiring are the change points of the characteristic impedance, by arranging the interlayer conduction portions in the vicinity of the connection portions that are the change points of the characteristic impedance, the change points of the impedance can be concentratedly arranged to achieve stabilization in other parts.

[0273] In this example, as an example of the first signal wiring, the fifth differential pair wiring PL5 including the meander portion has been described, but a signal wiring (a signal wiring without a meander portion formed) not including the meander portion may also be applied.

[0274] Also, "one side" and "the other side" are convenient terms for distinguishing from each other and do not limit the input side or output side of the signal. Also, when defining a point located in the middle of the distance between one end (the first end) and the other end (the second end) of the signal wiring as the "midpoint", "one end side" refers to the region closer to the first end than the midpoint, and "the other end side" refers to the region closer to the second end than the midpoint. More preferably, "one end side" refers to the region within a predetermined range from the first end, and "the other end side" refers to the region within a predetermined range from the second end.

[0275] Next, focusing on the fourth differential pair wiring PL4, the fifth differential pair wiring PL5, and the interlayer connection part, a via V5 is formed in a specific region SR1 partitioned by the fourth differential pair wiring PL4 and the fifth differential pair wiring PL5, and a via V7 is formed at a position facing the via V5 across the fifth differential pair wiring PL5 (a position symmetric to the via V5 with respect to the fifth differential pair wiring PL5).

[0276] In this example, the distance L57 from the via V5 to the fifth differential pair wiring PL5 is the same as or substantially the same as the distance L75 from the via V7 to the fifth differential pair wiring PL5 (L57 = L75 or L57 ≈ L75).

[0277] According to this example, a second interlayer connection part (via V7) is provided at a position facing the first interlayer connection part (via V5) across the second signal wiring (the fifth differential pair wiring PL5). The first interlayer connection part (via V5) has a distance to the second signal wiring (the fifth differential pair wiring PL5) that is a first distance (distance L57), and the second interlayer connection part (via V7) has a distance to the second signal wiring (the fifth differential pair wiring PL5) that is the first distance (distance L75 (= distance L57)).

[0278] In other words, a second interlayer connection part (via V7) is provided at a position facing the first interlayer connection part (via V5) across the second signal wiring (the fifth differential pair wiring PL5). The first interlayer connection part (via V5) is provided within a predetermined range (within the range of distance L57) with respect to the second signal wiring (the fifth differential pair wiring PL5), and the second interlayer connection part (via V7) is provided within a predetermined range (within the range of distance L75 (= L57)) with respect to the second signal wiring (the fifth differential pair wiring PL5).

[0279] According to this example, by localizing the impedance change point, the stabilization at locations other than the local area can be improved.

[0280] In this example, we have described the fourth differential pair wiring PL4 and the fifth differential pair wiring PL5, which perform differential transmission, as examples of the first and second signal wiring. However, single-ended wiring that performs single-ended transmission may also be used.

[0281] <Wiring structure / Interlayer conductivity / Via V6, V7> Figure 9 shows vias V6 and V7 formed in the region SR2, which is demarcated by the sixth differential pair wiring PL6 and the fifth differential pair wiring PL5, excluding the inner regions IR3, IR4, and IR5. Vias V6 and V7 are also formed in the maximum spacing regions SR2a and SR2b, which include the locations where the maximum spacing between the sixth differential pair wiring PL6 and the fifth differential pair wiring PL5 is sr2a and sr2b. Although vias V6 and V7 are formed so that their through holes are included in the specific region SR2 and the maximum spacing regions SR2a and SR2b, it is sufficient that at least the copper foil portion for interlayer conductivity is included in the specific region SR2 and the maximum spacing regions SR2a and SR2b.

[0282] In this example, since the first interlayer conduction section (vias V6, V7) is provided in a specific region (specific region SR2, maximum gap region SR2a, SR2b) that includes the point where the gap between the first signal wiring (sixth differential pair wiring PL6) and the second signal wiring (fifth differential pair wiring PL5) is at its maximum (maximum gap sr2a, sr2b) due to the meander section (meander section PL6d), capacitive coupling can be prevented by the conductor of the interlayer conduction section (via), thereby preventing changes in the characteristic impedance of the signal wiring, enabling stable signal transmission, and preventing malfunctions of the gaming machine.

[0283] Furthermore, the first interlayer conduction sections (vias V6, V7) are provided in a specific region (specific region SR2) where the spacing between the first signal wiring (sixth differential pair wiring PL6) and the second signal wiring (fifth differential pair wiring PL5) is widened by the meander section (meander section PL6d). Since the first interlayer conduction sections (vias V6, V7) are not provided in the inner region (inner region IR3, IR4, IR5) surrounded by the meander section (meander section PL6d), capacitive coupling due to the conductors of the interlayer conduction sections (vias) can be prevented, thereby preventing changes in the characteristic impedance of the signal wiring, enabling stable signal transmission, and preventing malfunctions of the gaming machine. Note that the number of vias formed in the specific region (specific region SR2) is not limited to two; it may be one or three or more.

[0284] Next, focusing on the positions where vias V6 and V7 are provided, with reference to the sixth differential pair wiring PL6 which includes the meander section, vias V6 and V7 are provided on one side in the width direction of the sixth differential pair wiring PL6 (left side in Figure 9), and on the other side in the width direction of the sixth differential pair wiring PL6 (right side in Figure 9), vias are not provided, including the symmetrical positions of vias V6 and V7 with respect to the sixth differential pair wiring PL6.

[0285] In this example, the first interlayer conduction section (via V6, via V7) is provided on one side in the width direction of the second signal wiring (sixth differential pair wiring PL6) which is formed including the meander section, and no interlayer conduction section (via) is provided on the other side in the width direction of the second signal wiring (sixth differential pair wiring PL6) at a position symmetrical to the second signal wiring (sixth differential pair wiring PL6) of the first interlayer conduction section (via V6, via V7). Therefore, compared to the case where interlayer conduction sections are provided on both sides in the width direction of the second signal wiring which is formed including the meander section, excessive capacitive coupling between the signal wiring and the interlayer conduction section can be suppressed.

[0286] Next, focusing on the distance between the via and the signal wiring, the distance L6a from via V6 to the fifth differential pair wiring PL5 is the same as or approximately the same as the distance L6b from via V6 to the sixth differential pair wiring PL6 (L6a = L6b or L6a ≈ L6b). In other words, via V6 is located in the central part of the space between the fifth differential pair wiring PL5 and the sixth differential pair wiring PL6.

[0287] In this example, since the first interlayer conductive portion (via V6) is located in the central part of the gap between the first signal wiring (sixth differential pair wiring PL6) and the second signal wiring (fifth differential pair wiring PL5), the interlayer conductive portion (via) can be positioned far from both the first and second signal wirings, thereby suppressing capacitive coupling.

[0288] Here, "the central portion of the space between the first signal wiring and the second signal wiring" refers to the intermediate region when divided along the shortest distance direction connecting the outer edge of the first signal wiring (the outermost contour line of the conductor area) and the outer edge of the second signal wiring (the outermost contour line of the conductor area). Specifically, it is defined as a region set near the reference position (or within a predetermined range from the reference position) where the shortest distance is bisected (the position where the distance to the interlayer conduction portion is the same or approximately the same), and which is located in a position that is not biased toward the outer edge of either signal wiring.

[0289] Note that the relative positions of via V6, the fifth differential pair wiring PL5, and the sixth differential pair wiring PL6 are not limited to this example. For example, the distance L6a from via V6 to the fifth differential pair wiring PL5 may be longer than the distance L6b from via V6 to the sixth differential pair wiring PL6 (L6a > L6b). Also, the distance L6a from via V6 to the fifth differential pair wiring PL5 may be shorter than the distance L6b from via V6 to the sixth differential pair wiring PL6 (L6a <L6b)。

[0290] The distance L7a from via V7, located below via V6, to the fifth differential pair wiring PL5 is the same as or approximately the same as the distance L7b from via V7 to the sixth differential pair wiring PL6 (L7a = L7b or L7a ≈ L7b). In other words, via V7 is located in the central part of the space between the fifth differential pair wiring PL5 and the sixth differential pair wiring PL6.

[0291] In this example, since the first interlayer conductive portion (via V7) is located in the central part of the gap between the first signal wiring (sixth differential pair wiring PL6) and the second signal wiring (fifth differential pair wiring PL5), the interlayer conductive portion (via) can be positioned far from both the first and second signal wirings, thereby suppressing capacitive coupling.

[0292] Alternatively, the distance L7a from via V7 to the 5th differential pair wiring PL5 and the distance L7b from via V7 to the 6th differential pair wiring PL6 can be considered as a ratio. In this case, it is preferable that distance L7a:distance L7b = 5:5, but an acceptable range for the ratio can also be provided (for example, up to distance L7a:distance L7b = 6:4 (or 4:6)).

[0293] Since the permissible range varies depending on the size of the board, the density of wiring and components on the board, for example, if the spacing between wirings on the board is wide, the permissible range of distance L7a:distance L7b can be relaxed to 5:5 to 7:3 (or 3:7), while if the spacing between wirings on the board is narrow, the permissible range of distance L7a:distance L7b can be limited to just 5:5.

[0294] Note that the relative positions of via V7, the fifth differential pair wiring PL5, and the sixth differential pair wiring PL6 are not limited to this example. For example, the distance L7a from via V7 to the fifth differential pair wiring PL5 may be longer than the distance L7b from via V7 to the sixth differential pair wiring PL6 (L7a > L7b). Also, the distance L7a from via V7 to the fifth differential pair wiring PL5 may be shorter than the distance L7b from via V7 to the sixth differential pair wiring PL6 (L7a <L7b)。

[0295] Next, focusing on the positional relationship between the extending direction (longitudinal direction) of the sixth differential pair wiring PL6 and the vias V6 and V7, as described using FIGS. 7 and 8, one end of the sixth differential pair wiring PL6 is connected to the pads CN3P20 and CN3P21 on which the third connector CN3 is mounted. Then, it passes through the leading portion PL6z → parallel portion PL6p → first left bending portion PL6a → first right bending portion PL6b → second right bending portion PL6c → meander portion PL6d → third right bending portion PL6e → second left bending portion PL6f → third left bending portion PL6g, and the other end is connected to the second connector CN2 mounted on the sixth layer 500a (L6) via the signal vias SV6a and SV6b.

[0296] As shown in FIG. 9, since the vias V6 and V7 are provided in the vicinity of the meander portion PL6d in the sixth differential pair wiring PL6, when based on the extending direction (longitudinal direction) of the sixth differential pair wiring PL6, it is recognized that they are eccentrically provided on one end side (the side closer to the leading portion PL6z) of the sixth differential pair wiring PL6.

[0297] Also, focusing on the positional relationship between the extending direction (longitudinal direction) of the fifth differential pair wiring PL5 and the vias V6 and V7, as described using FIGS. 7 and 8, one end of the fifth differential pair wiring PL5 is connected to the pads CN3P18 and CN3P19 on which the third connector CN3 is mounted. Then, it passes through the leading portion PL5z → parallel portion PL5p → special shape portion PL5s → first left bending portion PL5a → first right bending portion PL5b → second left bending portion PL5c → third left bending portion PL5d → fourth left bending portion PL5e → meander portion PL5f → second right bending portion PL5g → fifth left bending portion PL5h, and the other end is connected to the second connector CN2 mounted on the sixth layer 500a (L6) via a signal via.

[0298] As shown in Figure 9, via V6 is located near the first right bend PL5b in the fifth differential pair wiring PL5, and via V7 is located near the second left bend PL5c in the fifth differential pair wiring PL5. Therefore, when considering the extension direction (longitudinal direction) of the fifth differential pair wiring PL5 as the reference, both are recognized as being located eccentrically towards one end of the fifth differential pair wiring PL5 (closer to the lead-out portion PL5z) than towards the other end of the fifth differential pair wiring PL5.

[0299] In this example, the first interlayer conductive sections (vias V6 and V7) are provided on one end of the first signal wiring (fifth differential pair wiring PL5) and on one end of the second signal wiring (sixth differential pair wiring PL6). By concentrating the points of change in characteristic impedance, signal waveform distortion can be reduced, stable signal transmission can be achieved, and the frequency of communication errors can be reduced. Furthermore, the ends of the wiring and the connection points with other components in the wiring (e.g., connector terminals, pads, vias, etc.) are points of change in characteristic impedance. By placing interlayer conductive sections near these connection points that are points of change in characteristic impedance, the points of change in impedance can be concentrated, thereby stabilizing other parts of the wiring.

[0300] In this example, a fifth differential pair wiring PL5, which includes a meander section, was described as an example of the first signal wiring. However, a signal wiring configuration without a meander section (a signal wiring without a meander section) may also be used.

[0301] In this example, the fifth differential pair wiring PL5 and the sixth differential pair wiring PL6, which perform differential transmission, were described as examples of the first and second signal wiring, but single-ended wiring that performs single-ended transmission may also be used.

[0302] <Wiring structure / Interlayer conductivity / Via V1~V3> Figure 11 shows vias V1 to V3 formed in the region SR3, which is demarcated by the first differential pair wiring PL1 and the second differential pair wiring PL2, excluding the inner region IR62. Vias V1 to V3 are formed in the maximum spacing region SR3, which includes the location of the maximum spacing sr3a between the first differential pair wiring PL1 and the second differential pair wiring PL2. Although vias V1 to V3 are formed so that the through holes are included in the region SR3, it is sufficient that at least the copper foil portion for interlayer conductivity is included in the region SR.

[0303] In this example, since the first interlayer conduction section (vias V1~V3) is provided in a specific region (specific region SR3) that includes the point where the gap between the first signal wiring (first differential pair wiring PL1) and the second signal wiring (second differential pair wiring PL2) is maximized by the meander section (meander section PL2b), capacitive coupling can be prevented by the conductor of the interlayer conduction section (via), thereby preventing changes in the characteristic impedance of the signal wiring, enabling stable signal transmission, and preventing malfunctions of the gaming machine.

[0304] Furthermore, the meander section (meander section PL2b) widens the gap between the first signal wiring (first differential pair wiring PL1) and the second signal wiring (second differential pair wiring PL2), and the first interlayer conductive sections (vias V1-V3) are provided in a specific region (specific region SR3). Since the first interlayer conductive sections (vias V1-V3) are not provided in the inner region (inner region IR6) surrounded by the meander section (meander section PL2b), capacitive coupling is prevented by the conductors of the interlayer conductive sections (vias), thereby preventing changes in the characteristic impedance of the signal wiring, enabling stable signal transmission, and preventing malfunctions of the gaming machine.

[0305] Furthermore, the number of vias formed in a specific region (specific region SR3) is not limited to three; it may be one, two, or four or more.

[0306] Next, focusing on the positions where vias V1 to V3 are provided, with reference to the second differential pair wiring PL2 which includes the meander section, vias V1 to V3 are provided on one side in the width direction of the second differential pair wiring PL2 (left side in Figure 11), and vias are not provided on the other side in the width direction of the second differential pair wiring PL2 (right side in Figure 20), including the symmetrical positions of vias V1 to V3 with respect to the second differential pair wiring PL2.

[0307] In this example, the first interlayer conduction section (vias V1-V3) is provided on one side in the width direction of the second signal wiring (second differential pair wiring PL2) which is formed including the meander section, and no interlayer conduction section (vias) is provided on the other side in the width direction of the second signal wiring (second differential pair wiring PL2) at a position symmetrical to the second signal wiring (second differential pair wiring PL2) of the first interlayer conduction section (vias V1-V3). Therefore, compared to the case where interlayer conduction sections are provided on both sides in the width direction of the second signal wiring which is formed including the meander section, excessive capacitive coupling between the signal wiring and the interlayer conduction section can be suppressed.

[0308] With respect to the first differential pair wiring PL1, which does not have a meander section, vias V1 to V3 are provided on one side in the width direction of the first differential pair wiring PL1 (right side in Figure 11), and vias are not provided on the other side in the width direction of the first differential pair wiring PL1 (left side in Figure 11), including the symmetrical positions of vias V1 to V3 with respect to the first differential pair wiring PL1.

[0309] In this example, the first interlayer conduction sections (vias V1 to V3) are provided on one side in the width direction of the first signal wiring (first differential pair wiring PL1) where meander sections are not formed, and on the other side in the width direction of the first signal wiring (first differential pair wiring PL1), there are no interlayer conduction sections (vias) of the first interlayer conduction sections (vias V1 to V3) at symmetrical positions with respect to the first signal wiring (first differential pair wiring PL1). Therefore, compared to the case where interlayer conduction sections are provided on both sides in the width direction of the first signal wiring where meander sections are not formed, excessive capacitive coupling between the signal wiring and the interlayer conduction sections can be suppressed.

[0310] Next, focusing on the distance between the via and the signal wiring, the distance L1a from the via V1 to the first differential pair wiring PL1 is shorter than the distance L1b from the via V1 to the second differential pair wiring PL2 (L1a < L1b). In other words, the via V1 is a via arranged closer to the first differential pair wiring PL1 than to the second differential pair wiring PL2.

[0311] The distance L2a from the via V2 to the first differential pair wiring PL1 is shorter than the distance L2b from the via V2 to the second differential pair wiring PL2 (L2a < L2b). In other words, the via V2 is a via arranged closer to the first differential pair wiring PL1 than to the second differential pair wiring PL2.

[0312] The distance L3a from the via V3 to the first differential pair wiring PL1 is shorter than the distance L3b from the via V3 to the second differential pair wiring PL2 (L3a < L3b). In other words, the via V3 is a via arranged closer to the first differential pair wiring PL1 than to the second differential pair wiring PL2.

[0313] According to this example, since the first interlayer conduction part (vias V1 to V3) is provided in the specific region (specific region SR3) including the portion where the distance between the first signal wiring (first differential pair wiring PL1) and the second signal wiring (second differential pair wiring PL2) becomes the maximum due to the meander part (meander part PL2b), it is possible to prevent the characteristic impedance of the signal wiring from changing so that capacitive coupling does not occur due to the conductor of the interlayer conduction part (via), enabling stable signal transmission and preventing the game table from malfunctioning.

[0314] Furthermore, the meander section (meander section PL2b) widens the gap between the first signal wiring (first differential pair wiring PL1) and the second signal wiring (second differential pair wiring PL2), and the first interlayer conductive sections (vias V1-V3) are provided in a specific region (specific region SR3). Since the first interlayer conductive sections (vias V1-V3) are not provided in the inner region (inner region IR6) surrounded by the meander section (meander section PL2b), capacitive coupling is prevented by the conductors of the interlayer conductive sections (vias), thereby preventing changes in the characteristic impedance of the signal wiring, enabling stable signal transmission, and preventing malfunctions of the gaming machine.

[0315] Note that the positional relationship between vias V1 to V3, the first differential pair wiring PL1, and the second differential pair wiring PL2 is not limited to this example. For example, the distances L1a to L3a from vias V1 to V3 to the first differential pair wiring PL1 may be longer than the distances L1b to L3b from vias V1 to V3 to the second differential pair wiring PL2 (L1a>L1b, L2a>L2b, L3a>L3b). Also, the distances L1a to L3a from vias V1 to V3 to the first differential pair wiring PL1 may be the same as or approximately the same as the distances L1b to L3b from vias V1 to V3 to the second differential pair wiring PL2 (L1a=L1b or L1a≒L1b, L2a=L2b or L2a≒L2b, L3a=L3b or L3a≒L3b).

[0316] Furthermore, as shown in Figure 11, vias V1 to V3 are arranged along the extending direction of the first differential pair wiring PL1 in a specific region SR3 where no meander portion is formed.

[0317] In this example, since a first signal wiring (first differential pair wiring PL1) that does not include a meander section (no meander section is formed) has a first interlayer conduction section (e.g., via V1) and a second interlayer conduction section (e.g., via V2), the change in characteristic impedance can be made uniform by making the distance from the signal wiring uniform.

[0318] Vias V1 to V3 may be arranged along the extending direction of the second differential pair wiring PL2, which includes the meander portion PL2b. In this case, vias V1 to V3 may be arranged along the meander portion PL2b of the second differential pair wiring PL2, or along a region of the second differential pair wiring PL2 other than the meander portion PL2b.

[0319] Furthermore, vias V1 to V3 arranged along the extending direction of the first differential pair wiring PL1 are arranged at approximately equal intervals with predetermined spacing in that extending direction, and the distance L12 from via V1 to via V2 is the same as the distance L23 from via V2 to via V3 (L12 = L23).

[0320] In this example, multiple interlayer conductive sections, which do not include meander sections (i.e., no meander sections are formed), are arranged along the extending direction of the signal wiring at predetermined intervals and approximately equal spacing in that extending direction. This prevents capacitive coupling from occurring due to the conductors of the interlayer conductive sections (vias), thereby preventing changes in the characteristic impedance of the signal wiring, enabling stable signal transmission, and preventing malfunctions of the gaming machine.

[0321] In this example, we have described the first differential pair wiring PL1 and the second differential pair wiring PL2, which perform differential transmission, as examples of the first and second signal wiring. However, single-ended wiring that performs single-ended transmission may also be used.

[0322] <Relationship between wiring structure, interlayer conductivity, and ground plane pattern> Next, we will explain the relationship between the interlayer conductivity and the ground plane pattern.

[0323] As will be described in detail later, the second layer 500a(L2) of the liquid crystal connection substrate 500a has a GND plane pattern, and the first layer 500a(L1) of the liquid crystal connection substrate 500a has GND plane patterns L1GP1 and L1GP2 (see Figure 7) which are electrically connected to the second layer 500a(L2) via interlayer conductive parts (GND vias), a signal wiring pattern on which signal wiring is formed, and a GND plane open NGP1 (see Figure 11) which is part of the GND plane open NGP shown in Figures 3 and 7.

[0324] As shown in an enlarged view in Figure 11, the open-plane GND NGP1 is placed between the conductors of the signal wiring pattern on which the first differential pair wiring PL1 etc. is formed and the conductors of the GND plane pattern L1GP2. In this example, multiple interlayer conductive sections (for example, vias V4 to V7 shown in Figure 9 and vias V1 to V3 shown in Figure 11) are provided in the region between adjacent signal wiring patterns, and multiple interlayer conductive sections (for example, via Vg shown in Figure 11) are provided in the GND plane pattern L1GP2, while the open-plane GND NGP1 is configured without interlayer conductive sections (vias).

[0325] In this example, since no interlayer conductive sections (vias) are provided in the GND solid plane, capacitive coupling between the signal wiring, interlayer conductive sections (vias), and the conductors of the GND solid plane pattern is prevented, thus preventing changes in the characteristic impedance of the signal wiring. This allows for stable signal transmission and prevents malfunctions of the gaming machine.

[0326] <Wiring structure / modified example> Next, a modified example of the wiring structure will be explained using Figure 12. Figure 12 is a diagram showing the wiring structure according to the modified example.

[0327] The component side of the substrate 50 can be used to mount components such as connectors, IC chips, capacitors, resistors, and LEDs, and also has resist, wiring patterns, pads, lands, interlayer conduction areas (vias, through-holes), and silk screen printing. In this example, as shown in Figure 12, a connector CN52 and four capacitors C54 to C56 are mounted, along with four differential pair wirings PL54 to 57 and vias V58 to V60. Note that the components mounted on the component side of the substrate 50 and the interlayer conduction areas formed on the component side of the substrate 50 are not limited to this example; for example, resistors or LEDs may be mounted instead of capacitors. Also, in this example, the signal wiring is described as differential pair wiring for differential transmission, but it may also be applied to single-ended wiring for single-ended transmission.

[0328] <Wiring Structure / Example / Signal Wiring> In the differential pair wiring PL54 (54P, 54N), two differential signal lines 54P and 54N are routed downwards in a plan view of the circuit board 50, with their base ends at pads P54a and P54b, respectively, on which the terminals of connector CN52 are mounted. Then, in the lead-out section PL54z, the differential signal lines 54P and 54N gradually move closer together, and in the subsequent parallel section PL54p, the differential signal lines 54P and 54N are routed in parallel.

[0329] In the parallel section PL54p, the differential pair wiring PL54 (54P, 54N), in which the differential signal lines 54P and 54N are parallel, is connected to one side of the capacitor C54, and then, with the other side of the capacitor C54 as its base, is wired downward in a plan view of the substrate 50. After meandering multiple times in the meander section PL54a, it is wired in a straight line downward in a plan view of the substrate 50.

[0330] In this example, the differential pair wiring PL54 (54P, 54N) is configured so that interlayer conductive sections (vias) are not provided on both sides in the width direction of the region from pads P54a and P54b to capacitor C54. This suppresses changes in impedance in the wiring, enables stable signal transmission, and prevents malfunctions of the gaming machine. Interlayer conductive sections (vias) may be provided on one and / or the other side in the width direction of the same region.

[0331] Via V58 is provided in a specific region SR4 where the distance between differential pair wiring PL54 (54P, 54N) and an adjacent differential pair wiring (not shown) on the left side in the width direction of said differential pair wiring PL54 (54P, 54N) is maximized by the meander portion PL54a of differential pair wiring PL54 (54P, 54N).

[0332] In this example, since the first interlayer conduction section (via V58) is provided in a specific region (specific region SR4) that includes the point where the gap between the first signal wiring (adjacent differential pair wiring on the left side in the width direction of differential pair wiring PL54) and the second signal wiring (differential pair wiring PL54) is maximized by the meander section (meander section PL54a), capacitive coupling can be prevented by the conductor of the interlayer conduction section (via), thereby preventing changes in the characteristic impedance of the signal wiring, enabling stable signal transmission, and preventing malfunctions of the gaming machine.

[0333] Furthermore, the meander section (meander section PL54a) widens the gap between the first signal wiring (adjacent differential pair wiring on the left side in the width direction of differential pair wiring PL54) and the second signal wiring (differential pair wiring PL54), and a first interlayer conductive section (via V58) is provided in a specific region (specific region SR4). Since the first interlayer conductive section (via V58) is not provided in the inner region (inner region IR7) surrounded by the meander section (meander section PL54a), capacitive coupling cannot occur due to the conductor of the interlayer conductive section (via), preventing changes in the characteristic impedance of the signal wiring, enabling stable signal transmission, and preventing malfunctions of the gaming machine.

[0334] In the differential pair wiring PL55 (55P, 55N), two differential signal lines 55P and 55N are routed downwards in a plan view of the circuit board 50, with their base ends at pads P55a and P55b, respectively, on which the terminals of connector CN52 are mounted. Then, in the lead-out section PL55z, the differential signal lines 55P and 55N gradually move closer together, and in the subsequent parallel section PL55p, the differential signal lines 55P and 55N are routed in parallel.

[0335] In the parallel section PL55p, the differential pair wiring PL55 (55P, 55N), in which the differential signal lines 55P and 55N are parallel, is connected to one side of capacitor C55, and then, with the other side of capacitor C55 as its base, is wired in a straight line downwards in a plan view of the substrate 50.

[0336] In this example, the differential pair wiring PL55 (55P, 55N) is configured so that interlayer conductive sections (vias) are not provided on both sides in the width direction of the region from pads P55a and P55b to capacitor C55. This suppresses changes in impedance in the wiring, enables stable signal transmission, and prevents malfunctions of the gaming machine. Interlayer conductive sections (vias) may be provided on one and / or the other side in the width direction of the same region.

[0337] In the differential pair wiring PL56 (56P, 56N), two differential signal lines 56P and 56N are routed downwards in a plan view of the circuit board 50, with their base ends at pads P56a and P56b, respectively, on which the terminals of connector CN52 are mounted. Then, in the lead-out section PL56z, the differential signal lines 56P and 56N gradually move closer together, and in the subsequent parallel section PL56p, the differential signal lines 56P and 56N are routed in parallel.

[0338] In the parallel section PL56p, the differential pair wiring PL56 (56P, 56N), in which the differential signal lines 56P and 56N are parallel, is connected to one side of capacitor C56, and then, with the other side of capacitor C56 as its base, is wired in a straight line downward in a plan view of the substrate 50.

[0339] In this example, the differential pair wiring PL56 (56P, 56N) is configured so that interlayer conductive sections (vias) are not provided on both sides in the width direction of the region from pads P56a and P56b to capacitor C56. This suppresses changes in impedance in the wiring, enables stable signal transmission, and prevents malfunctions of the gaming machine. Interlayer conductive sections (vias) may be provided on one and / or the other side in the width direction of the same region.

[0340] In the differential pair wiring PL57 (57P, 57N), two differential signal lines 57P and 57N are routed downwards in a plan view of the circuit board 50, with their base ends at pads P57a and P57b, respectively, on which the terminals of connector CN52 are mounted. Then, in the lead-out section PL57z, the differential signal lines 57P and 57N gradually move closer together, and in the subsequent parallel section PL57p, the differential signal lines 57P and 57N are routed in parallel.

[0341] In the parallel section PL57p, the differential pair wiring PL57 (57P, 57N), in which the differential signal lines 57P and 57N are parallel, is connected to one side of the capacitor C57, and then, with the other side of the capacitor C57 as its base, is wired downward in a plan view of the substrate 50. After meandering multiple times in the meander section PL57a, it is wired in a straight line downward in a plan view of the substrate 50.

[0342] In this example, the differential pair wiring PL57 (57P, 57N) is configured so that interlayer conductive sections (vias) are not provided on both sides in the width direction of the region from pads P57a and P57b to capacitor C57. This suppresses changes in impedance in the wiring, enabling stable signal transmission and preventing malfunctions of the gaming machine. Interlayer conductive sections (vias) may be provided on one and / or the other side in the width direction of the same region.

[0343] Hereafter, differential pair wiring PL54 (54P, 54N), differential pair wiring PL55 (55P, 55N), differential pair wiring PL56 (56P, 56N), and differential pair wiring PL57 (57P, 57N) will be simplified and referred to as differential pair wiring PL54 to PL57, respectively.

[0344] <Wiring Structure / Modified Example / Differential Pair Wiring and Components> Next, considering the longitudinal direction of the differential pair wiring PL54 to PL57 and the positional relationship between capacitors C54 to C57, the distance L54 from the lower ends of pads P54a and P54b in differential pair wiring PL54 to the upper end of capacitor C54 is the same as or approximately the same as the distance L56 from the lower ends of pads P56a and P56b in differential pair wiring PL56 to the upper end of capacitor C56 (L54=L56, L54≒L56).

[0345] In this example, the distance between the first component located on the path of the first signal wiring and one end of the first signal wiring is the same as, or approximately the same as, the distance between the second component located on the path of the second signal wiring and one end of the second signal wiring. This suppresses changes in impedance in the wiring, enables stable signal transmission, and prevents the gaming machine from malfunctioning.

[0346] Furthermore, the distance L55 from the lower ends of pads P55a and P55b in differential pair wiring PL55 to the upper end of capacitor C55 is the same as or approximately the same as the distance L57 from the lower ends of pads P57a and P57b in differential pair wiring PL57 to the upper end of capacitor C57 (L55=L57, L55≈L57).

[0347] In this example, since the distance between the first component located on the path of the first signal wiring and one end of the first signal wiring is the same as the distance between the second component located on the path of the second signal wiring and one end of the second signal wiring, changes in impedance in the wiring can be suppressed, stable signal transmission can be achieved, and malfunctions of the gaming machine can be prevented.

[0348] On the other hand, the distance L54 from the lower ends of pads P54a and P54b in differential pair wiring PL54 to the upper end of capacitor C54 is shorter than the distance L55 from the lower ends of pads P55a and P55b in the adjacent differential pair wiring PL55 to the upper end of capacitor C55 (L54 <L55)。

[0349] Furthermore, the distance L56 from the lower ends of pads P56a and P56b in differential pair wiring PL56 to the upper end of capacitor C56 is shorter than the distance L57 from the lower ends of pads P57a and P57b in the adjacent differential pair wiring PL57 to the upper end of capacitor C57 (L56 <L57)。

[0350] With this configuration, capacitors C54 to C57 are arranged in a staggered pattern (alternating) in the width direction of the differential pair wiring PL54 to PL57. In this example, the first component (capacitor C54 (or capacitor C56)) located on the path of the first signal wiring (differential pair wiring PL54 (or differential pair wiring PL56)) and the second component (capacitor C55 (or capacitor C57)) located on the path of the second signal wiring (differential pair wiring PL55 (or differential pair wiring PL57)) are arranged in a staggered pattern. This allows the first and second signal wirings to be placed closer together, reducing the distance between them, and enabling more components and wiring to be provided in the limited space on the circuit board.

[0351] Furthermore, since the distance (L45) in the wiring direction between the first component (capacitor C54) located on the path of the first signal wiring (differential pair wiring PL54) and the second component (capacitor C55) located on the path of the second signal wiring (differential pair wiring PL55) that is in contact with and away from the first signal wiring is the same as the distance (L67) in the wiring direction between the third component (capacitor C56) located on the path of the third signal wiring (differential pair wiring PL56) and the fourth component (capacitor C57) located on the path of the fourth signal wiring (differential pair wiring PL57) that is in contact with and away from the third signal wiring is the same, changes in impedance in the wiring can be suppressed, stable signal transmission can be achieved, and malfunctions of the game machine can be prevented.

[0352] <Wiring structure / Modified example / Signal wiring and interlayer conductivity> Next, focusing on the differential pair wiring PL54~PL57 and the interlayer conductivity, via V58 is formed near the meander portion PL54a of differential pair wiring PL54, and via V59 is formed at a position opposite via V58 across the meander portion PL54a of differential pair wiring PL54 (a position symmetrical to via V58 with respect to differential pair wiring PL54).

[0353] In this example, the distance L58 ​​from via V58 to differential pair wiring PL54 is the same as or approximately the same as the distance L59 from via V59 to differential pair wiring PL54 (L58 = L59 or L58 ≈ L59).

[0354] Here, when two vias (interlayer conductive sections) are located opposite each other with a differential pair of wiring (signal wiring) in between, the "distance from the via (interlayer conductive section) to the differential pair of wiring (signal wiring)" is the distance in the direction along a virtual straight line passing through the centers of the two vias, and refers to the shortest distance between the outer edge of the via (the outermost contour line of the conductor region) and the outer edge of the signal wiring (the outermost contour line of the conductor region). Specifically, it is defined as the length of the shortest line segment among any line segments connecting the boundaries of the respective conductor regions of the interlayer conductive section and the signal wiring.

[0355] In this example, a second interlayer conductive section (via V59) is provided at a position opposite the first interlayer conductive section (via V58) with the second signal wiring (differential pair wiring PL54) in between. The distance from the first interlayer conductive section (via V58) to the second signal wiring (differential pair wiring PL54) is the first distance (distance L58), and the distance from the second interlayer conductive section (via V59) to the second signal wiring (differential pair wiring PL54) is the first distance (distance L59 (=distance L58)).

[0356] In other words, a second interlayer conductive section (via V59) is provided at a position opposite the first interlayer conductive section (via V58) with the second signal wiring (differential pair wiring PL54) in between. The first interlayer conductive section (via V58) is provided within a predetermined range (within a distance L58) with respect to the second signal wiring (differential pair wiring PL54), and the second interlayer conductive section (via V59) is provided within a predetermined range (within a distance L59 (=L58)) with respect to the second signal wiring (differential pair wiring PL54).

[0357] In this example, by localizing the impedance displacement point, stabilization can be improved at locations other than that local point.

[0358] In this example, we have described a case where two interlayer conductive sections are located opposite each other, with the meander portion of the signal wiring in between. However, the present invention is not limited to this case, and may also be applied to cases where two interlayer conductive sections are located opposite each other, with a portion other than the meander portion of the signal wiring in between.

[0359] Furthermore, this method may also be applied when the two interlayer conductive sections are located opposite each other, separated by a signal wiring that does not contain a meander section (i.e., no meander section is formed).

[0360] That is, a second interlayer conductive portion (e.g., via V59') is provided at a position opposite the first interlayer conductive portion (e.g., via V59) with the first signal wiring (e.g., differential pair wiring PL55) in between, and the distance from the first interlayer conductive portion (via V59) to the first signal wiring (differential pair wiring PL55) is the first distance, and the distance from the second interlayer conductive portion (via V59') to the first signal wiring (differential pair wiring PL55) is also the first distance.

[0361] In other words, a second interlayer conductive section (e.g., via V59') may be provided at a position opposite the first interlayer conductive section (e.g., via V59) with the first signal wiring (e.g., differential pair wiring PL55) in between, and the first interlayer conductive section (via V59) may be provided within a predetermined range with respect to the first signal wiring (differential pair wiring PL55), and the second interlayer conductive section (via V59') may be provided within a predetermined range with respect to the first signal wiring (differential pair wiring PL55).

[0362] In this example, by localizing the impedance displacement point, stabilization can be improved at locations other than that local point.

[0363] Next, focusing on the position where via V60 is provided, with reference to the differential pair wiring PL57 which includes the meander portion PL57b, via V60 is provided on one side in the width direction of the differential pair wiring PL57 (left side in Figure 12), and on the other side in the width direction of the differential pair wiring PL57 (right side in Figure 12), vias are not provided, including the position of via V60 symmetrically with respect to the differential pair wiring PL57.

[0364] In this example, the first interlayer conduction portion (via V60) is provided on one side in the width direction of the second signal wiring (differential pair wiring PL57) which is formed including the meander portion, and no interlayer conduction portion (via) is provided on the other side in the width direction of the second signal wiring (differential pair wiring PL57) at a position symmetrical to the second signal wiring (differential pair wiring PL57) relative to the first interlayer conduction portion (via V60). Therefore, compared to the case where interlayer conduction portions are provided on both sides in the width direction of the second signal wiring which is formed including the meander portion, excessive capacitive coupling between the signal wiring and the interlayer conduction portion can be suppressed.

[0365] With respect to the differential pair wiring PL56, which does not have a meander section, via V60 is provided on one side in the width direction of the differential pair wiring PL56 (right side in Figure 12), and vias are not provided on the other side in the width direction of the differential pair wiring PL56 (left side in Figure 12), including the position of via V60 symmetrically with respect to the differential pair wiring PL56.

[0366] In this example, the first interlayer conduction portion (via V60) is provided on one side in the width direction of the first signal wiring (differential pair wiring PL56) where no meander portion is formed, and no interlayer conduction portion (via) is provided on the other side in the width direction of the first signal wiring (differential pair wiring PL56) at a position symmetrical to the first signal wiring (differential pair wiring PL56) relative to the first interlayer conduction portion (via V60). Therefore, compared to the case where interlayer conduction portions are provided on both sides in the width direction of the first signal wiring where no meander portion is formed, excessive capacitive coupling between the signal wiring and the interlayer conduction portion can be suppressed.

[0367] Furthermore, the outer diameters of all vias (ground vias) V58 to V60 provided in a predetermined area of ​​the substrate 50 are the same (w1) or approximately the same (≒w1). Note that "approximately the same" is a concept that takes into account that even if the dimensions are set to be the same in the design, minute differences in actual dimensions may occur due to processing errors, drilling errors, etc., during substrate manufacturing. Therefore, the outer diameters of vias V58 to V60 only need to match within a range that provides substantially equivalent function and effect, and are not limited to being perfectly identical in dimension.

[0368] In this example, by making the outer diameters of multiple vias (interlayer conductive portions) provided in a predetermined area of ​​the substrate the same, variations in parasitic components caused by the vias can be reduced. This suppresses impedance variations in signal wiring and improves signal quality. Furthermore, by making the outer diameters of vias positioned opposite a differential pair wiring the same, the symmetry of the electrical influence on the differential pair wiring can be improved.

[0369] Next, considering the longitudinal direction of the differential pair wiring PL54 and PL55 and the positional relationship of via V59, it appears that via V59 is positioned eccentrically towards one end of differential pair wiring PL54 (closer to pads P54a and P54b) than the other end of differential pair wiring PL54, when the longitudinal direction of differential pair wiring PL54 is used as the reference. Furthermore, when the longitudinal direction of differential pair wiring PL55 is used as the reference, via V59 is positioned eccentrically towards one end of differential pair wiring PL55 (closer to pads P55a and P55b) than the other end of differential pair wiring PL55.

[0370] In this example, the first interlayer conduction section (via V59) is provided on one end of the first signal wiring (differential pair wiring PL55) where no meander section is formed, and on one end of the second signal wiring (differential pair wiring PL54) which includes the meander section PL54a. By concentrating the points of change in characteristic impedance, signal waveform distortion can be reduced, stable signal transmission can be achieved, and the frequency of communication errors can be reduced. Furthermore, the ends of the wiring and the connection points with other components in the wiring (e.g., connector terminals, pads, vias, etc.) are points of change in characteristic impedance. By placing the interlayer conduction section near the connection points that are points of change in characteristic impedance, the points of change in impedance can be concentrated, thereby stabilizing other parts.

[0371] In this example, a differential pair wiring PL54, which includes a meander section, was described as an example of the first signal wiring. However, signal wiring without a meander section (signal wiring without a meander section) may also be used.

[0372] Furthermore, "one side" and "the other side" are terms used for convenience to distinguish between them and do not limit the input or output side of the signal. Also, if the point located midway between the distance between one end (first end) and the other end (second end) of the signal wiring is defined as the "midpoint," then "one end side" refers to the area closer to the first end than the midpoint, and "the other end side" refers to the area closer to the second end than the midpoint. More preferably, "one end side" refers to the area within a predetermined range from the first end, and "the other end side" refers to the area within a predetermined range from the second end.

[0373] Furthermore, the term "end" is not limited to the pads or lead-out sections of signal wiring. For example, if a component is located along the path of the signal wiring, the connection point between that component and the signal wiring may be defined as the end. Therefore, for example, one "end" of differential pair wiring PL54 may be the connection point between the downstream end of capacitor C54, which is located along the path of differential pair wiring PL54, and the differential pair wiring PL54.

[0374] In other words, the "end" of a signal wire refers to the termination point in the direction of extension of the signal wire, and if no other components are connected to the signal wire, it refers to the physical termination portion of the signal wire. On the other hand, if a component is placed on the signal wire and electrically connected to that component, the connection point between the signal wire and the component may be defined as the end of the wire.

[0375] <LCD connection board / First differential pair wiring and second differential pair wiring> Next, we will explain the relationship between the first differential pair wiring PL1 (D1P, D1N) and the second differential pair wiring PL2 (CLK1P, CLK1N).

[0376] The first differential pair wiring PL1 (D1P, D1N) is routed in a straight line from the first left bend PL1a as its base end, toward the right and downward in a plan view of the liquid crystal connection substrate 500a, whereas the second differential pair wiring PL2 (CLK1P, CLK1N) has a meander portion PL2b formed thereon, which meanders toward the first differential pair wiring PL1 (D1P, D1N) toward the first left bend PL2a as its base end, and between them is a first region ER1 where the distance between them is the maximum distance X1.

[0377] The first region ER1 is the region sandwiched between the straight section from the first left bend PL1a to the second left bend PL1b in the first differential pair wiring PL1 (D1P, D1N) and the straight section from the first right bend PL2c, which is the endpoint of the meander section PL2b in the second differential pair wiring PL2 (CLK1P, CLK1N), to the second left bend PL2d. Multiple vias V1 to V3 (interlayer conductive sections) are provided in this first region ER1.

[0378] Furthermore, as described above, the first differential pair wiring PL1 (D1P, D1N) has a special shaped section PL1s for adjusting the difference in wiring length at the bend, and the second differential pair wiring PL2 (CLK1P, CLK1N) has a special shaped section PL2s for adjusting the difference in wiring length at the bend. However, both the special shaped sections PL1s and PL2s are formed at positions spaced apart from the multiple vias V1 to V3 provided in the first region ER1.

[0379] In this example, by aligning the wiring lengths within a pair of wires in a paired wiring configuration, it is possible to prevent delays in signal arrival timing, while simultaneously preventing changes in the characteristic impedance of the signal line by avoiding capacitive coupling through the via conductors.

[0380] <LCD connection board / 3rd differential pair wiring and 4th differential pair wiring> Next, we will explain the relationship between the third differential pair wiring PL3 (C1P, C1N) and the fourth differential pair wiring PL4 (B1P, B1N).

[0381] The third differential pair wiring PL3 (C1P, C1N) is routed in a straight line downward in a plan view of the liquid crystal connection substrate 500a, with pads CN3P12 and CN3P13 as its base ends. In contrast, the fourth differential pair wiring PL4 (B1P, B1N) has a meander portion PL4b that meanders away from the third differential pair wiring PL3 (C1P, C1N), and a second region ER2 is formed between the third differential pair wiring PL3 (C1P, C1N) and the fourth differential pair wiring PL4 (B1P, B1N) where the distance between them is the maximum distance X2.

[0382] The second region ER2 is the area sandwiched between the straight section from pad CN3P12 to the first left bend PL3a in the third differential pair wiring PL3 (C1P, C1N) and the right bend PL4b of the meander section in the fourth differential pair wiring PL4 (B1P, B1N). No vias (interlayer conductive sections) are provided in this second region ER2.

[0383] The spacing X1 between the first differential pair wiring PL1 (D1P, D1N) and the second differential pair wiring PL2 (CLK1P, CLK1N) in the first region ER1 is wider than the spacing X2 between the third differential pair wiring PL3 (C1P, C1N) and the fourth differential pair wiring PL4 (B1P, B1N) in the second region ER2 (X1 > X2). Therefore, vias V1 to V3 are provided in the first region ER1 where the spacing is wider, while no vias are provided in the second region ER2 where the spacing is narrower.

[0384] In this example, by making the wiring lengths equal in the meander section, it is possible to suppress timing differences in signal transmission while preventing a decrease in characteristic impedance due to vias and stabilizing the potential.

[0385] Furthermore, as described above, the third differential pair wiring PL3 (C1P, C1N) has a special shaped section PL3s for adjusting the difference in wiring length at the bend, and the fourth differential pair wiring PL4 (B1P, B1N) has a special shaped section PL4s for adjusting the difference in wiring length at the bend. However, both the special shaped sections PL3s and PL4s are formed at positions spaced apart from the multiple vias V1 to V3 provided in the first region ER1.

[0386] In this example, by aligning the wiring lengths within a pair of wires in a paired wiring configuration, it is possible to prevent delays in signal arrival timing, while simultaneously preventing changes in the characteristic impedance of the signal line by avoiding capacitive coupling through the via conductors.

[0387] <LCD connection board / 5th differential pair wiring and 4th differential pair wiring> Next, we will explain the relationship between the fifth differential pair wiring PL5 (A1P, A1N) and the fourth differential pair wiring PL4 (B1P, B1N).

[0388] The fifth differential pair wiring PL5 (A1P, A1N) is routed in a straight line downward in a plan view of the liquid crystal connection substrate 500a, with pads CN3P18 and CN3P19 as its base ends. In contrast, the fourth differential pair wiring PL4 (B1P, B1N) has a meander portion PL4b that meanders away from the fifth differential pair wiring PL5 (A1P, A1N), and a third region ER3 is formed between the fifth differential pair wiring PL5 (A1P, A1N) and the fourth differential pair wiring PL4 (B1P, B1N) where the distance between them is the maximum distance X3.

[0389] The third region ER3 is the area sandwiched between the straight section from pad CN3P18 to the first left bend PL5a in the fifth differential pair wiring PL5 (A1P, A1N) and the right bend PL4b of the meander section in the fourth differential pair wiring PL4 (B1P, B1N). Vias V4 to V5 (interlayer conductive sections) are provided in this third region ER3.

[0390] The third region ER3 is the region sandwiched between the straight section from the first right bend PL5b to the second left bend PL5c in the fifth differential pair wiring PL5 (A1P, A1N) and the meandering section from the first left bend PL4a to the second left bend PL4c, which is the starting point of the meander section 4b in the fourth differential pair wiring PL4 (B1P, B1N), and the straight section. Multiple vias V4 to V5 (interlayer conductive sections) are provided in this third region ER3.

[0391] Furthermore, as described above, the fifth differential pair wiring PL5 (A1P, A1N) has a special shaped section PL5s for adjusting the difference in wiring length at the bend, and the fourth differential pair wiring PL4 (B1P, B1N) has a special shaped section PL4s for adjusting the difference in wiring length at the bend. However, both the special shaped sections PL5s and PL4s are formed at positions spaced apart from the multiple vias V4 to V5 provided in the third region ER3.

[0392] In this example, by aligning the wiring lengths within a pair of wires in a paired wiring configuration, it is possible to prevent delays in signal arrival timing, while simultaneously preventing changes in the characteristic impedance of the signal line by avoiding capacitive coupling through the via conductors.

[0393] <LCD connection board / 1st differential pair wiring to 10th differential pair wiring> In this example, for the first differential pair wiring PL1 (D1P, D1N) to the fifth differential pair wiring PL5 (A1P, A1N) in the first layer 500a (L1) of the liquid crystal connection substrate 500a, differences in wiring length are adjusted by forming special shapes or meander sections in each wiring so that the wiring length of all five sets of differential pair wiring (10 differential signal lines) is the same.

[0394] Similarly, in the first layer 500a(L1) of the liquid crystal connection substrate 500a, the differences in wiring length are adjusted for the sixth differential pair wiring PL6 (D0P, D0N) to the tenth differential pair wiring PL10 (A0P, A0N) by forming special shapes or meander sections in each wiring so that the wiring lengths of all five sets of differential pair wiring (10 differential signal lines) are the same.

[0395] As shown in Figure 7, the wiring length from the first differential pair wiring PL1 (D1P, D1N) to the fifth differential pair wiring PL5 (A1P, A1N) is longer than the wiring length from the sixth differential pair wiring PL6 (D0P, D0N) to the tenth differential pair wiring PL10 (A0P, A0N). This is because the wiring length of the wiring on the other board connected to the liquid crystal connection board 500a (in this example, the performance control board 400a) and the wiring length from the sixth differential pair wiring PL6 (D0P, D0N) to the tenth differential pair wiring PL10 (A0P, A0N) are configured to be equal to the wiring length from the first differential pair wiring PL1 (D1P, D1N) to the fifth differential pair wiring PL5 (A1P, A1N).

[0396] In this example, the total wiring length of the differential pair wiring on the LCD connection board 500a and the wiring length of the differential pair wiring on another board connected to this LCD connection board 500a (in this example, the performance control board 400a) is made the same for 10 sets of differential pair wiring (20 differential signal lines). As a result, the wiring lengths within each pair of wiring are made the same, preventing delays in signal arrival timing. This provides a board that suppresses delays in signal arrival timing and distortion of signal waveforms in high-speed signals such as LCD video signals, enabling the provision of accurate game information at the appropriate timing, preventing players from suffering disadvantages, and preventing a decline in the enjoyment of the game.

[0397] <Liquid crystal connection substrate / conductor layer> Next, the conductive layers of the liquid crystal connection substrate 500a will be described using Figures 13 and 14. Figure 13 is a view of the second layer 500a(L2) and the third layer 500a(L3) of the liquid crystal connection substrate 500a from the surface side, and Figure 14 is a view of the fourth layer 500a(L4) to the sixth layer 500a(L6) of the liquid crystal connection substrate 500a from the surface side.

[0398] As described above, the liquid crystal connection substrate 500a is a multilayer substrate having multiple conductive layers. In this example, it consists of a total of six layers: the first layer 500a(L1) shown in Figure 3, the second layer 500a(L2) and the third layer (L3) shown in Figure 13, and the fourth layer 500a(L4), fifth layer 500a(L5), and sixth layer 500a(L6) shown in Figure 14.

[0399] A ground plane pattern is formed on the second layer 500a(L2) (second conductor layer), but no ground plane pattern is formed on the areas in the second layer 500a(L2) (second conductor layer) corresponding to pads CN3P8~CN3P13, CN3P15~CN3P16, CN3P18~CN3N23, and CN3P25~CN3P30 of the first layer 500a(L1). In this example, capacitive coupling between the pads and GND can be prevented, which would cause the characteristic impedance of the signal to drop too low.

[0400] On the other hand, in the wiring pattern region of the second layer 500a(L2) where the first differential pair wiring PL1 to the tenth differential pair wiring PL10 of the first layer 500a(L1) are formed, a ground plane pattern is formed.

[0401] In this example, the first layer (Layer 1 500a(L1)) is the layer on which the first signal trace (e.g., the first differential pair trace PL1) and the second signal trace (e.g., the second differential pair trace PL2) are formed, and the second layer (Layer 2 500a(L2)) is the layer on which the regions corresponding to the first and second signal traces are formed with a solid ground plane. Therefore, if there is no GND (or power) plane on the layer adjacent to the signal trace, the capacitive coupling will be weak and the characteristic impedance will be high, but this problem can be prevented.

[0402] In Figures 13 and 14, the dotted line-enclosed region SLA in layers 2 500a(L2) to 5 500a(L5) represents the combined region of the wiring pattern area where the first differential pair wiring PL1 to the tenth differential pair wiring PL10 are formed in layer 1 500a(L1) and the GND solid block area formed to surround this wiring pattern area (hereinafter referred to as the "signal wiring compatible region SLA"). In this example, the signal wiring compatible region SLA in layers 2 500a(L2) to 5 500a(L5) is configured so that no other wiring is formed thereon. The term "wiring" here can include signal wiring such as single-ended wiring for single-ended transmission and differential pair wiring for differential transmission, power wiring that supplies a predetermined power supply voltage, and GND wiring that is not a solid block pattern.

[0403] In this example, since no signal wiring is formed in the region corresponding to the first signal wiring (e.g., the first differential pair wiring PL1) and the second signal wiring (e.g., the second differential pair wiring PL2) (the signal wiring corresponding region SLA), if there are other signal wirings in the inner layers near the signal wiring, it deviates from the definition of microstrip wiring, and the characteristic impedance becomes high due to the loss of capacitive coupling with the adjacent GND (or power) plane. However, this problem can be prevented.

[0404] Furthermore, as described above, the liquid crystal connection substrate 500a has signal vias SV6a, SV6b, SV7a, SV7b, SV8a, SV8b, SV9a, SV9b, SV10a, and SV10b that connect the six layers from the first layer 500a(L1) to the sixth layer 500a(L6). However, in all layers from the first layer 500a(L1) to the sixth layer 500a(L6), there are regions around these signal vias where a GND solid pattern is not formed (GND solid-free regions) NGP6 to NGP10 (shown only in the second layer 500a(L2) in Figure 13).

[0405] In this example, since no ground plane is formed in the area surrounding the via (signal via) connecting signal lines of different layers, capacitive coupling occurs between the signal via and GND, preventing the characteristic impedance of the signal from dropping too low.

[0406] <LCD connection board / GND ground plane pattern> Next, the GND plane pattern of the liquid crystal connection substrate 500a will be explained using Figures 7, 13, and 14.

[0407] As shown in Figure 7, the first layer 500a(L1) has two ground plane patterns: a ground plane pattern L1GP1 which is electrically connected to the GND terminal of the first connector CN1, and a ground plane pattern L1GP2 which is electrically connected to the GND terminals of the third connector CN3 and the fourth connector CN4. In the first layer 500a(L1), an insulating slit is formed between the ground plane pattern L1GP1 and the ground plane pattern L1GP2, and the two are not electrically connected and are formed separated by a predetermined distance.

[0408] As shown in Figure 13, the third layer 500a(L3) has two ground plane patterns: a ground plane pattern L3GP1 which is electrically connected to the GND terminal of the first connector CN1, and a ground plane pattern L3GP2 which is electrically connected to the GND terminals of the third connector CN3 and the fourth connector CN4. In the third layer 500a(L3), an insulating slit is formed between the ground plane pattern L3GP1 and the ground plane pattern L3GP2, and the two are not electrically connected and are formed separated by a predetermined distance.

[0409] As shown in Figure 14, the fourth layer 500a(L4) has two ground plane patterns: a ground plane pattern L4GP1 which is electrically connected to the GND terminal of the first connector CN1, and a ground plane pattern L4GP2 which is electrically connected to the GND terminals of the third connector CN3 and the fourth connector CN4. In the fourth layer 500a(L4), an insulating slit is formed between the ground plane pattern L4GP1 and the ground plane pattern L4GP2, and the two are not electrically connected and are formed separated by a predetermined distance.

[0410] Furthermore, in the fourth layer 500a (L4), a power supply plane L4DCP is formed in an area insulated from both the GND plane L4GP1 and the GND plane L4GP2, where the power supply for the LCD backlight (DC12V) is wired. Insulation slits are also formed between this power supply plane L4DCP and the GND planes L4GP1 and L4GP2, and the two are not electrically connected, being formed separated by a predetermined distance.

[0411] In the fifth layer 500a(L5), two ground plane patterns are formed: a ground plane pattern L5GP1 which is electrically connected to the GND terminal of the first connector CN1, and a ground plane pattern L5GP2 which is electrically connected to the GND terminals of the third connector CN3 and the fourth connector CN4. In the fifth layer 500a(L5), an insulating slit is formed between the ground plane pattern L5GP1 and the ground plane pattern L5GP2, and the two are not electrically connected and are formed separated by a predetermined distance.

[0412] As shown in Figure 14, the sixth layer 500a(L6) has two ground plane patterns: a ground plane pattern L6GP1 which is electrically connected to the GND terminal of the first connector CN1, and a ground plane pattern L6GP2 which is electrically connected to the GND terminals of the third connector CN3 and the fourth connector CN4. In the sixth layer 500a(L6), an insulating slit is formed between the ground plane pattern L6GP1 and the ground plane pattern L6GP2, and the two are not electrically connected and are formed separated by a predetermined distance.

[0413] Here, we will explain the significance of the slits formed between the two ground plane patterns in each of the layers from the first layer 500a(L1) to the sixth layer 500a(L6).

[0414] The first connector CN1 is a connector for the LCD backlight power supply, and a ground plane pattern corresponding to the LCD backlight power supply (DC12V) needs to be wired from the power source, the second connector CN2 (provided on the back of the LCD connection board 500a as shown in Figure 14), to the first connector CN1. On the other hand, the LCD backlight power supply (DC12V) consumes a lot of power, so a lot of current flows, but the backlight driver circuit on the LCD module switches this high power on and off at several hundred kHz to generate the voltage required for the backlight LEDs (around 30-60V). Therefore, a very large amount of noise is generated in the backlight driver circuit every time the power is turned on or off, and this noise enters the GND of the LCD connection board 500a through the wire harness and the first connector CN1. In order to return this intense noise to the second connector CN2 without scattering it as much as possible, insulating slits are placed between the two GND plane patterns in each layer from the first layer 500a (L1) to the sixth layer 500a (L6).

[0415] <LCD connection board / distance between pads and vias> Next, we will explain the distance between the pads and vias formed on the liquid crystal connection substrate 500a.

[0416] As shown in Figure 8, on the left side of pad CN3P8, to which the differential signal line D1P of the first differential pair wiring PL1 (D1P, D1N) is connected, pad P1GND is formed, which is electrically connected to the GND plane pattern of the liquid crystal connection substrate 500a. Above this, via V8 is formed, which is electrically connected to pad P1GND. Also, above pad CN3P24 (GND), which is connected to the GND plane pattern of the liquid crystal connection substrate 500a, via V9 is formed, which is connected to pad P1GND.

[0417] On the other hand, above pad CN3P22 to which the differential signal line CLK0P of the seventh differential pair wiring PL7 (CLK0P, CLK0N) is connected, via V10 is formed that is electrically connected to pad CN3P22.

[0418] The distances L8 between the pad P1GND and the via V8 and L9 between the pad CN3P24(GND) and the via V9 are both configured to be shorter than the distance L10 between the pad CN3P22 and the via V10 (L8, L9 < L10). That is, in this example, the distances L8 and L9 between the pad connected to GND and the via connected to this pad are configured to be shorter than the distance L10 between the pad connected to the differential signal line and the via connected to this pad. Note that the vias V8 and V9 are connected to GND, and the via V10 is connected to the pad connected to the differential signal line, but it is not limited to this, and it may be a via as an interlayer via hole that simply conducts between layers.

[0419] According to this example, it is possible to ensure the distance between the via connected to GND and the via connected to the differential signal line, suppress noise and the like that the differential signal exerts on GND, and visually and easily distinguish the via connected to GND from the via connected to the differential signal line, thereby enhancing the maintainability.

[0420] <Liquid crystal connection substrate / Summary> In the case of a high-speed signal (130 ps per bit) such as a liquid crystal video signal used in a game machine, a difference in the signal arrival timing of about 7 ps occurs due to a difference in the length of a 1-mm wiring pattern. If the signal arrival timings are not aligned, the video displayed on the liquid crystal will be distorted, and the interest of the game may decrease. Also, in the paired wiring in the liquid crystal video signal, if the wiring lengths within the pair are not aligned, appropriate video output cannot be achieved, which may lead to a decrease in the game interest. The object of the present invention is to provide a substrate in which the deviation of the signal arrival timing and the distortion of the signal waveform are suppressed in a high-speed signal such as a liquid crystal video signal, and to provide a game machine that can prevent the decrease in the game interest.

[0421] Furthermore, since gaming machines sometimes display important game information for players (for example, button press order navigation in slot machines, or decorative symbols and pre-announcement information in pachinko machines) on the LCD screen, there is a risk that players may be disadvantaged if such game information cannot be obtained or is obtained at a delayed time due to image distortion or delays in image display. The present invention aims to provide a gaming machine that can provide accurate game information at the appropriate time and prevent players from suffering disadvantages.

[0422] As described above, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and comprises a first circuit board (for example, the liquid crystal connection board 500a shown in Figure 7) on which a plurality of signal wirings are formed, and the plurality of signal wirings include a first pair wiring (for example, the fourth differential pair wiring PL4 (B1P, B1N) shown in Figure 7) consisting of a first signal wiring (for example, the differential signal line B1P shown in Figure 7) and a second signal wiring (for example, the differential signal line B1N shown in Figure 7), and the first The paired wiring is characterized in that one of the signal wires of the first signal wire and the second signal wire has a first special shaped portion (for example, the special shaped portion PL4s shown in Figure 7), the first special shaped portion is a part that adjusts the difference in wiring length within the pair in the first paired wiring, and the first special shaped portion is formed on the signal wire with the shorter wiring length (for example, the differential signal line B1N shown in Figure 7) within the pair in the first paired wiring, excluding the first special shaped portion.

[0423] According to the gaming machine of this embodiment, the wiring lengths within a pair of wires can be made uniform to prevent delays in signal arrival timing. This provides a circuit board that suppresses delays in signal arrival timing and distortion of signal waveforms in high-speed signals such as liquid crystal video signals, thereby providing accurate game information at the appropriate timing, preventing players from suffering disadvantages, and preventing a decline in the enjoyment of the game.

[0424] Furthermore, the first pair of wiring may have a bent portion that bends from a first direction to a second direction (for example, the third left bend PL4d shown in Figure 7), and the first special-shaped portion may be formed on the signal wiring located on the inside of the bend in the first pair of wiring.

[0425] With this configuration, the wiring lengths within each pair of wires can be made the same, preventing any discrepancies in signal arrival timing.

[0426] Furthermore, the first substrate is capable of mounting a connector (for example, the third connector CN3 shown in Figure 3), and one end of the first pair of wiring includes a connector connection portion that connects to the connector (for example, a portion including pads CN3P15 and CN3P16, lead-out portion PL4z, and special-shaped portion PL4s shown in Figure 8), and the first special-shaped portion may be a portion located at the connector connection portion.

[0427] With this configuration, by concentrating points of change in characteristic impedance (the boundary between the connector and the pattern wiring, and the meandering sections within the pair) that cause signal reflections that disrupt the signal waveform, it is possible to reduce signal waveform distortion and lower the frequency of communication errors.

[0428] Furthermore, the connector comprises a plurality of terminals (for example, terminals CN3-1 to CN3-30 shown in Figure 6), the first substrate comprises a plurality of pads (for example, pads CN3P1 to CN3P30 shown in Figure 8), each pad is capable of mounting one of the plurality of terminals, the plurality of pads include a first pad (for example, pad CN3P15 shown in Figure 8) and a second pad (for example, pad CN3P16 shown in Figure 8), the first pair of wiring includes a lead-out section (for example, lead-out section PL4z shown in Figure 8) that narrows the gap between the first signal wiring connected to the first pad and the second signal wiring connected to the second pad, and the lead-out section may be positioned between the first pad, the second pad and the first special-shaped section.

[0429] With this configuration, the change in characteristic impedance at the pad, which is the boundary with the connector, and the change in characteristic impedance at the first specially shaped section would be continuous, resulting in a large change in characteristic impedance and thus preventing increased signal reflection.

[0430] Furthermore, the plurality of signal wirings may include a second pair of wirings (for example, a second differential pair of wirings PL2 (CLK1P, CLK1N) shown in Figure 7) consisting of a third signal wiring (for example, a differential signal line CLK1P shown in Figure 7) and a fourth signal wiring (for example, a differential signal line CLK1N shown in Figure 7), and the second pair of wirings may include a second specific shape portion (for example, a meander portion PL2b shown in Figure 7) in which both the third and fourth signal wirings adjust for differences in wiring length with the first pair of wirings.

[0431] This configuration prevents timing discrepancies in signal transmission between different pairs of wires.

[0432] Furthermore, the first pair of wiring may include a first specific shape portion (for example, the meander portion PL4b shown in Figure 7) in both the first signal wiring and the second signal wiring to adjust for the difference in wiring length with the second pair of wiring.

[0433] This configuration prevents timing discrepancies in signal transmission between different pairs of wires.

[0434] Furthermore, the plurality of signal wirings include a second pair wiring (for example, the second differential pair wiring PL2 (CLK1P, CLK1N) shown in Figure 7) consisting of a third signal wiring (for example, the differential signal line CLK1P shown in Figure 7) and a fourth signal wiring (for example, the differential signal line CLK1N shown in Figure 7), wherein the second pair wiring has a second special shape portion (for example, the meander portion PL2b shown in Figure 7) on one of the signal wirings of the third signal wiring and the fourth signal wiring, the second special shape portion is a portion that adjusts the difference in wiring length within the pair in the second pair wiring, the second special shape portion is formed on the signal wiring with the shorter wiring length excluding the second special shape portion within the pair in the second pair wiring (for example, the differential signal line CLK1N shown in Figure 7), and the position of the first special shape portion in the first pair wiring and the position of the second special shape portion in the second pair wiring may be different.

[0435] With this configuration, the regular arrangement of multiple specially shaped parts creates resonance, preventing the gaming machine from malfunctioning due to the incorporation of specific frequencies.

[0436] Furthermore, the first substrate is capable of mounting a connector (for example, the third connector CN3 shown in Figure 3), one end of the first pair of wiring includes a first connector connection portion connected to the connector (for example, a portion including pads CN3P8 and CN3P9, lead-out portion PL1z, and special-shaped portion PL1s shown in Figure 8), one end of the second pair of wiring includes a second connector connection portion connected to the connector (for example, a portion including pads CN3P10 and CN3P11, lead-out portion PL2z, and special-shaped portion PL2s shown in Figure 8), the first special-shaped portion is a portion located at the first connector connection portion, the second special-shaped portion is a portion located at the second connector connection portion, and the first special-shaped portion and the second special-shaped portion may be located at different positions in the signal wiring lead-out direction.

[0437] With this configuration, the regular arrangement of multiple specially shaped parts creates resonance, preventing the gaming machine from malfunctioning due to the incorporation of specific frequencies.

[0438] Furthermore, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and comprises a first circuit board (for example, the liquid crystal connection board 500a shown in Figure 7) on which a plurality of wirings are formed, one of which is a first wiring (for example, the fourth differential pair wiring PL4 (B1P, B1N) shown in Figure 7) formed including a first meander section (for example, the meander section PL4b shown in Figure 7), one of which is a second wiring (for example, the third differential pair wiring PL3 (C1P, C1N) shown in Figure 7) formed adjacent to the first wiring, one of which is a third wiring (for example, the second differential pair wiring PL2 (CLK1P, CLK1N) shown in Figure 7) formed including a second meander section (for example, the meander section PL2b shown in Figure 7), and one of which is the third wiring The game machine is characterized in that a fourth wiring (for example, the first differential pair wiring PL1 (D1P, D1N) shown in Figure 7) is formed adjacent to the first wiring, the region in which the distance between the first wiring and the second wiring is widened by the first meander portion is defined as the first region (for example, the first region ER1 shown in Figure 7), the region in which the distance between the third wiring and the fourth wiring is widened by the second meander portion is defined as the second region (for example, the second region ER2 shown in Figure 7), the first region is a location where no interlayer conductive portion is provided, the second region is a location where interlayer conductive portions (for example, vias V1~V3 shown in Figure 7) are provided, and the distance between the third wiring and the fourth wiring in the second region (for example, the distance X1 shown in Figure 7) is wider than the distance between the first wiring and the second wiring in the first region (for example, the distance X2 shown in Figure 7).

[0439] According to the gaming machine of this embodiment, the meander section is designed to equalize the lengths of the wirings, thereby suppressing timing discrepancies in signal transmission, while preventing a decrease in characteristic impedance due to vias and stabilizing the potential.

[0440] Furthermore, the first wiring (for example, the fourth differential pair wiring PL4 (B1P, B1N) shown in Figure 7) is a pair wiring consisting of the first signal wiring (for example, the differential signal line B1P shown in Figure 7) and the second signal wiring (for example, the differential signal line B1N shown in Figure 7), the second wiring (for example, the third differential pair wiring PL3 (C1P, C1N) shown in Figure 7) is a pair wiring consisting of the third signal wiring (for example, the differential signal line C1P shown in Figure 7) and the fourth signal wiring (for example, the differential signal line C1N shown in Figure 7), the third wiring (for example, the second differential pair wiring PL2 (CLK1P, CLK1N) shown in Figure 7) is a pair wiring consisting of the fifth signal wiring (for example, the differential signal line CLK1P shown in Figure 7) and the sixth signal wiring (for example, the differential signal line CLK1N shown in Figure 7), and the fourth wiring (for example, the first differential pair wiring PL1 (D1P, D) shown in Figure 7 1N)) is a pair of wiring consisting of a seventh signal wiring (for example, the differential signal line D1P shown in Figure 7) and an eighth signal wiring (for example, the differential signal line D1N shown in Figure 7), the first wiring includes at least one bend (hereinafter referred to as the "first bend," for example, the third left bend PL4d shown in Figure 7) from one end to the other, the second wiring includes at least one bend (hereinafter referred to as the "second bend," for example, the second left bend PL3b shown in Figure 7) from one end to the other, the third wiring includes at least one bend (hereinafter referred to as the "third bend," for example, the second left bend PL2b shown in Figure 7) from one end to the other, and the fourth wiring includes at least one bend (hereinafter referred to as the "fourth bend") from one end to the other.For example, the wiring includes the second left bend PL1b shown in Figure 7, the first wiring includes a first special shape (for example, the special shape PL4s shown in Figure 7) in the signal wiring located on the inside of the first bend, the second wiring includes a second special shape (for example, the special shape PL3s shown in Figure 7) in the signal wiring located on the inside of the second bend, the third wiring includes a third special shape (for example, the special shape PL2s shown in Figure 7) in the signal wiring located on the inside of the third bend, and the fourth wiring includes the fourth bend The signal wiring located on the inside includes a fourth special shaped part (for example, the special shaped part PL1s shown in Figure 7), wherein the first special shaped part is a part that adjusts the difference in wiring length between the first signal wiring and the second signal wiring, the second special shaped part is a part that adjusts the difference in wiring length between the third signal wiring and the fourth signal wiring, the third special shaped part is a part that adjusts the difference in wiring length between the fifth signal wiring and the sixth signal wiring, and the fourth special shaped part may be a part that adjusts the difference in wiring length between the seventh signal wiring and the eighth signal wiring.

[0441] With this configuration, the wiring lengths within each pair of wires can be made the same, preventing any discrepancies in signal arrival timing.

[0442] Furthermore, the first substrate may include a plurality of interlayer conductive portions (for example, vias V1 to V3 shown in Figure 7), and the plurality of interlayer conductive portions may be spaced apart from any of the special shaped portions of the first special shaped portion, the second special shaped portion, the third special shaped portion, and the fourth special shaped portion.

[0443] With this configuration, the wiring lengths within a pair of wires are aligned to prevent delays in signal arrival timing, while the characteristic impedance of the signal line is prevented from changing by preventing capacitive coupling through the via conductors.

[0444] Furthermore, the first substrate is configured to have a plurality of conductor layers (for example, the first layer L1 to the sixth layer L6 shown in Figures 7 to 14), and the plurality of conductor layers include a first conductor layer (for example, the first layer L1 shown in Figure 7) and a second conductor layer directly below the first conductor layer (for example, the second layer L2 shown in Figure 13), and the first substrate is capable of mounting a connector (for example, the third connector CN3 shown in Figure 3), and the first conductor layer has at least the first wiring and pads (for example, pads CN3P8 to CN3P13, CN3P15 to CN316, CN3P18 to 23, CN3P25 to CN3P30 shown in Figure 7) that electrically connect the first wiring and the terminals of the connector, and the second conductor layer has at least a GND plane pattern, although the GND plane pattern does not necessarily have to be formed in the locations of the second conductor layer that correspond to the pads of the first conductor layer.

[0445] With this configuration, capacitive coupling occurs between the pad and GND, preventing the signal's characteristic impedance from dropping too low.

[0446] Furthermore, the gaming machine according to this embodiment is a gaming machine capable of playing games, and comprises a first circuit board on which a plurality of signal wires are formed, the plurality of signal wires include a first pair of wires consisting of a first signal wire and a second signal wire, the plurality of signal wires include a second pair of wires consisting of a third signal wire and a fourth signal wire, the first pair of wires has a first special shaped portion on one of the signal wires of the first signal wire and the second signal wire, the second pair of wires has a second special shaped portion on one of the signal wires of the third signal wire and the fourth signal wire, the first special shaped portion is a portion that adjusts the difference in wire length within the pair in the first pair of wires, and the first special shaped portion is The gaming machine is characterized in that, within the pair of the first pair of wiring, the first special-shaped portion is formed on the signal wiring that has a shorter wiring length excluding the first special-shaped portion, the second special-shaped portion is a portion that adjusts the difference in wiring length within the pair of the second pair of wiring, the second special-shaped portion is formed on the signal wiring that has a shorter wiring length excluding the second special-shaped portion within the pair of wiring, the region between the first pair of wiring and the second pair of wiring is defined as the first region, the first region is a region that includes a specific region where the distance between the first pair of wiring and the second pair of wiring is the maximum, and the specific region is a region where the first interlayer conductive portion is provided.

[0447] According to the gaming machine of this embodiment, the wiring lengths within a pair of wires can be aligned to prevent delays in signal arrival timing. This provides a circuit board that suppresses delays in signal arrival timing and distortion of signal waveforms in high-speed signals such as liquid crystal video signals, thereby providing accurate game information at the appropriate timing, preventing players from suffering disadvantages, and preventing a decline in the enjoyment of the game. Furthermore, it is possible to prevent delays in signal transmission timing between different pairs of wires. In addition, capacitive coupling can be prevented by the conductors of the interlayer conductive parts (vias), preventing changes in the characteristic impedance of the signal wiring, enabling stable signal transmission, and preventing malfunctions of the gaming machine.

[0448] Furthermore, the gaming machine according to this embodiment is a gaming machine capable of playing games, and comprises a first circuit board on which a plurality of signal wirings are formed, the plurality of signal wirings include a first pair of wirings consisting of a first signal wiring and a second signal wiring, the plurality of signal wirings include a second pair of wirings consisting of a third signal wiring and a fourth signal wiring, the first pair of wirings has a first special shaped portion on one of the signal wirings of the first signal wiring and the second signal wiring, the second pair of wirings has a second special shaped portion on one of the signal wirings of the third signal wiring and the fourth signal wiring, the first special shaped portion is a portion that adjusts the difference in wiring length within the pair in the first pair of wiring, and the first special shaped portion is a portion that adjusts the difference in wiring length within the pair in the first pair of wiring excluding the first special shaped portion The game machine is characterized in that the second special shaped portion is formed on the signal wire with the shorter wiring length, the second special shaped portion is a portion that adjusts the difference in wiring length within the pair in the second pair of wiring, the second special shaped portion is formed on the signal wire with the shorter wiring length excluding the second special shaped portion within the pair in the second pair of wiring, the first pair of wiring is a wiring formed including the first meander portion in the first signal wiring and the second signal wiring, the region in which the distance between the first pair of wiring and the second pair of wiring is widened by the first meander portion is defined as the first region, the first region is a region in which the first interlayer conductive portion is provided, and the first interlayer conductive portion is not provided in the inner region surrounded by the first meander portion.

[0449] According to the gaming machine of this embodiment, by aligning the wiring lengths within a pair in the paired wiring, it is possible to prevent delays in signal arrival timing. This provides a circuit board that suppresses delays in signal arrival timing and distortion of signal waveforms in high-speed signals such as liquid crystal video signals, thereby providing accurate game information at the appropriate timing, preventing players from suffering disadvantages, and preventing a decline in the enjoyment of the game. Furthermore, it is possible to prevent delays in signal transmission timing between different paired wirings. In addition, by equalizing the lengths of the wirings in the meander section to suppress delays in signal transmission timing, and by preventing capacitive coupling from occurring due to the conductors in the interlayer conductive sections (vias), it is possible to prevent changes in the characteristic impedance of the signal wiring, enabling stable signal transmission and preventing malfunctions of the gaming machine.

[0450] Furthermore, the first special-shaped portion may be formed at one end of the first pair of wiring, and the second special-shaped portion may be formed at one end of the second pair of wiring, and the position of the first special-shaped portion in the direction of output of the first pair of wiring and the position of the second special-shaped portion in the direction of output of the second pair of wiring may be different, and the curvature of the first special-shaped portion and the curvature of the second special-shaped portion may be different.

[0451] Furthermore, the first substrate is capable of mounting a connector, one end of the first pair of wiring includes a first connector connection portion connected to the connector, one end of the second pair of wiring includes a second connector connection portion connected to the connector, the first special-shaped portion is located at the first connector connection portion, the second special-shaped portion is located at the second connector connection portion, and the first special-shaped portion and the second special-shaped portion may be located at different positions in the signal wiring output direction.

[0452] Furthermore, the connector comprises a plurality of terminals, the first substrate comprises a plurality of pads, each pad is capable of mounting one of the plurality of terminals, the plurality of pads includes a first pad and a second pad, the first pair of wiring comprises an outlet portion that narrows the gap between the first signal wiring connected to the first pad and the second signal wiring connected to the second pad, and the outlet portion may be located between the first pad and the second pad and the first special-shaped portion.

[0453] Furthermore, the gaming machine according to this embodiment is a gaming machine capable of playing games, and comprises a first circuit board on which a plurality of wirings are formed, one of the plurality of wirings is a first wiring formed including a first meander section, one of the plurality of wirings is a second wiring formed adjacent to the first wiring, one of the plurality of wirings is a third wiring formed including a second meander section, one of the plurality of wirings is a fourth wiring formed adjacent to the third wiring, and the first meander section provides a gap between the first wiring and the second wiring. The gaming machine is characterized in that the area where the means has expanded is designated as the first area, the area where the distance between the third and fourth wirings has widened due to the second meander portion is designated as the second area, the first area is an area where no interlayer conductive portion is provided, the second area is an area where an interlayer conductive portion is provided, the distance between the third and fourth wirings in the second area is wider than the distance between the first and second wirings in the first area, and the interlayer conductive portion is not provided in the inner area surrounded by the second meander portion.

[0454] According to the gaming machine of this embodiment, the meander section ensures equal lengths of the wiring to suppress timing discrepancies in signal transmission, while preventing a decrease in characteristic impedance due to vias and stabilizing the potential. Furthermore, capacitive coupling is prevented by the conductors of the interlayer conduction sections (vias), thereby preventing changes in the characteristic impedance of the signal wiring, enabling stable signal transmission and preventing malfunctions of the gaming machine.

[0455] Furthermore, the first wiring is a pair of wiring consisting of a first signal wiring and a second signal wiring, the second wiring is a pair of wiring consisting of a third signal wiring and a fourth signal wiring, the third wiring is a pair of wiring consisting of a fifth signal wiring and a sixth signal wiring, the fourth wiring is a pair of wiring consisting of a seventh signal wiring and an eighth signal wiring, the first wiring is wiring that includes at least one bend (hereinafter referred to as the "first bend") from one end to the other, the second wiring is wiring that includes at least one bend (hereinafter referred to as the "second bend") from one end to the other, the third wiring is wiring that includes at least one bend (hereinafter referred to as the "third bend") from one end to the other, the fourth wiring is wiring that includes at least one bend (hereinafter referred to as the "fourth bend") from one end to the other, and the first The wiring is a signal wiring located on the inside at the first bend, which includes a first special-shaped portion; the second wiring is a signal wiring located on the inside at the second bend, which includes a second special-shaped portion; the third wiring is a signal wiring located on the inside at the third bend, which includes a third special-shaped portion; the fourth wiring is a signal wiring located on the inside at the fourth bend, which includes a fourth special-shaped portion; the first special-shaped portion is a portion that adjusts the difference in wiring length between the first signal wiring and the second signal wiring; the second special-shaped portion is a portion that adjusts the difference in wiring length between the third signal wiring and the fourth signal wiring; the third special-shaped portion is a portion that adjusts the difference in wiring length between the fifth signal wiring and the sixth signal wiring; and the fourth special-shaped portion may be a portion that adjusts the difference in wiring length between the seventh signal wiring and the eighth signal wiring.

[0456] Furthermore, the first substrate may include a plurality of interlayer conductive portions, and these plurality of interlayer conductive portions may be spaced apart from any of the special-shaped portions, including the first special-shaped portion, the second special-shaped portion, the third special-shaped portion, and the fourth special-shaped portion.

[0457] Furthermore, the first substrate is configured to have a plurality of conductor layers, the plurality of conductor layers including a first conductor layer and a second conductor layer directly beneath the first conductor layer, the first substrate is capable of mounting a connector, the first conductor layer has at least the first wiring and pads that electrically connect the first wiring and the terminals of the connector, the second conductor layer has at least a GND plane pattern, and the GND plane pattern may not be formed in the area of ​​the second conductor layer corresponding to the pad of the first conductor layer.

[0458] Furthermore, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and the gaming machine comprises a first circuit board (for example, the liquid crystal connection circuit board 500a shown in Figure 7), the first circuit board is a circuit board on which a first signal wiring (for example, the first differential pair wiring PL1 shown in Figure 11) is formed, the first circuit board is a circuit board on which a second signal wiring (for example, the second differential pair wiring PL2 shown in Figure 11) is formed, and the second signal wiring is formed including a meander section (for example, the meander section PL2b shown in Figure 11) The game machine is characterized in that it is a signal wiring, and the first substrate is a substrate in which a first interlayer conductive portion (for example, vias V1 to V3 shown in Figure 11) is provided in a specific region (for example, specific region SR3 shown in Figure 11) that includes the location where the distance between the first signal wiring and the second signal wiring is maximized by the meander portion, and the first interlayer conductive portion is provided on one side in the width direction of the first signal wiring, and on the other side in the width direction of the first signal wiring, there is no interlayer conductive portion provided at a position symmetrical to the first interlayer conductive portion with respect to the first signal wiring.

[0459] Furthermore, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and the gaming machine comprises a first circuit board (for example, the liquid crystal connection circuit board 500a shown in Figure 7), the first circuit board is a circuit board on which a first signal wiring (for example, the first differential pair wiring PL1 shown in Figure 11) is formed, the first circuit board is a circuit board on which a second signal wiring (for example, the second differential pair wiring PL2 shown in Figure 11) is formed, and the second signal wiring is formed including a meander section (for example, the meander section PL2b shown in Figure 11) The game machine is characterized in that it is a signal wiring, and the first substrate is a substrate in which a first interlayer conductive portion (for example, vias V1 to V3 shown in Figure 11) is provided in a specific region (for example, specific region SR3 shown in Figure 11) that includes the location where the distance between the first signal wiring and the second signal wiring is maximized by the meander portion, and the first interlayer conductive portion is provided on one side in the width direction of the second signal wiring, and on the other side in the width direction of the second signal wiring, there is no interlayer conductive portion provided at a position symmetrical to the first interlayer conductive portion with respect to the second signal wiring.

[0460] According to the gaming machine of this embodiment, by making the lengths of the wirings equal in the meander section, it is possible to suppress the timing difference of signal transmission, and by preventing capacitive coupling from occurring due to the conductors of the interlayer conductive sections (vias), it is possible to prevent changes in the characteristic impedance of the signal wiring, thereby enabling stable signal transmission and preventing malfunctions of the gaming machine. Furthermore, compared to the case where interlayer conductive sections are provided on both sides in the width direction of the signal wiring, it is possible to suppress excessive capacitive coupling between the signal wiring and the interlayer conductive sections.

[0461] Furthermore, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and the gaming machine comprises a first circuit board (for example, the liquid crystal connection circuit board 500a shown in Figure 7), the first circuit board is a circuit board on which a first signal wiring (for example, the first differential pair wiring PL1 shown in Figure 11) is formed, the first circuit board is a circuit board on which a second signal wiring (for example, the second differential pair wiring PL2 shown in Figure 11) is formed, the second signal wiring is a signal wiring formed including a meander section (for example, the meander section PL2b shown in Figure 11), and the first circuit board is The game machine is characterized in that a first interlayer conductive portion (for example, vias V1 to V3 shown in Figure 11) is provided in a specific region (for example, specific region SR3 shown in Figure 11) where the distance between the first signal wiring and the second signal wiring is widened by the meander portion, the first interlayer conductive portion is not provided in the inner region surrounded by the meander portion, the first interlayer conductive portion is provided on one side in the width direction of the first signal wiring, and on the other side in the width direction of the first signal wiring, there is no interlayer conductive portion provided at a position symmetrical to the first interlayer conductive portion with respect to the first signal wiring.

[0462] Furthermore, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and the gaming machine comprises a first circuit board (for example, the liquid crystal connection circuit board 500a shown in Figure 7), the first circuit board is a circuit board on which a first signal wiring (for example, the first differential pair wiring PL1 shown in Figure 11) is formed, the first circuit board is a circuit board on which a second signal wiring (for example, the second differential pair wiring PL2 shown in Figure 11) is formed, the second signal wiring is a signal wiring formed including a meander section (for example, the meander section PL2b shown in Figure 11), and the first circuit board is The game machine is characterized in that a first interlayer conductive portion (for example, vias V1 to V3 shown in Figure 11) is provided in a specific region (for example, specific region SR3 shown in Figure 11) where the distance between the first signal wiring and the second signal wiring is widened by the meander portion, the first interlayer conductive portion is not provided in the inner region surrounded by the meander portion, the first interlayer conductive portion is provided on one side in the width direction of the second signal wiring, and on the other side in the width direction of the second signal wiring, there is no interlayer conductive portion provided at a symmetrical position with respect to the second signal wiring of the first interlayer conductive portion.

[0463] According to the gaming machine of this embodiment, by making the lengths of the wirings equal in the meander section, it is possible to suppress the timing difference of signal transmission, and by preventing capacitive coupling from occurring due to the conductors of the interlayer conductive sections (vias), it is possible to prevent changes in the characteristic impedance of the signal wiring, thereby enabling stable signal transmission and preventing malfunctions of the gaming machine. Furthermore, compared to the case where interlayer conductive sections are provided on both sides in the width direction of the signal wiring, it is possible to suppress excessive capacitive coupling between the signal wiring and the interlayer conductive sections.

[0464] Furthermore, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and the gaming machine comprises a first circuit board (for example, the liquid crystal connection circuit board 500a shown in Figure 7), the first circuit board is a circuit board on which a first signal wiring (for example, the differential pair wiring PL55 shown in Figure 12) is formed, the first circuit board is a circuit board on which a second signal wiring (for example, the differential pair wiring PL54 shown in Figure 12) is formed, and the second signal wiring has a meander section (for example, the meander section P shown in Figure 12) The game machine is characterized in that the signal wiring is formed including L54a), the first substrate is a substrate in which a first interlayer conductive portion (for example, via V58 shown in Figure 12) is provided in a specific region (for example, specific region SR4 shown in Figure 12) that includes the location where the distance between the first signal wiring and the second signal wiring is maximized by the meander portion, the first interlayer conductive portion is provided on one end side of the first signal wiring, and the first interlayer conductive portion is provided on one end side of the second signal wiring.

[0465] According to the gaming machine of this embodiment, by making the lengths of the wires equal in the meander section, the timing difference in signal transmission can be suppressed, and capacitive coupling can be prevented by the conductor of the interlayer conductive section (via), thereby preventing changes in the characteristic impedance of the signal wiring, stable signal transmission can be achieved, and malfunctions of the gaming machine can be prevented. In addition, the ends of the wiring and connection points with other components are points of change in specific impedance, and by providing the interlayer conductive section in the vicinity of these points and concentrating the points of change in characteristic impedance, the number of locations that are points of change in characteristic impedance can be reduced, signal waveform distortion can be reduced, stable signal transmission can be achieved, and the frequency of communication errors can be reduced.

[0466] Furthermore, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and the gaming machine comprises a first circuit board (for example, the liquid crystal connection circuit board 500a shown in Figure 7), the first circuit board is a circuit board on which a first signal wiring (for example, the differential pair wiring PL55 shown in Figure 12) is formed, the first circuit board is a circuit board on which a second signal wiring (for example, the differential pair wiring PL54 shown in Figure 12) is formed, and the second signal wiring is a signal wiring formed including a meander section (for example, the meander section PL54a shown in Figure 12) The first circuit board is a circuit board in which a first interlayer conductive portion (for example, via V58 shown in Figure 12) is provided in a specific region (for example, specific region SR4 shown in Figure 12) where the spacing between the first signal wiring and the second signal wiring is widened by the meander portion, the first interlayer conductive portion is not provided in the inner region surrounded by the meander portion, the first interlayer conductive portion is provided on one end side of the first signal wiring, and the first interlayer conductive portion is provided on one end side of the second signal wiring, characterized in that the first circuit board is a circuit board in which a first interlayer conductive portion (for example, via V58 shown in Figure 12) is provided in a specific region (for example, specific region SR4 shown in Figure 12) where the spacing between the first signal wiring and the second signal wiring is widened by the meander portion, the first interlayer conductive portion is provided on one end side of the first signal wiring, and the first interlayer conductive portion is provided on one end side of the second signal wiring.

[0467] According to the gaming machine of this embodiment, by making the lengths of the wires equal in the meander section, the timing difference in signal transmission can be suppressed, and capacitive coupling can be prevented by the conductor of the interlayer conductive section (via), thereby preventing changes in the characteristic impedance of the signal wiring, stable signal transmission can be achieved, and malfunctions of the gaming machine can be prevented. In addition, the ends of the wiring and connection points with other components are points of change in specific impedance, and by providing the interlayer conductive section in the vicinity of these points and concentrating the points of change in characteristic impedance, the number of locations that are points of change in characteristic impedance can be reduced, signal waveform distortion can be reduced, stable signal transmission can be achieved, and the frequency of communication errors can be reduced.

[0468] Furthermore, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and the gaming machine comprises a first circuit board (for example, the liquid crystal connection circuit board 500a shown in Figure 7), the first circuit board is a circuit board on which a first signal wiring (for example, the first differential pair wiring PL1 shown in Figure 11) is formed, the first circuit board is a circuit board on which a second signal wiring (for example, the second differential pair wiring PL2 shown in Figure 11) is formed, the second signal wiring is a signal wiring formed including a meander section (for example, the meander section PL2b shown in Figure 11), and the first circuit board is connected to the first signal wiring and the second signal wiring by the meander section The game machine is characterized in that it is a circuit board having a specific region (for example, a specific region SR3 shown in Figure 11) that includes the location where the distance from the signal wiring is greatest, the first circuit board is a circuit board provided with a first interlayer conductive portion (for example, via V1 shown in Figure 11), the first circuit board is a circuit board provided with a second interlayer conductive portion (for example, via V2 shown in Figure 11), the first interlayer conductive portion is provided in the specific region, the second interlayer conductive portion is provided alongside the first interlayer conductive portion at a predetermined distance, and the first circuit board is a circuit board in which the first interlayer conductive portion and the second interlayer conductive portion are provided along the first signal wiring.

[0469] Furthermore, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and the gaming machine comprises a first circuit board (for example, the liquid crystal connection circuit board 500a shown in Figure 7), the first circuit board is a circuit board on which a first signal wiring (for example, the first differential pair wiring PL1 shown in Figure 11) is formed, the first circuit board is a circuit board on which a second signal wiring (for example, the second differential pair wiring PL2 shown in Figure 11) is formed, the second signal wiring is a signal wiring formed including a meander portion (for example, the meander portion PL2b shown in Figure 11), and the first circuit board has a specific region where the spacing between the first signal wiring and the second signal wiring is widened by the meander portion. For example, the gaming machine is characterized in that it is a substrate having a specific region SR3) as shown in Figure 11, the first substrate is a substrate provided with a first interlayer conductive portion (for example, via V1 as shown in Figure 11), the first substrate is a substrate provided with a second interlayer conductive portion (for example, via V2 as shown in Figure 11), the first interlayer conductive portion is provided in the specific region, the first interlayer conductive portion is not provided in the inner region surrounded by the meander portion, the second interlayer conductive portion is provided alongside the first interlayer conductive portion at a predetermined distance, and the first substrate is a substrate in which the first interlayer conductive portion and the second interlayer conductive portion are provided along the first signal wiring.

[0470] According to the gaming machine of this embodiment, by making the lengths of the wirings equal in the meander section, the timing difference in signal transmission can be suppressed, and capacitive coupling can be prevented by the conductors of the interlayer conductive sections (vias), thereby preventing changes in the characteristic impedance of the signal wiring, stable signal transmission can be achieved, and malfunctions of the gaming machine can be prevented. Furthermore, when multiple interlayer conductive sections are provided in the spacing region of adjacent signal wiring, the change in characteristic impedance can be made uniform by making the distance between the multiple interlayer conductive sections and the signal wiring uniform.

[0471] Furthermore, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and the gaming machine comprises a first circuit board (for example, the liquid crystal connection circuit board 500a shown in Figure 7), the first circuit board is a circuit board on which a first signal wiring (for example, the fifth differential pair wiring PL5 shown in Figure 9) is formed, the first circuit board is a circuit board on which a second signal wiring (for example, the fourth differential pair wiring PL4 shown in Figure 9) is formed, the second signal wiring is a signal wiring formed including a meander section (for example, the meander section PL4b shown in Figure 9), and the first circuit board is connected to the first signal wiring and the second signal by the meander section The gaming machine is characterized in that a first interlayer conductive portion (for example, via V5 shown in Figure 9) is provided in a specific region (for example, specific region SR1 shown in Figure 9) that includes the location where the gap with the wiring is greatest, the first substrate is a substrate in which a second interlayer conductive portion (for example, via V7 shown in Figure 9) is provided at a position opposite the first interlayer conductive portion with the first signal wiring in between, the distance from the first interlayer conductive portion to the first signal wiring is a first distance (for example, distance L57 shown in Figure 9), and the distance from the second interlayer conductive portion to the first signal wiring is the first distance (for example, distance L75 = distance L57 shown in Figure 9).

[0472] The first interlayer conductive portion may be an interlayer conductive portion provided within a predetermined range with respect to the first signal wiring, and the second interlayer conductive portion may be an interlayer conductive portion provided within the predetermined range with respect to the first signal wiring.

[0473] Furthermore, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and the gaming machine comprises a first circuit board (for example, the liquid crystal connection circuit board 500a shown in Figure 7), the first circuit board is a circuit board on which a first signal wiring (for example, the differential pair wiring PL55 shown in Figure 12) is formed, the first circuit board is a circuit board on which a second signal wiring (for example, the differential pair wiring PL54 shown in Figure 12) is formed, the second signal wiring is a signal wiring formed including a meander section (for example, the meander section PL54a shown in Figure 12), and the first circuit board is connected to the first signal wiring and the second signal wiring by the meander section The gaming machine is characterized in that a first interlayer conductive portion (for example, via V58 shown in Figure 12) is provided in a specific region (for example, specific region SR4 shown in Figure 12) that includes the location where the spacing between the layers is maximum, the first substrate is a substrate in which a second interlayer conductive portion (for example, via V59 shown in Figure 12) is provided at a position opposite to the first interlayer conductive portion with the second signal wiring in between, the distance from the first interlayer conductive portion to the second signal wiring is a first distance (for example, distance L58 ​​shown in Figure 12), and the distance from the second interlayer conductive portion to the second signal wiring is the first distance (for example, distance L59 = distance L58 ​​shown in Figure 12).

[0474] The first interlayer conductive portion may be an interlayer conductive portion provided within a predetermined range with respect to the second signal wiring, and the second interlayer conductive portion may be an interlayer conductive portion provided within the predetermined range with respect to the second signal wiring.

[0475] Furthermore, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and the gaming machine comprises a first circuit board (for example, the liquid crystal connection circuit board 500a shown in Figure 7), the first circuit board is a circuit board on which a first signal wiring (for example, the fifth differential pair wiring PL5 shown in Figure 9) is formed, the first circuit board is a circuit board on which a second signal wiring (for example, the fourth differential pair wiring PL4 shown in Figure 9) is formed, the second signal wiring is a signal wiring formed including a meander section (for example, the meander section PL4b shown in Figure 9), and the first circuit board has a specific region (e.g., For example, a game machine characterized in that a first interlayer conductive portion (for example, via V5 shown in Figure 9) is provided in a specific region SR1) shown in Figure 9, the first interlayer conductive portion is not provided in the inner region surrounded by the meander portion, the first substrate is a substrate in which a second interlayer conductive portion (for example, via V7 shown in Figure 9) is provided at a position opposite the first interlayer conductive portion with the first signal wiring in between, the distance from the first interlayer conductive portion to the first signal wiring is the first distance (for example, distance L57 shown in Figure 9), and the distance from the second interlayer conductive portion to the first signal wiring is the first distance (for example, distance L75 = distance L57 shown in Figure 9).

[0476] The first interlayer conductive portion may be an interlayer conductive portion provided within a predetermined range with respect to the first signal wiring, and the second interlayer conductive portion may be an interlayer conductive portion provided within the predetermined range with respect to the first signal wiring.

[0477] Furthermore, the gaming machine according to this embodiment (for example, the slot machine 100 shown in Figure 1) is a gaming machine capable of playing games, and the gaming machine comprises a first circuit board (for example, the liquid crystal connection circuit board 500a shown in Figure 7), the first circuit board is a circuit board on which a first signal wiring (for example, the differential pair wiring PL55 shown in Figure 12) is formed, the first circuit board is a circuit board on which a second signal wiring (for example, the differential pair wiring PL54 shown in Figure 12) is formed, the second signal wiring is a signal wiring formed including a meander section (for example, the meander section PL54a shown in Figure 12), and the first circuit board has a specific region where the spacing between the first signal wiring and the second signal wiring is widened by the meander section (for example, The gaming machine is characterized in that a first interlayer conductive portion (for example, via V58 shown in Figure 12) is provided in a specific region SR4) shown in Figure 12, the first interlayer conductive portion is not provided in the inner region surrounded by the meander portion, the first substrate is provided with a second interlayer conductive portion (for example, via V59 shown in Figure 12) at a position opposite the first interlayer conductive portion with the second signal wiring in between, the distance from the first interlayer conductive portion to the second signal wiring is a first distance (for example, distance L58 ​​shown in Figure 12), and the distance from the second interlayer conductive portion to the second signal wiring is the first distance (for example, distanc...

Claims

1. A gaming machine that is capable of being played, The aforementioned gaming machine is equipped with a first circuit board, The first substrate is a substrate on which the first signal wiring is formed. The first substrate is a substrate on which the second signal wiring is formed. The second signal wiring is a signal wiring formed including a meander section, The first substrate is a substrate in which a first interlayer conductive portion is provided in a specific region including the location where the distance between the first signal wiring and the second signal wiring is maximized by the meander portion, The first interlayer conductive portion is provided on one side in the width direction of the first signal wiring, On the other side in the width direction of the first signal wiring, there is no interlayer conductive portion provided at a position symmetrical to the first interlayer conductive portion with respect to the first signal wiring. A gaming machine characterized by the following features.

2. A gaming machine that is capable of being played, The aforementioned gaming machine is equipped with a first circuit board, The first substrate is a substrate on which the first signal wiring is formed. The first substrate is a substrate on which the second signal wiring is formed. The second signal wiring is a signal wiring formed including a meander section, The first substrate is a substrate in which a first interlayer conductive portion is provided in a specific region including the location where the distance between the first signal wiring and the second signal wiring is maximized by the meander portion, The first interlayer conductive portion is provided on one side in the width direction of the second signal wiring, On the other side in the width direction of the second signal wiring, there is no interlayer conductive portion provided at a position symmetrical to the first interlayer conductive portion with respect to the second signal wiring. A gaming machine characterized by the following features.

3. A gaming machine according to claim 1 or 2, The first substrate is a substrate on which the first layer is formed, The first substrate is a substrate on which a second layer is formed. The first layer is a layer on which the first signal wiring and the second signal wiring are formed. The second layer is a layer in which a ground plane is formed in the region corresponding to the first signal wiring and the second signal wiring. A gaming machine characterized by the following features.

4. The gaming machine according to claim 3, The first layer is a layer in which no ground plane is formed in a predetermined region including the specific region. The first substrate is a substrate in which a predetermined interlayer conductive portion is provided in the predetermined region, The first interlayer conductive portion is a ground via, The aforementioned predetermined interlayer conductive portion is a via that connects wiring in different layers. The second layer is a layer in which the ground plane is not formed in the region corresponding to the predetermined interlayer conductive portion. A gaming machine characterized by the following features.

5. A gaming machine according to claim 1 or 2, The first substrate is a substrate on which the first layer is formed, The first substrate is a substrate on which a second layer is formed. The first layer is a layer on which the first signal wiring and the second signal wiring are formed. The second layer is a layer in which no signal wiring is formed in the region corresponding to the first signal wiring and the second signal wiring. A gaming machine characterized by the following features.

6. A gaming machine according to claim 1 or 2, The first substrate is a substrate on which the first layer is formed, The first layer is a layer on which the first signal wiring and the second signal wiring are formed. The first layer is a layer in which no ground plane is formed in a predetermined region including the specific region. A gaming machine characterized by the following features.

7. The gaming machine according to claim 6, The first substrate is a substrate in which an interlayer conductive portion is provided in the predetermined region, The first interlayer conductive portion is a ground via, The aforementioned interlayer conductive portion is a ground via, The aforementioned interlayer conductive portion has the same or substantially the same diameter as the first interlayer conductive portion. A gaming machine characterized by the following features.

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