Semiconductor device, method for manufacturing a semiconductor device, and power conversion device

Abstract

The objective is to provide a semiconductor device and a method for manufacturing a semiconductor device that can suppress the increase in thermal resistance of the semiconductor device and suppress the decrease in heat dissipation performance by suppressing the generation of resin burrs at the interface between the lower surface of the die pad and the heat dissipation material. [Solution] The semiconductor device 1 according to the present disclosure comprises a heat sink 50, a flexible heat dissipation material 40 provided on the upper surface of the heat sink 50, a lead member 10 having a die pad portion 11DP provided on the upper surface of the heat dissipation material, a semiconductor element 20 provided on the upper surface of the die pad portion, and a mold resin 30 that seals at least the heat dissipation material 40, the die pad portion 11DP, and the semiconductor element 20, wherein the die pad portion 11DP has a notch 111 on its outer peripheral portion 110.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device, a method for manufacturing a semiconductor device, and a power conversion device.

Background Art

[0002] Conventionally, there has been disclosed a resin-sealed semiconductor device in which a semiconductor element is placed on a die pad portion of a lead member and the semiconductor element etc. are sealed with resin (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In a resin-sealed semiconductor device, there are cases where a die pad portion is placed on the upper surface of a heat dissipation material such as a flexible heat dissipation sheet, and the semiconductor element, the die pad portion, the heat dissipation material, etc. are sealed with resin. In such a case, when the die pad portion is placed on the upper surface of the flexible heat dissipation material, a gap is generated between the lower surface of the die pad portion and the heat dissipation material. In that state, when the die pad portion and the heat dissipation material are sealed with resin, the resin enters the gap generated between the die pad portion and the heat dissipation material. As a result, resin burrs are generated at the interface between the lower surface of the die pad portion and the heat dissipation material, and there has been a problem that the thermal resistance of the semiconductor device increases due to the generated resin burrs and the heat dissipation performance deteriorates. [[ID=3!6]]

[0005] <0000(128>The present disclosure has been made to solve the above problems, and an object thereof is to provide a semiconductor device and a method for manufacturing a semiconductor device that can suppress an increase in the thermal resistance of the semiconductor device and suppress a decrease in the heat dissipation performance by suppressing the generation of resin burrs at the interface between the lower surface of the die pad portion and the heat dissipation material.

Means for Solving the Problems

[0006] The semiconductor device according to this disclosure comprises a heat sink, a flexible heat dissipation material provided on the upper surface of the heat sink, a lead member having a die pad portion provided on the upper surface of the heat dissipation material, a semiconductor element provided on the upper surface of the die pad portion, and a molding resin that seals at least the heat dissipation material, the die pad portion, and the semiconductor element, wherein the die pad portion has a notch on its outer circumference.

[0007] The method for manufacturing a semiconductor device according to this disclosure comprises: a heat dissipation material preparation step of placing a heat dissipation material on the upper surface of a heat sink; a lead member preparation step of forming a notch on the outer circumference of the die pad portion of a lead member and placing the die pad portion with the notch on the upper surface of the heat dissipation material; a semiconductor element preparation step of placing a semiconductor element on the upper surface of the die pad portion; and a resin sealing step of sealing at least the heat dissipation material, the die pad portion, and the semiconductor element with a resin. [Effects of the Invention]

[0008] The semiconductor device and method for manufacturing a semiconductor device according to this disclosure can suppress the increase in thermal resistance of the semiconductor device and the decrease in heat dissipation performance by suppressing the generation of resin burrs at the interface between the lower surface of the die pad and the heat dissipation material. [Brief explanation of the drawing]

[0009] [Figure 1] This is a schematic plan view of the semiconductor device according to Embodiment 1. [Figure 2] This is a cross-sectional view taken along line A-A in Figure 1 of the semiconductor device according to Embodiment 1. [Figure 3] This is an enlarged view of region A in Figure 2 of the semiconductor device according to Embodiment 1. [Figure 4] This is a schematic plan view of the semiconductor device according to Embodiment 1. [Figure 5] This is a schematic cross-sectional view of a semiconductor device relating to the prior art. [Figure 6]This is an enlarged view of region A in Figure 5 of a conventional semiconductor device. [Figure 7] This is a schematic cross-sectional view showing the resin encapsulation step of the semiconductor device manufacturing method according to Embodiment 1. [Figure 8] This is a schematic cross-sectional view showing the resin encapsulation step of the semiconductor device manufacturing method according to Embodiment 1. [Figure 9] This is an enlarged view of region A in Figure 8 of the method for manufacturing a semiconductor device according to Embodiment 1. [Figure 10] This is a schematic plan view showing the resin encapsulation step of the semiconductor device manufacturing method according to Embodiment 1. [Figure 11] This is a schematic cross-sectional view of a semiconductor device according to a modified example 1 of Embodiment 1. [Figure 12] This is a schematic plan view of a semiconductor device according to a modified example 1 of Embodiment 1. [Figure 13] This is a schematic cross-sectional view of a semiconductor device according to a modified example 2 of Embodiment 1. [Figure 14] This is a block diagram showing the configuration of a power conversion system to which the power conversion device according to Embodiment 2 is applied. [Modes for carrying out the invention]

[0010] In semiconductor devices, one side parallel to the depth direction is referred to as "upper," and the other side as "lower." Of the two main surfaces of a substrate, layer, or other component, one surface is referred to as the upper surface, and the other surface as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the direction in which the semiconductor device is mounted.

[0011] Furthermore, for the sake of convenience, in the following explanation, the width direction of the semiconductor device will be described as the X-axis direction, the depth direction of the semiconductor device intersecting the X-axis direction will be described as the Y-axis direction, and the thickness direction or height direction of the semiconductor device, that is, the direction normal to the XY plane, will be described as the Z-axis direction.

[0012] Also, the drawings are shown schematically, and the mutual relationships of the sizes and positions of the images shown in different drawings are not necessarily accurately described and can be changed as appropriate. Also, in the following description, the same reference numerals are used to illustrate the same components, and their names and functions are also the same. Therefore, detailed descriptions thereof may be omitted.

[0013] Embodiment 1. Embodiment 1 will be described below with reference to the drawings. FIG. 1 is a schematic plan view of a semiconductor device 1 according to Embodiment 1. FIG. 2 is a schematic cross-sectional view of the semiconductor device 1 according to Embodiment 1. Note that FIG. 2 shows a cross-section taken along the dashed-dotted line A - A shown in FIG. 1. FIG. 3 is an enlarged view of the region A in FIG. 2. FIG. 4 is a schematic plan view showing the periphery of the die pad portion 11DP of the power lead terminal 11 among the lead members 10 included in the semiconductor device 1 according to Embodiment 1.

[0014] The configuration of the semiconductor device 1 will be described using FIGS. 1 to 4. As shown in FIGS. 1 to 4, the semiconductor device 1 includes a lead member 10, a semiconductor element 20, a mold resin 30, a heat dissipation material 40, and a heat sink 50.

[0015] The lead member 10 has a die pad portion 11DP provided on the upper surface of a heat dissipation material 40 described later. Note that the lead member 10 is originally a member formed as a lead frame. That is, the lead member 10 is a conductive member in which a flat plate-shaped member is partially bent. The lead member 10 includes a power lead terminal 11 and an integrated circuit lead terminal 12 as lead terminals. In some cases, these may be simply described as lead terminal 11 and lead terminal 12 below. A plurality of each of the power lead terminal 11 and the integrated circuit lead terminal 12 are provided in a single semiconductor device 1. Further, the semiconductor element 20 is a member placed on the lead member 10. The semiconductor element 20 includes a power semiconductor element 21 and an integrated circuit element 22. Note that the power semiconductor element 21 is a semiconductor chip on which a high-power semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor) is mounted. The integrated circuit element 22 is a semiconductor chip on which an element having a function of driving an IGBT, such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), is mounted. Further, the semiconductor element 20 may be made of silicon (Si), but is not limited to silicon, and may be made of a wide bandgap semiconductor material such as silicon carbide (SiC), gallium nitride (GaN), or diamond (C). Further, the power semiconductor element 21 and the power lead terminal 11 are electrically connected by a wire W1 which is a thin wire-shaped conductive member. The wire W1 may be made of aluminum (Al), but is not limited to aluminum, and may be made of, for example, an aluminum alloy containing a trace amount of an additive such as iron (Fe) or copper (Cu) as long as it is a metal having a high conductivity. Further, the wires W2 and W3 described later may be made of a metal such as gold (Au), silver (Ag), copper (Cu), or a copper alloy.

[0016] The molding resin 30 is a component that seals at least the semiconductor element 20, the heat dissipation material 40 (described later), and the die pad portion 11DP (described later). The molding resin 30 is composed of, for example, an insulating resin such as epoxy resin, phenolic resin, silicon resin, or polyimide resin, or an insulating composite material in which a filler is dispersed in any of these resins.

[0017] Both the power lead terminal 11 and the integrated circuit lead terminal 12 extend from the inside to the outside of the molded resin 30. Specifically, the power lead terminal 11 has an inner lead portion 11IL located inside the molded resin 30 and an outer lead portion 11OL located outside the molded resin 30. Similarly, the integrated circuit lead terminal 12 has an inner lead portion 12IL located inside the molded resin 30 and an outer lead portion 12OL located outside the molded resin 30.

[0018] The inner lead portion 11IL of the power lead terminal 11 has a die pad portion 11DP and a stepped portion 11SP formed thereon. A power semiconductor element 21 is placed on the upper surface of the die pad portion 11DP of the lead member 10. Specifically, the die pad portion 11DP is arranged to have a surface that generally follows the XY plane. The power semiconductor element 21 is bonded to the upper surface of the die pad portion 11DP via a bonding layer 60a. The bonding layer 60a may be made of solder, for example, or a sintered material such as silver paste. The die pad portion 11DP also has a notch 111 on its outer periphery 110. In this embodiment, the notch 111 is provided on the upper surface of the outer periphery 110. In this embodiment, the notch 111 is a sloped portion 111A provided such that the plate thickness decreases towards the end of the outer periphery 110. As shown in Figure 4, in plan view, the die pad portion 11DP is rectangular, and in plan view, it is desirable that the notches 111 be provided on three sides of the outer periphery 110 that are not connected to the stepped portion 11SP. However, it is sufficient that the notches 111 be provided on at least a part of the outer periphery 110 of the die pad portion 11DP. For example, in plan view, they may be provided on the entire side of the outer periphery 110 of the die pad portion 11DP, or they may be provided on substantially the entire side of the outer periphery 110 of the die pad portion 11DP, and there may be parts of one side where the notches 111 are not provided.

[0019] The inner lead portion 12IL of the integrated circuit lead terminal 12 includes a die pad portion 12DP. An integrated circuit element 22 is placed on the upper surface of the die pad portion 12DP of the lead member 10. Specifically, the die pad portion 12DP is arranged to have a surface that generally follows the XY plane. The integrated circuit element 22 is bonded to the upper surface of the die pad portion 12DP via a bonding layer 60b. The bonding layer 60b may be made of, for example, solder, or a sintered material such as silver paste. Thus, each of the multiple lead terminals 11 has a die pad portion 11DP on which a power semiconductor element 21 is placed. Each of the multiple lead terminals 12 has a die pad portion 12DP on which an integrated circuit element 22 is placed. Furthermore, the integrated circuit element 22 and the integrated circuit lead terminal 12 are electrically connected by a wire W2, which is a thin conductive member. Furthermore, the integrated circuit element 22 and the power semiconductor element 21 are electrically connected by a wire W3, which is a thin conductive member.

[0020] The die pad portion 11DP of the inner lead portion 11IL is positioned lower (downward in the Z-axis direction) than the die pad portion 12DP of the inner lead portion 12IL in Figure 2, that is, on the side where the heat sink 50, which will be described later, is located. A relatively low voltage is applied to the integrated circuit lead terminal 12, or it is grounded. In contrast, a higher voltage is applied to the power lead terminal 11 than to the integrated circuit lead terminal 12. Therefore, by using the above configuration, the distance between the power lead terminal 11 and the integrated circuit lead terminal 12 can be increased. This suppresses short circuits between the lead terminal 11 and the lead terminal 12 and improves the insulation between them. In addition, a higher voltage can be applied to the power lead terminal 11.

[0021] However, a configuration may be applied in which the die pad portion 11DP of the inner lead portion 11IL and the die pad portion 12DP of the inner lead portion 12IL are positioned at approximately the same height in the Z-axis direction. In this way, the process of bending the power lead terminal 11 to create a stepped portion 11SP can be eliminated, and thus cost reduction can be expected.

[0022] The outer lead portion 11OL of the multiple power lead terminals 11 has a root portion 11A, a tip portion 11B, and a conversion portion 11C. The root portion 11A is the side of the outer lead portion 11OL that is closest to the inner lead portion 11IL. In other words, the root portion 11A is located on the outside of the molded resin 30, on the side where the power semiconductor element 21 is placed, that is, on the side closer to the inner lead portion 11OL in terms of its extending direction. The root portion 11A extends so as to be in contact with the outermost part of the molded resin 30, that is, with the molded resin 30 as its base. The root portion 11A extends in a direction that protrudes from the molded resin 30, that is, in a direction that is exposed to the outside of the molded resin 30 in a plan view. As shown in Figure 2, the power lead terminal 11 has a plane at the stepped portion 11SP that is inclined with respect to the upper surface (XY plane) of the die pad portion 11DP. However, on both sides of the stepped portion 11SP, i.e., the left side (negative X-axis direction) and the right side (positive X-axis direction) in Figure 2, the power lead terminal 11 has a plane that is aligned with the upper surface (XY plane) of the die pad portion 11DP. In other words, the region adjacent to the power semiconductor element 21 on the opposite side of the stepped portion 11SP (the region adjacent to the outside in a plan view) extends from the inside to the outside of the molded resin 30 without bending. The region outside the molded resin 30 is the base portion 11A.

[0023] Because the power lead terminal 11 has a stepped portion 11SP, the positions of the inner lead portion 11IL, particularly the die pad portion 11DP, and the base portion 11A of the outer lead portion 11OL are different in terms of the Z-axis direction. Specifically, each of the multiple power lead terminals 11 has a stepped portion 11SP between the die pad portion 11DP and the base portion 11A in the inner lead portion 11IL inside the molded resin 30. Each of the multiple power lead terminals 11 is bent at the stepped portion 11SP. Due to the bending of the multiple power lead terminals 11, in Figure 2, the die pad portion 11DP is positioned lower than the base portion 11A, on the opposite side from the tip portion 11B (described later) as viewed from the base portion 11A, i.e., at a lower position in Figure 2. The die pad portion 11DP is positioned lower in the Z-axis direction, i.e., on the negative Z-axis direction, than the base portion 11A. This allows for a longer creepage distance between the die pad portion 11DP and the root portion 11A compared to the case where the positions of the die pad portion 11DP and the root portion 11A in the Z-axis direction are approximately equal. As a result, the insulation performance between the outer lead portion 11OL and other components that come into contact with the die pad portion 11DP, such as the heat sink 50, which will be described later, is improved.

[0024] The tip portion 11B is located on the opposite side of the die pad portion 11DP from the root portion 11A of the outer lead portion 11OL, where the power semiconductor element 21 is placed. The tip portion 11B is the side of the outer lead portion 11OL that is further from the inner lead portion 11IL than from the root portion 11A. In Figure 2, the tip portion 11B has a plane that is roughly aligned with the YZ plane. In other words, the tip portion 11B extends in a different direction from the root portion 11A. The conversion portion 11C is the part where the direction of extension of the tip portion 11B and the root portion 11A is changed. The conversion portion 11C is a bent portion of the outer lead portion 11OL located at the boundary between the root portion 11A and the tip portion 11B, where the direction of extension of the outer lead portion 11OL is changed. The root portion 11A is located on the inner lead portion 11IL side of the outer lead portion 11OL, and on the side where the power semiconductor element 21 is placed. Conversely, of the outer lead portion 11OL, the tip portion 11B is located on the opposite side of the region where the power semiconductor element 21 is mounted relative to the root portion 11A, rather than the conversion portion 11C. In other words, the tip portion 11B extends in a direction different from the direction along the XY plane in which the root portion 11A extends, that is, for example, along the Z-axis direction, and is located on the opposite side of the region where the power semiconductor element 21 is mounted relative to the root portion 11A.

[0025] The outer lead portion 12OL of the multiple integrated circuit lead terminals 12 has a root portion 12A, a tip portion 12B, and a conversion portion 12C. The root portion 12A is the side of the outer lead portion 12OL that is closest to the inner lead portion 12IL. In other words, the root portion 12A is located on the outside of the molded resin 30, on the side where the integrated circuit element 22 is placed, i.e., on the inner lead portion 12IL side. The root portion 12A extends so as to be in contact with the outermost part of the molded resin 30, that is, with the molded resin 30 as its base. The root portion 12A extends in a direction that protrudes from the molded resin 30, that is, in a direction toward the outside of the molded resin 30 in a plan view. As shown in Figure 2, the integrated circuit lead terminal 12 has a region that has a plane along the XY plane without bending, extending from the inner lead portion 12IL to the root portion 12A. In other words, the region of the inner lead portion 12IL adjacent to the integrated circuit element 22 on the opposite side (the region adjacent to the outside in a plan view) extends from the inside to the outside of the molded resin 30 without bending. Of this region, the region outside the molded resin 30 is the root portion 12A.

[0026] The tip portion 12B is located on the opposite side of the die pad portion 12DP from the root portion 12A of the outer lead portion 12OL, where the integrated circuit element 22 is mounted. The tip portion 12B is the side of the outer lead portion 12OL that is further from the inner lead portion 12IL than the root portion 12A. In Figure 2, the tip portion 12B has a plane that generally follows the YZ plane. In other words, the tip portion 12B extends in a different direction from the root portion 12A. The conversion portion 12C is the part where the direction of extension of the tip portion 12B and the root portion 12A is changed. The conversion portion 12C is a bent portion of the outer lead portion 12OL located at the boundary between the root portion 12A and the tip portion 12B, where the direction of extension of the outer lead portion 12OL is changed. The root portion 12A is located on the side of the outer lead portion 12OL that is closer to the inner lead portion 12IL than the conversion portion 12C, and on the side where the integrated circuit element 22 is placed. Conversely, of the outer lead portion 12OL, the tip portion 12B is located on the opposite side of the region where the integrated circuit element 22 is mounted relative to the root portion 12A, rather than the conversion portion 12C. In other words, the tip portion 12B extends in a direction different from the direction along the XY plane in which the root portion 12A extends, that is, for example, along the Z-axis direction, and is located on the opposite side of the region where the integrated circuit element 22 is mounted relative to the root portion 12A.

[0027] The heat dissipation material 40 is provided on the upper surface of the heat sink 50, which will be described later, and is flexible. The heat dissipation material 40 may be, for example, a heat dissipation sheet. The heat dissipation sheet may be composed of, for example, an insulating filler and a resin.

[0028] A heat sink 50 is provided on the lower surface of the heat dissipation material 40. The lower surface of the heat sink 50 is positioned to be flush with the lower surface of the molded resin 30. The heat sink 50 is made of, for example, copper (Cu), but may also be made of a metal other than copper with high thermal conductivity, such as aluminum, or an inorganic or organic material other than metal with high thermal conductivity. Furthermore, fins may be formed on the lower side of the heat sink 50, in which case the fins formed on the lower side of the heat sink 50 are positioned to protrude from the lower surface of the molded resin 30.

[0029] As described above, the semiconductor device 1 of this embodiment is configured as described above. As described above, the semiconductor device 1 comprises a heat sink 50, a flexible heat dissipation material 40 provided on the upper surface of the heat sink 50, a lead member 10 having a die pad portion 11DP provided on the upper surface of the heat dissipation material 40, a semiconductor element 20 provided on the upper surface of the die pad portion 11DP, and at least a mold resin 30 that seals the heat dissipation material 40, the die pad portion 11DP, and the semiconductor element 20, with the die pad portion 11DP having a notch 111 on its outer peripheral portion 110. With the above configuration, it is possible to suppress the generation of resin burrs at the interface between the lower surface of the die pad portion 11DP and the heat dissipation material 40, thereby suppressing an increase in the thermal resistance of the semiconductor device and suppressing a decrease in heat dissipation performance. The reason for this will be explained below.

[0030] First, for comparison with the semiconductor device 1 in this embodiment, Figures 5 and 6 show a conventional semiconductor device as a comparative example. Figure 5 is a schematic cross-sectional view of a conventional semiconductor device. Figure 6 is an enlarged view showing the outer periphery 110 of the die pad portion 11DP of the power lead terminal 11 of the lead member 10 of the conventional semiconductor device. As shown in Figures 5 and 6, in a conventional semiconductor device, when the die pad portion 11DP of the lead member 10 is placed on the upper surface of the heat dissipation material 40, a gap S is generated between the lower surface of the die pad portion 11DP and the heat dissipation material 40. In this state, when the die pad portion 11DP and the heat dissipation material 40 are sealed with resin, the resin enters the gap S. As a result, resin burrs are generated at the interface between the lower surface of the die pad portion 11DP and the heat dissipation material 40, and the generated resin burrs increase the thermal resistance of the semiconductor device and reduce its heat dissipation performance.

[0031] In contrast, the semiconductor device 1 of this embodiment has a die pad portion 11DP with a notch 111 on its outer peripheral portion 110. This allows the upper surface of the outer peripheral portion 110 to be brought closer to the upper surface of the heat dissipation material than in the conventional method when the die pad portion 11DP and the heat dissipation material 40 are sealed with resin. When the die pad portion 11DP having the notch 111 is placed on the upper surface of the heat dissipation material 40, a gap S is created between the lower surface of the die pad portion 11DP and the heat dissipation material 40. However, as described above, when the die pad portion 11DP and the heat dissipation material 40 are sealed with resin, the upper surface of the outer peripheral portion 110 to be brought closer to the upper surface of the heat dissipation material than in the conventional method. Therefore, the force with which the resin presses the outer peripheral portion 110 of the die pad portion 11DP against the heat dissipation material 40 can be improved, and the created gap S can be filled. Consequently, when the die pad portion 11DP and the heat dissipation material 40 are sealed with resin, it is possible to suppress the resin from entering the gap S. As a result, the generation of resin burrs at the interface between the lower surface of the die pad portion 11DP and the heat dissipation material 40 can be suppressed, thereby suppressing an increase in the thermal resistance of the semiconductor device and suppressing a decrease in heat dissipation performance. Therefore, the present invention can provide a semiconductor device with high heat dissipation performance.

[0032] Furthermore, according to the semiconductor device 1 of this embodiment, even when there are variations in the viscosity of the mold resin 30, the bending dimension of the die pad portion 11DP, and the warping that occurs in the heat dissipation material 40, it is possible to suppress the generation of resin burrs at the interface between the lower surface of the die pad portion 11DP and the heat dissipation material 40, thereby simplifying the inspection process of the semiconductor device. Consequently, the productivity of the semiconductor device can be improved.

[0033] Furthermore, according to the semiconductor device 1 of this embodiment, when pressure is generated in the die pad portion 11DP during resin sealing, the notch portion 111 of the die pad portion 11DP deforms in accordance with the heat dissipation material 40. This suppresses the generation of resin burrs at the interface between the lower surface of the die pad portion 11DP and the heat dissipation material 40, while increasing the molding pressure. As a result, the adhesion between the resin and other components can be strengthened, for example, the adhesive strength between the resin and the inner lead portion 11IL can be increased, thereby improving the reliability of the semiconductor device.

[0034] Furthermore, as described above, in a plan view, the die pad portion 11DP is rectangular, and in a plan view, it is desirable that the notches 111 be provided on the three sides of the outer circumference 110 that are not connected to the stepped portion 11SP. When sealing with resin, the outer lead portion 11OL of the power lead terminal 11 is sandwiched between the upper and lower molds, so in a plan view, the one side of the outer circumference 110 of the die pad portion 11DP that is connected to the outer lead portion 11OL and connected to the stepped portion 11SP is fixed when it is sealed with resin. For this reason, resin burrs are less likely to occur even if the notches 111 are not provided on the one side of the outer circumference 110 of the die pad portion 11DP that is connected to the stepped portion 11SP. Therefore, by providing notches 111 on three sides of the outer periphery 110 that are not connected to the stepped portion 11SP, which is considered to be relatively prone to resin burr formation, it is possible to suppress the formation of resin burrs at the interface between the lower surface of the die pad portion 11DP and the heat dissipation material 40. This suppresses an increase in the thermal resistance of the semiconductor device and prevents a decrease in heat dissipation performance.

[0035] Next, an example of a method for manufacturing the semiconductor device 1 of this embodiment will be described. The method for manufacturing the semiconductor device 1 of this embodiment is basically the same as conventional methods for manufacturing semiconductor devices, so some details will be omitted.

[0036] The manufacturing method for the semiconductor device 1 includes a heat dissipation material preparation step, a lead member preparation step, a semiconductor element preparation step, and a resin encapsulation step.

[0037] First, the heat dissipation material preparation process will be explained. In the heat dissipation material preparation process, the heat dissipation material 40 is formed on the upper surface of the heat sink 50. As the heat dissipation material 40, for example, a heat dissipation sheet may be attached to the upper surface of the heat sink 50.

[0038] Next, the lead member preparation process will be described. In the lead member preparation process, power lead terminals 11 and integrated circuit lead terminals 12 are prepared as lead members 10. Specifically, a metal material such as copper is prepared in a flat plate shape. Then, this metal material is processed into the shape of lead terminals 11 and 12 by etching or punching. That is, die pad portions 11DP, 12DP, root portions 11A, 12A, and tip portions 11B, 12B, etc. are formed. Next, a stepped portion 11SP is formed by bending using a bending die. At this point, the entire lead terminal 11 and lead terminal 12 may be enclosed from the outside in a frame shape to form a lead frame in which the entire lead terminal 11 and lead terminal 12 are integrated.

[0039] In the lead member preparation process, a notch 111 is formed on the outer periphery 110 of the die pad portion 11DP of the power lead terminal 11 of the lead member 10. The notch 111 can be formed at the same time as the die pad portion 11DP is formed by the etching or punching process described above.

[0040] Next, the semiconductor device preparation process will be described. In the semiconductor device preparation process, semiconductor devices 20 are placed on the upper surfaces of the die pads 11DP and 12DP. Specifically, a power semiconductor device 21 is bonded and placed on the upper surface of the die pad 11DP via a bonding layer 60a. An integrated circuit device 22 is also bonded and placed on the upper surface of the die pad 12DP via a bonding layer 60b. Each lead terminal 11, 12 and the semiconductor device 20 are connected by wires W1 and W2. The power semiconductor device 21 and the integrated circuit device 22 are also connected by wire W3. Furthermore, in the semiconductor device preparation process, the die pad 11DP on which the semiconductor devices 20 are placed is placed on the upper surface of the heat dissipation material 40.

[0041] Next, the resin encapsulation process will be described. In the resin encapsulation process, at least the heat dissipation material 40, the die pad portions 11DP and 12DP of the lead member 10, and the semiconductor element 20 are encapsulated with resin. Specifically, the lead member 10 (lead frame) on which the semiconductor element 20 is mounted is installed in the molding apparatus 100 as shown in Figure 7. The molding apparatus 100 is a device for encapsulating the semiconductor element 20 and the like with resin material using the transfer molding method.

[0042] The molding apparatus 100 includes a lower mold 101, an upper mold 102, a plunger 103, and a resin injection port 104. The lower mold 101 is a part of the mold located on the lower side (negative side in the Z-axis direction) in Figure 7, and the upper mold 102 is a part of the mold located on the upper side (positive side in the Z-axis direction) in Figure 7. The region sandwiched between the lower mold 101 and the upper mold 102 is the region where the semiconductor element 20 to be sealed is placed, and where the molded resin is formed when resin is supplied. Therefore, lead terminals 11 and 12 are installed so that the region to be exposed from the molded resin, for example, the region to be formed as an outer lead, is located outside the region sandwiched between the lower mold 101 and the upper mold 102.

[0043] The molding apparatus 100 has a plunger 103 outside the area where the mold resin is formed. The plunger 103 is a component for injecting the tablet resin 30A, which is the material for forming the mold resin, into the mold. The molding apparatus 100 also has a resin injection port 104 near the entrance of the area where the mold resin is formed. The tablet resin 30A is injected from the resin injection port 104 into the area where the mold resin is formed.

[0044] A shaped tablet resin 30A made of epoxy resin or the like is mounted on the plunger 103. The lead member 10 (lead frame), including the bonded portion of the semiconductor element 20, is closed by the lower mold 101 and the upper mold 102. When closing the mold, it is preferable that the bottom surface of the portion of the lower mold 101 that is filled with resin contacts the heat sink 50. In this way, the bottom surface of the heat sink 50 can be exposed from the molded resin when it is removed after the molding process.

[0045] Subsequently, the plunger 103 is pushed upward (positive Z-axis direction) as shown in Figure 7. This causes the tablet resin 30A to be injected from the resin injection port 104 into the space where the semiconductor elements 20 and the like are located. Although the tablet resin 30A has a shape, it easily becomes fluid through deformation.

[0046] The injected tablet resin 30A becomes fluid and fills the space in which the semiconductor element 20 and the like are placed. In the resin encapsulation process, the injection conditions for the tablet resin 30A are set so that the tablet resin 30A flows from the notch 111 of the die pad portion 11DP toward the lower surface of the die pad portion 11DP. An example of the injection conditions for the tablet resin 30A will be explained using Figures 7 to 10. Figures 7 to 10 show the flow state of the tablet resin 30A when the injection conditions for the tablet resin 30A are set.

[0047] For example, if the notch 111 is a sloped portion 111A and is located on the left side (negative X-axis direction) of the outer periphery 110 of the die pad portion 11DP in Figure 7, then the resin injection port 104 should be positioned on the right side (positive X-axis direction) of Figure 7, as shown in Figure 7, so that the tablet resin 30A flows from the right side to the left side (positive X-axis direction to negative X-axis direction) in Figure 7. Alternatively, if the notch 111 is a sloped portion 111A and is located on the left side (negative X-axis direction) of the outer periphery 110 of the die pad portion 11DP in Figures 8 and 9, then the resin injection port 104 should be positioned on the left side (negative X-axis direction) of Figures 8 and 9, as shown in Figures 8 and 9, so that the tablet resin 30A flows in a convex shape in the flow direction from the left side to the right side (negative X-axis direction to positive X-axis direction) in Figures 8 and 9.

[0048] Furthermore, if the notch 111 is a sloped portion 111A and is provided on three sides of the outer circumference 110 of the die pad portion 11DP that are not connected to the stepped portion 11SP, then, as shown in Figure 10, the resin injection port 104 should be positioned on the lower side (positive side in the X-axis direction) in Figure 10, and the tablet resin 30A should flow in a semicircular manner from the lower side to the upper side (positive side in the X-axis direction to negative side in the X-axis direction) in Figure 10.

[0049] During the filling of the tablet resin 30A, the lower mold 101 and the upper mold 102 are heated. This causes the tablet resin 30A to fully harden, becoming a solid mold resin 30 that encapsulates the semiconductor element 20, etc.

[0050] Next, the molding apparatus removal process will be described. In the molding apparatus removal process, the solidified mold resin 30 is removed from the molding apparatus 100. At this point, the lead frame is positioned so that the area to be formed as an outer lead is located outside the area sandwiched between the lower mold 101 and the upper mold 102. A thin film of tin or the like may be formed on the portion of the power lead terminal 11 and integrated circuit lead terminal 12 that is exposed to the outside of the mold resin 30, i.e., on the surface of the outer lead, by a plating method. Next, the lead frame is cut off, resulting in a configuration in which it is divided into multiple lead terminals: power lead terminal 11 and integrated circuit lead terminal 12. That is, the lead member 10 includes the divided multiple lead terminals 11 and 12, and these multiple lead terminals 11 and 12 extend from the inside to the outside of the mold resin 30 made of resin (tablet resin 30A), and are formed to have inner lead portions 11IL, 12IL and outer lead portions 11OL, 12OL.

[0051] Next, the lead terminal bending process will be described. In the lead terminal bending process, lead terminals 11 and 12 are bent at the conversion sections 11C and 12C, respectively. Power lead terminal 11 is bent at the conversion section 11C. This divides the outer lead portion 11OL into a base portion 11A and a tip portion 11B. Integrated circuit lead terminal 12 is bent at the conversion section 12C. This divides the outer lead portion 12OL into a base portion 12A and a tip portion 12B. In other words, each of the lead terminals 11 and 12, which have been divided into multiple parts by cutting the lead frame, includes a base portion 11A, 12A and a tip portion 11B, 12B on the outside of the mold resin 30. The base portions 11A and 12A are positioned on the side closer to the area on which the power semiconductor element 21 and integrated circuit element 22 are mounted, with respect to the direction in which they extend. The root portions 11A and 12A extend in a direction that protrudes from the molded resin 30, that is, along the XY plane, in the X-axis direction or the Y-axis direction, etc. On the other hand, the tip portions 11B and 12B are positioned on the opposite side of the region where the power semiconductor element 21 and integrated circuit element 22 are mounted, that is, on the side farther from the region where the semiconductor element 20 is mounted, relative to the root portion 11A and 12A than the conversion portion 11C. In other words, the tip portions 11B and 12B extend in a different direction from the root portions 11A and 12A, and are positioned on the opposite side of the region where the power semiconductor element 21 and integrated circuit element 22 are mounted, that is, on the side farther from the region where the semiconductor element 20 is mounted, relative to the root portions 11A and 12A.

[0052] The semiconductor device 1 is manufactured through the process described above. As described above, the manufacturing method of the semiconductor device 1 in this embodiment includes a lead member preparation step, in which a notch 111 is formed on the outer periphery 110 of the die pad portion 11DP of the power lead terminal 11 of the lead member 10. By doing so, a part of the upper surface of the outer periphery 110 and the upper surface of the heat dissipation material 40 can be brought closer together than in the conventional method. When the die pad portion 11DP having the notch 111 is placed on the upper surface of the heat dissipation material 40 in the lead member preparation step, a gap S is generated between the outer periphery 110 of the lower surface of the die pad portion 11DP and the heat dissipation material 40. However, in the resin sealing step, when the die pad portion 11DP and the heat dissipation material 40 are sealed with resin, as described above, a part of the upper surface of the outer periphery 110 and the upper surface of the heat dissipation material 40 can be brought closer together than in the conventional method. Therefore, the force with which the resin presses the outer periphery 110 of the die pad portion 11DP against the heat dissipation material 40 can be improved compared to the conventional method, and the generated gap S can be filled. Therefore, in the resin encapsulation process, when the die pad portion 11DP and the heat dissipation material 40 are sealed with resin, it is possible to suppress the resin from entering the gap S. As a result, it is possible to suppress the generation of resin burrs at the interface between the lower surface of the die pad portion 11DP and the heat dissipation material 40, thereby suppressing an increase in the thermal resistance of the semiconductor device and suppressing a decrease in heat dissipation performance. Thus, the present invention can provide a method for manufacturing a semiconductor device with high heat dissipation performance.

[0053] Next, a modified example of Embodiment 1 will be described using Figures 11 to 13. First, Modification 1 will be described using Figures 11 and 12. Figure 11 is an enlarged view showing the outer periphery 110 of the die pad portion 11DP of the power lead terminal 11, which is part of the lead member 10 of the semiconductor device 1B according to Modification 1 of Embodiment 1. Note that Figure 11 is a diagram showing the changes from Figure 3, which is an enlarged view of region A in Figure 2. Figure 12 is a schematic plan view showing the area around the die pad portion 11DP of the power lead terminal 11, which is part of the lead member 10 of the semiconductor device 1B according to Modification 1 of Embodiment 1.

[0054] As shown in Figures 11 and 12, the notch 111 of the die pad portion 11DP of the power lead terminal 11 among the lead members 10 of the semiconductor device 1B according to Modified Example 1 is a recess 111B provided on the upper surface of the outer peripheral portion 110.

[0055] As shown in Figure 11, the shape of the recess 111B may be rectangular, but it is not limited to a rectangle; it may also be V-shaped, U-shaped, or the like.

[0056] Furthermore, as shown in Figure 12, in a plan view, the die pad portion 11DP is rectangular, and in a plan view, it is desirable that the recess 111B be provided on three sides of the upper surface of the outer peripheral portion 110 that are not connected to the stepped portion 11SP.

[0057] When the notch 111 is a recess 111B provided on the upper surface of the outer periphery 110, the upper surface of the outer periphery 110 can be brought closer to the upper surface of the heat dissipation material than in the conventional method. Therefore, the force with which the resin presses the outer periphery 110 of the die pad portion 11DP against the heat dissipation material 40 can be improved, and the resulting gap S can be filled. Consequently, when the die pad portion 11DP and the heat dissipation material 40 are sealed by the resin, it is possible to suppress the resin from entering the gap S. As a result, it is possible to suppress the generation of resin burrs at the interface between the lower surface of the die pad portion 11DP and the heat dissipation material 40, thereby suppressing an increase in the thermal resistance of the semiconductor device and suppressing a decrease in heat dissipation performance.

[0058] Furthermore, when the notch 111 is a recess 111B provided on the upper surface of the outer periphery 110, the adhesion between the resin and the die pad 11DP can be improved by the anchoring effect compared to when the notch 111 is a sloped portion 111A provided on the upper surface of the outer periphery 110. As a result, peeling of the resin and the die pad 11DP due to temperature changes and the like can be suppressed.

[0059] Next, a modified example 2 will be described using Figure 13. Figure 13 is an enlarged view showing the outer periphery 110 of the die pad portion 11DP of the power lead terminal 11, which is part of the lead member 10 of the semiconductor device 1C according to modified example 2 of Embodiment 1. Figure 13 is a diagram showing the changes from Figure 3, which is an enlarged view of region A in Figure 2.

[0060] As shown in Figure 13, the notch 111 of the die pad portion 11DP of the power lead terminal 11 in the lead member 10 of the semiconductor device 1C according to the modified example 2 is a recess 111C provided on the side surface of the outer peripheral portion 110.

[0061] As shown in Figure 13, the shape of the recess 111C may be trapezoidal, but it is not limited to a trapezoid; it may also be rectangular, triangular, or the like.

[0062] Furthermore, similar to the first modification, in plan view, the die pad portion 11DP is rectangular, and in plan view, it is desirable that the recess 111C be provided on three sides of the outer peripheral portion 110 that are not connected to the stepped portion 11SP.

[0063] The notch 111 is a recess 111C provided on the side surface of the outer peripheral portion 110. If the surface constituting the recess 111C that faces the lower surface of the outer peripheral portion 110 is considered part of the upper surface, then the upper surface of the outer peripheral portion 110 and the upper surface of the heat dissipation material can be brought closer together. This improves the force with which the resin presses the outer peripheral portion 110 of the die pad portion 11DP against the heat dissipation material 40 compared to conventional methods, and allows the resulting gap S to be filled. Therefore, when the die pad portion 11DP and the heat dissipation material 40 are sealed by the resin, it is possible to suppress the resin from entering the gap S. As a result, the generation of resin burrs at the interface between the lower surface of the die pad portion 11DP and the heat dissipation material 40 can be suppressed, thereby suppressing an increase in the thermal resistance of the semiconductor device and suppressing a decrease in heat dissipation performance.

[0064] Furthermore, when the notch 111 is a recess 111C provided on the side surface of the outer peripheral portion 110, the adhesion between the resin and the die pad portion 11DP can be improved by the anchoring effect, compared to when the notch 111 is a sloped portion 111A provided on the upper surface of the outer peripheral portion 110. As a result, peeling of the resin and the die pad portion 11DP due to temperature changes and the like can be suppressed.

[0065] Furthermore, if the notch 111 is a recess 111C provided on the side surface of the outer peripheral portion 110, in the resin encapsulation process, for example, the resin injection port 104 should be positioned on the left side (negative side in the X-axis direction) in Figure 7, and the tablet resin 30A should flow from the left side to the right side (negative side in the X-axis direction to positive side in the X-axis direction) in Figure 7. This makes it easier for the resin to penetrate into the interior of the recess 111C.

[0066] Embodiment 2. This embodiment applies the semiconductor device according to Embodiment 1 described above to a power converter. The present invention is not limited to certain types of power converters, but below, Embodiment 2 will describe the case in which the present invention is applied to a three-phase inverter.

[0067] Figure 14 is a block diagram showing the configuration of a power conversion system to which the power conversion device according to Embodiment 2 is applied. The power conversion system shown in Figure 14 consists of a power supply 400, a power conversion device 200, and a load 300. The power supply 400 is a DC power supply and supplies DC power to the power conversion device 200. The power supply 400 is not particularly limited, but can consist of, for example, a DC grid, a solar cell, or a storage battery, or it may consist of a rectifier circuit or AC / DC converter connected to an AC grid. The power supply 400 may also consist of a DC / DC converter that converts the DC power output from the DC grid into the desired power.

[0068] The power converter 200 is a three-phase inverter connected between the power supply 400 and the load 300. It converts the DC power supplied from the power supply 400 into AC power and supplies the AC power to the load 300. As shown in Figure 14, the power converter 200 includes a main conversion circuit 201 that converts the input DC power into AC power and outputs it, and a control circuit 203 that outputs a control signal to the main conversion circuit 201 to control the main conversion circuit 201.

[0069] Load 300 is a three-phase motor driven by AC power supplied from power converter 200. Load 300 is not limited to a single application; it is a motor installed in various electrical devices, such as hybrid vehicles, electric vehicles, railway vehicles, elevators, or air conditioning equipment.

[0070] The details of the power converter 200 are described below. The main conversion circuit 201 includes switching elements (not shown) and freewheeling diodes (not shown). By switching the voltage supplied from the power supply 400, the main conversion circuit 201 converts the DC power supplied from the power supply 400 into AC power and supplies it to the load 300. There are various specific circuit configurations for the main conversion circuit 201, but the main conversion circuit 201 according to this embodiment is a two-level three-phase full-bridge circuit and may consist of six switching elements and six freewheeling diodes antiparallel to each switching element. Power semiconductor elements 21 and integrated circuit elements 22 included in the semiconductor device 1 of Embodiment 1 described above may be used as each switching element and each freewheeling diode of the main conversion circuit 201. The semiconductor device 1 of Embodiment 1 described above may be used as the power semiconductor module 202 that constitutes the main conversion circuit 201. The six switching elements are connected in series in pairs to form upper and lower arms, and each upper and lower arm constitutes each phase (U phase, V phase, W phase) of the full-bridge circuit. Then, the output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0071] Furthermore, the main conversion circuit 201 includes a drive circuit (not shown) for driving each switching element. The drive circuit may be built into the power semiconductor module 202 or provided outside the power semiconductor module 202. The drive circuit generates drive signals to drive the switching elements included in the main conversion circuit 201 and supplies these drive signals to the control electrodes of the switching elements in the main conversion circuit 201. Specifically, according to the control signal from the control circuit 203, it outputs a drive signal to turn on the switching element and a drive signal to turn off the switching element to the control electrodes of each switching element.

[0072] As described above, in the power conversion device 200 according to this embodiment, the semiconductor device 1 according to Embodiment 1 is used as the power semiconductor module 202 included in the main conversion circuit 201.

[0073] In this embodiment, an example of applying the present invention to a two-level three-phase inverter has been described, but the present invention is not limited thereto and can be applied to various power conversion devices. In this embodiment, a two-level power conversion device is used, but a three-level power conversion device may also be used. Alternatively, a multi-level power conversion device may also be used. When the power conversion device supplies power to a single-phase load, the present invention may be applied to a single-phase inverter. When the power conversion device supplies power to a DC load, etc., the present invention may be applied to a DC / DC converter or an AC / DC converter.

[0074] The power conversion device to which the present invention is applied is not limited to cases where the load is an electric motor, but can be incorporated, for example, into a power supply unit for an electrical discharge machine or laser processing machine, or into a power supply unit for an induction heating cooker or a non-contact power supply system. The power conversion device to which the present invention is applied can be used as a power conditioner for a solar power generation system or an energy storage system, etc.

[0075] The configurations shown in the embodiments described above are merely examples of the content of this disclosure and can be combined with other known technologies. Furthermore, variations can be combined with each other. Additionally, parts of the configuration can be omitted or modified without departing from the gist of this disclosure.

[0076] The various aspects of this disclosure are summarized below as an appendix. (Note 1) heatsink and A flexible heat dissipation material is provided on the upper surface of the heat sink, A lead member having a die pad portion provided on the upper surface of the heat dissipation material, A semiconductor element provided on the upper surface of the die pad portion, The device comprises at least the heat dissipation material, the die pad portion, and a mold resin that seals the semiconductor element, The die pad portion has a notch on its outer circumference, and is a semiconductor device. (Note 2) The notch is provided on the upper surface of the outer periphery, as described in Appendix 1, for the semiconductor device. (Note 3) The notch is provided on the side surface of the outer periphery, as described in Appendix 1 or Appendix 2, for the semiconductor device. (Note 4) The semiconductor device as described in Appendix 2, wherein the notch is a sloping portion provided such that the plate thickness decreases towards the end of the outer periphery. (Note 5) The semiconductor device according to Appendix 2 or Appendix 3, wherein the notch is a recess. (Note 6) The lead member is It further comprises a stepped portion connected to the die pad portion and having a surface inclined with respect to the upper surface of the die pad portion, In a plan view, the die pad portion is rectangular. In a plan view, the notches are provided on three sides of the outer periphery that are not connected to the stepped portion, as described in any one of Appendix 1 to Appendix 5. (Note 7) The semiconductor device is a semiconductor device according to any one of the appendices 1 to 6, comprising a wide-bandgap semiconductor. (Note 8) The process involves preparing the heat dissipation material by placing it on the top surface of the heat sink, A lead member preparation step involves forming a notch on the outer circumference of the die pad portion of the lead member, and placing the die pad portion with the notch on the upper surface of the heat dissipation material. A semiconductor element preparation step involves placing a semiconductor element on the upper surface of the die pad portion, A method for manufacturing a semiconductor device, comprising a resin encapsulation step of encapsulating at least the heat dissipation material, the die pad portion, and the semiconductor element with a resin. (Note 9) The method for manufacturing a semiconductor device according to Appendix 8, wherein in the resin encapsulation step, the resin injection conditions are set so that the resin flows from the notch of the die pad toward the lower surface of the die pad. (Note 10) A semiconductor device described in any one of Appendix 1 to Appendix 7, comprising a main conversion circuit that converts and outputs the input power, A power conversion device comprising a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit. [Explanation of Symbols]

[0077] 1 1A 1B 1C Semiconductor device, 10 Lead member, 11DP 12DP Die pad section, 11SP Step section, 20 Semiconductor element, 30 Molding resin, 30A Tablet resin, 40 Heat dissipation material, 50 Heat sink, 110 Outer periphery, 111 111A 111B 111C Notch section, 200 Power converter, 201 Main conversion circuit, 203 Control circuit

Claims

1. heatsink and A flexible heat dissipation material is provided on the upper surface of the heat sink, A lead member having a die pad portion provided on the upper surface of the heat dissipation material, A semiconductor element provided on the upper surface of the die pad portion, The device comprises at least the heat dissipation material, the die pad portion, and a mold resin that seals the semiconductor element, The die pad portion has a notch on its outer circumference, and is a semiconductor device.

2. The semiconductor device according to claim 1, wherein the notch is provided on the upper surface of the outer periphery.

3. The semiconductor device according to claim 1, wherein the notch is provided on the side surface of the outer periphery.

4. The semiconductor device according to claim 2, wherein the notch is a sloped portion provided such that the plate thickness decreases towards the end of the outer periphery.

5. The semiconductor device according to claim 2 or claim 3, wherein the notch is a recess.

6. The lead member is It further comprises a stepped portion connected to the die pad portion and having a surface inclined with respect to the upper surface of the die pad portion, In a plan view, the die pad portion is rectangular. In a plan view, the notches are provided on three sides of the outer periphery that are not connected to the stepped portion, according to any one of claims 1 to 3, the semiconductor device.

7. The semiconductor device according to any one of claims 1 to 3, wherein the semiconductor element is composed of a wide-bandgap semiconductor.

8. The process involves preparing the heat dissipation material by placing it on the top surface of the heat sink, A lead member preparation step involves forming a notch on the outer circumference of the die pad portion of the lead member, and placing the die pad portion with the notch on the upper surface of the heat dissipation material. A semiconductor element preparation step involves placing a semiconductor element on the upper surface of the die pad portion, A method for manufacturing a semiconductor device, comprising a resin encapsulation step of encapsulating at least the heat dissipation material, the die pad portion, and the semiconductor element with a resin.

9. The method for manufacturing a semiconductor device according to claim 8, wherein in the resin encapsulation step, the resin injection conditions are set so that the resin flows from the notch of the die pad toward the lower surface of the die pad.

10. A semiconductor device according to any one of claims 1 to 3, comprising a main conversion circuit that converts and outputs input power, A power conversion device comprising a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit.

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