Indication device

Abstract

The challenge is to reduce the number of transistors connected to capacitive elements. [Solution] The system comprises a capacitive element and a transistor, with one electrode of the capacitive element connected to a wire. The capacitive element is connected, and the other electrode of the capacitive element is connected to the gate of the transistor. Since the clock signal is input to the wiring, the clock signal is transmitted through the capacitive element to the transistor. It is input to the gate. The conduction state of the transistor is synchronized with the clock signal. Controlled by a signal, the transistor repeatedly switches between being on and off. In this way, transistor degradation can be suppressed.

Description

[Technical Field]

[0001] Semiconductor devices, display devices, liquid crystal display devices, methods for driving them, or methods for producing them This relates to semiconductor devices, display devices, and other devices having a drive circuit formed on the same substrate as the pixel portion. The present invention relates to a liquid crystal display device, or a method for driving such a device, or to an electronic device having such a device. To relate to. [Background technology]

[0002] In recent years, the development of display devices has been actively pursued, driven by the increase in large-screen displays such as LCD televisions. In particular, transistors made of non-single-crystal semiconductors are used, and the same base as the pixel part is used. The technology of incorporating drive circuits such as gate drivers into a board is highly beneficial for reducing costs and improving reliability. Development is actively underway to make a significant contribution.

[0003] However, transistors made of non-single-crystal semiconductors exhibit an increase in threshold voltage, and This leads to degradation such as a decrease in mobility. As this transistor degradation progresses, the drive circuit will stop working. This can lead to problems such as difficulty in displaying images. Therefore, Patent Document 1 states that This document discloses a shift register configuration that can suppress transistor degradation. In Patent Document 1, one electrode of the capacitive element is connected to the wiring to which the clock signal is input. The other electrode of the capacitive element is connected to the gates of the two transistors, and the other electrode of the capacitive element The potential of the capacitor is increased or decreased in synchronization with the clock signal. In this way, the capacitance of the capacitor element is controlled. Using this method, signals synchronized with the clock signal are generated at the gates of two transistors. Then, using a signal synchronized with this clock signal, the on and off states of the transistor are controlled. Then, the period when the transistor is on and the period when the transistor is off alternate. Since the energy is returned, transistor degradation can be suppressed. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2006-24350 [Overview of the project] [Problems that the invention aims to solve]

[0005] However, in Patent Document 1, the other electrode of the capacitive element is the gate of the two transistors Because it is connected in this way, the parasitic capacitance of the node connected to the capacitive element becomes larger, which is a problem. There is a problem. Because of this, the potential of the H level of the signal synchronized with the clock signal becomes lower. There is a problem. In this case, when the threshold voltage of the transistor rises, the transistor One problem is that the time it takes for the shift register to stop working becomes shorter. In other words, the lifespan of the shift register is shortened. There are challenges such as the capacitance decreasing. Alternatively, the parasitic capacitance connected to the capacitive element is large, so the capacitance There is a challenge in that the capacitance value of the element must be increased. For this reason, the capacitance element Since it is necessary to increase the overlapping area between one electrode and the other electrode, the layer of the capacitive element One challenge is that the required area for pitting becomes larger.

[0006] Alternatively, in Patent Document 1, since it is necessary to increase the area of ​​the capacitive element, one electrode and the other One problem is that the electrodes on one side are prone to short circuits due to dust and other debris. As a result, walking There are challenges such as a decrease in retention and an increase in costs.

[0007] Alternatively, in Patent Document 1, since it is necessary to increase the capacitance value of the capacitive element, there is a problem that the delay or slowness of the signal (for example, a clock signal or an inverted clock signal) supplied to the capacitive element increases. Alternatively, there is a problem that the power consumption increases.

[0008] Alternatively, as a circuit that outputs a signal supplied to the capacitive element, since it is necessary to use a circuit having a large current driving ability, there is a problem that an external circuit (hereinafter also referred to as an external circuit) becomes large. Alternatively, there is a problem that the display device becomes large.

[0009] Alternatively, in Patent Document 1, there is a period during which the gate of the pull-up transistor Tu is in a floating state. Therefore, the potential of the gate of the pull-up transistor Tu is not stable, and noise and the like occur. Therefore, there is a problem that the shift register malfunctions.

[0010] In view of the above problems, it is an object to reduce the number of transistors connected to the capacitive element. Alternatively, it is an object to reduce the parasitic capacitance of the transistor connected to the capacitive element. Alternatively, it is an object to increase the potential of the H level of the signal synchronized with the clock signal. Alternatively, it is an object to reduce the layout area. Alternatively, it is an object to increase the lifespan. It is an object to reduce the delay or slowness of the signal. Alternatively, it is an object to reduce the power consumption. Alternatively, it is an object to reduce the influence of noise. Also, it is an object to suppress or mitigate the deterioration of the transistor. Alternatively, it is an object to suppress malfunction. Alternatively, it is an object to prevent a short circuit between one electrode and the other electrode of the capacitive element. ​​​​​​​​​​The challenges are as follows: Alternatively, the challenge is to reduce the current drive capability of the external circuit. The challenge is to reduce the size of the external circuitry. Alternatively, to reduce the size of the display device. The following are the issues to be addressed. Note that the description of these issues does not preclude the existence of other issues. [Means for solving the problem]

[0011] It has a capacitive element and a transistor, and one electrode of the capacitive element is connected to a wire. The other electrode of the quantitative element is configured to be connected to the gate of the transistor. The wiring includes a Since a lock signal is input, the clock signal is sent to the transistor gate via a capacitive element. The input is then determined by a signal synchronized with the clock signal. Controlled, the transistor repeatedly cycles between being on and off. In this way, This can suppress the degradation of the transistor.

[0012] An exemplary aspect of the present invention comprises a drive circuit and a pixel, the pixel having a liquid crystal element, The drive circuit comprises a first transistor, a second transistor, a third transistor, and a fourth transistor. The device has a transistor and a capacitive element, and the first terminal of the first transistor is the first The wiring is electrically connected, and the second terminal of the first transistor is electrically connected to the second wiring. The first terminal of the second transistor is connected to the second wiring. The second terminal of the second transistor is electrically connected to the gate of the first transistor. The gate of the second transistor is connected to the first wiring, The first terminal of the third transistor is electrically connected to the third wiring, and the third The second terminal of the transistor is electrically connected to the gate of the first transistor, The first terminal of the fourth transistor is electrically connected to the third wiring, and the fourth The second terminal of the transistor is electrically connected to the gate of the third transistor, The gate of the fourth transistor is electrically connected to the gate of the first transistor. One electrode of the capacitive element is electrically connected to the first wiring, and the other electrode of the capacitive element is electrically connected to the first wiring. The electrode is a liquid crystal display device electrically connected to the gate of the third transistor.

[0013] Note that various types of switches can be used. For example, electrical switches These include switches and mechanical switches. In other words, anything that can control the flow of electric current will work. It is not limited to specific things. For example, a transistor (e.g., bipod) can be used as a switch. (e.g., transistors, MOS transistors), diodes (e.g., PN diodes), PIN diode, Schottky diode, MIM (Metal Insulator) Metal diode, MIS (Metal Insulator Semiconductor) It is possible to use ductors (diodes, diode-connected transistors, etc.) It comes. Alternatively, a logic circuit combining these can be used as a switch.

[0014] As an example of a mechanical switch, digital micromirror devices (DMDs) As such, switches using MEMS (Micro-Electro-Mechanical Systems) technology There is a chi.

[0015] Furthermore, using both N-channel and P-channel transistors, CMO An S-type switch may also be used as the switch.

[0016] Furthermore, when explicitly stating that A and B are connected, it means that A and B are electrically connected. When they are connected, when A and B are functionally connected, and when A and B are directly connected This includes cases where the object is present. Here, A and B are the object (for example, a device, an element, a rotation). (Let it be a path, wiring, electrode, terminal, conductive film, layer, etc.) Therefore, a predetermined connection relationship For example, not limited to the connection relationships shown in the diagram or text, but the connections shown in the diagram or text This includes things other than relationships.

[0017] For example, if A and B are electrically connected, the electrical connection between A and B is possible. Elements that perform this function (for example, switches, transistors, capacitive elements, inductors, resistive elements, etc.) One or more ions (such as ions) may be connected between A and B. Alternatively, A and B and As an example of a functionally connected system, a circuit that enables a functional connection between A and B (for example) For example, logic circuits (inverters, NAND gates, NOR gates, etc.) and signal conversion circuits (DA conversion). Circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (power supply circuits (boost circuits) (Step-down circuits, etc.), level shifter circuits that change the potential level of a signal, etc.), voltage sources, current sources Switching circuits, amplification circuits (circuits that can increase signal amplitude or current, etc., operational amplifiers) (Differential amplifier circuits, source follower circuits, buffer circuits, etc.), signal generation circuits, memory circuits, One or more control circuits (such as) may be connected between A and B. For example, between A and B Even if another circuit is in between, if the signal output from A is transmitted to B, then A and B and They are assumed to be functionally connected.

[0018] Furthermore, if it is explicitly stated that A and B are electrically connected, then A and B are electrically connected. When connected electrically (that is, when another element or circuit is placed between A and B) (when they are separated) and when A and B are functionally connected (that is, when there is no separate connection between A and B) (When they are functionally connected with a circuit in between) and when A and B are directly connected ( In other words, this includes cases where A and B are connected without any other element or circuit in between. In other words, if you explicitly state that they are electrically connected, then simply state that they are connected. This is equivalent to the case where it is explicitly stated only that it is included.

[0019] Furthermore, a display element, a display device having a display element, a light-emitting element, and a device having a light-emitting element A light-emitting device can take on various forms and contain various elements. For example For example, as a display element, display device, light-emitting element, or light-emitting device, EL (electroluminescent) EL elements (including organic and inorganic EL elements, organic EL elements, inorganic EL elements), LE D (white LED, red LED, green LED, blue LED, etc.), transistor (current-dependent) Transistors that emit light, electron-emitting elements, liquid crystal elements, electronic inks, electrophoretic elements, etc. Rating Light Bulb (GLV), Plasma Display (PDP), Digital Microwave Chromiller devices (DMDs), piezoelectric ceramic displays, carbon nanotubes, Displays where contrast, brightness, reflectance, transmittance, etc., change due to electromagnetic effects. It can have a medium. An EL display is an example of a display device using an EL element. As for display devices using electron emission elements, field emission displays (FEDs) are examples. ) and SED type flat-panel displays (SED: Surface-conduction Display devices using liquid crystal elements, such as electron-emitter displays. Liquid crystal displays (transmissive liquid crystal displays, semi-transmissive liquid crystal displays, reflective liquid crystal displays) LCDs, direct-view LCDs, projection LCDs, electronic inks and Electronic paper is an example of a display device that uses electrophoretic elements.

[0020] Liquid crystal elements control the transmission or non-transmission of light through the optical modulation effect of liquid crystals. It is an element composed of a pair of electrodes and liquid crystal. The optical modulation effect of the liquid crystal is as follows: Controlled by the electric field applied to the liquid crystal (including the electric field in the horizontal direction, the electric field in the vertical direction, or the electric field in the diagonal direction) It is controlled. Furthermore, liquid crystal elements include nematic liquid crystals, cholesteric liquid crystals, and smectic liquid crystals. Liquid crystal, discotic liquid crystal, thermotropic liquid crystal, lyotropic liquid crystal, low molecular weight liquid crystal Polymer liquid crystals, polymer dispersed liquid crystals (PDLCs), ferroelectric liquid crystals, antiferroelectric liquid crystals, main-chain liquid crystals Side-chain polymer liquid crystal, plasma address liquid crystal (PALC), banana-type liquid crystal, TN (Twi (Sted Nematic) mode, STN (Super Twisted Nematic) ic) mode, IPS (In-Plane-Switching) mode, FFS (Fr inge Field Switching) mode, MVA (Multi-domai n Vertical Alignment) mode, PVA(Patterned V ertical Alignment), ASV (Advanced Super Vi ew) mode, ASM(Axially Symmetric aligned Mic ro-cell) mode, OCB(Optical Compensated Bire) fringence) mode, ECB (Electrically Controlled) mode d Birefringence) mode, FLC (Ferroelectric Li) quid Crystal) mode, AFLC(AntiFerroelectric) mode Liquid Crystal (PDLC) mode, PDLC (Polymer Disperse d Liquid Crystal) mode, guest host mode, blue phase (Blue Phase mode and other modes can be used. However, this is not limited to liquid crystal elements. Various things can be used as such.

[0021] Note that display devices that require a light source, such as liquid crystal displays (transmissive liquid crystal displays) I. Semi-transmissive liquid crystal display, reflective liquid crystal display, direct-view liquid crystal display, projection Display devices using (refractory liquid crystal displays), grating light bulbs (GLVs), and As a light source for display devices using digital micromirror devices (DMDs), electro Using trolluminescence, cold cathode tubes, hot cathode tubes, LEDs, laser light sources, mercury lamps, etc. It is possible to use various light sources. However, it is not limited to this, and various things can be used as light sources. Cut.

[0022] Furthermore, various types of transistors can be used as transistors. There are no restrictions on the type of transistor used. For example, amorphous silicon, polycrystalline silicon, Microcrystalline silicon (also called nanocrystal or semi-amorphous silicon) This involves using thin-film transistors (TFTs) that have non-single-crystal semiconductor films, such as those shown above. It is possible.

[0023] Furthermore, when manufacturing microcrystalline silicon, by using a catalyst (such as nickel), This further improves crystallinity, making it possible to manufacture transistors with superior electrical properties. In this case, crystallinity can be improved simply by applying heat treatment without laser irradiation. This is also possible. As a result, part of the source driver circuit (such as analog switches) and the gate The driver circuit (scan line drive circuit) can be integrally formed on the substrate. Furthermore, If laser irradiation is not performed for crystallization, it is possible to suppress unevenness in the crystallinity of silicon. Therefore, it is possible to display images with improved image quality.

[0024] However, it is possible to manufacture polycrystalline silicon or microcrystalline silicon without using a catalyst (such as nickel). It is possible to do so.

[0025] Alternatively, transistors can be formed using semiconductor substrates or SOI substrates. As a result, there is less variation in characteristics, size, and shape, and the current supply capacity is high. It is possible to manufacture transistors with small dimensions. Using these transistors, This allows for lower power consumption of the circuit or higher integration of the circuitry.

[0026] Alternatively, ZnO, α-InGaZnO, SiGe, GaAs, IZO, ITO, SnO Transistors having compound semiconductors or oxide semiconductors such as these, and furthermore, these compounds Thin-film transistors, such as those made by thinning a material semiconductor or an oxide semiconductor, can be used. These factors allow for lower manufacturing temperatures, making it possible, for example, to manufacture transistors at room temperature. As a result, the heat-resistant substrates, such as plastic substrates and film substrates, can be directly treated. Lampistors can be formed. Furthermore, these compound semiconductors or oxide semiconductors It can be used not only in the channel portion of a transistor, but also in other applications. For example, these compound semiconductors or oxide semiconductors can be used as resistive elements, pixel electrodes, and light-transmitting elements. They can be used as electrodes. Furthermore, they can be used to form films or simultaneously with the transistor. Because it can be formed in this way, costs can be reduced.

[0027] Alternatively, transistors formed using inkjet or printing methods can be used. These will allow for manufacturing at room temperature, at low vacuum levels, or on large substrates. It can be manufactured without using a mask (reticle), so transistors can be produced. The layout can be easily changed. Furthermore, there is no need to use a register. This reduces material costs and the number of processes. Furthermore, because the film is applied only to the necessary parts, This method, which involves etching after depositing a film over the entire surface, is less wasteful of material and lowers costs. It can be done.

[0028] Alternatively, transistors containing organic semiconductors or carbon nanotubes can be used. This allows transistors to be formed on a flexible substrate. Semiconductor devices using such substrates can be made more resistant to impact.

[0029] Furthermore, transistors of various structures can be used. For example, MOS type transistors By using transistors such as junction transistors and bipolar transistors as transistors... This can be done. By using MOS type transistors, the size of the transistor can be reduced. It is possible to do so. Therefore, a large number of transistors can be installed. Bipolar By using a transistor, a large current can be passed through it. Therefore, the circuit can be run at high speed. It can be made to work.

[0030] Furthermore, MOS transistors, bipolar transistors, etc., are mixed together on a single substrate. It may be formed in this way. This makes it possible to achieve low power consumption, miniaturization, and high-speed operation. ru.

[0031] In addition, various other transistors can be used.

[0032] Furthermore, transistors can be formed using various substrates. The types of substrates are particularly... It is not limited to a specific type. Examples of substrates include single crystal substrates and SOI substrates. Glass substrates, quartz substrates, plastic substrates, stainless steel substrates, stainless steel A substrate with a chill foil can be used.

[0033] Furthermore, transistor configurations can take various forms and are not limited to a specific configuration. For example, a multi-gate structure with two or more gate electrodes can be applied. In a gate structure, the channel regions are connected in series, so multiple transistors are connected in series. This configuration will result in a connection to [the specified location].

[0034] As another example, a structure can be applied in which gate electrodes are positioned above and below the channel. Furthermore, by arranging gate electrodes above and below the channel, multiple traps can be connected. The configuration will be like having transistors connected in parallel.

[0035] Structures where the gate electrode is positioned above the channel region, and structures where the gate electrode is positioned below the channel region. Structures in which elements are arranged, positive staggered structure, inverse staggered structure, and channel regions divided into multiple regions A structure in which channel regions are connected in parallel, or a configuration in which channel regions are connected in series. This can also be applied. Furthermore, source electrodes and drain electrodes can be placed in the channel region (or a part thereof). Structures where these overlap can also be applied. Alternatively, a structure with an LDD (Long-Density Diagram) area can be applied.

[0036] Furthermore, various types of transistors can be used, and they can be formed using various substrates. Therefore, all the circuits necessary to realize a given function can be the same. It is also possible to form it on a single substrate. For example, the number of times required to achieve a predetermined function All of the substrates are various types, such as glass substrates, plastic substrates, single crystal substrates, or SOI substrates. It is also possible to form it using a substrate. Alternatively, it may be necessary to achieve a predetermined function. A portion of the essential circuitry is formed on a certain substrate, and the other circuits necessary to achieve a predetermined function are also formed on a substrate. It is also possible that a part of it is formed on a separate substrate. In other words, to achieve a predetermined function It is not necessary for all the circuits required to be formed on the same circuit board. For example, Some of the circuits necessary to realize this function are formed on a glass substrate by transistors. Furthermore, another part of the circuit necessary to realize the predetermined function is formed on a single crystal substrate. An IC chip composed of transistors formed using a single-crystal substrate is called a COG (Chip). The IC chip is connected to a glass substrate (On Glass) and then placed on the glass substrate. It is also possible to use TAB (Tape Automate) for the IC chip. It is also possible to connect to the glass substrate using bonding or a printed circuit board. Alternatively, circuits with high drive voltage and high drive frequency consume more power. Therefore, the circuits in those areas are not formed on the same board, and instead, for example, The circuit in that part is formed on a single crystal substrate, and an IC chip composed of that circuit is used. This will prevent an increase in power consumption.

[0037] A transistor is defined as having at least three terminals, including a gate, a drain, and a source. It is an element having a drain region and a channel region between the drain region and the source region, Current can be passed through the rain region, channel region, and source region. Here, The terms "sow" and "drain" vary depending on the transistor's structure and operating conditions, so which one is the drain? It is difficult to determine whether it is a source or a drain. Therefore, source and drain The area that functions as a source or drain is sometimes not called a source or drain. In that case, for example... In some cases, these are referred to as the first terminal and the second terminal, respectively. Alternatively, they can be referred to as They are sometimes referred to as the first electrode and the second electrode. Alternatively, they may be referred to as the first region and the second region. There is a match.

[0038] Furthermore, a transistor has at least three terminals, including the base, emitter, and collector. It may also be an element having a first terminal, and the collector may be the first terminal, and the second terminal, respectively. It may sometimes be written as "2 terminals," etc.

[0039] Note that semiconductor devices include semiconductor elements (transistors, diodes, thyristors, etc.). This refers to a device that has a circuit. Furthermore, it refers to a device that can function by utilizing semiconductor properties. The term "semiconductor device" can be used to refer to all such devices. Alternatively, a semiconductor device can refer to any device that contains semiconductor materials. That's what they say.

[0040] A display device is a device that has a display element. It may contain multiple pixels, including children. Note that the display device drives the multiple pixels. It may also include an edge drive circuit. Note that a peripheral drive circuit that drives multiple pixels may include multiple The pixels may be formed on the same substrate. Note that the display device may be formed using wire bonding or bump bonding. Peripheral drive circuits placed on the substrate, also known as chip-on-glass (COG), are constructed using methods such as those described above. It is acceptable to include IC chips connected via a cable, or IC chips connected via a TAB, etc. The display device consists of IC chips, resistors, capacitives, inductors, transistors, etc. It may include a flexible printed circuit (FPC) with a component attached. The display device is connected via a flexible printed circuit (FPC), etc., and the IC chip Printed circuit boards with components such as resistors, capacitors, inductors, and transistors attached. It may also include a wire substrate (PWB). Furthermore, the display device may include a polarizing plate or a phase difference plate, etc. It may also include an optical sheet. The display device includes a lighting device, a housing, an audio input / output device, It may include a light sensor, etc.

[0041] The lighting device consists of a backlight unit, a light guide plate, a prism sheet, a diffusion sheet, and a backlight. It has a light sheet, a light source (LED, cold cathode tube, etc.), a cooling device (water-cooled, air-cooled), etc. You can.

[0042] Furthermore, a light-emitting device refers to a device that has light-emitting elements, etc. If it has an optical element, a light-emitting device is one specific example of a display device.

[0043] A reflective device is a device that has light-reflecting elements, light-diffracting elements, light-reflecting electrodes, etc. This refers to the idea that...

[0044] A liquid crystal display device is a display device that has liquid crystal elements. Liquid crystal display devices include: There are various types, including direct viewing, projection, transmissive, reflective, and semi-transmissive.

[0045] Note that a drive device refers to a device that has semiconductor elements, electrical circuits, or electronic circuits. For example, a transistor (selection transistor) that controls the input of a signal from the source signal line into the pixel. A transistor (sometimes called a switching transistor) applies voltage or current to the pixel electrode. Transistors that supply power, transistors that supply voltage or current to light-emitting elements, etc. This is an example of a moving device. Furthermore, it is a circuit that supplies signals to the gate signal line (gate driver, gate (Sometimes called a source line drive circuit), a circuit that supplies a signal to the source signal line (source drive circuit) Drivers (sometimes called source line drive circuits, etc.) are examples of drive devices.

[0046] Furthermore, display devices, semiconductor devices, lighting devices, cooling devices, light-emitting devices, reflectors, drive devices, etc. These may overlap with each other. For example, a display device may have semiconductor equipment and an emitter. It may have an optical device. Alternatively, the semiconductor device may have a display device and a drive device. This can sometimes happen.

[0047] Furthermore, if B is formed on top of A, or if B is formed on top of A, When describing this, it is not limited to the case that B is formed in direct contact with A. This also includes cases where this does not occur, i.e., when another object is intervening between A and B. Here, A and B are objects (for example, devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers). (etc.)

[0048] Therefore, for example, explicitly stating that layer B is formed on top of layer A (or on top of layer A) If described, this applies to cases where layer B is formed in direct contact with layer A, and where layer A is formed on top of layer B. Another layer (such as layer C or layer D) is formed in direct contact with it, and layer B is formed in direct contact with it on top of that. This includes cases where a layer is formed. Note that other layers (e.g., layer C or layer D) are: It can be single-layered or multi-layered.

[0049] Furthermore, the same applies when it is explicitly stated that B is formed above A. It is not limited to B being in direct contact with A, but rather there may be another object between A and B. This includes cases where intervening layers are present. For example, if layer B is formed above layer A, In this case, there are two possibilities: when layer B is formed in direct contact with layer A, and when layer B is formed in direct contact with layer A. Then another layer (for example, layer C or layer D) is formed, and layer B is formed directly in contact with it. This includes cases where it is a single layer. Note that other layers (for example, layer C or layer D) may also be single layers. That's fine, and multiple layers are also acceptable.

[0050] Furthermore, B is formed on top of A, B is formed on top of A, or B is formed above A. When explicitly stating that something has been done, this includes cases where B is formed diagonally upwards. .

[0051] The same applies when B is below A, or when B is below A.

[0052] Furthermore, it is preferable that any terms explicitly stated as singular remain singular. However, this is not the only option; there can be multiple instances. Similarly, explicitly specifying the number of instances is also possible. For items that are listed as such, it is preferable that there be multiple items. However, this is not limited to these items. It can also be singular.

[0053] Note that in the diagram, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

[0054] Note that the figure is a schematic representation of an ideal example and is not limited to the shapes or values ​​shown in the figure. It cannot be fixed. For example, variations in shape due to manufacturing technology, variations in shape due to errors, noise Variations in signals, voltages, or currents, or signals, voltages, due to timing differences. Alternatively, it may include variations in current, etc.

[0055] Note that technical terms may be used to describe specific embodiments or examples. Many, but not limited to, this applies.

[0056] Furthermore, terms that are not defined (including scientific and technical terms such as specialized or academic terms) are generally... It can be used with the same meaning as the general meaning understood by those who are normally skilled in the art. (Dictionaries, etc.) The terminology defined therein should be interpreted in a way that is consistent with the context of the related technology. It is preferable.

[0057] Note that terms such as "1st," "2nd," and "3rd" refer to various elements, components, areas, layers, and regions that are separate from each other. It is used to distinguish and describe things. Therefore, terms such as "first," "second," and "third" refer to elements and parts. It does not limit the number of materials, areas, layers, zones, etc. Furthermore, for example, "the first" It can be replaced with "second" or "third," etc. [Effects of the Invention]

[0058] The number of transistors connected to the capacitive element can be reduced. Alternatively, the number of transistors connected to the capacitive element can be reduced. The parasitic capacitance of the connected transistor can be reduced. Alternatively, the clock signal can be used to reduce the parasitic capacitance of the connected transistor. The potential of the H level of the synchronized signal can be increased. Alternatively, the layout area can be reduced. It can be made shorter. Or, its lifespan can be extended. Signal delay or distortion can be reduced. It can be reduced. Or, power consumption can be reduced. Or, noise can be reduced. The impact can be reduced. Or, transistor degradation can be suppressed or mitigated. It can be done. Or, malfunctions can be suppressed. Or, one electrode of the capacitive element and the other This prevents short circuits with the electrodes. Alternatively, it reduces the current driving capability of the external circuit. This can be done. Alternatively, the size of the external circuit can be reduced. Alternatively, the display device can be It can be made smaller. [Brief explanation of the drawing]

[0059] [Figure 1] A circuit diagram of a semiconductor device and a timing chart explaining its driving method. [Figure 2] A schematic diagram illustrating the driving method of a semiconductor device. [Figure 3] Circuit diagram of a semiconductor device. [Figure 4] Circuit diagram of a semiconductor device. [Figure 5] Circuit diagram of a semiconductor device. [Figure 6] A circuit diagram of a semiconductor device and a timing chart explaining its driving method. [Figure 7]A schematic diagram illustrating the driving method of a semiconductor device. [Figure 8] A schematic diagram illustrating the driving method of a semiconductor device. [Figure 9] Circuit diagram of a semiconductor device. [Figure 10] Circuit diagram of a semiconductor device. [Figure 11] Circuit diagram of a semiconductor device. [Figure 12] Circuit diagram of a semiconductor device. [Figure 13] Circuit diagram of a semiconductor device. [Figure 14] A circuit diagram of a shift register and a timing chart explaining its driving method. [Figure 15] Circuit diagram of a shift register. [Figure 16] Circuit diagram of a shift register. [Figure 17] Circuit diagram of a shift register. [Figure 18] Layout diagram of a shift register. [Figure 19] A circuit diagram of a semiconductor device and a timing chart explaining its driving method. [Figure 20] Circuit diagram of a semiconductor device. [Figure 21] Circuit diagram of a shift register. [Figure 22] System block diagram of the display device. [Figure 23] A diagram illustrating the configuration of a display device. [Figure 24] Circuit diagram of a shift register. [Figure 25] A timing chart explaining how to drive the shift register. [Figure 26] A circuit diagram of a signal line drive circuit and a timing chart explaining its drive method. [Figure 27] A circuit diagram of a pixel and a timing chart explaining its driving method. [Figure 28] A circuit diagram of a pixel, its layout diagram, and a timing chart explaining its driving method. [Figure 29]A circuit diagram of a pixel and a timing chart explaining its driving method. [Figure 30] Layout diagram of a shift register. [Figure 31] Layout diagram of a shift register. [Figure 32] Cross-section of a transistor. [Figure 33] A diagram illustrating electronic devices. [Figure 34] A diagram illustrating electronic devices. [Modes for carrying out the invention]

[0060] The embodiments will be described below with reference to the drawings. However, the embodiments may differ in many ways. It is possible to implement it in any manner, and without deviating from its purpose and scope, its form and Those skilled in the art will readily understand that the details can be modified in various ways. It should not be interpreted as being limited to the contents described herein. Furthermore, in the configuration described below, Symbols indicating similar parts or functions are shown using common symbols across different drawings. A detailed explanation of the part containing this will be omitted.

[0061] Furthermore, the content described in one embodiment (even a part of it) may vary depending on the form of its implementation. Other content (even partial content) described in the tone, and / or one or more other implementations To apply, combine, or replace the content described in the form (even if only a part of it is acceptable), It is possible to do things like this.

[0062] Furthermore, the content described in each embodiment refers to the use of various figures in each embodiment. This refers to the content to be stated, or the content to be stated using the text described in the specification.

[0063] Furthermore, a diagram (even a partial one) described in one embodiment may refer to another part of that diagram. The figures (or any part thereof) described in that embodiment, and / or one or more other In the embodiment described (even if only a part of it), by combining it, Furthermore, it is possible to construct many diagrams.

[0064] (Embodiment 1) In this embodiment, an example of a semiconductor device will be described. Note that the semiconductor device will be driven by It can be referred to as a path or a flip-flop.

[0065] First, an example of the semiconductor device of this embodiment will be described with reference to Figure 1(A). Figure 1 The semiconductor device (A) includes circuit 100, transistor 101, transistor 102, and transistor It has a diast 103, a transistor 104, a capacitive element 105, and a capacitive element 106. Lampistors 101-104 are each assumed to be N-channel type, and the gate and source are It is assumed that the device turns on when the potential difference (Vgs) between them exceeds the threshold voltage (Vth). Furthermore, and not limited to this, transistors 101 to 104 are each P-channel type. This is possible. A P-channel transistor has a potential difference (Vgs) between the gate and the source. It is assumed that this function turns on when the voltage falls below the threshold voltage (Vth).

[0066] The connection relationships of the semiconductor device in Figure 1(A) will be explained. The first terminal of transistor 101 The second terminal of transistor 101 is connected to wiring 123B, and the second terminal of transistor 101 is connected to wiring 121. The first terminal of transistor 102 is connected to the gate of transistor 101. The second terminal of transistor 102 is connected to wiring 121 and the gate of transistor 102. It is connected to wiring 123C. The first terminal of transistor 103 is connected to wiring 122A. The second terminal of transistor 103 is connected to the gate of transistor 101. The first terminal of transistor 104 is connected to wiring 122B, and the transistor 104 The second terminal is connected to the gate of transistor 103. One electrode of capacitive element 105 It is connected to the gate of transistor 101, and the other electrode of capacitive element 105 is connected to wiring 12 It is connected to 1. One electrode of the capacitive element 106 is connected to the wiring 123, and the capacitive element 10 The other electrode of 6 is connected to the gate of transistor 103.

[0067] Note that the gate of transistor 101, the first terminal of transistor 102, and transistor 1 The second terminal of 03, or the connection point of the gate of transistor 104, is indicated as node A. The gate of transistor 103, the second terminal of transistor 104, or a capacitive element The connection point of the other electrode of 106 is indicated as node B. However, node A and node B are arranged It can be represented as a line.

[0068] Note that wiring 121, wiring 123A, wiring 123B, wiring 123C, wiring 122A, wiring 1 22B can be indicated as a terminal.

[0069] Input to each wire (wire 121, wires 122A~122B, wires 123A~123C) Examples of things that can be manipulated (for example, signals, voltages, or currents) are described below. However, The following is just one example and is not limited to it. Each wiring includes the following: It is also possible to input various other things, and each wire can be left floating (hereinafter referred to as "floating"). It is possible to set it to a (singling) state.

[0070] As an example, let's assume that signal S1 is output from wiring 121. Therefore, wiring 121 It can function as a signal line, especially when wiring 121 is connected to a pixel. , or if the wiring 121 extends to the pixel area, the wiring 121 is a gate line, a scan line, Alternatively, it can function as a capacitance line. Signal S1 is the output signal of the semiconductor device. Often, these are digital signals with H level and L level, and are output signals, selection signals, It can function as a gate signal or a scanning signal.

[0071] As an example, let's assume that voltage V1 is supplied to wiring 122A~122B. Therefore, Wiring 122A~122B can function as power lines. Voltage V1 is a signal. It is often a value roughly equal to the L level of S1, and is the ground voltage, power supply voltage, or negative voltage. It can function as a power supply voltage. However, it is not limited to this, and wiring 122A~ It is possible to input signals such as a clock signal to 122B. In this case, wiring 12 Lines 2A through 122B can function as signal lines or clock signal lines. Wiring 122A to 122B can receive separate voltages or separate signals. That is the case.

[0072] Note that "approximately" refers to errors due to noise, errors due to process variations, and manufacturing errors of the element. This includes errors due to variations in degree and / or various other errors such as measurement errors.

[0073] As an example, let's assume that signal S2 is input to wiring 123A~123C. Therefore, Wiring 123A~123C can function as signal lines. Signal S2 is constant. Often, it is a digital signal that alternates between high and low levels at a certain frequency, and is a clock signal. It can function as (CK). However, it is not limited to this, and wiring 123A~ Power voltage can be supplied to 123C. In this case, wiring 123A~12 3C can function as a power line. Alternatively, wiring 123A~123B can be used. It is possible to input different voltages or different signals.

[0074] In this embodiment, as an example, the potential of the signal's L level is V1, and the potential of the signal's H level is V1. Let V2 be the electric potential, and assume V2 > V1. However, this is not limited to this condition.

[0075] Voltage refers to the potential difference between a given potential and a reference potential (for example, ground potential). In many cases, voltage, potential, and potential difference are rephrased as potential, voltage, and voltage difference, respectively. It is possible.

[0076] The functions of circuit 100, transistors 101-104, capacitive element 105, and capacitive element 106 An example of Noh will be explained. However, the following is just one example and is not limited to this. Circuit 100 and each element may have various functions in addition to those described below. It is possible that it does not have the functions described below.

[0077] Circuit 100 has the function of controlling the potential or state of node A, and the potential or state of wiring 121. It has a function to control the state. For example, circuit 100 controls the potential of node A or wiring 12 Function to increase the potential of 1, or to decrease the potential of node A or wiring 121. , and / or, it has a function to make node A or wiring 121 float. The zista 101 responds to the signal input to wiring 123B (for example, signal S2) to wiring 12 It has the function of raising the potential of 1. Transistor 102 is input to wiring 123C. The timing of the conduction between wiring 121 and node A is controlled according to a signal (e.g., signal S2). It has the function of being a switch. Transistor 103 responds to the potential of node B This controls the timing of electrical conductivity between wiring 122A and node A, and functions as a switch. Transistor 104 conducts between wiring 122B and node B depending on the potential of node A. It has a function to control the timing of the operation and functions as a switch. Capacitive element 105 is distributed A function to raise the potential of node A in accordance with the potential of line 126, and / or a transistor It has the function of maintaining the potential difference between the gate of 101 and the second terminal. Capacitive element 106 is The potential of node B is controlled according to the signal (for example, signal S2) input to wiring 123A. It has the function of [doing something].

[0078] Next, for the operation of the semiconductor device in Figure 1(A), please refer to Figures 1(B) and 2(A) to (E). Let's explain. Figure 1(B) is a timing chart to illustrate the operation of a semiconductor device. This is just one example, and it has periods T1, T2, T3, T4, and T5. Figure 1(B) shows signals S1 and S2, the potential Va at node A, and the potential Vb at node B. Figure 2(A) shows a schematic diagram of the operation of the semiconductor device in Figure 1(A) during period T1. Figure 2(B) shows a schematic diagram of the operation of the semiconductor device in Figure 1(A) during period T2. Figure 1(A) shows a schematic diagram of the operation of the semiconductor device during period T3. Figure 2(D) shows Figure 1(A) shows a schematic diagram of the operation of the semiconductor device during period T4. Figure 2(E) shows the operation during period T Figure 1(A) in section 5 shows a schematic diagram of the operation of the semiconductor device.

[0079] Furthermore, when the potential of node A rises, the semiconductor device operates during period T1 and during period T2. The actions in the specified period and the actions in period T3 are performed in order. After that, the potential of node A rises again. Until then, the device repeats the operation in period T4 and the operation in period T5 in sequence. vinegar.

[0080] First, during period T1, the signal S2 is at a low level. Then, transistor 102 is As a result, node A and wiring 121 become non-conductive. At the same time, the potential of node B is The potential of node B at this time decreases due to the capacitive coupling of the capacitive element 106. The sum of the potential of 2A (V1) and the threshold voltage of transistor 103 (Vth106) is (V1+V If it becomes lower than th106), transistor 103 will turn off. Therefore, the wiring 122A and node A become non-conductive. Meanwhile, circuit 100 raises the potential of node A. Start raising the voltage. Then, the potential of node A will be equal to the potential of wiring 122B (V1) and transistor 1 When the sum of the threshold voltage of 04 (Vth104) and (V1 + Vth104) is reached, the traction The inverter 104 turns on. Then, wiring 122B and node B become conductive. Therefore, since voltage V1 is supplied from wiring 122B to node B, the potential of node B is V1. As a result, transistor 103 remains off, so wiring 122A and node A This remains in a non-conductive state. Similarly, the potential of node A is the same as the potential of wiring 123B (V1) The sum of the threshold voltage of transistor 101 (Vth101) and the result was (V1 + Vth101). By the way, transistor 101 turns on. Then, wire 123B and wire 121 are connected. The circuit becomes open. Therefore, an L-level signal S2 is supplied from wiring 123B to wiring 121. Therefore, the potential of wiring 121 is equal to the potential of wiring 123B (the low level of signal S2, or V1). They become roughly equal. Then, circuit 100 sets the potential of node A to a certain value (for example, V1 + Vt Once the level rises to h101 or higher and V2 or lower, the signal supply to node A is stopped. Therefore, circuit 100 and node A are in a non-conductive state. Thus, node A is in a floating state. As a result, the potential at node A remains at a high value. Capacitive element 105 receives the current value at node A. The potential difference between code A and wiring 121 is maintained.

[0081] During period T1, circuit 100 receives a voltage V1 or an L-level signal on wiring 121. It is possible to supply such as. Alternatively, circuit 100 can supply signals etc. to wiring 121. By not having this, it is possible to make the circuit 100 and the wiring 121 non-conductive. Therefore, circuit 100 can make the wiring 121 floating.

[0082] Next, during period T2, the potential of node A remains high, so the transistor 104 remains ON. Therefore, wiring 122B and node B remain in a conductive state. Therefore, the potential at node B remains at V1. As a result, transistor 103 remains off. Therefore, wiring 122A and node A remain in a non-conductive state. Similarly, node A Since the potential remains at a high value, transistor 101 remains on. Therefore, Wiring 123B and wiring 121 remain in a conductive state. At this time, is signal S2 at a low level? Then it rises to H level. Then, since wiring 123B and wiring 121 remain in a conductive state, The potential of wiring 121 begins to rise. At the same time, transistor 102 turns on, so no Circuit A and wiring 121 become conductive. However, the potential of wiring 121 is equal to the potential of wiring 123C. (V2-Vth) is the value obtained by subtracting the threshold voltage of transistor 102 (Vth102) from (V2). When it rises to 102), transistor 102 turns off. Therefore, wiring 121 And node A becomes non-conductive. Here, the capacitive element 105 is connected to wiring 1 during period T1. The potential difference between 21 and node A remains constant. Therefore, the potential of wiring 121 rises. Then, the potential at node A becomes V2 + Vth101 + due to the capacitive coupling of capacitive element 105. It rises to α (where α is a positive number). This is what is known as bootstrapping. Therefore, The potential of wiring 121 is equal to the potential of wiring 123B (the high level of signal S2, or V1). It will rise until it reaches that point.

[0083] During period T2, circuit 100 is often not supplying signals to node A. Therefore, circuit 100 and node A are often in a non-conductive state. Thus, circuit 100 This often results in node A being in a floating state.

[0084] In addition, during period T2, if circuit 100 is not supplying signals or anything to wiring 121, Because there are many connections, circuit 100 and wiring 121 are often in a non-conductive state.

[0085] Next, during period T3, after the signal S2 decreases from a high level to a low level, circuit 100 This reduces the potential of node A to V1. Therefore, the potential of node A is reduced to the wiring The sum of the potential of 123B (V1) and the threshold voltage of transistor 101 (Vth101) (V1 Transistor 101 remains on until it reaches +Vth101. Therefore, L The bell signal S2 is supplied from wiring 123B to wiring 121, so the potential of wiring 121 is The potential of wiring 123B decreases to the same level as (V1). Similarly, the potential of node A decreases to the same level as wiring 1 The sum of the potential of 22B (V1) and the threshold voltage of transistor 104 (Vth104) is (V1+ Transistor 104 remains ON until the voltage reaches Vth104. Therefore, the voltage V Since voltage 1 is supplied from wiring 122B to node B, the potential of node B remains V1. As a result, transistor 103 remains off, so wiring 122A and node A are not connected. The circuit remains conductive. At this time, the capacitance element 106 is at the potential of wiring 123A (the L of signal S2). The potential difference between the level (or V1) and the potential of wiring 122B (V1) is maintained.

[0086] During period T3, circuit 100 receives a voltage V1 or an L-level signal on wiring 121. It is possible to supply such as. Alternatively, circuit 100 can supply signals etc. to wiring 121. By not having this, it is possible to make the circuit 100 and the wiring 121 non-conductive. Therefore, circuit 100 can make the wiring 121 floating.

[0087] Next, during period T4, signal S2 rises from L level to H level. At this time, No Since the potential of A remains at V1, transistors 101 and 104 are off. It remains as is. Therefore, since node B remains in a floating state, the potential of node B is the capacitance element It rises due to the capacitive coupling of child 106. The potential of node B is equal to the potential of wiring 122A (V1). Higher than the sum of the threshold voltage of transistor 103 (Vth103) and (V1 + Vth103) When this happens, transistor 103 turns on. Then, wiring 122A and node A and The circuit becomes conductive. Therefore, voltage V1 is supplied from wiring 122A to node A, The potential of line A is maintained at V1. At the same time, transistor 102 turns on, so wiring Node 121 and node A become conductive. At this time, voltage V1 is connected to node A via wiring 122. It is supplied from A. Therefore, voltage V1 is supplied from wiring 122A to wiring 121. Therefore, the potential of wiring 121 is maintained at V1.

[0088] During period T4, circuit 100 receives a voltage V1 or an L-level signal at node A. It is possible to supply this. Alternatively, circuit 100 does not supply signals, etc., to node A. This makes it possible to make circuit 100 and node A non-conductive. Circuit 100 can make node A float.

[0089] During period T5, circuit 100 receives a voltage V1 or an L-level signal on wiring 121. It is possible to supply such as. Alternatively, circuit 100 can supply signals etc. to wiring 121. By not having this, it is possible to make the circuit 100 and the wiring 121 non-conductive. Therefore, circuit 100 can make the wiring 121 floating.

[0090] Next, during period T5, the signal S2 decreases from a high level to a low level. At this time, Since the potential of A remains at V1, transistors 101 and 104 are off. It remains the same. Therefore, the potential of node B is reduced by the capacitive coupling of capacitive element 106. The potential of node B is the same as the wiring (V1) of wiring 122A and the threshold voltage (V) of transistor 103. If the sum with (th103) is lower than (V1 + Vth103), then transistor 10 3 turns off. Therefore, wiring 122A and node A become non-conductive. Similarly, Since inverter 102 is turned off, wiring 121 and node A become non-conductive. Circuit 100 supplies an L-level signal or voltage V1 to node A and wiring 121. Therefore, the potential of node A and the potential of wiring 121 are maintained at V1. However, circuit 100 If node A and wiring 121 are not supplied with an L-level signal or voltage V1, However, since node A and wiring 121 are in a floating state, the potential of node A and wiring 121 The potential is maintained at V1.

[0091] In the semiconductor device shown in Figure 1(A), compared to conventional technology, the other electrode of the capacitive element 106 is in contact with The number of transistors connected can be reduced. Therefore, the other of the capacitive element 106 This allows for a reduction in the parasitic capacitance connected to the electrode, i.e., the parasitic capacitance of node B. Parasitic capacitance refers to the gate capacitance of a transistor, and the capacitance between the gate and source of a transistor. Raw capacitance, parasitic capacitance between the gate and drain of a transistor, and / or wiring capacitance, etc. This refers to the combined capacitance. However, it is not limited to this, and the other electrode of the capacitive element 106 is It is possible to connect multiple transistors.

[0092] Alternatively, in the semiconductor device shown in Figure 1(A), the parasitic capacitance of node B can be reduced, The capacitance value of the capacitive element 106 can be made smaller than that of conventional technology. Since the overlapping area between one electrode and the other electrode of 106 can be reduced, the capacitance element The layout area of ​​sub-element 106 can be reduced. As a result, one side of capacitive element 106 This prevents short circuits between one electrode and the other electrode caused by debris. Therefore, it is possible to improve yield or reduce costs. Alternatively, wiring 12 Since the 3A load can be reduced, the signal input to wiring 123A (for example, signal S2) can reduce slurring or delay. Alternatively, the signal can be sent to wiring 123A. Since the current drive capability of the external circuit supplying the power can be reduced, the size of the external circuit can be reduced. It can be cut.

[0093] Alternatively, in the semiconductor device shown in Figure 1(A), the parasitic capacitance of node B can be reduced, The amplitude voltage at node B can be increased when the potential of wiring 123A changes. So, in period T4, the potential of node B can be made higher than with conventional technology? This allows us to increase the Vgs of transistor 103. Since the on-resistance of 3 can be reduced, the potential of node B during period T4 can be set to V1. It becomes easier to maintain. Alternatively, the channel width (W) of transistor 103 can be reduced. This allows for a reduction in the layout area.

[0094] Alternatively, in the semiconductor device shown in Figure 1(A), transistor 102 is turned off during period T2. Until then, node A and wiring 121 are often in a conductive state. Therefore, node As the potential of A decreases, the gate voltages of transistors 101 and 104 are This can be made lower. As a result, the characteristics of transistors 101 and 104 Degradation can be suppressed. Alternatively, transistors 101 and 104 It can be prevented from being destroyed. Or, as a transistor, the gate insulating film Thinner transistors with improved mobility can be used. When using a transistor, the channel width (W) can be reduced. Therefore, This allows for a reduction in the layout area.

[0095] Alternatively, in the semiconductor device shown in Figure 1(A), all transistors are N-channel type, or all It is possible to make all transistors P-channel type. Therefore, compared to CMOS circuits... This allows for a reduction in the number of processes, an improvement in yield, or a reduction in costs. In particular, If all transistors are N-channel type, the semiconductor layer of the transistor is non-single-connected. Crystalline semiconductors, microcrystalline semiconductors, organic semiconductors, or oxide semiconductors can be used. Therefore, it is possible to reduce the number of processes, improve yield, or lower costs. However, this is not limited to the semiconductor device shown in Figure 1(A), which uses a P-channel transistor and an N It can be constructed using a CMOS circuit that combines channel transistors. ru.

[0096] Alternatively, in the semiconductor device shown in Figure 1(A), at least one of period T4 and period T5 Therefore, transistors 101-104 turn off. Consequently, the transistors are in their first operating phase. Since it remains off throughout the entire time, the transistor may experience an increase in threshold voltage or a decrease in mobility. This can suppress the degradation of its properties.

[0097] In particular, when using a non-single crystal semiconductor, microcrystalline semiconductor, organic semiconductor, or oxide semiconductor as the semiconductor layer of the transistor, the characteristic degradation of the transistor becomes remarkable. However, in the semiconductor device of Fig. 1(A), the characteristic degradation of the transistor can be suppressed, so a non-single crystal semiconductor, microcrystalline semiconductor, organic semiconductor, or oxide semiconductor can be used as the semiconductor layer of the transistor. However, it is not limited to this, and a polycrystalline semiconductor or single crystal semiconductor can be used as the semiconductor layer.

[0098] Note that it is possible to indicate that period T2 is the selection period and the other periods (period T1, period T3, period T4, and period T5) are non-selection periods. Or, it is possible to indicate that period T1, period T2, period T3, period T4, and period T5 are the set period, output period, reset period, first non-selection period, and second non-selection period, respectively.

[0099] Note that the channel width (W) of transistor 101 can be larger than the channel width of transistor 102, transistor 103, and / or transistor 104. Or, among the transistors included in the semiconductor device, the channel width of transistor 101 can be the largest. In this case, the on-resistance of transistor 101 becomes small, so the rise time and fall time of the signal output from wiring 121 (e.g., signal S1) become short. Therefore, in period T2, the timing at which transistor 102 turns off becomes earlier. Thus, it is possible to suppress the situation where the potential of node A decreases too much and the semiconductor device malfunctions. However, it is not limited to this, and the channel width of transistor 101 This refers to the channel width of any one of transistors 102 to 104, or the semiconductor device having It is possible for the channel width to be smaller than that of any one of the transistors.

[0100] Note that when referring to the channel width of a transistor, this is called the W / L (L: channel width) of the transistor. This can be rephrased as the ratio of the length of the 'L' part.

[0101] Furthermore, the L-range of the signal input to wiring 123A, wiring 123B, and / or wiring 123C The potential of the bell can be lower than V1. In this case, the transistor is reverse-biased. Since it becomes possible to apply this, the degradation of transistor characteristics can be mitigated. Therefore, because transistor 102 is on for a long time, the signal input to wiring 123C The potential of the L level is preferably lower than V1. However, this is not limited to the wiring 1 The potential of the L level of the signals input to 23A, wiring 123B, and / or wiring 123C is It is possible to achieve a higher level than V1.

[0102] Furthermore, the H level of the signal input to wiring 123A, wiring 123B, and / or wiring 123C The potential of the bell can be lower than V2. In this case, the transistor's Vgs is small. This reduces the degradation of transistor characteristics, which is particularly important for transistor 1 Since 02 is on for a long time, the potential of the H level signal input to wiring 123C is A value lower than V2 is preferable. However, it is not limited to this, and wiring 123A, wiring 123 B, and / or, the potential of the H level signal input to wiring 123C is higher than V2. This is possible.

[0103] The amplitude of the signal input to wiring 123A, wiring 123B, and / or wiring 123C. The voltage can be less than V2-V1. In particular, when transistor 103 is turned on Since the duration is long, the amplitude of the signal input to wiring 123A should be smaller than V2-V1. It is preferable to do so. In this way, the Vgs of transistor 103 can be reduced. This makes it possible to suppress the degradation of the characteristics of transistor 103. However, it is not limited to this. The amplitude voltage of the signal input to wiring 123A, wiring 123B, and / or wiring 123C. It is possible for the result to be greater than V2-V1.

[0104] Furthermore, it is possible to input signals to wiring 122A and / or wiring 122B. Thus, since voltage V1 can be omitted, the number of power supplies can be reduced. Alternatively, Since a reverse bias can be applied to the transistor, the degradation of the transistor's characteristics can be mitigated. This is possible. In particular, wiring 122A has a period during which transistor 103 is ON (e.g. For example, it is possible to input signals that are at an L level during periods T1, T3, and T5. For example, the inverted signal of signal S2 (hereinafter also called the inverted clock signal) is one such example. Yes. Wiring 122B contains the period during which transistor 104 is ON (for example, period T3, period It is possible to input a signal that is at an L level during interval T4 and period T5.

[0105] Note that a voltage (for example, voltage V2) is applied to wiring 123A, wiring 123B, and / or wiring 123C. It is possible to supply () to the semiconductor device, inverter circuit Alternatively, it can function as a buffer circuit.

[0106] Note that, as shown in FIG. 3(A), since the same voltage (e.g., voltage V1) is often supplied to wiring 122A and wiring 122B, it is possible to share wiring 122A and wiring 122B. For this reason, the first terminal of transistor 103 and the first terminal of transistor 104 are connected to wiring 122. Wiring 122 corresponds to wiring 122A or wiring 122B, and the same as these wirings can be input to wiring 122. Note that sharing a plurality of wirings means connecting elements or circuits connected to the plurality of wirings to the same wiring. Or it means connecting the plurality of wirings to each other. Note that, as shown in FIG. 3(B), since the same signal (e.g., signal S2) is often input to wirings 123A to 123C, it is possible to share wirings 123A to 123C. For this reason, the first terminal of transistor 101, the gate of transistor 102, and one electrode of capacitor element 106 are connected to wiring 123. Wiring 123 corresponds to wirings 123A to 123C, and the same as these wirings can be input to wiring 123. However, it is not limited to this, and it is possible to share only any two or more of wirings 123A to 123C. Note that, similar to FIG. 3(B), in FIG. 3(A) as well, it is possible to share wirings 123A to 123C. Note that, as shown in FIG. 3(C), by combining FIG. 3(A) and FIG. 3(B), wiring 122

[0107]

[0108]

[0109]

[0110] It is possible to share wiring A and wiring 122B, and further to share wiring 123A~123C. For example, the first terminal of transistor 103 and the first terminal of transistor 104 are , connected to wiring 122, and the first terminal of transistor 101, transistor 102 The gate and one electrode of the capacitive element 106 can be connected to the wiring 123. ru.

[0111] As shown in Figure 3(D), the gate of transistor 104 is connected to wiring 121. This is possible by connecting the gate of transistor 104 to wiring 121. When transistor 104 turns on, the gate voltage becomes V1, and in Figure 1(A) Lower than the gate voltage (V1 + Vth101 + α) when transistor 104 turns on. Therefore, dielectric breakdown of transistor 104 or degradation of the characteristics of transistor 104 occurs. It can be suppressed.

[0112] Furthermore, similar to Figure 3(D), the gate of transistor 104 is also shown in Figures 3(A) to (C). It can be connected to wiring 121.

[0113] As shown in Figure 3(E), the second terminal of transistor 103 is connected to wiring 121. This is possible by connecting the second terminal of transistor 103 to wiring 121. Therefore, during period T4, voltage V1 is supplied from wiring 122A to wiring 121. This makes it easier to maintain the potential of wiring 121 at V1.

[0114] Furthermore, similar to Figure 3(E), in Figures 3(A) to (D), the second transistor 103 The terminal can be connected to wiring 121.

[0115] Furthermore, as shown in Figure 4(A), the capacitive element 105 can be omitted. The parasitic capacitance between the gate and the second terminal of transistor 101 is used as the capacitive element 105. It is possible to be there.

[0116] In Figure 4(A), the capacitive element 105 is the gate and second of the transistor 101. When using parasitic capacitance between the terminals, in transistor 101, the gate and the second terminal The parasitic capacitance between the child and the first terminal is preferably greater than the parasitic capacitance between the gate and the first terminal. Therefore, in transistor 101, a conductive layer that functions as a gate electrode and a so The area overlapping with the conductive layer that functions as a drain electrode or a junction electrode is larger than the area on the first terminal side. It is preferable that the second terminal side is larger, however, it is not limited to this.

[0117] Note that, similar to Figure 4(A), the capacitive element 105 is omitted in Figures 3(A) to 3(E). It is possible to do so.

[0118] As shown in Figure 4(B), it is possible to use a MOS capacitor as the capacitive element 105. In the example shown in Figure 4(B), a transistor 105a is used as the capacitive element 105. Transistor 105a is an N-channel type. The first terminal of transistor 105a The child and the second terminal are connected to wiring 121, and the gate of transistor 105a is the node It is connected to A. By doing this, the period during which it needs to function as a capacitive element (period During periods T1 and T2, the potential at node A is high, so the gate capacity of transistor 105a The quantity can be increased. On the other hand, there are periods when it is not necessary to function as a capacitive element (for example) During periods T3, T4, and T5, the potential of node A is low, so transistor 105 The gate capacitance of transistor a can be reduced. However, this is not limited to transistor 1 05a can be a P-channel type. Or, the first of transistor 105a One of the terminals, the first and the second, can be in a floating state. Or, the transistor The gate of transistor 105a is connected to wiring 121, and the first terminal and second terminal of transistor 105a are connected. The terminal of this terminal can be connected to node A. Alternatively, the terminal of transistor 105a can be connected to node A. It is possible to add impurities to the channel region.

[0119] Furthermore, similar to Figure 4(B), in Figures 3(A) to (E), and Figure 4(A), the capacitive elements are also shown. Transistor 105a is used as 105, and the first terminal and second terminal of transistor 105a The terminal is connected to wiring 121, and the gate of transistor 105a is connected to node A. It is possible.

[0120] As shown in Figure 4(C), it is possible to use a MOS capacitor as the capacitive element 106. In the example shown in Figure 4(C), a transistor 106a is used as the capacitive element 106. Transistor 106a is an N-channel type. The first terminal of transistor 106a The child and the second terminal are connected to node B, and the gate of transistor 106a is connected to wiring 123A. It is connected to this. However, it is not limited to this, and transistor 106a is a P-channel type. This is possible. Alternatively, one of the first and second terminals of transistor 106a is It is possible for it to be in a floating state. Alternatively, the gate of transistor 106a is at node B The first and second terminals of transistor 106a are connected to wiring 123A. It is possible to do this. Alternatively, impurities can be added to the channel region of transistor 106a. It is possible to do so.

[0121] Furthermore, similar to Figure 4(C), in Figures 3(A)-(E) and 4(A)-(B), A transistor 106a is used as the capacitive element 106, and the first terminal of transistor 106a The second terminal is connected to node B, and the gate of transistor 106a is connected to wiring 123A. It is possible to connect.

[0122] Furthermore, as shown in Figure 4(D), transistor 103 is replaced with diode 103a. This is possible. Diode 103a corresponds to transistor 103. And, Iode 103a is the current state when the potential of node B is lower than the potential of node A. The function of reducing the position, and when the potential of node B is higher than the potential of node A, node A It has the function of making node B non-conductive. One terminal of diode 103a (hereinafter The input terminal (also called the anode) is connected to node A, and the other terminal of diode 103a The output terminal (hereinafter also referred to as the cathode) is connected to node B.

[0123] Note that in Figure 4(D), if transistor 103 is replaced with diode 103a It is possible to supply voltage V2 to wiring 122B. Alternatively, wiring 123A can be supplied with voltage V2. It is possible to input an inverted signal of signal S2 (for example, an inverted clock signal).

[0124] Furthermore, similar to Figure 4(D), in Figures 3(A)-(E) and 4(A)-(C), Replace transistor 103 with diode 103a, and one terminal of diode 103a The other terminal of diode 103a is connected to node A, and the other terminal of diode 103a is connected to node B. It is possible.

[0125] Furthermore, as shown in Figure 4(E), transistor 104 is replaced with diode 104a. It is possible. In the example shown in Figure 4(E), not only transistor 104, but also the transistor Here is an example of replacing diode 103 with a diode. Diode 104a is a transient diode. This corresponds to node 104. And diode 104a is such that the potential of node A is equal to the potential of node B. When the potential is higher than the specified level, it has the function of raising the potential of node B, and when the potential of node A is higher than the specified level of node B It has the function of making node A and node B non-conductive when the potential is lower than the specified value. One terminal of diode 104a is connected to node A, and the other terminal of diode 104a is It connects to node B.

[0126] Furthermore, similar to Figure 4(E), in Figures 3(A) to (E) and Figures 4(A) to (D), Replace transistor 104 with diode 104a, and one terminal of diode 104a The other terminal of diode 104a is connected to node A, and the other terminal of diode 104a is connected to node B. It is possible.

[0127] As shown in Figure 4(F), the diode is a diode-connected transistor. It is possible to use a diode-connected transistor 103 and a diode. The connected transistors 104 are, respectively, opposite diodes 103a and 104a. The first terminal of transistor 103 is connected to node B, and the transistor 103 The second terminal and gate of transistor 104 are connected to node A. The terminal is connected to node A, and the second terminal of transistor 104 is connected to node B. However, this is not limited to the gate of transistor 103, which is connected to node B, The gate of inverter 104 can be connected to node B.

[0128] Furthermore, similar to Figure 4(F), in Figures 3(A) to (E) and Figures 4(A) to (E), The first terminal of transistor 103 is connected to node B, and the second terminal of transistor 103 is connected to node B. The child is connected to node A, and the gate of transistor 103 is connected to node A. It is possible. Alternatively, the first terminal of transistor 104 is connected to node A, and the transistor The second terminal of transistor 104 is connected to node B, and the gate of transistor 104 is connected to node A. It is possible to connect it, however, the gate of transistor 103 It is possible to connect the gate of transistor 104 to node B, which is connected to node B. That is the case.

[0129] Furthermore, as shown in Figure 5(A), it is possible to add a diode 107. Diode 107 is used when an L-level signal is input to wiring 123A, and the power of node B A function to reduce the level, and when an H level signal is input to wiring 123A, wiring 12 It has the function of making 3A and node B non-conductive. One terminal of diode 107 is It is connected to wire B, and the other terminal of diode 107 is connected to wire 123A. However, However, the other terminal of diode 107 may be connected to a different wire from wiring 123A. It is possible to continue.

[0130] Furthermore, similar to Figure 5(A), the same applies to Figures 3(A)-(E) and 4(A)-(F). A diode 107 is added, and one terminal of diode 107 is connected to node B. The other terminal of diode 107 can be connected to wiring 123A.

[0131] Furthermore, as shown in Figure 5(B), a diode-connected transistor 107a was newly added. It is possible to add. Diode-connected transistor 107a is connected to diode 1 It corresponds to 07 and is an N-channel type. The first terminal of transistor 107a is connected to wiring 123 The second terminal and gate of transistor 107a are connected to node B, and A is connected to node B. However, it is not limited to this, and transistor 107a can be a P-channel type. Alternatively, the gate of transistor 107a can be connected to wiring 123A. It is Noh.

[0132] Furthermore, similar to Figure 5(B), Figures 3(A)-(E), 4(A)-(F), and 5(A) In this case, transistor 107a is newly added, and the first terminal of transistor 107a The wiring 123A is connected, and the second terminal and gate of transistor 107a are connected to node B. It is possible to connect it. However, it is not limited to this, and the gateway of transistor 107a It is possible for node B to be connected to node T.

[0133] Furthermore, as shown in Figure 5(C), transistor 102 can be omitted.

[0134] Furthermore, similar to Figure 5(C), Figures 3(A)-(E), 4(A)-(F), and 5(A) In (B) as well, transistor 102 can be omitted.

[0135] Furthermore, as shown in Figure 5(D), circuit 100 can be omitted.

[0136] Furthermore, similar to Figure 5(D), Figures 3(A)-(E), 4(A)-(F), and 5(A) In (C) as well, circuit 100 can be omitted.

[0137] Furthermore, as shown in Figure 5(E), transistor 101, transistor 102, and transistor Transistor 103 and transistor 104 are connected to transistor 101p, transistor 102p, and It can be replaced with transistor 103p and transistor 104p. Zistars 101p to 104p correspond to transistors 101 to 104, respectively, and are P-channel. It is assumed to be a type.

[0138] Note that in Figure 5(E), the potential relationship is the opposite of that of the semiconductor device in Figure 1(A). There are many cases where this is the case. For example, voltage V2 is supplied to wiring 122A~122B, and wiring 123A~ A reversed signal of signal S2 can be input to 123B. Similarly, wiring 121 Often, the output signal is an inverted version of signal S1.

[0139] In Figure 5(E), the circuit 100 reduces the potential of node A during period T1. Often, it has the function of... Alternatively, in period T3, the potential of node A in circuit 100... Often, it has the function of raising the value to V2.

[0140] Furthermore, similar to Figure 5(E), Figures 3(A)-(E), 4(A)-(F), and 5(A) In (D) as well, transistors 101 to 104 are P-channel type transistors. It is possible to use this.

[0141] (Embodiment 2) This embodiment describes an example of a semiconductor device. The semiconductor device of this embodiment is This is a specific example of the semiconductor device described in Embodiment 1. In particular, in this embodiment, A specific example of road 100 will be described. Note that the contents described in Embodiment 1 are the same as those described in this embodiment. It can be applied to semiconductor devices in various forms.

[0142] A specific example of circuit 100 will be explained with reference to Figure 6(A). However, Figure 6(A) is a single diagram. This is just an example and is not limited to this. Circuit 100 can have various configurations other than Figure 6(A). The following circuit can be used. Note that parts similar to those in Figure 1(A) are indicated by the same reference numerals. I will omit the explanation.

[0143] Circuit 100 consists of transistors 131, 132, 133, and It has a zista 134 and a transistor 135. Transistors 131 to 135 are, It is assumed to be an N-channel type. However, transistors 131 to 135 are P-channel. It is possible for it to be a type.

[0144] The connection relationships of the transistors in circuit 100 will be explained. Transistor 131 Terminal 1 is connected to wiring 125, and the second terminal of transistor 131 is connected to node A. The gate of transistor 131 is connected to wiring 125. The first The terminal of is connected to wiring 125, and the second terminal of transistor 132 is connected to node A. The gate of transistor 132 is connected to wiring 124A. The first of transistor 133 The terminal of transistor 133 is connected to wire 122E, and the second terminal of transistor 133 is connected to wire 121. The gate of transistor 133 is connected to wiring 124B. The first terminal is connected to wiring 122C, and the second terminal of transistor 134 is connected to node A. The gate of transistor 134 is connected to wiring 126. Transistor 135 The first terminal is connected to wire 122D, and the second terminal of transistor 135 is connected to wire 121. The gate of transistor 135 is connected to wire 126.

[0145] Input to wires 122C~122E, 124A~124B, 125, and 126. This section describes some examples of things that can be manipulated (for example, signals, voltages, or currents). Furthermore, the following is just one example and not limited to it. Each wiring is as follows: In addition to objects, various other things can be input, and each wire can be left floating (hereinafter referred to as "floating"). It is possible to set it to a (running) state.

[0146] Voltage V1 is supplied to wiring 122C to 122E, just like wiring 122A and wiring 122B. It is assumed that this has been done. Therefore, wiring 122C~122E functions as a power line. This is possible. However, it is not limited to this, and the clock signal can be connected to wiring 122C~122E. Any signal can be input. In this case, wiring 122C~122E is the signal line and It is possible to function in this way. Alternatively, separate voltages can be supplied to the wiring 122C~122E. It is possible to supply it.

[0147] As an example, let's assume that signal S3 is input to wiring 124A~124B. Therefore, wiring 124A~124B can function as signal lines. Signal S3 is, Often, it is the inverted signal of signal S2, or a signal whose phase is approximately 180° different from that of signal S2. It can function as an inverted clock signal (CKB). However, it is not limited to this. In this case, the wiring 124A to 124B can be supplied with voltage. Lines 124A and 124B can function as power lines. Alternatively, wiring 124 It is possible to input different signals to A, B, C, D, and B.

[0148] As an example, let's assume that signal S4 is input to wiring 125. Therefore, wiring 12 5 can function as a signal line. Signal S4 has both L level and H level. Often, these are digital signals, consisting of a start signal (SP) and a transmission from another row (stage). It functions as a signal to select a number or another row. However, it is not limited to this, wiring 125 It is possible to supply voltage to it. In this case, wiring 125 functions as a power line. It is possible to do so.

[0149] As an example, let's assume that signal S5 is input to wiring 126. Therefore, wiring 12 6 can function as a signal line. Signal S5 has both L level and H level. Often these are digital signals, and they are either reset signals (RE) or signals to select a different row. It functions as such. However, it is not limited to this, and voltage can be supplied to wiring 126. Yes, it is possible. In this case, wiring 126 can function as a power line.

[0150] An example of the functions of transistors 131-135 will be described below. The content described is an example and is not limited to it. Transistors 131-135 are described below. In addition to the function described below, it is possible to have various other functions, and it is also possible to have functions that are not described below. It is also possible to do so.

[0151] Transistor 131, in response to the signal input to wiring 125 (e.g., signal S4), It has the function of raising the potential of A and functions as a diode. Transistor 132 is Depending on the signal input to wiring 124A (for example, signal S3), wiring 125 and node A and It has the function of controlling the timing of conduction and functions as a switch. Transistor 1 33, depending on the signal input to wiring 124B (for example, signal S3), connects to wiring 122E and It has the function of controlling the timing of conductivity with line 121 and functions as a switch. The inverter 134 responds to the signal (e.g., signal S5) input to wiring 126, It has the function of controlling the timing of conductivity between 2C and node A, and functions as a switch. Transistor 135, in response to the signal (e.g., signal S5) input to wiring 126, It has a function to control the timing of electrical conductivity between wire 122D and wiring 121, and acts as a switch. It works.

[0152] Next, regarding the operation of the semiconductor device in Figure 6(A), see Figures 6(B), 7(A)~(C), and This will be explained with reference to Figures 8(A) and 8(B). Figure 6(B) is used to explain the operation of the semiconductor device. This is an example of a timing chart, with periods T1, T2, T3, T4, and It has a period T5. Figure 7(A) shows a model of the operation of the semiconductor device in Figure 6(A) during period T1. The diagram is shown. Figure 7(B) is a schematic diagram of the operation of the semiconductor device in Figure 6(A) during period T2. Figure 7(C) shows a schematic diagram of the operation of the semiconductor device in Figure 6(A) during period T3. Figure 8(A) shows a schematic diagram of the operation of the semiconductor device in Figure 6(A) during period T4. B) shows a schematic diagram of the operation of the semiconductor device in Figure 6(A) during period T5. Note that Figure 1( The parts that are common to the operation of the semiconductor device in A) will be omitted from the explanation.

[0153] First, during period T1, signal S5 is at a low level, so transistor 134 and Rangitator 135 is turned off. Therefore, wiring 122C and node A become non-conductive. Wiring 122D and wiring 121 become non-conductive. At the same time, signals S3 and S4 Since it becomes H level, transistors 131, 132, and 13 Turn 3 on. Then, wiring 125 and node A become conductive, and wiring 122E and The wire 121 and the other wire become conductive. Therefore, the signal (high-level signal S) input to the wiring 125 is 4) Since power is supplied from wiring 125 to node A, the potential of node A begins to rise. As a result, wiring 122E and wiring 121 become conductive, so voltage V1 is supplied from wiring 122E. It is supplied to line 121. Then, the potential of node A is equal to the potential (V1) of the H level of signal S4. Then, subtract the threshold voltage of transistor 133 (Vth131) to get (V1-Vth131). When the voltage rises, transistor 131 turns off. Similarly, the potential of node A is the signal Subtract the threshold voltage (Vth132) of transistor 132 from the high-level potential (V1) of S3. When the value rises to (V1-Vth132), transistor 132 turns off. When transistors 131 and 132 are turned off, a charge is supplied to node A. The supply will cease. Therefore, the potential of node A will be high (at least V1 + Vth101 or higher). ) remains maintained, and node A enters a floating state. Here, for convenience, the potential of node A is When V1-Vth131 occurs, transistors 131 and 132 are turned off. It shall be assumed that... Therefore, wiring 125 and node A will be in a non-conductive state. At this time node A The potential remains V1-Vth131, and node A remains in a floating state.

[0154] Next, during period T2, signal S4 becomes low, so transistor 131 is turned off. This remains the case. And since signal S3 becomes low, transistor 132 remains off. Therefore, transistor 133 turns off. Thus, wiring 125 and node A are non-conductive. The state remains unchanged, and wiring 122E and wiring 121 become non-conductive. At this time, signal S5 Since it remains at the L level, transistors 134 and 135 remain off. Yes. Therefore, wiring 122C and node A remain non-conductive, and wiring 122D and The connection to line 121 remains non-conductive.

[0155] Next, during period T3, since signal S4 remains at a low level, transistor 131 is turned off. It remains the same. And since signal S5 becomes high level, transistor 134 and the transistor The inverter 135 turns on. Then, wiring 122C and node A become conductive, and the wiring The wire 122D and the wiring 121 become conductive. Therefore, the voltage V1 is no longer connected to the wiring 122C. Since it is supplied to node A, the potential of node A decreases to V1. Similarly, voltage V1 Since the current is supplied from wiring 122D to wiring 121, the potential of wiring 121 becomes V1. It decreases. At the same time, the signal S3 becomes high level, so transistor 132 and the transistor Node 133 turns on. Then, wiring 125 and node A become conductive, and wiring 12 2E and wiring 121 become conductive. Therefore, an L-level signal S4 is supplied to node A. Therefore, the potential of node A decreases to V1. Similarly, voltage V1 is applied to wiring 121 Since it is supplied to the circuit, the potential of wiring 121 decreases to V1.

[0156] Next, during period T4, the signal S4 remains at a low level, so transistor 131 is turned off. It remains the same. And since signal S5 becomes L level, transistor 134 and the transistor The inverter 135 turns off. Therefore, wiring 122C and node A become non-conductive. Wiring 122D and wiring 121 become non-conductive. At this time, signal S4 becomes low. Therefore, transistors 132 and 133 are turned off. Thus, wiring 125 Node A and wire 122E become non-conductive, and wire 121 and wire 122E become non-conductive.

[0157] Next, during period T5, since signal S4 remains at a low level, transistor 131 is turned off. It remains the same. And since signal S5 remains at the L level, transistor 134 and Rangitator 135 remains off. Therefore, wiring 122C and node A are not conductive. This remains the case, and wiring 122D and wiring 121 remain in a non-conductive state. At this time, the signal Since S4 becomes high, transistors 132 and 133 turn on. Then, wiring 125 and node A become conductive, and wiring 122E and wiring 121 become conductive. The circuit becomes open. Therefore, an L-level signal S4 is supplied from wiring 125 to node A. The potential at node A is maintained at V1. Similarly, the voltage V1 is maintained from wire 122E to wire 121 Since it is supplied to V1, the potential of wiring 121 is maintained at V1.

[0158] The semiconductor device in Figure 6(A) receives an L-level signal at node A during periods T4 and T5. Alternatively, since voltage V1 is supplied, the noise at node A can be reduced. Therefore, This can prevent the action from occurring.

[0159] Alternatively, the semiconductor device in Figure 6(A) has transistor 131 and transistor 131 during period T1. Since both STA132 and STA132 are turned on, the potential of node A can be raised more quickly. Alternatively, reduce the channel width of transistor 131 or transistor 132. It can be done.

[0160] Note that the channel width of transistor 131 is the same as the channel width of transistor 134, or It is possible to have a channel width greater than that of transistor 103. Similarly, transistor 13 The channel width of 2 is the channel width of transistor 134, or the channel width of transistor 103 It is possible to have a range greater than the width. This is because, during period T2, the potential of node A is A rapid increase is preferable, and in period T3, a slow decrease in the potential of node A is preferable. This is because... In other words, if the potential of node A rises quickly during period T2, the driving frequency... This allows for improvements in wavenumber, suppression of through-current, and reduction of power consumption. On the other hand, during period T In step 3, if the decrease in the potential of node A is slow, the on-time of transistor 101 will be longer. Therefore, the falling time of the signal output from wiring 121 (for example, signal S1) is shortened. Therefore, it is possible to have a function that raises the potential of node A during period T2. The channel width of the transistor reduces the potential of node A during period T3. Preferably, it is larger than the channel width of transistor 1. However, it is not limited to this, The channel width of 31 is the channel width of transistor 134, or the channel width of transistor 103. It is possible to have a channel width smaller than the channel width. Similarly, the channel width of transistor 132 is The channel width must be smaller than that of transistor 134 or transistor 103. This is possible.

[0161] Furthermore, the sum of the channel width of transistor 131 and the channel width of transistor 134 is The channel width must be greater than that of transistor 134 or transistor 103. This is possible because, during period T2, the H-level signal S4 is transmitted through transistor 13 Through two transistors connected in parallel, namely transistor 132, wiring 12 This is because it is supplied from 5 to node A. However, it is not limited to this, and transistor 131 The sum of the channel width of the transistor and the channel width of transistor 134 is the channel width of transistor 134. The channel width can be smaller than the channel width of transistor 103.

[0162] Furthermore, the channel width of transistor 134 is smaller than the channel width of transistor 133. It is possible to do so. Similarly, the channel width of transistor 132 is the same as that of transistor 133 It is possible to have a channel width smaller than that. Similarly, the channel width of transistor 103 This can be smaller than the channel width of transistor 102. This is because wiring 1 21 loads (e.g., wiring resistance, parasitic capacitance, connected transistors, etc.) are located at node A This is because it is often greater than the load. Therefore, supplying a signal or voltage to node A The channel width of the transistor having the function of supplying a signal or voltage to the wiring 121 It is preferable that it be smaller than the channel width of the transistor. However, it is not limited to this, The channel width of transistor 134 can be greater than the channel width of transistor 133. It is possible. Similarly, the channel width of transistor 132 is the channel width of transistor 133. It is possible for it to be larger than the width. Similarly, the channel width of transistor 103 is It is possible to have a channel width larger than that of the ZISTA 102.

[0163] Furthermore, the channel width of transistor 103 is larger than the channel width of transistor 132. This is possible because transistor 103 is at node A during period T4. While transistor 132 has the function of maintaining the position at V1 during period T5, transistor 132 has the function of maintaining the position at V1 during period T5. This is because it has the function of maintaining the potential of A at V1. Specifically, during period T4, The signal input to line 123B (for example, signal S2) becomes high level. At this time, node A When the potential rises and transistor 101 turns on, the potential of wiring 121 rises. Therefore, transistor 103 maintains the potential of node A at V1, Since it is required that transistor 101 be kept off, the channel of transistor 103 A larger width is preferable. On the other hand, during period T5, the signal input to wiring 123B (e.g. For example, signal S2) will be at an L level, so even if transistor 101 is turned on, wiring 121 The potential does not rise. In other words, even if the potential of node A rises or falls from V1, the wiring 12 The potential at 1 does not rise. Therefore, it is necessary to reduce the on-resistance of transistor 132. Since there are few, it is preferable that the channel width of transistor 132 be small. However, Not limited to this, the channel width of transistor 103 is less than the channel width of transistor 132. It is possible to make it even smaller. This is because transistor 132, during period T1, This is because it has the function of raising the potential of channel A. By increasing the width, the potential of node A can be raised more quickly.

[0164] Furthermore, the channel width of transistor 102 is smaller than the channel width of transistor 133. This is possible because if the channel width of transistor 102 is made too large, During period T2, the potential of node A decreases too much, causing the semiconductor device to malfunction. Specifically, both transistor 102 and transistor 133 are connected to wiring 1. It has the function of maintaining the potential of 21 at V1. However, during period T2, the power of wiring 121 The position is determined by the potential (V1) of the wiring 123C to the threshold voltage (Vth102) of transistor 102. Transistor 102 remains on until the value increases to the subtracted value (V1 - Vth102). Therefore, in order to prevent the potential of node A from decreasing too much during period T2, It is preferable that the channel width of transistor 102 is small. On the other hand, transistor 133 The channel width is preferably large in order to maintain the potential of wiring 121 at V1. Furthermore, and not limited to this, the channel width of transistor 102 is the channel width of transistor 133. It is possible to have a width greater than the channel width. This is because, during period T4, the signal S2 reaches a high level. This is because when it becomes a transistor, the potential of wiring 121 is likely to rise. By increasing the channel width of the zista 102, the rise in potential of the wiring 121 is suppressed. Because it can be done cheaply.

[0165] Furthermore, similar to Embodiment 1, wiring 124A, wiring 124B, wiring 125, and / or The potential of the L level signal input to wiring 126 can be lower than V1. Since transistors 132 and 133 remain on for a long time, wiring 12 The low-level potential of the signals input to 4A and wiring 124B should preferably be lower than V1. It seems so.

[0166] In addition, as in Embodiment 1, wiring 124A, wiring 124B, wiring 125, or wiring 12 The high-level potential of the signal input to 6 can be lower than that of V2. In particular, Transistor 132 and transistor 133 are prone to degradation, so wiring 124A and wiring The potential of the H level signal input to 124B is preferably lower than V2.

[0167] In addition, similar to Embodiment 1, a signal is sent to wiring 122C, wiring 122D, or wiring 122E. It is possible to input. For example, the transistor 134 is turned on in wiring 122C. It is possible to input a signal that is at an L level during a specific period (for example, period T3). Examples include signal S2 or signal S4. The wiring 122D has transistor 13 It is possible to input a signal that is at an L level during the period when 5 is ON (for example, period T3). Yes, there are. One example is signal S2 or signal S4. Wiring 122E has a transistor L level during the period when ngista 133 is turned on (for example, period T1, period T3, period T5) It is possible to input signals such as signals S2 and S3. be.

[0168] Note that in Figure 13(C), as an example, the first terminal of transistor 103 is connected to wiring 124B. The first terminal of transistor 104 is connected to the wiring 126, and transistor 1 The first terminal of 33 is connected to wiring 123A, and the first terminal of transistor 134 is connected to wiring 1 When connected to 23A, and the first terminal of transistor 135 is connected to wiring 123A The configuration is shown. However, it is not limited to this, and the first terminal of transistor 103 is connected to wiring 12 It can be connected to 4A, or to wiring 125. Alternatively, the third of transistor 133. Terminal 1, the first terminal of transistor 134, or the first terminal of transistor 135 are It can be connected to wiring 121, wiring 123B, wiring 123C, or wiring 126. ru.

[0169] Furthermore, similar to Embodiment 1, wiring 124A, wiring 124B, and / or wiring 126 It is possible to supply voltage (for example, voltage V1 or voltage V2). Therefore, the semiconductor device can function as an inverter circuit or a buffer circuit. Yes.

[0170] As shown in Figure 9(A), the same signal (for example) is transmitted through wiring 124A and wiring 124B. Since signal S3 is input, it is possible to share wiring 124A and wiring 124B. Yes. For this reason, the gates of transistor 132 and transistor 133 are It is connected to wiring 124. Wiring 124 corresponds to wiring 124A or wiring 124B, It is possible to input something similar to those wires.

[0171] Figure 9(C) shows the configuration when Figure 3(C) and Figure 9(A) are combined. Example For example, the first terminal of transistor 101, the gate of transistor 102, and the capacitive element 1 One electrode of 06 is connected to wiring 123. The gate of transistor 132, and the transistor The gate of transistor 133 is connected to wiring 124. The first terminal of transistor 103 , the first terminal of transistor 104, the first terminal of transistor 133, transistor 1 The first terminal of 34 and the first terminal of transistor 135 are connected to wiring 122.

[0172] As shown in Figure 9(C), the gate of transistor 131 is connected to wiring 127. This is possible. For example, voltage V2 is supplied to wiring 127, and power supply It can function as a line. However, it is not limited to this; the wiring 127 can also carry current. It is possible to input various things such as voltage and signals. For example, input to wiring 127 The signal is to be at an H level during period T1 and at an L level during period T2. It is preferable to input signal S3 to wiring 127. In this case, wiring 1 27 can be connected to wiring 124A or wiring 124B, and as a signal line It is possible for it to function.

[0173] Note that in Figure 9(C), the gate of transistor 131 is connected to wiring 127. However, it is not limited to this. For example, the first terminal of transistor 131 is in contact with wiring 127. This allows the gate of transistor 131 to be connected to wiring 125.

[0174] Furthermore, similar to Figure 9(C), in Figures 9(A) and 9(B), the gate of transistor 131 It is possible to connect to wiring 127.

[0175] Furthermore, as shown in Figure 10(A), transistor 131 can be omitted. Even if transistor 131 is omitted, transistor 132 will turn on during period T1. Therefore, the potential at node A increases.

[0176] Note that, similar to Figure 10(A), transistor 131 is omitted in Figures 9(A) to (C). It can be abbreviated.

[0177] Furthermore, as shown in Figure 10(B), transistor 132 can be omitted. Even if transistor 132 is omitted, node A will remain in a floating state during period T5. The potential at node A is maintained at V1.

[0178] Furthermore, similar to Figure 10(B), in Figures 9(A) to (C), and Figure 10(A), the tiger It is possible to omit the `njista132`.

[0179] Note that, as shown in Figure 10(C), transistors 134 and 135 are omitted. It is possible to do so. Alternatively, one of transistors 134 and 135 can be omitted. It is possible to omit it. Even if transistor 134 is omitted, in period T3, Since inverter 132 is turned on, the potential of node A decreases to V1. Even if transistor 135 is omitted, transistor 133 turns on during period T3. Therefore, the potential of wiring 121 decreases to V1.

[0180] Furthermore, similar to Figure 10(C), in Figures 9(A)-(C) and 10(A)-(B) Also, transistors 134 and 135 can be omitted.

[0181] Furthermore, as shown in Figure 11(A), transistor 133 can be omitted. Even if the transistor 133 is omitted, the wiring 121 will be in a floating state during period T5. The potential of wiring 121 is maintained at V1.

[0182] Furthermore, similar to Figure 11(A), in Figures 9(A)-(C) and 10(A)-(C) However, transistor 133 can be omitted.

[0183] Furthermore, as shown in Figure 11(B), transistor 102 can be omitted. Even if the transistor 102 is omitted, the wiring 121 will be in a floating state during period T4. The potential of wiring 121 is maintained at V1.

[0184] Furthermore, similar to Figure 11(B), Figures 9(A)-(C), 10(A)-(C), and Figure 11 In (A) as well, transistor 102 can be omitted.

[0185] As shown in Figure 11(C), transistor 103, transistor 104, and capacitor Element 106 can be omitted. Transistors 103, 104, and Even if the capacitance element 106 is omitted, the wiring 121 will be in a floating state during period T4. The potential of wiring 121 is maintained at V1.

[0186] Furthermore, similar to Figure 11(C), Figures 9(A)-(C), 10(A)-(C), and Figure 11 In (A) and (B), transistor 103, transistor 104, and capacitive element 1 The "06" can be omitted.

[0187] Furthermore, as shown in Figure 12(A), transistor 133 can be replaced with diode 133a. It is possible to do so. Diode 133a corresponds to transistor 133. When a low-level signal is input to wiring 124B, the potential of wiring 121 is... A function to reduce, and when an H-level signal is input to wiring 124B, wiring 124B It has the function of making the wiring 121 non-conductive. One terminal of diode 133a ( The lower input terminal (also called the anode) is connected to wiring 121, and the other side of diode 133a The terminal (hereinafter also referred to as the output terminal or cathode) is connected to wiring 124B.

[0188] Note that in Figure 12(A), if transistor 133 is replaced with diode 133a... In addition, it is possible to input signal S2 to wiring 124B. Therefore, wiring 124B Connects to wires 123A~123C and shares wiring 124B with wirings 123A~123C. It is possible.

[0189] Furthermore, similar to Figure 12(A), Figures 9(A)-(C), 10(A)-(C), and Figure 11 In (A) to (C), the transistor 133 is replaced with diode 133a, and the die One terminal of diode 133a is connected to wiring 121, and the other terminal of diode 133a It can be connected to wiring 124B.

[0190] Furthermore, as shown in Figure 12(B), it is possible to connect transistor 133 via diode connection. The diode-connected transistor 133 corresponds to diode 133a. The first terminal of transistor 133 is connected to wiring 124B, and the second terminal of transistor 133 is connected to wiring 124B. The terminal of is connected to wiring 121, and the gate of transistor 133 is connected to wiring 121. However, this is not limited to the gate of transistor 133 being connected to wiring 124B. It is possible to do so.

[0191] In addition, similar to Figure 12(B), Figures 9(A)~(C), Figure 10(A)~(C), and Figure 11(A) )~(C), and also in Figure 12(A), the first terminal of transistor 133 is connected to wiring 12 Connected to 4B, the second terminal of transistor 133 is connected to wiring 121, and the transistor The gate of Ta 133 can be connected to wiring 121. However, it is not limited to this. Furthermore, the gate of transistor 133 can be connected to wiring 124B.

[0192] Furthermore, as shown in Figure 12(C), transistor 134 can be replaced with diode 134a. It is possible to replace transistor 135 with diode 135a. 134a corresponds to transistor 134, and diode 135a corresponds to transistor 135 This corresponds to the diode 134a when an L-level signal is input to wiring 126. The function of reducing the potential of node A, and when an H-level signal is input to wiring 126. The diode 135a has the function of making the wiring 126 and node A non-conductive. When an L-level signal is input to line 126, the function of reducing the potential of wiring 121, and When an H-level signal is input to wiring 126, wiring 126 and wiring 121 are deconducted. It has the function of setting the state. One terminal of diode 134a (hereinafter referred to as the input terminal or anode and (Also known as) is connected to node A, and the other terminal of diode 134a (hereinafter referred to as the output terminal or The cathode (also called the cathode) is connected to wiring 126. One terminal of diode 135a (hereinafter referred to as input) The terminal (also called the anode) is connected to the wiring 121, and the other terminal of the diode 135a ( The output terminal (hereinafter also referred to as the cathode) is connected to wiring 126.

[0193] Note that in Figure 12(C), transistors 134 and 135 are diodes. When replacing with D, for example, the inverted signal of signal S5 is input to wiring 126. This is possible.

[0194] Note that in Figure 12(C), only one of transistors 134 and 135 is used. It can be replaced with a diode.

[0195] In addition, similar to Figure 12(C), Figures 9(A)-(C), 10(A)-(C), and 11(A) In Figures )~(C) and 12(A)~(B), transistor 134 is replaced with diode 1 Replace with 34a, and one terminal of diode 134a is connected to node A, diode The other terminal of 134a can be connected to wiring 126. Alternatively, the transistor Replace diode 135 with diode 135a, and connect one terminal of diode 135a to wiring 12 It is connected to 1, and the other terminal of diode 135a can be connected to wiring 126. be.

[0196] Furthermore, as shown in Figure 13(A), transistors 134 and 135 are die-cut. It is possible to connect them with diodes. Diode-connected transistor 134, and the diode The diode-connected transistor 135 is connected to diodes 134a and 135a, respectively. Corresponding. The first terminal of transistor 134 is connected to wiring 126, and transistor 1 The second terminal of transistor 34 is connected to node A, and the gate of transistor 134 is connected to node A. The connection is made. The first terminal of transistor 135 is connected to wire 126, and the transistor The second terminal of transistor 135 is connected to wiring 121, and the gate of transistor 135 is , and is connected to wiring 121. However, it is not limited to this, and the gate of transistor 134 is It can be connected to wiring 126, and the gate of transistor 135 is connected to wiring 12 It can be connected to 6.

[0197] In addition, similar to Figure 13(A), Figures 9(A)-(C), 10(A)-(C), and 11(A) In Figures 12(A) to (C), the first terminal of transistor 134 is The wiring 126 is connected, and the second terminal of transistor 134 is connected to node A, The gate of ZISTA 134 can be connected to node A. Alternatively, the transistor The first terminal of transistor 135 is connected to wire 126, and the second terminal of transistor 135 is connected to wire 1 It is connected to 21, and the gate of transistor 135 can be connected to wiring 121. However, it is not limited to this, and the gate of transistor 134 is connected to wiring 126. It is possible for the gate of transistor 135 to be connected to wiring 126. It is Noh.

[0198] Furthermore, as shown in Figure 13(B), transistors 137 and 138 are newly... It is possible to add to it. Transistors 137 and 138 are N-channel It shall be a Nell type. However, it shall not be limited to this, and transistor 137 and the transistor Transistor 138 can be a P-channel type. The first terminal of transistor 137 The child is connected to wire 122F, and the second terminal of transistor 137 is connected to wire 121. The gate of transistor 137 is connected to wiring 128. The first terminal is connected to wiring 122G and the second terminal of transistor 138 is connected to node A. The gate of transistor 138 is connected to wire 128. Wire 128 has As an example, let's assume that signal S6 is input. Therefore, wiring 128 functions as a signal line. It is possible to do so. Signal S6 is a digital signal having high and low levels. In many cases, it can function as a reset signal for all stages. Wiring 122F, And, as an example, voltage V1 is supplied to wiring 122G. Therefore, wiring 1 Wiring 22F and 122G can function as power lines. And wiring 1 It is possible to share 22A~122G. In this case, the first of transistor 137 The terminal and the first terminal of transistor 138 are connected to the wiring 122, as shown in Figure 11(B). It is possible to continue. However, wiring 128, wiring 122F, and wiring 122G are It is possible to input various things such as current, voltage, and signals.

[0199] In Figure 13(B), signal S6 is present during the period before the semiconductor device starts operating. And it is possible to reach the H level. Alternatively, the semiconductor device shown in Figure 13(B) shifts When used in a register, signal S6 is used during the period before the shift register starts scanning. Alternatively, the shift register may be at an H level during the period after the scan has finished. Yes. Therefore, the signal S6 is the start pulse of the shift register, or the shift register It is possible to use the output signal of the final stage of the ZISTA, etc. However, this is an example of the embodiment. This is not limited to this.

[0200] Note that in Figure 13(B), only one of transistors 137 and 138 is used. It is possible to add new entries.

[0201] In addition, similar to Figure 13(B), Figures 9(A)~(C), 10(A)~(C), and 11(A) In Figures 12(A) and 13(A), transistor 137 A new component is added, and the first terminal of transistor 137 is connected to wiring 122F, and the transistor The second terminal of transistor 137 is connected to wire 121, and the gate of transistor 137 is connected to wire 1 It is possible to connect to 28. Alternatively, a new transistor 138 can be added, The first terminal of transistor 138 is connected to wiring 122G and the second terminal of transistor 138 It is possible that node A is connected to the gate of transistor 138 and wire 128 is connected to the gate of transistor 138. It is Noh.

[0202] (Embodiment 3) This embodiment describes an example of a shift register. The shift register of this embodiment The sta can have semiconductor devices according to Embodiment 1 and Embodiment 2. The shift register can be described as a semiconductor device or a gate driver. The contents described in Embodiment 1 and Embodiment 2 are the shift register of this embodiment. It can be applied to [this].

[0203] First, an example of a shift register will be explained with reference to Figure 14(A). T220 is wiring 201_1~201_N (N is a natural number), wiring 202, wiring 203, It is connected to wiring 204, wiring 205, and wiring 206.

[0204] Wiring 202 is the same as wiring 123 (wiring 12) described in Embodiment 1 and Embodiment 2. Corresponding to wiring 3A~123C), or wiring 124 (wiring 124A~124B), signal lines, or It can function as a clock signal line. And wiring 202 is connected to circuit 221 From there, the signal GS2 is assumed to be input. The signal GS2 is, in Embodiment 1 and the embodiment It corresponds to signal S2 or signal S3 as described in state 2, and functions as a clock signal. This is possible.

[0205] Wiring 203 is the same as wiring 123 (wiring 12) described in Embodiment 1 and Embodiment 2. Corresponding to wiring 3A~123C), or wiring 124 (wiring 124A~124B), signal lines, or It can function as a clock signal line. And wiring 203 is connected to circuit 221 From there, signal GS3 is assumed to be input. Signal GS3 is, Embodiment 1 and Embodiment In state 2, this corresponds to signal S2 or signal S3 and functions as an inverting clock signal. It is possible.

[0206] Wiring 204 is the same as wiring 122 (wiring 12) described in Embodiment 1 and Embodiment 2. It supports 2A~122G and can function as a power line. And wiring 20 It is assumed that voltage V1 is supplied to 4 from circuit 221.

[0207] Wiring 205 corresponds to wiring 125 described in Embodiment 1 and Embodiment 2, It can function as a signal line. And wiring 205 receives signals from circuit 221. The signal GS4 is assumed to be input. Signal GS4 is in Embodiment 1 and Embodiment 2. Corresponding to the signal S4 described below, this corresponds to the start signal (hereinafter referred to as the start pulse), or vertical synchronization. It can function as a signal.

[0208] Wiring 206 corresponds to wiring 126 described in Embodiment 1 and Embodiment 2, It can function as a signal line. And wiring 206 receives signals from circuit 221. The signal GS5 is assumed to be input. Signal GS5 is in Embodiment 1 and Embodiment 2. It corresponds to the signal S5 described below and can function as a reset signal.

[0209] However, this is not limited to the above; wiring 202-206 may carry various signals, voltages, or currents. It is possible to input data, and it is also possible to make each wire float.

[0210] As shown in Figure 6(C), signal S2 or signal S3 is an unbalanced clock signal. It is possible to use a number. In this case, as an example, signal S3 is, It is possible to assume that the phase is shifted by 180°. By doing so, the form of this implementation When a semiconductor device is used in a shift register, the selection signal of one stage affects the stages before and after it. This prevents overlap with the selection signal.

[0211] Wiring 201_1 to 201_N are the wiring described in Embodiment 1 and Embodiment 2. It corresponds to 121 and can function as a gate line or a scan line. And wiring Signals GS1_1 to GS1_N are output from 201_1 to 201_N, respectively. GS1_1 to GS1_N are signals S1 described in Embodiment 1 and Embodiment 2. It is compatible with and can function as an output signal, selection signal, scan signal, or gate signal. be.

[0212] As shown in Figure 14(B), signals GS1_1 to GS1_N are derived from signal GS1_1. The levels become H in order. For example, if the signal GS1_i-1 (where i is one of 1 to N) is H Let's assume it becomes a bell. Then, when signals GS2 and GS3 are reversed, signal GS1_i -1 becomes L level, and signal GS1_i becomes H level. After that, signal GS2, and When signal GS3 is inverted, signal GS1_i becomes low, and signal GS1_i+1 becomes high. This results in a high level. Thus, signals GS1_1 to GS1_N sequentially become high levels. (Rewording) Then, wiring 201_1 to 201_N are selected in order.

[0213] Circuit 221 supplies signals or voltages to shift register 220, and shift register 22 It has the function of controlling 0 and can function as a control circuit or controller. Yes. In this embodiment, circuit 211 consists of wiring 202, wiring 203, wiring 204, and wiring 2 05 and wiring 206 are connected to signals GS2, GS3, voltage V1, GS4, and signal respectively. GS5 shall be supplied. However, it shall not be limited to this, and the shift register 220 may also be supplied. It can also supply signals, current, or voltage to various circuits and control these circuits. It is possible. For example, circuit 221 is a signal line drive circuit, a scan line drive circuit, and / or a pixel It is possible to supply signals or voltages to these circuits and control them.

[0214] Circuit 221 includes, for example, circuits 222 and 223. Circuit 222 is It has the function of generating power supply voltages such as positive power supply voltage, negative power supply voltage, ground voltage, and reference voltage. It can function as a power supply circuit or a regulator. Circuit 223 is a cross Clock signals, inverted clock signals, start signals, reset signals, and / or video signals, etc. It has the ability to generate various signals and can function as a timing generator. However, it is not limited to this, and in addition to circuits 222 and 223, circuit 221 also includes It is also possible to have various circuits or various elements. For example, circuit 221 is O Syrator, level shift circuit, inverter circuit, buffer circuit, DA conversion circuit, AD conversion Circuits, operational amplifiers, shift registers, lookup tables, coils, transistors, capacity It may include quantitative elements, resistive elements, and / or frequency dividers.

[0215] Next, an example of the shift register 220 will be explained with reference to Figure 15. A register consists of multiple flip-flops called 200_1 to 200_N (where N is a natural number). It has a flip-flop. Flip-flops 200_1 to 200_N are each in their respective implementation forms. This corresponds to the semiconductor device described in Embodiment 1 and Embodiment 2. Figure 15 shows an example. Next, we show the configuration when the semiconductor device shown in Figure 9(B) is used as a flip-flop.

[0216] Let's explain the connections of the shift register. First, as an example, flip-flop 20 Let's explain the connection relationship of 0_i. In flip-flop 200_i, wiring 121 Wiring 122, 123, 124, 126, and 127 are, respectively, wire 2 01_i, Wiring 204, Wiring 202, Wiring 203, Wiring 201_i-1, Wiring 201_i It is connected to +1. However, odd-numbered flip-flops and even-numbered flip-flops Often, the connections of wires 123 and 124 are reversed. For example, odd-numbered rows In the flip-flop, wire 123 is connected to wire 202, and wire 124 is connected to wire 20 Let's assume it's connected to 3. In this case, for even-numbered flip-flops, wires 123 become wire 2 Wiring 124 is connected to wire 202, and wire 03 is connected to wire 204. Meanwhile, odd-numbered flip-flows In the top, wire 123 is connected to wire 203, and wire 124 is connected to wire 202. Let's assume that in this case, in an even-numbered flip-flop, wire 123 is connected to wire 202. Wiring 124 is then connected to wiring 203.

[0217] In flip-flop 200_1, wire 125 is connected to wire 205.

[0218] In flip-flop 200_N, wiring 126 is connected to wiring 206.

[0219] Next, regarding an example of the operation of the shift register in Figure 15, see the timing chart in Figure 14(B). This will be explained by referring to [the relevant section]. Note that the operation of the semiconductor device in Embodiment 1 and Embodiment 2 is common to both. Where necessary, the explanation will be omitted.

[0220] Let's explain the operation of flip-flop 200_i. First, when the signal GS1_i-1 is high... The bell rings. Then, the flip-flop 200_i starts operating during period T1, and the signal G S1_i becomes low. Then, signals GS2 and GS3 are inverted. Then, Flip-flop 200_i begins operation during period T2, and signal GS1_i reaches high level. The signal GS1_i is entered into flip-flop 200_i-1 as a reset signal. It is then powered and input to flip-flop 200_i+1 as a start signal. Flip-flop 200_i-1 starts operating during period T3, flip-flop P200_i+1 starts operation during period T1. Subsequently, signal GS2 and signal GS3 flips again. Then, flip-flop 200_i+1 moves during period T2. The operation begins, and signal GS1_i+1 becomes high level. Signal GS1_i+1 is flipped This is input to flip-flop 200_i as a reset signal. Therefore, flip-flop 20 Since 0_i starts operation during period T3, signal GS1_i becomes L level. Subsequently, Until the signal GS1_i-1 reaches a high level again, the flip-flop 200_i will be the signal Each time GS2 and signal GS3 are reversed, the operation in period T4 and the operation in period T5 Repeat the process.

[0221] Note that flip-flop 200_1 replaces the output signal of the previous flip-flop. Then, signal GS4 is input from an external circuit via wiring 205. Therefore, when signal GS4 is H When it reaches level 200_1, flip-flop 200_1 begins its operation during period T1.

[0222] Note that in flip-flop 200_N, instead of the output signal of the next stage flip-flop... Then, signal GS5 is input from an external circuit via wiring 206. Therefore, signal GS5 is H When it reaches the required level, the flip-flop 200_N begins its operation during period T3.

[0223] The shift register of this embodiment uses the semiconductor devices of Embodiment 1 and Embodiment 2. By doing so, similar advantages to those of the semiconductor device in question can be obtained.

[0224] Note that wiring 206 can be omitted. In this case, as an example, flip-flop As P200_N, transistor 134 and transistor as shown in Figure 10(C) It is possible to use a configuration that omits 135.

[0225] Note that in flip-flops 200_1 to 200_N, a signal is used instead of voltage V1. If present, wiring 204 can be omitted.

[0226] In addition, the signal GS4 can be input to wiring 206, just like to wiring 205. In this case, by connecting wiring 206 to wiring 205, wiring 205 and wiring 206 It is possible to share the signal GS2 on wiring 206, similar to wiring 202. It is possible for this to be input. In this case, by connecting wiring 206 to wiring 202 Therefore, it is possible to share wiring 206 and wiring 202. Alternatively, wiring 206 can In the same way as wiring 203, signal GS3 can be input. In this case, wiring 206 By connecting it to wiring 203, it is possible to share wiring 206 and wiring 203. Alternatively, voltage V1 can be input to wiring 206, similar to wiring 204. Yes. In this case, by connecting wire 206 to wire 204, wire 206 and wire 2 It is possible to share it with 04.

[0227] Note that, as flip-flops 200_1 to 200_N, the signal S6 is as shown in Figure 13(B). If a configuration requiring this is used, wiring 207 can be added as shown in Figure 16. It is possible. Signal GS6 is input to wiring 207. Signal GS6 is in Embodiment 2. It corresponds to signal S6, which will be explained below, and can function as a full-stage reset signal. Therefore, wiring 207 corresponds to wiring 128 in Figure 13(B) and functions as a signal line. It is possible.

[0228] However, this is not limited to the number of wires, by sharing wire 207 with another wire. Alternatively, the number of signals or power supply voltages can be reduced. For example, wiring 207 may have It is possible to input signal GS4 to wire 205 as well. Therefore, wire 207 is wire 2 By connecting to 05, it is possible to share wiring 207 and wiring 205. Alternatively, the signal GS5 can be input to wiring 207, similar to wiring 206. Therefore, by connecting wiring 207 to wiring 206, wiring 207 and wiring 206 are It is possible to share. Alternatively, the output of flip-flop 200_N is on wiring 207. It is possible to input the force signal S1_N. Therefore, wiring 207 to wiring 20 By connecting to 1_N, it is possible to share wiring 207 and wiring 201_N. be.

[0229] Furthermore, using flip-flops 200_1 to 200_N, the voltage V2 is set as shown in Figure 9(C). If the required configuration is used, it is possible to add new wiring. Voltage V2 is supplied to this. This wiring corresponds to wiring 127 in Figure 9(C), and power supply It can function as a line.

[0230] Furthermore, as described in Embodiment 1 and Embodiment 2, the characteristics of the transistor are inferior. To suppress the change, the signal with an L level potential lower than V1 and an H level potential lower than V2 Low signals, or signals with an amplitude voltage smaller than V2-V1, are input to the flip-flop. In that case, it is possible to add new wiring. A signal is input to this wiring, This wiring can function as a signal line.

[0231] As shown in Figure 17(A), the shift register consists of circuits 212, 213, and 2 14. It is possible to have circuits 215 and / or 216. 16 is a function that increases (or decreases) the amplitude voltage of the input signal or the input voltage and outputs it. It has the capability to function as a level shift circuit. Alternatively, circuits 212-216 It has the function of inverting the input signal and outputting it, and functions as an inverter circuit or buffer circuit. It is possible for it to function. Wiring 202 is connected to the flip-flop via circuit 212. Wiring 203 is connected to the flip-flop via circuit 213. Wiring 204 It is connected to the flip-flop via circuit 214. Wiring 205 is connected via circuit 215 The wiring 206 is connected to the flip-flop via circuit 216. It is connected to the . In this way, it is possible to input signals with small amplitude to the shift register. Therefore, the driving voltage of the external circuit can be reduced. Thus, the cost of the external circuit can be reduced. This can lead to a reduction in power consumption, among other things.

[0232] Note that in Figure 17(A), the shift register is one of circuits 212 to 216. It is possible to have only two or more of these.

[0233] As shown in Figure 17(B), the shift register has circuits 211_1 to 211_N. It is possible to do so. Circuits 211_1 to 211_N are devices that increase the current capability of the input signal. It has the function of increasing the amplitude voltage of the input signal, or the function of inverting the input signal, It can function as a circuit, level shift circuit, or inverter circuit. Lines 211_1 to 211_N are connected to flip-flops 200_1 to 200_N, respectively, and wiring It is connected between 201_1 and 201_N. For example, circuit 211_i is a flip-flow It is connected between the flip-flop 200_i and the wiring 201_i. Then, flip-flop 200 The signal GS1_i, which is the output signal of _i, is output from wiring 201_i via circuit 211_i. This allows the drive voltage of each flip-flop to be reduced, thus reducing power consumption. This can reduce the degradation of transistor characteristics, or reduce the performance of each flip-flop. By reducing the channel width of the transistors (especially transistor 101) that the device possesses This allows for a reduction in the layout area.

[0234] In the example shown in Figure 17(B), the flip-flop 200_i-1 receives a reset signal and Then, the signal GS1_i is input via circuit 211_i. Therefore, flip flow In step 200_i-1, the period during period T3 is long when transistor 101 is ON. Therefore, the falling edge of the signal GS_i-1, which is the output signal of the lipflop 200_i-1. The time can be shortened. On the other hand, the flip-flop 200_i+1 has a start signal. As a result, signal GS1_i is input without going through circuit 211_i. Therefore, flip In pflop 200_i+1, the potential of node A is raised quickly during period T1. This allows for an improvement in the drive frequency. However, it is not limited to this, The lip-flop 200_i-1 receives the reset signal GS1_i from circuit 211. It is possible to input without going through _i. Alternatively, flip-flop 200_i+1 In this case, the signal GS1_i is input via circuit 211_i as the start signal. It is possible.

[0235] In the shift register shown in Figure 14(A), signals S1_1 to S1_N are 1 / of signal S2. The timings were shifted by two cycles, or by half a cycle of signal S3. However, this is not limited to the signal. Signals S1_1 to S1_N occur every 1 / 2 × M (where M is a natural number) periods of signal S2, or signal S3 It is possible for the signal S1_1 to S1_N to be shifted by 1 / 2 × M periods. In this case, the period during which the signal of one row is at a high level is the period during which the signal of another row is at a high level. Overlapping is possible. To achieve this, a shift register with 2 × M phases of crossover is required. It is possible to input a signal.

[0236] A specific example will be explained by referring to the shift register in Figure 24. Figure 24 shows a flip-flop Only flip-flops 200_i+1 to 200_i+2M+1 are shown. Wirings 123 of +1~200_i+M are connected to wirings 203_1~203_M respectively. Wiring 124 of flip-flops 200_i+1 to 200_i+M is, respectively, wire 204_ Connected to 1~204_M. Flip-flop 200_i+M+1~200_i+2M Wires 123 are connected to wires 204_1~204_M respectively, and flip-flop 20 Wiring 124 from 0_i+M+1 to 200_i+2M corresponds to wiring 203_1 to 203_M respectively. It is connected to the flip-flop 200_i+1. Then, wiring 125 of the flip-flop Connects to wiring 121 of flip-flop 200_i. Wiring 12 of flip-flop 200_i+1 6 is connected to wiring 121 of flip-flop 200_i+M+1. Note that wiring 20 3_1~203_M corresponds to wiring 203. Wiring 204_1~204_M corresponds to wiring 2 Corresponds to 04. As shown in Figure 25(A), wiring 203_1 to 203_M have, respectively, Signals GS2_1 to GS2_M are input. Wirings 204_1 to 204_M are connected to the signals Signals GS3_1 to GS3_M are input. Signals GS2_1 to GS2_M have a phase of 1 / 2. These are M clock signals, each shifted by M periods, and correspond to signal GS2. Signal GS3_1~ GS3_M is the inverted signal of signals GS2_1 to GS2_M and corresponds to signal GS3. In this way, every 1 / 2 × M (where M is a natural number) periods of signal S2, or 1 / 2 of signal S3 This makes it possible for the shift to be every M cycles.

[0237] Note that in Figure 24, the wiring 125 of the flip-flop 200_i+1 is It is connected to one of the wires 121 of pp200_i-M+1~200_i-1. It is possible. By doing so, in flip-flop 200_i+1, This allows the timing of ZISTA 131 turning on to be earlier, thus raising the potential of node A. The timing of the rise can be made earlier. Therefore, the drive frequency can be increased. Alternatively, reduce the channel width of transistor 131 or transistor 132. This allows for a reduction in the layout area.

[0238] Note that in Figure 24, the wiring 126 of the flip-flop 200_i+1 is Connect to one of the wires 121 of pp 200_i+M+2~200_i+2M. This is possible. By doing so, in flip-flop 200_i+1, The timing at which the inverter 101 turns off can be delayed, so the signal S1_i+1 The fall time can be shortened.

[0239] Note that in Figure 24, the wiring 126 of the flip-flop 200_i+1 is It is possible to connect to one of the wires 121 of pp 200_i+2 to 200_i+M. This is how the pulse width of signals S1_1 to S1_N is reduced to half the width of the clock signal. It can be made smaller than the period. Therefore, the drive frequency can be reduced while reducing power consumption. It can be made higher.

[0240] In Figure 24, it is preferable that M ≤ 4. More preferably, M ≤ 2. This is preferable because when the shift register in Figure 23 is used in the scan line driving circuit of the display device... In short, if M is too large, multiple types of video signals will be written to the pixel. If the period during which an invalid video signal is input to the pixel in question is prolonged, the display quality may deteriorate. This is because... Figure 25(B) shows, as an example, the timing chain when M=2 Here is an example of a template.

[0241] (Embodiment 4) In this embodiment, an example of a semiconductor device and a shift register having said semiconductor device are provided. I will explain this further. Note that the contents described in Embodiments 1 to 3 are the same as those described in this embodiment. It can be applied to semiconductor devices and shift registers.

[0242] First, the semiconductor device of this embodiment will be described with reference to Figure 19(A). Parts common to 1(A) are indicated by the same symbols, and their explanations are omitted.

[0243] The semiconductor device in Figure 19(A) includes circuit 100, transistor 101, transistor 102, Transistor 103, transistor 104, capacitive element 105, capacitive element 106, and transistor It has transistor 301. Transistor 301 corresponds to transistor 101, and It has the same function as transistor 101. And transistor 301 is an N-channel type. It shall be assumed that transistor 301 is a P-channel type.

[0244] The first terminal of transistor 301 is connected to wiring 123D, and the second terminal of transistor 301 Terminal 2 is connected to wiring 311, and the gate of transistor 301 is connected to node A. ru.

[0245] Wiring 123D corresponds to wirings 123A to 123C, and is assumed to receive signal S2. Therefore, similar to Figure 3(D), wiring 123D and wiring 123A~123C are shared. This is possible. In this case, the first terminal of transistor 301 is connected to wiring 123. The signal S7 is to be output from wiring 311. Signal S7 corresponds to signal S1. do.

[0246] Next, regarding the operation of the semiconductor device in Figure 19(A), refer to the timing chart in Figure 19(B). I will explain this by referring to the diagram. Note that I will omit explanations for aspects that are common to the operation shown in Figure 1(A).

[0247] First, during period T1, the potential of node A begins to rise. Then, transistor 101 and Similarly, the potential of node A is equal to the potential of wiring 123D (V1) and the threshold voltage of transistor 301. When the sum of (Vth301) and (V1 + Vth301) is reached, transistor 301 This turns on. Then, wires 123D and 311 become conductive. Therefore, L level Since signal S2 is supplied from wiring 123D to wiring 311, the potential of wiring 311 is V1 It decreases to the point where it becomes so.

[0248] Next, during period T2, the potential of node A becomes V1 + Vth101 + α, so The ZISTA 301 remains on. As a result, wiring 123D and wiring 311 remain in a conductive state. Therefore, the H-level signal S2 is supplied from wiring 123D to wiring 311. The potential of wiring 311 rises to V2.

[0249] Next, during period T3, the potential of node A begins to decrease to V1. Transition Similar to 101, the potential of node A is equal to the potential of wiring 123D (V1) and transistor 301 The transistor 301 is ON. Therefore, the L-level signal S1 is transmitted from wire 123D to wire 311. Therefore, the potential of wiring 311 decreases to V1. Subsequently, the potential of node A When the voltage decreases to V1 + Vth301, transistor 301 turns off.

[0250] During periods T4 and T5, the potential of node A is maintained at V1, so transistor 3 01 remains off. Therefore, wiring 123D and wiring 311 remain non-conductive. ru.

[0251] In the semiconductor device shown in Figure 19(A), wiring 121 and wiring 311 output signals at the same timing. It is possible to do so. Therefore, the signal S1 output by wiring 121 and wiring 311 One of the signals output from there, S7, is used to drive a gate line or a load such as a pixel. The other signal can be used as a signal to drive another circuit, such as a transmission signal. This is how the signal distortion caused by driving loads, etc., Alternatively, it can drive another circuit without being affected by delays or other factors.

[0252] Furthermore, a capacitive element can be connected between the gate and the second terminal of transistor 301. It is possible. This capacitive element corresponds to capacitive element 105.

[0253] Furthermore, as shown in Figure 20(A), transistor 301 is added to the semiconductor device in Figure 6(A). It is possible to add it.

[0254] Furthermore, as shown in Figure 20(B), transistor 302, transistor 303, and / or It is possible to add transistor 304. Transistor 302, Transistor Transistor 303 and transistor 304 are, respectively, transistor 134 and transistor 102. The first terminal of transistor 302 corresponds to and has the same function as transistor 133. The second terminal of transistor 302 is connected to wiring 122H, and the second terminal of transistor 302 is connected to wiring 331. The gate of transistor 302 is connected to wiring 126. The gate of transistor 303 Terminal 1 is connected to wiring 331, and the second terminal of transistor 303 is connected to node A. Next, the gate of transistor 303 is connected to wiring 123E. Transistor 30 The first terminal of 4 is connected to wiring 122I, and the second terminal of transistor 304 is connected to wiring It is connected to 331, and the gate of transistor 304 is connected to wire 124C. However, , but not limited to, transistors 302, 303, and 30 It is possible to add only one or two of the four options.

[0255] Note that in Figure 20(B), wiring 123D and wiring 123E are connected to wiring 123A~1 Since the same signal (signal S2) as 23C is input, wiring 123D and wiring 123E Therefore, it is possible to share wiring 123A~123C. In this case, transistor 3 The first terminal of 01 and the gate of transistor 303 are connected to wiring 123. It is possible.

[0256] Note that in Figure 20(B), wiring 122H and wiring 122I are connected to wiring 122A~1 Since the same voltage (voltage V1) as 22E is supplied, wiring 122H and wiring 122I Therefore, it is possible to share wiring 122A~122E. In this case, transistor 3 The first terminal of 02 and the first terminal of transistor 304 are connected to wiring 122. This is possible.

[0257] In Figure 20(B), transistor 302 is similar to transistor 135, It can be replaced with an diode or a diode-connected transistor. Transistor 304, like transistor 133, is a diode, or a diode. It can be replaced with a connected transistor.

[0258] Next, an example of a shift register having the semiconductor device described above will be explained with reference to Figure 21. To clarify. Note that the details described in Embodiment 3 will not be explained further. Or, see Figure 1. Parts common to 4 are indicated by the same symbols, and their explanations are omitted.

[0259] The shift register consists of multiple flip-flops, 320_1 to 320_N. It has a flip-flop. Flip-flops 320_1 to 320_N are the flip-flops in Figure 14. Corresponds to 200_1 to 200_N, or flip-flops 320_1 to 320_N. This corresponds to the semiconductor device in Figure 19(A), Figure 20(A), or Figure 20(B). In Figure 21, As an example, Figure 20(A) shows an example using the semiconductor device shown.

[0260] In flip-flop 320_i, wire 311 is connected to wire 321_i. Wiring 126 is then connected to wiring 321_i-1.

[0261] Signals GS7_1 to GS7_N are output from wiring 321_1 to 321_N, respectively. The signals GS7_1 to GS7_N correspond to signal S7, and are the transmission signal and output signal. It can function as a selection signal, a scanning signal, or a gate signal.

[0262] Next, regarding the operation of the shift register in Figure 21, refer to the timing chart in Figure 14(B). I will explain by referring to it.

[0263] Let's explain the operation of the flip-flop 320_i. First, when the signal GS7_i-1 is high... The bell rings. Then, flip-flop 320_i starts operating during period T2, and the signal is received. Signal GS1_i and signal GS7_i become L level. Subsequently, signals GS2 and G S3 inverts. Then, flip-flop 320_i begins its operation during period T2. And signals GS1_i and GS7_i become high level. Signal GS1_i is flip The signal GS7_i is input to the flip flop 320_i-1 as a reset signal, and flips the flip flop. The signal is input to flop 320_i+1 as a start signal. Therefore, flip-flop 3 20_i-1 starts operation in period T3, and flip-flop 320_i+1, The operation during period T1 begins. After that, signals GS2 and GS3 are reversed again. Then, flip-flop 320_i+1 starts operating during period T2, and the signal GS 1_i+1 becomes high level. Signal GS1_i+1 is sent to flip-flop 320_i. It is input as a set signal. Therefore, flip-flop 320_i is used during period T3. As the operation begins, signals GS1_i and GS7_i become low. After that, Until the signal GS7_i-1 reaches a high level again, the flip-flop 320_i will signal Each time GS2 and signal GS3 are reversed, the operation in period T4 and the operation in period T5 Repeat the process.

[0264] In the shift register of this embodiment, signals GS7_1 to GS7_N are used as start signals. Because of this, the delay time of signals S1_1 to S1_N can be shortened. Since numbers GS7_1 to GS7_N are not input to gate lines or pixels, signal S1_ This is because it has less delay or saturation compared to 1~S1_N.

[0265] Alternatively, in the shift register of this embodiment, signals GS1_1 to GS1_N are reset signals Since it is used as a number, in the operation of each flip-flop during period T3, the transistor The time that TA101 is ON can be extended. Therefore, the signal S1_1~S1_ 1. The falling time of signals GS7_1 to GS7_N can be shortened.

[0266] The signals GS1_1 to GS1_N are used as start signals for the next stage flip-flop. It is possible to input it. For example, the signal GS1_i can be flipped as a start signal. It is possible to input this into flop 320_i+1.

[0267] The signals GS7_1 to GS7_N are reset signals for the flip-flop in the previous stage. It is possible to input it. For example, the signal GS7_i can be used as a reset signal. It is possible to input to the flop 320_i-1.

[0268] (Embodiment 5) This embodiment describes an example of a display device.

[0269] First, with reference to Figure 22(A), an example of a liquid crystal display system block will be described. The liquid crystal display device consists of circuits 5361, 5362, 5363_1, and 5363_ 2. It has a pixel section 5364, a circuit 5365, and an illumination device 5366. In this configuration, multiple wires 5371 extend from circuit 5362 and are arranged, and multiple wires 5372 are arranged It is arranged by extending from path 5363_1 and circuit 5363_2. And multiple wirings 5 Each intersection region of 371 and multiple wirings 5372 has a display element such as a liquid crystal element. 5367 pixels are arranged in a matrix.

[0270] Circuit 5361, in response to the video signal 5360, controls circuits 5362, 5363_1, and 5 Circuits 363_2 and 5365 have a function to output signals or voltages, and control It can function as a control circuit, timing generator, or regulator, etc. It is Noh.

[0271] Circuit 5361, as an example, provides a start signal (SSP) for the signal line drive circuit and a signal line drive circuit. Path clock signal (SCK), inverting clock signal for signal line drive circuit (SCKB), video Signals such as signal data (DATA) and latch signals (LAT) are output to circuit 5362. Circuit 5362 outputs video signals to multiple wires 5372 in response to these signals. It has a function and acts as a signal line drive circuit.

[0272] Furthermore, if video signals are input to multiple wires 5371, the multiple wires 5371 will receive the signal. It can function as a line, a video signal line, or a source line, etc.

[0273] Circuit 5361, as an example, provides a start signal (GSP) for the scan line drive circuit and a scan line drive circuit. Path clock signal (GCK), and clock signal for inverted scan line drive circuit (GCKB), etc. The signal is output to circuits 5363_1 and 5363_2. Circuit 5363_2 outputs scan signals to multiple wires 5371 in response to these signals. It has the function of being a scan line driving circuit.

[0274] Furthermore, when a scanning signal is input to multiple wires 5372, the multiple wires 5372 are signal lines. It can function as a scan line or gate line, etc.

[0275] Note that the same signal is input to circuits 5363_1 and 5363_2 from circuit 5361. Therefore, the scan signal that circuit 5363_1 outputs to multiple wires 5367 and circuit 536 The scanning signals that 3_2 outputs to multiple wires 5367 are roughly at the same timing. In many cases, the load driven by circuits 5363_1 and 5363_2 is reduced. It can be cut. Therefore, the display device can be made larger. Or, the display device This can be made high-resolution. Alternatively, circuits 5363_1 and 5363_2 have This allows for a reduction in the channel width of the transistor, thus enabling the creation of a narrow-bezel display device. It is possible.

[0276] Circuit 5361 outputs a backlight control signal (BLC) to circuit 5365, as an example. Circuit 5365 supplies the lighting device 5366 in response to the backlight control signal (BLC). By controlling the amount of power supplied, or the duration of supply, the brightness of the lighting device 5366 (or It has a function to control the average brightness and functions as a power supply circuit.

[0277] Note that either circuit 5363_1 or circuit 5363_2 can be omitted.

[0278] Furthermore, new wiring such as capacitance lines, power lines, and scanning lines can be added to the pixel section 5364. It is possible. And circuit 5361 outputs signals or voltages to these wires. This is possible. Alternatively, a new circuit similar to circuit 5363_1 or circuit 5363_2 can be added. In addition, this newly added circuit outputs signals such as scanning signals to the newly added wiring. It is possible.

[0279] Furthermore, pixel 5367 can have a light-emitting element such as an EL element as a display element. In this case, as shown in Figure 22(B), the display element emits light, so circuit 5365 and The lighting device 5366 can be omitted. And, in order to supply power to the display element Therefore, multiple wires 5373 capable of functioning as power lines are arranged in the pixel section 5364. It is possible to do so. Circuit 5361 supplies a power supply voltage (ANO) to wiring 5373. It is possible to supply this. This wiring 5373 can be connected to each color element of the pixel. It is possible, and it can be connected to all pixels in common.

[0280] Note that in Figure 22(B), as an example, circuit 5361 is connected to circuit 5363_1 and circuit 536 An example of supplying separate signals to 3_2 is shown. Circuit 5361 is for the scan line drive circuit. Start signal (GSP1), clock signal for scan line drive circuit (GCK1), and inverted scan The clock signal for the line drive circuit (GCKB1) and other signals are output to circuit 5363_1. Circuit 5361 then provides a start signal (GSP2) for the scan line drive circuit, and for the scan line drive circuit Clock signal (GCK2), and clock signal for inverted scan line drive circuit (GCKB2), etc. The signal is output to circuit 5363_2. In this case, circuit 5363_1 has multiple wires 53 Scanning only the odd-numbered rows of wiring 72, circuit 5363_2 is a multiple wiring 5372 This makes it possible to scan only the wiring in even-numbered rows. Therefore, circuit 5363_1, and Since the driving frequency of track 5363_2 can be reduced, power consumption can be reduced. Alternatively, increase the area available for laying out one stage of flip-flops. This is possible. Therefore, the display device can be made high-resolution. Alternatively, the display device can be made larger. It is possible.

[0281] Note that, similar to Figure 22(B), in Figure 22(A), circuit 5361 is also circuit 5363 It is possible to supply separate signals to _1 and circuit 5363_2.

[0282] Next, an example of the configuration of the display device is shown in Figures 23(A), (B), (C), (D), and ( See E) for further explanation.

[0283] Figure 23(A) shows a circuit that has the function of outputting a signal to the pixel unit 5364 (for example, circuit 5 Circuits 362, 5363_1, and 5363_2, etc., are on the same substrate as the pixel unit 5364. It is formed at 5380. The circuit 5361 is formed on a separate substrate from the pixel section 5364. This reduces the number of external parts, thus lowering costs. Alternatively, Since the number of signals or voltages input to board 5380 decreases, the relationship between board 5380 and external components The number of connections can be reduced. Therefore, it is possible to improve reliability or yield. can.

[0284] Furthermore, if the circuit is formed on a substrate separate from the pixel section 5364, the substrate is TAB(Ta FPC (Flexible Printed Circuit) is a method of Automated Bonding. It can be mounted on a Printed Circuit. Alternatively, the board can be , COG (Chip on Glass) method, the same substrate 538 as the pixel unit 5364 It is possible to implement this in 0.

[0285] Furthermore, if the circuit is formed on a substrate separate from the pixel section 5364, the substrate may contain a single-crystal semiconductor. It is possible to form a transistor using the substrate. Therefore, the substrate is formed The circuit offers advantages such as improved drive frequency, improved drive voltage, and reduced output signal variation. You can obtain [something].

[0286] Furthermore, signals, voltages, or currents are input from external circuits via input terminal 5381. In many cases, this is the case.

[0287] In Figure 23(B), circuits with low drive frequencies (for example, circuit 5363_1, circuit 5363_ 2) is formed on the same substrate 5380 as the pixel section 5364. And the circuit 5361, Circuit 5362 is formed on a separate substrate from the pixel section 5364. This way, the mobility is small. The transistor makes it possible to construct the circuit formed on the substrate 5380. As the semiconductor layer of the transistor, non-single-crystal semiconductors, microcrystalline semiconductors, organic semiconductors, or acid This makes it possible to use synthetic semiconductors, etc. Therefore, it becomes possible to enlarge the display device and reduce the number of manufacturing steps. This can lead to cost reduction or improved yield.

[0288] Furthermore, as shown in Figure 23(C), a part of circuit 5362 (circuit 5362a) is the pixel section 53 It is formed on the same substrate 5380 as 64, and the remaining circuit 5362 (circuit 5362b) is the pixel section 5 It is possible to form it on a different substrate than 364. Circuit 5362a has low mobility Circuits that can be constructed using transistors (e.g., shift registers, selectors, etc.) It often has switches, etc. And circuit 5362b has high mobility and characteristic variation A circuit that is preferably constructed using transistors with low shift resistance (for example, a shift resistance transistor) They often have latch circuits, buffer circuits, DA conversion circuits, AD conversion circuits, etc. By doing so, as in Figure 23(B), the semiconductor layer of the transistor is non-single It is possible to use crystalline semiconductors, microcrystalline semiconductors, organic semiconductors, or oxide semiconductors. Furthermore, it becomes possible to reduce the number of external parts.

[0289] Figure 23(D) shows a circuit that has the function of outputting a signal to the pixel unit 5364 (for example, circuit 5 Circuits 362, 5363_1, and 5363_2, etc., and the control of these circuits The functional circuit (for example, circuit 5361) is formed on a separate substrate from the pixel section 5364. This makes it possible to form the pixel section and its peripheral circuits on separate substrates. This can lead to an improvement in yield.

[0290] In Figure 23(E), a portion of circuit 5361 (circuit 5361a) is on the same substrate as the pixel unit 5364. 5380 is formed, and the remaining circuit 5361 (circuit 5361b) is separate from the pixel section 5364. It is formed on the substrate. Circuit 5361a is composed of transistors with low mobility. If the circuit has the capability to do so (for example, a switch, selector, level shift circuit, etc.) There are many. And circuit 5361b uses transistors with high mobility and low variability. A circuit that is preferably configured in this way (for example, a shift register, a timing generator, etc.) They often have a syrator, regulator, or analog buffer.

[0291] Note that circuits 5363_1 and 5363_2 are as shown in Embodiments 1 to 4. A semiconductor device or a shift register can be used. In this case, circuit 5363_ 1. When circuit 5363_2 is formed on the same substrate as the pixel section, the substrate is formed It is possible to set the polarity of all transistors to either N-channel or P-channel. Therefore, it is possible to reduce the number of processes, improve yield, or reduce costs. By making the polarity of all transistors N-channel type, the semiconductor of the transistor The layers used include non-single-crystal semiconductors, microcrystalline semiconductors, organic semiconductors, or oxide semiconductors. This makes it possible to increase the size of display devices, reduce costs, or improve yield. It is possible to measure this.

[0292] Furthermore, non-single-crystal semiconductors, microcrystalline semiconductors, organic semiconductors, or oxide semiconductors are used as semiconductor layers. Transistors used in this way may exhibit characteristic degradation such as an increase in threshold voltage or a decrease in mobility. In many cases, however, the semiconductor devices or shift registers of Embodiments 1 to 4 are This can suppress the degradation of transistor characteristics, thereby extending the lifespan of the display device. It is possible.

[0293] Furthermore, as part of circuit 5362, the semiconductor device of Embodiments 1 to 4, or the Shift It is possible to use a resistor. For example, the circuit 5362a shown in Figure 23(C) is It is possible to have a semiconductor device or shift register according to Embodiments 1 to 4. ru.

[0294] (Embodiment 6) In this embodiment, the layout diagram of the shift register (hereinafter also referred to as the top view) will be described. To clarify, in this embodiment, as an example, the layout diagram of the shift register in Figure 15... This will be explained. Note that the contents described in this embodiment are in addition to the shift register in Figure 15. This also applies to the semiconductor devices, shift registers, or display devices of Embodiments 1 to 5. It is possible to do so. Note that the layout diagram of this embodiment is just one example and is not limited to it. It should be noted that this is not something that will be done.

[0295] The layout diagram of this embodiment will be described with reference to Figures 30 and 31. Figure 30 Figure 31 shows an example of a layout diagram of a shift register, and as an example, The layout diagram for the lipflop 200_i is shown.

[0296] The transistors, capacitive elements, or wiring shown in Figures 30 and 31 are connected to the conductive layer 401, semi-conductive layer 401. It is composed of a conductive layer 402, a conductive layer 403, a conductive layer 404, and a contact hole 405. However, this is not limited to, and may include another conductive layer, insulating film, or another contact hole. It is possible to form new ones. For example, to connect conductive layer 401 and conductive layer 403 It is possible to add new contact holes for the eyes.

[0297] The conductive layer 401 may include portions that function as gate electrodes or wiring. The conductive layer 402 may include a portion that functions as a semiconductor layer of the transistor. The conductive layer 403 may include portions that function as wiring, sources, or drains. The conductive layer 404 may include portions that function as transparent electrodes, pixel electrodes, or wiring. It is possible. The contact hole 405 is for connecting the conductive layer 401 and the conductive layer 404, or It can be used to connect conductive layer 403 and conductive layer 404.

[0298] In the example shown in Figure 30, wiring 202 has an opening 411, and wiring 203 has an opening 412. It has. Thus, by having openings in wiring 202 and wiring 203, parasitic The capacitance can be reduced. Alternatively, the destruction of transistors caused by electrostatic discharge can be prevented. It can be suppressed. However, it is not limited to this, and the same applies to the opening 411 as to the wiring 204. Alternatively, the opening 412 can be omitted. Or, the wiring 204 can be connected to the wiring 202 or Similar to wiring 203, it is possible to provide an opening for this.

[0299] In the example shown in Figure 30, there is an opening in part of the intersection of wiring 202 or wiring 203 with another wiring. By providing this, the crossover capacitance of the wiring can be reduced. Therefore, noise This can reduce signal delay or distortion.

[0300] In the example shown in Figure 30, a portion of the conductive layer 403 of the wiring 204 is formed on top of the conductive layer 404. This is achieved. And the conductive layer 404 is connected to the conductive layer 4 through the contact hole 405. It is connected to 03. In this way, the wiring resistance can be reduced, thus reducing the voltage drop. or it may be possible to reduce signal delay or distortion. However, this is not limited to the above. The conductive layer 404 and the contact hole 405 can be omitted. Similarly to wiring 204, in wiring 202 or wiring 203, a portion of the conductive layer 403 A conductive layer 404 is formed on top, and the conductive layer 404 is connected to the conductive layer 403. It is possible.

[0301] Here, in the example shown in Figure 30, the wiring width of wiring 202, the wiring width of wiring 203, and wiring 2 The wiring widths of 04 are indicated as wiring width 421, wiring width 422, and width 423, respectively. And the opening The width of 411, the length of opening 411, the width of opening 412, and the length of opening 412, respectively It is indicated as having a width of 424, a length of 425, a width of 426, and a length of 427.

[0302] The signals input to wiring 202 and wiring 203 are often inverted signals of each other. Therefore, the wiring resistance or parasitic capacitance of wiring 202 is equal to the wiring resistance or parasitic capacitance of wiring 203. It is preferable to set it so that it is approximately equal to the above. Therefore, the wiring 202 is It is preferable to include a portion that is approximately equal to the line width 422. Alternatively, the opening 411 is an opening The portion may include a portion that is approximately equal to the width 426 of part 412, or the length 427 of the opening 412. Preferred. However, it is not limited to the wiring width 421, wiring width 422, and the width of the opening 411. 424, the length of the opening 411 425, or the length of the opening 412 427 can be set to various values. It is possible to do so. For example, the crossover capacitance between wiring 202 and other wiring is such that the crossover capacitance between wiring 203 and other wiring is such that the crossover capacitance between wiring 203 and other wiring is such that the crossover capacitance between wiring 2022 and other wiring is such that the crossover capacitance between Assume that it is greater than the crossover capacitance with the wiring. In this case, reduce the wiring resistance of wiring 202. By doing so, the delay or distortion of the signals input to wiring 202 and wiring 203 is reduced. It is possible to set them to be equal. For this purpose, wiring 202 has a wiring width of 42 It is possible to include a portion larger than 2. Alternatively, the opening 411 may include a portion of the opening 412. It is possible to include a portion smaller than the width 426. Alternatively, the opening 411 may be the opening 4 It is possible to include portions shorter than 427 in length 12. On the other hand, wiring 202 and other wiring If the crossover capacitance with wiring 203 is smaller than the crossover capacitance between wiring 203 and other wiring, then wiring 202 It is possible to include portions smaller than the wiring width 422. Alternatively, the opening 411 may be open It is possible to include a portion larger than the width 426 of the mouth portion 412. Or, the opening 411 It may include a portion longer than the length 427 of the opening 412.

[0303] If the wiring 204 does not have an opening, the wiring 204 has a wiring width of 421 or a wiring width of 42 It is preferable to include a portion smaller than 2, because the wiring 204 does not have an opening. Therefore, the wiring resistance of wiring 204 is small. However, this is not limited to wiring 2 04 may include portions larger than the wiring width 421 or 422.

[0304] In the example shown in Figure 31, in capacitive elements 105 and 106, one electrode is a conductive layer. One electrode is formed by 401, and the other electrode is formed by the conductive layer 403. This allows for a larger volume value per unit area, thus reducing the layout area. Smaller can be measured. However, it is not limited to this, between conductive layer 401 and conductive layer 403 It is possible to place a semiconductor layer 402 there. By doing so, the conductive layer 401 This can prevent a short circuit between the conductive layer 403 and the element. Alternatively, a capacitive element 105, or the capacitive element 106, can be a MOS capacitor.

[0305] In the example shown in Figure 31, transistors 101, 103, 104, Transistor 131, transistor 132, transistor 133, transistor 134, and In transistor 135, the surface where the conductive layer 401 and conductive layer 403 of the second terminal overlap. The product is preferably smaller than the overlapping area of ​​the conductive layer 401 and conductive layer 403 of the first terminal. This is how the gate of transistor 101, or the noise of wiring 201_i, This can reduce noise. Alternatively, it can suppress the concentration of the electric field at the second terminal. Therefore, it is possible to suppress transistor degradation or even transistor destruction.

[0306] Furthermore, a semiconductor layer 402 is formed in the portion where the conductive layer 401 and the conductive layer 403 overlap. This is possible. By doing so, the parasitic capacitance between the conductive layer 401 and the conductive layer 403 can be reduced. Because it can be made smaller, noise can be reduced. For the same reason, conductive layer A semiconductor layer 402 or a conductive layer 403 is formed in the portion where 401 and the conductive layer 404 overlap. It is possible.

[0307] Furthermore, a conductive layer 404 is formed on a part of the conductive layer 401, and the conductive layer 401 is contact It is possible to connect to the conductive layer 404 via the tohole 405. This can reduce the wiring resistance. Alternatively, a conductive layer 403 can be placed on top of a portion of the conductive layer 401. , and a conductive layer 404 is formed, and the conductive layer 401 is contacted via the contact hole 405 The conductive layer 403 is connected to the conductive layer 404 via another contact hole 405. It is possible to connect to the conductive layer 404. By doing so, the wiring resistance is reduced. It can be lowered further.

[0308] Furthermore, a conductive layer 404 is formed on a part of the conductive layer 403, and the conductive layer 403 is contact It is possible to connect to the conductive layer 404 via the tohole 405. This can reduce wiring resistance.

[0309] Furthermore, a conductive layer 401 or a conductive layer 403 is formed beneath a portion of the conductive layer 404, and the conductive layer 404, through the contact hole 405, connects to the conductive layer 401 or the conductive layer 403 It is possible to connect them in this way. By doing so, the wiring resistance can be reduced. .

[0310] If the capacitive element 105 is omitted, as described in Embodiment 1, transistor 1 The parasitic capacitance between the gate and the first terminal of transistor 01 is greater than the parasitic capacitance between the gate and the second terminal of transistor 101. It is possible to increase the parasitic capacitance between the terminals. Transistor 101 in this case An example of a layout diagram is shown in Figure 18. In the example in Figure 18, transistor 101 is The width of the conductive layer 403, which can function as an electrode, is shown as width 431, and the transistor The width of the conductive layer 403, which can function as the second electrode of 101, is indicated as width 432. Therefore, a width of 431 can be greater than a width of 432. By doing this, As described in Embodiment 1, the parasitic capacitance between the gate and the first terminal of transistor 101 Rather than increasing the parasitic capacitance between the gate and the second terminal of transistor 101, It is possible. However, it is not limited to this.

[0311] (Embodiment 7) In this embodiment, an example of a signal line driving circuit will be described. Note that the signal line driving circuit will be half It can be described as a conductor device or a signal generating circuit.

[0312] An example of a signal line driving circuit will be explained with reference to Figure 26(A). The signal line driving circuit is: Multiple circuits named Circuit 502_1 to 502_N (where N is a natural number), Circuit 500, and Circuit 5 It has 01. And circuits 502_1 to 502_N each have transistor 503_ It has multiple transistors numbered 1 to 503_k (where k is a natural number). Transistor 503 _1~503_k are assumed to be N-channel type. However, they are not limited to this, The transistors 503_1 to 503_k can be P-channel type, and CMOS It can be used as a type of switch.

[0313] The connection relationships of the signal line drive circuit will be explained using circuit 502_1 as an example. Transistor The first terminals of 503_1 to 503_k are connected to wiring 505_1. Transistor 5 The second terminals of 03_1~503_k are connected to wiring S1~Sk, respectively. Transis The gates of terminals 503_1 to 503_k are connected to wirings 504_1 to 504_k, respectively. For example, the first terminal of transistor 503_1 is connected to wiring 505_1, and The second terminal of transistor 503_1 is connected to wiring S1, and the gateway of transistor 503_1 This is connected to wiring 504_1.

[0314] Circuit 500 transmits signals to circuits 502_1~502_ via wiring 504_1~504_k. It has the function of supplying N and can function as a shift register or decoder, etc. This signal is often a digital signal and can function as a selection signal. It is possible. And wiring 504_1~504_k can function as signal lines. be.

[0315] Circuit 501 has the function of outputting signals to circuits 502_1 to 502_N, and the video signal is generated It can function as a circuit, etc. For example, circuit 501 has wiring 505_1 The signal is supplied to circuit 502_1 via wiring 505_2. At the same time, the signal is supplied to circuit 5 It is supplied to 02_2. This signal is often an analog signal and is used as a video signal. It is possible to do so. And wiring 505_1~505_N functions as signal lines. It is possible to do so.

[0316] Circuits 502_1 to 502_k select which wire to output the output signal of circuit 501 to. It has a selection function and can function as a selector circuit. For example, circuit 502 _1 specifies which of the wirings S1 to Sk outputs the signal that circuit 501 outputs to wiring 505_1. It has a function to select whether to output to a specific location.

[0317] Transistors 503_1 to 503_N are connected to wiring 5, respectively, according to the output signal of circuit 500. It has the function of controlling the conductivity state between 05_1 and wiring S1~Sk, and functions as a switch. ru.

[0318] Next, regarding the operation of the signal line drive circuit in Figure 26(A), see the timing chart in Figure 26(B). Refer to Figure 26(B) for explanation. The signal 514_1 input to wiring 504_1 is shown in Figure 26(B). , Signal 514_2 input to wiring 504_2, Signal 514 input to wiring 504_k _k, signal 515_1 input to wiring 505_1, and signal input to wiring 505_2 An example of item 515_2 is shown.

[0319] Furthermore, one operating period of the signal line drive circuit corresponds to one gate selection period in the display device. The gate selection period is when a pixel belonging to a certain row is selected and a video signal is written to that pixel. This refers to the period during which it is possible to do something.

[0320] The gate selection period is divided into periods T0, T1, and so on, up to Tk. This is the period for simultaneously applying a pre-charge voltage to the pixels belonging to the selected row. It can function as a pre-charge period. Periods T1 to Tk can each be selected. This is the period for writing a video signal to the pixels belonging to the row, and is defined as the writing period. It is possible to do so.

[0321] For convenience, the operation of the signal line drive circuit will be explained using the operation of circuit 502_1 as an example.

[0322] First, during period T0, circuit 500 receives a high-level signal from wiring 504_1 to 504_k. This outputs the following: Transistors 503_1~503_k will then turn on, so wire 50 5_1 and wiring S1~Sk become conductive. At this time, circuit 501 is connected to wiring 505_ Since a precharge voltage Vp is supplied to 1, the precharge voltage Vp is the transistor The output is sent to wiring S1 to Sk via 503_1 to 503_k. The charge voltage Vp is written to the pixels belonging to the selected row, so the pixels belonging to the selected row The pixels are pre-charged.

[0323] Next, during period T1, circuit 500 outputs a high-level signal to wiring 504_1. Then, transistor 503_1 turns on, and wire 505_1 and wire S1 become conductive. This is the state in which the wiring 505_1 and wiring S2~Sk become non-conductive. Assuming that circuit 501 outputs the signal Data(S1) to wiring 505_1, the signal Data(S1) is output to wiring S1 via transistor 503_1. The signal Data(S1) is a pixel belonging to a selected row among the pixels connected to wiring S1. It is written to the pixel.

[0324] Next, during period T2, circuit 500 outputs a high-level signal to wiring 504_2. Then, transistor 503_2 turns on, and wire 505_2 and wire S2 become conductive. This is the state in which wiring 505_1 and wiring S1 become non-conductive, and wiring 505_1 The wiring S3~Sk remains in a non-conductive state. At this time, circuit 501 receives the signal Data If (S2) is output to wiring 505_1, then the signal Data(S2) is a transient The signal Data(S2) is output to wiring S2 via station 503_2. The data is written to the pixels belonging to the selected row among the pixels connected to wiring S2.

[0325] Subsequently, until period Tk, circuit 500 sends a high-level signal to wiring 504_1~504_k. Since the output is generated sequentially, the same applies to periods T1 and T2, and also from period T3 to period Tk, circuit 5 00 outputs high-level signals sequentially to wiring 504_3~504_k. Therefore, the transistor Since transistors 503_3 to 503_k are turned on in order, transistors 503_1 to 503 _N is turned on in order. Therefore, the signal output from circuit 501 is from wiring S1~Sk The signals are output sequentially. In this way, the signals are written sequentially to the pixels belonging to the selected row. It will become possible.

[0326] The signal line drive circuit of this embodiment has a circuit that functions as a selector, so the number of signals Alternatively, the number of wires can be reduced. Or, before writing the video signal to the pixels (period T) 0) The voltage for precharging is written to the pixel, so when writing the video signal The interval can be shortened. Therefore, it is possible to increase the size and resolution of the display device. This is possible. However, it is not limited to this, and the period T0 may be omitted, and the pixels may not be precharged. It is possible.

[0327] Furthermore, if k is too large, the writing time to the pixels will be shortened, so the video signal to the pixels The writing process may not complete within the allotted time. Therefore, it is preferable that k ≤ 6. It is more preferable that k ≤ 3. Even more preferable that k = 2. It's nice.

[0328] In particular, when the color elements of a pixel are divided into n (where n is a natural number) parts, it is possible to set k=n. Yes, for example, when the color elements of a pixel are divided into three parts: red (R), green (G), and blue (B). It is possible that k=3. In this case, the 1-gate selection period is period T0, period T1 It is then divided into period T2 and period T3. And in period T1, period T2, and period T3, It is possible to write video signals to the red (R) pixels, green (G) pixels, and blue (B) pixels. However, this is not the only option, and the order of periods T1, T2, and T3 can be set arbitrarily. It is possible to do so.

[0329] In particular, a pixel has n (where n is a natural number) subpixels (hereinafter also called subpixels or secondary pixels). When a pixel is divided into subpixels, it is possible to set k=n. For example, if a pixel is divided into two subpixels If divided, k=2 is possible. In this case, the 1-gate selection period is period T. It is divided into periods 0, T1, and T2. Then, in period T1, one of the two subpixels The video signal is written, and during period T2, the video signal is written to the other of the two subpixels. This is possible.

[0330] Note that the drive frequencies of circuits 500 and 502_1~502_N are often low. Circuits 500 and 502_1 to 502_N are formed on the same substrate as the pixel section. It is possible. In this way, the number of connections between the substrate on which the pixel is formed and the external circuit can be reduced. This allows for improvements in yield and reliability. Furthermore, Figure 2 As shown in 3(C), the scan line driving circuit is also formed on the same substrate as the pixel section, further This reduces the number of connections to external circuits.

[0331] The circuit 500 is a semiconductor device or shift register of Embodiments 1 to 4. It is possible to use this. In this case, the polarity of all transistors in circuit 500 is It can be an N-channel type or a P-channel type. Therefore, the number of processes can be reduced. This can lead to improved yield or reduced costs.

[0332] Furthermore, this applies not only to circuit 500, but also to all transistors in circuits 502_1 to 502_N. The polarity can also be N-channel or P-channel. Therefore, circuit 5 When circuits 00 and 502_1 to 502_N are formed on the same substrate as the pixel section, the number of steps This can lead to reductions in transients, improved yield, or cost reductions. In particular, all transients By making the polarity of the transistor an N-channel type, the semiconductor layer of the transistor is non-single-connected. Crystalline semiconductors, microcrystalline semiconductors, organic semiconductors, or oxide semiconductors can be used. Therefore, the drive frequencies of circuits 500 and 502_1~502_N are often low. Therefore.

[0333] (Embodiment 8) In this embodiment, the pixel configuration and pixel operation applicable to the liquid crystal display device are described below. explain.

[0334] Figure 27(A) shows an example of a pixel configuration applicable to a liquid crystal display device. Pixel 508 0 has a transistor 5081, a liquid crystal element 5082, and a capacitive element 5083. The gate of transistor 5081 is electrically connected to wiring 5085. Transistor 508 The first terminal of 1 is electrically connected to wiring 5084. The second terminal of transistor 5081 is It is electrically connected to the first terminal of the liquid crystal element 5082. The second terminal of the liquid crystal element 5082 is wired It is electrically connected to 5087. The first terminal of the capacitive element 5083 is connected to the first terminal of the liquid crystal element 5082. The terminals are electrically connected. The second terminal of the capacitive element 5083 is electrically connected to the wiring 5086. It will be done.

[0335] Wiring 5084 can function as a signal line. The signal line is input from outside the pixel. This is wiring for transmitting the signal voltage to pixel 5080. Wiring 5085 is a scan line. It can be made to work. The scan line is for controlling the on / off state of transistor 5081. This is wiring. Wiring 5086 can function as a capacitance line. A capacitance line is a capacitance element. This is the wiring for applying a predetermined voltage to the second terminal of the 5083. Transistor 5081 is, It can function as a switch. The capacitive element 5083 can function as a holding capacitor. It is possible. The retained capacitance is such that even when the switch is off, the signal voltage is maintained when the liquid crystal element 5 This is a capacitive element to ensure that the current continues to flow to 082. Wiring 5087 is the counter electrode. This allows it to function. The counter electrode applies a predetermined voltage to the second terminal of the liquid crystal element 5082. These are wires for [purpose]. However, the functions that each wire can perform are limited to these. Furthermore, it can have various functions. For example, by changing the voltage applied to the capacitance line... Furthermore, the voltage applied to the liquid crystal element can also be adjusted. Note that transistor 5081 is Since it only needs to function as a switch, the polarity of the transistor 5081 can be P-channel type. And an N-channel type is also acceptable.

[0336] Figure 27(B) shows an example of a pixel configuration that can be applied to a liquid crystal display device. The pixel configuration example shown in Figure 27(A) omits wiring 5087. Furthermore, the second terminal of the liquid crystal element 5082 and the second terminal of the capacitive element 5083 are electrically connected. Except for the difference in the connected points, the configuration is similar to the pixel configuration example shown in Figure 27(A). This is stated. The pixel configuration example shown in Figure 27(B) is particularly characterized by the liquid crystal element being in transverse electric field mode (IP). This applies when the liquid crystal element is horizontally charged. In field mode, the second terminal of liquid crystal element 5082 and the second terminal of capacitive element 5083 are Since they can be formed on the same substrate, the second terminal of the liquid crystal element 5082 and the capacitive element 5 This is because it is easy to electrically connect it to the second terminal of 083. See Figure 27(B). By using the pixel configuration shown, the wiring 5087 can be omitted, thus simplifying the manufacturing process. This allows for a reduction in manufacturing costs.

[0337] The pixel configuration shown in Figure 27(A) or Figure 27(B) is arranged in a matrix. This makes it possible to form the display unit of a liquid crystal display device, which can then display various images. This can be done. Figure 27(C) shows multiple pixel configurations arranged in a matrix, as shown in Figure 27(A). This is a diagram showing the circuit configuration when the display unit is installed. The circuit configuration shown in Figure 27(C) is the one that the display unit has. This diagram shows four pixels extracted from a set of multiple pixels. The numbers are shown in column i, row j (i,j). Pixels located at (where is a natural number) are denoted as pixels 5080_i,j, and pixels 5080_i,j Wiring 5084_i, wiring 5085_j, and wiring 5086_j are electrically connected to each other. Similarly, for pixels 5080_i+1,j, wiring 5084_i+1, wiring 5 085_j is electrically connected to wiring 5086_j. Similarly, pixels 5080_i,j+ Regarding point 1, wiring 5084_i, wiring 5085_j+1, wiring 5086_j+1 and electricity They are connected precisely. Similarly, for pixels 5080_i+1,j+1, wiring 5084_i +1, wiring 5085_j+1, and wiring 5086_j+1 are electrically connected. A line can be shared by multiple pixels belonging to the same column or row. (See Figure 2) In the pixel configuration shown in 7(C), wiring 5087 is the counter electrode, and the counter electrode is the counter electrode for all pixels. Since they are common in this respect, the notation for wiring 5087 is not expressed using natural numbers i or j. It will not be done. Furthermore, it is also possible to use the pixel configuration shown in Figure 27(B). Even if wiring 5087 is listed in the configuration, wiring 5087 is not required, and other wiring is not necessary. It can be omitted by being shared with others, etc.

[0338] The pixel configuration shown in Figure 27(C) can be driven by various methods. In particular, By being driven by a method called flow drive, the degradation (burn-in) of the liquid crystal elements is prevented. It can be suppressed. Figure 27(D) shows a dot inversion drive, which is one type of AC drive. In the case of this, the timing of the voltage applied to each wiring in the pixel configuration shown in Figure 27(C) This is a diagram representing a chart. By performing dot inversion driving, AC driving is performed. This can suppress the flicker (flickering) that is visible when the image is broken. (See Figure 27) D) includes the signal 5185_j input to wiring 5085_j, and the signal input to wiring 5085_j+1. Signal 5185_j+1 is powered, signal 5184_i is input to wiring 5084_i, wiring Signal 5184_i+1 input to 5084_i+1, voltage 5 supplied to wiring 5086 This indicates 186.

[0339] In the pixel configuration shown in Figure 27(C), the pixels electrically connected to wiring 5085_j In this case, the switch is in the selected state (on state) during the jth gate selection period within a 1-frame period. It enters a state (and remains in an unselected state (off state) during other periods. Then, the j-gate selection... After the selection period, a selection period for the (j+1)th gate is provided. The scanning is performed sequentially in this manner. As a result, all pixels are selected sequentially within one frame period. Figure 27(D) shows In the timing chart, a high voltage state (high level) occurs in that pixel. When the switch is in the selected state, the voltage becomes low (low level), which then deselects it. Note that this is the case when the transistor in each pixel is of the N-channel type, not the P-channel type. When a transistor of a certain type is used, the relationship between voltage and selected state is different from that of an N-channel type. It is the opposite.

[0340] In the timing chart shown in Figure 27(D), the jth frame in the kth frame (where k is a natural number) During the gate selection period, a positive signal voltage is applied to the wiring 5084_i used as a signal line. Then, a negative signal voltage is applied to wiring 5084_i+1. And in the k-th frame... During the (j+1)th gate selection period, a negative signal voltage is applied to wiring 5084_i, and wiring 5 A positive signal voltage is applied to 084_i+1. Subsequently, each signal line is selected by the gate selection. A signal with reversed polarity is applied alternately at each selection period. As a result, in the k-th frame... A positive signal voltage is applied to pixels 5080_i,j, and a negative signal voltage is applied to pixels 5080_i+1,j. A negative signal voltage is applied to pixels 5080_i,j+1, and a positive signal voltage is applied to pixels 5080_i+1,j+1. The following signal voltages will be applied to each of them. Then, in the k+1th frame, For each pixel, a signal voltage with the opposite polarity to the signal voltage written in the k-th frame. The voltage is written. As a result, in the k+1th frame, pixels 5080_i,j A negative signal voltage is applied to pixel 5080_i+1,j, and a positive signal voltage is applied to pixel 5080_i,j A positive signal voltage is applied to +1, and a negative signal voltage is applied to pixels 5080_i+1 and j+1, respectively. This will result in different poles being obtained between adjacent pixels within the same frame. A signal voltage is applied, and furthermore, for each pixel, a signal voltage is applied every frame. A driving method in which the polarity is reversed is called dot inversion driving. By dot inversion driving, the liquid crystal This is visually apparent when the entire or a portion of the displayed image is uniform, while suppressing the degradation of the elements. Flicker can be reduced. Note that this includes wiring 5086_j and wiring 5086_j+1. The voltage applied to all wiring 5086 can be set to a constant voltage. In the timing chart for line 5084, the signal voltage is only shown in terms of polarity, but in reality In this case, the displayed polarity can result in various signal voltage values. Note that here, 1 dot We have described the case where the polarity is reversed for each (1 pixel), but this is not the only case, and it applies to multiple pixels. The polarity can also be reversed each time. For example, the signal voltage written every 2 gate selection period By reversing the polarity, the power consumption required for writing the signal voltage can be reduced. In addition, you can also reverse the polarity of each column (source line inversion), and each row It is also possible to reverse the polarity (gate line inversion).

[0341] Furthermore, the second terminal of the capacitive element 5083 in pixel 5080 is connected to the first terminal during a single frame period. A constant voltage is required. Here, the wiring 5085 used as the scan line is added to it. The applied voltage is low for most of the frame duration, and a nearly constant voltage is applied. Therefore, the connection destination of the second terminal of the capacitive element 5083 in pixel 5080 is wiring 5 085 is also acceptable. Figure 27(E) shows an example of a pixel configuration that can be applied to a liquid crystal display device. Yes. The pixel configuration shown in Figure 27(E) is different from the pixel configuration shown in Figure 27(C) in terms of wiring. 5086 is omitted, and the second terminal of the capacitive element 5083 within pixel 5080 and the previous one It is characterized by being electrically connected to wiring 5085 in the row. Specifically, In the range shown in Figure 27(E), pixels 5080_i,j+1 and pixels The second terminal of the capacitive element 5083 at 5080_i+1,j+1 is connected to wiring 5085_j They are electrically connected. In this way, the second terminal of the capacitive element 5083 in the pixel 5080 and By electrically connecting it to wiring 5085 in the previous line, wiring 5086 can be omitted. This allows for an improvement in the aperture ratio of the pixels. Note that the second terminal of the capacitive element 5083 is connected The next destination is not necessarily wiring 5085 in the previous line, but can be wiring 5085 in another line. The driving method for the pixel configuration shown in Figure 27(E) is the same as the driving method for the pixel configuration shown in Figure 27(C). The same method as the operation method can be used.

[0342] Furthermore, the capacitive element 5083 and the wiring electrically connected to the second terminal of the capacitive element 5083 are This allows us to reduce the voltage applied to the wiring 5084 used as a signal line. The pixel configuration and driving method will be explained using Figures 27(F) and 27(G). The pixel configuration shown in Figure 27(F) has a wiring ratio of 5 compared to the pixel configuration shown in Figure 27(A). There are two 086s per pixel row, and the second capacitive element 5083 in pixel 5080 It is characterized by the alternating electrical connection to the terminals at adjacent pixels. The main wiring 5086 shall be referred to as wiring 5086-1 and wiring 5086-2, respectively. Specifically, in the range shown in Figure 27(F), pixel 5080_i The second terminal of the capacitive element 5083 at j is electrically connected to the wiring 5086-1_j. The second terminal of the capacitive element 5083 in pixels 5080_i+1,j is connected to wiring 5086-2 Electrically connected to _j, the second end of the capacitive element 5083 at pixel 5080_i,j+1 The child is electrically connected to wiring 5086-2_j+1 and to pixels 5080_i+1,j+1. The second terminal of the capacitive element 5083 is electrically connected to the wiring 5086-1_j+1. Note that Figure 27(G) shows the signal 5185_j input to wiring 5085_j, wiring 50 Signal 5185_j+1 is input to 85_j+1, signal 5 is input to wiring 5084_i Signal 5184_i+1, input to wiring 5084_i+1, wiring 5086- Signal 5186-1_j input to 1_j, signal 51 input to wiring 5086-2_j 86-2_j, signal 5186-1_j+1 input to wiring 5086-1_j+1, wiring This shows the signal 5186-2_j+1 input to 5086-2_j+1.

[0343] And, for example, as shown in Figure 27(G), in the k-th frame, pixel 5080_i, If a positive polarity signal voltage is written to j, wiring 5086-1_j selects the jth gate. During this period, the level will be kept low, and after the end of the j-th gate selection period, it will change to a high level. And, maintain that high level for the duration of 1 frame, and in the k+1th frame... After a negative polarity signal voltage is written during the j-th gate selection period, it is changed to a low level. Thus, after a positive polarity signal voltage is written to the pixel, the second capacitance element 5083 By changing the voltage of the wiring electrically connected to the terminal in the positive direction, the liquid crystal element is subjected to The voltage applied can be changed by a predetermined amount in the positive direction. That is, the amount written to the pixel can be changed by that amount. Because the signal voltage to be written can be reduced, the power consumption required for signal writing is reduced. This can be done. Note that if a negative polarity signal voltage is written during the j-th gate selection period... After a negative polarity signal voltage is written to the pixel, electricity is supplied to the second terminal of the capacitive element 5083. By changing the voltage of the connected wiring in the negative direction, the voltage applied to the liquid crystal element is changed. Since it can be changed by a predetermined amount in the negative direction, just like in the case of positive polarity, the pixel The signal voltage to be written can be reduced. In other words, the voltage to the second terminal of the capacitive element 5083 can be reduced. The wires that are electrically connected are those on the same row of the same frame to which a positive polarity signal voltage is applied. The pixels that receive a signal voltage and the pixels to which a negative polarity signal voltage is applied have different wiring configurations. This is preferable. Figure 27(F) shows that a positive polarity signal voltage is written in the k-th frame. Wiring 5086-1 is electrically connected to the pixel, and in the k-th frame, a negative polarity signal is transmitted. This is an example where wiring 5086-2 is electrically connected to the pixel where the voltage is written. However, This is just one example; for instance, a pixel on which a positive polarity signal voltage is written and a pixel on which a negative polarity signal voltage is written. In the case of a driving method in which pixels to be written appear every two pixels, wiring 5086-1 and The electrical connections of wiring 5086-2 are also made alternately every two pixels accordingly. This is preferable. Furthermore, if the same polarity signal voltage is written to all pixels in a row ( (Line inversion) is also possible, but in that case, one 5086 wire per row is sufficient. In other words, even in the pixel configuration shown in Figure 27(C), Figures 27(F) and 27(G) are used. As explained below, a driving method can be used that reduces the signal voltage written to the pixels. ru.

[0344] Next, the liquid crystal element is vertically aligned (VA), such as in MVA mode or PVA mode. This section describes a pixel configuration and driving method that is particularly preferred when the mode is VA mode. The advantages of this device include the elimination of the rubbing process during manufacturing, minimal light leakage when displaying black, and a low operating voltage. It has some desirable features, but the image quality deteriorates when viewed from an angle (narrow viewing angle). This also presents a problem. To widen the viewing angle in VA mode, see Figure 28(A) and Figure 28 As shown in (B), the pixel configuration has multiple subpixels in one pixel. This is effective. The pixel configuration shown in Figures 28(A) and 28(B) has 2 pixels 5080. This is an example showing a case that includes two subpixels (subpixel 5080-1, subpixel 5080-2). Yes, it exists. Furthermore, the number of subpixels in a single pixel is not limited to two; various numbers of subpixels can be used. It is possible to be there. The larger the number of subpixels, the wider the field of view can be. Multiple The subpixels can have the same circuit configuration as each other, and here all subpixels are as shown in Figure 27. The circuit configuration will be explained as being the same as shown in A). Note that the first sub-pixel 5080-1 is A device having a transistor 5081-1, a liquid crystal element 5082-1, and a capacitive element 5083-1. The respective connection relationships shall conform to the circuit configuration shown in Figure 27(A). Similarly, The second sub-pixel 5080-2 consists of a transistor 5081-2, a liquid crystal element 5082-2, and a capacitance. The circuit configuration includes element 5083-2, and the connection relationships are shown in Figure 27(A). This shall be followed.

[0345] The pixel configuration shown in Figure 28(A) uses two subpixels that make up one pixel as scan lines. It has two 5085 wires (wire 5085-1, wire 5085-2) and is used as a signal line. This configuration includes one wiring 5084 and one wiring 5086 used as a capacity line. This is how it works. By sharing the signal line and capacitance line between two subpixels, This can improve the output ratio and also simplify the signal line drive circuit. Therefore, manufacturing costs can be reduced, and the number of connection points between the LCD panel and the driver circuit IC can be reduced. This improves yield. The pixel configuration shown in Figure 28(B) consists of two sub-pixels that make up one pixel. Each pixel has one wiring 5085 used as a scan line and one wiring 50 used as a signal line. There are two 84s (wiring 5084-1, wiring 5084-2), and wiring 50 is used as a capacity line. This represents a configuration with one 86. In this way, the scan line and capacitance line are two sub-frames. By sharing the same components as is, the aperture ratio can be improved, and furthermore, the total number of scan lines can be increased. Because it can be reduced, the gate line selection period per gate can be sufficiently reduced even in high-resolution LCD panels. It can be made longer, and the appropriate signal voltage can be written to each pixel.

[0346] Figures 28(C) and 28(D) show the pixel configuration shown in Figure 28(B), where the liquid crystal elements are... This is an example of schematically representing the electrical connection state of each element by replacing it with the shape of the pixel electrodes. In Figures 28(C) and 28(D), electrode 5088-1 represents the first pixel electrode, and Electrode 5088-2 represents the second pixel electrode. In Figure 28(C), the first pixel electrode Terminal 5088-1 corresponds to the first terminal of liquid crystal element 5082-1 ​​in Figure 28(B), and The two-pixel electrode 5088-2 is in phase with the first terminal of the liquid crystal element 5082-2 in Figure 28(B). In other words, the first pixel electrode 5088-1 is connected to the source of transistor 5081-1. The second pixel electrode 5088-2 is electrically connected to one side of the drain, and transistor 5 It is electrically connected to either the source or drain of 081-2. Meanwhile, in Figure 28(D) In this configuration, the connection relationship between the pixel electrode and the transistor is reversed. That is, the first pixel electrode 50 88-1 is electrically connected to either the source or drain of transistor 5081-2. The second pixel electrode 5088-2 is the source or drain of transistor 5081-1. It shall be electrically connected to one of the other.

[0347] The pixel configurations shown in Figures 28(C) and 28(D) are arranged alternately in a matrix. By doing so, special effects can be obtained. One such pixel configuration and its driving method Examples are shown in Figures 28(E) and 28(F). The pixel configuration shown in Figure 28(E) is Pixel 5 Figure 28(C) shows the parts corresponding to pixels 080_i,j and 5080_i+1,j+1. The configuration is such that the parts corresponding to pixels 5080_i+1,j and pixels 5080_i,j+1 The configuration is as shown in Figure 28(D). In this configuration, the configuration shown in Figure 28(F) When driven as in an timing chart, during the j-th gate selection period of the k-th frame, The first pixel electrode of pixel 5080_i,j and the second pixel electrode of pixel 5080_i+1,j are positively charged. The polarity signal voltage is written, and the second pixel electrode of pixel 5080_i,j and pixel 508 A negative polarity signal voltage is written to the first pixel electrode of 0_i+1,j. Furthermore, the kth frame During the selection period of the j+1 gate of the frame, the second pixel electrode of pixel 5080_i,j+1 and A positive polarity signal voltage is written to the first pixel electrode of pixels 5080_i+1,j+1, and the image The first pixel electrode of element 5080_i,j+1 and the second pixel of pixel 5080_i+1,j+1. A negative polarity signal voltage is written to the electrode. In the k+1th frame, each pixel The polarity of the signal voltage is reversed. By doing this, in a pixel configuration including subpixels While achieving a drive equivalent to dot inversion drive, the polarity of the voltage applied to the signal line is 1 frame Since it can be kept the same within the specified period, the power consumption required for writing the pixel signal voltage This can be significantly reduced. Note that this includes wiring 5086_j and wiring 5086_j+1. The voltage applied to all wiring 5086 can be set to a constant voltage. (See Figure 2) 7(F) contains the signal 5185_j input to wiring 5085_j, and wiring 5085_j+1 Signal 5185_j+1 is input to wire 5084-1_i, signal 5184- Signal 5184-2_i, input to wiring 5084-2_i, wiring 5084-1_ The signal 5184-1_i+1 input to i+1, and the input to wiring 5084-2_i+1 Signal 5184-2_i+1 indicates the voltage 5186 supplied to wiring 5186.

[0348] Furthermore, with the pixel configuration and driving method shown in Figures 28(G) and 28(H), The magnitude of the signal voltage written to each pixel can be reduced. This method involves making the capacitance lines electrically connected to the multiple subpixels of an element different for each subpixel. That is, by the pixel configuration and driving method shown in Figures 28(E) and 28(F) For subpixels with the same polarity written within the same frame, the capacity within the same row For subpixels that share a common line but have different polarities written within the same frame, the same row The capacitance lines are made different within the system. Then, when writing to each line is finished, each capacitance line The voltage is positive in the sub-pixel where a positive polarity signal voltage is written, and negative polarity signal voltage In sub-pixels where the signal is written, the signal voltage written to the pixel is changed in the negative direction. The size can be reduced. Specifically, the wiring 5086 used as a capacity line is reduced in size. This results in two wires (wiring 5086-1, wiring 5086-2), and the first pixel of pixels 5080_i,j. The electrode and the wiring 5086-1_j are electrically connected via a capacitive element, and the pixel 5080 The second pixel electrodes _i,j and wiring 5086-2_j are electrically connected via a capacitive element. The first pixel electrode of pixel 5080_i+1,j and the wiring 5086-2_j are connected by a capacitance element. Electrically connected via the child, the second pixel electrode of pixel 5080_i+1,j and wiring 508 6-1_j is electrically connected via a capacitive element, and the first of pixels 5080_i,j+1 The pixel electrode and the wiring 5086-2_j+1 are electrically connected via a capacitive element, and the pixel The second pixel electrode of 5080_i,j+1 and the wiring 5086-1_j+1 are connected via a capacitive element. The first pixel electrodes of pixels 5080_i+1,j+1 and wiring 5086 are electrically connected. -1_j+1 and are electrically connected via a capacitive element, and pixel 5080_i+1,j+1 The second pixel electrode and the wiring 5086-2_j+1 are electrically connected via a capacitive element. However, this is just one example; for instance, pixels on which a positive polarity signal voltage is written and pixels on which a negative polarity signal voltage is written. In the case of a driving method where the polarity signal voltage is written to pixels that appear every two pixels, wiring 5 The electrical connections of 086-1 and wiring 5086-2 are also made accordingly, alternating every two pixels. It is preferable that the same polarity signal voltage is written to all pixels in a row. It is also possible that this may occur (gate line inversion), in which case wiring 5086 will be per line One line is sufficient. In other words, even in the pixel configuration shown in Figure 28(E), Figures 28(G) and Figure Using a driving method that reduces the signal voltage written to the pixels, as explained using 28(H) It is possible to do so. Note that Figure 27(H) shows the signal 518 input to wiring 5085_j. 5_j, signal input to wiring 5085_j+1, 5185_j+1, wiring 5084-1_ Signal 5184-1_i input to i, signal 5184 input to wiring 5084-2_i -2_i, signal 5184-1_i+1 input to wiring 5084-1_i+1, wiring 50 Signal 5184-2_i+1 input to 84-2_i+1, input to wiring 5086-1_j Signal 5186-1_j, signal 5186-2_j input to wiring 5086-2_j Signal 5186-1_j+1 input to wiring 5086-1_j+1, wiring 5086-2 This shows the signal 5186-2_j+1 input to _j+1.

[0349] The pixels of this embodiment, the semiconductor devices of Embodiments 1 to 7, the shift register, and By combining it with a display device, various advantages can be obtained. For example When using pixels with a subpixel structure, the number of signals required to drive the display device increases. Therefore, the number of gate lines or source lines may increase. As a result, the shape of the pixel area may change. The number of connections between the circuit board and external circuits can increase significantly. However, the gate Even if the number of lines increases, as shown in Embodiment 5, the scanning line driving circuit can be mounted on the same substrate as the pixel section. It is possible to achieve this. Therefore, the number of connections between the substrate on which the pixel portion is formed and the external circuit is Pixels with a subpixel structure can be used without significantly increasing the number of pixels. Even if the number of source wires increases, by using the signal line driving circuit of Embodiment 7, the source wires The number can be reduced. Therefore, the number of connections between the substrate on which the pixel is formed and the external circuit It is possible to use pixels with a subpixel structure without significantly increasing the number of pixels.

[0350] Alternatively, when inputting a signal to a capacitance line, the number of connections between the substrate on which the pixel is formed and the external circuit In some cases, the capacitance can increase significantly. Therefore, the capacitance line is half of the capacitance lines of Embodiments 1 to 4. It is possible to supply signals using a conductor device or a shift register. The semiconductor device or shift register of Embodiments 1 to 4 is formed on the same substrate as the pixel portion. Therefore, it is possible to significantly reduce the number of connections between the substrate on which the pixel portion is formed and the external circuit. The signal can be input to the capacitance line without increasing the capacitance.

[0351] Alternatively, if AC drive is used, the time required to write the video signal to the pixels becomes longer. As a result, there may be insufficient time to write the video signal to the pixels. Similarly, when using pixels with a subpixel structure, the time required to write the video signal to the pixels is short. This can result in insufficient time to write the video signal to the pixels. Therefore, using the signal line driving circuit of Embodiment 7, it is possible to write a video signal to the pixels. It is possible. In this case, before writing the video signal to the pixel, a pre-charge voltage is applied to the pixel. Because it writes the signal, the video signal can be written to the pixels in a short amount of time. Or, see Figure 24. As shown in Figure 25(A) or Figure 25(B), there is a period during which one row is selected and another row is selected. By overlapping the selected period, the video signal of another row is used for precharging and It can be used in this way.

[0352] Furthermore, the pixel driving method of this embodiment and the driving method shown in Figures 24, 25(A), and 25(B) By combining this with the motion method, the duration of writing the video signal to the pixels can be shortened. This can be done by referring to the timing chart in Figure 29(A) and the pixel configuration in Figure 27(C). Let me explain in detail. In the kth frame, a positive video signal is input to wire 5084_i. Assume that a negative video signal is input to wiring 5084_i+1. Then, the k +1 frame, a negative video signal is input to wire 5084_i, and wire 5084_i A positive video signal is assumed to be input to +1. This is known as source-line inverting drive. And, as an example, the latter half of the period during which an H signal is input to wiring 5085_j, and Assume that the first half of the period in which the H signal is input to line 5085_j+1 overlaps with this period. In the k-1 frame, a negative video signal is written to pixel 5080_i, j+1. In rare cases, pixel 5080_i, j+1 is assumed to hold a negative video signal. Pixel 50 A positive video signal is written to 80_i+1, j+1, and pixels 5080_i+1, j+1 It is assumed that it holds a positive video signal. Note that in Figure 29(A), wiring 5085_ Signal 5185_j input to j, signal 5185_j input to wiring 5085_j+1 +1, signal input to wiring 5084_i, signal 5184_i, input to wiring 5084_i+1 This indicates the signal 5184_i+1.

[0353] First, in the k-th frame, the period during which an H signal is input to wiring 5085_j and wiring 508 During the period when an H signal is input to 5_j+1, the positive video signal is present at pixel 508. A negative video signal is written to pixel 0_i,j, and a negative video signal is written to pixel 5080_i+1,j. In this case, the positive video signal is also written to pixels 5080_i, j+1, and the negative video signal is also written to pixels 5080_i, j+1. The deo signal is also written to pixels 5080_i+1 and j+1. Thus, the data belonging to row j. Using the video signal written to the pixels, the pixels belonging to row j+1 are precharged. Then, in the k-th frame, during the period when an H signal is input to wiring 5085_j+1 In the second half, the positive video signal is written to pixel 5080_i, j+1, and the negative video signal It is written to pixels 5080_i+1 and j+1. Of course, the positive video signal in question is written to the pixels. Since it is written to 5080_i, j+2, pixels 5080_i, j+2 are pre-charged. Similarly, the negative video signal is written to pixels 5080_i+1 and j+2. Then, pixels 5080_i+1 and j+2 are precharged. In this way, the elements belonging to row j. By using the video signal to the pixels, the pixels belonging to row j+1 are precharged. This allows for a shorter duration of writing the video signal to pixels belonging to row j+1.

[0354] Furthermore, by combining the driving method in Figure 29(A) with the pixel configuration in Figure 29(B), Therefore, it is possible to achieve dot inversion driving. In the pixel configuration of Figure 29(B), pixel 5 080_i,j is connected to wiring 5084_i. On the other hand, pixels 5080_i,j+1 are , it is connected to wiring 5084_i+1. In other words, the pixels belonging to the i-th column are alternately arranged row by row. It is connected to wiring 5084_i and wiring 5084_i+1. In this way, the image belonging to column i In the original, positive and negative video signals are written alternately, one line at a time, so dot Inverted drive can be achieved. However, it is not limited to this, and pixels belonging to the i-th column, Alternately, in multiple lines (for example, 2 or 3 lines), wire 5084_i and wire 5084_i+1 and It is possible to connect.

[0355] (Embodiment 9) In this embodiment, an example of the transistor configuration is shown in Figures 32(A), (B), and (C). (See the references below for further explanation.)

[0356] Figure 32(A) shows an example of the configuration of a top-gate type transistor. Figure 32(B) shows This is an example of the configuration of a bottom-gate type transistor. Figure 32(C) shows a semiconductor substrate. This is an example of the structure of a transistor that is manufactured using this method.

[0357] Figure 32(A) shows a substrate 5260 and an insulating layer 5261 formed on the substrate 5260, Formed on the insulating layer 5261, region 5262a, region 5262b, region 5262c, A semiconductor layer 5262 having regions 5262d and 5262e, and a covering for the semiconductor layer 5262 An insulating layer 5263 is formed in such a manner, and a semiconductor layer 5262 and an insulating layer 5263 are formed on top of the insulating layer 5263. A conductive layer 5264 and an insulating layer 5263 and a conductive layer 5264 are formed on top of the conductive layer 5264 and have openings. An insulating layer 5265 and conductive material formed on the insulating layer 5265 and in the openings of the insulating layer 5265. A layer 5266 and a conductive layer 5266 and an insulating layer 5265 formed on top of the conductive layer 5266 and having an opening An insulating layer 5267 and a conductive layer formed on the insulating layer 5267 and in the openings of the insulating layer 5267. 5268 and an insulating layer 5267 and a conductive layer 5268 formed on top of the conductive layer 5268, having an opening Edge layer 5269 and light-emitting layer 5 formed on top of the insulating layer 5269 and in the opening of the insulating layer 5269 270 and the conductive layer 5271 formed on the insulating layer 5269 and the light-emitting layer 5270 show.

[0358] Figure 32(B) shows a substrate 5300 and a conductive layer 5301 formed on the substrate 5300. An insulating layer 5302 is formed to cover the conductive layer 5301, and the conductive layer 5301 and the insulating layer 5 A semiconductor layer 5303a formed on 302, and a semiconductor layer formed on semiconductor layer 5303a Conductive layer 5303b and conductive layer formed on semiconductor layer 5303b and insulating layer 5302 Layer 5304 and an insulating layer 5302 and an insulating layer 5304 formed on top of the conductive layer 5304, having an opening Edge layer 5305 and conductive layer 5 formed on the insulating layer 5305 and in the openings of the insulating layer 5305 306, and a liquid crystal layer 5307 disposed on the insulating layer 5305 and the conductive layer 5306, This shows a conductive layer 5308 formed on top of the liquid crystal layer 5307.

[0359] Figure 32(C) shows a semiconductor substrate 5352 having regions 5353 and 5355, and a semiconductor An insulating layer 5356 formed on the substrate 5352, and a semiconductor substrate 5352 formed on the semiconductor substrate 5352 An insulating layer 5354, a conductive layer 5357 formed on the insulating layer 5356, and an insulating layer 535 4. An insulating layer 535 having an opening, formed on the insulating layer 5356 and the conductive layer 5357. 8 and the conductive layer 5359 formed on the insulating layer 5358 and in the opening of the insulating layer 5358 This is shown. In this way, transistors are fabricated in region 5350 and region 5351, respectively.

[0360] The insulating layer 5261 can function as an undercoat. The insulating layer 5354 is between elements. It functions as a separation layer (e.g., a field oxide film). Insulating layer 5263, insulating layer 5302, The insulating layer 5356 can function as a gate insulating film. The conductive layer 5264, The electrode layer 5301 and the conductive layer 5357 can function as gate electrodes. Insulating layer 5265, insulating layer 5267, insulating layer 5305, and insulating layer 5358 are interlayer films or flat It can function as a film. Conductive layer 5266, conductive layer 5304, and conductive layer 5 359 can function as wiring, a transistor electrode, or a capacitive element electrode, etc. It is possible. The conductive layer 5268 and the conductive layer 5306 are used as pixel electrodes or reflective electrodes, etc. It is possible for it to function. The insulating layer 5269 can function as a dam. The conductive layer 5271 and the conductive layer 5308 function as counter electrodes or common electrodes, etc. This is possible.

[0361] Examples of substrates 5260 and 5300 include glass substrates, quartz substrates, and silicon substrates. Examples include metal substrates, stainless steel substrates, or flexible substrates. An example of a glass substrate is: Examples include barium borosilicate glass and aluminoborosilicate glass. An example of a flexible substrate is... For example, polyethylene terephthalate (PET) and polyethylene naphthalate (PEN) Flexible materials such as polyethersulfone (PES) plastics or acrylics. There are synthetic resins that possess properties. In addition, there are laminated films (polypropylene, polyethylene) Paper containing fibrous materials (such as polyester, vinyl, polyvinyl fluoride, and polyvinyl chloride), and base material Examples include films (polyester, polyamide, inorganic vapor-deposited films, paper, etc.).

[0362] As an example of the semiconductor substrate 5352, a single crystal Si group having n-type or p-type conductivity A board can be used. However, it is not limited to this, and a board similar to the circuit board 5260 can be used. It can be used. Region 5353 is, for example, a semiconductor substrate 5352 with impurities. This is an added region that functions as a well. For example, if the semiconductor substrate 5352 is p-type If it has an electrical type, region 5353 has an n-type conductivity and functions as an n-well. On the other hand, if the semiconductor substrate 5352 has an n-type conductivity, then region 5353 has a p-type conductivity. It has and functions as a p-well. Region 5355 is, for example, a semiconductor substrate 5 This is a region added to 352 and functions as either a source region or a drain region. It is possible to form an LDD region on the conductive substrate 5352.

[0363] An example of an insulating layer 5261 is silicon dioxide (SiO₂). x ), silicon nitride (SiN x ), nitric oxide Silicon (SiO x N y )(x>y), silicon nitride (SiN x O y Acids such as (x>y) This includes films containing elemental or nitrogen, or laminated structures thereof. The insulating layer 5261 has a two-layer structure. One example of a structure that can be provided is a silicon nitride film as the first insulating layer, and the second layer A silicon oxide film can be provided as an insulating film. The insulating layer 5261 is provided in a three-layer structure. One example of this is when a silicon oxide film is provided as the first insulating layer, and the second insulating layer is It is possible to provide a silicon nitride film and a silicon oxide film as a third insulating layer.

[0364] Examples of semiconductor layers 5262, 5303a, and 5303b include amorphous semiconductor layers. Amorphous semiconductor, microcrystalline semiconductor, polycrystalline semiconductor, single-crystalline semiconductor Crystal semiconductors, oxide semiconductors (for example, zinc oxide (ZnO), IGZO (InGaZnO)) (and so on), or single-layer structures of compound semiconductors (for example, gallium arsenide (GaAs)). , or these are layered structures, etc.

[0365] For example, region 5262a is an intrinsic region where no impurities are added to the semiconductor layer 5262. This state functions as a channel region. However, if a trace amount of impurity is added to region 5262a... It is possible to add impurities to region 5262a, region 5262b, region Lower than the concentration of impurities added to region 5262c, region 5262d, or region 5262e This is preferable. Regions 5262b and 5262d are areas to which impurities are added at low concentrations. This is a domain, and as an LDD (Lightly Doped Drain) domain, it is a machine It is possible. However, areas 5262b and 5262d can be omitted. Regions 5262c and 5262e are areas where impurities are added to the semiconductor layer 5262 at high concentrations. It is a region that functions as either a source region or a drain region.

[0366] Furthermore, when semiconductor layer 5262 is used in a transistor, the conductivity type of region 5262c and the region It is preferable that the conductivity type is the same as that of region 5262e.

[0367] Furthermore, semiconductor layer 5303b is a semiconductor layer to which phosphorus and other impurity elements are added. It has an n-type conductivity.

[0368] Furthermore, when an oxide semiconductor or a compound semiconductor is used as the semiconductor layer 5303a, The semiconductor layer 5303b can be omitted.

[0369] Examples of the insulating layer 5263, the insulating layer 5273, and the insulating layer 5356 include silicon oxide (Si O x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y )(x > y), silicon nitride oxide (SiN O x )(x > y), etc., films having oxygen or nitrogen, or laminated structures thereof, etc. There are such structures.

[0370] Examples of the conductive layer 5264, the conductive layer 5266, the conductive layer 5268, the conductive layer 5271, the conductive layer 5301, the conductive layer 5304, the conductive layer 5306, the conductive layer 5308, the conductive layer 5357, and the conductive layer 535 9 include a conductive film having a single-layer structure, or a laminated structure thereof, etc. An example of the conductive film is a single-element film of one element selected from the group consisting of aluminum (Al), tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W), neodymium (Nd), chromium (Cr), nickel (Ni) , platinum (Pt), gold (Au), silver (Ag), copper (Cu), manganese (Mn), cobalt ( Co), niobium (Nb), silicon (Si), iron (Fe), palladium (Pd), carbon ( C), scandium (Sc), zinc (Zn), phosphorus (P), boron (B), arsenic (As) , gallium (Ga), indium (In), tin (Sn), oxygen (O), or a compound containing one or more elements selected from the above group . Examples of the compound include an alloy containing one or more elements selected from the above group (indium tin oxide (ITO), indium zinc oxide (IZO), indium tin oxide containing silicon oxide (ITSO), zinc oxide (ZnO), tin oxide (SnO ), etc. ​​), tin cadmium oxide (CTO), aluminum neodymium (Al-Nd), magnesium silver (M (g-Ag), molybdenum niobium (Mo-Nb), molybdenum tungsten (Mo-W), (Alloy materials such as molybdenum tantalum (Mo-Ta)), one selected from the above group or Compounds of multiple elements and nitrogen (nitride films such as titanium nitride, tantalum nitride, and molybdenum nitride) ), or a compound of silicon with one or more elements selected from the group (tungsten Tensilicide, Titanium silicide, Nickel silicide, Aluminum silicon, Molybdenum Examples include silicon silicide films. Other examples include carbon nanotubes and organic nanotubes. Nanotube materials include tubes, inorganic nanotubes, or metallic nanotubes.

[0371] Note that silicon (Si) contains n-type impurities (such as phosphorus) or p-type impurities (such as boron). It is possible to do so.

[0372] Furthermore, when copper is used as a conductive layer, a laminated structure is used to improve adhesion. It is preferable.

[0373] Furthermore, molybdenum or titanium may be used as the conductive layer in contact with the oxide semiconductor or silicon. It is preferable to use it.

[0374] Furthermore, by using an alloy material of neodymium and aluminum as the conductive layer, aluminum This makes it less likely for nium to cause hillocks.

[0375] Furthermore, when using semiconductor materials such as silicon as the conductive layer, the semiconductor material such as silicon It is possible to form the material simultaneously with the semiconductor layer of the transistor.

[0376] Note that ITO, IZO, ITSO, ZnO, Si, SnO, CTO, or carbon nanochips are also used. Tubes and similar materials are translucent, so these materials can be used as pixel electrodes, counter electrodes, or common electrodes. It can be used in light-transmitting parts such as electrodes.

[0377] Furthermore, by using low-resistance materials (such as aluminum) to create a laminated structure, The resistance of the wire can be reduced.

[0378] Furthermore, low heat-resistant materials (e.g., aluminum) are used with high heat-resistant materials (e.g., molybdenum By creating a laminated structure sandwiched between materials (such as titanium and neodymium), low heat-resistant materials can be produced. While taking advantage of its benefits, it is possible to increase the heat resistance of wiring, electrodes, etc.

[0379] Furthermore, materials that react with other materials and change their properties are referred to as materials that do not react easily with those other materials. It is possible to sandwich or cover them depending on the material. For example, ITO and aluminum When connecting ITO and aluminum, neodymium alloy, titanium, molybdenum It is possible to insert things like [this]. For example, when connecting silicon and aluminum, Neodymium alloy, titanium, and molybdenum can be sandwiched between silicon and aluminum. These materials are suitable for wiring, electrodes, conductive layers, conductive films, terminals, vias, plugs, etc. It can be used in any situation.

[0380] Furthermore, when the conductive layer described above is provided in a laminated structure, for example, Al may be replaced with Mo or Ti. A sandwiched structure is preferable. This improves the resistance of Al to heat and chemical reactions. It can improve sexual performance.

[0381] Insulating layer 5265, insulating layer 5267, insulating layer 5269, insulating layer 5305, and insulating layer 535 Examples of 8 include single-layer insulating films, or multilayer structures thereof. One example is silicon dioxide (SiO₂). x ), silicon nitride (SiN x ), or silicon oxide nitride ( SiO x N y )(x>y), silicon nitride (SiN x O y )(x>y) etc. oxygen or Nitrogen-containing membranes, carbon-containing membranes such as DLC (diamond-like carbon), or siloxane Sun resin, epoxy, polyimide, polyamide, polyvinylphenol, benzocyclob Examples include resin or organic materials such as acrylic.

[0382] Examples of the light-emitting layer 5270 include organic EL elements and inorganic EL elements. Examples of elements include a hole injection layer made of a hole injection material and a hole transport layer made of a hole transport material. A layer consisting of a light-emitting layer made of a light-emitting material, an electron transport layer made of an electron transport material, and an electron injection material An electron injection layer, or a single-layer structure of a layer made by mixing multiple of these materials, These include layered structures, among others.

[0383] Furthermore, an insulating layer that functions as an alignment film is placed on top of the insulating layer 5305 and on top of the conductive layer 5306. It is possible to form insulating layers and other structures that function as protrusions.

[0384] Furthermore, on top of the conductive layer 5308, there are color filters, black matrices, or protrusions. It is possible to form insulating layers and the like that which function as conductive layers. Below the conductive layer 5308, there is an alignment film and It is possible to form an insulating layer that functions in this way.

[0385] In the cross-sectional structure shown in Figure 32(A), the insulating layer 5269, the light-emitting layer 5270, and the conductive layer Omitting 5271, the liquid crystal layer 5307 and conductive layer 5308 shown in Figure 32(B) are replaced with insulating layer 526 It is possible to form it on 7 and on the conductive layer 5268.

[0386] Note that in the cross-sectional structure of Figure 32(B), the liquid crystal layer 5307 and the conductive layer 5308 are omitted. The insulating layer 5269, the light-emitting layer 5270, and the conductive layer 5271 shown in 32(A) are insulated with insulating layer 530 It is possible to form it on 5 and on the conductive layer 5306.

[0387] Furthermore, in the cross-sectional structure of Figure 32(C), on top of the insulating layer 5358 and the conductive layer 5359, Form the insulating layer 5269, the light-emitting layer 5270, and the conductive layer 5271 shown in 32(A). This is possible. Alternatively, the liquid crystal layer 5307 and conductive layer 5308 shown in Figure 32(B) can be used as an insulating layer. It is possible to form it on 5267 and on the conductive layer 5268.

[0388] The transistor in this embodiment is used in the semiconductor devices and shift registers of Embodiments 1 to 8. It can be used in a transistor or display device. In particular, the transistor in Figure 32(B) Furthermore, the semiconductor layer can be a non-single-crystal semiconductor, a microcrystalline semiconductor, an organic semiconductor, or an oxide semiconductor. When using such methods, the transistor may degrade. Even in this case, the implementation form In the semiconductor device, shift register, or display device of Embodiments 1 to 8, the transistor It can suppress deterioration.

[0389] (Embodiment 10) In this embodiment, an example of an electronic device will be described.

[0390] Figures 33(A) to 33(H) and 34(A) to 34(D) are diagrams showing electronic devices. Yes, these electronic devices consist of a casing 5000, a display unit 5001, a speaker 5003, and an LED. Lamp 5004, operation key 5005, connection terminal 5006, sensor 5007 (force, displacement, position) Location, speed, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time Hardness, electric field, electric current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation. It may have a microphone 5008 (including a function for measuring), etc.

[0391] Figure 33(A) shows a mobile computer, and in addition to the above, it includes Switch 5009, It may have an infrared port 5010, etc. Figure 33(B) shows a portable device equipped with a recording medium. This is a type of image playback device (for example, a DVD player), and in addition to the above, a second display It may have a section 5002, a recording medium reading section 5011, etc. Figure 33(C) is a goggle. It is a type display, and in addition to the above, it has a second display unit 5002, a support unit 5012, It may have earphones 5013, etc. Figure 33(D) is a portable gaming machine, as described above. In addition to the above, it may also have a recording medium reading unit 5011, etc. Figure 33(E) is It is a projector and, in addition to the above, has a light source 5033, a projection lens 5034, etc. This is possible. Figure 33(F) shows a portable gaming machine, and in addition to the above, a second display unit It may have 5002, a recording medium reading unit 5011, etc. Figure 33(G) is a television receiver. It is an image device, and in addition to the above-mentioned components, it may also have a tuner, an image processing unit, etc. (Figure) 33(H) is a portable television receiver, and in addition to the above, it is capable of transmitting and receiving signals. It may have a charger 5017, etc. Figure 34(A) is a display, and the above In addition to the above, it may have a support base 5018, etc. Figure 34(B) is a camera. In addition to the above, there is an external connection port 5019, a shutter button 5015, and an image receiving unit. 5016, etc. may be included. Figure 34(C) is a computer, as described above. In addition, there is a pointing device 5020, an external connection port 5019, and a reader / writer 5 021, etc. may be included. Figure 34(D) is a mobile phone, and in addition to the above, Antenna 5014, for 1-segment partial reception service for mobile phones and mobile terminals. It may have, etc.

[0392] The electronic devices shown in Figures 33(A) to 33(H) and Figures 34(A) to 34(D) are various It can have various functions. For example, various types of information (still images, videos, text images, etc.) Functions that display information on the display unit, touch panel function, calendar, date or time display, etc. Functions, functions that control processing through various software (programs), wireless communication functions, The ability to connect to various computer networks using wireless communication functions, and wireless communication functions Functions that use to transmit or receive various data, programs recorded on recording media, or It can have functions such as reading data and displaying it on the display unit. Furthermore, multiple In electronic devices having a display unit, one display unit is primarily used to display image information, and another... A function that primarily displays text information on one display unit, or a function that takes parallax into account on multiple display units. It can have functions such as displaying three-dimensional images by displaying images. Furthermore, Electronic devices having an image receiving unit include functions for taking still images, functions for taking videos, and shooting Functions to automatically or manually correct the captured image, and the recording medium (external or camera) on which the captured image is stored. It can have functions such as saving images internally and displaying captured images on the display unit. Furthermore, the electronic devices shown in Figures 33(A) to 33(H) and Figures 34(A) to 34(D) The functions it can possess are not limited to these, and it can have a variety of functions.

[0393] The electronic device described in this embodiment has a display unit for displaying some kind of information. This embodiment is characterized by the electronic device of this embodiment and the semiconductor device of Embodiments 1 to 9. By combining it with a shift register or display device, reliability and yield can be improved. This allows for improvements in performance, cost reduction, larger display area, and higher resolution display area. .

[0394] Next, we will explain some application examples of semiconductor devices.

[0395] Figure 34(E) shows an example of a semiconductor device being installed as an integral part of a building. ) consists of a housing 5022, a display unit 5023, a remote control device 5024 which is the operating unit, and a speaker 5 Includes 025, etc. The semiconductor equipment is wall-mounted and integrated with the building, and the installation space It can be installed without requiring a large space.

[0396] Figure 34(F) shows another example in which semiconductor equipment is installed within a building and integrated with the building itself. The display panel 5026 is installed together with the unit bath 5027, and the bather This allows viewing of the display panel 5026.

[0397] In this embodiment, walls and a unit bathroom are used as examples of buildings, but the actual form of this embodiment may vary. The configuration is not limited to this, and semiconductor devices can be installed in various types of buildings.

[0398] Next, we will show an example in which a semiconductor device is integrated with a mobile device.

[0399] Figure 34(G) shows an example of a semiconductor device installed in an automobile. Display panel 5 028 is attached to the vehicle body 5029 and is used for the operation of the vehicle body or to enter from inside or outside the vehicle. The information being provided can be displayed on demand. Furthermore, it has a navigation function. It's fine if you do that.

[0400] Figure 34(H) shows an example in which a semiconductor device is integrated with a passenger aircraft. Figure 34(H) shows a display panel 5031 installed on the ceiling 5030 above the seats of a passenger aircraft. This diagram shows the shape of the unit when in use. The display panel 5031 is located on the ceiling 5030. It is integrally attached via the hinge portion 5032, and the extension and retraction of the hinge portion 5032 Passengers will be able to view the display panel 5031. The display panel 5031 can be operated by passengers. It has the function of displaying information.

[0401] In this embodiment, the mobile body is exemplified by an automobile body and an airplane body. However, this is not limited to motorcycles, four-wheeled vehicles (including automobiles, buses, etc.), and trains (monorails). It can be installed on various things, including railroads, railways, ships, etc. [Explanation of Symbols]

[0402] 100 circuits 101 Transistors 102 transistors 103 Transistors 104 transistors 105 Capacitive element 106 Capacitive elements 107 Diodes 121 Wiring 122 Wiring 123 Wiring 124 Wiring 125 Wiring 126 Wiring 127 Wiring 128 Wiring 131 transistors 132 transistors 133 transistors 134 transistors 135 transistors 137 transistors 138 transistors 200 flip-flops 201 Wiring 202 Wiring 203 Wiring 204 Wiring 205 Wiring 206 Wiring 207 Wiring 211 Circuits 212 circuits 213 circuits 214 circuits 215 circuits 216 circuits 220 Shift Registers 221 Circuits 222 circuits 223 circuits 301 Transistors 302 Transistors 303 Transistors 304 transistors 311 Wiring 320 flip-flops 321 Wiring 401 Conductive layer 402 Semiconductor layer 403 Conductive layer 404 Conductive layer 405 Contact Hole 411 Opening 412 Opening 421 Wiring width 422 Wiring width 423 width 424 width 426 width 431 width 432 width 500 circuits 501 Circuit 502 Circuit 503 Transistors 504 Wiring 505 Wiring 514 Signal 515 Signal 101pF transistor 102pF transistor 103a diode 103pF transistor 104a diode 104pF transistor 105a Transistor 106a Transistor 107a Transistor 122A Wiring 122B Wiring 122C wiring 122D Wiring 122E Wiring 122F Wiring 122G wiring 122H Wiring 122I Wiring 123A Wiring 123B Wiring 123C Wiring 123D Wiring 123E Wiring 124A wiring 124B Wiring 124C wiring 133a diode 134a diode 135a diode 5000 cabinets 5001 Display section 5002 Display section 5003 Speaker 5004 LED Lamp 5005 Operation Keys 5006 Connection terminal 5007 Sensor 5008 Microphone 5009 Switch 5010 Infrared Port 5011 Recording medium reading unit 5012 Support part 5013 Earphones 5014 Antenna 5015 Shutter button 5016 Image receiving unit 5017 charger 5018 Support stand 5019 External connection port 5020 Pointing Device 5021 Leader / Writer 5022 enclosure 5023 Display section 5024 Remote control device 5025 Speaker 5026 Display Panel 5027 Unit Bathroom 5028 Display Panel 5029 Car body 5030 Ceiling 5031 Display Panel 5032 Hinge section 5033 Light source 5034 Projection Lens 5080 pixels 5081 Transistor 5082 Liquid crystal element 5083 Capacitive element 5084 Wiring 5085 Wiring 5086 Wiring 5087 Wiring 5088 Electrode 5184 Signal 5185 Signal 5186 Signal 5260 circuit board 5261 Insulating layer 5262 Semiconductor layer 5263 Insulating layer 5264 Conductive layer 5265 Insulating layer 5266 Conductive layer 5267 Insulating layer 5268 Conductive layer 5269 Insulating layer 5270 Emitting layer 5271 Conductive layer 5273 Insulating layer 5300 circuit boards 5301 Conductive layer 5302 Insulating layer 5304 Conductive layer 5305 Insulating layer 5305 Insulating layer 5306 Conductive layer 5307 Liquid crystal layer 5308 Conductive layer 5350 area 5351 area 5352 circuit board 5353 area 5354 Insulating layer 5355 area 5356 Insulating layer 5357 Conductive layer 5358 Insulating layer 5359 Conductive layer 5360 Video signal 5361 Circuit 5362 Circuit 5363 Circuit 5364 pixel section 5365 Circuit 5366 Lighting device 5367 pixels 5371 Wiring 5372 Wiring 5373 Wiring 5380 circuit board 5381 Input terminal 5262a area 5262b area 5262c area 5262d area 5262e area 5303a Semiconductor layer 5303b Semiconductor layer 5361a Circuit 5361b circuit 5362a Circuit 5362b circuit

Claims

1. A first conductive film having a region extending in a first direction and functioning as a first clock signal line, A second conductive film having a region extending in the first direction and functioning as a second clock signal line, A third conductive film having a region extending in the first direction and functioning as a power line, A fourth conductive film that is always in electrical contact with either the source electrode or the drain electrode of the first transistor, A fifth conductive film having a region in contact with the first conductive film in the first contact hole, a region in contact with the fourth conductive film in the second contact hole, and intersecting with the second conductive film, A sixth conductive film having a region in contact with the first conductive film in the third contact hole, The first transistor, wherein the source electrode or the other of the drain electrode is always in conductivity with the first gate wire, The gate driver includes a second transistor in which one of the source electrode or drain electrode is always in conductivity with the first gate line, and the other of the source electrode or drain electrode is always in conductivity with the third conductive film. The first to third contact holes are located in the gate driver. The fourth conductive film does not overlap with the first conductive film. The sixth conductive film does not overlap with the second conductive film. The area in contact between the sixth conductive film and the first conductive film is greater than the area in contact between the fourth conductive film and the fifth conductive film. Display device.

2. A first conductive film having a region extending in a first direction and functioning as a first clock signal line, A second conductive film having a region extending in the first direction and functioning as a second clock signal line, A third conductive film having a region extending in the first direction and functioning as a power line, A fourth conductive film that is always in electrical contact with either the source electrode or the drain electrode of the first transistor, A fifth conductive film having a region in contact with the first conductive film in the first contact hole, a region in contact with the fourth conductive film in the second contact hole, and intersecting with the second conductive film, A sixth conductive film having a region in contact with the first conductive film in the third contact hole, The first transistor, wherein the source electrode or the other of the drain electrode is always in conductivity with the first gate wire, The gate driver includes a second transistor in which one of the source electrode or drain electrode is always in conductivity with the first gate line, and the other of the source electrode or drain electrode is always in conductivity with the third conductive film. The first to third contact holes are located in the gate driver. The fourth conductive film does not overlap with the first conductive film. The fourth conductive film does not overlap with the second conductive film. The sixth conductive film does not overlap with the second conductive film. The area in contact between the sixth conductive film and the first conductive film is greater than the area in contact between the fourth conductive film and the fifth conductive film. Display device.

3. A first conductive film having a region extending in a first direction and functioning as a first clock signal line, A second conductive film having a region extending in the first direction and functioning as a second clock signal line, A third conductive film having a region extending in the first direction and functioning as a power line, A fourth conductive film that is always in electrical contact with either the source electrode or the drain electrode of the first transistor, A fifth conductive film having a region in contact with the first conductive film in the first contact hole, a region in contact with the fourth conductive film in the second contact hole, and intersecting with the second conductive film, A sixth conductive film having a region in contact with the first conductive film in the third contact hole, The first transistor, wherein the source electrode or the other of the drain electrode is always in conductivity with the first gate wire, The gate driver includes a second transistor in which one of the source electrode or drain electrode is always in conductivity with the first gate line, and the other of the source electrode or drain electrode is always in conductivity with the third conductive film. The first to third contact holes are located in the gate driver. The fourth conductive film does not overlap with the first conductive film. The sixth conductive film does not overlap with the second conductive film. In a plan view, the entire sixth conductive film is located in a region inward from the periphery of the first conductive film. The area in contact between the sixth conductive film and the first conductive film is greater than the area in contact between the fourth conductive film and the fifth conductive film. Display device.

4. A first conductive film having a region extending in a first direction and functioning as a first clock signal line, A second conductive film having a region extending in the first direction and functioning as a second clock signal line, A third conductive film having a region extending in the first direction and functioning as a power line, A fourth conductive film that is always in electrical contact with either the source electrode or the drain electrode of the first transistor, A fifth conductive film having a region in contact with the first conductive film in the first contact hole, a region in contact with the fourth conductive film in the second contact hole, and intersecting with the second conductive film, A sixth conductive film having a region in contact with the first conductive film in the third contact hole, The first transistor, wherein the source electrode or the other of the drain electrode is always in conductivity with the first gate wire, The gate driver includes a second transistor in which one of the source electrode or drain electrode is always in conductivity with the first gate line, and the other of the source electrode or drain electrode is always in conductivity with the third conductive film. The first to third contact holes are located in the gate driver. The fourth conductive film does not overlap with the first conductive film. The fourth conductive film does not overlap with the second conductive film. The sixth conductive film does not overlap with the second conductive film. In a plan view, the entire sixth conductive film is located in a region inward from the periphery of the first conductive film. The area in contact between the sixth conductive film and the first conductive film is greater than the area in contact between the fourth conductive film and the fifth conductive film. Display device.

5. In any one of claims 1 to 4, The first conductive film has a plurality of laminated conductive films. Display device.

6. In any one of claims 1 to 5, The second conductive film has a plurality of laminated conductive films. Display device.

7. In any one of claims 1 to 6, The first gate line is always in electrical contact with the gate of the transistor in the pixel. Display device.

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