Wiring board, semiconductor device, transport system, method for manufacturing a wiring board, and method for manufacturing a semiconductor device.

JP2026139090APending Publication Date: 2026-09-01TOPPAN HOLDINGS INC
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Patent Information

Application Number
JP2025025476
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-02-20
Publication Date
2026-09-01

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Benefits of technology

【0007】 本発明によれば、ガラス支持体をロボットハンドでハンドリングする場合、ガラス支持体とロボットハンドの接触を抑制することができる。 上記した以外の課題、構成および効果は、以下の発明を実施するための形態における説明により明らかにされる。

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Abstract

The present invention provides a wiring board, a semiconductor device, a transport system, a method for manufacturing a wiring board, and a method for manufacturing a semiconductor device that suppress contact between the glass support and the robot hand when the glass support is handled by the robot hand. [Solution] A wiring board 100 including insulating resin layers 15, 19 and wiring layers 14, 18 laminated on a glass support 10 placed on a stage 50 of a manufacturing apparatus, wherein a reflector 11 is placed on the side surface of the glass support 10, and with respect to visible light and infrared light, the reflectance of the reflector 11 is greater than the reflectance of the glass support 10, and the transmittance of the reflector 11 is less than the transmittance of the glass support 10.
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Description

Technical Field

[0001] The present invention relates to a wiring substrate, a semiconductor device, a transport system, a method for manufacturing a wiring substrate, and a method for manufacturing a semiconductor device. Background Art

[0002] Next-generation semiconductor packaging technologies require miniaturization and high lamination for high-end AI and network applications. An RDL substrate (Redistribution Layer substrate) with a glass support, which uses a glass substrate as a carrier (hereinafter also referred to as a "glass carrier"), is a wiring substrate constituted by a wiring layer laminated on the glass support. Since the glass support is extremely flat, fine wiring can be formed with high precision; furthermore, since production can be performed with a large square panel size of, for example, about 500 mm per side, high yield and cost reduction can be achieved. Due to these advantages, EDL substrates with glass supports are attracting attention as a next-generation semiconductor packaging technology.

[0003] On the other hand, since the base substrate of an RDL substrate with a glass support is a glass substrate, it has the drawback of low durability and being prone to cracking during the manufacturing process. As a technology for protecting glass substrates, for example, Patent Document 1 discloses the following content as a glass film laminate and a method for manufacturing a liquid crystal panel: "Provided are a glass film laminate (1) and a method for manufacturing a liquid crystal panel, which make it possible to prevent the occurrence of light spot defects and breakage while improving the handleability of a glass film (10). The glass film laminate (1) is produced by laminating a glass film (10) on a supporting glass (12) serving as a support (11), wherein a chamfered portion (15) is provided on the outer peripheral edge of the glass film (10) only on the effective surface (10b) side, which is the surface opposite to the contact surface (10a) side of the glass film (10) that contacts the supporting glass (12)." Prior Art Documents Patent Documents

[0004] [Patent Document 1] International Publication No. 2015 / 072360 [Overview of the project] [Problems that the invention aims to solve]

[0005] In the manufacturing process of RDL substrates with glass supports, the glass supports are stored and transported in substrate mounting containers such as FOUPs (Front Opening Unified Pods). When moving the glass supports from the substrate mounting container to the manufacturing equipment, the glass supports are handled (transported) by a robotic hand. However, because the glass supports are transparent, the robotic hand may not be able to accurately detect the position of the glass supports, potentially causing contact between the robotic hand and the glass supports and resulting in damage to the glass supports. Patent Document 1 does not describe the handling by the robotic hand. Therefore, the present invention aims to provide a technique for suppressing contact between a glass support and a robot hand when the glass support is handled by a robot hand. [Means for solving the problem]

[0006] To solve the above problems, one representative wiring board of the present invention is a wiring board comprising an insulating resin layer and a wiring layer laminated on a glass support, characterized in that a reflector is arranged on the side surface of the glass support. [Effects of the Invention]

[0007] According to the present invention, when handling a glass support with a robot hand, contact between the glass support and the robot hand can be suppressed. Other issues, configurations, and effects not mentioned above will be clarified by the description of the embodiments for carrying out the invention below. [Brief explanation of the drawing]

[0008] [Figure 1]Figure 1 is a schematic diagram showing how a wafer is placed in a substrate mounting container. [Figure 2] Figure 2 illustrates the case where a glass support is transported using an apparatus similar to that used for transporting wafers in a conventional example. [Figure 3] Figure 3 shows the process of preparing the glass support. [Figure 4] Figure 4 shows the process of forming a first seed layer on at least the side surface of the glass support (first seed layer formation process). [Figure 5] Figure 5 shows the process of forming a resist layer on a glass support (resist layer formation process). [Figure 6] Figure 6 shows the process of forming a plating layer on a glass support (plating process). [Figure 7] Figure 7 shows the process of removing the resist layer and forming a wiring layer (wiring layer formation process). [Figure 8] Figure 8 shows the process of forming an insulating resin layer on a glass support (insulating resin layer formation process). [Figure 9] Figure 9 shows the process of forming vias in the insulating resin layer (via formation process). [Figure 10] Figure 10 shows the process of forming a second seed layer on the insulating resin layer and vias (second seed layer formation process). [Figure 11] Figure 11 shows the case when the wiring layer and insulating resin layer are formed. [Figure 12] Figure 12 shows the process of mounting semiconductor chips onto a wiring board (chip mounting process). [Figure 13] Figure 13 shows the process of peeling off the glass support (glass support peeling process). [Figure 14] Figure 14 is a flowchart showing a method for manufacturing a wiring board and a semiconductor device. [Figure 15] Figure 15 shows a case where a glass support is being transported in a transport system. [Figure 16]FIG. 16 is a diagram showing the number of collisions between a robot hand and a glass support when a metal film is arranged on the side surface of the glass support. [Figure 17] FIG. 17 is a diagram showing a step of forming a seed layer on the upper surface of a glass support. [Figure 18] FIG. 18 is a diagram showing a step of forming a seed layer on the side surface of a glass support, an insulating resin layer, and a via. [Figure 19] FIG. 19 is a diagram showing a case where a wiring layer and an insulating resin layer are formed. [Figure 20] FIG. 20 is a flowchart showing a method for manufacturing a wiring substrate and a semiconductor device. [Figure 21] FIG. 21 is a diagram, viewed from above, showing the positional relationship between a glass support and a robot hand when the glass support is transported. [Figure 22] FIG. 22 is a diagram, viewed from above, showing the positional relationship between a glass support and a robot hand when the glass support is transported. [Figure 23] FIG. 23 is a diagram, viewed from above, showing the positional relationship between a glass support and a robot hand when the glass support is transported. [Figure 24] FIG. 24 is a diagram, viewed from above, showing the positional relationship between a glass support and a robot hand when the glass support is transported. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The present invention is not limited to these embodiments. In the description of the drawings, the same portions are denoted by the same reference numerals. When there are a plurality of components having the same or similar functions, description may be given by adding different suffixes to the same reference numeral. Further, when it is not necessary to distinguish between the plurality of components, the suffix may be omitted in the description. The positions, sizes, shapes, and ranges of the components shown in the drawings may not represent their actual positions, sizes, shapes, and ranges in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the positions, sizes, shapes, and ranges disclosed in the drawings.

[0010] In this disclosure, "upper surface" and "lower surface" refer to the surfaces shown above or below the plate-like member or layers contained within the plate-like member in the drawing. "Upper surface" and "lower surface" may also be referred to as "first surface" and "second surface."

[0011] Furthermore, "side surface" refers to the surface or thickness of a layer within a plate-like member or a layer contained within a plate-like member. Furthermore, "upward" refers to the vertically upward direction when a plate-like member or layer is placed horizontally. In addition, "upward" and its opposite, "downward," may be referred to as the "positive z-axis direction" and the "negative z-axis direction," respectively, while the horizontal direction may be referred to as the "x-axis direction" and the "y-axis direction."

[0012] <Conventional Conveying Methods> First, with reference to Figure 1, we will explain the case in which wafers are handled (transported) using conventional transport means in the semiconductor device manufacturing process. Figure 1 is a schematic diagram showing the case in which wafers are placed in a substrate mounting container. Figure 1(a) is a view of the substrate mounting container from the horizontal direction (x-axis direction), and Figure 1(b) is a view of the substrate mounting container from above (z-axis direction).

[0013] As shown in Figure 1(a), the substrate mounting container 1 has holder portions 21 to 24 (hereinafter, unless otherwise specified, they may simply be referred to as "holder portion 2"), and the spaces between holder portions 21 and 23 and between holder portions 22 and 24 are equally spaced with length p in the z-axis direction. The gaps between holder portions 2 in the z-axis direction form slots 3, which are spaces in which wafers are placed. Wafer 901 is placed on holder portions 21 and 22, and wafer 902 is placed on holder portions 23 and 24. Wafers 901 and 902 (hereinafter, unless otherwise specified, they may simply be referred to as "wafer 90") have a thickness a. The holder portion 2 has a thickness f.

[0014] As shown in Figure 1(b), the transport system 300 includes a substrate mounting container 1 on which the wafer 90 is placed substantially horizontally, and a transport device 200. The transport device 200 includes a robot hand 4 and a control device 201. The control device 201 transports the wafer 90 to each manufacturing device according to the semiconductor device manufacturing process. The robot hand 4 is equipped with, for example, a suction pad, and can hold the wafer 90 by suctioning it with the suction pad. The robot hand 4 also unloads the wafer 10 from the substrate mounting container 1 and loads the wafer 90 into a predetermined slot 3.

[0015] When the robot hand 4 removes the wafer 901 from the substrate mounting container 1, first, the robot hand 4 moves, for example, in the positive x-axis direction to enter the substrate mounting container 1. Next, the robot hand 4 moves in the positive z-axis direction to lift the wafer 901 from the holder part 2. While holding the wafer 901 up, the robot hand 4 moves in the negative x-axis direction to move the wafer 901 outside the substrate mounting container 1 and transport it to a predetermined manufacturing device.

[0016] Here, when the robot hand 4 is to enter the substrate-mounted container 1, a margin of length d is set between it and the wafer 90 so that it does not come into contact with the wafer 10. If the thickness of the robot hand 4 is b, the range e in which the robot hand 4 can enter is p-2d-bf.

[0017] <First Embodiment> (Problems when using conventional transport methods) Next, the transport of the glass support according to this disclosure will be described with reference to Figure 2. Figure 2 is a diagram illustrating the transport of a glass support using an apparatus similar to that used for transporting wafers in conventional examples. Glass supports have characteristics that make them more susceptible to deformation than conventional wafers, and in recent years, their size has been increasing to over 400 mm on each side. Such glass supports with sides exceeding 300 mm may experience significant warping as the manufacturing process progresses. In this disclosure, the case of manufacturing a wiring board using a glass substrate as a glass support is described, but this disclosure is not limited to this case and can be applied to the transport of glass substrates as well.

[0018] Figure 2 shows an example of deformation of the glass support 101. The wiring board manufacturing process is carried out while the glass support 101 is moved between the substrate mounting container 1 and each manufacturing device. In the substrate transport container 1 in Figure 2, the glass support 101 and glass support 102 are stored (hereinafter, unless there is a need to distinguish between them, they will simply be referred to as "glass support 10"). For the sake of brevity, the thickness of the glass support 10 is set to be the same as the thickness a of the wafer 90.

[0019] In the manufacturing process of RDL substrates with a glass support, the glass support is processed in various manufacturing devices such as a sputtering device, a plating device, a resist coating device, and an exposure device. For example, the robot hand 4 transports the wafer 10 from the substrate container 1 to the sputtering device, and after the sputtering process is completed, it transports the wafer 10 back from the sputtering device to the substrate container 1. Figure 2 shows a scenario in which the glass support 101 undergoes a process that causes deformation, and is then transported back into the substrate container 1. The glass support 101 is warped, and the central part of the glass support 101 is displaced in the negative z-axis direction by a length (c+f) compared to when no warping occurs. The range e1 that the robot hand 4 can enter is p-2d-bfc.

[0020] Since range e1 is narrower than range e, if the control accuracy of the robot hand 4 cannot be sufficiently ensured, there is a risk that the robot hand 4 may come into contact with the glass support 10. Furthermore, the amount of warping of the glass support 10 changes as the process progresses, and the degree of deformation that occurs differs with each processing step. When attempting to set the range of entry while ensuring a margin of length d for the control accuracy of the robot hand 4, it may be necessary to increase the spacing p of the slots 3, which could result in situations where glass supports cannot be placed in adjacent slots. In this case, it is possible that the production efficiency of the wiring board may be affected.

[0021] (Manufacturing method for wiring boards) A method for manufacturing a wiring board according to a first embodiment will be described with reference to Figures 3 to 13. Figures 3 to 13 schematically show a portion of the cross-section of the glass support for ease of understanding and illustrate the processing in the manufacturing process. While a case in which one wiring board is formed on the glass support is shown, this disclosure is not limited to this case, and other changes and modifications are possible.

[0022] Figure 3 shows the process for preparing the glass support 10. The glass support 10 is a glass support with high flatness and rigidity. Alkali-free glass or borosilicate glass can be used as the material for the glass support 10. The glass support 10 is transported to each manufacturing apparatus for processing and placed on the stage 50 in each manufacturing apparatus. The size of the glass support 10 is, for example, 510 mm x 515 mm, and the thickness is 0.3 mm to 1.2 mm (in the range of 0.3 mm to 1.2 mm). Other sizes of the glass support 10, such as 600 mm x 600 mm, can also be applied.

[0023] Next, Figure 4 shows the process of forming a first seed layer on at least the side surface 10s of the glass support 10 (first seed layer formation process). In the first embodiment, in the first seed layer formation process, a seed layer 11 is also formed on the upper surface 10t of the glass support 10. The seed layer 11 is formed by sputtering or electroless plating using, for example, Ni (nickel), Cr (chromium), Cu (copper), and Ti (tungsten). The seed layer 11 is formed on the side surface 10s in addition to the upper surface 10t of the glass support 10. When sputtering is performed, the target material, which is the substance to be used as the seed layer, is deposited from the upper surface 10t side of the glass support 10. For example, by placing a frame-shaped shield with an opening in the center between the glass support 10 and the target material, it is possible to shield the substance emitted from the target material toward the peripheral part of the upper surface 10t and the side surface 10s, while allowing the substance emitted from the target material toward the upper surface 10t to reach the upper surface 10t of the glass support 10. In previous methods, sputtering was performed using such shielding to avoid forming an unnecessary seed layer on the side surface 10s of the glass support 10, while forming a seed layer on the upper surface 10t of the glass support 10. In contrast, in this disclosure, for example, by increasing the size of the opening in the shielding or by removing a portion of the shielding that faces the area of ​​the side surface 10s to be coated, it is possible to allow the material emitted from the target material to reach the side surface 10s. By performing sputtering in this manner, a seed layer 11 is formed not only on the surface 10s of the glass support 10 but also on the side surface 10s of the glass support 10. The thickness t of the seed layer 11 on the side surface 10s of the glass support 10 is, for example, 5 nm or more, preferably 50 nm or more, and more preferably 100 nm. The location where the seed layer 11 is formed will be described later.

[0024] The seed layer 11 material includes at least one of Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, and Pt. Specifically, when formed by sputtering, for example, Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, Pt, AlSi, AlSiCu, AlCu, NiFe, ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), AZO (Aluminum-doped Zinc Oxide), ZnO, PZT (Lead Zirconate Titanate), TiN, Cu3N4, Cu alloy, etc. When formed by electroless plating, for example, Cu, Pd, Al, Sn, Ni, and Cr, etc. can be used.

[0025] Next, Figure 5 shows the process of forming a resist layer 12 on the glass support 10 (resist layer formation process). The resist layer 12 is formed by applying a resist to the glass support 10, followed by exposure and development. The resist layer 12 has a resist pattern in the xy plane for forming a wiring layer, which will be described later.

[0026] Methods for applying the resist to the glass support 10 include spin coating, spray coating, screen printing, and inkjet printing. Furthermore, the resist can be a photosensitive resist made from novolac resin, a non-photosensitive resist made from epoxy resin, or a dry resist made from polyimide and polysiloxane.

[0027] Next, Figure 6 shows the process of forming a plating layer 13 on the glass support 10 (plating process). The plating layer 13 is formed on the seed layer 11 according to the pattern of the resist layer 12.

[0028] Methods for forming the plating layer 13 include electroplating, electroless plating, and sputtering. Examples of materials that can be used for the plating layer 13 include Cu, Cu alloy, Ag, Ag alloy, Sn, Pd, Au, Ni, Cr, Pt, and Fe.

[0029] Next, Figure 7 shows the process of removing the resist layer 12 and forming the wiring layer (wiring layer formation process). The resist layer 12 and the unnecessary portion of the seed layer 11 are removed, and the wiring layer 14 is formed. The wiring layer 14 includes the seed layer 11 and the plating layer 13. The wiring layer 14 forms a predetermined wiring pattern in the xy plane. In addition, a portion of the seed layer 11 remains on the side surface 10s of the glass support 10 and functions as a reflector when handling is performed.

[0030] As a method for removing the resist layer 12, it is possible to use a method in which the glass support 10 is immersed in a resist stripping solution to dissolve and remove the resist layer 12.

[0031] Next, Figure 8 shows the process of forming an insulating resin layer 15 on the glass support 10 (insulating resin layer formation process). The insulating resin layer 15 is formed on the wiring layer 14 and the glass support 10.

[0032] For example, thermosetting resins, thermoplastic resins, and photosensitive resins, as well as resin materials obtained by mixing these, can be used as the material for the insulating resin layer 15. Specifically, these include epoxy resins, acrylic resins, phenolic resins, melamine resins, silicone resins, polyimide resins, acrylic resins, polyphenylene ether resins, maleimide resins, liquid crystal polymers, and fluororesins. These resins may contain inorganic or organic fillers.

[0033] Next, Figure 9 shows the process of forming vias 16 in the insulating resin layer 15 (via formation process). The vias 16 are formed to expose predetermined locations on the wiring layer 14. Possible methods for forming the vias 16 include evaporating the resin by laser irradiation to form an opening, or etching using plasma or chemicals.

[0034] Next, Figure 10 shows the process of forming a second seed layer on the insulating resin layer 15 and via 16 (second seed layer formation process). The seed layer 17 is formed to connect the wiring layer 14 to other wiring layers. The method for forming the seed layer 17 can be the same as the method for forming the seed layer 11. The material for the seed layer 17 can also be the same as the material for the seed layer 11.

[0035] By repeatedly performing the resist layer formation process, plating process, wiring layer formation process, insulating resin layer formation process, via formation process, and second seed layer formation process, it is possible to form a wiring substrate having a desired structure. Figure 11 shows the case when the wiring layer 18 and insulating resin layer 19 are formed. The wiring layer 18 forms a predetermined wiring pattern in the xy plane and is electrically connected to the wiring layer 14. The same formation method and materials as for the wiring layer 14 can be applied to the wiring layer 18, and the same formation method and materials as for the insulating resin layer 15 can be applied to the insulating resin layer 19.

[0036] The insulating resin layers 15 and 19 and wiring layers 14 and 18 laminated on the glass support 10 form a wiring board (RDL board) 100. The wiring board 100 contains two insulating resin layers and two wiring layers, but the number of insulating resin layers and wiring layers may be more than two.

[0037] Next, with reference to Figures 12 and 13, the process of mounting the semiconductor chip 60 onto the wiring board 100 will be described. Figure 12 shows the process of mounting the semiconductor chip 60 onto the wiring board 100 (chip mounting process). The semiconductor chip 60 is flip-chip mounted onto the wiring board 100. After the semiconductor chip 60 is mounted, a molding encapsulation process is performed, and the semiconductor chip 60 is encapsulated by a molding material 61.

[0038] Although the example shown illustrates the mounting of a semiconductor chip 60, this disclosure is not limited to this case. Other electronic components may be mounted, or an interposer substrate containing multiple semiconductor chips may be mounted.

[0039] Figure 13 shows the process of peeling off the glass support 10 (glass support peeling process). The glass support 10 is peeled off from the wiring board 100 to form the wiring board 100 and the semiconductor device 110 including the semiconductor chip 60 mounted on the wiring board 100. Possible methods for peeling off the glass support 10 include applying mechanical force to the adhesive portion between the glass support 10 and the wiring board 100 to peel off the glass support 10, or heating the adhesive portion to soften it and peel off the glass support 10.

[0040] (Flowchart of the manufacturing method of the wiring board 100) Figure 14 is a flowchart showing the manufacturing method of the wiring board 100 and the semiconductor device 110. First, a first seed layer formation process is performed (step S1). A seed layer 11 is formed on at least the side surface 10s of the glass support 10. In the first embodiment, in the first seed layer formation process, a seed layer 11 is also formed on the upper surface 10t of the glass support 10. Next, a resist layer formation process is performed (step S2). The resist layer 12 has a pattern for forming the wiring layer 14, which will be described later. Next, a plating process is performed (step S3). A plating layer 13 is formed according to the pattern formed on the resist layer 12. Next, a wiring layer formation process is performed (step S4). In the wiring layer formation process, unnecessary portions of the resist layer 12 and seed layer 11 are removed. The remaining portions of the plating layer 13 and seed layer 11 form the wiring layer 14. Next, an insulating resin layer formation process is carried out (step S5). An insulating resin layer 15 is formed on the glass support 10 and the wiring layer 14. Next, a via formation process is performed (step S6). Vias 16 are formed in the insulating resin layer 15. The vias 16 are formed to connect the wiring layer 14 with other wiring layers. Next, the second seed layer formation process is performed (step S7). A seed layer 17 is formed on the vias 16 and the insulating resin layer 15.

[0041] By repeating steps S2 to S7, a wiring layer and an insulating resin layer are formed. The number of wiring layers and insulating resin layers to be formed can be set according to the structure of the wiring board to be manufactured. Through the above process, a wiring board including an insulating resin layer and a wiring layer laminated on a glass support 10 is formed.

[0042] Next, the chip mounting process is carried out (step S8). The semiconductor chip 60 is mounted on the wiring board 100. Next, a molding and sealing process is performed (step S9). The semiconductor chip 60 is sealed with molding material 61. Next, a glass support peeling process is performed (step S10). The glass support 10 is peeled off from the wiring substrate 100, and the semiconductor device 110 is formed.

[0043] In addition to steps S1 to S10, processing steps may be added. For example, before the first seed layer formation step in step S1, a step may be included in which an adhesion layer to improve the adhesion between the glass support 10 and the seed layer 11, and a release layer to facilitate the peeling of the glass support in step S10, are formed on the upper surface 10t of the glass support 10.

[0044] (Handling by a transport system) Figure 15 shows the case in which the glass support 10 is transported in the transport system 350. Figure 15 shows the positional relationship between the glass support 101 and the robot hand 4 as viewed from above when the glass support 10 is being transported. The transport system 350 includes a substrate mounting container 1 on which the glass support 101 is placed substantially horizontally, and a transport device 250 equipped with a detector at the tip of the robot hand 4. The glass support 101 is in the state after the first seed layer formation process shown in Figure 4 has been performed, for example, having been transported from the sputtering apparatus to the substrate mounting container 1 and waiting for the next process.

[0045] In the transport device 250, a detector 41 is provided on the robot hand 4. In this disclosure, the robot hand 4 has a Y-shape, and the detectors 41 are provided at two ends of the robot hand 4. For example, a proximity sensor can be used as the detector 41. The proximity sensor is a sensor that detects before the robot hand 4 comes into contact with the glass support 101, and detects the distance by measuring the time it takes for light to be reflected from the glass support 101, for example, by shining light on the glass support 101. The light used in the proximity sensor can be infrared light (wavelength approximately 850 nm to 950 nm) or visible light (wavelength approximately 400 nm to 700 nm). In the following description, the case in which the detector 41 is a light reflection type sensor will be described. Note that the detector 41 is not limited to the light reflection type, and for example, an ultrasonic reflection type sensor may be applied.

[0046] The seed layer 11, positioned on the side surface 10s of the glass support 101, functions as an infrared light reflector. For example, when the glass thickness is about 5 mm, the transmittance of the glass for infrared light is about 80% to 90%, and the reflectance of the glass is about 5% to 10%. On the other hand, when the seed layer 11 is made of copper, the transmittance of copper is almost 0%, and the reflectance of copper is about 95% to 98%. Furthermore, with respect to visible light, the transmittance of glass is approximately 89.5%, and the reflectance of glass is approximately 8%. On the other hand, the transmittance of copper is almost 0%, and the reflectance of copper is approximately 60% to 70%. Thus, for light in all frequency bands, the reflectivity of the seed layer 11 is greater than that of the glass support 101, and the transmittance of the seed layer 11 is less than that of the glass support 101. For this reason, the portion of the seed layer 11 located on the side surface 10s of the glass support 10 can be used as a reflector.

[0047] If the seed layer 11 is not placed on the side surface 10s of the glass support 101, the robot hand 4 may not be able to detect the glass support 101 when entering the substrate-mounted container 1 and may come into contact with the glass support 101. On the other hand, in this disclosure, since the seed layer 11 placed on the side surface 10s of the glass support 101 functions as a reflector, the transport device 200 can detect the glass support 101 with the detector 41 of the robot hand 4 and stop the robot hand 4 from entering before it comes into contact with the glass support 101.

[0048] (Thickness of seed layer 11) Next, with reference to Figure 16, we will consider the thickness of the seed layer 11 placed on the side surface 10s of the glass support 10. Figure 16 shows the number of times collisions occurred between the robot hand 4 and the glass support 10 when a metal film was placed on the side surface of the glass support 10. The item "Film Thickness (nm)" indicates the thickness of the metal film formed on the side surface 10s of the glass support 10. The item "Sensor Received Light Amount" indicates the amount of reflected light received by the detector 41 of the robot hand 4. The item "Number of Collisions (n=10)" indicates the number of times collisions occurred between the glass support 10 and the robot hand 4 in 10 trials.

[0049] The sample "glass only" shows the case where no metal film is placed on the side surface 10s of the glass support 10. The sensor received 56 light, and the amount of reflected light was approximately halved. The number of collisions was 4 out of 10 trials.

[0050] The sample "with metal film" shows the case where a metal film is placed on the side surface 10s of the glass support 10. When the film thickness is 5 nm, the sensor light intensity is 78, and the amount of reflected light is approximately 80%. The number of collisions is 1 out of 10 trials. When the film thickness is 50 nm, the sensor light intensity is 99, which is almost the same as the sensor light intensity when the film thickness is 100 nm. The number of collisions is 0.

[0051] In the first seed layer formation process (step S1) shown in Figure 4, the thickness of the seed layer 11 on the upper surface 10t of the glass support 10 is approximately 200 nm to 400 nm. In the same process, a seed layer 11 of about 100 nm is also formed on the side surface 10s of the glass support 10, ensuring sufficient thickness to avoid collisions between the robot hand 4 and the glass support 10.

[0052] (Effects / Actions) As described above, this disclosure makes it possible to suppress contact between the glass support and the robot hand when handling the glass support with a robot hand. Although this disclosure describes the case of an RDL substrate for a glass support, it can also be applied when glass substrates are used in applications other than supports. Furthermore, the seed layer 11 formed in the first seed layer formation process includes a portion that will become the wiring layer 14 and a portion that will become the reflector on the side surface 10s of the glass support 10. The material of the reflector is the same as the material of the seed layer 11. Since the seeds for the plating layer and the reflector can be formed at the same time in the seed layer formation process, the increase in manufacturing steps can be suppressed.

[0053] <Second Embodiment> The second embodiment differs from the first embodiment in that, for example, the first seed layer formation step shown in Figure 4 and the second seed layer formation step shown in Figure 10 are performed as the same step. In the following description, components that are the same or equivalent as those in the first embodiment are denoted by the same reference numerals, and their descriptions are simplified or omitted.

[0054] (Manufacturing method for wiring boards) Figure 17 shows the process of forming a seed layer 11a on the upper surface 10t of the glass support 10. In the second embodiment, in the seed layer formation process performed first in the manufacturing process of the wiring substrate, a seed layer 11a is formed on the upper surface 10t of the glass support 10, and no seed layer 11a is formed on the side surface 10s of the glass support 10. The same material and formation method as for the seed layer 11a can be applied. After the seed layer 11a is formed, the process is carried out in the same manner as in the first embodiment, from the resist layer formation process (step S2) to the via formation process (step S6) shown in Figure 14.

[0055] Next, Figure 18 shows the process of forming a seed layer 17a on the side surface 10s of the glass support 10, the insulating resin layer 15, and the vias 16. In the second embodiment, after the first insulating resin layer 15 is formed in the manufacturing process of the wiring board, a seed layer 17a is formed on the side surface 10s of the glass support 10. The seed layer 17a is also formed on the insulating resin layer 15 and the vias 16. The same materials and formation methods as for the seed layer 17a can be applied to the seed layer 17a. After the seed layer 17a is formed, the resist layer formation process (step S2) to the second seed layer formation process (step S7) shown in Figure 14 are repeated, as in the first embodiment. In this disclosure, the case in which the process from step S2 to step S7 is performed twice is described.

[0056] Next, Figure 19 shows the case when the wiring layer 18 and the insulating resin layer 19 are formed. The insulating resin layers 15 and 19 and the wiring layers 14 and 18, which are laminated on the glass support 10, form a wiring board (RDL board) 100a. A seed layer 17a is formed on the side surface of the wiring board 100a, but it can be removed, for example, in the process of cutting the glass support 10 (or wiring board 100a) to a specific size during shipping.

[0057] (Flowchart of the manufacturing method for wiring board 100a) Figure 20 is a flowchart showing the manufacturing method of the wiring board 100a and the semiconductor device. In Figure 20, the same reference numerals are used for the same steps as in the flowchart of Figure 14, and steps S21 to S24 are steps not included in Figure 14. Furthermore, although the above manufacturing method describes the case where a seed layer is formed on the first insulating resin layer, the flowchart shows a generalized case where a seed layer is formed on the P (positive integer)th insulating resin layer.

[0058] In the seed layer formation process of step S21, a seed layer 11a is formed on the upper surface 10t of the glass support 10. The seed layer 11a is not formed on the side surface 10s of the glass support 10. Subsequently, the resist layer formation process (step S2) and the via formation process (step S6) are performed.

[0059] Next, in step S22, it is determined whether the insulating resin layer formed immediately before is the P-th layer (P=2 in the above description). If it is the P-th layer (Yes in step S22), the seed layer that is subsequently formed is formed not only on the top surface and vias of the insulating resin layer, but also on the side surface 10s of the glass support 10. On the other hand, if it is not the P-th layer (No in step S22), the seed layer is formed on the top surface and vias of the insulating resin layer.

[0060] Steps 2 through S23 are repeated to form a wiring substrate including multiple wiring layers and insulating resin layers.

[0061] (Effects / Actions) The impact on the amount of deformation occurring in the glass support 10 differs from process to process. For example, a seed layer can be formed and a reflector placed in a process where a large amount of deformation is expected. Even when the amount of deformation of the glass support 10 is large, it is possible to suppress the robot hand 4 from failing to detect the glass support 10.

[0062] (modified version) The seed layer formed on the side surface 10s of the glass support 10 may cover only a portion of the side surface 10s. A modified example of the seed layer will be described with reference to Figures 21 to 24.

[0063] (Handling by robotic hand) Figures 21 to 24 show the relative positions of the glass support 101 and the robot hand 4 as viewed from above when the glass support 101 is being transported. Figures 21 to 24 show the same scene as in Figure 15, and the glass support 101 is shown in the state after the first seed layer formation process shown in Figure 4 has been completed.

[0064] In Figure 21, the seed layer 11b (reflector) is located on only one of the four sides 10a of the glass support 101. Since side 10a is the side from which the robot hand 4 approaches, the portion of the seed layer 11b formed on side 10a can function as a reflector of the light output from the detector 41.

[0065] Furthermore, in Figure 22, the seed layer 11c is positioned on the side 10a of the glass support 101 that the robot hand 4 approaches, and on the side 10b opposite side 10a. Since the light output from the detector 41 can be reflected at two locations on side 10a or side 10b, the accuracy of the detector 41 in detecting the glass support 10 can be improved.

[0066] Furthermore, the seed layer can be positioned to match the shape of the robot hand 4 and the position of the detector. In Figure 23, the seed layer 11d is positioned in two regions of the side surface 10a that face the detector 41. In other words, the spacing of the detectors 41 at the tip of the robot hand 4 and the spacing of the reflectors on the glass support 101 are approximately the same. In this case, the width w of the seed layer 11d on the side surface 10a can be in the range of 1 / 100 to 1 / 2 of the width L of the side surface 10a of the glass support 10. The maximum value of the width w is 1 / 2 of L because the seed layer may be deposited over the entire side surface 10a of the glass support, and the minimum value of the width w is set to 1 / 100 because detection is possible if the width of the seed layer 11d is at least 5 mm. Also, in Figure 24, the seed layer 11e is positioned not only in the region of the side surface 10a that faces the detector 41, but also in the region of the side surface 10b that faces the detector 41.

[0067] By arranging reflectors in two regions on the side surface 10s to match the shape of the robot hand 4, the likelihood of the detector 41 detecting the glass support 101 can be increased, even if the robot hand 4 enters the substrate container 1 off-horizontally or if the glass support 101 is placed in the substrate container 1 at an angle from the horizontal.

[0068] Although embodiments of the present invention have been described above, the present invention is not limited to the embodiments described above, and various modifications are possible without departing from the spirit of this disclosure.

[0069] The following describes, but is not limited to, embodiments that may constitute the present invention. (Aspect 1) A wiring substrate comprising an insulating resin layer and a wiring layer laminated on a glass support, A reflector is placed on the side surface of the glass support. A wiring board characterized by the following features. (Aspect 2) A wiring board according to Embodiment 1, With respect to visible light and infrared light, the reflectance of the reflector is greater than the reflectance of the glass support. The transmittance of the reflector is less than the transmittance of the glass support. A wiring board characterized by the following features. (Aspect 3) A wiring board according to Embodiment 1 or Embodiment 2, The wiring layer includes a seed layer and a plating layer, The material of the reflector is the same as the material of the seed layer. A wiring board characterized by the following features. (Aspect 4) A wiring board according to any one of embodiments 1 to 3, The material of the seed layer includes at least one of Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, and Pt. A wiring board characterized by the following features. (Appendix 5) A wiring board according to any one of embodiments 1 to 4, The reflector is arranged in two of the side surfaces, The width of the reflector is in the range of 1 / 100 to 1 / 2 of the width of the side surface. A wiring board characterized by the following features. (Aspect 6) A wiring board according to any one of embodiments 1 to 5, The thickness of the reflector is 5 nm or more. A wiring board characterized by the following features. (Aspect 7) A wiring board according to any one of embodiments 1 to 6, The wiring board includes a semiconductor chip mounted on the aforementioned wiring board. A semiconductor device characterized by the following features. (Pattern 8) A circuit board mounting container on which a wiring board described in any one of embodiments 1 to 7 is placed substantially horizontally, A transport device equipped with a detector at the tip of a robot hand, A transport system characterized by the following features. (Aspect 9) A transport system according to any one of embodiments 1 to 8, The spacing of the detectors at the tip of the robot hand, The spacing of the reflectors in the glass support is approximately the same as the spacing of the reflectors in the glass support. A transport system characterized by the following features. (Aspect 10) A method for manufacturing a wiring substrate, which includes an insulating resin layer and a wiring layer laminated on a glass support, A first seed layer formation step in which a first seed layer is formed on at least the side surface of the glass support, A resist layer formation step of forming a resist layer on the glass support, The glass support comprises a plating process for forming a plating layer, A wiring layer formation step involves removing the resist layer and forming a wiring layer, The glass support comprises an insulating resin layer formation step, A via formation step of forming vias in the insulating resin layer, The process includes a second seed layer formation step of forming a second seed layer on the insulating resin layer and the vias. A method for manufacturing a wiring board, characterized by the following: (Aspect 11) A method for manufacturing a wiring board according to embodiment 10, The wiring layer formation step, the plating step, the wiring layer formation step, the insulating resin layer formation step, the via formation step, and the second seed layer formation step are repeated. A method for manufacturing a wiring board, characterized by the following: (Aspect 12) A method for manufacturing a wiring board according to embodiment 10 or embodiment 11, The first seed layer formation step and the second seed layer formation step are performed as the same step. A method for manufacturing a wiring board, characterized by the following: (Aspect 13) A wiring board is formed by the wiring board manufacturing method described in any one of embodiments 10 to 12. A chip mounting process for mounting semiconductor chips onto the aforementioned wiring board, A molding and sealing step in which the semiconductor chip is sealed with a molding material, The process further includes a glass support peeling step of peeling the glass support from the wiring substrate. A method for manufacturing a semiconductor device, characterized by the following: [Explanation of symbols]

[0070] 1: Circuit board mounting container 2: Holder section 3: Slot 4: Robot Hand 10: Glass support 11, 11a, 11b, 11c, 11d, 11e: Seed layer 12: Resist layer 13: Plating layer 14, 18: Wiring layer 15, 19: Insulating resin layer 16: Beer 17, 17a: Seed layer 41: Detector 50: Stage 60: Semiconductor chips 61: Mold material 90: Wafer 100, 100a: Wiring board 110: Semiconductor Devices 200, 250: Conveyor equipment 201: Control device 300, 350: Conveyor systems

Claims

1. A wiring substrate comprising an insulating resin layer and a wiring layer laminated on a glass support, A reflector is placed on the side surface of the glass support. A wiring board characterized by the following features.

2. A wiring board according to claim 1, With respect to visible light and infrared light, the reflectance of the reflector is greater than the reflectance of the glass support. The transmittance of the reflector is less than the transmittance of the glass support. A wiring board characterized by the following features.

3. A wiring board according to claim 1, The wiring layer includes a seed layer and a plating layer, The material of the reflector is the same as the material of the seed layer. A wiring board characterized by the following features.

4. A wiring board according to claim 3, The material of the seed layer includes at least one of Cu, Ni, Al, Ti, Cr, Mo, W, Ta, Au, Ir, Ru, Pd, and Pt. A wiring board characterized by the following features.

5. A wiring board according to claim 1, The reflector is arranged in two of the side surfaces, The width of the reflector is in the range of 1 / 100 to 1 / 2 of the width of the side surface. A wiring board characterized by the following features.

6. A wiring board according to claim 1, The thickness of the reflector is 5 nm or more. A wiring board characterized by the following features.

7. A wiring board according to claim 1, The wiring board includes a semiconductor chip mounted on the aforementioned wiring board. A semiconductor device characterized by the following features.

8. A circuit board mounting container on which a wiring board according to any one of claims 1 to 6 is placed substantially horizontally, A transport device equipped with a detector at the tip of a robot hand, A transport system characterized by the following features.

9. A transport system according to claim 8, The spacing of the detectors at the tip of the robot hand, The spacing of the reflectors in the glass support is approximately the same as the spacing of the reflectors in the glass support. A transport system characterized by the following features.

10. A method for manufacturing a wiring substrate, which includes an insulating resin layer and a wiring layer laminated on a glass support, A first seed layer formation step in which a first seed layer is formed on at least the side surface of the glass support, A resist layer formation step of forming a resist layer on the glass support, The glass support comprises a plating process for forming a plating layer, A wiring layer formation step involves removing the resist layer and forming a wiring layer, The glass support comprises an insulating resin layer formation step, A via formation step of forming vias in the insulating resin layer, The process includes a second seed layer formation step of forming a second seed layer on the insulating resin layer and the vias. A method for manufacturing a wiring board, characterized by the following:

11. A method for manufacturing a wiring board according to claim 10, The wiring layer formation step, the plating step, the wiring layer formation step, the insulating resin layer formation step, the via formation step, and the second seed layer formation step are repeated. A method for manufacturing a wiring board, characterized by the following:

12. A method for manufacturing a wiring board according to claim 10, The first seed layer formation step and the second seed layer formation step are performed as the same step. A method for manufacturing a wiring board, characterized by the following:

13. A wiring board is formed by the wiring board manufacturing method described in claim 10. A chip mounting process for mounting semiconductor chips onto the aforementioned wiring board, A molding and sealing step in which the semiconductor chip is sealed with a molding material, The process further includes a glass support peeling step of peeling the glass support from the wiring substrate. A method for manufacturing a semiconductor device, characterized by the following:

Citation Information

Patent Citations

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