Capacitor sheets, capacitors and electronic components equipped with them

Abstract

We provide capacitor sheets with improved reliability, as well as capacitors and electronic components equipped with them. [Solution] In the capacitor sheet 10, the capacitor 1 equipped therewith, and the electronic component 100, the capacitor sheet 10 is provided with both a first through-hole 50A through which resin 2A can easily flow from the first main surface 10a side, and a second through-hole 50B through which resin 2B can easily flow from the second main surface 10b side. Therefore, when the capacitor sheet 10 is pressed from the top and bottom, the flow of resins 2A and 2B is less likely to be uneven, high positional accuracy can be achieved, and high reliability can be achieved.

Description

[Technical Field]

[0001] The present invention relates to a capacitor sheet, a capacitor equipped therewith, and an electronic component. [Background technology]

[0002] Patent Document 1 below discloses a thin-film capacitor embedded in a circuit board. When the thin-film capacitor is incorporated into the circuit board, it is entirely covered with an insulating resin layer, and the thin-film capacitor is provided with through holes for via conductors that are drawn out to the upper and lower surfaces of the circuit board. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2021-136337 [Overview of the project] [Problems that the invention aims to solve]

[0004] When covering the thin-film capacitor described above with an insulating resin layer, it is conceivable to place the resin on the top and bottom of the thin-film capacitor and press it from above and below. However, if there is an uneven flow of the resin at this time, sufficient positional accuracy cannot be obtained, which may lead to a decrease in reliability.

[0005] One aspect of the present invention aims to provide a capacitor sheet with improved reliability, a capacitor equipped therewith, and an electronic component. [Means for solving the problem]

[0006] A capacitor sheet according to one aspect of the present invention is a capacitor sheet having a first main surface and a second main surface, comprising: a capacitor portion where a dielectric layer is interposed between a first conductor layer positioned on the first main surface side and a second conductor layer positioned on the second main surface side; and a plurality of through-hole portions penetrating the capacitor portion. The plurality of through-hole portions include: a first through-hole portion whose opening dimension decreases in the order of the opening dimension of the first conductor layer, the opening dimension of the dielectric layer, and the opening dimension of the second conductor layer; and a second through-hole portion whose opening dimension increases in the order of the opening dimension of the first conductor layer, the opening dimension of the dielectric layer, and the opening dimension of the second conductor layer.

[0007] A capacitor according to one aspect of the present invention comprises the above-described capacitor sheet, and a resin that covers the first main surface and the second main surface of the capacitor sheet.

[0008] An electronic component according to one aspect of the present invention has the above-described capacitor mounted thereon.

[0009] In the above-described capacitor sheet, the capacitor including the same, and the electronic component, since both the first through-hole portion into which resin from the first main surface side easily flows and the second through-hole portion into which resin from the second main surface side easily flows are provided, when pressing is performed from the vertical direction of the capacitor sheet (the facing direction of the first main surface and the second main surface), unevenness in resin flow is less likely to occur, high positional accuracy can be achieved, and high reliability can be achieved. [Effects of the Invention]

[0010] According to various aspects of the present invention, there are provided a capacitor sheet with improved reliability, a capacitor including the same, and an electronic component. [Brief Description of Drawings]

[0011] [Figure 1] It is a schematic cross-sectional view showing an electronic component according to one embodiment. [Figure 2] It is a schematic cross-sectional view showing the capacitor sheet of the electronic component shown in Fig. 1. [Figure 3] It is an enlarged view of a main part of the capacitor sheet shown in Fig. 2. [Figure 4] Figure 2 is a magnified view of the main part of the capacitor sheet shown. [Figure 5] Figure 1 is a flowchart showing the procedure for manufacturing the capacitor shown. [Figure 6] Figure 5 shows one step in the capacitor manufacturing method. [Figure 7] Figure 5 shows one step in the capacitor manufacturing method. [Figure 8] Figure 5 shows one step in the capacitor manufacturing method. [Figure 9] Figure 5 shows one step in the capacitor manufacturing method. [Figure 10] Figure 5 shows one step in the capacitor manufacturing method. [Modes for carrying out the invention]

[0012] Preferred embodiments of the present invention will be described in detail below with reference to the attached drawings. In the description of the drawings, the same or equivalent elements will be denoted by the same reference numerals, and redundant descriptions will be omitted.

[0013] A capacitor 1 according to one embodiment will be described with reference to Figures 1 to 4. The capacitor 1 is a type of circuit board and has a flexible sheet or plate shape. The capacitor 1 according to this embodiment has, for example, a rectangular sheet shape of 180 mm × 180 mm. The capacitor 1 has a pair of main surfaces 1a and 1b that face each other in the thickness direction.

[0014] The pair of main surfaces 1a and 1b of the capacitor 1 are both made of resin 2. Multiple terminals are provided on each of the pair of main surfaces 1a and 1b, and via conductors 3 to 5 are provided extending from these terminals into the resin 2.

[0015] A CPU 90 is mounted on the main surface 1a of the capacitor 1 via terminals provided on the main surface 1a, and the electronic component 100, including the capacitor 1 and the CPU 90, is formed. In this embodiment, the CPU 90 is mounted on the capacitor 1 via solder bumps.

[0016] Capacitor 1 incorporates a capacitor sheet 10. As shown in Figure 2, the capacitor sheet 10 is sheet-like and has a thickness of, for example, 50 μm or less (40 μm as an example). The capacitor sheet 10 has a pair of opposing main surfaces 10a and 10b in the thickness direction of the capacitor 1. One main surface 10a is located on the main surface 1a side of the capacitor 1 and is covered by resin 2A, which is part of resin 2, from the main surface 1a side of the capacitor 1. Similarly, the other main surface 10b is located on the main surface 1b side of the capacitor 1 and is covered by resin 2B, which is part of resin 2, from the main surface 1b side of the capacitor 1. For convenience of explanation, one main surface 10a of the capacitor sheet 10 will be referred to as the first main surface, and the other main surface 10b will be referred to as the second main surface. Resin 2 can be made of, for example, a polyimide resin or an epoxy resin. Resin 2 may contain a filler, and silica can be used as the filler.

[0017] The capacitor sheet 10 is composed of a dielectric layer 20, a first conductive layer 30, and a second conductive layer 40. Specifically, the capacitor sheet 10 has a laminated structure in which the dielectric layer 20 is sandwiched between the first conductive layer 30 and the second conductive layer 40 in the opposing direction of a pair of main surfaces 10a and 10b. With respect to the dielectric layer 20, the first conductive layer 30 is located on the first main surface 10a side, and the second conductive layer 40 is located on the second main surface 10b side. The capacitor sheet 10 constitutes a capacitance portion C in the region where the dielectric layer 20, the first conductive layer 30, and the second conductive layer 40 are laminated.

[0018] The dielectric layer 20 has a thickness of, for example, 0.1 to 10.0 μm (0.3 μm as an example) and may consist of a sputtered layer of a ceramic dielectric (barium titanate as an example).

[0019] The first conductive layer 30 has a thickness of, for example, 0.1 to 50 μm (20 μm as an example). In this embodiment, the first conductive layer 30 is composed of two layers: a Ni layer 31 and a Cu layer 32. The Ni layer 31 may be a sputtered layer formed on the dielectric layer 20 (for example, with a thickness of 0.5 μm), and the Cu layer 32 may be a plated layer formed on the Ni layer 31 (for example, with a thickness of 19.5 μm). The first conductive layer 30 may be composed of a single layer or of three or more layers.

[0020] The second conductive layer 40 has a thickness of, for example, 1.0 to 50 μm (19.7 μm as an example). In this embodiment, the second conductive layer 40 is composed of two layers: a Ni layer 41 and a Cu layer 42. The Ni layer 41 may be a Ni foil (for example, 14 μm thick) that functions as a substrate on which the dielectric layer 20 is formed, or it may be a Ni-based alloy foil. The Cu layer 42 may be a plating layer (for example, 5 μm thick) formed on the Ni layer 41. The second conductive layer 40 may be composed of a single layer or of three or more layers.

[0021] The capacitor sheet 10 is provided with multiple through-holes 50A, 50B and multiple recesses 50C, 50D. In this embodiment, a capacitor sheet 10 with two through-holes 50A, 50B is shown, but the number of through-holes can be increased as appropriate.

[0022] Each of the multiple through-holes 50A and 50B is composed of the opening edge 51 of the first conductive layer 30, the opening edge 52 of the dielectric layer 20, and the opening edge 53 of the second conductive layer 40. In this embodiment, each of the through-holes 50A and 50B has a circular cross-section, and the opening edges 51, 52, and 53 have concentric circular cross-sections. The cross-sectional view in Figure 2 shows a cross-section that extends along the direction of opposition between the first main surface 10a and the second main surface 10b of the capacitor sheet 10 and passes through the centers of the through-holes 50A and 50B. The width of the through-holes 50A and 50B in Figure 2 is equal to the diameter of the through-holes 50A and 50B.

[0023] The plurality of through-hole portions 50A and 50B are configured to include a first through-hole portion 50A and a second through-hole portion 50B.

[0024] In the first through-hole portion 50A, as shown in Figure 3, the width W of the opening edge 51 of the first conductive layer 30 30 (opening dimension, opening diameter), the width W of the opening edge 52 of the dielectric layer 20 20 , the width W of the opening edge 53 of the second conductive layer 40 40 are different from each other. More specifically, the width W of the opening edge 51 of the first conductive layer 30 30 , the width W of the opening edge 52 of the dielectric layer 20 20 , the width W of the opening edge 53 of the second conductive layer 40 40 decrease in this order (W 30 >W 20 >W 40 ). In the first through-hole portion 50A, the width W of the opening edge 51 of the first conductive layer 30 30 is, for example, 100 to 5000 μm (300 μm as an example), the width W of the opening edge 52 of the dielectric layer 20 20 is, for example, 100 to 5000 μm (200 μm as an example), and the width W of the opening edge 53 of the second conductive layer 40 40 is, for example, 100 to 5000 μm (100 μm as an example).

[0025] With respect to the end of the opening edge 52 of the dielectric layer 20, it protrudes from the end P of the opening edge 51 of the first conductor layer 30 with respect to the extending direction of the dielectric layer 20. The protruding length of the end of the opening edge 52 of the dielectric layer 20 is longer than the thickness of the dielectric layer 20. In this embodiment, the end of the opening edge 52 of the dielectric layer 20 extends beyond the intermediate position L between the end P of the opening edge 51 of the first conductor layer 30 and the end Q of the opening edge 53 of the second conductor layer 40, and is biased toward the opening edge 53 side of the second conductor layer 40. Because the end of the opening edge 52 of the dielectric layer 20 protrudes from the end P of the opening edge 51 of the first conductor layer 30, the creepage distance between the first conductor layer 30 and the second conductor layer 40 is extended, and short circuits between the conductor layers are further suppressed. The longer the creepage distance between the first conductive layer 30 and the second conductive layer 40, the more the short circuit between the conductive layers is suppressed. Therefore, when the end of the opening edge 52 of the dielectric layer 20 is biased toward the opening edge 53 of the second conductive layer 40 beyond the intermediate position L, high insulation between the conductive layers is achieved.

[0026] In this embodiment, the opening edges 51, 52, and 53 of the first through-hole 50A are all inclined to become narrower as they approach the second main surface 10b. In this case, the width W of the opening edges 51, 52, and 53 is... 30 , width W 20 , width W 40 This can be defined as the maximum width (the width at the height position closest to the first main surface 10a). In this embodiment, the inclination angle θ of the opening edge 51 of the first conductive layer 30 30 The inclination angle θ of the opening edge 53 of the second conductive layer 40 is 40 This is different. Specifically, the inclination angle θ of the opening edge 53 of the second conductive layer 40. 40 However, the inclination angle θ of the opening edge 51 of the first conductive layer 30 30 Designed to be smaller (θ 30 >θ 40 ). In the first through-hole portion 50A, the inclination angle θ of the opening edge 51 of the first conductive layer 30 30 For example, the angle is 45-90° (80° as an example), and the inclination angle θ of the opening edge 53 of the second conductive layer 40. 40This is, for example, 30 to 90° (60° as an example). In this embodiment, the inclination angle of the opening edge 52 of the dielectric layer 20 in the first through-hole 50A is the same as the inclination angle θ of the opening edge 51 of the first conductive layer 30. 30 and the inclination angle θ of the opening edge 53 of the second conductive layer 40 40 It's getting smaller.

[0027] In the second through-hole 50B, as shown in Figure 4, the width W of the opening edge 51 of the first conductive layer 30 is also shown. 30 The width W of the opening edge 52 of the dielectric layer 20 20 The width W of the opening edge 53 of the second conductive layer 40. 40 These are different from each other. In the second through-hole portion 50B, unlike the first through-hole portion 50A, the width W of the opening edge 51 of the first conductive layer 30 is different. 30 The width W of the opening edge 52 of the dielectric layer 20 20 The width W of the opening edge 53 of the second conductive layer 40. 40 The order of increasing size is (W 40 >W 20 >W 30 ). In the second through-hole portion 50B, the width W of the opening edge 51 of the first conductive layer 30. 30 The thickness is, for example, 100 to 5000 μm (100 μm as an example), and the width W of the aperture edge 52 of the dielectric layer 20. 20 The width is, for example, 100 to 5000 μm (200 μm as an example), and the width W of the opening edge 53 of the second conductive layer 40. 40 This range is, for example, 100-5000 μm (300 μm as an example).

[0028] With respect to the end of the opening edge 52 of the dielectric layer 20, with respect to the direction of extension of the dielectric layer 20, the end of the opening edge 52 of the dielectric layer 20 protrudes beyond the end Q of the opening edge 53 of the second conductor layer 40. The protruding length of the end of the opening edge 52 of the dielectric layer 20 is longer than the thickness of the dielectric layer 20. In this embodiment, the end of the opening edge 52 of the dielectric layer 20 extends beyond the intermediate position L between the end P of the opening edge 51 of the first conductor layer 30 and the end Q of the opening edge 53 of the second conductor layer 40, and is biased toward the opening edge 51 side of the first conductor layer 30. Because the end of the opening edge 52 of the dielectric layer 20 protrudes beyond the end Q of the opening edge 53 of the second conductor layer 40 in this way, the creepage distance between the first conductor layer 30 and the second conductor layer 40 is extended, and short circuits between the conductor layers are further suppressed. The longer the creepage distance between the first conductive layer 30 and the second conductive layer 40, the more the short circuit between the conductive layers is suppressed. Therefore, when the end of the opening edge 52 of the dielectric layer 20 is biased toward the opening edge 51 of the first conductive layer 30 beyond the intermediate position L, high insulation between the conductive layers is achieved.

[0029] In this embodiment, the opening edges 51, 52, and 53 of the second through-hole portion 50B are all inclined such that they become narrower as they approach the first main surface 10a. In this case, the width W of the opening edges 51, 52, and 53 is... 30 , width W 20 , width W 40 This can be defined as the maximum width (the width at the height position closest to the second main surface 10b). In this embodiment, the inclination angle θ of the opening edge 51 of the first conductive layer 30 30 The inclination angle θ of the opening edge 53 of the second conductive layer 40 is 40 This is different. Specifically, the inclination angle θ of the opening edge 53 of the second conductive layer 40. 40 However, the inclination angle θ of the opening edge 51 of the first conductive layer 30 30 Designed to be smaller (θ 30 >θ 40 ). In the second through-hole portion 50B, the inclination angle θ of the opening edge 51 of the first conductive layer 30 30 For example, the angle is 45-90° (80° as an example), and the inclination angle θ of the opening edge 53 of the second conductive layer 40. 40This is, for example, 30 to 90° (60° as an example). In this embodiment, the inclination angle of the opening edge 52 of the dielectric layer 20 in the second through-hole 50B is the same as the inclination angle θ of the opening edge 51 of the first conductive layer 30. 30 and the inclination angle θ of the opening edge 53 of the second conductive layer 40 40 It's getting smaller.

[0030] As shown in Figure 1, the first through-hole 50A and the second through-hole 50B described above are through which the via conductor 3 extending between the pair of main surfaces 1a and 1b of the capacitor 1 passes. A resin 2 is interposed between the first through-hole 50A and the via conductor 3, electrically insulating them from each other. Similarly, a resin 2 is interposed between the second through-hole 50B and the via conductor 3, electrically insulating them from each other.

[0031] Of the multiple recesses 50C and 50D provided in the capacitor sheet 10, recess 50C is composed of the opening edge 51 of the first conductive layer 30 and the opening edge 52 of the dielectric layer 20, and recess 50D is composed of the opening edge 52 of the dielectric layer 20 and the opening edge 53 of the second conductive layer 40. In this embodiment, recess 50C has a circular cross-section, and the opening edges 51 and 52 have concentric circular cross-sections. Also, recess 50D has a circular cross-section, and the opening edges 52 and 53 have concentric circular cross-sections.

[0032] In recess 50C, the width of the opening edge 52 of the dielectric layer 20 is narrower than the width of the opening edge 51 of the first conductive layer 30, and the end of the opening edge 52 of the dielectric layer 20 protrudes beyond the end of the opening edge 51 of the first conductive layer 30. On the other hand, in recess 50D, the width of the opening edge 52 of the dielectric layer 20 is narrower than the width of the opening edge 53 of the second conductive layer 40, and the end of the opening edge 52 of the dielectric layer 20 protrudes beyond the end of the opening edge 53 of the second conductive layer 40.

[0033] In the recess 50C, as shown in Figure 1, via conductors 4 extending between the pair of main surfaces 1a and 1b of the capacitor 1 are connected to the second conductive layer 40 and are electrically conductive to each other. Similarly, in the recess 50D, via conductors 5 extending between the pair of main surfaces 1a and 1b of the capacitor 1 are connected to the first conductive layer 30 and are electrically conductive to each other.

[0034] In capacitor 1, via conductor 3 has no electrical interaction with the capacitance C of the capacitor sheet 10 and passes through the resin 2 of capacitor 1 as a separate power line, for example. Via conductor 4 is connected to the first conductive layer 30 of the capacitor sheet 10 and functions as a capacitor power line. Similarly, via conductor 5 is connected to the second conductive layer 40 of the capacitor sheet 10 and functions as a capacitor power line.

[0035] Next, the manufacturing method for producing the capacitor 1 described above will be explained with reference to Figures 5 to 10. Figure 5 is a flowchart showing the procedure for manufacturing capacitor 1.

[0036] When manufacturing the capacitor 1, first, as step S1, as shown in Figure 6, a capacitor sheet 10 (i.e., a sheet-like laminate of a dielectric layer 20, a first conductive layer 30, and a second conductive layer 40) that does not have through-holes 50A, 50B and a plurality of recesses 50C, 50D is attached to a predetermined carrier 6 (e.g., a glass epoxy substrate) via a release sheet 7 (e.g., a thermal foam sheet).

[0037] Next, as step S2, as shown in Figure 7, patterning is performed from the first main surface 10a side by known photolithography techniques and wet etching to form the first through-hole 50A and the recess 50C. The patterning to form the first through-hole 50A is performed in three stages: patterning of the first conductive layer 30, patterning of the dielectric layer 20, and patterning of the second conductive layer 40. The patterning to form the recess 50C is performed in two stages: patterning of the first conductive layer 30 and patterning of the dielectric layer 20. At this time, the shape and dimensions of the opening edge are mainly determined by the mask shape, and the inclination angle of the opening edge of the first conductive layer 30, dielectric layer 20, and second conductive layer 40 is mainly determined by the etching conditions and layer materials. For example, the inclination angle of the opening edge of the first conductive layer 30, whose main component is Cu which is relatively easy to etch, is greater than the inclination angle of the opening edge of the second conductive layer 40, whose main component is Ni which is less etchable than Cu.

[0038] The patterning of the first conductive layer 30 in the first through-hole 50A and the patterning of the first conductive layer 30 in the recess 50C can be performed simultaneously, and the patterning of the dielectric layer 20 in the first through-hole 50A can be performed simultaneously with the patterning of the dielectric layer 20 in the recess 50C.

[0039] The capacitor sheet 10, which has been patterned from the first main surface 10a side, is peeled off the carrier 6 and, as shown in Figure 8, is attached (or transferred) to another carrier 6 via the release sheet 7 in an inverted state as step S3.

[0040] Then, in step S4, as shown in Figure 9, patterning is performed from the second main surface 10b side by known photolithography techniques and wet etching to form the second through-hole 50B and the recess 50D. The patterning to form the second through-hole 50B is performed in three stages: patterning of the second conductive layer 40, patterning of the dielectric layer 20, and patterning of the first conductive layer 30. The patterning to form the recess 50D is performed in two stages: patterning of the second conductive layer 40 and patterning of the dielectric layer 20. At this time, the shape and dimensions of the opening edge are mainly determined by the mask shape, and the inclination angle of the opening edges of the first conductive layer 30, dielectric layer 20, and second conductive layer 40 is mainly determined by the etching conditions and layer materials. For example, the inclination angle of the opening edge of the first conductive layer 30, whose main component is Cu which is relatively easy to etch, is greater than the inclination angle of the opening edge of the second conductive layer 40, whose main component is Ni which is less etchable than Cu.

[0041] The capacitor sheet 10, which has been patterned from the second main surface 10b side, is peeled off the carrier 6 and inverted again as shown in Figure 10, and in step S5, is sandwiched between resins 2A and 2B that constitute the resin 2 of the capacitor 1. The resin 2B covering the second main surface 10b of the capacitor sheet 10 is, for example, a substrate resin layer that supports the capacitor sheet 10, and the capacitor sheet 10 is mounted while the resin is uncured (or semi-cured). The resin 2A covering the first main surface 10a of the capacitor sheet 10 is, for example, a substrate resin layer that is placed over the capacitor sheet 10, and is superimposed on the capacitor sheet 10 while the resin is uncured (or semi-cured). After that, the capacitor sheet 10 sandwiched between resins 2A and 2B is pressed from the thickness direction (the direction in which the first main surface 10a and the second main surface 10b face each other) and cured.

[0042] Finally, in step S6, via conductors 3-5 are provided in the resin 2 to complete the capacitor 1 shown in Figure 1. Via conductors 3-5 can be formed by irradiating their respective formation regions with a laser to create through holes in the resin 2, and then filling these through holes with metal such as Cu by plating. For plating and filling, for example, electroless plating and electrolytic plating can be used. Both resins 2A and 2B can be composed of multiple resin layers, in which case laser irradiation and plating and filling are performed for each resin layer.

[0043] In the capacitor sheet 10 described above, the first through-hole 50A is the width W of the opening edge 51 of the first conductive layer 30. 30 The width W of the opening edge 52 of the dielectric layer 20 20 The width W of the opening edge 53 of the second conductive layer 40. 40 Because it is designed to get smaller in that order, resin 2A from the first main surface 10a side flows in easily during resin pressing (step S5). In particular, in this embodiment, the opening edges 51, 52, and 53 of the first through hole 50A are all inclined to become narrower as they approach the second main surface 10b, thereby making it even easier for resin 2A from the first main surface 10a side to flow in. On the other hand, the width W of the opening edge 51 of the first conductive layer 30 in the second through hole 50B 30 The width W of the opening edge 52 of the dielectric layer 20 20 The width W of the opening edge 53 of the second conductive layer 40. 40 Because they are designed to increase in size in that order, resin 2A from the second main surface 10b side flows in easily during resin pressing (step S5). In particular, in this embodiment, the opening edges 51, 52, and 53 of the second through hole 50B are all inclined to become narrower as they approach the first main surface 10a, thereby further facilitating the flow of resin 2B from the second main surface 10b side.

[0044] Since the capacitor sheet 10 has both a first through-hole 50A and a second through-hole 50B, when the capacitor sheet 10 is resin-pressed from the direction facing the first main surface 10a and the second main surface 10b, a stress difference is less likely to occur between the first main surface 10a and the second main surface 10b, and uneven flow of resins 2A and 2B is less likely to occur. Therefore, in the capacitor sheet 10, the capacitor 1 equipped therewith, and the electronic component 100, high positional accuracy of the capacitor sheet 10 in the capacitor 1 can be achieved, and high reliability can be realized.

[0045] The capacitor sheet 10 may be provided with a plurality of first through-holes 50A and a plurality of second through-holes 50B. In this case, the plurality of first through-holes 50A and the plurality of second through-holes 50B may be arranged to be uniformly or non-uniformly mixed. The number of first through-holes 50A and the number of second through-holes 50B provided in the capacitor sheet 10 may be the same or different. When viewed from the direction facing the first main surface 10a and the second main surface 10b, adjacent first through-holes 50A and second through-holes 50B may be spaced apart by, for example, 200 to 5000 μm (300 μm as an example). The first through-holes 50A and second through-holes 50B may be arranged alternately when viewed from the direction facing the first main surface 10a and the second main surface 10b. The multiple first through-holes 50A and the multiple second through-holes 50B may be arranged in a matrix when viewed from the direction opposite to the first main surface 10a and the second main surface 10b.

[0046] The present invention is not limited to the embodiments described above and can be modified in various ways. For example, the capacitor 1 may include a plurality of capacitor sheets 10. The cross-sectional shape of the first through-hole and the second through-hole is not limited to a perfect circle, but may be an ellipse, a rectangle with rounded corners, an ellipse with a constriction (for example, a gourd shape), or a shape in which a plurality of perfect circles partially overlap (for example, an eight-shaped outline).

[0047] As can be seen from the above description, this specification discloses the following: [Note 1] A capacitor sheet having a first main surface and a second main surface, The capacitance portion comprises a dielectric layer interposed between a first conductive layer located on the first main surface side and a second conductive layer located on the second main surface side, and a plurality of through holes penetrating the capacitance portion. A capacitor sheet in which the plurality of through-holes include first through-holes in which the opening dimensions decrease in the order of the opening dimensions of the first conductive layer, the dielectric layer, and the second conductive layer, and second through-holes in which the opening dimensions increase in the order of the opening dimensions of the first conductive layer, the dielectric layer, and the second conductive layer. [Note 2] The capacitor sheet according to Appendix 1, wherein in the first through-hole portion, in a cross-section extending along the direction of opposition between the first main surface and the second main surface, with respect to the extending direction of the dielectric layer, the opening edge of the dielectric layer extends from the opening edge of the first conductor layer to a thickness greater than or equal to the thickness of the dielectric layer. [Note 3] The capacitor sheet as described in Appendix 2, wherein in the first through-hole, with respect to the extending direction of the dielectric layer, the opening edge of the dielectric layer is biased toward the opening edge of the second conductor layer than the intermediate position between the opening edge of the first conductor layer and the opening edge of the second conductor layer. [Note 4] The capacitor sheet according to Appendix 1, wherein in the second through-hole portion, in a cross-section extending along the direction of opposition between the first main surface and the second main surface, with respect to the extending direction of the dielectric layer, the opening edge of the dielectric layer extends from the opening edge of the second conductive layer to a thickness greater than or equal to the thickness of the dielectric layer. [Note 5] The capacitor sheet according to Appendix 4, wherein in the second through-hole, with respect to the extending direction of the dielectric layer, the opening edge of the dielectric layer is biased toward the opening edge of the first conductor layer than the intermediate position between the opening edge of the first conductor layer and the opening edge of the second conductor layer. [Note 6] A capacitor sheet according to any one of the appendices 1 to 5, wherein the opening edge of the first conductive layer, the opening edge of the dielectric layer, and the opening edge of the second conductive layer in the first through-hole are inclined to narrow as they approach the second main surface, and the opening edge of the first conductive layer, the opening edge of the dielectric layer, and the opening edge of the second conductive layer in the second through-hole are inclined to narrow as they approach the first main surface. [Note 7] The capacitor sheet according to Appendix 6, wherein in at least one of the first through-hole portion and the second through-hole portion, the inclination angle of the opening edge of the first conductive layer and the inclination angle of the opening edge of the second conductive layer are different. [Note 8] The capacitor sheet as described in Appendix 7, wherein the inclination angle of the opening edge of the second conductive layer is smaller than the inclination angle of the opening edge of the first conductive layer. [Note 9] A capacitor sheet as described in one of the notes 1 to 8, The resin covering the first main surface and the second main surface of the capacitor sheet A capacitor equipped with this feature. [Note 10] An electronic component on which the capacitor described in Appendix 9 is mounted. [Explanation of Symbols]

[0048] 1...Capacitor, 2, 2A, 2B...Resin, 3...Via conductor, 10...Capacitor sheet, 10a...First main surface, 10b...Second main surface, 20...Dielectric layer, 30...First conductive layer, 40...Second conductive layer, 50A...First through-hole, 50B...Second through-hole, 100...Electronic component, C...Capacitance section.

Claims

1. A capacitor sheet having a first main surface and a second main surface, The capacitance portion comprises a dielectric layer interposed between a first conductive layer located on the first main surface side and a second conductive layer located on the second main surface side, and a plurality of through holes penetrating the capacitance portion. A capacitor sheet in which the plurality of through-holes include first through-holes in which the opening dimensions decrease in the order of the opening dimensions of the first conductive layer, the dielectric layer, and the second conductive layer, and second through-holes in which the opening dimensions increase in the order of the opening dimensions of the first conductive layer, the dielectric layer, and the second conductive layer.

2. The capacitor sheet according to claim 1, wherein in the first through-hole, in a cross-section extending along the direction of opposition between the first main surface and the second main surface, with respect to the extending direction of the dielectric layer, the opening edge of the dielectric layer extends from the opening edge of the first conductor layer to a thickness greater than or equal to the thickness of the dielectric layer.

3. The capacitor sheet according to claim 2, wherein in the first through-hole, with respect to the extending direction of the dielectric layer, the opening edge of the dielectric layer is biased toward the opening edge of the second conductor layer than the intermediate position between the opening edge of the first conductor layer and the opening edge of the second conductor layer.

4. The capacitor sheet according to claim 1, wherein in the second through-hole, in a cross-section extending along the direction of opposition between the first main surface and the second main surface, with respect to the extending direction of the dielectric layer, the opening edge of the dielectric layer extends from the opening edge of the second conductor layer to a thickness greater than or equal to the thickness of the dielectric layer.

5. The capacitor sheet according to claim 4, wherein in the second through-hole, with respect to the extending direction of the dielectric layer, the opening edge of the dielectric layer is biased toward the opening edge of the first conductor layer than the intermediate position between the opening edge of the first conductor layer and the opening edge of the second conductor layer.

6. The capacitor sheet according to claim 1, wherein the opening edge of the first conductive layer, the opening edge of the dielectric layer, and the opening edge of the second conductive layer in the first through-hole are inclined to narrow as they approach the second main surface, and the opening edge of the first conductive layer, the opening edge of the dielectric layer, and the opening edge of the second conductive layer in the second through-hole are inclined to narrow as they approach the first main surface.

7. The capacitor sheet according to claim 6, wherein in at least one of the first through-hole and the second through-hole, the inclination angle of the opening edge of the first conductive layer and the inclination angle of the opening edge of the second conductive layer are different.

8. The capacitor sheet according to claim 7, wherein the inclination angle of the opening edge of the second conductive layer is smaller than the inclination angle of the opening edge of the first conductive layer.

9. A capacitor sheet according to claim 1, The resin covering the first main surface and the second main surface of the capacitor sheet A capacitor equipped with this feature.

10. An electronic component on which the capacitor described in claim 9 is mounted.

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