Silicon carbide wafer and method for manufacturing the same

Abstract

To reduce the amount of boron and sodium adhering to silicon carbide wafers. [Solution] In this disclosure, after preparing the silicon carbide wafer, a step of cleaning the silicon carbide wafer (S12) is performed immediately before carrying out the step of packaging the silicon carbide wafer (S13).

Description

Technical Field

[0001] The present disclosure relates to a silicon carbide wafer and a method for manufacturing the same. For example, the present disclosure relates to a silicon carbide wafer including a silicon carbide substrate and an epitaxial layer formed on an upper surface of the silicon carbide substrate. For example, the present disclosure relates to a method for manufacturing a silicon carbide wafer including a silicon carbide substrate and an epitaxial layer formed on an upper surface of the silicon carbide substrate.

Background Art

[0002] Japanese Patent No. 7183358 (Patent Document 1) discloses a technology in which boron is contained in an epitaxial layer, and a boron concentration at a center of the epitaxial layer is less than 5.0×10 12 / cm 3 .

Prior Art Literature

Patent Literature

[0003]

Patent Document 1

Summary of the Invention

Problem to be Solved by the Invention

[0004] In the present specification, a wafer including a silicon carbide substrate and an epitaxial layer formed on an upper surface of the silicon carbide substrate is referred to as a "silicon carbide wafer". In contrast, a wafer including a silicon substrate is referred to as a "silicon wafer". A silicon carbide wafer and a silicon wafer are distinguished from each other.

[0005] Note that in the present specification, the expression "epitaxial layer formed on an upper surface of a silicon carbide substrate" does not exclude a configuration in which a buffer layer (another epitaxial layer) or the like is interposed between the silicon carbide substrate and the epitaxial layer. That is, the term "silicon carbide wafer" is used as a broad concept that includes not only a configuration in which no other layer is interposed between the silicon carbide substrate and the epitaxial layer, but also a configuration in which another layer is interposed between the silicon carbide substrate and the epitaxial layer.

[0006] There is a production line that uses silicon carbide wafers to manufacture semiconductor devices that use silicon carbide as a semiconductor material. This production line may, for example, also be used to manufacture semiconductor devices that use silicon as a semiconductor material with silicon wafers.

[0007] In this regard, when the concentrations of boron and sodium adhering to the upper surface of the epitaxial layer of a silicon carbide wafer increase, the possibility of boron and sodium scattering becomes higher. As a result, boron and sodium scattered from the silicon carbide wafer contaminate the semiconductor manufacturing equipment arranged in a clean room.

[0008] When a silicon wafer is loaded into a semiconductor manufacturing apparatus contaminated with boron and sodium, it may affect the characteristics of the silicon wafer. Therefore, improvements need to be considered for production lines that are used for both manufacturing semiconductor devices using silicon carbide as a semiconductor material and manufacturing semiconductor devices using silicon as a semiconductor material. That is, in the above-mentioned production line, boron and sodium adhering to the loaded silicon carbide wafer may affect the characteristics of silicon wafers loaded into the same apparatus. For this reason, it is desired to reduce boron and sodium adhering to silicon carbide wafers. [Means for Solving the Problem]

[0009] A silicon carbide wafer according to one embodiment includes a silicon carbide substrate and an epitaxial layer formed on an upper surface of the silicon carbide substrate. On the upper surface of the epitaxial layer, the concentration of boron is 5×10 11 atoms / cm 2 or less, and the concentration of sodium is 1×10 11 atoms / cm 2 or less.

[0010] A method for manufacturing a silicon carbide wafer in one embodiment comprises: (a) a step of preparing a silicon carbide wafer having a silicon carbide substrate and an epitaxial layer formed on the upper surface of the silicon carbide substrate; (b) a step of packaging the silicon carbide wafer; and (c) a step of washing the silicon carbide wafer immediately before step (b). [Effects of the Invention]

[0011] According to one embodiment, the amount of boron and sodium adhering to the silicon carbide wafer can be reduced. [Brief explanation of the drawing]

[0012] [Figure 1] This is a cross-sectional view showing a silicon carbide wafer in an embodiment. [Figure 2] This is a flowchart showing the flow of the "downstream process" in related technologies. [Figure 3] The basic concept is illustrated by a flowchart showing the flow of the "downstream process." [Figure 4] In this embodiment, the flowchart shows the flow of the "subsequent processes". [Figure 5] This figure shows a schematic configuration of the cleanroom where the "post-processing" in the embodiment is carried out. [Figure 6] This is a flowchart detailing the first washing process. [Figure 7] This flowchart shows the details of the second washing process. [Modes for carrying out the invention]

[0013] In all the drawings illustrating the embodiments, the same reference numeral is used for identical components, and repeated explanations of them are omitted. Hatching may be used even in plan views to improve clarity.

[0014] <Embodiment> <<Silicon Carbide Wafer Composition>> FIG. 1 is a cross-sectional view showing a silicon carbide wafer WF according to an embodiment.

[0015] In FIG. 1, the silicon carbide wafer WF includes a silicon carbide substrate 1 and an epitaxial layer 10. The silicon carbide substrate 1 has a 4H-SiC single crystal structure. The silicon carbide substrate 1 contains, for example, nitrogen (N), which is an n-type impurity. That is, in the embodiment, the silicon carbide substrate 1 is an n-type silicon carbide substrate. However, the technical idea of the present disclosure is not limited thereto, and can also be applied to a semiconductor device in which the silicon carbide substrate 1 is a p-type silicon carbide substrate and the p-type silicon carbide substrate is used. That is, the technical idea of the present disclosure can be widely applied to semiconductor devices having opposite conductivity types. In this regard, the description in the present specification is based on the assumption that the silicon carbide substrate 1 is an n-type silicon carbide substrate.

[0016] The concentration of nitrogen introduced into the silicon carbide substrate 1 is 1×10 18 / cm 3 approximately. The thickness of the silicon carbide substrate 1 is, for example, 50 μm or more and 500 μm or less. A typical example of the thickness of the silicon carbide substrate 1 is approximately 350 μm.

[0017] The epitaxial layer 10 has a 4H-SiC single crystal structure. The epitaxial layer 10 is formed on the upper surface of the silicon carbide substrate 1. The epitaxial layer 10 is a layer using silicon carbide as a semiconductor material. In the embodiment, the epitaxial layer 10 is an n-type semiconductor layer into which an n-type impurity such as nitrogen is introduced.

[0018] The epitaxial layer 10 has a lower impurity concentration than the silicon carbide substrate 1. The impurity concentration of the epitaxial layer 10 is, for example, 1×10 14 / cm 3 or more and 1×10 17 / cm 3 or less. A typical example of the impurity concentration of the epitaxial layer 10 is 3×10 15 / cm 3The thickness of the epitaxial layer 10 is, for example, between 10 μm and 150 μm. A typical example of the thickness of the epitaxial layer 10 is about 30 μm. The withstand voltage of the semiconductor device in the off state is determined by the epitaxial layer 10. A typical specification for a semiconductor device is a withstand voltage of 3.3 kV.

[0019] The epitaxial layer 10 is composed of, for example, a buffer layer 2 and a drift layer 3. The buffer layer 2 has a 4H-SiC single crystal structure. The buffer layer 2 is formed on the upper surface of the silicon carbide substrate 1. The drift layer 3 has a 4H-SiC single crystal structure. The drift layer 3 is formed on the upper surface of the buffer layer 2. The drift layer 3 has a lower impurity concentration than the buffer layer 2.

[0020] The silicon carbide wafer WF in this embodiment has the following characteristics: Specifically, on the upper surface US2 of the epitaxial layer 10, the boron concentration is 5 × 10⁻⁶. 11 atoms / cm 2 The following applies. Also, the sodium concentration is 1 × 10⁻⁶. 11 atoms / cm 2 The following is the result: This makes it possible to suppress the increase in the concentration of boron and sodium adhering to the upper surface US2 of the epitaxial layer 10 of the silicon carbide wafer WF.

[0021] Furthermore, in order to sufficiently reduce contamination of the manufacturing line, the boron concentration is set to 1 × 10⁻⁶. 11 atoms / cm 2 In addition, 2.7 × 10 11 atoms / cm 2 The following is preferable: The sodium concentration should be 7.7 × 10⁻⁶. 10 atoms / cm 2 It is desirable that the concentration be 8.3 × 10⁻⁶. 10 atoms / cm 2 The following is preferable:

[0022] Thus, in this embodiment, the silicon carbide wafer WF has reduced concentrations of boron and sodium attached to the upper surface US2 of the epitaxial layer 10.

[0023] Note that "atoms / cm 2 " is "pieces / cm 2 This corresponds to ".

[0024] <<Manufacturing method for silicon carbide wafers>> The following describes an example of a method for manufacturing silicon carbide wafers in an embodiment.

[0025] A silicon carbide substrate 1 is prepared. The silicon carbide substrate 1 is, for example, an n-type substrate having a 4H-SiC crystal structure. n-type impurities are introduced into the silicon carbide substrate 1. The n-type impurities are, for example, nitrogen. The nitrogen impurity concentration is, for example, 1 × 10⁻⁶ 18 / cm 3 The above 1 x 10 21 / cm 3 The following applies: The silicon carbide substrate 1 has a silicon side (Si side) and a carbon side (C side). The upper surface US1 of the silicon carbide substrate 1 may be either the silicon side or the carbon side. The silicon side of the silicon carbide substrate 1 has a maximum diameter of, for example, 140 mm or more. Preferably, the maximum diameter of the silicon side is 150 mm or more, more preferably 190 mm or more, and even more preferably 200 mm or more.

[0026] Next, an epitaxial layer 10 is formed on the upper surface of the silicon carbide substrate 1. The epitaxial layer 10 is composed of, for example, a buffer layer 2 formed on the upper surface of the silicon carbide substrate 1 and a drift layer 3 formed on the upper surface of the buffer layer 2. The buffer layer 2 and the drift layer 3 can be formed, for example, by using an epitaxial growth method.

[0027] Each of the buffer layer 2 and the drift layer 3 contains, for example, nitrogen, an n-type impurity. The nitrogen impurity concentration in the drift layer 3 is lower than the nitrogen impurity concentration in the buffer layer 2. The impurity concentration in the drift layer 3 depends on the rating of the semiconductor device. For example, the impurity concentration in the drift layer 3 is 1 × 10⁻⁶. 14 / cm 3 The above 1 x 10 17 / cm 3 The following is the extent of the process. The thickness of the drift layer 3 is, for example, about 10 μm to 150 μm. Then, a protective film is formed on the upper surface of the epitaxial layer 10. Next, the lower surface BS of the silicon carbide substrate 1 is polished. Then, the protective film is removed. In this way, the silicon carbide wafer WF according to the embodiment can be manufactured.

[0028] The silicon carbide wafers (WF) manufactured in this manner undergo cleaning and inspection processes before being packaged and shipped. In this specification, the cleaning, inspection, and packaging processes performed after the epitaxial layer formation process are collectively referred to as "post-processing."

[0029] The inventors have novelly discovered that in order to reduce the concentrations of boron and sodium adhering to the upper surface US2 of the epitaxial layer, it is necessary to devise a "post-processing" step.

[0030] Therefore, we will first explain the related technologies concerning "post-processing."

[0031] <<<Explanation of related technologies>>> In this specification, "related technology" is not publicly known technology. "Related technology" is technology that has a problem identified by the present inventor and is a technology that is the premise of this disclosure.

[0032] Figure 2 is a flowchart showing the flow of the "downstream process" in the related technology.

[0033] In Figure 2, the silicon carbide wafer is cleaned (S101). Next, a defect inspection is performed on the silicon carbide wafer (S102). Subsequently, a metal contamination inspection is performed on the silicon carbide wafer (S103). After that, an appearance inspection is performed on the silicon carbide wafer (S104). Then, the silicon carbide wafer is sealed and packaged (S105). The packaged silicon carbide wafer is shipped (S106).

[0034] In the "back-end processes" of the related technology, defect inspection, metal contamination inspection, and visual inspection processes exist between the cleaning and packaging processes. In other words, in the related technology, there is a long time between cleaning the silicon carbide wafer and packaging it. As a result, the upper surface US2 of the epitaxial layer of the silicon carbide wafer is exposed to the air in the cleanroom for a longer period of time. This means that the probability of boron and sodium contained in the cleanroom adhering to the upper surface US2 of the epitaxial layer increases. For example, in the related technology, the concentration of boron adhering to the upper surface US2 of the epitaxial layer is 1.4 × 10⁻⁶. 12 atoms / cm 2 In addition, 2.4 × 10 12 atoms / cm 2 The following is the extent of the sodium adhering to the upper surface US2 of the silicon carbide wafer: 4.6 × 10⁻⁶ 10 atoms / cm 2 In addition, 2.4 × 10 11 atoms / cm 2 It is approximately as follows.

[0035] Therefore, the technical concept of this disclosure incorporates measures to reduce the concentrations of boron and sodium adhering to the upper surface US2 of the epitaxial layer of the silicon carbide wafer. The technical concept of this disclosure is explained below.

[0036] <<<Basic philosophy>>> Figure 3 is a flowchart showing the flow of the "downstream process" in the basic concept.

[0037] As shown in Figure 3, a silicon carbide wafer having a silicon carbide substrate and an epitaxial layer formed on the upper surface US1 of the silicon carbide substrate is prepared (S11). The basic idea is to perform a silicon carbide wafer cleaning process (S12) immediately before performing the silicon carbide wafer packaging process (S13) after preparing the silicon carbide wafer. That is, the silicon carbide wafer is packaged immediately after cleaning. In other words, no inspection process is performed between the silicon carbide wafer cleaning process and the silicon carbide wafer packaging process. According to the basic idea, this shortens the time from cleaning the silicon carbide wafer to packaging it. This means that the time the silicon carbide wafer is exposed to the air in the cleanroom after cleaning can be shortened. Therefore, according to the basic idea, the probability of boron and sodium adhering to the upper surface US2 of the epitaxial layer of the silicon carbide wafer can be reduced. As a result, according to the basic concept, the concentrations of boron and sodium adhering to the upper surface US2 of the epitaxial layer can be reduced.

[0038] According to the basic concept, the concentration of boron adhering to the upper surface US2 of the epitaxial layer is 5 × 10⁻⁶. 11 atoms / cm 2 The following can be done. Also, according to the basic concept, the concentration of sodium adhering to the upper surface US2 of the epitaxial layer is 1 × 10⁻⁶. 11 atoms / cm 2 The following can be done.

[0039] The packaged silicon carbide wafers are then shipped (S14).

[0040] The following describes the "post-processing" in an embodiment that embodies the basic concept.

[0041] <<<"Post-processing" in the embodiment>>> Figure 4 is a flowchart showing the flow of the "subsequent processes" in the embodiment.

[0042] A first cleaning process is performed on the silicon carbide wafer (S201). Next, a defect inspection is performed on the silicon carbide wafer (S202). Subsequently, a visual inspection is performed on the silicon carbide wafer (S203). After that, a second cleaning process is performed on the silicon carbide wafer (S204). At this point, some of the silicon carbide wafers are sampled. A metal contamination inspection is performed on the sampled silicon carbide wafers. Then, the silicon carbide wafers are sealed and packaged (S205). The packaged silicon carbide wafers are shipped (S206).

[0043] 1. First characteristic feature of the embodiment The first characteristic feature of this embodiment is that, assuming there are two cleaning steps for the silicon carbide wafer, the second cleaning step is performed immediately before the packaging step. This realizes the basic concept. In other words, the time from cleaning the silicon carbide wafer to packaging can be shortened. That is, according to this embodiment, the time the silicon carbide wafer is exposed to the air in the cleanroom after cleaning (after the second cleaning step) can be shortened. For example, it is desirable that the time from cleaning the silicon carbide wafer to completing the packaging be within 5 minutes.

[0044] According to this embodiment, the time from cleaning the silicon carbide wafer to completing the packaging can be shortened, thereby reducing the potential for boron and sodium to adhere to the upper surface US2 of the epitaxial layer. In other words, the probability of boron and sodium adhering to the upper surface US2 of the epitaxial layer of the silicon carbide wafer can be reduced. As a result, according to this embodiment, the concentration of boron and sodium adhering to the upper surface US2 of the epitaxial layer can be reduced.

[0045] 2. Second characteristic feature in the embodiment Figure 5 shows a schematic configuration of the cleanroom where the "post-processing" in the embodiment is carried out. In Figure 5, the "post-processing" in the embodiment is carried out in cleanroom 100 and cleanroom 200.

[0046] Air is introduced into cleanroom 100 via air filter FT1. Air filter FT1 is a normal filter. Air filter FT1 contains boron. The first cleaning process, defect inspection, visual inspection, and metal contamination inspection are performed within cleanroom 100.

[0047] Air is introduced into cleanroom 200 via air filter FT2. Air filter FT2 is a boron-free air filter. In other words, air filter FT2 contains almost no boron. By using such air filter FT2, it is desirable to reduce the boron content in the air inside cleanroom 200 compared to the air inside cleanroom 100.

[0048] Furthermore, by controlling the airflow from cleanroom 200 to cleanroom 100, as indicated by the arrows, it is possible to prevent air containing a high concentration of boron in cleanroom 100 from flowing into cleanroom 200.

[0049] Furthermore, a clean booth 300 is provided within the cleanroom 200. The air inside the clean booth 300 has an even lower boron content than the air inside the cleanroom 200. In this embodiment, the second cleaning process and the packaging of the silicon carbide wafers are carried out inside the clean booth 300. By packaging the silicon carbide wafers in the clean booth 300, which has an even lower boron content, the silicon carbide wafers can be packaged in a way that suppresses the adhesion of boron to the wafers.

[0050] Regarding the materials used for packaging, clean materials will be used to prevent contaminants containing boron or sodium from adhering to the silicon carbide wafers during packaging.

[0051] A second characteristic feature of this embodiment is that, for example, as shown in Figure 5, the second cleaning process and the packaging of the silicon carbide wafer are carried out in a cleanroom 200 equipped with a boron-free air filter FT2. More specifically, the second characteristic feature is that the second cleaning process and the packaging of the silicon carbide wafer are carried out in a clean booth 300. As a result, according to this embodiment, in addition to the first characteristic feature, the second cleaning process and the packaging of the silicon carbide wafer are carried out continuously in an atmosphere in which the boron content is intentionally reduced. Consequently, according to this embodiment, the combination of the first and second characteristic features reduces the probability of boron and sodium adhering to the upper surface US2 of the epitaxial layer of the silicon carbide wafer. In other words, according to this embodiment, the concentration of boron and sodium adhering to the upper surface US2 of the epitaxial layer can be reduced.

[0052] 3. Third characteristic feature of the embodiment Figure 6 is a flowchart showing the details of the first washing process.

[0053] As shown in Figure 6, the first cleaning step (S201) consists of a cleaning step with a first cleaning solution (S301), a cleaning step with a second cleaning solution (S302), and a cleaning step with a fourth cleaning solution (S303). In the first cleaning step, after the cleaning step with the first cleaning solution is performed, the cleaning step with the second cleaning solution is performed. In the first cleaning step, after the cleaning step with the second cleaning solution is performed, the cleaning step with the fourth cleaning solution is performed.

[0054] The first cleaning solution contains concentrated sulfuric acid and hydrogen peroxide. The cleaning process with the first cleaning solution is carried out with the aim of removing large amounts of organic matter and metals.

[0055] For example, as explained in the section "<<Manufacturing Method for Silicon Carbide Wafers>>", a protective film is used in the process of polishing the bottom surface BS of the silicon carbide substrate 1 (backside polishing process). The protective film contains organic matter. After the backside polishing process is performed, the protective film is removed. However, it is difficult to completely remove the protective film. Therefore, organic matter caused by the protective film may remain on the upper surface of the epitaxial layer 10. In this regard, the embodiment performs cleaning with a first cleaning solution. Therefore, according to the embodiment, organic matter remaining on the upper surface of the epitaxial layer 10 can be removed by cleaning with the first cleaning solution.

[0056] The second cleaning solution contains ammonia water, hydrogen peroxide, and water. The cleaning process with the second cleaning solution is performed for the purpose of removing particles (foreign matter).

[0057] The fourth cleaning solution contains hydrofluoric acid and water. The cleaning process with the fourth cleaning solution is carried out with the aim of removing the surface oxide film and contaminants contained in the surface oxide film.

[0058] Figure 7 is a flowchart showing the details of the second washing process.

[0059] The second cleaning step (S204) includes a cleaning step with a first cleaning solution (S401), a cleaning step with a second cleaning solution (S402), a cleaning step with a third cleaning solution (S403), and a cleaning step with a fourth cleaning solution (S404).

[0060] In the second cleaning process, a cleaning process using the first cleaning solution is performed, followed by a cleaning process using the second cleaning solution. In the second cleaning process, a cleaning process using the second cleaning solution is performed, followed by a cleaning process using the third cleaning solution. In the second cleaning process, a cleaning process using the third cleaning solution is performed, followed by a cleaning process using the fourth cleaning solution.

[0061] The first cleaning solution contains concentrated sulfuric acid and hydrogen peroxide. The cleaning process with the first cleaning solution is carried out with the aim of removing large amounts of organic matter and metals. The second cleaning solution contains ammonia water, hydrogen peroxide, and water.

[0062] Thus, in this embodiment, the cleaning process using the first cleaning solution is also performed in the second cleaning step. Therefore, according to this embodiment, organic matter remaining on the upper surface of the epitaxial layer 10 due to the protective film used in the back surface polishing step can be reliably removed.

[0063] The second cleaning step using the cleaning solution is performed with the aim of removing particles (foreign matter).

[0064] The third cleaning solution contains hydrochloric acid, hydrogen peroxide, and water. The cleaning process with the third cleaning solution is carried out for the purpose of removing metal contaminants.

[0065] The fourth cleaning solution contains hydrofluoric acid and water. The cleaning process with the fourth cleaning solution is carried out with the aim of removing the surface oxide film and contaminants contained in the surface oxide film.

[0066] The second cleaning solution used in the second cleaning process is an unused cleaning solution that was not used in the first cleaning process.

[0067] A third characteristic feature of the embodiment is that the second cleaning step includes (1) a cleaning step with a first cleaning solution, (2) a cleaning step with a second cleaning solution, (3) a cleaning step with a third cleaning solution, and (4) a cleaning step with a fourth cleaning solution. Here, the first cleaning solution contains sulfuric acid, the second cleaning solution contains ammonia water, hydrogen peroxide, and water, the third cleaning solution contains hydrochloric acid, hydrogen peroxide, and water, and the fourth cleaning solution contains hydrofluoric acid and water.

[0068] The second cleaning process is carried out in the order of (1) → (2) → (3) → (4), for example. In particular, the second cleaning solution is unused cleaning solution that was not used in the first cleaning process.

[0069] By employing a third feature point in combination with the first and second feature points, the probability of boron and sodium adhering to the upper surface US2 of the epitaxial layer of the silicon carbide wafer can be reduced. In other words, according to this embodiment, the concentration of boron and sodium adhering to the upper surface US2 of the epitaxial layer can be reduced.

[0070] From the above, according to the embodiment, the synergistic effect of the first feature point, the second feature point, and the third feature point reduces the concentration of boron adhering to the upper surface US2 of the epitaxial layer to 5 × 10⁻¹⁰ 11 atoms / cm 2 The following can be achieved. Furthermore, according to the embodiment, the concentration of sodium adhering to the upper surface US2 of the epitaxial layer is 1 × 10⁻⁶. 11 atoms / cm 2 The following can be done.

[0071] Furthermore, according to this embodiment, the concentration of boron is 1 × 10⁻⁶ 11 atoms / cm 2 In addition, 2.7 × 10 11 atoms / cm 2 The following can be done. Also, the sodium concentration is 7.7 × 10 10 atoms / cm 2 In addition, 8.3 × 10 10 atoms / cm 2 The following can be done.

[0072] Furthermore, according to the embodiment, the lower surface BS of the silicon carbide substrate 1 has a boron concentration of 10 × 10 10 atoms / cm 2 Reduce to the following, preferably 10 × 10 10 atoms / cm 2 It can be reduced to less than 0.84 × 10⁻⁶. Furthermore, the lower surface BS has a sodium concentration of 0.84 × 10⁻⁶. 10 atoms / cm 2 Reduce to the following, preferably 0.4 × 10 10 atoms / cm 2 It can be reduced to less than [amount missing].

[0073] The present invention has been described in detail above based on its embodiments. It goes without saying that the present invention is not limited to the above embodiments and can be modified in various ways without departing from its essence. [Explanation of Symbols]

[0074] 1. Silicon carbide substrate 2 buffer layers 3 Drift Layer 10 Epitaxial Layer 100 Cleanrooms 200 Cleanrooms 300 Clean Booths FT1 Air Filter FT2 Air Filter WF Silicon Carbide Wafer

Claims

1. Silicon carbide substrate and The epitaxial layer formed on the upper surface of the silicon carbide substrate, A silicon carbide wafer comprising, On the upper surface of the epitaxial layer, The concentration of boron is 5 × 10 １１ atoms / cm ２ The following: The sodium concentration is 1 × 10⁻⁶ １１ atoms / cm ２ The following is a silicon carbide wafer.

2. In the silicon carbide wafer according to claim 1, The concentration of boron is 1 × 10⁻⁶. １１ atoms / cm ２ That's all.

3. In the silicon carbide wafer according to claim 2, The concentration of boron is 2.7 × 10⁻⁶ １１ atoms / cm ２ The following applies:

4. In the silicon carbide wafer according to claim 1, The sodium concentration is 7.7×10 １０ atoms / cm ２ or more.

5. In the silicon carbide wafer according to claim 4, The sodium concentration is 8.3 × 10⁻⁶ １０ atoms / cm ２ The following applies:

6. In the silicon carbide wafer according to claim 1, On the lower surface of the silicon carbide substrate, The concentration of boron is 10 × 10 １０ atoms / cm ２ The following: The sodium concentration is 0.84 × 10⁻⁶. １０ atoms / cm ２ The following applies:

7. In the silicon carbide wafer according to claim 1, the maximum diameter of the silicon surface is 140 mm or more.

8. (a) A step of preparing a silicon carbide wafer having a silicon carbide substrate and an epitaxial layer formed on the upper surface of the silicon carbide substrate, (b) A step of packaging the silicon carbide wafer, (c) A step of washing the silicon carbide wafer immediately before step (b), A method for manufacturing silicon carbide wafers, comprising the following:

9. In the method for manufacturing a silicon carbide wafer according to claim 8, Steps (b) and (c) are carried out in a cleanroom equipped with a boron-free air filter.

10. In the method for manufacturing a silicon carbide wafer according to claim 8, Within the aforementioned cleanroom, a clean booth is also provided. Steps (b) and (c) are carried out inside the clean booth.

11. In the method for manufacturing a silicon carbide wafer according to claim 8, The time from the completion of step (c) to the completion of step (b) is within 5 minutes.

12. In the method for manufacturing a silicon carbide wafer according to claim 8, The above step (c) is, (c1) Cleaning process with the first cleaning solution, (c2) Cleaning process with the second cleaning solution, (c3) Cleaning process with the third cleaning solution, (c4) Cleaning process with the fourth cleaning solution, It has, The first cleaning solution comprises sulfuric acid and hydrogen peroxide solution. The second cleaning solution comprises ammonia water, hydrogen peroxide water, and water. The third cleaning solution comprises hydrochloric acid, hydrogen peroxide solution, and water. The fourth cleaning solution contains hydrofluoric acid and water.

13. In the method for manufacturing a silicon carbide wafer according to claim 12, After step (c1), step (c2) is performed. After step (c2), step (c3) is performed. Step (c4) is performed after step (c3).

14. In the method for manufacturing a silicon carbide wafer according to claim 12, The second cleaning solution is an unused cleaning solution.

15. In the method for manufacturing a silicon carbide wafer according to claim 8, The process includes a step of polishing the lower surface of the silicon carbide substrate before step (c).

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