Light-emitting device

Abstract

To provide a semiconductor device with low parasitic capacitance, or a semiconductor device with low power consumption. To provide. [Solution] A semiconductor device having a transistor and a capacitive element, wherein the transistor This comprises a first conductor, a first insulator on the first conductor, and a first conductor through the first insulator. A semiconductor having a region overlapping with the electric body, a second insulator on the semiconductor, and through the second insulator A second conductor having a region that overlaps with the semiconductor, and a third conductor having a region that is in contact with the upper surface of the semiconductor. The capacitive element has a conductor and a fourth conductor, and the capacitive element has the same layer as the first conductor and a third conductor This is a semiconductor device having an electric body and a fourth conductor and the same layer.

Description

[Technical Field]

[0001] This invention relates to a product, a method, or a method of manufacturing; or to a process, a machine relating to manufactures or compositions of matter. In particular, The present invention relates to, for example, semiconductors, semiconductor devices, display devices, light-emitting devices, lighting devices, energy storage devices, and Related to memory devices or processors. Or semiconductors, semiconductor devices, display devices, light-emitting devices, This relates to a method for manufacturing lighting devices, energy storage devices, memory devices, or processors. Or, semiconductor devices. A method for driving a device, display device, light-emitting device, lighting device, energy storage device, memory device, or processor. To relate to.

[0002] In this specification, a semiconductor device refers to a device that can function by utilizing semiconductor properties. This refers to the general category of display devices, light-emitting devices, lighting devices, electro-optical devices, semiconductor circuits, and electronic equipment. It may have a semiconductor device. [Background technology]

[0003] The technology of constructing transistors using semiconductors on substrates with insulating surfaces is attracting attention. These transistors are widely used in semiconductor devices such as integrated circuits and display devices. Silicon is known as a semiconductor that can be applied to transistors.

[0004] The silicon used in transistor semiconductors comes in amorphous and polycrystalline forms, depending on the application. Recon and single-crystal silicon are used depending on the situation. For example, they are used to make up large display devices. When applied to transistors, amorphous silicon, for which film deposition technology on large-area substrates has been established. It is preferable to use this. On the other hand, a high-performance machine that forms the drive circuit and the pixel circuit on the same substrate When applied to transistors that constitute a display device, transistors with high field-effect mobility are desirable. Polycrystalline silicon capable of fabricating transistors is preferred. Furthermore, it is suitable for constructing integrated circuits and the like. When applied to transistors, it is possible to create transistors with even higher field-effect mobility. It is preferable to use single-crystal silicon that can be manufactured. Polycrystalline silicon is preferable to amorphous silicon. Methods for forming it by heat treatment at high temperatures or laser light treatment are known.

[0005] Furthermore, oxide semiconductors have been attracting attention in recent years. Oxide semiconductors are produced using methods such as sputtering. Because it can be used to form thin films, it can be used in the semiconductors of transistors that make up large display devices. This is possible. Also, transistors using oxide semiconductors have high field-effect mobility. Therefore, it is possible to realize a high-performance display device in which the drive circuit and the pixel circuit are formed on the same substrate. Furthermore, some of the production equipment for transistors using amorphous silicon will be modified and utilized. Because this is possible, there is also the advantage of being able to reduce capital investment.

[0006] By the way, transistors using oxide semiconductors exhibit extremely high leakage current in the non-conductive state. It is known that the leakage is small. For example, the low leakage of transistors using oxide semiconductors. Low-power CPUs that utilize electric current have been disclosed (see Patent Document 1). When applying transistors made of oxide semiconductors to integrated circuits such as CPUs, It is preferable to reduce the size of the inverter and increase its integration.

[0007] As semiconductor devices become more highly integrated, the formation process is affected by the overlapping of wiring, electrodes, and other components. In some cases, the effect of parasitic capacitance becomes significant. Self-aligning tops using oxide semiconductors A gate structure transistor is disclosed (see Patent Document 2). Also, Patent Document 3 discloses This method allows electrons to flow from the conductive electrode into the semiconductor, and even if an offset region is provided, it is superior. It is disclosed that a transistor with the specified electrical characteristics can be obtained. Patent Document 2 or By using the technology disclosed in Patent Document 3, the overlapping of wiring, electrodes, etc. This can reduce the amount of parasitic organisms that are formed.

[0008] Furthermore, by constructing a well-type potential with an active layer made of semiconductors, a high electric field effect can be achieved. It has been disclosed that a transistor with mobility can be obtained (see Patent Document 4). [Prior art documents] [Patent Documents]

[0009] [Patent Document 1] Japanese Patent Publication No. 2012-257187 [Patent Document 2] Japanese Patent Publication No. 2009-278115 [Patent Document 3] Japanese Patent Publication No. 2011-22507 [Patent Document 4] Japanese Patent Publication No. 2012-59860 [Overview of the project] [Problems that the invention aims to solve]

[0010] One of the objectives is to provide a semiconductor device with low parasitic capacitance, or to provide a device with low power consumption. One of the objectives is to provide a semiconductor device that has excellent frequency characteristics. One of the objectives is to provide a device. Alternatively, to provide a semiconductor device with a high degree of integration. One of the challenges is to provide a robust semiconductor device. One of its objectives is to provide a novel semiconductor device.

[0011] Furthermore, the description of these problems does not preclude the existence of other problems. The approach does not need to solve all of these problems. This will become clear from the description in the specification, drawings, claims, etc., and the specification, drawings It is possible to extract other issues from the descriptions in the surfaces, claims, etc. [Means for solving the problem]

[0012] (1) One aspect of the present invention comprises a first conductor, a second conductor, a third conductor, and a fourth conductor. , a fifth conductor, a sixth conductor, a first insulator, a second insulator, a third insulator A semiconductor device having a fourth insulator, a fifth insulator, and an oxide semiconductor, The insulator 1 has a region in contact with the upper surface of the first conductor and a region in contact with the upper surface of the second conductor. The second insulator has a region in contact with the upper surface of the first insulator, and the oxide semiconductor is The third insulator has a region that contacts the upper surface of the second insulator, and the third insulator is in contact with the upper surface of the oxide semiconductor. The third conductor has a region that is in contact with the upper surface of the third insulator, and the fourth insulator is , a region in contact with the upper surface of the third conductor, a region in contact with the side surface of the third insulator, and an oxide semiconductor The fifth insulator has a region that contacts the upper surface of the body and a region that contacts the upper surface of the first insulator, and the fifth insulator is , having a region in contact with the upper surface of the fourth insulator, the fourth conductor is in contact with the upper surface of the oxide semiconductor The fifth conductor has a region that is in contact with the upper surface of the oxide semiconductor, and the sixth conductor has a region that is in contact with the upper surface of the oxide semiconductor. It has a region that is in contact with the upper surface of the fourth insulator, and the first conductor is in contact with the first insulator and the second The first conductor and the oxide semiconductor have overlapping regions separated by an insulator, and the third The conductor is connected to the oxide semiconductor via a third insulator, with the third conductor and the oxide semiconductor overlapping each other. The region is located, and the second conductor is connected to the first insulator and the fourth insulator. This semiconductor device has a region where the sixth conductor and the other elements overlap each other.

[0013] (2) Alternatively, in one aspect of the present invention, the oxide semiconductor comprises a first region in contact with a third insulator and a fourth region. It has a second region and a third region that are in contact with the insulator, and the second region and the third region The region has a region with lower resistance than the first region, and the fourth conductor is in contact with the second region. The semiconductor device according to (1), having a region, and the fifth conductor having a region in contact with the third region. That is the case.

[0014] (3) Alternatively, in one aspect of the present invention, the oxide semiconductor comprises a first oxide semiconductor and a second oxide semiconductor. The second oxide semiconductor has a region that is in contact with the upper surface of the first oxide semiconductor. In the region where the fourth conductor and the oxide semiconductor overlap, the first oxide semiconductor is the second A semiconductor device according to (1) or (2) having a higher conductivity than the oxide semiconductor. .

[0015] (4) Alternatively, in one aspect of the present invention, the oxide semiconductor comprises a first oxide semiconductor and a second oxide semiconductor. The second oxide semiconductor has a region that is in contact with the upper surface of the first oxide semiconductor. In the region where the fourth conductor and the oxide semiconductor overlap, the second oxide semiconductor is the first A semiconductor device according to (1) or (2) having a higher conductivity than the oxide semiconductor. .

[0016] (5) Alternatively, in one aspect of the present invention, the oxide semiconductor comprises a first oxide semiconductor and a second oxide semiconductor. The material comprises a body and a third oxide semiconductor, wherein the second oxide semiconductor is on top of the first oxide semiconductor. The third oxide semiconductor has a region that is in contact with the surface, and the third oxide semiconductor has a region that is in contact with the upper surface of the second oxide semiconductor. The region in which the fourth conductor and the oxide semiconductor overlap each other is the second oxide semiconductor It has higher conductivity than the first oxide semiconductor and the third oxide semiconductor (1) (2) is the semiconductor device described.

[0017] (6) Alternatively, in one aspect of the present invention, the third insulator has a shape that protrudes more than the third conductor. The semiconductor device is one of the items (1) through (5) described above.

[0018] (7) Alternatively, in one aspect of the present invention, the third insulator has a region where the cross-sectional shape of the end is an arc. This is the semiconductor device described in (6).

[0019] (8) Alternatively, in one aspect of the present invention, the third conductor comprises a first conductive layer and a second conductive layer. The second conductive layer has a region that is in contact with the upper surface of the first conductive layer, and the first conductive layer is the second conductive layer A semiconductor device according to any one of (1) to (7) having a shape that protrudes beyond the electrode layer be.

[0020] (9) Alternatively, in one aspect of the present invention, the oxide semiconductor comprises indium and zinc (1) to This is the semiconductor device described in (8).

[0021] (10) Alternatively, one aspect of the present invention relates to a semiconductor device according to any one of (1) to (9), and a pre It is a module having a circuit board.

[0022] (11) Alternatively, one aspect of the present invention is a semiconductor device described in any one of (1) to (9), or (10) The module, speaker, operation keys, or battery It is an electronic device.

[0023] Furthermore, in a semiconductor device according to one aspect of the present invention, the oxide semiconductor is replaced with another semiconductor. That's fine. [Effects of the Invention]

[0024] It is possible to provide transistors with low parasitic capacitance, or transistors with excellent switching characteristics. It is possible to provide a transistor with the property of low current when not conducting. We can provide a transistor. Or, we can provide a transistor with a large current when conducting. It is possible to provide a semiconductor device having such a transistor. Alternatively, a semiconductor device with low parasitic capacitance can be provided. Alternatively, low power consumption can be provided. A semiconductor device can be provided. Alternatively, a semiconductor device having excellent frequency characteristics can be provided. It can provide... Or, it can provide a highly integrated semiconductor device. Alternatively, it is possible to provide a robust semiconductor device. Or, to provide a novel semiconductor device. It is possible.

[0025] Furthermore, the description of these effects does not preclude the existence of other effects. The embodiment does not need to have all of these effects. Other effects are described in the specification. This will become clear from the descriptions in the drawings and claims, and the specification, drawings, and claims will not be clear from the description, drawings, and claims. It is possible to extract other effects from any of these descriptions. [Brief explanation of the drawing]

[0026] [Figure 1] A cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 2] A top view and a cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 3] A cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 4] A cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 5] A cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 6] A cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 7] A cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 8] A cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 9] A cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 10] A cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 11] A cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 12] A cross-sectional view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 13] A cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 14] A cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 15] A cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 16] A cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 17]A cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 18] A cross-sectional view and band diagram of a transistor according to one aspect of the present invention. [Figure 19] A top view and circuit diagram of a display device according to one aspect of the present invention. [Figure 20] A circuit diagram of a display device according to one aspect of the present invention. [Figure 21] A circuit diagram of a display device according to one aspect of the present invention. [Figure 22] A circuit diagram of a display device according to one aspect of the present invention. [Figure 23] A circuit diagram of a display device according to one aspect of the present invention. [Figure 24] A cross-sectional view of a display device according to one aspect of the present invention. [Figure 25] A diagram illustrating a display module according to one aspect of the present invention. [Figure 26] Circuit diagram of a semiconductor device according to one aspect of the present invention. [Figure 27] A circuit diagram of a storage device according to one aspect of the present invention. [Figure 28] A block diagram of an RF tag according to one aspect of the present invention. [Figure 29] A figure showing an example of the use of an RF tag according to one aspect of the present invention. [Figure 30] A block diagram showing a CPU according to one aspect of the present invention. [Figure 31] A circuit diagram of a memory element according to one aspect of the present invention. [Figure 32] A diagram showing an electronic device according to one aspect of the present invention. [Figure 33] A diagram showing an electronic device according to one aspect of the present invention. [Figure 34] High-resolution TEM image with Cs correction in cross-section of CAAC-OS, and schematic cross-sectional diagram of CAAC-OS. [Figure 35] High-resolution TEM image with Cs correction in the plane of CAAC-OS. [Figure 36] A diagram illustrating the XRD structural analysis of CAAC-OS and single-crystal oxide semiconductors. [Figure 37]Cross-sectional TEM image and flowchart of the sample. [Figure 38] A diagram illustrating the temperature dependence of resistivity. [Figure 39] A schematic diagram illustrating the CAAC-OS film deposition model, and cross-sectional views of the pellet and CAAC-OS. [Figure 40] A schematic diagram illustrating the nc-OS film deposition model, and a diagram showing the pellet. [Figure 41] A diagram illustrating pellets. [Figure 42] A diagram illustrating the forces applied to the pellet on the surface being formed. [Figure 43] A diagram illustrating the movement of pellets on the surface being formed. [Figure 44] A diagram illustrating the crystal structure of InGaZnO4. [Figure 45] A diagram illustrating the structure of InGaZnO4 before atomic collisions. [Figure 46] A diagram illustrating the structure of InGaZnO4 after atomic collisions. [Figure 47] A diagram illustrating the trajectories of atoms after a collision. [Figure 48] Cross-sectional HAADF-STEM images of CAAC-OS and the target. [Figure 49] A figure showing the electron diffraction pattern of CAAC-OS. [Figure 50] A diagram showing the changes in the crystalline structure of In-Ga-Zn oxide due to electron irradiation. [Modes for carrying out the invention]

[0027] Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is described below. It is not limited to the above, and its form and details can be easily changed in various ways, as can be easily seen by those skilled in the art. It is understood that the present invention is to be interpreted as being limited to the embodiments described below. No. Furthermore, when explaining the structure of the invention using drawings, the same reference numerals may refer to different parts. It is used consistently across drawings. Furthermore, when referring to similar items, the hatch pattern is the same. Furthermore, sometimes no symbol is assigned.

[0028] Note that in the diagram, the size, thickness of the film (layer), or area has been exaggerated for clarity. They may exist.

[0029] Furthermore, voltage is defined by a certain potential and a reference potential (e.g., ground potential (GND) or source potential). It often refers to the potential difference between two points. Therefore, it is possible to rephrase voltage as potential. .

[0030] The ordinal numbers "1st" and "2nd" are used for convenience only and do not necessarily indicate the order of processes or layering. It does not indicate order. Therefore, for example, "the first" could be "the second" or "the third." It can be explained by substituting it as appropriate. Also, the ordinal numbers and The ordinal numbers used to specify one aspect of the present invention may not always coincide.

[0031] Furthermore, even when the term "semiconductor" is used, if, for example, its conductivity is sufficiently low, it can be referred to as an "insulator." They may have the following characteristics. Also, the boundary between "semiconductors" and "insulators" is ambiguous, and strictly speaking... In some cases, it may be impossible to distinguish between them. Therefore, the term "semiconductor" as used in this specification is used interchangeably with "insulator". In some cases, it can be rephrased. Similarly, the term "insulator" as used herein may be interpreted as "semiconductor." In some cases, this can be rephrased as "...".

[0032] Furthermore, even when the term "semiconductor" is used, if, for example, its conductivity is sufficiently high, it can be referred to as a "conductor." They may have certain characteristics. Also, the boundary between "semiconductors" and "conductors" is ambiguous, and strictly speaking... In some cases, it may be impossible to distinguish between them. Therefore, the term "semiconductor" as used in this specification is used interchangeably with "conductor". In some cases, it can be rephrased. Similarly, the term "conductor" as used herein means "semiconductor." In some cases, this can be rephrased as "...".

[0033] Furthermore, semiconductor impurities refer to components other than the main components that make up the semiconductor, for example, concentration. Elements present in less than 0.1 atomic percent are considered impurities. The presence of impurities can, for example, affect semiconductors. The formation of Density of State (DOS) in the body, and carrier mobility In some cases, the quality may decrease, or the crystallinity may decrease. In the case of semiconductors, impurities that alter the properties of semiconductors include, for example, Group 1 elements and Group 2 elements. These include elements, Group 14 elements, Group 15 elements, and transition metals other than the main component, and in particular, for example, Hydrogen (also found in water), lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen These are some examples. In the case of oxide semiconductors, for example, the inclusion of impurities such as hydrogen can form oxygen vacancies. This can occur. Also, if the semiconductor is silicon, impurities can change the properties of the semiconductor. In terms of substances, for example, Group 1 elements (excluding oxygen and hydrogen), Group 2 elements, Group 13 elements, and Group 15 elements. There are group elements, etc.

[0034] In the embodiments described below, the case where the semiconductor is an oxide semiconductor will be explained. However, it is not limited to this. For example, as semiconductors, polycrystalline structures, single-crystal structures, etc. Silicon, germanium, etc. may be used. Alternatively, strained silicon or other materials may be used. A semiconductor can be used. Alternatively, a high electron mobility transistor (HEMT) can be used as the semiconductor. Applicable to: High Electron Mobility Transistor Gallium arsenide, aluminum gallium arsenide, indium gallium arsenide, gallium nitride, Indium phosphide, silicon germanium, etc. may also be used. This makes it possible to create a transistor suitable for high-speed operation.

[0035] In this specification, when it is stated that A has a region of concentration B, for example, A If the total concentration in the depth direction of a region is B, then the concentration in the depth direction of a certain region of A If the average value of degrees is B, then the median concentration in the depth direction in a certain region of A is B. In total, if the maximum concentration in the depth direction in a certain region of A is B, then in a certain region of A If the minimum value of the concentration in the depth direction is B, then the concentration in the depth direction converges in a certain region of A. If the value is B, then the concentration in the region where a reliable value of A itself can be obtained through measurement is B. This includes cases such as

[0036] Furthermore, in this specification, A has an area of ​​size B, length B, thickness B, width B, or distance B. When describing something as "doing," for example, the overall size, length, thickness, and width of a certain area of ​​A, Or, if distance B, then size, length, thickness, width, or distance in a region of A. If the average value is B, then the size, length, thickness, width, or distance of a region A is If the median is B, then the maximum size, length, thickness, width, or distance in a region of A. When the maximum value is B, the minimum size, length, thickness, width, or distance in a region of A. If the value is B, it represents the converged size, length, thickness, width, or distance of a region A. If B is the case, then the size, length, and thickness in the region where a reliable value of A itself can be obtained through measurement. This includes cases where the width, length, or distance is B.

[0037] In this specification, the deposition of films such as insulators, semiconductors, and conductors is permitted unless otherwise specified. Excluding sputtering and chemical vapor deposition (CVD), Molecular beam epitaxy (MBE) method Epitaxy or pulsed laser deposition (PLD) position) method, Atomic Layer Deposition method (ALD) This can be done using methods such as the (Ideon) method.

[0038] Furthermore, the CVD method is a plasma CVD (PECVD) method that utilizes plasma. Processed CVD (CVD), thermal CVD (TCVD) which utilizes heat. It can be further classified into methods such as D) method. al CVD) method, Metal Organic CVD (MOCVD) method It can be divided into laws.

[0039] Plasma CVD can produce high-quality films at relatively low temperatures. Thermal CVD uses plasma... Because there are no particles present, plasma damage does not occur, resulting in a film with fewer defects.

[0040] The CVD method allows for control over the composition of the resulting film by adjusting the flow rate ratio of the source gas. Example For example, in the MCVD and MOCVD methods, the flow rate ratio of the raw material gases can be used to create membranes of any composition. It is possible to deposit a film. Also, for example, in the MCVD method and MOCVD method, film deposition is possible. Furthermore, by changing the flow rate ratio of the raw material gas, a film with a continuously changing composition is formed. This is possible. When forming a film while changing the flow rate ratio of the raw material gas, multiple deposition chambers can be used. Compared to conventional film deposition, the time required for transport and pressure adjustment is reduced, thereby shortening the film deposition time. This is possible. Therefore, the productivity of transistors can be increased.

[0041] Note that channel length refers to, for example, the length of the semiconductor (or transistor) in a top view of a transistor. When the zista is in the ON state, the part of the semiconductor through which current flows and the gate electrode overlap each other. In the region where the channel is formed, the source (source region or source power) This refers to the distance between the electrode and the drain (drain region or drain electrode). In transistors, the channel length is not necessarily the same across all regions. That is, The channel length of a transistor may not be fixed to a single value. Therefore, this specification In the book, the channel length is any one value, the maximum value, in the region where the channel is formed. Use the minimum or average value.

[0042] Channel width refers to, for example, the channel width of a semiconductor (or transistor) when it is in the ON state. The region where the current-carrying part and the gate electrode overlap, or the region where a channel is formed. This refers to the length of the portion in the region where the source and drain face each other. In a transistor, the channel width is not necessarily the same across all regions. That is, The channel width of a transistor may not be fixed to a single value. Therefore, this specification In the book, the channel width is any one value, the maximum value, in the region where the channel is formed. Use the minimum or average value.

[0043] Furthermore, depending on the transistor structure, the channel may actually be formed in the region where the channel is formed. The channel width (hereinafter referred to as the effective channel width) and the top view of the transistor are shown. The channel width (hereinafter referred to as the apparent channel width) may differ from the actual channel width. For example, In transistors with a three-dimensional structure, the effective channel width is shown in the top view of the transistor. The apparent channel width shown in [the relevant section] becomes larger, and its effect can no longer be ignored. In some cases, such as in transistors with a fine and three-dimensional structure, the upper surface of the semiconductor may be The ratio of channel regions formed on the side surface of the semiconductor to the ratio of channel regions formed In some cases, the apparent channel width shown in the top view may become larger. However, the effective channel width actually formed is larger.

[0044] By the way, in transistors with a three-dimensional structure, the effective channel width is measured Estimation can be difficult in some cases. For example, estimating the effective channel width from the design value. In order to do this, it is necessary to assume that the shape of the semiconductor is known. If this information is not precisely known, it is difficult to accurately measure the effective channel width.

[0045] Therefore, in this specification, in the top view of a transistor, the semiconductor and the gate electrode are relative to each other. The apparent length of the portion where the source and drain face each other in the overlapping region. The channel width is called the "Surrounded Channel Width (SCW)". It is sometimes referred to as "L Width." Also, in this specification, it is sometimes simply referred to as "channel width." In some cases, it may refer to the enclosed channel width or the apparent channel width. Or, In this specification, when simply referred to as "channel width," it may refer to the effective channel width. Furthermore, channel length, channel width, effective channel width, apparent channel width, enclosure The channel width and other parameters can be determined by acquiring cross-sectional TEM images and analyzing those images. This allows us to determine the value.

[0046] Furthermore, the field-effect mobility of the transistor and the current value per channel width are calculated to determine this. In some cases, the calculation may be performed using the enclosed channel width. In that case, the effective channel The values ​​may differ from those obtained when calculating using the channel width.

[0047] In this specification, when A is described as having a shape that protrudes from B, the top view is shown. Alternatively, in a cross-sectional view, at least one end of A is located outside at least one end of B. It may be indicated that A has a shape that protrudes from B. If this is the case, for example, in the top view, one end of A is outside the one end of B. It can be reinterpreted as "possessing."

[0048] <Semiconductor device> In the following, a semiconductor device according to one aspect of the present invention will be described with reference to the figures.

[0049] Figure 1 is a cross-sectional view of a semiconductor device having a transistor 150 and a capacitive element 160. .

[0050] The semiconductor device shown in Figure 1 consists of an insulator 101 on a substrate 100 and a conductor 10 on the insulator 101. 4a1, conductor 104a2 on conductor 104a1, and conductor 104b on insulator 101 1, conductor 104b2 on conductor 104b1, on insulator 101, on conductor 104a1 , on the conductor 104a2, on the conductor 104b1, and on the insulator 102a on the conductor 104b2 And, an insulator 102b on the insulator 102a, a semiconductor 106a on the insulator 102b, and a semiconductor A semiconductor 106b on body 106a, an insulator 112 on semiconductor 106b, and on insulator 112 The conductor 114a, the conductor 114b on the conductor 114a, and the insulator 102a, On 102b, on semiconductor 106a, on semiconductor 106b, on insulator 112, on conductor 114a and an insulator 108 on the conductor 114b, an insulator 118 on the insulator 108, and semiconductor 1 On 06b, on insulator 108, on insulator 118, conductor 116a1, and on semiconductor 106b, Conductor 116b1 on insulator 108, conductor 116b1 on insulator 118, and conductor 116a1 16a2, conductor 116b2 on conductor 116b1, and conductor 116 on insulator 118 Insulator 1 on a1, on conductor 116a2, on conductor 116b1 and on conductor 116b2 It has 28 and

[0051] The insulator 101 prevents impurities from entering the channel formation region of the transistor 150. It may have a suppressive function. For example, conductors 104a2 and 104b2 When the material contains impurities such as copper for semiconductor 106a or semiconductor 106b, insulation Body 101 may have a function to block copper and other materials.

[0052] The stack of conductors 104a1 and 104a2 is collectively called conductor 104a. 104a may have a region that functions as the gate electrode of transistor 150. Furthermore, the conductor 104a has a function of shielding the channel formation region of the transistor 150 from light. They may have it.

[0053] The stack of conductors 104b1 and 104b2 is collectively called conductor 104b. 104b may have a region that functions as one of the electrodes of the capacitive element 160. The conductor 104b may have a function of shielding the semiconductor device from light.

[0054] Furthermore, conductor 104a1 and conductor 104b1 may be in the same layer. In addition, the process is shortened compared to the case where the conductor 104a1 and the conductor 104b1 are not on the same layer. It can be transformed. Furthermore, if the conductor 104a2 and the conductor 104b2 are in the same layer That is also acceptable. In that case, the conductor 104a2 and the conductor 104b2 are in the same layer. The process can be shortened compared to when it is not used.

[0055] Conductor 104a1 is, for example, boron, nitrogen, oxygen, fluorine, silicon, phosphorus, aluminum Umium, titanium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, yttrium Umium, zirconium, molybdenum, ruthenium, silver, indium, tin, tantalum and A conductor containing one or more types of tungsten can be used in a single layer or in a multilayer structure. For example, It may be gold or a compound, a conductor containing aluminum, a conductor containing copper and titanium, Conductors containing copper and manganese, conductors containing indium, tin and oxygen, titanium and Conductors containing nitrogen may also be used. Conductor 104a1 is a conductor containing titanium in particular. It is preferable to use [this].

[0056] The conductor 104b1 can be selected from, for example, the conductors shown in conductor 104a1. It is preferable that the conductor 104b1 be of the same type as conductor 104a1. .

[0057] The conductor 104a2 is, for example, boron, nitrogen, oxygen, fluorine, silicon, phosphorus, aluminum Umium, titanium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, yttrium Umium, zirconium, molybdenum, ruthenium, silver, indium, tin, tantalum and A conductor containing one or more types of tungsten can be used in a single layer or in a multilayer structure. For example, It may be gold or a compound, a conductor containing aluminum, a conductor containing copper and titanium, Conductors containing copper and manganese, conductors containing indium, tin and oxygen, titanium and Conductors containing nitrogen may also be used. Conductor 104a2 may be a conductor containing copper in particular. It's preferable to have them around.

[0058] The conductor 104b2 can be selected from, for example, the conductors shown in conductor 104a2. It is preferable that the conductor 104b2 be of the same type as conductor 104a2. .

[0059] Insulators 102a and 102b together are called insulator 102. Insulator 102 is The transistor 150 may have a region that functions as a gate insulator. 102a suppresses the intrusion of impurities into the channel formation region of transistor 150. It may have the function of being a conductor such as copper. Alternatively, when semiconductor 106b contains impurities, insulator 102a blocks copper, etc. It may have a function to do so. Also, the insulator 102a is the dielectric of the capacitive element 160. It may have areas that function in that way.

[0060] The insulator 102b may have an opening in the region that overlaps with the conductor 104b. Insulator 1 By having an opening in 02b, the capacitance of the capacitive element 160 can be increased.

[0061] Insulator 102a may be, for example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, or aluminum. nium, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, di An insulator containing lanthanum, neodymium, hafnium, or tantalum, in a single layer, Alternatively, it can be used in a laminated configuration. The insulator 102a is particularly silicon nitride or silicon oxide silicon Using "n" is preferable.

[0062] Insulator 102b may be, for example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, or aluminum. nium, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, di An insulator containing lanthanum, neodymium, hafnium, or tantalum, in a single layer, Alternatively, it may be used in a laminated configuration. The insulator 102b is particularly silicon oxide or silicon oxide nitride. Using "n" is preferable.

[0063] Semiconductors 106a and 106b together are called semiconductor 106. Semiconductor 106 is The transistor 150 may have a region that functions as a channel-forming region.

[0064] Semiconductor 106a uses silicon, germanium, etc., in polycrystalline or single-crystal structures. Alternatively, strained semiconductors such as strained silicon may be used. As conductor 106a, gallium arsenide, aluminum gallium arsenide, and hyphen are applicable to HEMT. Indium gallium oxide, gallium nitride, indium phosphide, silicon germanium, etc. It may be used. Alternatively, an oxide semiconductor may be used as semiconductor 106a. Semiconductor 10 6a is preferably an oxide semiconductor.

[0065] Semiconductor 106b uses silicon, germanium, etc., in polycrystalline or single-crystal structures. Alternatively, strained semiconductors such as strained silicon may be used. Gallium arsenide, aluminum gallium arsenide, and other conductors applicable to HEMTs are used as conductor 106b. Indium gallium oxide, gallium nitride, indium phosphide, silicon germanium, etc. It may be used. Alternatively, an oxide semiconductor may be used as semiconductor 106b. Semiconductor 10 6b is preferably an oxide semiconductor.

[0066] For details on the oxide semiconductors applicable to semiconductors 106a and 106b, see below. More details will follow.

[0067] The semiconductor 106a has an area that does not overlap with the insulator 112, conductor 114a, conductor 114b, etc. It has region 107a1 and region 107b1. In addition, semiconductor 106b is an insulator 112, Regions 107a2 and 107b2 that do not overlap with conductors 114a and 114b. Regions 107a1 and 107b1 are insulators 112 of semiconductor 106a, conductors This is a region with lower resistance than the region overlapping with the electric element 114a, the conductor 114b, etc. Regions 107a2 and 107b2 are insulators 112 and conductors 114a of semiconductor 106b. This is a region with lower resistance than the region overlapping with the conductor 114b, etc. This can also be called a region with high carrier density.

[0068] If semiconductors 106a and 106b are oxide semiconductors, the carrier source is water. This can be caused by elemental and oxygen deficiencies. For more details on carrier sources in oxide semiconductors... This will be explained later.

[0069] Furthermore, regions 107a1 and 107a2 are collectively referred to as region 107a. Region 07b1 and region 107b2 are collectively called region 107b. Region 107a and region 1 07b has regions that function as the source and drain regions of transistor 150. It may happen.

[0070] The insulator 112 may have a region that functions as a gate insulator for the transistor 150. Yes. Furthermore, the insulator 112 may have a shape that protrudes more than the conductor 114a. Furthermore, the insulator 112 may have a region where the cross-sectional shape of its end is an arc. Having such a shape, the insulator, conductor, etc. that are placed above the insulator 112 It may be possible to suppress shape defects.

[0071] The insulator 112 can be, for example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum Um, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium An insulator containing conium, lanthanum, neodymium, hafnium, or tantalum, in a single layer, Alternatively, it can be used in a laminated configuration. The insulator 112 is particularly silicon oxide or silicon oxide nitride. It is preferable to use it.

[0072] Furthermore, if semiconductor 106 is an oxide semiconductor, an insulating region having contact with semiconductor 106 is present. Body 102b and / or insulator 112 have an energy at the upper end of the valence band of the oxide semiconductor. An insulator with a low energy level density between (Evos) and the energy at the lower end of the conduction band (Ecos) It is preferable to use it. For example, if the level traps electrons, the threshold of the transistor This can cause the voltage to fluctuate in the positive direction.

[0073] For example, nitrogen oxides (NOx) in silicon oxide X Also written as: ) Among them, nitrogen oxide (NO ) and nitrogen dioxide (NO2) may form energy levels between Evos and Ecos. Therefore, in order to create a transistor with stable electrical characteristics, the insulator 102 b and / or insulator 112 is preferably silicon oxide with low nitrogen oxide content. There is a match. Furthermore, although silicon oxide will be explained below, in silicon oxide nitride... The same applies to silicon oxide with low nitrogen oxide content. In Thermal Desorption Spectroscopy, nitrogen In some cases, the amount of ammonia released may exceed the amount of oxides released. For example, the release of ammonia Output is 1 x 10 18 pieces / cm 3 The above 5 x 10 19 pieces / cm 3 The following may occur. The amount of ammonia released is when the surface temperature of the membrane is 50°C or higher and 650°C or 50°C or higher and 5 The amount released will be determined by heat treatment at a temperature of 50°C or lower.

[0074] The insulator 102b and / or insulator 112 is an insulator that releases oxygen upon heating. It would be preferable if that happened.

[0075] Here, insulators that release oxygen through heat treatment are identified by TDS analysis as having a temperature of 100°C or higher and 70°C. 1 × 10⁻¹⁰18 atoms / cm 3 1×10 or more 19 atoms / cm 3 1×10 or more, or 20 atoms / cm 3 oxygen (in terms of number of oxygen atoms) or more may be released.

[0076] Herein, a method for measuring the amount of released oxygen using TDS analysis will be described below.

[0077] When a measurement sample is subjected to TDS analysis, the total amount of released gas is proportional to the integrated value of the ionic strength of the released gas . The total amount of released gas can be calculated by comparison with a standard sample.

[0078] For example, from the TDS analysis result of a silicon substrate containing hydrogen at a predetermined density serving as a standard sample, and the TDS analysis result of the measurement sample, the released amount of oxygen molecules (N O2 ) can be obtained by the formula shown below. Here, it is assumed that all gas detected at a mass-to-charge ratio of 32 obtained by TDS analysis is derived from oxygen molecules. Although CH3OH has a mass-to-charge ratio of 32, it is not considered here because the possibility of its presence is low. In addition, regarding oxygen molecules containing oxygen-17 and oxygen-18, which are isotopes of oxygen atoms , they are not considered because their natural abundance ratios are extremely trace in nature. Regarding oxygen molecules containing oxygen atoms with mass number 17 and oxygen atoms with mass number 18, their abundance ratio in nature is extremely small, so they are not taken into consideration.

[0079] N O2 = N H2 / S H2 ×S O2 ×α

[0080] N H2 is a value obtained by converting hydrogen molecules desorbed from the standard sample into density. S H2 is the standard sam This is the integral value of the ionic intensity when the material is analyzed by TDS. Here, the reference value of the standard sample is N H2 / S H2 Let's assume that. S O2 This is the integral value of the ionic intensity when the sample is subjected to TDS analysis. Yes, it exists. α is a coefficient that affects the ionic strength in TDS analysis. For details of the formula shown above, see below. For further information, please refer to Japanese Patent Publication No. 6-275697. The amount of oxygen released is determined by the Electronics Science Using the EMD-WA1000S / W temperature-controlled desorption analyzer manufactured by Gaku Corporation, the standard sample was: For example, 1 x 10 16 atoms / cm 2 Measurements are taken using a silicon substrate containing hydrogen atoms. .

[0081] Furthermore, in TDS analysis, some oxygen is detected as oxygen atoms. Oxygen molecules and oxygen atoms The ratio of these can be calculated from the ionization rate of oxygen molecules. Note that α above represents the oxygen component. Because it includes the ionization rate of the oxygen atom, by evaluating the amount of oxygen molecule released, the amount of oxygen atom released can be determined. Even if they are present, it can still be estimated.

[0082] Note N O2 This is the amount of oxygen molecules released. The amount released when converted to oxygen atoms is the amount of oxygen molecules. This will be twice the amount released.

[0083] Alternatively, insulators that release oxygen through heat treatment may contain peroxide radicals. Specifically, the spin density caused by peroxide radicals is 5 × 10⁻⁶ 17 spins / cm 3 This means that the above conditions apply. Furthermore, insulators containing peroxide radicals exhibit electron spin resonance (ESR) In Electron Spin Resonance, the g value is near 2.01. They may also have a signal indicating their name.

[0084] Alternatively, an insulator containing excess oxygen is silicon oxide (SiO₂) with excess oxygen. X (X>2) It may be present. Silicon oxide (SiO₂) with excess oxygen. X (X>2)) represents the number of silicon atoms It contains more than twice the amount of oxygen atoms per unit volume. The number of electrons and oxygen atoms can be determined by Rutherford backscattering (RBS). These are values ​​measured by scalar-scattering spectrometry.

[0085] Furthermore, if silicon oxide contains NO2, the g value is 2.03 at ESR below 100K. The first absorption line is between 7 and 2.039, and the second absorption line is between 2.001 and 2.003 in g value. A signal with a converging line and a third absorption line with a g value between 1.964 and 1.966 can be observed. It may be measured. Note that the interval between the first absorption line and the second absorption line, and the second absorption line The spacing between the convergence line and the third absorption line is approximately 5 mT in the X-band ESR measurement. Therefore, silicon oxide with low nitrogen oxide content has a spin density of 1 × 10⁻⁶ due to NO₂. 18 spins / cm 3 Less than, or 1 × 10⁻⁶ 17 spins / cm 3 The above 1 x 10 18 spins / cm 3 It is less than.

[0086] Furthermore, silicon oxide with low nitrogen oxide content can be analyzed by secondary ion mass spectrometry (SIMS:Seco). The nitrogen concentration measured by (ndary Ion Mass Spectrometry) is 6 ×10 20 atoms / cm 3 The following applies:

[0087] Conductors 114a and 114b together are called conductor 114. Conductor 114 is It may have a region that functions as the gate electrode of the transistor 150. Or, a conductor 114 may have the function of shielding the channel formation region of transistor 150 from light. ru.

[0088] The conductor 114a may have a shape that protrudes more than the conductor 114b. 114b may have a more elongated shape than the conductor 114a. Also, conductor 1 14b may have a region where the cross-sectional shape of the end is an arc. Conductor 114a and conductive Because body 114b has this shape, conductor 114a and conductor 114b In some cases, it is possible to suppress shape defects of insulators, conductors, etc., that are placed on top of it.

[0089] The conductor 114a is, for example, boron, nitrogen, oxygen, fluorine, silicon, phosphorus, aluminum Titanium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, yttrium Zirconium, molybdenum, ruthenium, silver, indium, tin, tantalum and tar A conductor containing one or more types of ngsten can be used in a single layer or in a multilayer structure. For example, an alloy. It may also be a compound, such as a conductor containing aluminum, a conductor containing copper and titanium, or copper and conductors containing manganese, conductors containing indium, tin and oxygen, titanium and A conductor containing nitrogen may also be used. Conductor 114a may contain tantalum nitride in particular. Using your body is preferable.

[0090] The conductor 114b is, for example, boron, nitrogen, oxygen, fluorine, silicon, phosphorus, aluminum Titanium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, yttrium Zirconium, molybdenum, ruthenium, silver, indium, tin, tantalum and tar A conductor containing one or more types of ngsten can be used in a single layer or in a multilayer structure. For example, an alloy. It may also be a compound, such as a conductor containing aluminum, a conductor containing copper and titanium, or copper and conductors containing manganese, conductors containing indium, tin and oxygen, titanium and Conductors containing nitrogen may also be used. Conductor 114b may contain tungsten in particular. Using your body is preferable.

[0091] The insulator 108 prevents impurities from entering the channel formation region of the transistor 150. It may have a suppressive function. For example, conductors 116a2 and 116b2 When the material contains impurities such as copper for semiconductor 106a or semiconductor 106b, insulation Body 108 may have a function of blocking copper, etc. Also, the insulator 108 has capacitance Element 160 may have a region that functions as a dielectric.

[0092] The insulator 108 has an opening that reaches the semiconductor 106. It is positioned to overlap with region 107a of 6. In addition, this opening and another opening are located in semiconductor 106 It may also be positioned to overlap with region 107b.

[0093] Insulator 108 can be, for example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum Um, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium An insulator containing conium, lanthanum, neodymium, hafnium, or tantalum, in a single layer, may be used in a single layer or a stacked layer. It is particularly preferable that the insulator 108 uses silicon nitride or silicon oxynitride .

[0094] Note that an insulator with low interface density of states between Evos and Ecos may be used as the insulator 108 .

[0095] The insulator 118 may have a region that functions as an interlayer insulator for the transistor 150 . For example, providing the insulator 118 makes it possible to reduce parasitic capacitance between the respective wirings (between the respective conductors ) of the transistor 150.

[0096] The insulator 118 has an opening at a position overlapping the opening of the aforementioned insulator 108. Note that the opening is disposed overlapping the region 107a of the semiconductor 106. In addition, another opening separate from this opening may be disposed overlapping the region 107b of the semiconductor 106. Furthermore, the insulator 1 18 may have an opening in a region overlapping the conductor 104b. Since the insulator 118 has an opening in the region overlapping the conductor 104b, the capacitance of the capacitive element 160 can be increased .

[0097] For the insulator 118, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminu m, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconi um, lanthanum, neodymium, hafnium, or tantalum may be used in a single layer or a stacked layer. It is particularly preferable that the insulator 118 uses silicon oxide or silicon oxynitride . .

[0098] The conductor 116a1 and the conductor 116a2 are collectively referred to as the conductor 116a. Further, the conductor Conductor 116b1 and conductor 116b2 together are called conductor 116b. c1 and conductor 116c2 together are called conductor 116c. Conductor 116a and conductor Body 116b is a region that functions as the source and drain electrodes of transistor 150. It may have conductor 116a and conductor 116b, transistor 15 It may have a function to shield the channel formation region of 0 from light. Conductor 116c has capacitance There may be a region that functions as the other electrode of element 160. Also, conductor 116c It may have the function of shielding semiconductor devices from light.

[0099] Furthermore, if conductors 116a1, 116b1, and 116c1 are in the same layer It is acceptable to do so. In that case, conductor 116a1, conductor 116b1, and conductor 116c1 This allows for a shorter process compared to cases where the materials are not in the same layer. Furthermore, the conductor 1 16a2, conductor 116b2, and conductor 116c2 may be in the same layer. In that case, the conductor 116a2, the conductor 116b2, and the conductor 116c2 are in the same layer. The process can be shortened compared to when it is not used.

[0100] The conductor 116a1 is, for example, boron, nitrogen, oxygen, fluorine, silicon, phosphorus, aluminum Umium, titanium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, yttrium Umium, zirconium, molybdenum, ruthenium, silver, indium, tin, tantalum and A conductor containing one or more types of tungsten can be used in a single layer or in a multilayer structure. For example, It may be gold or a compound, a conductor containing aluminum, a conductor containing copper and titanium, Conductors containing copper and manganese, conductors containing indium, tin and oxygen, titanium and Conductors containing nitrogen may also be used. Conductor 116a1 may be titanium nitride, titanium nitride, etc. It is preferable to use a conductor containing luminal or tungsten.

[0101] The conductor 116b1 can be selected from, for example, the conductors shown in conductor 116a1. It is preferable that the conductor 116b1 be of the same type as conductor 116a1. Furthermore, the conductor 116c1 may be selected from, for example, the conductors shown in conductor 116a1. It is sufficient if it is present. Conductor 116c1 is in particular the same as conductor 116a1 or conductor 116b1. It is preferable to use different types of conductors.

[0102] The conductor 116a2 is, for example, boron, nitrogen, oxygen, fluorine, silicon, phosphorus, aluminum Umium, titanium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, yttrium Umium, zirconium, molybdenum, ruthenium, silver, indium, tin, tantalum and A conductor containing one or more types of tungsten can be used in a single layer or in a multilayer structure. For example, It may be gold or a compound, a conductor containing aluminum, a conductor containing copper and titanium, Conductors containing copper and manganese, conductors containing indium, tin and oxygen, titanium and Conductors containing nitrogen may also be used. Conductor 116a2 may be a conductor containing copper in particular. It's preferable to have them around.

[0103] The conductor 116b2 can be selected from, for example, the conductors shown in conductor 116a2. It is preferable that the conductor 116b2 be of the same type as conductor 116a2. Furthermore, the conductor 116c2 may be selected and used from the conductors exemplified as the conductor 116a2, for example It is preferable that the conductor 116c2 is particularly the same type of conductor as the conductor 116a2 or the conductor 116b2 It is preferable to use the same type of conductor. Note that when a conductor containing copper is used as the conductor 116a2, the conductor 116b2 and the conductor 116c2 when a conductor containing copper is used as the conductor 116a2, the conductor 116b2 and the conductor 116c2, there may be cases where the conductor 116a1, the conductor 11 6b1 and the conductor 116c1 do not need to be provided. In that case, the semiconductor 106 and the conductors 116a2 and 116b2 which are conductors containing copper may be in direct contact with each other without any problem.

[0104] The insulator 128 may have a function of suppressing impurities from entering a channel formation region or the like of the transistor 150 in some cases.

[0105] For the insulator 128, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminu m, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconi um, lanthanum, neodymium, hafnium, or tantalum may be used as a single layer or a stacked layer For the insulator 128, it is particularly preferable to use silicon nitride or silicon oxynitride

[0106] As the substrate 100, for example, an insulator substrate, a semiconductor substrate, or a conductor substrate may be used Examples of the insulator substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zircon nia substrate (such as a yttria-stabilized zirconia substrate), a resin substrate, and the like. Furthermore, examples of the semiconducto r substrate include a single-element semiconductor substrate such as silicon or germanium, or silicon carbid e, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, gallium oxid ​Examples include compound semiconductor substrates such as those made of cellulose. Furthermore, insulating regions are created within the aforementioned semiconductor substrates. semiconductor substrates, such as SOI (Silicon On Insulator) substrates, Examples include conductive substrates such as graphite substrates, metal substrates, alloy substrates, and conductive resin substrates. Yes. Alternatively, there are substrates containing metallic nitrides, substrates containing metallic oxides, and so on. This includes a substrate in which a conductor or semiconductor is provided on an insulating substrate, and a semiconductor substrate in which a conductor or insulating Examples include substrates with a rim, and substrates with a semiconductor or insulator attached to a conductive substrate. Alternatively, substrates on which elements are provided may be used. Examples include capacitive elements, resistive elements, switch elements, light-emitting elements, and memory elements.

[0107] Furthermore, a flexible substrate may be used as the substrate 100. A sheet, film, or foil woven with this material may also be used. Furthermore, the substrate 100 may be stretchable. It may also have the ability to return to its original shape when bending or pulling is stopped. It may have the property of returning to its original shape. Or, it may have the property of not returning to its original shape. The thickness is, for example, 5 μm to 700 μm, preferably 10 μm to 500 μm. More preferably, the thickness should be between 15 μm and 300 μm. When the substrate 100 is thinned, the semiconductor The device can be made lighter. Also, by making the substrate 100 thinner, glass and other materials can be used. Even when bent or pulled, it may still have elasticity, or it may return to its original shape when the bending or pulling is stopped. It may have a quality. Therefore, when the semiconductor device on the substrate 100 is subjected to a fall or the like, It can mitigate shocks and other impacts. In other words, it can provide a robust semiconductor device.

[0108] The flexible substrate 100 can be, for example, a metal, alloy, resin, or glass. Alternatively, those fibers can be used. The substrate 100, which is a flexible substrate, undergoes linear expansion. A lower ratio is preferable as it suppresses deformation due to the environment. The substrate 100 is a flexible substrate. For example, the coefficient of thermal expansion is 1 × 10⁻⁶. -3 / K or less, 5×10 -5 / K or less, or 1×1 0 -5 Any material with a K value of 0.5 or less should be used. Examples of resins include polyester and poly Olefins, polyamides (nylon, aramid, etc.), polyimides, polycarbonates, Examples include acrylic. In particular, aramid has a low coefficient of thermal expansion, making it suitable for flexible substrates. A value of 100 is preferable.

[0109] Furthermore, one method of mounting transistors on a flexible substrate is to mount them on a non-flexible substrate. Another method involves fabricating the transistor, then removing it and transferring it to a flexible substrate. In this case, it is preferable to provide a release layer on the substrate 100, which is an inflexible substrate.

[0110] Here, Figure 2 shows a top view and a cross-sectional view of transistor 150. Figure 2(A) shows the transistor Figure 2(B) shows a top view of the 150. Also, Figure 2(B) shows the dashed line A1- shown in Figure 2(A). This is a cross-sectional view of transistor 150, which corresponds to A2. Also, Figure 2(C) is shown in Figure 2(A). This is a cross-sectional view of transistor 150, corresponding to the dashed line A3-A4.

[0111] Note that in Figure 1, etc., A1-A corresponds to a cross-sectional view of transistor 150 in the channel length direction. The cross-sectional view includes two sections (see Figure 2(B)). Therefore, regarding Figure 2(B)... For details, please refer to the description in Figure 1.

[0112] From the top view shown in Figure 2(A), the transistor 150 consists of conductor 116a and conductor 11 Since 6b and the conductor 114 do not have overlapping regions, the parasitic capacitance is small. I understand. However, transistor 150 is conductive to conductors 116a and 116b, and conductive Body 114 and may have overlapping regions. Also, in Figure 2(A), the transition In sta 150, the conductors 116a and 116b and the conductor 104 overlap each other. Although it has a region, the presence of multiple insulators in between reduces parasitic capacitance. Furthermore, the region in which conductors 116a and 116b and conductor 104 overlap each other It's okay if you don't have it.

[0113] From Figure 2(C), which corresponds to a cross-sectional view in the channel width direction, the gate electrode of transistor 150 and The conductor 114, which has a region that functions in this way, crosses over the semiconductor 106 via the insulator 112. It has a shape that allows it to move. Therefore, the electric field of the conductor 114 is on the top and side surfaces of the semiconductor 106. It can be seen that it has an effect on it. Also, it functions as the gate electrode of transistor 150. The conductor 104 having a region is positioned to face the lower surface of the semiconductor 106 via the insulator 102. It has a certain shape. Therefore, the electric field of the conductor 104 has an effect on the lower surface of the semiconductor 106. You will understand that.

[0114] Thus, the transistor 150 has a conductor 114 that functions as a gate electrode and a conductive The body 104 provides a structure in which the top, side, and bottom surfaces of the semiconductor 106 are surrounded by an electric field. In this specification, such a structure is referred to as a surrounding channel (s-channel: sur This is called a rounded channel structure.

[0115] A transistor with an s-channel structure has a channel throughout the entire semiconductor (bulk). It may be formed. Therefore, transistors having an s-channel structure are This allows a large current to flow between the source and drain, and increases the current during conduction (on-current). This is possible. Also, in transistors with an s-channel structure, the electric field of the gate electrode Because of the significant impact, it is possible to quickly switch between conductive and non-conductive states of the transistor. Therefore, transistors with an s-channel structure have a subthreshold. The swing value (also called the S value) can be reduced. Also, a smaller S value allows for off-power operation. The flow can also be reduced.

[0116] <Method for fabricating semiconductor devices> Next, we will explain the method for fabricating the semiconductor device shown in Figure 1.

[0117] First, prepare circuit board 100.

[0118] Next, the insulator 101 is deposited.

[0119] Next, conductive films that will become conductive films 104a1 and 104b1 are formed.

[0120] Next, conductive films that will become conductive films 104a2 and 104b2 are formed.

[0121] Next, the laminate of the conductive material is processed by a lithography process or the like to produce the conductive material 104a Conductor 104a having 1 and conductor 104a2, and conductor 104b1 and conductor A conductor 104b having an electric element 104b2 is formed (see Figure 3). In this way, the conductor The process is shortened by forming 104a and the conductor 104b through the same process. This is possible. In other words, it is possible to increase the productivity of semiconductor devices.

[0122] Next, the insulator 102a is deposited.

[0123] Next, the insulator 132 is formed (see Figure 4). The insulator 132 will undergo subsequent processes to become an insulator. Since it is an insulator of type 102b, refer to the description of insulator 102b.

[0124] Furthermore, silicon oxide with low nitrogen oxide content can be processed, for example, using the PECVD method, where the substrate temperature is The temperature should be 220°C or higher, 280°C or higher, or 350°C or higher, and the raw material gas should contain silane and dioxide. The film can be formed using nitrogen.

[0125] Next, a protective film 113 is formed. The protective film 113 is, for example, made of the aforementioned conductive material, the aforementioned insulating material A rim body or the aforementioned semiconductor may be used. The protective film 113 preferably allows oxygen to permeate. A film with low properties is used. The protective film 113 is, for example, silicon oxide or silicon oxide nitride. A film with low oxygen permeability is used. The protective film 113 preferably has a columnar crystalline structure. A film with lower oxygen permeability than tungsten is used. The protective film 113 is particularly preferably Tantalum nitride is used.

[0126] Next, oxygen is added to the upper surface of the protective film 113 (see Figure 5). One example of an additional treatment is plasma treatment in an atmosphere containing an oxidizing gas. Oxidizing gases include, for example, gases containing oxygen atoms, specifically oxygen gas and nitrous oxide gas. Examples include carbon dioxide gas. Alternatively, as a process to add oxygen, for example, an oxygen source Doping is a process that involves ionizing molecules containing oxygen atoms or other atoms to enhance doping. In the case of doping, there are two methods: doping with mass-separated ions and doping with ions without mass separation. You may or may not use ping; either method is acceptable.

[0127] The protective film 113 has the function of blocking oxygen, thereby suppressing the release of added oxygen. Oxygen can be added to insulator 132 and / or insulator 102a while doing so. Therefore, when oxygen is added without the protective film 113, When oxygen is added in this state, the amount contained in insulator 132 and / or insulator 102a is greater. The amount of oxygen can be increased. Furthermore, the protective film 113 can be treated by adding oxygen. It's okay if it gets oxidized.

[0128] Furthermore, the protective film 113 has the function of blocking oxygen and preventing oxygen from reaching the lower layer. The thickness should be such that it is 1 nm or more and 150 nm or less. It should be between nm and 100 nm.

[0129] Upon the addition of oxygen, insulator 132 and / or insulator 102a contain excess oxygen. It acts as an insulator.

[0130] Next, remove the protective film 113. However, if the protective film 113 is an insulator or semiconductor... In some cases, it may not be necessary to remove the protective film 113.

[0131] Next, the insulator 132 is processed by a lithography process or the like to form the insulator 102b. (See Figure 6.) Note that the formation of the insulator 102b overlaps with the conductor 104b of the insulator 102a. Perform the procedure so that the area becomes exposed.

[0132] Next, a semiconductor film, which will become semiconductor 106a, is deposited.

[0133] Next, a semiconductor film, which will become semiconductor 106b, is deposited.

[0134] Next, it is preferable to perform a first heat treatment. The first heat treatment is performed at a temperature of 250°C to 650°C. Preferably, this should be carried out at a temperature of 300°C to 500°C. The first heat treatment is performed in an inert gas atmosphere. The process is carried out in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. The first heat treatment may be carried out under reduced pressure. Alternatively, the first heat treatment may be carried out using an inert gas After heat treatment in an atmosphere, an oxidizing gas of 10 ppm or more is added to replenish the desorbed oxygen. Heat treatment may be carried out in an atmosphere containing % or more or 10% or more. By improving the crystallinity of the semiconductor that will become semiconductor 106a and the semiconductor that will become semiconductor 106b It can also remove impurities such as hydrogen and water.

[0135] Next, the semiconductor stack is processed by a lithography process or the like, so that semiconductor 106a And a semiconductor 106 having semiconductor 106b is formed (see Figure 7).

[0136] Next, an insulating film, which will become the insulating film 112, is formed.

[0137] Next, a conductive film, which will become conductive material 114a, is formed.

[0138] Next, a conductive film, which will become conductive material 114b, is deposited.

[0139] Next, the laminate of the conductive material is processed by a lithography process or the like. Furthermore, the upper layer of conductive material By etching under conditions where etching occurs faster than etching of the underlying conductor, ...conductor 114b and conductor 114a having a shape that protrudes more than conductor 114b To accomplish.

[0140] Next, by using a conductor 114a as a mask and processing the insulator that will become the insulator 112, An insulator 112 is formed that has a shape that protrudes more than the conductor 114a. Body 106 may be etched from the upper surface by 0.1 nm to 5 nm.

[0141] Next, the insulator 112, conductor 114a, and conductor 114b are used as a mask, and semiconductor 106 Process this (see Figure 8).

[0142] This process involves, for example, adding an impurity that has the function of increasing the carrier density of semiconductor 106. This can be done by: If semiconductor 106 is an oxide semiconductor, the impurity is: For example, boron, carbon, nitrogen, neon, aluminum, phosphorus, argon, manganese, arsenic One or more impurities selected from krypton, xenon, etc. may be used. Argon is particularly preferable. Impurities can be added by doping methods, etc. Furthermore, the process is carried out in an atmosphere containing, for example, the aforementioned elements (e.g., argon). This may be done by plasma treatment, for example. Plasma treatment is performed on the substrate 100 side. It is preferable to perform the process in a way that applies a self-bias.

[0143] When the above treatment is applied to an oxide semiconductor, oxygen is removed from the oxide semiconductor, resulting in an oxygen deficiency. Loss (V O It can also be written as ). A hydrogen atom can be placed in the oxygen vacancy. State (V O Also written as H. ) forms a donor level in oxide semiconductors, therefore, the treatment The carrier density in the region can be increased, and the resistance can be reduced. O H is Donna The details of forming the energy levels will be discussed later.

[0144] In this way, regions 107a1 and 107b, which are the regions of semiconductor 106a to be processed, 1, and regions 107a2 and 107b2, which are the regions to be processed of semiconductor 106b. It can be formed (see Figure 9). Note that regions 107a1 and 107a2 can be combined. This region is called region 107a. Regions 107b1 and 107b2 are also collectively called region 10 It is called 7b.

[0145] Next, an insulator 138 is formed. The insulator 138 will become an insulator 108 in a later process. Since it is an edge material, refer to the description for insulator 108.

[0146] The insulator 138 is preferably formed by the PECVD method. For example, as , an insulator containing hydrogen, in particular silicon nitride containing hydrogen (also written as SiNH) By forming a film, hydrogen can be added to regions 107a and 107b. As a result, the hydrogen is contained in region 107a and region 107b. O By filling in the donor level V that forms O H can be formed efficiently. Furthermore, a sufficient amount of water is added to the insulator 138. If a prime element is present, then V in regions 107a and 107b O Hydrogen leaves H and V O Even if that happens, V O It can be converted back to H. Therefore, in this way The formed regions 107a and 107b can stably maintain a low resistance state. That is, regions 107a and 107b were used as the source region and drain region. In this case, the on-current of transistor 150 can be increased.

[0147] Thus, an oxide semiconductor that has been made conductive can be called an oxide conductor. Generally, Oxide semiconductors have a large energy gap, which allows them to transmit visible light. On the other hand, oxide conductors are oxide semiconductors that have donor levels near the conduction band. Therefore Furthermore, the effect of absorption by the donor level is small, and the light transmission for visible light is similar to that of oxide semiconductors. It has a sexual nature.

[0148] Here, the temperature dependence of resistivity in oxide conductors will be explained using Figure 38. .

[0149] The oxide conductor contained in the sample whose resistivity was measured was an oxide semiconductor containing hydrogen nitride. Oxide conductors (OC_SiNH) formed by contact with ricon, in doping equipment When argon is added to the oxide semiconductor and it comes into contact with silicon nitride containing hydrogen, it forms The formed oxide conductor (OC_Ar dope+SiNH), or the plasma processing apparatus In this process, argon ions are irradiated using an argon plasma, and silicon nitride containing hydrogen is used. An oxide conductor (OC_Ar plasma + SiNH) was fabricated by contact with [a specific material]. did.

[0150] The method for preparing a sample containing an oxide conductor (OC_SiNH) is described below. First, a glass substrate On top of that, a 400 nm thick silicon oxidnitride is formed by the PECVD method, and then oxygen plasma By using a device and adding oxygen ions to silicon oxidnitride, oxygen is released upon heating. Silicon oxide nitride was formed. Next, on the silicon oxide nitride that releases oxygen upon heating, Sputtering using a sputtering target with an atomic ratio of In:Ga:Zn = 1:1:1.2 By the tarring method, an In-Ga-Zn oxide with a thickness of 100 nm is formed, and then subjected to nitriding at 450°C. After heat treatment in a nitrogen atmosphere, it was further heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450°C. Next, silicon nitride with a thickness of 100 nm was formed by the PECVD method. Then, at 350°C... The material was heat-treated in a mixed gas atmosphere of nitrogen and oxygen.

[0151] The method for preparing a sample containing an oxide conductor (OC_Ar dope + SiNH) is shown below. First, a 400 nm thick silicon oxide nitride is formed on a glass substrate using the PECVD method. Afterward, oxygen plasma is used to add oxygen ions to silicon oxidnitride, and heating... We formed silicon oxide nitride that releases oxygen. Next, we formed silicon oxide nitride that releases oxygen by heating. A sputtering target with an atomic ratio of In:Ga:Zn=5:5:6 is placed on silicon. Using a sputtering method, an In-Ga-Zn oxide with a thickness of 100 nm is formed. After heat treatment in a nitrogen atmosphere at 450°C, then in a mixed gas atmosphere of nitrogen and oxygen at 450°C. The material was heat-treated. Next, an accelerating voltage was applied to the In-Ga-Zn oxide using a doping device. Assuming 10kV and a dose of 5 × 10 14 / cm 2 Add argon to In-Ga-Z Oxygen vacancies were formed in the n oxide. Next, silicon nitride with a thickness of 100 nm was prepared using the PECVD method. This was formed. Next, it was heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 350°C.

[0152] The method for preparing a sample containing an oxide conductor (OC_Ar plasma + SiNH) is shown below. First, a 400nm thick silicon oxide nitride is formed on a glass substrate using the PECVD method. After that, by using oxygen plasma, silicon oxiditride, which releases oxygen when heated, is produced. Next, on silicon oxidnitride, which releases oxygen upon heating, a material with an atomic ratio of In:G was formed. By using a sputtering method with a sputtering target of a:Zn=1:1:1.2 A 100nm thick In-Ga-Zn oxide layer is formed and then heat-treated in a nitrogen atmosphere at 450°C. After that, it was heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450°C. Next, plasma treatment In the apparatus, argon plasma is generated and accelerated argon ions are processed in In-Ga -Oxygen vacancies were formed by impacting Zn oxide. Next, using the PECVD method, a thickness of 10 A 0 nm silicon nitride was formed. Next, in a mixed gas atmosphere of nitrogen and oxygen at 350°C... It was heat-treated.

[0153] Next, Figure 38 shows the results of measuring the resistivity of each sample. Here, the resistivity was measured using a 4-terminal resistor. The van der Pauw method was used. In Figure 38, the horizontal axis represents the measured temperature, and the vertical axis represents The resistivity is shown. The measurement results for oxide conductors (OC_SiNH) are indicated by square marks. The measurement results for the material conductor (OC_Ar dope+SiNH) are shown with circles, and the oxide conductor ( The measurement results for OC_Ar plasma (+SiNH) are indicated by triangles.

[0154] Although not shown in the diagram, oxide semiconductors that do not come into contact with silicon nitride containing hydrogen have high resistivity. Therefore, measuring resistivity was difficult. For this reason, oxide conductors have a lower resistivity than oxide semiconductors. It is clear that it is low.

[0155] From Figure 38, oxide conductors (OC_Ar dope+SiNH) and oxide conductors (O C_Ar plasma (SiNH) has oxygen deficiencies and contains hydrogen, which affects its resistivity. It can be seen that the fluctuation is small. Typically, in the range of 80K to 290K, the resistivity is The fluctuation rate is less than ±20%. Or, in the range of 150K to 250K, the resistivity is The variation rate is less than ±10%. That is, oxide conductors are degenerate semiconductors, and the lower end of the conduction band is It is presumed that the Fermi level and the conductor are in agreement or nearly in agreement. For this reason, oxide conductors By using it as the source and drain regions of a transistor, oxide conductors and drains The conductor, which functions as both the source electrode and the drain electrode, makes ohmic contact with the source electrode. This can reduce the contact resistance between the conductor that functions as the drain electrode and the oxide conductor. Furthermore, because the resistivity of oxide conductors has low temperature dependence, the source electrode and drain electrode... The conductor that functions as such and the oxide conductor have small variations in contact resistance and are reliable. It is possible to manufacture high-quality transistors.

[0156] Next, an insulating film that will become insulator 148 is formed. The insulating film that will become insulator 148 will be used in the following processes. Since it is an insulator that becomes insulator 118 after going through a certain process, refer to the description of insulator 118.

[0157] Next, a second heat treatment may be performed. By performing the second heat treatment, semiconductor 106 Through a, excess oxygen contained in the insulator 102, etc., moves to the semiconductor 106b. Body 106b is covered with either semiconductor 106c, insulator 112, or insulator 108. Therefore, outward diffusion of excess oxygen is unlikely to occur. For this reason, the second heat treatment is performed at this time. By doing so, defects (oxygen vacancies) in semiconductor 106b can be efficiently reduced. The second heat treatment involves the diffusion of excess oxygen (oxygen) in the insulator 102 to the semiconductor 106b. This can be done using temperature. For example, you can refer to the description of the first heat treatment. The second heat treatment is preferably performed at a lower temperature than the first heat treatment. The temperature difference for the heat treatment in step 2 is 20°C to 150°C, preferably 40°C to 100°C. This will suppress the release of excess oxygen (oxygen) from the insulator 102. It is possible.

[0158] Next, the insulator is processed by a lithography process or the like to form the insulator 148. (See Figure 10.) Note that the formation of the insulator 148 overlaps with the conductor 104b of the insulator 138. Perform the procedure so that the area becomes exposed.

[0159] Next, the lamination of the insulator 138 and the insulator 148 is processed by a lithography process or the like. This forms a laminate of insulator 108 and insulator 118 (see Figure 11). The formation of 108 and the insulator 118 is such that regions 107a and 107b are exposed. conduct.

[0160] Next, conductive materials that will become conductors 116a1, 116b1, and 116c1 are deposited. do.

[0161] Next, conductive materials that will become conductors 116a2, 116b2, and 116c2 are deposited. do.

[0162] Next, the laminate of the conductive material is processed by a lithography process or the like to produce the conductive material 116a Conductor 116a, conductor 116b1 and conductor 116a2 having conductor 1 and conductor 11 A conductor 116b having 6b2, and a conductor 116c1 and a conductor 116c2 having A conductor 116c is formed. In this way, conductor 116a, conductor 116b and conductor By forming 116c through the same process, the process can be shortened. This can increase the productivity of semiconductor equipment.

[0163] Next, the insulator 128 is deposited (see Figure 12).

[0164] As described above, a semiconductor device having a transistor 150 and a capacitive element 160 is fabricated. It can be manufactured.

[0165] <Modified examples of semiconductor devices> In Figure 1, etc., the semiconductor 106 of transistor 150 is used as a channel formation region. Region 107a has a region that can perform functions and regions that function as a source region and a drain region. The present invention describes a structure having region 107b and, but according to one aspect of the present invention, Conductor devices are not limited to this structure. For example, as shown in Figure 13, semiconductor Inside regions 106, regions 107a and 107b, there are further regions 107c and 10 The structure may also have region 7d, region 107e, and region 107f.

[0166] Furthermore, region 107c has an adjacent region to region 107a. Also, region 107c is It has a region that overlaps with the insulator 112 and does not overlap with the conductor 114a. Also, region 10 Region 7d has a region adjacent to region 107b. Region 107d also has an insulator 112. It has an overlapping region that does not overlap with the conductor 114a. Also, region 107e is region 1 It has a region adjacent to 07c. Also, region 107e overlaps with the conductor 114a, and It has a region that does not overlap with the conductor 114b. Also, region 107f is adjacent to region 107d. It has a region that overlaps with the conductor 114a, and the conductor 114 It has a region that does not overlap with b.

[0167] Region 107c is, for example, an LDD (Lightly Doped Drain) region. It may have a region that functions as a source region or drain region. This is a region with low carrier density and / or impurity concentration, and is more sensitive than the channel-forming region. It has regions with high carrier density and / or impurity concentration. Or, region 107c is, for example, For example, it may have a region that functions as an offset region. The offset region is a channel It has a region with a carrier density and / or impurity concentration similar to that of the formation region.

[0168] Furthermore, region 107d may have, for example, a region that functions as an LDD region. Region 107d may have, for example, a region that functions as an offset region. Region 107e may have, for example, an area that functions as an LDD area. Also, region 10 7e may have, for example, a region that functions as an offset region. Also, region 107 f may have, for example, an area that functions as an LDD area. Also, area 107f is For example, it may have a region that functions as an offset region. And the region 107e or / and region 107f and the conductor 114a overlap each other This region is called the overlap region.

[0169] At least one of regions 107c, 107d, 107e, and 107f is an LDD region Having a region that functions as a region, or / or a region that functions as an offset region. This reduces degradation caused by the concentration of the transistor's drain electric field. In other words, This allows for the creation of highly reliable semiconductor devices.

[0170] For example, region 107c and region 107d have regions that function as LDD regions, If region 107e and region 107f have regions that function as offset regions, then in particular, In some cases, it is preferable to reduce the degradation caused by the concentration of the electric field in the drain of the inverter. ru.

[0171] Note that the length of each region that functions as an LDD region in the channel length direction is the source The distance between the region and the drain region is less than 20%, less than 10%, less than 5%, or less than 2%. It is preferable that it is full. Or, the length in the channel length direction of each overlapping region. The distance between the source region and the drain region is less than 20%, less than 10%, and less than 5%. Alternatively, it is preferable that it be less than 2%. Or, each region that functions as an offset region The length in the channel length direction is 20% of the distance between the source region and the drain region. Preferably, it is less than 10%, less than 5%, or less than 2%.

[0172] Furthermore, as shown in Figure 1, there is a region that functions as the channel formation region of transistor 150. This section describes a structure in which semiconductor 106 has two layers, semiconductor 106a and semiconductor 106b. However, the semiconductor device according to one aspect of the present invention is not limited to this structure. For example, as shown in Figure 14, semiconductor 106 is semiconductor 106a, semiconductor 106b and semiconductor The structure may have three layers of conductor 106c. In this case, region 107a is region The structure will have regions 107a1, 107a2 and 107a3. 7b has a structure comprising regions 107b1, 107b2, and 107b3. Furthermore, as shown in Figure 15, the semiconductor 106 may have a single-layer structure. In this case, Region 107a has a single-layer structure. Region 107b also has a single-layer structure.

[0173] Furthermore, in Figure 1, etc., an insulating region having a gate insulator for transistor 150 is shown. This describes a structure in which the cross-sectional shape of the end of the edge body 112 is an arc, The semiconductor device according to one aspect of the invention is not limited to this structure. For example, Figure 16 As shown, the structure does not have a region where the cross-sectional shape of the end of the insulator 112 is an arc. That's fine too.

[0174] Furthermore, the transistor 150 according to one aspect of the present invention includes an insulator 112, a conductor 114a, and a conductor. It is preferable that at least one of the electrical components 114b has a tapered angle. For example, the insulator 112 is The angle θ1 between the top surface of semiconductor 106 and the side surface of insulator 112 is less than 90°, 30° It is preferable that the cross-section has an angle of 85° or less, or 45° or more and 70° or less. Furthermore, it is conductive. The angle θ2 between the upper surface of the insulator 112 and the side surface of the conductor 114a is 90°. Less than °, 10° to 85°, 15° to 85°, 30° to 85°, or 4 It is preferable that the cross-section has an angle of 5° to 70°. Also, the conductor 114b is conductor 1 The angle θ between a straight line approximately parallel to the upper surface of 14a and a straight line approximately parallel to the side surface of the conductor 114b. Section 3 is less than 90°, or 30° to 85°, or 45° to 70°. It is preferable to have this feature. Also, if angle θ1 is smaller than angle θ2, then the coating such as a layer that is formed later will be less preferable. This is preferable because it increases the properties. Also, if the angle θ3 is smaller than the angle θ2, the layers that are formed later will be affected. This is preferable because it improves the coverage.

[0175] <Relative position of wiring> The following describes the connections of each wire in a semiconductor device according to one aspect of the present invention.

[0176] Figure 17(A) is a cross-sectional view showing an example of connections between wirings in a semiconductor device. This includes conductor 104a and / or conductor 104b, etc., and conductor 104c which is in the same layer. , conductor 116a, conductor 116b or / and conductor 116c, etc., which are on the same layer This shows the connection point when the electric body 116d and the conductor 104c are electrically connected. Specifically, the conductor 104c The same as the conductor 114, etc., through the openings provided in the insulator 102 and the insulator 112. The conductor 116d has a region in contact with the single-layer conductor 115a, and the conductor 116d has an insulator 108 and The insulator 118 may have a region that is in contact with the conductor 115a through an opening provided in the insulator 118.

[0177] The openings provided in the insulator 102 and the insulator 112 are formed through the same process. They may be formed by a different process. Also, insulator 108 and insulator 11 The openings provided in 8 may be formed through the same process, or they may be formed through different processes. These steps may be carried out along with the fabrication of the transistor 150 and the capacitive element 160. By doing so, it may be possible to increase the productivity of semiconductor equipment.

[0178] Figure 17(B) is a cross-sectional view showing an example of connections between wirings in a semiconductor device. This includes conductor 104a and / or conductor 104b, etc., and conductor 104d, which is in the same layer as conductor 104a and / or conductor 104b, etc. , conductor 116a, conductor 116b or / and conductor 116c, etc., which are on the same layer This shows the connection point when the electric body 116e and the conductor 104d are electrically connected. Specifically, the conductor 104d It contacts the conductor 116e through openings provided in the insulator 108 and the insulator 118. It is sufficient to have a region.

[0179] The openings provided in the insulator 108 and the insulator 118 are formed through the same process. It may be formed through different processes. These processes are performed by transistor 150 And by performing this process together with the fabrication of the capacitive element 160, the productivity of semiconductor devices can be increased. It is sometimes possible.

[0180] Figure 17(C) is a cross-sectional view showing an example of connections between wirings in a semiconductor device. This includes conductor 104a and / or conductor 104b, etc., and conductor 104e, which is in the same layer as conductor 104a and / or conductor 104b, etc. The connection part when the conductor 115b, which is the same layer as the conductor 114, is electrically connected This shows that the conductor 104e is provided on the insulator 102 and the insulator 112. It is sufficient to have a region that is in contact with the conductor 115b through the opening.

[0181] The openings provided in the insulator 102 and the insulator 112 are formed through the same process. It may be formed through different processes. These processes are performed by transistor 150 And by performing this process together with the fabrication of the capacitive element 160, the productivity of semiconductor devices can be increased. It is sometimes possible.

[0182] Figure 17(D) is a cross-sectional view showing an example of a crossing between wirings in a semiconductor device. This includes conductor 104a and / or conductor 104b, etc., and conductor 104f, which is in the same layer. , conductor 116a, conductor 116b or / and conductor 116c, etc., which are on the same layer Region where the electric body 116f overlaps via insulators 102, 108, and 118. This indicates.

[0183] Furthermore, by having multiple layers of insulation between the wires, parasitic capacitance between the wires can be reduced. Therefore, it is important to suppress the decrease in frequency characteristics (also called f-response) caused by parasitic capacitance. Therefore, it can be seen that the semiconductor device according to one aspect of the present invention has good frequency characteristics.

[0184] <Oxide semiconductor> The following applies to semiconductors 106, 106a, 106b, 106c, etc. This section describes possible oxide semiconductors.

[0185] Oxide semiconductors are, for example, oxides containing indium. Oxide semiconductors are, for example, The presence of iondium increases carrier mobility (electron mobility). Also, oxide semiconductors... It is preferable that it contains element M. Element M is preferably aluminum, gallium, or yttrium. This can be represented as mu or tin, etc. Other elements that can be applied to element M include boron, silicone, etc. Titanium, iron, nickel, germanium, yttrium, zirconium, molybdenum, These include lanthanum, cerium, neodymium, hafnium, tantalum, and tungsten. Furthermore, in some cases, element M may be a combination of multiple elements as mentioned above. For example, it is an element with a high bonding energy with oxygen. It is an element with a higher energy than dium. Or, element M is, for example, the energy of oxide semiconductors. It is an element that has the function of increasing the gap. Also, oxide semiconductors are preferable when they contain zinc. It seems that oxide semiconductors can sometimes crystallize more easily when zinc is included.

[0186] However, oxide semiconductors are not limited to oxide semiconductors containing indium. For example, zinc tin oxide, gallium tin oxide, etc., do not contain indium and contain zinc. These include oxide semiconductors containing gallium, oxide semiconductors containing tin, and so on. That's fine too.

[0187] Oxide semiconductors, for example, use oxides with a large energy gap. The energy gap is, for example, between 2.5 eV and 4.2 eV, preferably 2.8 eV. The voltage should be 3.8 eV or less, and more preferably 3 eV to 3.5 eV.

[0188] The on-current of a transistor can be increased as the factors that hinder electron movement are reduced. Yes, it is possible. For example, if there are no factors hindering electron movement, it is estimated that electrons will move efficiently. Electron movement is inhibited, for example, when the physical irregularities of the channel-forming region are large. It will be done.

[0189] To increase the on-current of a transistor, for example, the upper or lower surface of the oxide semiconductor , the root mean square (RMS) in a 1 μm × 1 μm area. are) Roughness less than 1 nm, preferably less than 0.6 nm, more preferably less than 0.5 nm It should be less than 0.4 nm, more preferably less than 0.4 nm. Also, in the range of 1 μm × 1 μm The average surface roughness (also called Ra) is less than 1 nm, preferably less than 0.6 nm, and more preferably The wavelength should be less than 0.5 nm, more preferably less than 0.4 nm. Also, 1 μm × 1 μm The maximum height difference (also called PV) in the m range is less than 10 nm, preferably less than 9 nm. RMS roughness Ra and PV were obtained using a scanning probe microscope manufactured by SII Nanotechnology Co., Ltd. Measurements can be taken using mirror systems such as the SPA-500.

[0190] Furthermore, the presence of copper in oxide semiconductors can sometimes generate electron traps. The voltage may cause the transistor's threshold voltage to fluctuate in the positive direction. Therefore, A lower copper concentration is preferable on the surface or inside the oxide semiconductor. For example, oxide semiconductor The body has a copper concentration of 1 × 10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 The following, or 1 × 10 18 atoms / cm 3 It is preferable to have the following regions:

[0191] <Oxide semiconductor structure> The structure of oxide semiconductors will be described below.

[0192] In this specification, "parallel" means that two straight lines are positioned at an angle of -10° or more and 10° or less. This refers to a state where the temperature is in a certain condition. Therefore, it also includes cases where the temperature is between -5° and 5°. A "row" refers to a state where two straight lines are positioned at an angle of -30° or more and 30° or less. Furthermore, "perpendicular" refers to a state in which two straight lines are positioned at an angle of 80° to 100°. Therefore, it also includes cases where the angle is between 85° and 95°. Also, "approximately perpendicular" means two This refers to a state in which two straight lines are arranged at an angle between 60° and 120°.

[0193] Furthermore, in this specification, if a crystal is trigonal or rhombohedral, it will be represented as a hexagonal crystal system. .

[0194] Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned) is used. Crystalline Oxide Semiconductor, Polycrystalline Oxide Semiconductor Conductor, nc-OS (nanocrystalline Oxide Semiconductor) ctor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous li Examples include amorphous oxide semiconductors (such as ke Oxide Semiconductors).

[0195] From another perspective, oxide semiconductors include amorphous oxide semiconductors and other crystalline oxide semiconductors. They can be divided into conductors and crystalline oxide semiconductors. Examples of crystalline oxide semiconductors include single-crystal oxide semiconductors and CAAC-O Examples include S, polycrystalline oxide semiconductors, and nc-OS.

[0196] Generally, an amorphous structure is defined as a structure that is not fixed in a metastable state and is isotropic. It is known that it does not have a heterogeneous structure. Also, the bond angles are flexible and short distance It can also be described as a structure that possesses order but lacks long-range order.

[0197] Conversely, in the case of oxide semiconductors, which are inherently stable, a completely amorphous (complete) semiconductor is possible. It cannot be called an oxide semiconductor (ely amorphous). Furthermore, it is not isotropic. (For example, an oxide semiconductor having a periodic structure in a minute region) is a completely amorphous oxide It cannot be called a semiconductor. However, a-like OS exhibits periodicity in a minute region. Although it has a structure, it is unstable due to its porous (also called void) nature. Therefore, In terms of physical properties, it can be said to be similar to an amorphous oxide semiconductor.

[0198] <caac-os> First, let me explain CAAC-OS.

[0199] CAAC-OS is an oxide semiconductor having multiple c-axis oriented crystalline portions (also called pellets). It is a type of conductor.

[0200] Transmission Electron Microscope (TEM) A composite analysis image of the bright-field image and diffraction pattern of CAAC-OS (high-frequency analysis) is obtained using the scope. Also called a resolving TEM image.) When observing this image, multiple pellets can be identified. In high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries, are visible. It cannot be clearly confirmed that CAAC-OS occurs at the grain boundaries. This means that a decrease in electron mobility due to this is less likely to occur.

[0201] The following describes CAAC-OS as observed by TEM. Figure 34(A) shows, This shows a high-resolution TEM image of a cross-section of CAAC-OS observed from a direction approximately parallel to the sample surface. For observing high-resolution TEM images, spherical aberration correction is necessary. The Corrector function was used. High-resolution TEM images using spherical aberration correction were obtained. This is specifically called a Cs-corrected high-resolution TEM image. Acquisition of Cs-corrected high-resolution TEM images is, for example, done in Japan. This is performed using an atomic-resolution analytical electron microscope, such as the JEM-ARM200F, manufactured by this electronics company. It is possible.

[0202] Figure 34(B) shows a magnified Cs-corrected high-resolution TEM image of region (1) in Figure 34(A). Figure 34(B) shows that the metal atoms in the pellet are arranged in layers. The arrangement of metal atoms in each layer is such that the surface forming the CAAC-OS film (also called the surface to be formed) Alternatively, it reflects the irregularities of the upper surface and is parallel to the surface or upper surface of the CAAC-OS that is formed.

[0203] As shown in Figure 34(B), CAAC-OS has a characteristic atomic arrangement. Figure 34(C) The characteristic atomic arrangement is shown with auxiliary lines. Figures 34(B) and 34(C) Therefore, the size of each pellet is approximately 1 nm to 3 nm, and the pellets are It can be seen that the size of the gap caused by the tilt is about 0.8 nm. Therefore, Lett can also be called a nanocrystal (nc). AC-OS, CANC (C-Axis Aligned nanocrystals) It can also be called an oxide semiconductor having [a certain characteristic].

[0204] Here, based on the Cs-corrected high-resolution TEM image, the pellets of CAAC-OS on substrate 5120 are... The arrangement of the To 5100 can be schematically represented as a structure resembling stacked bricks or blocks. (See Figure 34(D).) The tilt between the pellets observed in Figure 34(C) The area where the condensation is occurring corresponds to region 5161 shown in Figure 34(D).

[0205] Furthermore, Figure 35(A) shows the Cs in the plane of CAAC-OS observed from a direction approximately perpendicular to the sample surface. Corrected high-resolution TEM images are shown. Regions (1), (2), and (3) in Figure 35(A). Magnified Cs-corrected high-resolution TEM images are shown in Figures 35(B), 35(C), and 35(B), respectively. As shown in 35(D). From Figures 35(B), 35(C), and 35(D), the pellets are It can be confirmed that metal atoms are arranged in a triangular, square, or hexagonal shape. However, However, no regularity is observed in the arrangement of metal atoms between different pellets.

[0206] Next, the CA was analyzed by X-ray diffraction (XRD). Let's discuss AC-OS. For example, CAAC-OS, which has an InGaZnO4 crystal. In contrast, when structural analysis is performed using the out-of-plane method, as shown in Figure 36(A)... In some cases, a peak may appear at a diffraction angle (2θ) near 31°. This peak is in InGaZ Since it is attributed to the (009) plane of the nO4 crystal, the CAAC-OS crystal is c-axis oriented. It can be confirmed that the c-axis is oriented in a direction substantially perpendicular to the surface to be formed or the upper surface.

[0207] In addition, in the structural analysis using the out-of-plane method of CAAC-OS, 2θ is 31°. In addition to the nearby peak, a peak may also appear when 2θ is near 36°. The adjacent peak indicates that some of the crystals in CAAC-OS do not have c-axis orientation. This indicates that the more preferable CAAC-OS is the structural solution by the out-of-plane method. Analysis revealed a peak around 31° for 2θ, but no peak around 36° for 2θ.

[0208] On the other hand, for CAAC-OS, X-rays are incident from a direction approximately perpendicular to the c-axis in an in-plan configuration. Structural analysis using the e method reveals a peak near 2θ = 56°. This peak corresponds to In It is attributed to the (110) plane of the GaZnO4 crystal. In the case of CAAC-OS, 2θ is 56 The sample is fixed in the vicinity of °, and the analysis is performed while rotating the sample around the normal vector of the sample surface as the axis (φ axis). Even after performing a φ scan, no clear peak appears, as shown in Figure 36(B). Furthermore, if it is a single-crystal oxide semiconductor of InGaZnO4, then by fixing 2θ to around 56°, φs If this occurs, the crystal plane is assigned to the equivalent of the (110) plane, as shown in Figure 36(C). Six lines are observed. Therefore, structural analysis using XRD indicates that CAAC-OS is It can be confirmed that the orientation of the a-axis and b-axis is irregular.

[0209] Next, we will explain CAAC-OS analyzed by electron diffraction. For example, InGaZ For CAAC-OS having nO4 crystals, a probe with a diameter of 300 nm is placed parallel to the sample surface. When an electron beam is incident, a diffraction pattern like the one shown in Figure 49(A) (limited field transmission electron diffraction) is observed. Sometimes a pattern (also called a diffraction pattern) may appear. This diffraction pattern is in InGaZnO4. The spot originates from the (009) plane of the crystal. Therefore, electron diffraction also reveals... The pellets contained in CAAC-OS have c-axis orientation, and the c-axis is approximately aligned with the surface to be formed or the upper surface. It can be seen that it is oriented perpendicularly. On the other hand, for the same sample, the probe is perpendicular to the sample surface. Figure 49(B) shows the diffraction pattern when an electron beam with a diameter of 300 nm is incident on the surface. Figure 49 (B) shows a ring-shaped diffraction pattern. Therefore, electron diffraction also shows that It can be seen that the a-axis and b-axis of the pellets contained in CAAC-OS do not have any orientation. Note that the first ring in Figure 49(B) is the (010) plane of the InGaZnO4 crystal. This is thought to be caused by the (100) surface, etc. Also, the second ring in Figure 49(B) is (110) This is thought to be caused by the surface, etc.

[0210] As mentioned above, CAAC-OS is a highly crystalline oxide semiconductor. Crystallinity can decrease due to the inclusion of impurities or the formation of defects, so the opposite perspective is needed. CAAC-OS can also be described as an oxide semiconductor with few impurities or defects (such as oxygen vacancies).

[0211] Impurities are elements other than the main components of oxide semiconductors, such as hydrogen, carbon, silicon, and transition metals. There are elements, for example. For instance, oxygen is more abundant than the metallic elements that make up oxide semiconductors such as silicon. Elements with strong bonding forces can alter the atomic arrangement of oxide semiconductors by removing oxygen from them. It disrupts the crystallinity and causes a decrease in its properties. Also, heavy metals such as iron and nickel, argon, and nickel... Because carbon oxides and other elements have a large atomic radius (or molecular radius), they affect the atomic arrangement of oxide semiconductors. This disrupts the crystallinity and reduces its properties.

[0212] When oxide semiconductors contain impurities or defects, their properties may change due to light, heat, etc. For example, impurities contained in oxide semiconductors can act as carrier traps, or carriers It can become a source of emissions. Furthermore, oxygen vacancies in oxide semiconductors can act as carrier traps. In some cases, it may act as a carrier source by capturing hydrogen.

[0213] CAAC-OS, with its low impurity and oxygen vacancies, is an oxide semiconductor with a low carrier density. Specifically, the carrier density is set to 8 × 10⁻⁶. 11 / cm 3 Less than 1 × 10 11 / cm 3 Less than 1 × 10 10 / cm 3 It is less than 1 × 10 -9 / cm 3 The above can be achieved. This is called an intrinsic oxide semiconductor. CAAC-OS has a low impurity concentration and a low defect level density. In other words, it can be said to be an oxide semiconductor with stable properties.

[0214] <nc-os> Next, I will explain nc-OS.

[0215] nc-OS is a region in which the crystalline part can be confirmed in high-resolution TEM images, and is clearly It has regions where the crystalline portion cannot be confirmed. The crystalline portion contained in nc-OS is They are often between 1 nm and 10 nm in size, or between 1 nm and 3 nm. Oxide semiconductors with a crystal size greater than 10 nm and less than or equal to 100 nm are subjected to microcrystalline oxidation. It is sometimes called a solid semiconductor. nc-OS, for example, in high-resolution TEM images, shows grain boundaries. It may not be possible to confirm this clearly. Furthermore, nanocrystals are the pellets in CAAC-OS. They may share the same origin. Therefore, in the following, the crystalline portion of nc-OS will be referred to as a pellet. There are cases where this happens.

[0216] nc-OS is used in minute regions (for example, regions between 1 nm and 10 nm, especially between 1 nm and 3 nm). The atomic arrangement has periodicity in the region of less than nm. In addition, nc-OS has different pellets. No regularity in crystal orientation is observed between the layers. Therefore, no orientation is observed throughout the entire film. Therefore, depending on the analysis method, nc-OS can be classified as a-like OS or amorphous oxide semiconductor. In some cases, it may be difficult to distinguish between them. For example, with nc-OS, X has a larger diameter than the pellet. When using lines, out-of-plane analysis detects peaks that indicate crystal planes. It is not released. Also, for nc-OS, a probe diameter larger than the pellet (e.g., 50n) is required. When electron diffraction is performed using an electron beam (of m or greater), a diffraction pattern similar to a halo pattern can be observed. It is measured. On the other hand, compared to nc-OS, the size is close to or smaller than the pellet size. When nanobeam electron diffraction is performed using an electron beam of a certain diameter, spots can be observed. When nanobeam electron diffraction is performed on c-OS, a high-brightness ring-shaped pattern is observed. A region may be observed. Furthermore, multiple spots may be observed within a ring-shaped region. There are cases where this is the case.

[0217] Thus, since there is no regularity in the crystal orientation between pellets (nanocrystals), nc- The OS has RANC (Random Aligned nanocrystals) Oxide semiconductors, or NANCs (Non-Aligned nanocrystals) It can also be called an oxide semiconductor having ).

[0218] nc-OS is an oxide semiconductor with higher orderliness than amorphous oxide semiconductors. Therefore, nc-OS has a lower defect level density than a-like OS and amorphous oxide semiconductors. However, nc-OS does not show any regularity in crystal orientation between different pellets. nc-OS has a higher defect level density compared to CAAC-OS.

[0219] <a-like OS> a-like OS is an oxide semiconductor having a structure between nc-OS and amorphous oxide semiconductors. It is a conductor.

[0220] a-like OS may exhibit porosity in high-resolution TEM images. In the high-resolution TEM image, there are regions where the crystalline structure can be clearly identified, and regions where the crystalline structure cannot be identified. It has areas that cannot be accessed.

[0221] Because it has porosity, a-like OS has an unstable structure. Below, a-like To demonstrate that the OS has a less stable structure compared to CAAC-OS and nc-OS. This shows the structural changes caused by electron irradiation.

[0222] The samples to be irradiated with electrons are a-like OS (referred to as sample A) and nc-OS ( Prepare Sample B (referred to as Sample B) and CAAC-OS (referred to as Sample C). The sample is also an In-Ga-Zn oxide.

[0223] First, high-resolution cross-sectional TEM images are obtained for each sample. It can be seen that all of them have crystalline parts.

[0224] The determination of which part should be considered a single crystal can be made as follows. For example, The unit cell of an InGaZnO4 crystal has three In-O layers and a Ga-Zn-O layer. It is known to have a structure in which 6 layers, totaling 9 layers, are stacked in layers along the c-axis. The spacing between adjacent layers is approximately the same as the spacing between grid planes (also called the d value) of the (009) plane. Yes, and its value has been determined to be 0.29 nm from crystal structure analysis. Therefore, the lattice fringes Areas with a spacing of 0.28 nm or more and 0.30 nm or less are considered to be the crystalline regions of InGaZnO4. This can be done. Note that the lattice patterns correspond to the ab-plane of the InGaZnO4 crystal.

[0225] Figure 50 shows an example of investigating the average size of the crystalline regions (22 to 45 locations) in each sample. However, the length of the lattice fringes mentioned above is used as the size of the crystal portion. From Figure 50, a-lik e OS (sample A) shows that the crystalline portion grows larger in proportion to the cumulative amount of electron irradiation. Specifically, as shown in (1) in Figure 50, in the initial stages of TEM observation, 1. The crystalline region (also called the initial nucleus), which was about 2 nm in size, grew to a size of 4.2 × 10⁻¹⁶ when the cumulative irradiation dose reached 4.2 × 10⁻¹⁶. 8 e - / nm 2 In this case, it can be seen that it has grown to a size of about 2.6 nm. On the other hand, nc-OS (sample B) and CAAC-OS (sample C) show cumulative electron emission from the start of electron irradiation. The cumulative irradiation dose is 4.2 × 10⁻⁶ 8 e - / nm 2 Within this range, no change in the size of the crystal portion is observed. It can be seen that, specifically, as shown in (2) and (3) in Figure 50, the accumulation of electrons Regardless of the irradiation dose, the size of the crystal portion of nc-OS and CAAC-OS is 1.4, respectively. It can be seen that the size is approximately nm and approximately 2.1 nm.

[0226] Thus, in a-like OS, crystalline growth can sometimes be observed upon electron irradiation. On the other hand, nc-OS and CAAC-OS show almost no crystal growth due to electron irradiation. It can be seen that it cannot be seen. That is, a-like OS is nc-OS and CAAC-O Compared to S, it is clear that it has an unstable structure.

[0227] Furthermore, because it has porosity, a-like OS is superior to nc-OS and CAAC-OS. It has a low-density structure. Specifically, the density of a-like OS is the same as that of a single crystal of the same composition. The density will be between 78.6% and 92.3%. Also, the density of nc-OS and CAAC - The density of OS is between 92.3% and 100% of the density of a single crystal of the same composition. Oxide semiconductors with a density of less than 78% are difficult to deposit into film.

[0228] For example, in an oxide semiconductor satisfying In:Ga:Zn=1:1:1 [atomic ratio], The density of single-crystal InGaZnO4 with a faceted crystal structure is 6.357 g / cm³. 3 That's how it is. For example, in an oxide semiconductor satisfying In:Ga:Zn=1:1:1 [atomic ratio] The density of a-like OS is 5.0 g / cm³. 3 More than 5.9g / cm 3 It will be less than. For example, in an oxide semiconductor satisfying In:Ga:Zn=1:1:1 [atomic ratio], The density of nc-OS and CAAC-OS is 5.9 g / cm³. 3 More than 6.3g / cm 3 It will be less than.

[0229] Note that single crystals with the same composition may not exist. In that case, crystals with different compositions in arbitrary proportions may be found. By combining single crystals, the density equivalent to that of a single crystal at a desired composition can be estimated. This is possible. The density corresponding to a single crystal of the desired composition can be obtained by combining single crystals of different compositions. The proportion can be estimated using a weighted average. However, the density should be as small as possible. It is preferable to estimate by combining different types of single crystals.

[0230] As described above, oxide semiconductors can take on various structures, each possessing a variety of properties. Oxide semiconductors include, for example, amorphous oxide semiconductors, a-like OS, nc-OS, The multilayer film may have two or more types of CAAC-OS.

[0231] <Film deposition model> The following describes the film deposition models for CAAC-OS and nc-OS.

[0232] Figure 39(A) shows the deposition process of CAAC-OS by sputtering. This is a schematic diagram of the interior.

[0233] Target 230 is bonded to the backing plate. Multiple magnets are placed beneath the backing plate. A magnetic field is generated on target 230. The magnetic field of the magnet is used to increase the deposition rate. The sputtering method used to improve performance is called the magnetron sputtering method.

[0234] Target 230 has a polycrystalline structure, and at least one of its grains contains a cleavage plane. Details of the cleavage plane will be discussed later.

[0235] The substrate 220 is positioned facing the target 230, and the distance d (target Also called the t-to-substrate distance (TS distance).) is preferably 0.01m or more and 1m or less. The film deposition depth should be between 0.02 m and 0.5 m. The deposition chamber should be mostly filled with deposition gas (e.g., oxygen, Filled with argon or a mixed gas containing 50% or more by volume of oxygen, 0.01P The pressure is controlled to be between a and 100 Pa, preferably between 0.1 Pa and 10 Pa. Here, By applying a voltage above a certain level to target 230, discharge begins and plasma is confirmed. Furthermore, a high-density plasma region is formed by the magnetic field on target 230. In the density plasma region, the deposition gas is ionized, generating ion 201. 201 is, for example, the cation of oxygen (O + ) and the cation of argon (Ar + ) and so on. .

[0236] Ion 201 is accelerated toward target 230 by the electric field, and eventually reaches target 230 It collides with the cleavage plane. At this time, the plate-shaped or pellet-shaped sputtered particles are ejected from the cleavage plane. Pellet 200a and pellet 200b are detached and knocked out. And pellet 200b undergoes structural distortion due to the impact of collisions with ions 201. There is.

[0237] Pellet 200a is a flat plate or pellet having a triangular, for example, equilateral triangle plane. These are sputtered particles. Furthermore, pellet 200b has a hexagonal plane, for example, a regular hexagon. These are flat or pellet-shaped sputtered particles. Note that pellet 200a and pellet Flat or pellet-shaped sputtered particles such as T200b are collectively referred to as pellet 200. The planar shape of pellet 200 is not limited to triangles or hexagons; for example, a triangle The shape may consist of two to six elements combined. For example, two triangles (equilateral triangles) In some cases, they may combine to form a quadrilateral (or rhombus).

[0238] The thickness of pellet 200 is determined according to the type of film-forming gas used. The reason will be explained later, but The thickness of the Let 200 is preferably uniform. Also, the sputtered particles are thin. A reddish shape is preferable to a thick, cube-like shape.

[0239] Pellet 200 receives an electric charge as it passes through the plasma, causing its sides to become negative or positive. It may become charged. Pellet 200 has oxygen atoms on its side surface, and these oxygen atoms may become negatively charged. It may become electrically charged. For example, pellet 200a has negatively charged oxygen atoms on its side. An example is shown in Figure 41. In this way, the charges interact by carrying charges of the same polarity on their sides. This causes a rebound, making it possible to maintain a flat shape. Furthermore, CAAC-OS, In the case of In-Ga-Zn oxide, the oxygen atom bonded to the indium atom becomes negatively charged. It is possible. Or, an oxygen atom bonded to an indium atom, a gallium atom, or a zinc atom. The child may become negatively charged.

[0240] As shown in Figure 39(A), for example, the pellet 200 flies through the plasma like a kite. The pellets 200 are charged, so they flutter up onto the substrate 220. Furthermore, when approaching an area where other pellets 200 have already accumulated, a repulsive force is generated. Here, On the upper surface of the substrate 220, a magnetic field is generated in a direction parallel to the upper surface of the substrate 220. Since a potential difference is applied between 220 and target 230, from substrate 220 to target Current is flowing towards pellet 230. Therefore, pellet 200 is directed towards substrate 220. On the upper surface, a force (Lorentz force) is exerted by the action of a magnetic field and electric current (Figure 42). See reference. This can be understood by Fleming's left-hand rule. Note that pellet 2 In order to increase the force applied to 00, on the upper surface of the substrate 220, on the upper surface of the substrate 220 A magnetic field in a parallel direction of 10G or more, preferably 20G or more, more preferably 30G or more, More preferably, an area with a density of 50G or more should be provided. Alternatively, on the upper surface of the substrate 220 Therefore, the magnetic field parallel to the upper surface of the substrate 220 is equal to the magnetic field perpendicular to the upper surface of the substrate 220. 0.5 times or more, preferably 2 times or more, more preferably 3 times or more, more preferably 5 times or more It is advisable to create a region that is as follows:

[0241] Furthermore, the substrate 220 is heated, and friction and other resistances between the pellet 200 and the substrate 220 The resistance is low. As a result, as shown in Figure 43(A), the pellet 200 The pellet 200 moves by gliding across the top surface of the substrate 220. This occurs in a state directed towards 220. Subsequently, as shown in Figure 43(B), the already deposited When it reaches the side of pellet 200, the sides fuse together. At this point, pellet 2 The oxygen atom on the side of 00 is removed. The removed oxygen atom is released from the CAAC-OS Because oxygen vacancies may be filled, CAAC-OS results in a low defect level density.

[0242] Furthermore, when the pellet 200 is heated on the substrate 220, the atoms rearrange and form ions. The structural strain caused by the collision of 201 is mitigated. The mitigated pellet 200 is It becomes almost a single crystal. Because pellet 200 becomes almost a single crystal, pellet 200 can form a single crystal with other pellets. Even if heated after bonding, the pellet 200 itself will hardly expand or contract. Therefore, the gaps between the pellets 200 widen, forming defects such as grain boundaries, and It will not become a bus. Also, the gaps are filled with expandable metal atoms, etc. It appears that the sides of the misaligned 200 pellets are connected like a highway.

[0243] Based on the above model, it is thought that the pellets 200 will accumulate on the substrate 220. Therefore, unlike epitaxial growth, when the surface to be formed does not have a crystalline structure... Even if it is present, it can be seen that CAAC-OS film deposition is possible. For example, on the upper surface of substrate 220 ( Even if the structure of the surface to be coated is amorphous, it is possible to deposit CAAC-OS. .

[0244] Furthermore, CAAC-OS can be applied not only to flat surfaces but also to the upper surface of the substrate 220, which is the surface to be formed on. Even if there are irregularities, the pellets 200 will be arranged according to that shape. If the upper surface of the substrate 220 is atomically flat, then the pellet 200 is a plane parallel to the ab plane. Because the flat surfaces are placed side by side with their faces downwards, the resulting layers are uniform in thickness, flat, and have high crystallinity. A layer is formed. Then, when this layer is stacked n times (where n is a natural number), CAAC-O S can be obtained (see Figure 39(B)).

[0245] On the other hand, even if the upper surface of the substrate 220 is uneven, CAAC-OS allows the pellet 200 to The structure consists of n layers (where n is a natural number) stacked on top of each other, arranged along the contours. Due to its uneven surface, CAAC-OS may have gaps between the 200 pellets. However, intermolecular forces act between the 200 pellets, and even if there are irregularities, the gaps between the pellets will not form. They are arranged to be as small as possible. Therefore, CAA has high crystallinity even with uneven surfaces. It can be configured as C-OS (see Figure 39(C)).

[0246] Therefore, CAAC-OS does not require laser crystallization and can be used on large-area glass substrates, etc. Even if there are particles present, uniform film formation is possible.

[0247] Because CAAC-OS is deposited using this model, the sputtered particles have no thickness. Pellet-like form is preferable. Note that if the sputtered particles are in the form of thick cubes... In some cases, the surface facing the substrate 220 is not constant, making it impossible to achieve uniform thickness and crystal orientation. ru.

[0248] The film formation model described above allows for high crystallinity even on a film-forming surface having an amorphous structure. A CAAC-OS having the following characteristics can be obtained.

[0249] Furthermore, CAAC-OS is a film deposition model that includes zinc oxide particles in addition to pellet 200. It can also be explained this way.

[0250] Since the zinc oxide particles have a smaller mass than the pellet 200, they reach the substrate 220 first. On the upper surface of the substrate 220, zinc oxide particles grow preferentially in the horizontal direction, resulting in a thin layer of zinc. A zinc oxide layer is formed. The zinc oxide layer has c-axis orientation. The c-axis of the crystal is oriented parallel to the normal vector of the substrate 220. The zinc oxide layer is CAA To serve as a seed layer for growing C-OS, the crystallinity of CAAC-OS is increased. It has the function of [doing something]. The zinc oxide layer has a thickness of 0.1 nm to 5 nm, and is almost [not] The grain size is between 1 nm and 3 nm. Because the zinc oxide layer is sufficiently thin, the grain boundaries are almost invisible. It is not possible.

[0251] Therefore, in order to deposit highly crystalline CAAC-OS, a higher composition than stoichiometric is required. It is preferable to use a target containing zinc in a certain proportion.

[0252] Similarly, nc-OS can be understood by the film deposition model shown in Figure 40. The only difference between Figure 40 and Figure 39(A) is whether or not the substrate 220 is heated.

[0253] Therefore, the substrate 220 is not heated, and friction occurs between the pellet 200 and the substrate 220. The resistance is high in these areas. As a result, the pellet 200 is on the upper surface of the substrate 220. Because it cannot move by gliding, it falls and accumulates irregularly, thus nc- You can obtain an operating system.

[0254] <cleavage plane> The following describes the cleavage plane of the target described in the CAAC-OS film deposition model. do.

[0255] First, the cleavage plane of the target will be explained using Figure 44. Figure 44 shows InGaZn The crystal structure of O4 is shown. Note that in Figure 44(A), the c-axis is oriented upwards and the direction is parallel to the b-axis. The structure of the InGaZnO4 crystal observed from this point is shown. Also, Figure 44(B) shows the c-axis. The structure of the InGaZnO4 crystal observed from a direction parallel to the vector is shown.

[0256] The energy required for cleavage at each crystal plane of an InGaZnO4 crystal was calculated using first-principles calculations. The calculation is performed using pseudopotentials and density functional programming with plane wave basis variables. Gram (CASTEP) is used. Note that for pseudopotentials, an ultra-soft type pseudopotential is used. We will use Tential. Furthermore, we will use GGA PBE as the functional. Also, cutoff... The energy is assumed to be 400 eV.

[0257] The energy of the structure in its initial state is derived after performing structural optimization, including cell size. Furthermore, the energy of the structure after cleavage on each plane is determined by the atomic distribution, with the cell size fixed. This is derived after optimizing the structure of the placement.

[0258] Based on the crystal structure of InGaZnO4 shown in Figure 44, the first face, second face, and third face are shown. A structure is created by cleaving along one of the fourth faces, and a structural optimization calculation is performed with a fixed cell size. Perform the following. Here, the first plane is the crystal plane between the Ga-Zn-O layer and the In-O layer, (0 01) It is a crystal plane parallel to the plane (or ab plane) (see Figure 44(A)). The second plane is This is a crystal plane between Ga-Zn-O layers, and is the (001) plane (or ab) plane. The third plane is a crystal plane parallel to the (110) plane (see Figure 44(A)). This is a crystal plane (see Figure 44(B)). The fourth plane is parallel to the (100) plane (or bc plane). It is a row crystal plane (see Figure 44(B)).

[0259] Under the above conditions, the energy of the structure after cleavage is calculated for each facet. Next, the structure after cleavage The difference between the energy of the structure in its initial state is divided by the area of ​​the cleavage plane. Next, the cleavage energy, which is a measure of the ease of cleavage at each surface, is calculated. Energy is the kinetic energy of electrons and the interatomic and atomic energy contained within the structure. - This energy takes into account the interactions between electrons and between electrons.

[0260] The calculation results show that the cleavage energy of the first surface is 2.60 J / m 2 , cleavage energy of the second surface It is 0.68 J / m³ 2 The cleavage energy of the third face is 2.18 J / m 2 , the fourth face The energy is 2.12 J / m³. 2 It was found that this is the case (see table below).

[0261] [Table 1]

[0262] This calculation shows that in the crystal structure of InGaZnO4 shown in Figure 44, the second plane The cleavage energy is lowest at this point. That is, between the Ga-Zn-O layer and the Ga-Zn-O layer. It can be seen that this is the plane that is most easily cleaved (cleavage plane). Therefore, in this specification, When referring to a cleavage plane, it means the second plane, which is the easiest plane to cleave.

[0263] Because there is a cleavage plane on the second plane between the Ga-Zn-O layers, Figure 4 The InGaZnO4 crystal shown in 4(A) can be separated by two second planes equivalent to the plane. Yes, it is possible. Therefore, when colliding ions or other elements with a target, the most cleavage energy is... - The smallest wafer-like unit (which we call a pellet) is cleaved at the lowest surface. It is thought that they will be ejected as units. In that case, the InGaZnO4 pellets will be The structure consists of three layers: a Ga-Zn-O layer, an In-O layer, and another Ga-Zn-O layer.

[0264] Also, the first plane (which is the crystal plane between the Ga-Zn-O layer and the In-O layer, and the (001) plane) Or, rather than the crystal planes parallel to the ab plane, the third plane (the crystal plane parallel to the (110) plane), Is it because the cleavage energy of the 4th plane (a crystal plane parallel to the (100) plane (or bc plane)) is low? This suggests that the planar shape of the pellets is often triangular or hexagonal.

[0265] Next, classical molecular dynamics calculations were performed to determine that InGaZ, which has a homologous structure, is the target. Assuming an nO4 crystal, the target is spalled with argon (Ar) or oxygen (O). The cleavage plane in the case of cutting is evaluated. The InGaZnO4 crystal used in the calculation (268 The cross-sectional structure of the 8-atom atom is shown in Figure 45(A), and the top surface structure is shown in Figure 45(B). Note that Figure 45( The fixed layer shown in A) is a layer in which the arrangement of atoms is fixed so that their positions do not change. Also, Figure 4 The temperature-controlled layer shown in 5(A) is a layer that is always kept at a constant temperature (300K).

[0266] For classical molecular dynamics calculations, we use Materials Explorer 5 from Fujitsu Limited. Use 0. Note that the initial temperature is 300K, the cell size is constant, and the time step size is 0.01 feet. The calculation assumes a mutosecond time and 10 million steps. Under these conditions, the atom is subjected to 300e. By applying energy V, atoms are introduced into the cell from a direction perpendicular to the ab-plane of the InGaZnO4 crystal. To inject.

[0267] Figure 46(A) shows argon being injected into a cell containing the InGaZnO4 crystal shown in Figure 45. The atomic arrangement 99.9 picoseconds (psec) after the initial reaction is shown. Also, Figure 46(B) shows the cell This shows the atomic arrangement 99.9 picoseconds after oxygen is incident on the atom. Note that in Figure 46, Figure 45( A) shows a portion of the fixed layer omitted.

[0268] From Figure 46(A), within 99.9 picoseconds after argon enters the cell, as shown in Figure 44(A) Cracks arise from the cleavage plane corresponding to the second plane shown. Therefore, InGaZnO4 When argon strikes a crystal, if the top surface is considered the second surface (0th), then the second surface (2 It can be seen that a large crack occurs in the second (second) position.

[0269] On the other hand, as shown in Figure 46(B), within 99.9 picoseconds after oxygen enters the cell, as shown in Figure 44(A) It can be seen that cracks originate from the cleavage plane corresponding to the second plane shown in ). However, oxygen is impacted If impact occurs, a large crack will form on the second (first) face of the InGaZnO4 crystal. It becomes clear that...

[0270] Therefore, the top surface of the target containing the InGaZnO4 crystal having a homologous structure When atoms (ions) collide, the InGaZnO4 crystal cleaves along the second plane, and the plane becomes flat. It can be seen that the plate-shaped particles (pellets) are detached. Also, at this time, the size of the pellets is It was found that the amount of oxygen collides with the gas is smaller than the amount of argon collides with the gas. ru.

[0271] Furthermore, the above calculations suggest that the detached pellets contain damaged areas. The damaged area included is a place where the defects caused by the damage can be repaired by reacting them with oxygen. There is a match.

[0272] Therefore, we investigated whether the size of the pellet differs depending on the type of atoms colliding with it. ru.

[0273] Figure 47(A) shows argon being injected into a cell containing the InGaZnO4 crystal shown in Figure 45. Then, the trajectories of each atom from 0 picoseconds to 0.3 picoseconds are shown. Therefore, Figure 4 7(A) corresponds to the period between Figure 45 and Figure 46(A).

[0274] As shown in Figure 47(A), argon collides with gallium (Ga) in the first layer (Ga-Zn-O layer). Then, after the gallium collides with the zinc (Zn) in the third layer (Ga-Zn-O layer), the sub It can be seen that lead reaches near the sixth layer (Ga-Zn-O layer). The argon that strikes is repelled outwards. Therefore, the InGaZnO4 crystals When argon is impacted onto the jelly, a crack appears on the second surface (second) in Figure 45(A). It is thought that it will be included.

[0275] Furthermore, Figure 47(B) shows the cell containing the InGaZnO4 crystal shown in Figure 45, into which oxygen enters. The trajectory of each atom from 0 picoseconds to 0.3 picoseconds after irradiation is shown. Therefore, Figure 47(B) corresponds to the period between Figure 45 and Figure 46(A).

[0276] On the other hand, as shown in Figure 47(B), oxygen collides with gallium (Ga) in the first layer (Ga-Zn-O layer). Then, after the gallium collides with the zinc (Zn) in the third layer (Ga-Zn-O layer), It can be seen that zinc does not reach the fifth layer (In-O layer). Furthermore, the acid that collided with gallium... The element is ejected to the outside. Therefore, acid is applied to a target containing InGaZnO4 crystals. When the elements collide, it is thought that a crack will form on the second surface (first) in Figure 45(A). ru.

[0277] This calculation also shows that when atoms (ions) collide in an InGaZnO4 crystal, from the cleavage plane... This suggests that detachment may occur.

[0278] Furthermore, we will examine the differences in crack depth from the perspective of conservation laws. Energy conservation law and momentum conservation The existence law can be shown as shown in equations (1) and (2). Here, E is the pre-collision alpha. The energy of a gas or oxygen (300 eV), m A is the mass of argon or oxygen, v A v' is the velocity of argon or oxygen before the collision. A The velocity of argon or oxygen after the collision, m Ga v is the mass of gallium. Ga v' is the velocity of gallium before the collision. Ga The Garrius after the collision This is the speed of Mu.

[0279]

number

[0280]

number

[0281] Assuming that collisions of argon or oxygen are elastic collisions, v A , v' A , v Ga and v' Ga the relationship can be expressed as formula (3).

[0282]

Math

[0283] From formula (1), formula (2) and formula (3), v Ga is set to 0, when argon or oxygen collide the velocity v' of gallium after collision Ga can be expressed as formula (4).

[0284]

Math

[0285] In formula (4), m A is substituted with the mass of argon or the mass of oxygen, and the velocity of gallium after collision by each respective atom is compared. When the energy possessed by argon and oxygen before collision velocity of gallium after collision is compared. When the energy possessed by argon and oxygen before collision is the same, it can be seen that when argon collides, the velocity of gallium is 1.24 times higher than when oxygen collides. Therefore, the energy possessed by gallium is also higher when collided by argon than when collided by oxygen, by an amount equal to the square of the velocity difference.

[0286] It can be seen that when argon is collided, the velocity (energy) of gallium after collision is higher than when oxygen is collided. Therefore, it is considered that when argon is collided cracks occur at deeper positions than when oxygen is collided.

[0287] Based on the above calculations, a target containing an InGaZnO4 crystal having a homologous structure is obtained. When sputtering is performed, it can be seen that the material peels off from the cleavage surface and pellets are formed. On the other hand, the cleavage surface Sputtering other structural areas of a target that do not have pellets will not form pellets. Sputtered particles, which are even finer than t particles and at the atomic level, are formed. These sputtered particles are t Because it is smaller than the lett, it is discharged via the vacuum pump connected to the sputtering device. It is thought that this will be the case. Therefore, crystals of InGaZnO4 having a homologous structure When a target containing particles is sputtered, particles of various sizes and shapes fly to the substrate and deposit there. It is unlikely that a model in which a film is formed is conceivable. The sputtered pellets are deposited and CAAC -The model described in Figure 39(A), etc., for depositing the OS film is reasonable.

[0288] The density of the CAAC-OS film formed in this manner is comparable to that of single-crystal OS. For example, the density of a single crystal OS having a homologous structure of InGaZnO4 is 6.36 g / cm 3 In contrast, CAAC-OS, which has a similar atomic ratio, has a density of 6.3 g / cm³. 3 It will be to that extent.

[0289] Figure 48 shows CAAC-OS, an In-Ga-Zn oxide film deposited by sputtering. See Figure 48(A).), and the original cross-section of its target (see Figure 48(B)). The atom arrangement is shown. For observing the atomic arrangement, high-angle scattering annular dark-field scanning transmission electron microscopy (HAA) is used. DF-STEM:High-Angle Annular Dark Field Sc anning Transmission Electron Microscopy) This is used. Note that in HAADF-STEM, the image intensity of each atom is proportional to the square of its atomic number. Therefore, Zn (atomic number 30) and Ga (atomic number 31), which have similar atomic numbers, are... They are almost indistinguishable. HAADF-STEM uses a Hitachi scanning transmission electron microscope HD-270. Use 0.

[0290] Comparing Figure 48(A) and Figure 48(B), CAAC-OS and the target are both It has a homologous structure, and it can be seen that the arrangement of each atom corresponds to that structure. Therefore, as shown in the film deposition models such as Figure 39(A), the target crystal structure is transferred. This process results in the deposition of CAAC-OS.

[0291] <Band Diagram> The following describes the band diagram of the transistor described above at an arbitrary cross-section.

[0292] Figure 18(A) is a cross-sectional view of a transistor 150 according to one aspect of the present invention.

[0293] Transistor 150, shown in Figure 18(A), is described in the explanation for Figure 1.

[0294] Here, in Figure 18(B), the channel formation region of transistor 150 shown in Figure 18(A) is shown. The band diagram in the A-A' section is shown. Note that semiconductor 106a is more band-driven than semiconductor 106b. Also, assume that the energy gap is slightly smaller. Furthermore, insulator 102a, insulator 102b and The insulator 112 has a sufficiently larger energy gap than semiconductors 106a and 106b. Let's assume the p is large. Also, semiconductor 106a, semiconductor 106b, insulator 102a, insulator 1 The Fermi levels (denoted as Ef) of 02b and insulator 112 are the respective intrinsic Fermi levels. This is the position of the Lumi level (denoted as Ei). Also, conductors 104a and 114 The work function is assumed to be the same as the energy difference between the vacuum level and the Fermi level.

[0295] When the gate voltage is set to be equal to or greater than the threshold voltage of transistor 150, semiconductor 106a and semiconductor Due to the energy difference at the lower end of the conduction band between body 106b and semiconductor 106a, electrons preferentially enter semiconductor 106a. It flows through it. In other words, it can be estimated that electrons are embedded in semiconductor 106a. The energy at the bottom of the conduction band is denoted as Ec, and the energy at the top of the valence band is denoted as Ev.

[0296] Therefore, the transistor 150 according to one aspect of the present invention has an interface through electron embedding. The effects of scattering are reduced. Therefore, the transistor 150 according to one aspect of the present invention is The channel resistance is small.

[0297] Next, Figure 18(C) shows the source region or drain of transistor 150 shown in Figure 18(A). The band diagram for the B-B' section including the in region is shown. Note that regions 107a1 and 10 Regions 7b1, 107a2, and 107b2 are in a degenerate state. Also, region 107b1 In this scenario, the Fermi level of semiconductor 106a is assumed to be approximately the same as the energy of the lower end of the conduction band. Furthermore, in region 107b2, the Fermi level of semiconductor 106b is at the energy of the lower edge of the conduction band. It is considered to be of the same degree. The same applies to regions 107a1 and 107a2.

[0298] At this time, a conductor 116b having the function of a source electrode or drain electrode, and a region 107b2 and the region are in ohmic contact because the energy barrier is sufficiently small. 107b2 and region 107b1 are in ohmic contact. Similarly, the source electrode or The conductor 116a, which functions as a drain electrode, and the region 107a2 are energy Because the barrier is small enough, ohmic contact occurs. Also, region 107a2 and region 107a 1 and , will be in ohmic contact. Therefore, conductor 116a and conductor 116b, The transfer of electrons between semiconductor 106a and semiconductor 106b is to occur smoothly. You can understand that.

[0299] As described above, the transistor according to one aspect of the present invention has a source electrode and a drain The transfer of electrons between the electrode and the channel formation region is smooth, and the channel resistance is low. It is a small transistor. In other words, it is a transistor with excellent switching characteristics. It becomes clear that...

[0300] Next, semiconductors 106a and 106b have band diagrams as shown in Figure 18(B). I will explain this.

[0301] For example, semiconductor 106a contains one or more elements other than oxygen that make up semiconductor 106b. Alternatively, it is an oxide semiconductor composed of two or more types of materials. Other than oxygen, which constitutes semiconductor 106b. Since semiconductor 106a is composed of one or more or two or more of the elements, semiconductor 1 At the interface between 06a and semiconductor 106b, interface states are less likely to form.

[0302] Semiconductors 106a and 106b preferably contain at least indium. When semiconductor 106a is an In-M-Zn oxide, the sum of In and M is 100 atoms. When c%, preferably In is less than 50 atomic%, and M is 50 atomic%, It is more preferably that In is less than 25 atomic%, and M is more than 75 atomic%. Increase the value. Also, when semiconductor 106b is In-M-Zn oxide, the sum of In and M is 1 When set to 00 atomic%, preferably In is higher than 25 atomic%, and M is 7 Less than 5 atomic%, more preferably In is higher than 34 atomic%, and M is 66 It should be less than atomic percent.

[0303] Semiconductor 106b uses an oxide with a higher electron affinity than semiconductor 106a. For example, As conductor 106b, the electron affinity is 0.07 eV to 1.3 eV compared to semiconductor 106a. Preferably 0.1 eV to 0.7 eV, more preferably 0.15 eV to 0.4 eV Use oxides with an electron energy of less than or equal to eV. Note that electron affinity is the energy between the vacuum level and the bottom of the conduction band. —That is the difference.

[0304] Furthermore, as shown in Figure 14, semiconductor 106 consists of semiconductor 106a and semiconductor 106b, Similarly, when semiconductor 106c is present, electrons can also be embedded. In that case, For semiconductor 106c, refer to the description of semiconductor 106a.

[0305] The transistor structures shown above are just examples, and combinations of these structures are also part of the present invention. It falls under the category of "appearance."

[0306] <Examples of semiconductor device applications> The following describes an application example of a semiconductor device according to one aspect of the present invention.

[0307] <Display device> The following describes an example of the configuration of a display device according to one aspect of the present invention.

[0308] [Example Configuration] Figure 19(A) shows a top view of a display device according to one embodiment of the present invention. Also, Figure 19(B) This includes a pixel circuit in which liquid crystal elements are used for the pixels of a display device according to one aspect of the present invention. Figure 19(C) shows an organic EL element in the pixels of a display device according to one embodiment of the present invention. The pixel circuit when used is shown.

[0309] The transistors used for the pixels can be the transistors described above. Here, An example using an n-channel transistor is shown. Note that the transistor used for the pixel is the same as the one used for the pixel. A transistor manufactured through a single process may be used as the driving circuit. Also, it may be used in the pixels. The capacitive elements can be the capacitive elements described above. In this way, pixels and driving circuits By using the transistors and capacitive elements mentioned above, a high display quality can be achieved, or / And it will become a highly reliable display device.

[0310] Furthermore, the structure of the transistors used in the pixels and the transistors used in the driving circuit are different. This can sometimes improve the performance of a display device. For example, pixels may contain s-chan A transistor with a nel structure is used, and the drive circuit does not have an s-channel structure. You may use a transistor. A transistor having an s-channel structure is Compared to transistors without an s-channel structure, it exhibits high on-current and low off-current. Therefore, transistors are used in pixels where high on-current and / or low off-current are required. It may be preferable as a transistor. Also, a transistor with an s-channel structure. This is used when you want to obtain an on-current similar to that of a transistor without an s-channel structure. In some cases, the occupied area can be reduced. Therefore, the aperture ratio of the pixels can be increased. In some cases, the aperture ratio of the pixels is 40% or more, preferably 50% or more, and even more preferably In some cases, the percentage can be 60% or more. Furthermore, it has an s-channel structure. Because transistors have high light-shielding properties, the light generated by the transistors used in pixels... In some cases, degradation can be suppressed. On the other hand, in the drive circuit, s-channel Using transistors without an EL structure is preferable because it can further reduce parasitic capacitance. There is a compatibility issue. Furthermore, in the drive circuit, transistors that do not have an s-channel structure are used. Using this method can sometimes increase design flexibility.

[0311] Furthermore, for example, the drive circuit uses a transistor with an s-channel structure, and the pixels A transistor without an s-channel structure may be used. Transistors with a nel structure have high on-current and low off-current, therefore high on Transistors suitable for use in drive circuits where a low on-current and / or low off-current are required. There are cases where this is difficult. Also, transistors with an s-channel structure are s-cha When you want to obtain an on-current similar to that of a transistor without an nnel structure, you want to reduce the occupied area. In some cases, this can be done. Therefore, the area of ​​the drive circuit can be reduced, and the bezel of the display device can be made smaller. In some cases, this may be possible. Specifically, the width of each frame may be 3 mm or less, preferably. This can be 1 mm or less, and more preferably 0.8 mm or less. On the other hand, In pixels, transistors without an s-channel structure are more parasitic. This can be preferable because it can reduce the amount. In particular, in light-emitting devices, the pixels undergo threshold correction. If it has a function, reducing the parasitic capacity can sometimes enhance its effectiveness. be.

[0312] Furthermore, for example, a transistor with an s-channel structure is used in part of the pixels, For some of the components, transistors that do not have an s-channel structure may be used. Transistors with an s-channel structure have high on-current and low off-current. Therefore, transistors used in some pixels where high on-current and / or low off-current are required. It may be preferable as a transistor. Also, a transistor with an s-channel structure. This is used when you want to obtain an on-current similar to that of a transistor without an s-channel structure. In some cases, the occupied area can be reduced. Therefore, the aperture ratio of the pixels can be increased. In some cases, the aperture ratio of the pixels is 40% or more, preferably 50% or more, and even more preferably In some cases, the percentage can be 60% or more. Furthermore, it has an s-channel structure. Because transistors have high light-shielding properties, the light generated by the transistors used in pixels... In some cases, degradation can be suppressed. On the other hand, in a different part of the pixel, s-ch Transistors without an annel structure are preferable because they can reduce parasitic capacitance more effectively. In some cases, parasitic cells may be present. In particular, in light-emitting devices, if the pixels have a threshold correction function, In some cases, reducing the quantity can increase its effectiveness.

[0313] Furthermore, for example, a transistor with an s-channel structure can be used in part of the drive circuit. In addition, a transistor without an s-channel structure may be used in another part of the drive circuit. No. Transistors with an s-channel structure have high on-current and low off-current. Because it has high on-current and / or low off-current, it is suitable for some drive circuits where high on-current and / or low off-current is required. It may be preferable to use this type of transistor. Furthermore, it has an s-channel structure. The transistor has an on-current similar to that of a transistor without an s-channel structure. In some cases, the occupied area can be reduced if desired. Therefore, the area of ​​the drive circuit can be reduced. In some cases, the bezel of the display device can be made smaller. Specifically, the width of the bezel can be reduced. Each piece should be 3 mm or less, preferably 1 mm or less, and even more preferably 0.8 mm or less. This may be possible. On the other hand, in another part of the drive circuit, an s-channel structure is used. Transistors without parasitic capacitance can be preferable in some cases because they reduce parasitic capacitance.

[0314] Figure 19(A) shows an example of a top view of an active-matrix display device. The circuit board of the display device. On 5000 are the pixel section 5001, the first scan line drive circuit 5002, and the second scan line drive circuit. A path 5003 and a signal line drive circuit 5004 are arranged. The pixel unit 5001 is connected to multiple signal lines. Therefore, it is electrically connected to the signal line drive circuit 5004, and the first scan line is controlled by multiple scan lines. It is electrically connected to the drive circuit 5002 and the second scan line drive circuit 5003. Each region separated by the scan lines and signal lines contains pixels, each with a display element. Furthermore, the substrate 5000 of the display device is FPC (Flexible Printed Circuit). The timing control circuit (controller, control I) is connected via a connection part such as the d Circuit. It is electrically connected to (also called C).

[0315] First scan line drive circuit 5002, second scan line drive circuit 5003 and signal line drive circuit 5 004 is formed on the same substrate 5000 as the pixel section 5001. Therefore, the drive circuit is separate. Compared to manufacturing by hand, the cost of manufacturing the display device can be reduced. If the dynamic circuit is fabricated separately, the number of connections between wires increases. Therefore, on the same 5000 circuit board... By providing a drive circuit, the number of connections between wires can be reduced, improving reliability, or / and yield can be improved.

[0316] <Liquid crystal display device> Furthermore, an example of the pixel circuit configuration is shown in Figure 19(B). Here, the image of a VA-type liquid crystal display device This shows a pixel circuit that can be applied to elements such as elementary components.

[0317] This pixel circuit can be applied to configurations in which a single pixel has multiple pixel electrodes. The elementary electrodes are connected to different transistors, and each transistor can be driven by a different gate signal. It is configured in such a way that the individual pixel electrodes of the multi-domain designed pixels are made possible. The signals applied to it can be controlled independently.

[0318] Gate wiring 5012 of transistor 5016 and gate wiring 50 of transistor 5017 13 is separated so that different gate signals can be applied. On the other hand, data The source or drain electrode 5014, which functions as a line, connects to the transistor 5016. Commonly used in transistor 5017. Transistor 5016 and transistor 50 17 can appropriately use the transistor 150 mentioned above. Also, capacitive element 50 23A and the capacitive element 5023B can appropriately use the capacitive element 160 described above. This will provide a liquid crystal display device with high display quality and / or high reliability. It is possible.

[0319] The gate electrode of transistor 5016 is electrically connected to the gate wiring 5012, and the transistor The gate electrode of sta 5017 is electrically connected to gate wiring 5013. By applying different gate signals to transistor 5012 and gate wiring 5013, transistor 5016 and the transistor... By varying the operating timing of the 5017 inverter, the orientation of the liquid crystal can be controlled.

[0320] Furthermore, the capacitive wiring 5010, the gate insulator which functions as a dielectric, and the first pixel electrode A capacitive element may be formed by a capacitive electrode electrically connected to a second pixel electrode.

[0321] The multi-domain structure comprises a first liquid crystal element 5018 and a second liquid crystal element 5019 in each pixel. The first liquid crystal element 5018 is composed of a first pixel electrode, a counter electrode, and a liquid crystal layer between them. The second liquid crystal element 5019 is composed of a second pixel electrode, a counter electrode, and a liquid crystal layer between them. ru.

[0322] Furthermore, the display device according to one aspect of the present invention is not limited to the pixel circuit shown in Figure 19(B). For example, a new switch, resistor, capacitive element, or transistor can be added to the pixel circuit shown in Figure 19(B). You may add elements such as switches, sensors, or logic circuits.

[0323] <Light-emitting device> Another example of a pixel circuit configuration is shown in Figure 19(C). Here, we see an example of an organic EL element. This shows the pixel structure of a display device (also called a light-emitting device) that uses light-emitting elements.

[0324] Organic EL elements, when a voltage is applied to the light-emitting element, have a pair of electrical components. Electrons are injected from one pole and holes from the other into a layer containing a luminescent organic compound. An electric current flows. Then, electrons and holes recombine, causing the luminescent organic compound to... An excited state is formed, and light is emitted when that excited state returns to the ground state. This is the mechanism. Therefore, such light-emitting devices are called current-excited light-emitting devices.

[0325] Figure 19(C) shows an example of a pixel circuit. Here, one pixel has an n-channel type An example using two transistors and one capacitive element is shown. Note that this is an n-channel type transistor. For the zista, the transistor 150 mentioned above can be used. Also, for the capacitive element... The above-mentioned capacitive element 160 can be used. In addition, the pixel circuit is digital Time-based gradation driving can be applied.

[0326] Applicable pixel circuit configurations and pixel operation when digital time-gradation driving is applied. I will explain.

[0327] Pixel 5020 has a switching transistor 5021, a driving transistor 5022, It has a light-emitting element 5024 and a capacitive element 5023. Switching transistor 502 1 has a gate electrode connected to scan line 5026, and the first electrode (source electrode, drain electrode) One side is connected to signal line 5025, and the second electrode (the other of the source electrode and drain electrode) drives It is connected to the gate electrode of the drive transistor 5022. In this configuration, the gate electrode is connected to the power line 5027 via the capacitive element 5023, and the first electrode is connected to the power supply. The second electrode is connected to the first electrode (pixel electrode) of the light-emitting element 5024, and the second electrode is connected to the first electrode (pixel electrode) of the light-emitting element 5024. The second electrode of the light-emitting element 5024 corresponds to the common electrode 5028. Common electrode 5028 It is electrically connected to a common potential line formed on the same substrate.

[0328] The switching transistor 5021 and the driving transistor 5022 are as described above. A converter 150 or the like can be used. Also, the capacitive element 5023 is the capacitive element described above. 160, etc., can be used. This allows for a high display quality and / or reliability. This will be a high-performance organic EL display device.

[0329] The potential of the second electrode (common electrode 5028) of the light-emitting element 5024 is set to the low power supply potential. Low power supply potential is a potential lower than the high power supply potential supplied to power line 5027, for example. GND, 0V, etc. can be set as low power supply potentials. Forward direction of light-emitting element 5024 The high and low power supply potentials are set to be above the threshold voltage, and the potential difference between them is used for the light-emitting element. By applying current to sub 5024, the light-emitting element 5024 is made to emit light. The forward voltage of the light-emitting element 5024 refers to the voltage required to achieve the desired brightness, and is less than Both include the forward threshold voltage.

[0330] Furthermore, the capacitive element 5023 is used as a substitute for the gate capacitance of the drive transistor 5022. It may be possible to omit it. Regarding the gate capacitance of the drive transistor 5022, channel A capacitance may be formed between the lubrication region and the gate electrode.

[0331] Next, we will explain the signal input to the drive transistor 5022. Voltage input, voltage drive In this method, the drive transistor 5022 is in one of two states: on or off. The deo signal is input to the drive transistor 5022. To operate 2 in the linear region, a voltage higher than the voltage of power line 5027 is used for the drive transistor. This is applied to the gate electrode of the zista 5022. Additionally, the signal line 5025 is driven by the power line voltage. Apply a voltage greater than or equal to the threshold voltage Vth of transistor 5022.

[0332] When performing analog grayscale driving, the gate electrode of the driving transistor 5022 is connected to the light-emitting element 50 The value obtained by adding the forward voltage of the 24 transistor to the threshold voltage Vth of the drive transistor 5022 is greater than or equal to the forward voltage of the 24 transistor. Apply voltage. Note that the drive transistor 5022 should operate in the saturation region. Enter a number and flow current to the light-emitting element 5024. Also, saturate the drive transistor 5022. To operate in the region, the potential of power line 5027 is set to the gate of drive transistor 5022. The potential is raised higher than the t. By making the video signal analog, the video signal is sent to the light-emitting element 5024. By applying a current corresponding to the number, analog grayscale driving can be performed.

[0333] Furthermore, the display device according to one aspect of the present invention is not limited to the pixel configuration shown in Figure 19(C). For example, the pixel circuit shown in Figure 19(C) includes switches, resistors, capacitives, sensors, and traps. You may add an inverter or logic circuit.

[0334] <Modified example 1 of a light-emitting device> For example, Figure 20(A) shows an example of a pixel circuit. Here, one pixel has n channels. This example uses three Nell-type transistors and one capacitive element.

[0335] Figure 20(A) shows an example of the circuit diagram for pixel 5111. Pixel 5111 is a transistor 5 155, transistor 5156, transistor 5157, capacitive element 5158, It has an optical element 5154.

[0336] The pixel electrodes of the light-emitting element 5154 react according to the image signal Sig input to the pixel 5111. The potential is controlled. Also, the brightness of the light-emitting element 5154 is controlled by the potential difference between the pixel electrode and the common electrode. It is determined by [something].

[0337] Transistor 5156 has a conductive state between wiring SL and the gate of transistor 5155. It has the function of controlling the source and drain of transistor 5155. The anode of the optical element 5154 is electrically connected, and the source and the other drain are electrically connected to the wiring VL. They are electrically connected. Transistor 5157 is wired ML and transistor 5155 Capacitive element 5158 has the function of controlling the conductivity between the source and drain. Of the pair of electrodes, one is electrically connected to the gate of transistor 5155, and the other is It is electrically connected to the anode of the light-emitting element 5154.

[0338] Furthermore, the switching of transistor 5156 is electrical to the gate of transistor 5156. This is done according to the potential of the wiring GL connected to it. Switching of transistor 5157 The potential of the wiring GL electrically connected to the gate of transistor 5157 is determined by the potential of the wiring GL. It will continue.

[0339] Furthermore, transistors 5155, 5156, and 5157 are small In either case, the transistor 150 mentioned above can be used. Element 5158 can be the capacitive element 160 or the like mentioned above.

[0340] For example, the source (or first terminal, etc.) of the transistor is connected via Z1 (and (Without intervening), electrically connected to X, and the drain of the transistor (or second terminal, etc.) However, if Y is electrically connected via (or without) Z2, or if a transistor The source (or first terminal, etc.) is directly connected to a part of Z1, and another part of Z1 It is directly connected to X, and the drain (or second terminal, etc.) of the transistor is connected to Z2. If one part is directly connected to Z2, and another part of Z2 is directly connected to Y, then: It can be expressed as follows.

[0341] For example, "X and Y and the source (or first terminal, etc.) and drain (or The second terminal, etc., is electrically connected to each other, and X is the source of the transistor ( (or the first terminal, etc.), the transistor's drain (or the second terminal, etc.), and Y in that order. It can be expressed as, "It is electrically connected." Or, "The source of the transistor." (or the first terminal, etc.) is electrically connected to X and the drain of the transistor (or The second terminal (or other terminal) is electrically connected to Y, and X is the source of the transistor (or the first terminal). Y is electrically connected to the drain (or second terminal, etc.) of the transistor in this order. It can be expressed as "X is connected to the source of the transistor ( or via the first terminal (or the second terminal, etc.) and the drain (or the second terminal, etc.), Y is electrically connected. Connected, X, the source of the transistor (or the first terminal, etc.), the slave of the transistor It can be expressed as "N (or the second terminal, etc.), Y are provided in this connection order." Yes, it is possible. Using similar notation to these examples, the order of connections in a circuit configuration can be specified. By defining the source (or first terminal, etc.) and drain (and The technical scope can be determined by distinguishing between (the second terminal, etc.) and other components. The methods of representation are examples only and are not limited to these methods. Here, X, Y, Z1, Z2 is the object (e.g., device, element, circuit, wiring, electrode, terminal, conductive film, layer, etc.) Let's assume there is.

[0342] Next, we will explain an example of the operation of pixel 5111 shown in Figure 20(A).

[0343] Figure 20(B) shows the potential of the wiring GL electrically connected to pixel 5111 shown in Figure 20(A). The timing chart of the potential of the image signal Sig supplied to wiring SL is shown as an example. The timing chart shown in Figure 20(B) is included in pixel 5111 shown in Figure 20(A). This example illustrates the case where all transistors are of the n-channel type.

[0344] First, during period t1, a high potential is applied to the wiring GL. Therefore, the transistor Transistors 5156 and 5157 are turned on. Then, the image signal S is connected to the wiring SL. The potential Vdata of ig is given, and the potential Vdata is transmitted through transistor 5156. This is then applied to the gate of transistor 5155.

[0345] Additionally, potential Vano is given to wiring VL, and potential Vcat is given to wiring CL. The potential Vano is the threshold voltage Vthe of the light-emitting element 5154 and the transient of the potential Vcat. It is preferable to make the threshold voltage Vth of the TA5155 higher than the sum of the potentials. Wiring V By creating the above potential difference between L and the wiring CL, according to the potential Vdata Then, the value of the drain current of transistor 5155 is determined. And, the drain current is The brightness of the light-emitting element 5154 is determined by the amount of light supplied to it.

[0346] Furthermore, if the transistor 5155 is an n-channel type, the potential of the wiring ML during period t1 is However, the potential obtained by adding the threshold voltage Vthe of the light-emitting element 5154 to the potential of the wiring CL is lower The potential of wiring VL is equal to the potential of wiring ML, and the threshold voltage Vth of transistor 5155 is equal to the potential of wiring ML. It is preferable that the potential is higher than the added potential. With the above configuration, transistor 5157 turns on. However, the drain current of transistor 5155 is controlled by the wiring M, not the light-emitting element 5154. It can be prioritized for flow to the left (L) channel.

[0347] Next, during period t2, a low potential is applied to the wiring GL. Therefore, the transistor Transistors 5156 and 5157 turn off. Transistor 5156 turns off. As a result, the potential Vdata is maintained at the gate of transistor 5155. The potential Vano is given to wiring VL, and the potential Vcat is given to wiring CL. Therefore The light-emitting element 5154 emits light according to a predetermined brightness during period t1.

[0348] Next, during period t3, a high potential is applied to the wiring GL. Therefore, the transistor 5156 and transistor 5157 are turned on. Also, the wiring SL has a transistor A potential is applied such that the gate voltage of the 5155 becomes greater than the threshold voltage Vth. Furthermore, a potential Vcat is applied to wiring CL. And the potential of wiring ML is the same as that of wiring CL. The potential becomes lower than the potential obtained by adding the threshold voltage Vthe of the light-emitting element 5154 to the potential, and the wiring V The potential of L is obtained by adding the threshold voltage Vth of transistor 5155 to the potential of wiring ML. It will be higher than the position. With the above configuration, the drain current of transistor 5155 is the light-emitting element. It can be prioritized for routing to the ML wiring instead of 5154.

[0349] The drain current of transistor 5155 is then supplied to the monitor circuit via wiring ML. The monitor circuit uses the drain current flowing through wiring ML to determine the drain current. A signal containing a value as information is generated. And, in a light-emitting device according to one aspect of the present invention, The signal is used to correct the value of the potential Vdata of the image signal Sig supplied to pixel 5111. It is possible.

[0350] In the light-emitting device having pixels 5111 as shown in Figure 20(A), after the operation during period t2, The operation in interval t3 does not need to be performed. For example, in pixel 5111, from period t1 to period t Alternatively, the operation in step 2 may be repeated multiple times before the operation in period t3 is performed. After performing the operation for period t3 at pixel 5111, the image signal corresponding to the minimum grayscale value of 0 By writing this to the pixel 5111 of the row where the operation was performed, the light-emitting element 5154 is de-illuminated. After achieving this state, you can perform the operation for period t3 at pixel 5111 in the next row. stomach.

[0351] <Modified example of a light-emitting device 2> Also, for example, Figure 21(A) shows an example of a pixel circuit. Here, one pixel This example uses four n-channel transistors and one capacitive element.

[0352] Figure 21(A) shows an example of the circuit diagram for pixel 5211. Pixel 5211 is a transistor 5 215, transistor 5216, transistor 5217, capacitive element 5218, It has an optical element 5214 and a transistor 5219.

[0353] The pixel electrodes of the light-emitting element 5214 react according to the image signal Sig input to the pixel 5211. The potential is controlled. Also, the brightness of the light-emitting element 5214 is controlled by the potential difference between the pixel electrode and the common electrode. It is determined by [something].

[0354] Transistor 5219 has a conductive state between wiring SL and the gate of transistor 5215. It has the function of controlling the source and drain of transistor 5215. It is connected to the anode of the optical element 5214. Transistor 5216 is connected to wiring VL and It has the function of controlling the conductivity between the source and the other drain of the ZISTA 5215. Transistor 5217 is connected to the ML wiring and the source and drain of transistor 5215. It has the function of controlling the conductivity state between the other and one of the pair of electrodes of the capacitive element 5218. One end is connected to the gate of transistor 5215, and the other end is connected to the anode of light-emitting element 5214. It continues.

[0355] Furthermore, the switching of transistor 5219 is connected to the gate of transistor 5219. The switching of the transistor 5216 is performed according to the potential of the wiring GLa. This is done according to the potential of the wiring GLb connected to the gate of transistor 5216. The switching of transistor 5217 is done by the wiring connected to the gate of transistor 5217. This is performed according to the potential of GLc.

[0356] Note that transistors 5215, 5216, 5217 and By using the aforementioned transistor 150 or the like in at least one of the transistors 5219... This is possible. Also, the capacitive element 5218 can use the capacitive element 160 mentioned above. Cut.

[0357] Next, we will explain an example of external correction operation for pixel 5211 shown in Figure 21(A).

[0358] Figure 21(B) shows wiring GLa and wiring GLB connected to pixel 5211 as shown in Figure 21(A). The timing chart of the potential of wiring GLc and the potential of the image signal Sig supplied to wiring SL An example is shown. Note that the timing chart shown in Figure 21(B) is the same as the drawing shown in Figure 21(A). This example illustrates the case where all transistors included in the 5211 are of the n-channel type. .

[0359] First, during period t1, a high level potential is applied to wiring GLa, and a high level potential is applied to wiring GLB. A potential is applied, and a low-level potential is applied to the wiring GLc. Therefore, the transistor Transistors 5219 and 5216 are turned on, and transistor 5217 is turned off. And the potential Vdata of the image signal Sig is given to the wiring SL, and the potential V The data is supplied to the gate of transistor 5215 via transistor 5219. .

[0360] Additionally, potential Vano is given to wiring VL, and potential Vcat is given to wiring CL. The potential Vano is calculated by adding the threshold voltage Vthe of the light-emitting element 5214 to the potential Vcat. It is preferable to make it higher than the position. The potential Vano of the wiring VL is transistor 5216 It is then supplied to the source and the other drain of transistor 5215. The value of the drain current of transistor 5215 is determined according to position Vdata. Then, the drain current is supplied to the light-emitting element 5214, causing the light-emitting element 5214 to shine. A degree is set.

[0361] Next, during period t2, a low potential is applied to wiring GLa and a high potential is applied to wiring GLB. A potential is applied, and a low-level potential is applied to the wiring GLc. Therefore, the transistor Transistor 5216 turns on, and transistors 5219 and 5217 turn off. Yes. When transistor 5219 turns off, the gate of transistor 5215 becomes The potential Vdata is maintained. Also, the potential Vano is given to wiring VL, and wiring C A potential Vcat is applied to L. Therefore, in the light-emitting element 5214, during period t1, The set brightness is maintained.

[0362] Next, during period t3, a low potential is applied to wiring GLa and wiring GLB. A potential is applied, and a high-level potential is applied to the wiring GLc. Therefore, the transistor Transistor 5217 turns on, and transistors 5219 and 5216 turn off. Furthermore, a potential Vcat is applied to wiring CL. And a potential Vano is applied to wiring ML. It is provided and connected to a monitor circuit.

[0363] As a result of the above operation, the drain current of transistor 5215 is transmitted through transistor 5217. This is supplied to wiring ML. Furthermore, the drain current is monitored via wiring ML. It is also supplied to the circuit. The monitor circuit uses the drain current that flows through wiring ML to determine the drain A signal is generated that includes the value of the rain current as information. And, a light-emitting device according to one aspect of the present invention In this configuration, the potential Vdata of the image signal Sig supplied to pixel 5211 is determined using the above signal. The value can be corrected.

[0364] In the light-emitting device having pixel 5211 shown in Figure 21(A), after the operation during period t2, The operation in interval t3 does not need to be performed. For example, in a light-emitting device, from period t1 to period t2 The operation may be repeated multiple times before the operation for period t3 is performed. After performing the operation for period t3 in element 5211, the image signal corresponding to the minimum grayscale value of 0 is By writing to the pixel 5211 of the row in which the operation was performed, the light-emitting element 5214 is set to a non-emitting state. After setting the state, the operation for period t3 may be performed at pixel 5211 of the next row.

[0365] <Modified example of a light-emitting device 3> Also, for example, Figure 22(A) shows an example of a pixel circuit. Here, one pixel This example uses five n-channel transistors and one capacitive element.

[0366] Figure 22(A) shows an example of the circuit diagram for pixel 5311. Pixel 5311 shown in Figure 22(A) This includes transistor 5315, transistor 5316, transistor 5317, and capacitance Element 5318, light-emitting element 5314, transistor 5319, and transistor 5320 It has, and

[0367] Transistor 5320 controls the conductivity between wiring RL and the anode of light-emitting element 5314. It has the function of connecting the wiring SL and the gateway of transistor 5315. Transistor 5319 connects the wiring SL and transistor 5315. It has the function of controlling the conductivity state between the source and the terminal. Transistor 5315 has the function of controlling the conductivity state between the source and the terminal. One end of the rain is connected to the anode of the light-emitting element 5314. Transistor 5316 is Control the conduction state between wiring VL and the other side of the source and drain of transistor 5315. It has the function of controlling. Transistor 5317 is connected to wiring ML and transistor 5315. Capacitive element 5318 has the function of controlling the conductivity between the drain and the other. Of the pair of electrodes, one is connected to the gate of transistor 5315, and the other is connected to the light-emitting element. It is connected to the anode of 5314.

[0368] Furthermore, the switching of transistor 5319 is connected to the gate of transistor 5319. The switching of transistor 5316 is performed according to the potential of the wiring GLa. This is done according to the potential of the wiring GLb connected to the gate of transistor 5316. The switching of transistor 5317 is done by the wiring connected to the gate of transistor 5317. This is done according to the potential of GLc. The switching of transistor 5320 is performed by the transistor This is done according to the potential of the wiring GLd connected to the gate of ST5320.

[0369] Note that transistors 5315, 5316, 5317, and At least one of the transistors 5319 and 5320 has the above-mentioned transistor TA150 and the like can be used. Also, the capacitive element 5318 is the same as the capacitive element 16 mentioned above. You can use 0, etc.

[0370] Next, we will explain an example of external correction operation for pixel 5311 shown in Figure 22(A).

[0371] Figure 22(B) shows wiring GLa and wiring GLB connected to pixel 5311 as shown in Figure 22(A). The potentials of wiring GLc and GLd, and the potential of the image signal Sig supplied to wiring SL. An example of a timing chart is shown. Note that the timing chart shown in Figure 22(B) is the same as in Figure 22( This example illustrates the case where all transistors included in pixel 5311 shown in A) are of the n-channel type. It is.

[0372] First, during period t1, a high level potential is applied to wiring GLa, and a high level potential is applied to wiring GLB. A potential is applied to the wire GLc, a low-level potential is applied to the wire GLd, and a high-level potential is applied to the wire GLd. A potential is applied. Therefore, transistors 5319, 5316, and Transistor 5320 turns on, and transistor 5317 turns off. Also, wiring S L is given the potential Vdata of the image signal Sig, and the potential Vdata is a transistor The potential Vd is applied to the gate of transistor 5315 via zista 5319. According to ATA, the drain current value of transistor 5315 is determined. Then, Since the potential Vano is given to wiring VL and the potential V1 is given to wiring RL, The rain current is transmitted through transistors 5316 and 5320 to wiring VL and It flows between the R and L wires.

[0373] The potential Vano is calculated by adding the threshold voltage Vthe of the light-emitting element 5314 to the potential Vcat. It is preferable to make it higher than the position. The potential Vano of the wiring VL is transistor 5316 It is supplied to the source and drain of transistor 5315 via the other. The potential V1 applied to RL is transmitted through transistor 5320 to transistor 5315. The potential Vcat is applied to either the drain or the outlet. The potential Vcat is applied to the wiring CL.

[0374] Note that potential V1 is calculated by subtracting the threshold voltage Vth of transistor 5315 from potential V0. It is preferable that the potential is sufficiently lower than the potential. During period t1, the potential V1 is lowered from the potential Vcat. It can be made sufficiently lower than the potential obtained by subtracting the threshold voltage Vthe of the light-emitting element 5314. Therefore, the light-emitting element 5314 does not emit light.

[0375] Next, during period t2, a low potential is applied to wiring GLa and a high potential is applied to wiring GLB. A low potential is applied to the wiring GLc, and a low potential is applied to the wiring GLd. A potential is applied. Therefore, transistor 5316 turns on, and transistor 53 19. Transistors 5317 and 5320 turn off. Transistor 5 When 319 is turned off, the potential Vdata at the gate of transistor 5315 is It is retained.

[0376] Additionally, potential Vano is given to wiring VL, and potential Vcat is given to wiring CL. Therefore, the drain current of transistor 5315, whose value was determined during period t1, is When the inverter 5320 is turned off, power is supplied to the light-emitting element 5314. When the drain current is supplied to the child 5314, the brightness of the light-emitting element 5314 is determined. The brightness is maintained during period t2.

[0377] Next, during period t3, a low potential is applied to wiring GLa and wiring GLB. A potential is applied to the wire GLc, a high-level potential is applied to the wire GLd, and a low-level potential is applied to the wire GLd. A potential is applied. Therefore, transistor 5317 turns on, and transistor 53 19. Transistors 5316 and 5320 are turned off. Also, wiring CL A potential Vcat is given to it. And a potential Vano is given to the wiring ML, and furthermore It is connected to the monitor circuit.

[0378] As a result of the above operation, the drain current of transistor 5315 is transmitted through transistor 5317. This is supplied to wiring ML. Furthermore, the drain current is monitored via wiring ML. It is also supplied to the circuit. The monitor circuit uses the drain current that flows through wiring ML to determine the drain A signal is generated that includes the value of the rain current as information. And, a light-emitting device according to one aspect of the present invention In this configuration, the potential Vdata of the image signal Sig supplied to pixel 5311 is determined using the above signal. The value can be corrected.

[0379] In the light-emitting device having pixel 5311 shown in Figure 22(A), after the operation during period t2, The operation in interval t3 does not need to be performed. For example, in a light-emitting device, from period t1 to period t2 The operation may be repeated multiple times before the operation for period t3 is performed. After performing the operation for period t3 in element 5311, the image signal corresponding to the minimum grayscale value of 0 is By writing to the pixel 5311 of the row in which the operation was performed, the light-emitting element 5314 is set to a non-emitting state. After setting the state, the operation for period t3 may be performed at pixel 5311 of the next row.

[0380] Furthermore, in the pixel 5311 shown in Figure 22(A), light emission is lost due to deterioration of the light-emitting element 5314, etc. Even if the resistance between the anode and cathode of element 5314 varies between pixels, the potential Vdata can be transmitted When applying power to the gate of transistor 5315, the potential of the source of transistor 5315 is set to a predetermined voltage. It can be set to position V1. Therefore, the brightness of the light-emitting element 5314 varies between pixels. This can prevent the formation of a frost.

[0381] <Modified example of a light-emitting device 4> Also, for example, Figure 23(A) shows an example of a pixel circuit. Here, one pixel This example uses six n-channel transistors and one capacitive element.

[0382] Figure 23(A) shows an example of the circuit diagram for pixel 5411. Pixel 5411 is a transistor 5 415, transistor 5416, transistor 5417, capacitive element 5418, Optical element 5414, transistor 5440, transistor 5441, transistor 5 It has 442 and

[0383] The pixel electrodes of the light-emitting element 5414 move according to the image signal Sig input to the pixel 5411. The potential is controlled. Also, the brightness of the light-emitting element 5414 is controlled by the potential difference between the pixel electrode and the common electrode. It is determined by [something].

[0384] Transistor 5440 is connected to the wiring SL and one of the pair of electrodes of the capacitive element 5418. It has a function to control the conductivity state between them. The other of the pair of electrodes of the capacitive element 5418 is One of the sources and drains of transistor 5415 is connected. Transistor 541 6 has the function of controlling the conduction state between wiring VL1 and the gate of transistor 5415. It has. Transistor 5441 connects with one of the pair of electrodes of capacitive element 5418 and Transistor 5415 has the function of controlling the conduction state between the gate and the transistor 5415. 42 is the source and drain of transistor 5415 and the positive terminal of light-emitting element 5414. It has the function of controlling the conductivity state between the poles. Transistor 5417 is transistor 5 It has the function of controlling the conductivity between one of the source and drain of the 415 and the wiring ML. do.

[0385] Furthermore, in Figure 23(A), the source and drain of transistor 5415 are wired together. It is connected to VL.

[0386] Furthermore, the on or off selection of transistor 5440 is This is done according to the potential of the wiring GLa connected to the gate. The on or off selection is made by the wiring GLa connected to the gate of transistor 5416. This is done according to the potential. The on or off selection in transistor 5441 is performed by This is done according to the potential of the wiring GLb connected to the gate of transistor 5441. The on or off selection in transistor 5442 is made by contacting the gate of transistor 5442. This is done according to the potential of the connected wiring GLB. The ON state of transistor 5417 Alternatively, the OFF option was set to the potential of the wiring GLc connected to the gate of transistor 5417. It will be carried out by [the organization / group].

[0387] Figure 23(B) shows wiring GLa and wiring GLB connected to pixel 5411 as shown in Figure 23(A). The timing chart of the potential of wiring GLc and the potential of the image signal Sig supplied to wiring SL An example is shown. Note that the timing chart shown in Figure 23(B) is the same as the drawing shown in Figure 23(A). This example illustrates the case where all transistors included in the 5411 are of the n-channel type. .

[0388] First, during period t1, a low potential is applied to wiring GLa, and a high potential is applied to wiring GLB. A potential is applied, and a high-level potential is applied to the wiring GLc. Therefore, the transistor Transistors 5441, 5442, and 5417 are turned on, Transistors 5440 and 5416 are turned off. Transistors 5442 and When transistor 5417 is turned on, the source and drain of transistor 5415 are activated. One of the electrodes and the other of the pair of electrodes of the capacitive element 5418 (shown as node A in the diagram). The potential V0 of the wiring ML is then applied.

[0389] Additionally, potential Vano is given to wiring VL, and potential Vcat is given to wiring CL. The potential Vano is the potential obtained by adding the threshold voltage Vthe of the light-emitting element 5414 to the potential V0. It is preferable to make the potential V0 higher. Also, the potential V0 is the same as the potential Vcat of the light-emitting element 5414. It is preferable that the potential V0 is lower than the potential obtained by adding the key voltage Vthe. By doing so, it is possible to prevent current from flowing to the light-emitting element 5414 during period t1. .

[0390] Next, a low potential is applied to the wiring GLb, causing transistor 5441 and Transistor 5442 is turned off, and node A is held at potential V0.

[0391] Next, during period t2, a high potential is applied to wiring GLa and a low potential is applied to wiring GLB. A potential is applied, and a low-level potential is applied to the wiring GLc. Therefore, the transistor Transistor 5440 and transistor 5416 are turned on, and transistor 5441, Tube 5442 and transistor 5417 are turned off.

[0392] Furthermore, when transitioning from period t1 to period t2, the potential applied to the wiring GLa is changed from a low level to a high level. After switching to the low level, the potential applied to the wiring GLc is switched from high level to low level. It is preferable to replace it. By performing this operation, the power supplied to the wiring GLa This prevents fluctuations in the potential of node A due to positional switching.

[0393] Additionally, potential Vano is given to wiring VL, and potential Vcat is given to wiring CL. Then, the potential Vdata of the image signal Sig is applied to wiring SL, and the potential VL1 is applied to wiring VL1. A voltage V1 is given. The potential V1 is the threshold voltage V of transistor 5415 at potential Vcat. The threshold voltage V of transistor 5415 is higher than the potential obtained by adding th, and the potential Vano is higher than the threshold voltage V It is preferable that the potential is lower than the potential obtained by adding th.

[0394] In the pixel configuration shown in Figure 23(A), the potential V1 is the threshold voltage of the light-emitting element 5414. Even if Vthe is set higher than the sum of the potential Vcat, transistor 5442 remains off. As long as this is the case, the light-emitting element 5414 will not emit light. Therefore, the range of values ​​that can be set as potential V0 is This allows for a wider range of possible values ​​for V1-V0. Therefore, the degree of freedom in setting the values ​​of V1-V0 increases, the structure of transistor 5415 If the time required to acquire the threshold voltage is shortened, or if there is a limit to the threshold voltage acquisition period, Even in such cases, it is possible to accurately obtain the threshold voltage of transistor 5415. ru.

[0395] As a result of the above operation, a noon occurs at the gate of transistor 5415 (shown as node B in the diagram). A potential V1 higher than the potential obtained by adding the threshold voltage to the potential of A is input, and the transistor Transistor 5415 turns on. Therefore, the power of the capacitive element 5418 is transmitted through transistor 5415. The load is released, and the potential of node A, which was V0, begins to rise. And finally, The potential of A converges to V1-Vth, and the gate voltage of transistor 5415 reaches the threshold voltage. When the signal converges to Vth, transistor 5415 turns off.

[0396] Furthermore, one of the pair of electrodes of the capacitive element 5418 (shown as node C in the diagram) The potential Vdata of the image signal Sig applied to the wiring SL is transmitted via transistor 5440. It is given.

[0397] Next, during period t3, a low potential is applied to wiring GLa and a high potential is applied to wiring GLB. A potential is applied, and a low-level potential is applied to the wiring GLc. Therefore, the transistor Transistors 5441 and 5442 turn on, and transistors 5440 and 5442 turn on. Tube 5416 and transistor 5417 are turned off.

[0398] Furthermore, when transitioning from period t2 to period t3, the potential applied to the wiring GLa changes from high level to low level. - After switching to level, the potential applied to the wiring GLB is changed from low level to high level. Switching is preferable. With the above configuration, the potential applied to the wiring GLa is switched. This prevents potential fluctuations at node A.

[0399] Additionally, potential Vano is given to wiring VL, and potential Vcat is given to wiring CL.

[0400] As a result of the above operation, a potential Vdata is applied to node B, and therefore transistor 5415 The gate voltage becomes Vdata - V1 + Vth. Therefore, the gate of transistor 5415 The voltage can be set to a value that takes into account the threshold voltage Vth. With the above configuration, This can suppress variations in the threshold voltage Vth of transistor 5415. This suppresses variations in the current value supplied to the light-emitting element 5414, and reduces the brightness of the light-emitting device. This can reduce the amount of noise.

[0401] Furthermore, by increasing the potential fluctuation applied to the wiring GLB, the transistor 5442 This prevents variations in threshold voltage from affecting the current supplied to the light-emitting element 5414. This is possible. In other words, the high level potential applied to the wiring GLB is controlled by transistor 5442. The voltage is sufficiently greater than the threshold voltage, and the low-level potential applied to the wiring GLB is transient. By making it sufficiently smaller than the threshold voltage of transistor 5442, the transistor 5442 Ensure reliable on / off switching and minimize variations in the threshold voltage of transistor 5442. This prevents the current value of the light-emitting element 5414 from being affected.

[0402] Next, during period t4, a low potential is applied to wiring GLa and wiring GLB. A potential is applied, and a high-level potential is applied to the wiring GLc. Therefore, the transistor Transistor 5417 turns on, and transistors 5416, 5440, and Transistors 5441 and 5442 are turned off.

[0403] Additionally, a potential Vano is applied to wiring VL, and wiring ML is connected to the monitor circuit.

[0404] As a result of the above operation, the drain current Id of transistor 5415 is not at the light-emitting element 5414. The current flows through transistor 5417 to wiring ML. The monitor circuit flows to wiring ML. Using the drain current Id, a signal is generated that includes the value of the drain current Id as information. This drain current Id is related to the mobility of transistor 5415 and the The size depends on the dimensions (channel length, channel width), etc. And, in this invention... In one embodiment of the light-emitting device, the above signal is used to supply the image signal S to the pixel 5411. The value of the ig potential Vdata can be corrected. In other words, the transistor 5415 This can reduce the impact of variations in mobility.

[0405] In the light-emitting device having pixel 5411 as shown in Figure 23(A), after the operation of period t3, The operation in interval t4 does not need to be performed. For example, in a light-emitting device, from period t1 to period t3 The operation may be repeated multiple times before the operation for period t4 is performed. After performing the operation for period t4 in sub-5411, the image signal corresponding to the minimum grayscale value of 0 is By writing to the pixel 5411 of the row in which the operation was performed, the light-emitting element 5414 is set to a non-emitting state. After setting the state, the operation for period t4 may be performed at pixel 5411 of the next row.

[0406] In the light-emitting device having pixel 5411 shown in Figure 23(A), the soaring of transistor 5415 The other end of the drain and the gate of transistor 5415 are electrically isolated. Therefore, each potential can be controlled individually. Thus, during period t2, The potential of the source and the other drain of transistor 5415 is the gate of transistor 5415. The potential can be set to a value higher than the potential obtained by adding the threshold voltage Vth to the potential. Therefore, when transistor 5415 is normally on, i.e., the threshold voltage Vt When h has a negative value, the source potential in transistor 5415 is The capacitive element 5418 can store charge until it becomes higher than the gate potential V1. Therefore, in a light-emitting device according to one aspect of the present invention, transistor 5415 is normally ion Even if it exists, the threshold voltage Vth can be obtained in period t2, and in period t3 Then, the gate voltage can be set according to the acquired threshold voltage Vth.

[0407] Therefore, in a light-emitting device according to one aspect of the present invention, transistor 5415 is normally on Even so, it can reduce display unevenness and provide high-quality display.

[0408] Furthermore, in addition to the characteristics of transistor 5415, the characteristics of light-emitting element 5414 are also monitored. This is also good. In this case, by controlling the potential of the image signal Sig, Vdata, It is preferable to prevent current from flowing through transistor 5415. The current from the light-emitting element 5414 can be extracted. As a result, the current from the light-emitting element 5414 It is possible to obtain information on the degradation and variability of characteristics.

[0409] For example, in this specification, etc., display element, display device which is a device having a display element, light-emitting element A light-emitting device, which is a device having a sub-element and a light-emitting element, can be used in various forms or It can have various elements. Display elements, display devices, light-emitting elements, or light-emitting devices are, for example, EL elements (EL elements including organic and inorganic materials, organic EL elements, inorganic EL elements), L LEDs (white LEDs, red LEDs, green LEDs, blue LEDs, etc.), transistors (for current) Transistors that emit light accordingly, electron emission elements, liquid crystal elements, electronic inks, electrophoretic elements, Grating light bulbs (GLV), plasma display panels (PDP), ME Display elements using MS (Micro-Electro-Mechanical Systems), Digital Micro Chromilar device (DMD), DMS (Digital Microshutter), IMOD (Interference Modulation) element, shutter-type MEMS display element Optical interference type MEMS display elements, electrowetting elements, piezoelectric ceramic elements It has at least one of the following: a spray, a display element using carbon nanotubes, etc. In addition to these, electrical or magnetic effects can also affect contrast, brightness, reflectance, and transmission. It may have a display medium in which rates, etc., change. Examples include EL displays. One example of a display device using an electron-emitting element is a FI Folded Emission Display (FED) or SED Flat Panel Display (SE D:Surface-conduction Electron-emitter Di Examples include (splay). An example of a display device using liquid crystal elements is a liquid crystal display. (Transmissive liquid crystal display, semi-transmissive liquid crystal display, reflective liquid crystal display, direct viewing) Examples include liquid crystal displays (LCDs), projection liquid crystal displays, etc. Electronic ink or electrophoresis Examples of display devices using elements include electronic paper. Semitransmissive liquid crystal displays When realizing a display or reflective liquid crystal display, some or all of the pixel electrodes The solution is to make it function as a reflective electrode. For example, part or all of the pixel electrodes. However, it is sufficient to have aluminum, silver, etc. Furthermore, in that case, below the reflecting electrode It is also possible to incorporate memory circuits such as SRAM. This further reduces power consumption. It can be reduced.

[0410] Furthermore, white light (W) is used for backlighting (organic EL elements, inorganic EL elements, LEDs, fluorescent lamps, etc.). In order to display a display device in full color using a color layer (also called a color filter), .) may be used. The colored layer may be, for example, red (R), green (G), and blue (B). Yellow (Y) and other colors can be used in appropriate combinations. By using a colored layer, Compared to not using a colored layer, the color reproduction can be improved. In this case, the colored layer By arranging regions that have a colored layer and regions that do not have a colored layer, the region that does not have a colored layer White light in the area may be used directly for display. A portion of the area may be placed without a colored layer. This reduces the decrease in brightness caused by the colored layer when displaying bright content, and reduces power consumption by 20%. In some cases, this can be reduced by about 30%. However, this is not possible with self-emissive elements such as organic EL elements and inorganic EL elements. When using elements for full-color display, R, G, B, Y, and W are used, each having its own emitted color. It is also acceptable to emit light from an element. By using an element that emits light, it is possible to achieve better results than when using a colored layer. In some cases, power consumption can be reduced even further.

[0411] <Pixel structure of a light-emitting device> The following describes an example of the pixel structure of a light-emitting device according to one aspect of the present invention.

[0412] Figure 24(A) shows multiple transistors 500 (also referred to as FETs) on the substrate 502. A structure is formed, and each transistor 500 is a light-emitting element (5) included in the pixels of the light-emitting device. It is electrically connected to 04R, 504G, 504B, and 504W. Specifically, each The transistor 500 is electrically connected to the conductor 506 of the light-emitting element. The light-emitting element is composed of a conductor 506, a conductor 507, a light-emitting layer 510, and a conductor 512. This is accomplished. Furthermore, it is not necessary for each light-emitting element to have a 504W light-emitting element. Figure 24(B) is an enlarged cross-sectional view of region 520 in Figure 24(A).

[0413] Furthermore, each light-emitting element has a colored layer (514R, 514G, 514B, 514W) They are arranged in this manner. Note that in Figure 24(A), the colored layer is provided on the substrate 516. Although shown, the structure is not limited to this. For example, if the colored layer is provided on the substrate 502 In some cases, this may be acceptable. Also, a sealing film 518 is placed between substrate 502 and substrate 516. The sealing film 518 can be, for example, glass frit or a two-component resin. Curing resins that harden at room temperature, photocurable resins, thermosetting resins, etc. can be used. Cut.

[0414] Furthermore, between adjacent light-emitting elements, there is a space that covers the ends of the conductors 506 and 507. A wall 508 is provided. A spacer 509 is also provided on the partition wall 508. Furthermore, the conductor 506 functions as a region that acts as a reflective electrode and as the anode of the light-emitting element. It has a region that can perform this function. In addition, the conductor 507 is a region that contributes to adjusting the optical path length of each light-emitting element. It has a luminescent layer 510 formed on the conductor 507, and on the luminescent layer 510 A conductor 512 is formed therein. Furthermore, the conductor 512 is a semi-transparent, semi-reflective electrode. It has a region that functions as a light-emitting element and a region that functions as the cathode of the light-emitting element. Also, spacer 5 09 is positioned between the light-emitting element and the colored layer.

[0415] Furthermore, the light-emitting layer 510 may be common to each light-emitting element. However, if the light-emitting layer 510 is common to each The light-emitting elements may differ. Note that each light-emitting element is composed of conductor 506 and conductor 512. This is a tiny optical resonator (also called a microcavity) that resonates the light emitted from the light-emitting layer 510. It has a structure that allows it to narrow and extract light of different wavelengths even if it has the same light-emitting layer 510. Specifically, each light-emitting element is provided below the light-emitting layer 510, with a conductor 5 By adjusting the thickness of each of the 07, the spectrum obtained from the light-emitting layer 510 can be adjusted. The desired emission spectrum can be obtained, and emission with high color purity can be obtained. Therefore, Figure 24( By adopting the configuration shown in A), for example, the painting process becomes unnecessary, and high resolution can be achieved. It may become easier to express. However, the light-emitting device according to one aspect of the present invention is each light It is also acceptable to fabricate the device by painting different light-emitting layers on each element.

[0416] Furthermore, the light-emitting device shown in Figure 24(A) has a narrowed shape due to the microcavity structure. By passing light of a certain wavelength through a colored layer, the wavelength is further narrowed, and the desired emission spectrum is achieved. This configuration only ejects the duct. Therefore, the microcavity structure and the colored layer By combining them, it is possible to obtain light emission with even higher color purity. Specifically, the light-emitting element Child 504R has an optical path length of the light-emitting element adjusted so that red light emission is obtained, and the colored layer 5 Red light is emitted in the direction of the arrow through 14R. Also, light-emitting element 504G emits green light. The optical path length of the light-emitting element is adjusted so that light is obtained, passing through the colored layer 514G as indicated by the arrow. Green light is emitted in that direction. In addition, the light-emitting element 504B emits blue light. The optical path length of the optical element is adjusted, and blue light is emitted in the direction of the arrow through the colored layer 514B. Furthermore, the optical path length of the light-emitting element 504W is adjusted so that white light emission can be obtained. The device is configured to emit white light in the direction of the arrow through the colored layer 514W.

[0417] However, the method for adjusting the optical path length of each light-emitting element is not limited to this. In the device, the optical path length may be adjusted by adjusting the thickness of the light-emitting layer 510.

[0418] Furthermore, the colored layers (514R, 514G, 514B) transmit light in a specific wavelength range. It is sufficient that it has the function of transmitting light in the red wavelength band, for example, a red (R) colored layer. A green (G) colored layer that transmits light in the green wavelength range, and a blue colored layer that transmits light in the blue wavelength range. A colored layer of color (B) can be used. Also, as the colored layer 514W, for example, Acrylic resin materials that do not contain pigments, etc., can be used. Also, a colored layer 514W is available. It's not necessary. The colored layer is created using printing, inkjet, or photolithography processes. The desired shape can be formed by methods such as those described above.

[0419] Examples of conductive material 506 include those with high reflectivity (visible light reflectivity of 40% to 100%). Below, preferably 70% to 100% (metal can be used). Conductor 506 For example, aluminum, silver, or alloys containing these metallic materials (e.g., silver and palladium) The alloy of copper and luminescent material can be used in a single layer or in multiple layers.

[0420] Furthermore, the conductor 507 can be formed using, for example, a conductive metal oxide. Examples of conductive metal oxides include indium oxide, tin oxide, zinc oxide, and indium tin oxide. Oxides, indium zinc oxide, or these metal oxides with silicon or tungsten A material containing tents can be used. By providing the conductive material 507, the shape can be changed later. The formation of an insulator between the light-emitting layer 510 and the conductor 506 is suppressed. Therefore, it is preferable. Also, a conductive material used as the conductive material 507 is placed in the layer below the conductive material 506. A metal oxide may be formed.

[0421] Furthermore, the conductor 512 includes a conductive material having reflectivity and a conductive material having light transmission. Formed by, with a visible light reflectance of 20% to 80%, preferably 40% to 70%. The following is preferable: The conductor 512 may be, for example, silver, magnesium, or the same. A thin layer (for example, 1 nm to 10 nm) of alloy containing these metal materials is formed, and then, A conductive metal oxide that can be used as the conductor 507 should be formed.

[0422] In the configuration described above, the structure for extracting light on the substrate 516 side (top emission This is a light-emitting device with a (single-layer structure), but the light is directed towards the substrate 501 on which the transistor 500 is formed. Extraction structure (bottom emission structure), or both substrate 501 and substrate 516 It may also be used as a light-emitting device with a structure that extracts light (dual emission structure). Bottom emitter In the case of a conductive structure, for example, the colored layer (514R, 514G, 514B, 514W) is conductive. The configuration should be formed below the body 506. Furthermore, the substrate on the light-emitting side should be translucent. A substrate can be used, and the substrate on the side that does not emit light can be a light-transmitting substrate and a light-shielding substrate. You can use it.

[0423] <module> In the following section, a display module using a semiconductor device according to one aspect of the present invention is shown in Figure 25. We will use this to provide an explanation.

[0424] The display module 8000 shown in Figure 25 consists of an upper cover 8001 and a lower cover 8002. In between, the touch panel 8004 is connected to the FPC8003, and the FPC8005 is connected to the touch panel 8004. Cell 8006, backlight unit 8007, frame 8009, printed circuit board 801 0, has battery 8011. Note that backlight unit 8007, battery 8 It may not have features such as 011 or the touch panel 8004.

[0425] A semiconductor device according to one aspect of the present invention can be used, for example, as cell 8006.

[0426] The upper cover 8001 and the lower cover 8002 are the touch panel 8004 and cell 80 The shape and dimensions can be appropriately modified to match the size of 06.

[0427] The touch panel 8004 uses a resistive or capacitive touch panel, and cell 8006 It can be used by superimposing it on the other substrate. Also, touch the opposing substrate (encapsulating substrate) of cell 8006. It is also possible to incorporate panel functionality. Alternatively, within each pixel of cell 8006... It is also possible to incorporate an optical sensor and use an optical touch panel. Alternatively, Cell 800 By providing touch sensor electrodes within each of the six pixels, it is also possible to create a capacitive touch panel. It is possible.

[0428] The backlight unit 8007 has a light source 8008. The light source 8008 is used as the backlight. A configuration using a light-diffusing plate, which is provided at the end of unit 8007, may also be used.

[0429] Frame 8009 provides protection for cell 8006, as well as the operation of printed circuit board 8010. It may also function as an electromagnetic shield to block the generated electromagnetic waves. The Mu8009 may also function as a heat sink.

[0430] The printed circuit board 8010 is a power supply circuit and a signal for outputting video and clock signals. It has a power processing circuit. The power supply that provides power to the power supply circuit is an external commercial power supply. Alternatively, a power source provided separately by battery 8011 may be used. In that case, it is not necessary to have battery 8011.

[0431] Furthermore, the display module 8000 includes additional components such as polarizing plates, phase difference plates, and prism sheets. They may also be provided.

[0432] <Circuit> The following describes an example of a circuit configuration that can be realized using a semiconductor device according to one aspect of the present invention. I will reveal it.

[0433] The circuit diagram shown in Figure 26(A) is a p-channel type transistor 2200 and an n-channel type transistor. This is a so-called CMO (Continuously Multi-Motorized) configuration, where two Rangitar 2100s are connected in series, with each gate connected. This shows the configuration of the S-inverter. Note that transistors 2200 and 21 For 00, you may use the transistor 150 mentioned above.

[0434] Furthermore, the circuit diagram shown in Figure 26(B) is for transistors 2100 and 2200. This shows a configuration where the source and drain are connected. It can function as a so-called CMOS analog switch.

[0435] A transistor according to one aspect of the present invention is used to retain stored data even when power is not supplied. Figure 27 shows an example of a semiconductor device (memory device) that can be stored and has no limit on the number of write cycles. This will be shown.

[0436] The semiconductor device shown in Figure 27(A) consists of a transistor 3200 using a first semiconductor and a second semiconductor It has a semiconductor transistor 3300 and a capacitive element 3400. The transistor 150 mentioned above can be used as the transistor 3300.

[0437] Transistor 3300 is, for example, a transistor using an oxide semiconductor. The low off-current of the STA3300 allows for long-term operation at specific nodes in semiconductor devices. It is possible to retain the contents of the memory. In other words, it does not require a refresh operation, This makes it possible to reduce the frequency of refresh operations to an extremely low level, resulting in low power consumption. It becomes a conductive device.

[0438] In Figure 27(A), the first wiring 3001 is electrically connected to the source of transistor 3200. The second wire 3002 is connected and electrically connected to the drain of transistor 3200. Furthermore, the third wire 3003 is electrically connected to one of the source and drain of transistor 3300. The fourth wire 3004 is connected to the gate of transistor 3300 and is electrically connected to the gate of transistor 3300. And the gate of transistor 3200, and the source of transistor 3300, The other end of the drain is electrically connected to one of the electrodes of the capacitive element 3400 and to the fifth wiring 30 05 is electrically connected to the other electrode of the capacitive element 3400. For value 0, the capacitive element 160 described above can be used.

[0439] The semiconductor device shown in Figure 27(A) is capable of maintaining the gate potential of transistor 3200. Having these characteristics, it is possible to write, hold, and read information as shown below. ru.

[0440] This section will explain how to write and retain information. First, the potential of the fourth wiring 3004 is set to the traction control. The potential is set so that transistor 3300 becomes conductive, and transistor 3300 becomes conductive. This causes the potential of the third wiring 3003 to be the gate of transistor 3200, and the capacitance It is supplied to node FG, which is electrically connected to one of the electrodes of the quantitative element 3400. A predetermined charge is applied (written) to the gate of the transistor 3200. Here, different A charge that gives two potential levels (hereinafter referred to as Low-level charge and High-level charge) .) is assumed to be given. Then, the potential of the fourth wiring 3004 is set to The potential is set so that the zista 3300 becomes non-conductive, thereby making the transistor 3300 non-conductive. As a result, charge is retained at node FG.

[0441] Since the off-state current of the transistor 3300 is extremely small, the charge of the node FG can be retained over a long period of time.

[0442] Next, reading of information will be described. A predetermined potential (constant potential is applied to the first wiring 3001 ; when an appropriate potential (read potential is applied to the fifth wiring 3005 in this state, the second wiring 3002 attains a potential corresponding to the amount of charge held in the node FG. This is because when the transistor 3200 is an n-channel type, the apparent threshold voltage V when a high-level charge is supplied to the gate of the transistor 3200 is th_H lower than the apparent threshold voltage V when a low-level charge is supplied to the gate of the transistor 3200 th_L . Here, the apparent threshold voltage refers to the potential of the fifth wiring 3005 that is required to bring the transistor 3200 into a "conducting state". Therefore , by setting the potential of the fifth wiring 3005 to a potential V0 between V and V th_H , th_L , the charge supplied to the node FG can be determined. For example, in writing, when a high-level charge has been supplied to the node FG , if the potential of the fifth wiring 3005 is V0 (> V ) th_H , the transistor 3200 is brought into the "conducting state". On the other hand, when a low-level charge has been supplied to the node FG , even if the potential of the fifth wiring 3005 is V0 (<V th_L ), the transistor 3200 remains in the "non-conducting state". For this reason , by determining the potential of the second wiring 3002, the information held in the node FG can be read out. ​​

[0443] Furthermore, when memory cells are arranged in an array, the information of the desired memory cell is read. The data must be read. In order to avoid reading information from other memory cells, the node Regardless of the charge applied to FG, the potential at which transistor 3200 becomes "non-conductive" , in other words, V th_H A lower potential should be applied to the fifth wiring 3005. Or, no The potential at which transistor 3200 becomes "conductive" regardless of the charge applied to FG. , in other words, V th_L A higher potential should be applied to the fifth wiring 3005.

[0444] The semiconductor device shown in Figure 27(B) is different from the one in Figure 27(A) in that it does not have transistor 3200. This is different from the semiconductor device shown. In this case, it operates similarly to the semiconductor device shown in Figure 27(A). It allows for more efficient information writing and retention.

[0445] The information readout process in the semiconductor device shown in Figure 27(B) will be explained. When terminal 3300 becomes conductive, the floating third wiring 3003 and the capacitive element 3400 The two circuits become conductive, and charge is redistributed between the third wiring 3003 and the capacitive element 3400. As a result, the potential of the third wiring 3003 changes. The amount of change in the potential of the third wiring 3003 is the capacitance. The potential of one electrode of element 3400 (or the charge accumulated in the capacitive element 3400) They take on different values.

[0446] For example, let V be the potential of one electrode of the capacitive element 3400, C be the capacitance of the capacitive element 3400, and the third The capacitance component of wiring 3003 is CB, and the charge of the third wiring 3003 before redistribution is CB If the potential is VB0, then the potential of the third wiring 3003 after the charge has been redistributed is (CB × VB0 + C × V) / (CB + C). Therefore, the state of the memory cell is the capacity element If one of the electrodes of the child 3400 takes on two states, V1 and V0 (V1 > V0), then , the potential of the third wiring 3003 when the potential V1 is maintained (=(CB×VB0+C×V 1) / (CB+C)) is the potential of the third wiring 3003 when the potential V0 is maintained (= It can be seen that this is higher than (CB × VB0 + C × V0) / (CB + C)).

[0447] Then, by comparing the potential of the third wiring 3003 with a predetermined potential, the information is read out. It is possible.

[0448] In this case, the first semiconductor is applied to the drive circuit for driving the memory cell. Using a transistor, a second semiconductor was applied to the transistor 3300. The components should be stacked and arranged on top of the drive circuit.

[0449] The semiconductor device described above is a transistor with extremely low off-current using an oxide semiconductor. By applying this, it becomes possible to retain memory content over a long period of time. In other words, LIFF Refreshing operations may become unnecessary or extremely infrequent. This enables the realization of semiconductor devices with low power consumption. Furthermore, the power supply is Even if there is no such thing (however, it is preferable that the potential is fixed), over a long period of time It is possible to retain the contents of memory.

[0450] Furthermore, since this semiconductor device does not require high voltage for writing information, element degradation does not occur. It is difficult. For example, unlike conventional non-volatile memory, the concentration of electrons on the floating gate Because electrons are not drawn in or out from the floating gate, the insulator does not deteriorate. The problem does not arise. That is, the semiconductor device according to one aspect of the present invention is a non-volatile memory Unlike the previous issue, there is no limit to the number of rewrite cycles, and the reliability of the semiconductor has dramatically improved. It is a device. Furthermore, the writing of information depends on the conductive and non-conductive states of the transistor. This allows for high-speed operation.

[0451] <RFタグ> In the following, we will use Figure 28 to describe the RF tag including the transistor or memory device mentioned above. I will explain.

[0452] An RF tag according to one aspect of the present invention has a memory circuit inside, stores information in the memory circuit, and It uses means of contact, such as wireless communication, to exchange information with the outside world. Therefore, RF tags are used for individual identification of items by reading their unique information. It can be used in systems and other applications. However, high reliability is required for these applications. Sex is required.

[0453] The configuration of an RF tag will be explained using Figure 28. Figure 28 shows an example of the configuration of an RF tag. This is a lock diagram.

[0454] As shown in Figure 28, the RF tag 800 is connected to the communicator 801 (also known as an interrogator, reader / writer, etc.). Antenna 8 receives a radio signal 803 transmitted from antenna 802 connected to ( It has 04. The RF tag 800 also has a rectifier circuit 805, a constant voltage circuit 806, and a demodulation circuit 8 It has a modulation circuit 808, a logic circuit 809, a memory circuit 810, and a ROM 811. Furthermore, the semiconductor of the transistor exhibiting rectification action included in the demodulation circuit 807 has a reverse current For example, an oxide semiconductor can be used to sufficiently suppress the reverse This suppresses the decrease in rectification due to directional current and prevents the output of the demodulation circuit from saturating. In other words, the output of the demodulation circuit can be made nearly linear with respect to the input of the demodulation circuit. Oh, the data transmission method is electromagnetic, where a pair of coils are placed facing each other and communicate through mutual induction. Coupling method, electromagnetic induction method which uses an inductive electromagnetic field for communication, radio wave method which uses radio waves for communication. These can be broadly categorized into three types. The RF tag 800 can be used in any of these methods.

[0455] Next, the configuration of each circuit will be explained. Antenna 804 is connected to the communication device 801. This is for transmitting and receiving wireless signals 803 with Tenor 802. Also, a rectifier circuit 8 05 rectifies the input AC signal generated by receiving a wireless signal with antenna 804. For example, half-wave voltage doubling rectification is performed, and the rectified signal is smoothed by a subsequent capacitive element. This is a circuit for generating the input potential. Note that the input or output side of the rectifier circuit 805 It may have a limiter circuit. A limiter circuit is a circuit that, when the amplitude of the input AC signal is large, When the generated voltage is high, control is implemented to prevent power exceeding a certain level from being input to the subsequent circuit. This is a circuit for that purpose.

[0456] The constant voltage circuit 806 generates a stable power supply voltage from the input potential and supplies it to each circuit. This is a circuit. Note that the constant voltage circuit 806 may also have an internal reset signal generation circuit. The reset signal generation circuit utilizes the stable rise of the power supply voltage to generate the logic circuit 80. This is a circuit for generating a reset signal for number 9.

[0457] The demodulation circuit 807 demodulates the input AC signal by detecting its envelope and generates a demodulated signal. This is a circuit for that purpose. Furthermore, the modulation circuit 808 responds to the data output from the antenna 804. This is a circuit for performing modulation.

[0458] Logic circuit 809 is a circuit for analyzing and processing demodulated signals. Memory circuit 810 is This is a circuit that holds the input information, and includes a row decoder, column decoder, memory area, etc. It has. Furthermore, ROM811 stores unique numbers (IDs), etc., and outputs them according to the processing. This is a circuit for that purpose.

[0459] Furthermore, the circuits described above can be selected or omitted as appropriate.

[0460] Here, the above-mentioned memory device can be used in the memory circuit 810. In one aspect of the present invention Such memory devices are suitable for RF tags because they can retain information even when the power is cut off. It is suitable. Furthermore, the storage device according to one aspect of the present invention has power required for writing data (electricity Because the pressure is lower than that of conventional non-volatile memory, the maximum reading and writing of data is lower. It is also possible to avoid differences in transmission distance. Furthermore, power shortages during data writing. This helps to prevent malfunctions or incorrect writing from occurring.

[0461] Furthermore, a storage device according to one aspect of the present invention can be used as a non-volatile memory. Therefore, it can also be applied to ROM811. In that case, the manufacturer will need to provide the ROM811. A separate command is provided for writing the data, preventing users from freely rewriting it. It is preferable to do this. After the producer writes the unique number before shipment, the product is shipped In this arrangement, instead of assigning a unique number to all manufactured RF tags, only non-defective products to be shipped are Thus, unique numbers can be assigned only, which avoids the problem that the unique numbers of products after shipment are discontinuous and facilitates customer management corresponding to products after shipment.

[0462] <Example of Use of RF Tag> Hereinafter, an example of use of the RF tag according to one aspect of the present invention will be described with reference to FIG. 29. R F tags have a wide range of applications, for example, banknotes, coins, securities, bearer bonds, certificates (such as driver's licenses and resident certificates, see FIG. 29(A)), packaging containers (such as wrapping paper and bottles, see FIG. 29(C)), recording media (such as DVDs and video tapes, see FIG. 29(B)), vehicles (such as bicycles, see FIG. 29(D)), personal belongings (such as bags and glasses), foods, plants , animals, human bodies, clothing, daily necessities, medical products including medicines and drugs, or articles such as electronic equipment (liquid crystal display devices, EL display devices, television devices, or mobile phones), or can be provided and used on shipping tags attached to articles (see FIG. 29(E) and FIG. 29(F)) and the like.

[0463] The RF tag 4000 according to one aspect of the present invention is fixed to an article by being attached to the surface or embedded therein. For example, it is embedded in paper for a book, and in a package made of organic resin, it is embedded inside the organic resin and fixed to each article. The RF tag according to one aspect of the present invention 4000 achieves small size, thin profile and light weight, so even after being fixed to an article, the design of the article itself is not impaired. In addition, for banknotes, coins, securities, bearer bonds, or certificates ​Authentication functionality can be provided to the same type of object using an RF tag 4000 according to one aspect of the present invention. This authentication function can be used to prevent counterfeiting. It can also be used for packaging containers and recording media. The present invention relates to the body, personal belongings, food products, clothing, household goods, or electronic devices, etc. By attaching RF tags 4000, the efficiency of systems such as inspection systems can be improved. This is possible. Furthermore, even vehicles can be fitted with an RF tag 4000 according to one aspect of the present invention. By attaching it, you can enhance security against theft and other crimes.

[0464] As described above, an RF tag according to one aspect of the present invention can be used for each of the above-mentioned applications. can.

[0465] <cpu> The following describes a CPU that includes semiconductor devices such as the transistors and memory devices mentioned above. I will explain.

[0466] Figure 30 is a block diagram showing an example configuration of a CPU that uses some of the transistors described above. be.

[0467] The CPU shown in Figure 30 is an ALU1191 (ALU: Arithmet) mounted on board 1190. IC logic unit, arithmetic circuit, ALU controller 1192, instruction Timing decoder 1193, interrupt controller 1194, timing controller 1195, Register 1196, Register Controller 1197, Bus Interface 1 198 (Bus I / F), rewritable ROM1199, and ROM interface It has a ROM I / F (1189). The substrate 1190 is a semiconductor substrate, SOI base A plate, glass substrate, etc. are used. ROM1199 and ROM interface 1189 are It may also be provided on a separate chip. Of course, the CPU shown in Figure 30 is a simplified representation of its configuration. This is just one example; actual CPUs have a wide variety of configurations depending on their application. For example, a configuration including the CPU or arithmetic circuit shown in Figure 30 is considered as one core, and multiple such cores are included Alternatively, the configuration may be such that each core operates in parallel. Furthermore, the CPU performs internal calculations. The number of bits that can be handled by circuits and data buses is, for example, 8 bits, 16 bits, 32 bits, 64 bits. This can be represented as a bit, etc.

[0468] Instructions input to the CPU via the bus interface 1198 are instructions The signal is input to decoder 1193, decoded, and then processed by ALU controller 1192, interface Raptor controller 1194, register controller 1197, timing controller It is entered into 1195.

[0469] ALU controller 1192, interrupt controller 1194, register controller R1197 and timing controller 1195 control various commands based on the decoded instructions. To perform the operation. Specifically, the ALU controller 1192 controls the operation of the ALU 1191. It generates a signal for that purpose. Also, the interrupt controller 1194 is the CPU programmer. During execution, interrupt requests from external input / output devices and peripheral circuits are prioritized and masked. The state is judged and processed. The register controller 1197 adds register 1196 It generates a response and reads or writes to register 1196 depending on the CPU state.

[0470] Furthermore, the timing controller 1195 is connected to the ALU 1191 and the ALU controller 119 2. Instruction decoder 1193, interrupt controller 1194, and It generates signals to control the timing of the operation of the register controller 1197. For example, The timing controller 1195 uses the reference clock signal CLK1 to determine the internal clock signal It is equipped with an internal clock generation unit that generates CLK2, and the internal clock signal CLK2 is the above It supplies power to various circuits.

[0471] In the CPU shown in Figure 30, a memory cell is located in register 1196. As 1196 memory cells, the aforementioned transistors 150, capacitive elements 160, etc. are used. It is possible.

[0472] In the CPU shown in Figure 30, the register controller 1197 receives information from the ALU 1191. Following the instructions, select the hold operation in register 1196. That is, register 11 In the memory cell of 96, data is retained by a flip-flop, or capacity Select whether to retain data using an element. Data retention using a flip-flop is If selected, power voltage is supplied to the memory cells in register 1196. If data retention in the capacitive element is selected, data rewriting to the capacitive element will not occur. This process can be performed to stop the supply of power voltage to the memory cells in register 1196. .

[0473] Figure 31 is an example of a circuit diagram of a memory element 1200 that can be used as register 1196. The memory element 1200 has a circuit 1201 in which the stored data volatilizes when the power is cut off, and Circuit 1202 that prevents data from volatilizing when disconnected, switch 1203, switch 1204 It has a logic element 1206, a capacitive element 1207, and a circuit 1220 having a selection function. Circuit 1202 consists of a capacitive element 1208, a transistor 1209, and a transistor 12 It has 10 and. The memory element 1200 may also have a diode, a resistor, if necessary. It may further include other elements such as inductors.

[0474] Here, the memory device described above can be used in circuit 1202. Memory element 1200 When the power supply voltage to is cut off, the gate of transistor 1209 in circuit 1202 is G The configuration is such that ND (0V) or a potential that turns off transistor 1209 is continuously input. For example, the gate of transistor 1209 is grounded via a load such as a resistor. .

[0475] Switch 1203 uses a single-conductivity (e.g., n-channel) transistor 1213. The switch 1204 is configured to have a conductivity type opposite to that of a single-conductivity type (for example, a p-channel type). An example using transistor 1214 is shown. Here, the first terminal of switch 1203 The child corresponds to one of the source and drain of transistor 1213, and the second of switch 1203. The terminals correspond to the source and drain of transistor 1213, and switch 1203 is The control signal RD input to the gate of transistor 1213 controls the first terminal and the second terminal. Conductivity or non-conductivity between terminals (i.e., the conductive or non-conductive state of transistor 1213) The state is selected. The first terminal of switch 1204 is connected to the source and dot of transistor 1214. Corresponding to one side of the rain, the second terminal of switch 1204 is the source of transistor 1214. Corresponding to the other side of the drain, switch 1204 is input to the gate of transistor 1214. The control signal RD determines whether the first terminal and the second terminal are conductive or non-conductive (i.e., The conduction or non-conduction state of transistor 1214 is selected.

[0476] One of the sources and drains of transistor 1209 is connected to the pair of electrodes of capacitive element 1208. One side of this is electrically connected to the gate of transistor 1210. Here, the connection part Let the minute be node M2. One of the sources and drains of transistor 1210 is at a low power supply potential. It is electrically connected to a wire (e.g., a GND wire) that can supply power, and the other is a switch. The first terminal of 1203 (one of the source and drain of transistor 1213) is electrically connected. The second terminal of switch 1203 (source and drain of transistor 1213) On the other hand, the first terminal of switch 1204 (the source and drain of transistor 1214) is the first terminal of switch 1204. It is electrically connected to the second terminal of switch 1204 (the terminal of transistor 1214). The other end of the drain is electrically connected to wiring that can supply the power potential VDD. The second terminal of switch 1203 (the other terminal of the source and drain of transistor 1213) ) and the first terminal of switch 1204 (one of the source and drain of transistor 1214) ) and the input terminal of logic element 1206 and one of the pair of electrodes of capacitive element 1207, These are electrically connected. Here, the connection point is called node M1. A pair of capacitive elements 1207. The other electrode can be configured to receive a constant potential. For example, a low potential The system can be configured to receive either a source potential (such as GND) or a high power supply potential (such as VDD) as input. The other of the pair of electrodes of the capacitive element 1207 is a distribution capable of supplying a low power supply potential. It is electrically connected to a wire (for example, a GND wire). This configuration allows for a constant potential to be input. For example, a low power supply potential (such as GND). ) or a high power supply potential (VDD, etc.) can be input. Capacitive element 120 The other of the pair of electrodes (8) is connected to a wire capable of supplying a low power potential (e.g., GND). It is electrically connected to a wire.

[0477] Capacitive elements 1207 and 1208 are used to absorb parasitic capacitance from transistors and wiring. It was possible to omit it by actively using it.

[0478] The gate of transistor 1209 is input with the control signal WE. Switch 1203 and Switch 1204 is controlled by a control signal RD, which is different from the control signal WE, between the first and second terminals. A conductive or non-conductive state is selected between the terminals of one switch and the second terminal of the other switch. When the terminals of one switch are conductive, the terminals of the other switch, specifically the first and second terminals, are not conductive. This is the result.

[0479] The source and drain of transistor 1209 are connected to the data held in circuit 1201. A signal corresponding to this is input. In Figure 31, the signal output from circuit 1201 is the transistor An example is shown where the source and drain of switch 1203 are input. The signal output from the second terminal (the other end of the source and drain of transistor 1213) is: The logic element 1206 inverts its logic value, resulting in an inverted signal, which is then transmitted via circuit 1220. This is then input to circuit 1201.

[0480] Note that in Figure 31, the second terminal of switch 1203 (source and dot of transistor 1213) The signal output from the other side of Rain is routed through logic element 1206 and circuit 1220. An example of input to path 1201 is shown, but it is not limited to this. The second terminal of switch 1203 The signal output from (the source and the other drain of transistor 1213) is the inverse of the logic value. It may be input to circuit 1201 without being converted. For example, within circuit 1201, If there is a node that holds a signal that is the inverted logical value of the signal input from the input terminal The second terminal of switch 1203 (the other of the source and drain of transistor 1213) The signal output from this node can be input to the node in question.

[0481] Furthermore, in Figure 31, among the transistors used in the memory element 1200, Transistors other than TA1209 are films or substrates 119 made of semiconductors other than oxide semiconductors. It can be a transistor in which a channel is formed at 0. For example, silicon or s A transistor can be used to form a channel on a recon substrate. Also, memory element 1 All transistors used in the 200 are transistors whose channels are formed from oxide semiconductors. It can also be set to a sta. Alternatively, the memory element 1200 can be other than transistor 1209. The channel may include a transistor formed of an oxide semiconductor, and the remaining transistors The channel is formed in a layer or substrate 1190 made of a semiconductor other than an oxide semiconductor. It can also be represented as a transistor.

[0482] For example, a flip-flop circuit can be used in circuit 1201 in Figure 31. Furthermore, logic elements such as inverters and clocked inverters can be used as logic elements 1206. It is possible.

[0483] In a semiconductor device according to one aspect of the present invention, while the memory element 1200 is not supplied with a power supply voltage, The data stored in circuit 1201 is transferred to the capacitive element 1208 provided in circuit 1202. It can be held by.

[0484] Furthermore, transistors with channels formed in oxide semiconductors exhibit extremely low off-currents. For example, the off-current of a transistor in which a channel is formed in an oxide semiconductor is crystalline. It is significantly smaller than the off-current of a transistor in which a channel is formed in silicon. Therefore, by using the transistor as transistor 1209, the memory element 12 Even when no power supply voltage is supplied to 00, the signal held by the capacitive element 1208 persists for a long period of time. The data is preserved. In this way, the memory element 1200 retains its stored contents (data) even when the power supply voltage is interrupted. It is possible to hold (T).

[0485] Furthermore, by providing switches 1203 and 1204, pre-charge action Since it is a memory element characterized by performing an operation, after the power supply voltage is restored, the circuit 1201 This can shorten the time it takes to restore the original data.

[0486] Furthermore, in circuit 1202, the signal held by the capacitive element 1208 is transmitted to the transistor The signal is input to gate 1210. As a result, the power supply voltage to memory element 1200 is restored. After that, the signal held by the capacitive element 1208 is controlled by the state of transistor 1210 ( It can be converted to a conductive or non-conductive state and read from circuit 1202. Therefore, even if the potential corresponding to the signal held in the capacitive element 1208 fluctuates slightly, the original signal remains. It is possible to read the issue number accurately.

[0487] Such memory elements 1200 are stored in registers and cache memory of the processor. By using it in a storage device, it prevents the loss of data in the storage device due to a power supply interruption. This is possible. Furthermore, after the power supply voltage is restored, the system will quickly return to the state it was in before the power supply was interrupted. Therefore, the entire processor, or one of the components of the processor, This allows for power-off even for short periods in multiple logic circuits, thus reducing power consumption. It can be suppressed.

[0488] Although the memory element 1200 was explained as an example of being used in a CPU, the memory element 1200 is a DSP ( Digital Signal Processor), Custom LSI, PLD (Pr LSIs such as grammable logic devices, RF-ID (Radi It can also be applied to frequency identification.

[0489] <Electronic equipment> A semiconductor device according to one aspect of the present invention comprises a display device, a personal computer, and a recording medium. Image playback devices (typically DVDs: Digital Versatile Discs) To be used in a device that has a display capable of playing back recording media such as the above and displaying the images thereof. This is possible. In addition, electronic devices that can use a semiconductor device according to one aspect of the present invention This includes mobile phones, game consoles including portable models, mobile data terminals, e-readers, and video cameras. , cameras such as digital still cameras, goggle-type displays (head-mounted displays) (Ray), navigation systems, sound reproduction devices (car audio, digital audio) Players, photocopiers, fax machines, printers, multifunction printers, ATMs Examples include ATMs and vending machines. Specific examples of these electronic devices are shown in Figure 32. vinegar.

[0490] Figure 32(A) shows a portable game console, consisting of a casing 901, casing 902, display unit 903, and display unit. 904, Microphone 905, Speaker 906, Control Keys 907, Stylus 908 It has the following features. The portable game console shown in Figure 32(A) has two display units 903 and a display unit. Although it has part 904, the number of display units that a portable game console has is not limited to this. .

[0491] Figure 32(B) shows a portable data terminal, comprising a first housing 911, a second housing 912, and a first display unit 9 13. It has a second display unit 914, a connection unit 915, an operation key 916, etc. First display unit 913 The first housing 911 is provided, and the second display unit 914 is provided in the second housing 912. Furthermore, the first housing 911 and the second housing 912 are connected by a connecting part 915. The angle between the first housing 911 and the second housing 912 can be changed by the connecting part 915. The video in the first display unit 913 is connected to the first housing 911 and the second housing 9 in the connection unit 915. The configuration may be such that it switches according to the angle between 12 and 12. Also, the first display unit 913 and a display in which at least one of the second display unit 914 is provided with a function as a position input device. A display device may be used. Note that the function as a position input device is provided by the display device. It can be added by providing a control panel. Alternatively, the function as a position input device can be... By installing a photoelectric conversion element, also called a photosensor, in the pixel section of the display device, additional features can be added. It is possible.

[0492] Figure 32(C) shows a notebook personal computer, comprising a casing 921, a display unit 922, and a keyboard. It includes a board 923, a pointing device 924, and the like.

[0493] Figure 32(D) shows an electric refrigerator-freezer, consisting of a casing 931, a refrigerator door 932, and a freezer door 93 It has a third-class rating.

[0494] Figure 32(E) shows a video camera, comprising a first housing 941, a second housing 942, a display unit 943, It has an operation key 944, a lens 945, a connecting part 946, etc. Operation key 944 and lens 945 is provided in the first housing 941, and the display unit 943 is provided in the second housing 942. And the first housing 941 and the second housing 942 are connected by a connecting part 946. The angle between the first housing 941 and the second housing 942 can be changed by the connecting part 946. The video on the display unit 943 is connected to the first housing 941 and the second housing 94 in the connection unit 946. The configuration may also be configured to switch according to the angle between 2 and 3.

[0495] Figure 32(F) is a regular passenger car, consisting of the body 951, wheels 952, dashboard 953, and It has Ito 954, etc.

[0496] <Electronic devices with curved surfaces in their display or light-emitting areas> In the following, an example of an electronic device according to one aspect of the present invention is a curved surface in the display area or light-emitting area. The electronic devices we possess will be explained with reference to Figure 33. As an example, we will explain information devices, particularly portable information devices (portable devices). Examples of information devices that have wireless capabilities include mobile phones (phablets, smartphones) This also includes smartphones, tablet devices (slate PCs), etc.

[0497] Figure 33(A-1) is a perspective view illustrating the external dimensions of the portable device 1300A. 2) is a top view of the portable device 1300A. Figure 33(A-3) is the portable device 1300A. This is a diagram illustrating the usage state.

[0498] Figures 33(B-1) and 33(B-2) are perspective views illustrating the external appearance of the portable device 1300B. This is a diagram.

[0499] Figures 33(C-1) and 33(C-2) are perspective views illustrating the external shape of the portable device 1300C. This is a diagram.

[0500] <Mobile devices> The portable device 1300A can perform functions such as making phone calls, creating and viewing emails, and browsing a notebook or other information. It possesses one or more functions selected from among the functions.

[0501] The portable device 1300A has display units along multiple sides of its casing. For example, The display unit can be provided by arranging a display device with transparency along the inside of the housing. This allows text information and image information to be stored in the first region 1311 and / or the second region. It can be displayed as 1312.

[0502] For example, images used for three operations can be displayed in the first region 1311 (Figure See 33(A-1). Also, as shown by the dashed rectangle in the figure, text information etc. is in the second area. It can be displayed in region 1312 (see Figure 33(A-2)).

[0503] If a second area 1312 is placed on top of the portable device 1300A, the portable device 1300A While still stored in the breast pocket of his clothing, the second area 1312 of the portable device 1300A The displayed text and image information can be easily confirmed by the user (Figure 33 (A-3)). (See reference.) For example, the phone number or name of the caller of an incoming call, etc., on a mobile device 130 It can be observed from above at 0A.

[0504] Furthermore, the portable device 1300A has input devices between the display device and the housing, inside the display device, or on the housing. It may have a sensor, etc. Input devices include, for example, a touch sensor, an optical sensor, an ultrasonic sensor. A sir or similar device can be used. When the input device is placed between the display device and the housing or on the housing. Matrix switch method, resistive film method, ultrasonic surface acoustic wave method, infrared method, electromagnetic induction A touch panel using methods such as capacitive touch or similar technology can be used. Furthermore, the input device can be placed within the display device. When deploying, use in-cell type sensors or on-cell type sensors. That's all you need to do.

[0505] Furthermore, the portable device 1300A is equipped with a vibration sensor and other sensors, and the vibration sensor and other sensors detect It has a storage device that stores a program that switches to a mode that rejects incoming calls based on vibration. This allows the user to lightly tap and shake the portable device 1300A over their clothes. By giving it a command, you can switch it to a mode that rejects incoming calls.

[0506] The portable device 1300B has a display unit having a first area 1311 and a second area 1312. It has a housing 1310 that supports the display unit.

[0507] The housing 1310 has multiple bends, and the longest bend of the housing 1310 is the first region It is situated between region 1311 and the second region 1312.

[0508] The portable device 1300B has a second region 1312 provided along the longest bend on its side. It can be used for directing purposes.

[0509] The portable device 1300C has a display unit having a first area 1311 and a second area 1312. It has a housing 1310 that supports the display unit.

[0510] The housing 1310 has multiple bends, and the second longest bend of the housing 1310 is the first It is sandwiched between region 1311 and the second region 1312.

[0511] The portable device 1300C can be used with the second area 1312 facing upwards.

[0512] Furthermore, the contents described in the embodiments may be applied to or combined with parts of them. , or replacements can be made. Also, the contents described in the embodiments may vary. This refers to content described using diagrams or content described using text in the specification. .

[0513] Also, combining a part of one figure with another part of that figure, and another part of yet another figure as appropriate. This allows for the creation of even more diagrams.

[0514] Furthermore, the document stipulates that any content not specified in the diagram or text should be excluded. It can constitute one aspect of clarity. Alternatively, it can be shown with respect to a certain value, such as an upper limit and a lower limit. If a range of values ​​is specified, you can narrow that range arbitrarily, or within that range By excluding a point within the enclosed area, one aspect of the invention can be defined, which excludes a portion of that area. These measures, for example, ensure that the prior art does not fall within the technical scope of one aspect of the present invention. It can be determined.

[0515] As a concrete example, consider a circuit diagram that uses the first to fifth transistors in a certain circuit. Let's assume it's described. In that case, the circuit does not have a sixth transistor. It is possible to define this as an invention. Or, the circuit does not have a capacitive element. It is possible to define that the circuit has a certain connection structure. The invention can be defined as not having a sixth transistor. Alternatively, it is defined that the circuit does not have capacitive elements that have a certain connection structure. The invention can be constructed in this way. For example, the gate is connected to the gate of the third transistor. It is possible to define the invention as not having a sixth transistor. Alternatively, for example, a capacitive element in which the first electrode is connected to the gate of the third transistor. It is possible to define the invention as not having done so.

[0516] Another concrete example is, for a given value, "a certain voltage is between 3V and 10V." It is stated that "preferably" in that case, for example, if a certain voltage is -2V or higher It is possible to define one aspect of the invention as "except when V is less than or equal to ". Alternatively, for example It is possible to define one aspect of the invention as, except when a certain voltage is 13V or higher. Furthermore, it is also possible to define the invention, for example, as having a voltage of 5V or more and 8V or less. Furthermore, it is also possible to define the invention as, for example, having a voltage of approximately 9V. For example, the invention is defined as having a voltage of 3V or more and 10V or less, except in the case of 9V. It is also possible to do so. Furthermore, regarding a certain value, it may be preferable that it be within a certain range. Even if it is stated that certain values ​​are not limited to those stated. In other words, "preferred Even if it is written as "i", etc., it is not limited to those descriptions.

[0517] Another concrete example is, for a certain value, for example, "it is preferable that a certain voltage be 10V." Let's assume it says "i". In that case, for example, a certain voltage is between -2V and 1V. It is possible to define one aspect of the invention as "except in the case of." Or, for example, if a certain voltage It is possible to define one aspect of the invention as "except in cases where the voltage is 13V or higher."

[0518] Another concrete example is describing the properties of a certain substance, for example, by stating, "A certain film is an insulating film." Let's assume it is listed. In that case, except, for example, when the insulating film is an organic insulating film, It is possible to define one aspect of the invention. Or, for example, if the insulating film is an inorganic insulating film. It is possible to define one aspect of the invention as "except in certain cases." Or, for example, the film It is possible to define one aspect of the invention as, except when it is a conductive film. Or, for example, It is possible to define one aspect of the invention as, except when the film is a semiconductor film.

[0519] Another concrete example is a layered structure where, for instance, "a certain film is placed between film A and film B." It is stated that "it is provided". In that case, for example, if the film is made up of four or more layers It is possible to define the invention as "except in the case of a layered film." Or, for example, film A and so The invention can be defined as "except in cases where a conductive film is provided between the film and the other film." .

[0520] In this specification, active elements (transistors, diodes, etc.), passive elements ( For all terminals of capacitive elements, resistive elements, etc., the destination of their connection is not specified. However, a person skilled in the art may be able to constitute one aspect of the invention. In other words, connection Even without specifying the destination, one aspect of the invention can be said to be clear. And the connection destination is specified. If the content is described in this specification, etc., then one aspect of the invention that does not specify the connection destination is described in this specification. In some cases, it can be determined that this is stated in the document or other documentation. In particular, multiple terminals are used as connection destinations. If multiple locations are anticipated, it is not necessary to limit the connection destination of the terminal to a specific location. Therefore, active elements (transistors, diodes, etc.), passive elements (capacitors, resistive elements) By specifying the connection destination for only some of the terminals that children (etc.) have, In some cases, it may be possible to constitute one aspect of clarity.

[0521] Furthermore, in this specification, etc., if a certain circuit is specified, then at least the connection destination is identified, and this applies to our business. If you are an expert, you may be able to identify the invention. Or, regarding a certain circuit, However, if the function is specified, a person skilled in the art may be able to specify the invention. In other words, if the function is specified, it can be said that one aspect of the invention is clear. It may be possible to determine that one aspect of the invention is described in this specification, etc. Therefore, even without specifying the function of a certain circuit, if the connection destination is specified, it constitutes an invention. It is disclosed as such and can constitute one aspect of the invention. Regarding a certain circuit, even if the connection destination is not specified, if the function is specified, it can be considered as one aspect of the invention. This has been disclosed and can constitute one aspect of the invention.

[0522] In this specification, etc., the figures or text described in a certain section of the embodiment may be used. It is possible to take a part of it and constitute one aspect of the invention. Therefore, If a diagram or text describing a particular part is included, then a portion of that diagram or text may be extracted. The content is disclosed as one aspect of the invention, and thus constitutes one aspect of the invention. It is assumed that this is possible. And one aspect of the invention can be said to be clear. Therefore, for example, For example, it is assumed that a part of a drawing or text describing active elements (transistors, diodes, etc.), wiring, passive elements (capacitive elements, resistive elements, etc.), conductors, insulators, semiconductors, organic substances, inorganic substances, components, devices, operation methods, and manufacturing methods can be extracted to constitute one embodiment of the invention. For example, from a circuit diagram configured including N (N is a natural number) circuit elements (transistors , capacitive elements, etc.), it is possible to extract M (M is a natural number and M<N) circuit elements (transistors, capacitive elements, etc.) to constitute one embodiment of the invention. As another example, from a cross-sectional view configured including N (N is a natural number) layers, it is possible to extract M (M is a natural number and M<N) layers to constitute one embodiment of the invention. As still another example, from a flowchart configured including N (N is a natural number) elements, it is possible to extract M (M is a natural number and M<N) elements to constitute one embodiment of the invention. As still another example, from a sentence stating "A includes B, C, D, E or F", some elements can be arbitrarily extracted to constitute one embodiment of the invention such as "A includes B and E", "A includes E and F", "A includes C, E and F", or "A includes B, C, D and E". It is possible to constitute one embodiment of the invention as described above.

[0523] Note that in this specification and the like, when at least one specific example is described in a drawing or text set forth in an embodiment, it will be readily appreciated by those skilled in the art that a generic concept can be derived from the specific example. Accordingly, when at least one specific example is described in a drawing or text set forth in an embodiment, the generic concept derived from the specific example is also regarded as one embodiment of the invention. It is disclosed and can constitute one aspect of the invention. One aspect of the Ming Dynasty can be said to be clear.

[0524] In this specification, at least the contents shown in the figures are disclosed as one aspect of the invention. This constitutes one aspect of the invention. Therefore, within Regarding the contents, if they are depicted in the diagram, even if they are not described in text, the contents are considered to be part of the invention. This is disclosed as one aspect, and it can constitute one aspect of the invention. Similarly, a diagram showing only a portion of the figure is also disclosed as one aspect of the invention. And it is possible to constitute one aspect of the invention. And that aspect of the invention is clear. It can be said that... [Examples]

[0525] In this embodiment, the cross-sectional shape of a semiconductor device according to one aspect of the present invention is shown by a cross-sectional TEM image. That was my assessment.

[0526] The following describes the method for preparing the sample using Figure 37. Note that Figures 37(A) and 37(B) are shown below. Figures 37(C) and 37(D) show cross-sectional TEM images of the sample. Also, Figure 37(E The section below shows a flowchart of the sample preparation method.

[0527] First, a glass substrate was prepared. Next, a layer with a thickness of 1 was applied to the glass substrate by the PECVD method. A 00 nm silicon nitride film was deposited. Next, a thick layer was formed on the silicon nitride using the PECVD method. A silicon oxide nitride film with a thickness of 400 nm was deposited. Next, sputtering was performed on the silicon oxide nitride film. A 50 nm thick oxide semiconductor (also known as OS) film was deposited using the ring deposition method. On the oxide semiconductor, silicon oxide nitride (S) with a thickness of 100 nm is formed by the PECVD method. A film of (also written as iON) was formed. Next, a sputtering method was applied to the silicon oxynitride. Therefore, a tantalum nitride film with a thickness of 30 nm was deposited. Next, a sputtering process was performed on the tantalum nitride film. A tungsten film with a thickness of 150 nm was deposited using the densifying method.

[0528] Furthermore, the deposition of oxide semiconductor films is carried out using a target with an atomic ratio of In:Ga:Zn=5:5:6. This was done using [a specific method / tool].

[0529] Next, a resist mask was formed on the tungsten (see Figure 37(E) step S101). (Illuminate.) The cross-sectional TEM image of the sample extracted here is shown in Figure 37(A).

[0530] Next, a resist mask was used to etch a portion of the tungsten and tantalum nitride. (See Figure 37(E) Step S102.) Figure 3 shows a cross-sectional TEM image of the sample extracted here. This is shown in 7(B).

[0531] The etching process was carried out in three stages. First, in the first stage, 160 sccm Using chlorine gas, 320 sccm of sulfur hexafluoride gas, and 80 sccm of oxygen gas, pressurize With a force of 0.6 Pa, 250 W (13.56 MHz) was applied to the sample side, and the direction of the sample was also By applying 9000W (13.56MHz) to the opposing coil-type electrodes, tungsten The tungsten was etched. However, the tungsten was not completely etched, and the tantalum nitride was I adjusted the timing so that it wouldn't be exposed.

[0532] Next, in the second stage, 320 sccm of chlorine gas and 160 sccm of sulfur hexafluoride gas were added. Using 240 sccm of oxygen gas and a pressure of 0.6 Pa, a 1000W wattage was applied to the sample side. (13.56MHz) is applied, and 9000W (13) is applied to the coil-type electrode facing the sample. The remaining tungsten was etched by applying 0.56 MHz. The second step was: The etching rate of tantalum nitride is slower than that of tungsten. Therefore, having a second stage reduces variations in the amount of etching within the sample surface. It is possible.

[0533] Next, as the third stage, 540 sccm of chlorine gas and 540 sccm of sulfur hexafluoride are added. Using gas, with a pressure of 3.0 Pa, a 3000 W (1) of power is applied to a coil-type electrode facing the sample. The tantalum nitride was etched by applying 3.56 MHz. The third step was nitriding The etching rate of silicon oxide nitride is slower than that of tantalum. Therefore, variations in the amount of etching within the sample surface can be reduced. The etching process was performed with the sample electrode temperature set to 80°C.

[0534] In this manner, a portion of the tungsten and tantalum nitride was etched.

[0535] Next, using a resist mask, and tungsten and tantalum nitride as masks, oxidation Etching a portion of the silicon nitride, as well as the edges of the tungsten and tantalum nitride. It was machined to have a tapered angle (see step S103 in Figure 37(E)). A cross-sectional TEM image of the extracted sample is shown in Figure 37(C).

[0536] The etching conditions were 240 sccm of carbon tetrafluoride gas and 160 sccm of Using oxygen gas and a pressure of 0.8 Pa, a 1000W (13.56MHz) power supply was applied to the sample side. Apply 7000W (13.56MHz) to the coil-type electrode facing the sample. By doing so, silicon oxide nitride was etched. This condition is for etching silicon oxide nitride. Under conditions where the etching rate of the oxide semiconductor is slower than the etching rate, within the sample surface This can reduce variations in the amount of etching. Note that etching is performed on the sample side. The experiment was conducted with a polar temperature of 10°C.

[0537] From Figure 37(C), the taper angle between the top surface of tantalum nitride and the side surface of tungsten is It was approximately 40°. Also, the top surface of silicon oxide nitride and the side surface of tantalum nitride, The taper angle was approximately 31°. Furthermore, the upper surface of the oxide semiconductor and silicon oxide nitride were also present. The taper angle between the side and the other was approximately 84°.

[0538] The cross-sectional shape shown in Figure 37(C) corresponds to the cross-sectional shape shown in Figure 16. Specifically, Figure The silicon oxidizride shown in 37(C) corresponds to the insulator 112 shown in Figure 16. Also, Figure 3 The tantalum nitride shown in 7(C) corresponds to the conductor 114a shown in Figure 16. Also, Figure 37( The tungsten shown in C) corresponds to the conductor 114b shown in Figure 16.

[0539] For the sample in Figure 37(C), 240 sccm of carbon tetrafluoride gas was further applied for 60 seconds. Using 160 sccm of oxygen gas and a pressure of 0.8 Pa, 1000 W (13 Apply 0.56MHz and 7000W (13.56) to the coil-type electrode facing the sample. By applying a frequency of MHz, silicon oxidnitride was etched. This condition was used for oxidnitride nitriding. The etching rate of oxide semiconductors is slower than that of silicon. Therefore, variations in the amount of etching within the sample surface can be reduced. The test was performed with the sample electrode temperature set to 10°C.

[0540] From the relationship between the etching rates of silicon oxide nitride, tantalum nitride, and tungsten, The edges of the silicon oxide nitride form an arc shape, and the tantalum nitride protrudes from the tungsten. This results in the shape shown (see Figure 37(E) step S104).

[0541] Subsequently, silicon nitride with a thickness of 100 nm and silicon oxide nitride with a thickness of 300 nm are formed. A cross-sectional TEM image of the film-treated sample is shown in Figure 37(D).

[0542] From Figure 37(D), the taper angle between the top surface of tantalum nitride and the side surface of tungsten is It was approximately 82°. Also, the top surface of silicon oxide nitride and the side surface of tantalum nitride, The taper angle was approximately 23°. Furthermore, the upper surface of the oxide semiconductor and silicon oxide nitride were also present. The taper angle between the side and the other was approximately 55°. [Explanation of Symbols]

[0543] 100 circuit boards 101 Insulator 102 Insulator 102a Insulator 102b Insulator 104 Conductors 104a Conductor 104a1 Conductor 104a2 conductor 104b Conductor 104b1 Electric conductor 104b2 Electric conductor 104c conductor 104d Conductor 104e conductor 104f conductor 106 Semiconductors 106a Semiconductor 106b Semiconductor 106c semiconductor 107a area 107a1 area 107a2 area 107a3 area 107b area 107b1 area 107b2 area 107b3 area 107c area 107d area 107e area 107f area 108 Insulator 112 Insulator 113 Protective film 114 Conductors 114a Conductor 114b Conductor 115a Conductor 115b Conductor 116a Conductor 116a1 Electric conductor 116a2 conductor 116b Conductor 116b1 Electric conductor 116b2 Electric conductor 116c conductor 116c1 Electric conductor 116c2 conductor 116d conductor 116e Conductor 116f conductor 118 Insulator 128 Insulator 132 Insulator 138 Insulator 148 Insulator 150 transistors 160 Capacitive elements 200 pellets 200a pellets 200b pellets 201 Aeon 220 circuit boards 230 targets 500 transistors 501 circuit board 502 circuit board 504B Light-emitting element 504G light-emitting element 504R Light-emitting element 504W light-emitting element 506 Conductors 507 Conductors 508 Bulkhead 509 Spacer 510 Emitting layer 512 Conductors 514B Colored layer 514G colored layer 514R colored layer 514W colored layer 516 circuit boards 518 Encapsulation film 520 areas 800 RF tags 801 Communication device 802 Antenna 803 Wireless signal 804 Antenna 805 Rectifier circuit 806 Constant Voltage Circuit 807 Demodulation Circuit 808 Modulation Circuit 809 Logic Circuits 810 Memory circuit 811 ROM 901 cabinet 902 cabinet 903 Display section 904 Display section 905 Microphone 906 Speakers 907 Operation Keys 908 Stylus 911 cabinet 912 cabinet 913 Display section 914 Display section 915 Connection part 916 Operation Keys 921 cabinet 922 Display section 923 Keyboard 924 Pointing Devices 931 cabinet 932 Refrigerator door 933 Freezer door 941 cabinet 942 cabinets 943 Display section 944 Operation Keys 945 lens 946 Connection part 951 Body 952 wheels 953 Dashboard 954 Light 1189 ROM Interface 1190 circuit board 1191 ALU 1192 ALU Controller 1193 Instruction Decoder 1194 Interrupt Controller 1195 Timing Controller 1196 Register 1197 Register Controller 1198 Bus Interface 1199 ROM 1200 memory elements 1201 Circuit 1202 Circuit 1203 Switch 1204 Switch 1206 Logic Element 1207 Capacitive element 1208 Capacitive element 1209 Transistors 1210 Transistors 1213 Transistors 1214 Transistors 1220 Circuit 1300A Portable Devices 1300B Portable Devices 1300C Portable Devices 1310 cabinet 1311 area 1312 area 2100 transistors 2200 transistors 3001 Wiring 3002 Wiring 3003 Wiring 3004 Wiring 3005 Wiring 3200 transistors 3300 transistors 3400 Capacitive element 4000 RF tags 5000 circuit boards 5001 pixel section 5002 Scan Line Drive Circuit 5003 Scan Line Drive Circuit 5004 Signal Line Drive Circuit 5010 Capacitor wiring 5012 Gate Wiring 5013 Gate wiring 5014 Source electrode or drain electrode 5016 Transistor 5017 Transistor 5018 Liquid crystal element 5019 Liquid crystal element 5020 pixels 5021 Switching Transistor 5022 Driver Transistor 5023 Capacitive element 5023A Capacitive element 5023B Capacitive element 5024 Light-emitting element 5025 Signal Line 5026 scan lines 5027 Power line 5028 Common electrode 5100 pellets 5111 pixels 5120 circuit board 5154 Light-emitting element 5155 Transistor 5156 Transistor 5157 Transistor 5158 Capacitive element 5161 area 5211 pixels 5214 Light-emitting element 5215 Transistor 5216 Transistor 5217 Transistor 5218 Capacitive element 5219 Transistor 5311 pixels 5314 Light-emitting element 5315 Transistor 5316 Transistors 5317 Transistors 5318 Capacitive element 5319 Transistors 5320 Transistors 5411 pixels 5414 Light-emitting element 5415 Transistor 5416 Transistor 5417 Transistors 5418 Capacitive element 5440 transistors 5441 Transistor 5442 transistors 8000 Display Module 8001 Top cover 8002 Lower cover 8003 FPC 8004 Touch Panel 8005 FPC 8006 cell 8007 Backlight Unit 8008 light source 8009 Frame 8010 Printed Circuit Board 8011 Battery< / cpu>

Claims

1. A light-emitting device comprising a pixel having a first transistor, a second transistor, a third transistor, a light-emitting element, a capacitive element, a first wiring, a second wiring, and a third wiring, The gate of the first transistor is always in contact with either the source or the drain of the second transistor. The gate of the first transistor is always in electrical contact with one electrode of the capacitive element. The source and drain of the first transistor are always in electrical contact with the light-emitting element. The source and drain of the first transistor are always in electrical contact with the source and drain of the third transistor. The source and drain of the first transistor are always in electrical contact with the other electrode of the capacitive element. The source and drain of the first transistor are always in electrical contact with the first wiring. The source and drain of the second transistor are always in electrical contact with the second wiring. The source and drain of the third transistor are always in electrical contact with the third wiring. The first transistor described above is The first gate electrode and The first insulator on the first gate electrode, The oxide semiconductor on the first insulator, The second insulator on the oxide semiconductor, The second gate electrode on the second insulator, The third insulator on the second gate electrode, The fourth insulator on the third insulator, A source electrode having a region in contact with the oxide semiconductor, The drain electrode has a region in contact with the oxide semiconductor, The fourth insulator is provided on the source electrode, The fourth insulator is provided on the drain electrode, The third insulator has a region that contacts the upper surface of the second gate electrode, The third insulator has a region that is in contact with the side surface of the second gate electrode, The third insulator has a region that is in contact with the second insulator. The third insulator has a region that is in contact with the upper surface of the oxide semiconductor, The third insulator has a region that is in contact with the side surface of the oxide semiconductor, The third insulator has a region that is in contact with the source electrode, The third insulator has a region that is in contact with the drain electrode, The third insulator has a region that is in contact with the first insulator. The fourth insulator has a region that is in contact with the source electrode, The fourth insulator has a region that is in contact with the drain electrode, The oxide semiconductor has a first region that overlaps with the second insulator and overlaps with the second gate electrode. The oxide semiconductor has a second region that overlaps with the second insulator and does not overlap with the second gate electrode. The oxide semiconductor has a third region that does not overlap with the second insulator and does not overlap with the second gate electrode. The third region has a region with a smaller film thickness than the second region. The second gate electrode comprises a first layer and a second layer on the first layer. In the channel length direction, the first layer has a region that protrudes from the end of the second layer. The first gate electrode has a third layer and a fourth layer on the third layer, The third layer has titanium, The fourth layer has copper, In the channel length direction, both ends of the second insulator are located inward from both ends of the first gate electrode. In the channel length direction, the length of the portion of the first gate electrode that overlaps with the oxide semiconductor is greater than the length of the portion of the second gate electrode that overlaps with the oxide semiconductor. A first electrode is provided, which is on the same layer as the first electrode and made of the same material. A second electrode is provided, which is on the same layer as the source electrode and the drain electrode and is made of the same material. The fourth insulator is provided on the second electrode, The third insulator has a region that is in contact with the second electrode, The fourth insulator has a region that is in contact with the second electrode, The first electrode has a region that overlaps with the second electrode via the first insulator and the third insulator. The first electrode and the second electrode function as electrodes for the capacitive element. The first insulator and the third insulator function as dielectrics for the capacitive element in a light-emitting device.

2. In claim 1, In the channel length direction, the cross-section of the end of the first layer has a tapered shape. In the channel length direction, the cross-section of the end of the second layer has a tapered shape. In the channel length direction, the cross-section of the end of the third layer has a tapered shape. In the channel length direction, the cross-section of the end of the fourth layer has a tapered shape. A light-emitting device in which the cross-section of the end of the second insulator has a tapered shape in the channel length direction.

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