Transmitting circuit and communication device equipped therewith

Abstract

This invention improves robustness against load fluctuations in a transmitting circuit that amplifies and transmits a high-frequency signal to a radiating element having four feed points. [Solution] In the communication device 1, the transmitting circuit 10 that amplifies and transmits a high-frequency signal to a flat-plate shaped radiating element ANT having feed points V1, V2, H1, and H2 comprises a power amplification circuit 100 including a plurality of amplification circuits and a plurality of phase shift lines that supply high-frequency signals to the feed points V1, H1, V2, and H2, respectively. The feed points V1 and V2 are located at positions offset from the center of the radiating element in opposite directions along a first direction. The feed points H1 and H2 are located at positions offset from the center of the radiating element in opposite directions along a second direction that intersects the first direction. When the wavelength of the high-frequency signal supplied to the radiating element is λ, the line lengths of each phase shift line are λ / 8, λ / 4, and 3 / 8λ, respectively.

Description

[Technical Field]

[0001] This disclosure relates to a transmitting circuit and a communication device incorporating the same, and more specifically, to a technique for improving robustness to load fluctuations in a transmitting circuit having an amplifier. [Background technology]

[0002] Japanese Patent Publication No. 2024-49977 (Patent Document 1) discloses an amplification module having a configuration in which a power amplifier is individually connected to each feed point of a patch antenna having four feed points. In the amplification module disclosed in Japanese Patent Publication No. 2024-49977 (Patent Document 1), when the patch antenna is viewed from above, the four feed points are arranged rotationally symmetrically with respect to the center of the patch antenna. The power amplifiers connected to each feed point are Doherty amplifiers. Two feed points adjacent in the rotational direction of the patch antenna are input with a signal having a phase difference of 90°.

[0003] In the amplification module disclosed in Japanese Patent Publication No. 2024-49977 (Patent Document 1), circularly polarized radio waves can be emitted by high-frequency signals supplied to four feed points, and by employing Doherty amplifiers as each amplifier, a predetermined backoff can be secured to improve the efficiency of the amplification module. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2024-49977 [Overview of the initiative] [Problems that the invention aims to solve]

[0005] On the other hand, in the amplification module disclosed in Japanese Patent Publication No. 2024-49977 (Patent Document 1), Doherty amplifiers are used as each power amplifier. However, if the load impedance of the radiating element fluctuates, the impedance of each amplifier included in the amplifier changes, causing the output power of each amplifier to fluctuate with phase, which can lead to instability in the overall output power of the power amplifier.

[0006] This disclosure was made to solve these problems, and its purpose is to improve robustness to load fluctuations in a transmitting circuit that amplifies and transmits a high-frequency signal to a radiating element having four feed points. [Means for solving the problem]

[0007] The transmitting circuit according to this disclosure amplifies and transmits a high-frequency signal to a flat-plate shaped radiating element having a first to fourth feed point. The transmitting circuit comprises a first to fourth amplifier circuit and a first to third phase shift line. The first to fourth amplifier circuits supply high-frequency signals to the first to fourth feed points, respectively. The first phase shift line is connected between the second amplifier circuit and the second feed point. The second phase shift line is connected between the third amplifier circuit and the third feed point. The third phase shift line is connected between the fourth amplifier circuit and the fourth feed point. The first and third feed points are positioned offset from the center of the radiating element in opposite directions along a first direction. The second and fourth feed points are positioned offset from the center of the radiating element in opposite directions along a second direction intersecting the first direction. If the wavelength of the high-frequency signal supplied to the radiating element is λ, then the length of the first phase shift line is λ / 8, the length of the second phase shift line is λ / 4, and the length of the third phase shift line is (3 / 8)λ. [Effects of the Invention]

[0008] According to the transmission device of the present disclosure, phase shift lines with line lengths differing by λ / 8 are disposed on the lines from each amplifier circuit to the corresponding feed point. This makes it possible to shift the phase fluctuation of the output power of each amplifier circuit by 90° when the load impedance fluctuates. Accordingly, fluctuation in output power caused by load fluctuation can be suppressed across the entire phase range. Furthermore, at any phase, the output power of any one of the amplifier circuits can be made higher than the average power. Therefore, in a transmission circuit that amplifies and transmits high-frequency signals to a radiating element having four feed points, robustness against load fluctuation can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] [Figure 1] FIG. 1 is a schematic configuration diagram of a communication device to which a transmission circuit according to an embodiment is applied. [Figure 2] FIG. 2 is a diagram showing a detailed configuration of the power amplifier circuit in FIG. 1. [Figure 3] FIG. 3 is a diagram for explaining a power amplifier circuit in a comparative example. [Figure 4] FIG. 4 is a diagram for explaining characteristics of the power amplifier circuit according to the embodiment. [Figure 5] FIG. 5 is a diagram for explaining an output state of each amplifier at maximum power. [Figure 6] FIG. 6 is a diagram for explaining an output state of each amplifier in a case of 6 dB back-off. [Figure 7] FIG. 7 is a diagram for explaining an output state of each amplifier in a case of 12 dB back-off. [Figure 8] FIG. 8 is a diagram for explaining an output state of each amplifier in a case of 18 dB back-off. [Figure 9] FIG. 9 is a diagram showing a detailed configuration of a power amplifier circuit in a modified transmission circuit. MODES FOR CARRYING OUT THE INVENTION

[0010] The embodiments of this disclosure will be described in detail below with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and their descriptions will not be repeated.

[0011] [Embodiment] (Overall configuration of the communication equipment) Figure 1 is a schematic diagram of a communication device 1 to which the transmission circuit 10 according to the embodiment is applied. The communication device 1 is, for example, a mobile terminal such as a mobile phone, smartphone or tablet, a personal computer equipped with communication functions, or a base station for a mobile terminal.

[0012] Referring to Figure 1, the communication device 1 comprises a radiating element ANT, a transmitting circuit 10, a BBIC (Baseband Integrated Circuit) 20 and an RFIC (Radio Frequency Integrated Circuit) 30 constituting a baseband signal processing circuit, and a power supply circuit 40. The transmitting circuit 10 includes input terminals T0, T5, T6, output terminals T1 to T4, a bias control circuit 50, and a power amplification circuit 100. In general terms, the communication device 1 upconverts the intermediate frequency (IF) signal transmitted from the BBIC 20 to a high frequency (radio frequency: RF) signal using the RFIC 30, amplifies the high frequency signal using the power amplification circuit 100, and radiates it from the radiating element ANT.

[0013] RFIC30 is an example of a signal processing circuit that processes high-frequency signals. RFIC30 upconverts the intermediate frequency signal transmitted from BBIC20 into a high-frequency signal and outputs the generated high-frequency signal to the transmission circuit 10 via input terminal T0.

[0014] The power supply circuit 40 is an example of a so-called digital tracker and can supply power supply voltages Vcc of multiple different voltage levels to the power amplifier circuit 100. The power supply circuit 40 includes a multilevel power converter (MPC) 410, a power supply selection circuit 420, and a digital envelope tracker (digital ET) 430.

[0015] The MPC410, although not shown in Figure 1, includes multiple DC / DC converters. The MPC410 converts the battery voltage VB supplied from an external battery into several different voltage levels and supplies them to the power selection circuit 420.

[0016] The digital ET430 receives the I and Q waveform signals of the transmitted signal from the BBIC20 and tracks the envelope of the transmitted signal using the digital ET mode. The digital ET430 generates a selection signal SEL corresponding to the voltage level of the envelope of the transmitted signal and outputs it to the power supply selection circuit 420.

[0017] The power supply selection circuit 420 selects a voltage corresponding to the selection signal SEL from multiple voltage levels supplied from the MPC410 and supplies it to the power amplifier circuit 100 via the input terminal T6 as the power supply voltage Vcc.

[0018] The bias control circuit 50 receives a control signal CON from the RFIC 30 via the input terminal T5. Based on the control signal CON, the bias control circuit 50 generates a bias signal BS to control the magnitude and supply timing of the bias current of the amplifier included in the power amplifier circuit 100, and outputs it to the power amplifier circuit 100.

[0019] The power amplifier circuit 100 amplifies the input signal Pin received from the RFIC 30 via input terminal T0 to generate four output signals Pout1 to Pout4.

[0020] The radiating element ANT is, for example, a flat patch antenna with a square shape. The radiating element ANT radiates the output signals Pout1 to Pout4, which are high-frequency signals output from the transmitting circuit 10, as radio waves. Note that the shape of the radiating element ANT is not limited to a square, but may be circular or other polygonal.

[0021] The output terminal T1 of the transmitting circuit 10 is connected to the feed point V1 of the radiating element ANT. The output terminal T2 of the transmitting circuit 10 is connected to the feed point H1 of the radiating element ANT. The output terminal T3 of the transmitting circuit 10 is connected to the feed point V2 of the radiating element ANT. The output terminal T4 of the transmitting circuit 10 is connected to the feed point H2 of the radiating element ANT.

[0022] The feed points V1 and V2 are positioned along direction DR1 (first direction) in Figure 2, offset from the center of the radiating element ANT in opposite directions. The feed points H1 and H2 are positioned along direction DR2 (second direction), which intersects direction DR1, offset from the center of the radiating element ANT in opposite directions.

[0023] In the radiating element ANT of this embodiment, directions DR1 and DR2 are orthogonal. In the following description, direction DR1 may be referred to as the "vertical direction" and direction DR2 as the "horizontal direction".

[0024] (Detailed configuration of the power amplifier circuit) The detailed configuration of the power amplification circuit 100 in the transmitting circuit 10 will be explained using Figure 2.

[0025] The power amplification circuit 100 includes a branch circuit 105, drive amplifiers 125A~125D, 126A~126D, amplification circuits 121A~121D, and phase shift lines 116B, 116D, 117B, 117D, 161B~161D.

[0026] The branching circuit 105 includes a balun 110 and hybrid couplers 115A and 115B. The balun 110 includes an unbalanced terminal and two balanced terminals, and branches the high-frequency signal received at the unbalanced terminal into two paths, while also giving the two branched signals a 180° phase difference.

[0027] The balun 110 is a merchant balun having, for example, a λ / 2 line connected to an unbalanced terminal and two λ / 4 lines connected to two balanced terminals, respectively, when the wavelength of the high-frequency signal to be transmitted is λ. The path from one balanced terminal (first balanced terminal) (first path) is connected to the hybrid coupler 115A, and the path from the other balanced terminal (second balanced terminal) (second path) is connected to the hybrid coupler 115B.

[0028] One input terminal of the hybrid coupler 115A is connected to the first path branched by the balun 110. The other input terminal of the hybrid coupler 115A is connected to ground potential (GND). The hybrid coupler 115A further branches the signal from the balun 110 into two paths and gives the two branched signals a 90° phase difference.

[0029] Similarly, one input terminal of the hybrid coupler 115B is connected to the second path branched by the balun 110. The other input terminal of the hybrid coupler 115B is connected to ground potential (GND). The hybrid coupler 115B further branches the signal from the balun 110 into two paths and gives the two branched signals a 90° phase difference.

[0030] Amplifier circuits 121A to 121D amplify the high-frequency signals supplied from hybrid couplers 115A and 115B. Amplifier circuits 121A to 121D each supply the amplified high-frequency signals to the corresponding feed points in the radiating element ANT via output terminals T1 to T4.

[0031] Each of the amplification circuits 121A to 121D is a so-called Doherty amplifier, comprising a carrier amplifier, a peak amplifier, a phase shift line with a line length of λ / 4, and an impedance converter.

[0032] Specifically, the amplification circuit 121A includes a carrier amplifier 141A, a peak amplifier 142A, a phase shift line 131A, and an impedance converter 151A. The phase shift line 131A is connected between the output terminal of the carrier amplifier 141A and the output terminal of the peak amplifier 142A. The output terminal of the peak amplifier 142A is connected to output terminal T1 via the impedance converter 151A.

[0033] The amplification circuit 121B includes a carrier amplifier 141B, a peak amplifier 142B, a phase shift line 131B, and an impedance converter 151B. The phase shift line 131B is connected between the output terminal of the carrier amplifier 141B and the output terminal of the peak amplifier 142B. The output terminal of the peak amplifier 142B is connected to output terminal T2 via the impedance converter 151B and a phase shift line 161B having a line length of λ / 8.

[0034] The amplification circuit 121C includes a carrier amplifier 141C, a peak amplifier 142C, a phase shift line 131C, and an impedance converter 151C. The phase shift line 131C is connected between the output terminal of the carrier amplifier 141C and the output terminal of the peak amplifier 142C. The output terminal of the peak amplifier 142C is connected to output terminal T3 via the impedance converter 151C and the phase shift line 161C.

[0035] The phase shift line 161C includes lines 1611C and 1612C connected in series. Each of lines 1611C and 1612C has a line length of λ / 8. That is, the phase shift line 161C has a line length of λ / 4.

[0036] The amplification circuit 121D includes a carrier amplifier 141D, a peak amplifier 142D, a phase shift line 131D, and an impedance converter 151D. The phase shift line 131D is connected between the output terminal of the carrier amplifier 141D and the output terminal of the peak amplifier 142D. The output terminal of the peak amplifier 142D is connected to output terminal T4 via the impedance converter 151D and the phase shift line 161D.

[0037] The phase shift line 161D includes lines 1611D, 1612D, and 1613D connected in series. Each of the lines 1611D, 1612D, and 1613D has a line length of λ / 8. That is, the phase shift line 161D has a line length of (3 / 8)λ.

[0038] In each of the amplification circuits 121A to 121D, the signal output from the carrier amplifier and the signal output from the peak amplifier are combined by current synthesis.

[0039] One output terminal (first output terminal) of the hybrid coupler 115A is connected to the carrier amplifier 141B of the amplification circuit 121B via the drive amplifier 125B and the phase shift line 116B, and is also connected to the peak amplifier 142C of the amplification circuit 121C via the drive amplifier 126C.

[0040] The other output terminal (second output terminal) of the hybrid coupler 115A is connected to the peak amplifier 142A of the amplification circuit 121A via the drive amplifier 126A, and also to the carrier amplifier 141C of the amplification circuit 121C via the drive amplifier 125C.

[0041] One output terminal (third output terminal) of the hybrid coupler 115B is connected to the carrier amplifier 141A of the amplification circuit 121A via the drive amplifier 125A, and also to the peak amplifier 142D of the amplification circuit 121D via the drive amplifier 126D and the phase shift line 117D.

[0042] The other output terminal (fourth output terminal) of the hybrid coupler 115B is connected to the peak amplifier 142B of the amplification circuit 121B via the drive amplifier 126B and the phase shift line 117B, and is also connected to the carrier amplifier 141D of the amplification circuit 121D via the drive amplifier 125D and the phase shift line 116D.

[0043] Each amplifier circuit includes an impedance converter with a main line and a secondary line, which converts impedance at a predetermined conversion ratio. The main line and secondary line have a line length of, for example, λ / 8 or λ / 16. One end of the main line is connected to the output terminal of the corresponding peak amplifier, and the other end is connected to the corresponding output terminal. Impedance converters 151B to 151D are connected to the corresponding output terminals T2 to T4 via phase shift lines 161B to 161D, respectively. One end of the secondary line is connected to one end of the main line, and the other end is connected to ground potential (GND).

[0044] Next, the phase of the signals at various points in the power amplifier circuit 100 will be explained. The phase of the signal supplied from the balun 110 to the hybrid coupler 115A is set to 90°, and the phase of the signal supplied to the hybrid coupler 115B is set to -90°.

[0045] In this case, one output terminal (first output terminal) of the hybrid coupler 115A outputs a signal with a phase of 270°, and the other output terminal (second output terminal) outputs a signal with a phase of 0°. Also, one output terminal (third output terminal) of the hybrid coupler 115B outputs a signal with a phase of 90°, and the other output terminal (fourth output terminal) outputs a signal with a phase of 180°.

[0046] In the amplification circuit 121A, the phase input to the carrier amplifier 141A is 90°, and the phase input to the peak amplifier 142A is 0°. Therefore, a signal with a phase of 0° is supplied to the feed point V1 of the radiating element ANT.

[0047] In the amplification circuit 121B, the signals from each hybrid coupler are phase-delayed by 45° by phase-shift lines 116B and 117B, which have a line length of λ / 8. As a result, the phase input to the carrier amplifier 141B is 225°, and the phase input to the peak amplifier 142B is 135°. Although the phase of the signal output from the amplification circuit 121B is 135°, the phase is further delayed by 45° by the phase-shift line 161B, which has a line length of λ / 8, so a signal with a phase of 90° is supplied to the feed point H1 of the radiating element ANT.

[0048] In the amplification circuit 121C, the phase input to the carrier amplifier 141C is 0°, and the phase input to the peak amplifier 142C is 270°. Although the phase of the signal output from the amplification circuit 121C is 270°, the phase is delayed by 90° by the phase shift line 161C, which has a line length of λ / 4, so a signal with a phase of 180° is supplied to the feed point V2 of the radiating element ANT.

[0049] In the amplification circuit 121D, the signals from each hybrid coupler are phase-delayed by 45° by phase-shift lines 116D and 117D, which have a line length of λ / 8. As a result, the phase input to the carrier amplifier 141D is 135°, and the phase input to the peak amplifier 142D is 45°. Although the phase of the signal output from the amplification circuit 121D is 45°, the phase is further delayed by 135° by the phase-shift line 161D, which has a line length of (3 / 8)λ, so that a signal with a phase of -90° (i.e., 270°) is supplied to the feed point H1 of the radiating element ANT.

[0050] In other words, signals are supplied to the four feed points of the radiating element ANT, each shifted in phase by 90° in the rotational direction relative to the center of the radiating element ANT. With this configuration, the signals supplied to the four feed points are combined in the radiating element ANT.

[0051] (Phase shift line between the amplifier circuit and the radiating element) Next, using Figures 3 and 4, we will explain the roles of the phase-shift lines 161B, 161C, and 161D, which are positioned between the amplifier circuits 121B, 121C, and 121D and the radiating element ANT. In Figures 3 and 4, the explanation will be based on the example of a scenario where all amplifiers in each amplifier circuit are driven.

[0052] Figure 3 shows the power amplifier circuit 100X in a comparative example where the phase shift lines 161B, 161C, and 161D are not installed. In Figure 3, the left side shows the schematic configuration of the power amplifier circuit 100X. The right side of Figure 3 shows the load impedance R of the radiating element ANT. ANT The characteristic impedance R L The position of each amplifier on the Smith chart in a larger area is shown.

[0053] In Figure 4, the left figure shows a schematic configuration of the power amplifier circuit 100 of the embodiment, and the right figure shows the position of each amplifier on the Smith chart when the phase φ is 0°.

[0054] In a Doherty amplifier, such as the one used in the power amplifier circuit 100 of the embodiment, the output terminal of the carrier amplifier is connected to the output terminal of the amplifier circuit (i.e., the output terminal of the peak amplifier) ​​via a phase-shift line having a line length of λ / 4. Therefore, the phase difference between the load impedance of the carrier amplifier and the load impedance of the peak amplifier is 180°.

[0055] Therefore, for example, when the load impedance of the carrier amplifier is high, the load impedance of the peak amplifier will be low. Conversely, when the load impedance of the carrier amplifier is low, the load impedance of the peak amplifier will be high.

[0056] In amplifiers, generally, output power decreases when load impedance increases, and output power increases when load impedance decreases. As described above, in a Doherty amplifier, the behavior of the load impedance of the carrier amplifier and the peak amplifier is reversed. Therefore, the load impedance R of the radiating element ANT changes due to load variation ANT becomes larger than the characteristic impedance R L (R L <R ANT ), the output power of the peak amplifier decreases, and the output power of the carrier amplifier increases. Conversely, when the load impedance R of the radiating element ANT becomes smaller than the characteristic impedance R L (R L >R ANT ), the output power of the peak amplifier increases, and the output power of the carrier amplifier decreases.

[0057] In a configuration where high-frequency signals are supplied from a Doherty amplifier to each of the four feeding points of the radiating element ANT and combined, when the output terminal of each amplifier circuit is directly connected to the corresponding feeding point, as in the power amplifier circuit 100X of the comparative example shown in the left diagram of FIG. 3, the load impedance R of the radiating element ANT ANT becomes larger than the characteristic impedance R L (R L <R ANT ) in the phase region (-90°<φ<90°), the output power of the peak amplifier of each amplifier circuit decreases, and the output power of the carrier amplifier increases.

[0058] When this state is viewed on the Smith chart in the right diagram of FIG. 3, for example, all peak amplifiers are located at a point PT1 on the right side of the center CP of the Smith chart, while all carrier amplifiers are located at a point PT2 on the left side of the center CP of the Smith chart. The point PT1 is a position where the output power is minimized, and the point PT2 is a position where the output power is maximized.

[0059] In this state, power fluctuations in each amplification circuit are canceled out by the decrease in peak amplifier output power and the increase in carrier amplifier output power. Furthermore, since high-frequency signals with opposite phases are supplied to feed points V1 and V2 from amplification circuits 121A and 121C, the power fluctuations of radio waves with direction DR1 as the polarization direction (vertical polarization) are canceled out by amplification circuits 121A and 121C.

[0060] Similarly, since high-frequency signals with opposite phases are supplied to the feed points H1 and H2 from the amplification circuits 121B and 121D, the power fluctuations of the radio waves with direction DR2 as the polarization direction (horizontal polarization) are canceled out by the amplification circuits 121B and 121D. As a result, the average power output from the power amplification circuit 100X has a flat characteristic across phase and the entire frequency range.

[0061] However, from this state, load fluctuations occur, changing the phase φ, and the load impedance R of the radiating element ANT ANT and characteristic impedance R L When the relative magnitudes of the peak and carrier amplifiers switch (φ=90°, 270°), the output power of both the peak amplifier and the carrier amplifier becomes equal to the average power level. As a result, power fluctuations decrease, but all amplifiers are unable to produce high power.

[0062] On the other hand, in the power amplifier circuit 100 of the embodiment shown in Figure 4, amplifier circuit 121B is connected to the radiating element ANT via a phase shift line 161B having a line length of λ / 8, amplifier circuit 121C is connected to the radiating element ANT via a phase shift line 161B having a line length of λ / 4, and amplifier circuit 121D is connected to the radiating element ANT via a phase shift line 161D having a line length of (3 / 8)λ.

[0063] These phase shift lines 161B, 161C, and 161D cause the phase at the output terminal of amplifier circuit 121B to shift by 45°, the phase at the output terminal of amplifier circuit 121C to shift by 90°, and the phase at the output terminal of amplifier circuit 121D to shift by 135°, compared to the comparative example in Figure 3.

[0064] Then, for example, the load impedance R of the radiating element ANT ANT The characteristic impedance R L Larger than (R L <R ANT In the case where the phase φ = 0° in the region, as shown in the right-hand figure of Figure 4, the peak amplifier 142A of amplifier circuit 121A and the carrier amplifier 141C of amplifier circuit 121C are located at points PT11 and PT23 to the right of the center CP of the Smith chart, respectively, while the carrier amplifier 141A of amplifier circuit 121A and the peak amplifier 142C of amplifier circuit 121C are located at points PT21 and PT13 to the left of the center CP, respectively.

[0065] Furthermore, the carrier amplifier 141B of amplification circuit 121B and the peak amplifier 142D of amplification circuit 121D are located at points PT22 and PT14 above the center CP, respectively, while the peak amplifier 142B of amplification circuit 121B and the carrier amplifier 141D of amplification circuit 121D are located at points PT12 and PT24 below the center CP, respectively.

[0066] In this case, when the phase φ changes due to load fluctuations, the points representing each amplifier rotate around the center CP on the Smith chart. As a result, no matter how the phase φ changes due to load fluctuations, at least two amplifiers will be located in the region to the left of the center CP on the Smith chart, in other words, in the region that outputs power higher than the average power. Therefore, in the power amplifier circuit 100 of this embodiment, power fluctuations in response to load fluctuations can be suppressed across the entire phase range, and the output power of any of the amplifier circuits can be maintained above the average power at any phase. Thus, robustness against load fluctuations can be further improved.

[0067] (Operation of a power amplifier circuit) In the power amplifier circuit 100, since each amplifier circuit employs a Doherty amplifier, the efficiency of the power amplifier circuit 100 can be improved by switching the amplifier used according to the power level of the input signal pin.

[0068] The relationship between output power and efficiency associated with amplifier switching in each amplification circuit will be explained below using Figures 5 to 8.

[0069] <At maximum power> Figure 5 illustrates the output state of each amplifier when the power level of the input signal Pin is at maximum power. In Figure 5, the operating state of each amplifier is shown on the left, and graphs of the output power fluctuations due to load variations are shown on the right for the peak amplifier (upper) and carrier amplifier (lower) of each amplification circuit.

[0070] In the upper right graph, the solid line LN11 represents the output power of the peak amplifier 142A of amplifier circuit 121A, and the dashed line LN12 represents the output power of the peak amplifier 142B of amplifier circuit 121B. Furthermore, the solid line LN13 represents the output power of the peak amplifier 142C of amplifier circuit 121C, and the dashed line LN14 represents the output power of the peak amplifier 142D of amplifier circuit 121D.

[0071] In the lower right-hand graph, the solid line LN21 represents the output power of the carrier amplifier 141A of amplifier circuit 121A, and the dashed line LN22 represents the output power of the carrier amplifier 141B of amplifier circuit 121B. Furthermore, the solid line LN23 represents the output power of the carrier amplifier 141C of amplifier circuit 121C, and the dashed line LN24 represents the output power of the carrier amplifier 141D of amplifier circuit 121D.

[0072] The solid lines LN10 and LN20 represent the combined output power of the radiating element ANT. Referring to Figure 5, in the case of maximum output power, both the peak amplifier and the carrier amplifier are in operation in any of the amplification circuits 121A to 121D.

[0073] First, let's explain the amplification circuits 121A and 121C for radiating vertically polarized radio waves. In the graph on the right, the load impedance R of the radiating element ANT is shown. ANT The characteristic impedance R L If it becomes larger than (R L <R ANT ), that is, when the phase of the load impedance is 0° to 90° or 270° to 360°, the load impedance as seen from the peak amplifier 142A of the amplification circuit 121A increases, so the output power of the peak amplifier 142A decreases (line LN11). On the other hand, for the carrier amplifier 141A, because it passes through the phase shift line 131A, the load impedance as seen from the carrier amplifier 141A decreases, and the output power of the carrier amplifier 141A increases (line LN21).

[0074] Furthermore, in the amplification circuit 121C, when the phase is 0° to 90° and 270° to 360°, the signal passes through the phase-shift line 161C with a line length of λ / 4, thus reducing the load impedance as seen from the peak amplifier 142C. As a result, the output power of the peak amplifier 142C increases due to the reduction in load (line LN13). On the other hand, for the carrier amplifier 141C, the load impedance as seen from the carrier amplifier 141C increases due to the phase-shift line 131C, so the output power of the carrier amplifier 141C decreases (line LN23).

[0075] Therefore, the power fluctuations are offset by the decrease in output power of the peak amplifier 142A and the carrier amplifier 141C, and the increase in output power of the carrier amplifier 141A and the peak amplifier 142C.

[0076] Furthermore, regarding the amplification circuits 121A and 121C, the load impedance R ANT The characteristic impedance R L If it becomes smaller than (R ANT <R L), that is, when the phase of the load impedance is between 90° and 270°, the load impedance as seen from the peak amplifier 142A of the amplification circuit 121A decreases, so the output power of the peak amplifier 142A increases (line LN11). On the other hand, for the carrier amplifier 141A, because it passes through the phase shift line 131A, the load impedance as seen from the carrier amplifier 141A increases, and the output power of the carrier amplifier 141A decreases (line LN21).

[0077] Furthermore, in the amplification circuit 121C, when the phase is between 90° and 270°, the load impedance as seen from the peak amplifier 142C increases because the signal passes through the phase shift line 161C with a line length of λ / 4. As a result, the output power of the peak amplifier 142C decreases due to the reduction in load (line LN13). On the other hand, for the carrier amplifier 141C, the load impedance as seen from the carrier amplifier 141C decreases due to the phase shift line 131C, so the output power of the carrier amplifier 141C increases (line LN23).

[0078] Therefore, the power fluctuations are offset by the increase in output power of the peak amplifier 142A and the carrier amplifier 141C, and by the decrease in output power of the carrier amplifier 141A and the peak amplifier 142C.

[0079] Next, the amplification circuits 121B and 121D for radiating horizontally polarized radio waves will be described. Amplifier circuit 121B is connected to the radiating element ANT via a phase shift line 161B with a line length of λ / 8. Therefore, the load impedance of amplifier circuit 121B as seen from the peak amplifier 142B is 90° out of phase compared to the load impedance of amplifier circuit 121A as seen from the peak amplifier 142A.

[0080] Therefore, the load impedance as seen from the amplifier circuit 121B increases when the phase is between 0° and 180°, and decreases when the phase is between 180° and 360°. As a result, for the peak amplifier 142B, the output power decreases when the phase is between 0° and 180°, and increases when the phase is between 180° and 360° (line LN12).

[0081] On the other hand, the load impedance as seen from the carrier amplifier 141B decreases when the phase is between 0° and 180° and increases when the phase is between 180° and 360° because it passes through the phase shift line 131B. Therefore, for the carrier amplifier 141B, the output power increases when the phase is between 0° and 180° and decreases when the phase is between 180° and 360° (line LN22).

[0082] Furthermore, the amplifier circuit 121D is connected to the radiating element ANT via a phase-shift transmission line 161D with a transmission line length of (3 / 8)λ, and its transmission line length is λ / 4 longer than that of the amplifier circuit 121B. Therefore, the change in load impedance as seen from the amplifier circuit 121D is the opposite of the change in load impedance as seen from the amplifier circuit 121B.

[0083] Therefore, the load impedance as seen from the amplification circuit 121D decreases when the phase is between 0° and 180°, and increases when the phase is between 180° and 360°. As a result, for the peak amplifier 142D, the output power increases when the phase is between 0° and 180°, and decreases when the phase is between 180° and 360° (line LN14).

[0084] On the other hand, the load impedance as seen from the carrier amplifier 141D increases when the phase is between 0° and 180° and decreases when the phase is between 180° and 360°, because it passes through the phase shift line 131D. Therefore, for the carrier amplifier 141D, the output power decreases when the phase is between 0° and 180° and increases when the phase is between 180° and 360° (line LN24).

[0085] Therefore, when the phase is between 0° and 180°, the power fluctuations are canceled out by the decrease in output power of the peak amplifier 142B and the carrier amplifier 141D, and by the increase in output power of the carrier amplifier 141B and the peak amplifier 142D.

[0086] Furthermore, when the phase is between 180° and 360°, power fluctuations are canceled out by the increase in output power of the peak amplifier 142B and the carrier amplifier 141D, and the decrease in output power of the carrier amplifier 141B and the peak amplifier 142D. This makes it possible to suppress power fluctuations in response to load fluctuations across the entire phase range.

[0087] Furthermore, at phases of 90° and 270°, when the output power of amplifiers 121A and 121C switches between increasing and decreasing, the output power of the peak amplifier or carrier amplifier of amplifiers 121B and 121D increases. Similarly, at phases of 0° and 180°, when the output power of amplifiers 121B and 121D switches between increasing and decreasing, the output power of the peak amplifier or carrier amplifier of amplifiers 121A and 121C increases. This allows the output power of any of the amplifiers to be higher than the average power across the entire phase range in response to load fluctuations. Therefore, robustness to load fluctuations can be improved while ensuring a sufficient power level for output.

[0088] <When power levels drop> Next, we will describe the operating state of the power amplifier circuit 100 when the power level of the input signal Pin drops from its maximum power. Since each amplifier in the power amplifier circuit 100 is a Doherty amplifier, the overall efficiency of the power amplifier circuit 100 can be improved by increasing the load impedance by appropriately stopping the amplifier according to the power level of the input signal Pin.

[0089] In this embodiment, the power amplifier circuit 100 operates by switching between four operating modes depending on the power level of the input signal Pin. In each operating mode, the power supply voltage Vcc from the power supply circuit 40 is switched between four levels, VC1 to VC4, depending on the power level of the input signal Pin (VC1>VC2>VC3>VC4). As described above, when the power level of the input signal Pin is at maximum power (first power value), the power supply voltage Vcc is set to VC1.

[0090] (1) When 6dB back off First, using Figure 6, we will explain the operating mode when the power level of the input signal Pin is a second power value, which is slightly lower than the maximum power. In this case, the power supply voltage Vcc is set to VC2.

[0091] In Figure 6, and in Figures 7 and 8 described later, the operating state of each amplifier in the power amplification circuit 100 in each case is shown on the left. The upper right section shows a graph of the output power fluctuation due to load fluctuations for the carrier amplifier. The lower right section shows a graph representing the relationship between output power and efficiency when the amplifier is switched.

[0092] In the graph shown in the lower right, the horizontal axis represents the power level of the input signal Pin, and the vertical axis represents the efficiency of the power amplifier circuit 100. The solid line LN30 shows the efficiency of the power amplifier circuit 100 in this embodiment, while the dashed line LN31 shows the efficiency when a Class AB amplifier capable of outputting the same maximum power as the power amplifier circuit 100 is used alone. In this graph, operating mode (I) represents the case of maximum power, operating mode (II) represents the case where the power level is the second power value, operating mode (III) represents the case where the power level is the third power value which is even lower than the second power value, and operating mode (IV) represents the case where the power level is the fourth power value which is even lower than the third power value.

[0093] In operating mode (II) shown in Figure 6, the peak amplifier is de-driven in each amplification circuit, and only the carrier amplifier is driven. In this case, the load impedance of each carrier amplifier is doubled compared to the maximum power case. This increases the efficiency of the carrier amplifier, enabling a 6dB backoff, and improving efficiency compared to using a single Class AB amplifier.

[0094] In this case, only the carrier amplifier is driven, but the amplification circuits 121B to 121D are connected to the corresponding feed points of the radiating element ANT via phase shift lines 161B to 161D. Therefore, as shown in the upper right graph, the power fluctuations of carrier amplifiers 141A and 141C cancel each other out, and the power fluctuations of carrier amplifiers 141B and 141D also cancel each other out. Consequently, even at 6dB backoff, power fluctuations in response to load fluctuations can be suppressed across the entire phase range.

[0095] Furthermore, the phase shift lines 161B to 161D offset the phase of the output power of carrier amplifiers 141B and 141D by 90° relative to the output power of carrier amplifiers 141A and 141C. This allows the output power of any of the amplifier circuits to be higher than the average power across the entire phase range in response to load fluctuations. Therefore, robustness to load fluctuations can be improved while ensuring a sufficient output power level.

[0096] (2) When 12dB back off Next, using Figure 7, we will explain the operating mode (III) for a third power value with an even lower power level. In this case, the power supply voltage Vcc is set to VC3.

[0097] In operating mode (III) shown in Figure 7, the power level decreases further, so the carrier amplifier 141B of amplifier circuit 121B and the carrier amplifier 141D of amplifier circuit 121D are further deactivated compared to the state shown in Figure 6. In other words, only the carrier amplifier 141A of amplifier circuit 121A and the carrier amplifier 141C of amplifier circuit 121C are activated. In this case, high-frequency signals are no longer supplied to the feed points H1 and H2, so only vertically polarized radio waves are radiated.

[0098] Furthermore, at this time, the load impedance of the operating carrier amplifiers 141A and 141C becomes twice as high as in the case of Figure 6, and four times higher than at maximum power. This increases the efficiency of the carrier amplifiers 141A and 141C, resulting in an additional 6dB of backoff, and a total backoff of 12dB can be achieved.

[0099] In operation mode (III) shown in Figure 7, the power fluctuations of carrier amplifiers 141A and 141C cancel each other out, thus suppressing power fluctuations in response to load fluctuations across the entire phase range. However, since carrier amplifiers 141B and 141D are not driven, it becomes impossible to output power greater than the average power at 90° and 270° phases. Nevertheless, in operation mode (III), the power level is significantly lower than in operation mode (I) at maximum power, and the impact of power fluctuations occurring in specific cases where the phase is 90° or 270° is very small on the overall characteristics of the power amplifier circuit 100. Therefore, it does not pose a major practical problem.

[0100] (3) When 18dB back off Next, using Figure 8, we will explain the operating mode for a fourth power value with an even lower power level. In this case, the power supply voltage Vcc is set to VC4.

[0101] In operating mode (IV) shown in Figure 8, in addition to the state shown in Figure 7, the carrier amplifier 141C of the amplification circuit 121C is further deactivated, and only the carrier amplifier 141A of the amplification circuit 121A is activated. In this case as well, only vertically polarized radio waves are emitted.

[0102] Furthermore, at this time, the shutdown of carrier amplifier 141C causes the load impedance of the operating carrier amplifier 141A to double compared to the case in Figure 7, and become eight times greater than at maximum power. This increases the efficiency of carrier amplifier 141A, resulting in an additional 6dB of backoff, and a total backoff of 18dB can be achieved.

[0103] In the operating state shown in Figure 8, only one amplifier is driven, so power fluctuations due to load changes can no longer be offset. However, since this operating mode is applied to an operating region with very low output power, power fluctuations due to load changes do not result in significant losses. Therefore, it does not pose a practical problem.

[0104] As described above, in a transmitting circuit that amplifies and transmits a high-frequency signal to a radiating element having four feed points, by supplying a high-frequency signal from a Doherty amplifier to each feed point, and by arranging phase-shift lines with line lengths differing by λ / 8 in the lines from each amplification circuit to the corresponding feed point, fluctuations in output power due to load fluctuations can be suppressed across the entire phase range, and the output power of any of the amplification circuits can be made higher than the average power. Therefore, the robustness of the transmitting circuit against load fluctuations can be improved.

[0105] Furthermore, by appropriately switching the operating state of each amplifier in the amplification circuit according to the power level of the output signal, a backoff amount of 18dB can be achieved.

[0106] In the embodiment, "power supply point V1," "power supply point H1," "power supply point V2," and "power supply point H2" correspond to "first power supply point" to "fourth power supply point" in this disclosure, respectively. In the embodiment, "amplifier circuit 121A" to "amplifier circuit 121D" correspond to "first amplifier circuit" to "fourth amplifier circuit" in this disclosure, respectively. In the embodiment, "phase shift line 161B" to "phase shift line 161D" correspond to "first phase shift line" to "third phase shift line" in this disclosure, respectively. In the embodiment, each of "phase shift line 131A" to "phase shift line 131D" corresponds to "fourth phase shift line" in this disclosure. In the embodiment, "balun 110" corresponds to "second balun" in this disclosure. In the embodiment, "Hybrid Coupler 115A" and "Hybrid Coupler 115B" correspond to "First Hybrid Coupler" and "Second Hybrid Coupler" in this disclosure, respectively. In the embodiment, "Phase Shift Line 116B", "Phase Shift Line 117D", "Phase Shift Line 117B", and "Phase Shift Line 116D" correspond to "Sixth Phase Shift Line" to "Ninth Phase Shift Line" in this disclosure, respectively.

[0107] [Differentiation] In the power amplifier circuit 100 of the embodiment, a configuration in which each amplifier circuit is a current-combining type Doherty amplifier was described. In the modified example, a configuration in which each amplifier circuit is a voltage-combining type Doherty amplifier will be described.

[0108] Figure 9 shows the detailed configuration of the power amplifier circuit 100A in a modified transmission circuit. In power amplifier circuit 100A, the amplifier circuits 121A to 121D in power amplifier circuit 100 are replaced with amplifier circuits 122A to 122D. In power amplifier circuit 100A, elements that overlap with power amplifier circuit 100 are not repeated.

[0109] Referring to Figure 9, each of the amplifier circuits 122A to 122D in the power amplifier circuit 100A is a voltage-combining type Doherty amplifier, which includes a carrier amplifier, a peak amplifier, a phase-shift line with a line length of λ / 4, and a balun. The balun is a transformer-type balun, which includes a primary winding and a secondary winding.

[0110] More specifically, the amplification circuit 122A includes a carrier amplifier 141A, a peak amplifier 142A, a phase shift line 171A, and a balun TR1. The carrier amplifier 141A is connected to one end of the primary winding of the balun TR1. The peak amplifier 142A is connected to the other end of the primary winding of the balun TR1 via the phase shift line 171A. One end of the secondary winding of the balun TR1 is connected to the feed point V1 of the radiating element ANT via the output terminal T1. The other end of the secondary winding of the balun TR1 is grounded.

[0111] The amplification circuit 122B includes a carrier amplifier 141B, a peak amplifier 142B, a phase shift line 171B, and a balun TR2. The carrier amplifier 141B is connected to one end of the primary winding of the balun TR2. The peak amplifier 142B is connected to the other end of the primary winding of the balun TR2 via the phase shift line 171B. One end of the secondary winding of the balun TR2 is connected to the feed point H1 of the radiating element ANT via the phase shift line 161B and output terminal T2. The other end of the secondary winding of the balun TR2 is grounded.

[0112] The amplification circuit 122C includes a carrier amplifier 141C, a peak amplifier 142C, a phase shift line 171C, and a balun TR3. The carrier amplifier 141C is connected to one end of the primary winding of the balun TR3. The peak amplifier 142C is connected to the other end of the primary winding of the balun TR3 via the phase shift line 171C. One end of the secondary winding of the balun TR3 is connected to the feed point V2 of the radiating element ANT via the phase shift line 161C and output terminal T3. The other end of the secondary winding of the balun TR3 is grounded.

[0113] The amplification circuit 122D includes a carrier amplifier 141D, a peak amplifier 142D, a phase shift line 171D, and a balun TR4. The carrier amplifier 141D is connected to one end of the primary winding of the balun TR4. The peak amplifier 142D is connected to the other end of the primary winding of the balun TR4 via the phase shift line 171D. One end of the secondary winding of the balun TR4 is connected to the feed point H2 of the radiating element ANT via the phase shift line 161D and output terminal T4. The other end of the secondary winding of the balun TR4 is grounded.

[0114] With this configuration, signals are supplied to the four feed points of the radiating element ANT, each shifted in phase by 90° in the rotational direction relative to the center of the radiating element ANT, and these signals are combined within the radiating element ANT. As a result, the signals supplied from amplifier circuit 122A and amplifier circuit 122C cancel each other out for vertically polarized radio waves caused by load fluctuations. Similarly, the signals supplied from amplifier circuit 122B and amplifier circuit 122D cancel each other out for horizontally polarized radio waves caused by load fluctuations. Therefore, fluctuations in output power due to load fluctuations can be suppressed across the entire phase range.

[0115] Furthermore, phase shift lines 161B, 161C, and 161D, respectively, are arranged at the output terminals of amplifier circuits 122B to 122D. As a result, the phase at the output terminal of amplifier circuit 122B is shifted by 45°, the phase at the output terminal of amplifier circuit 122C is shifted by 90°, and the phase at the output terminal of amplifier circuit 122D is shifted by 135° relative to the phase of the signal supplied to the radiating element ANT. This creates a 90° phase difference between the power fluctuations of the signals supplied by amplifier circuits 122B and 122D, and the power fluctuations of the signals supplied by amplifier circuits 122A and 122C, due to load fluctuations of the radiating element ANT. Therefore, the output power of any of the amplifier circuits can be made higher than the average power across the entire phase range. Consequently, robustness to load fluctuations can be improved even in the communication device 1 equipped with the power amplifier circuit 100A.

[0116] Furthermore, since each of the amplification circuits 122A to 122D is a Doherty amplifier, a back-off amount of 18 dB can be achieved by appropriately switching the operating state of each amplifier in the amplification circuit according to the power level of the output signal, similar to the power amplification circuit 100 of the embodiment.

[0117] In the modified example, "amplifier circuits 122A" to "amplifier circuits 122D" correspond to "first amplifier circuit" to "fourth amplifier circuit" in this disclosure, respectively. In the modified example, each of "phase shift lines 171A" to "phase shift line 171D" corresponds to "fifth phase shift line" in this disclosure. In the modified example, each of "balun TR1" to "balun TR4" corresponds to "first balun" in this disclosure.

[0118] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of the present invention is indicated by the claims rather than by the description of the embodiments above, and all modifications within the meaning and scope equivalent to the claims are intended to be included. [Explanation of symbols]

[0119] 1 Communication device, 10 Transmitter circuit, 20 BBIC, 30 RFIC, 40 Power supply circuit, 50 Bias control circuit, 100, 100A, 100X Power amplifier circuit, 105 Branch circuit, 110, TR1~TR4 Balun, 115A, 115B Hybrid coupler, 116B, 116D, 117B, 117D, 131A~131D, 161B~161D, 171A~171D Phase shift line, 121A~121D, 122A~122D Amplifier circuit, 125A~125D, 126A~126D Drive amplifier, 141A~141D Carrier amplifier, 142A~142D Peak amplifier, 151A~151D Impedance converter, 410 MPC, 420 Power selection circuit, 430 Digital envelope tracker, 1611C, 1612C, 1611D~1613D transmission lines, ANT radiating element, GND ground potential, H1, H2, V1, V2 feed points, T0, T5, T6 input terminals, T1~T4 output terminals.

Claims

1. A transmitting circuit that amplifies and transmits a high-frequency signal to a flat-plate shaped radiating element having a first feed point, a second feed point, a third feed point, and a fourth feed point, A first amplifier circuit, a second amplifier circuit, a third amplifier circuit, and a fourth amplifier circuit that supply high-frequency signals to the first, second, third, and fourth feed points, respectively. A first phase shift line connected between the second amplification circuit and the second power supply point, A second phase shift line connected between the third amplification circuit and the third power supply point, The system comprises a third phase shift line connected between the fourth amplification circuit and the fourth power supply point, The first and third feeding points are positioned along the first direction, offset from the center of the radiating element in opposite directions. The second and fourth feeding points are positioned at locations offset in opposite directions from the center of the radiating element along a second direction intersecting the first direction. When the wavelength of the high-frequency signal supplied to the radiating element is denoted as λ, The length of the first phase shift line is λ / 8. The length of the second phase shift line is λ / 4. A transmitting circuit in which the line length of the third phase shift line is (3 / 8)λ.

2. The first direction and the second direction are orthogonal, The phase of the high-frequency signal supplied to the second power supply point leads the phase of the high-frequency signal supplied to the first power supply point by 90°. The phase of the high-frequency signal supplied to the third power supply point leads the phase of the high-frequency signal supplied to the second power supply point by 90°. The transmitting circuit according to claim 1, wherein the phase of the high-frequency signal supplied to the fourth power supply point leads the phase of the high-frequency signal supplied to the third power supply point by 90°.

3. Each of the first, second, third, and fourth amplification circuits is a Doherty amplifier including a carrier amplifier and a peak amplifier. The transmitting circuit according to claim 1 or claim 2, wherein in each amplification circuit, the carrier amplifier is supplied with a signal that is 90° ahead in phase of the high-frequency signal supplied to the peak amplifier.

4. The transmitting circuit according to claim 3, wherein when the power level of the high-frequency signal output from the radiating element is a first power value, the carrier amplifier and peak amplifier of each amplification circuit are driven.

5. If the power level of the high-frequency signal output from the radiating element is a second power value that is smaller than the first power value, The carrier amplifier of each amplification circuit is set to the driven state. The transmitting circuit according to claim 4, wherein the peak amplifier of each amplification circuit is in a non-driven state.

6. If the power level of the high-frequency signal output from the radiating element is a third power value that is smaller than the second power value, In the first and third amplification circuits, the carrier amplifier is driven and the peak amplifier is dedriven. The transmitting circuit according to claim 5, wherein both the carrier amplifier and the peak amplifier in the second and fourth amplification circuits are in a non-driven state.

7. If the power level of the high-frequency signal output from the radiating element is a fourth power value that is smaller than the third power value, In the first amplification circuit, the carrier amplifier is in a driven state and the peak amplifier is in a dedriven state. The transmitting circuit according to claim 6, wherein both the carrier amplifier and the peak amplifier in the second amplifier circuit, the third amplifier circuit, and the fourth amplifier circuit are in a non-driven state.

8. Each of the first amplifier circuit, the second amplifier circuit, the third amplifier circuit, and the fourth amplifier circuit is: A fourth phase shift line having a line length of λ / 4 is connected between the output terminal of the carrier amplifier and the output terminal of the peak amplifier, The transmitting circuit according to any one of claims 3 to 7, further comprising an impedance converter connected to the output terminal of a peak amplifier.

9. Each of the first amplifier circuit, the second amplifier circuit, the third amplifier circuit, and the fourth amplifier circuit is: A fifth phase shift line having a line length of λ / 4, Further including an unbalanced terminal, and a first balun including a first balanced terminal and a second balanced terminal, The output terminal of the carrier amplifier is connected to the first balanced terminal of the first balun. The transmitting circuit according to any one of claims 3 to 7, wherein the first end of the fifth phase shift line is connected to the second balanced terminal of the first balun, and the second end is connected to the output terminal of the peak amplifier.

10. Input terminals, An unbalanced terminal connected to the input terminal, and a second balun including a first balanced terminal and a second balanced terminal, A first hybrid coupler having a first output terminal and a second output terminal, which outputs signals from the first balanced terminal of the second balun from the first output terminal and the second output terminal, The device further comprises a second hybrid coupler having a third output terminal and a fourth output terminal, which outputs signals from the second balanced terminal of the second balun from the third output terminal and the fourth output terminal, The signal output from the first output terminal is It is supplied to the carrier amplifier of the second amplification circuit via a sixth phase shift line having a line length of λ / 8, The following is supplied to the peak amplifier of the third amplification circuit: The signal output from the second output terminal is It is connected to the peak amplifier of the first amplification circuit, Connected to the carrier amplifier of the third amplification circuit, The signal output from the third output terminal is It is connected to the carrier amplifier of the first amplification circuit, It is connected to the peak amplifier of the fourth amplification circuit via a seventh phase shift line having a line length of λ / 8, The signal output from the fourth output terminal is It is supplied to the peak amplifier of the second amplification circuit via an eighth phase shift line having a line length of λ / 8, The transmitting circuit according to any one of claims 3 to 9, connected to the carrier amplifier of the fourth amplification circuit via a ninth phase shift line having a line length of λ / 8.

11. A transmitting circuit according to any one of claims 1 to 10, A signal processing circuit that processes the high-frequency signal supplied to the transmission circuit, A communication device comprising: a radiating element that radiates a high-frequency signal amplified by the transmitting circuit as radio waves.

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