solar cells

Abstract

To provide a solar cell with relatively high photoelectric conversion efficiency. [Solution] A solar cell comprising: a crystalline silicon substrate; a first semiconductor layer laminated on the back side of the crystalline silicon substrate; a second semiconductor layer laminated on the front side of the crystalline silicon substrate; a back electrode layer laminated on the back side of the second semiconductor layer; an intermediate layer laminated on the front side of the first semiconductor layer; a third semiconductor layer laminated on the front side of the intermediate layer; a perovskite photoelectric conversion layer laminated on the front side of the third semiconductor layer; a fourth semiconductor layer laminated on the front side of the perovskite photoelectric conversion layer; and a surface electrode layer laminated on the front side of the fourth semiconductor layer, wherein the solar cell has separation grooves formed to separate the outer edges of the third semiconductor layer, the perovskite photoelectric conversion layer, the fourth semiconductor layer, and the surface electrode layer.

Description

Technical Field

[0001] The present invention relates to a solar battery cell.

Background Art

[0002] The use of solar cells as an energy source with low environmental impact is expanding. When solar cells are installed in various devices, vehicles, buildings, etc., the installable area is limited, so the photoelectric conversion efficiency of solar battery cells can be important. As solar battery cells with high photoelectric conversion efficiency, development of tandem-type solar battery cells formed by stacking two types of photoelectric conversion layers having different absorption wavelengths is progressing. As an example, a monolithic tandem-type solar battery cell has been proposed in which a perovskite photoelectric conversion body having a perovskite photoelectric conversion layer excellent in photoelectric conversion efficiency in a short wavelength region is directly laminated on the surface of a crystalline silicon solar cell having a wide absorption wavelength range (see, for example, Patent Document 1).

Prior Art Literature

Patent Literature

[0003]

Patent Document 1

Summary of the Invention

Problem to be Solved by the Invention

[0004] Crystalline silicon solar cells tend to have crystal defects formed in their outer peripheral portions. In a monolithic tandem-type solar battery cell, the current of the perovskite photoelectric conversion body is also limited by the crystal defects of the crystalline silicon solar cell. Even if the current limitation due to crystal defects in the crystalline silicon solar cell is local, the current limitation of the perovskite photoelectric conversion body spreads over a relatively wide range, and the optimal operating point of the entire solar battery cell is shifted, whereby the decrease in photoelectric conversion efficiency of the entire solar battery cell can be relatively large. Therefore, an object of the present invention is to provide a solar battery cell with relatively high photoelectric conversion efficiency.

Means for Solving the Problem

[0005] (1) A solar cell according to one aspect of the present invention comprises a crystalline silicon substrate, a first semiconductor layer laminated on the back side of the crystalline silicon substrate, a second semiconductor layer laminated on the front side of the crystalline silicon substrate, a back electrode layer laminated on the back side of the first semiconductor layer, an intermediate layer laminated on the front side of the second semiconductor layer, a third semiconductor layer laminated on the front side of the intermediate layer, a perovskite photoelectric conversion layer laminated on the front side of the third semiconductor layer, a fourth semiconductor layer laminated on the front side of the perovskite photoelectric conversion layer, and a surface electrode layer laminated on the front side of the fourth semiconductor layer, wherein the third semiconductor layer, the perovskite photoelectric conversion layer, the fourth semiconductor layer, and the surface electrode layer are separated by separation grooves formed to separate the outer edges.

[0006] (2) In the solar cell of (1), the separation groove may further separate the intermediate layer.

[0007] (3) In the solar cell of (2), the separation groove does not have to penetrate the second semiconductor layer. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide a solar cell with relatively high photoelectric conversion efficiency. [Brief explanation of the drawing]

[0009] [Figure 1] This is a schematic cross-sectional view of a solar cell according to one embodiment of the present invention. [Figure 2] Figure 1 is a schematic plan view of a solar cell. [Modes for carrying out the invention]

[0010] Embodiments of the present invention will be described below with reference to the drawings. For convenience, hatching and component reference numerals may be omitted in some cases; in such cases, refer to other drawings. Also, the dimensions of various components in the drawings have been adjusted for ease of viewing.

[0011] Figure 1 is a schematic cross-sectional view of a solar cell 1 according to one embodiment of the present invention. Figure 2 is a schematic plan view of the solar cell 1. The solar cell 1 comprises a crystalline silicon substrate 11, a first semiconductor layer 12, a second semiconductor layer 13, a back electrode layer 14, an intermediate layer 15, a third semiconductor layer 16, a perovskite photoelectric conversion layer 17, a fourth semiconductor layer 18, and a front electrode layer 19. In the solar cell 1, the crystalline silicon substrate 11, the first semiconductor layer 12, and the second semiconductor layer 13 constitute a first photoelectric converter, and the third semiconductor layer 16, the perovskite photoelectric conversion layer 17, and the fourth semiconductor layer 18 constitute a second photoelectric converter. In other words, the solar cell 1 is a monolithic tandem type solar cell. The solar cell 1 further has a separation groove 20 formed to separate the outer edge of the second photoelectric converter.

[0012] The crystalline silicon substrate 11 absorbs incident light and generates photocarriers (electrons and holes). The crystalline silicon substrate 11 also functions as a substrate for supporting other components. The crystalline silicon substrate 11 can be formed from a crystalline silicon material such as single-crystal silicon or polycrystalline silicon. The crystalline silicon substrate 11 can be, for example, an n-type semiconductor substrate doped with an n-type dopant in a crystalline silicon material. An example of an n-type dopant is phosphorus (P). Alternatively, the crystalline silicon substrate 11 may be a p-type semiconductor substrate doped with a p-type dopant in a crystalline silicon material. An example of a p-type dopant is boron (B). By using crystalline silicon as the material for the crystalline silicon substrate 11, the dark current is relatively small, and relatively high output (stable efficiency regardless of illuminance) can be obtained even when the intensity of incident light is low. The crystalline silicon substrate 11 may have a pyramidal, fine uneven structure called a texture structure on its main surface in order to improve the incidence rate of light.

[0013] The first semiconductor layer 12 is laminated over the entire back surface of the crystalline silicon substrate 11. The first semiconductor layer 12 is a semiconductor layer having a first conductivity type, and selectively extracts only one polarity of photocarriers from among the photocarriers generated in the crystalline silicon substrate 11. The first semiconductor layer 12 may be formed from a thin film of amorphous silicon and may contain the same dopant as the crystalline silicon substrate 11, but at a higher concentration than the crystalline silicon substrate 11. In this embodiment, the first semiconductor layer 12 is formed from a p-type semiconductor to extract holes. The first semiconductor layer 12 may be formed by a film deposition technique such as CVD or PVD.

[0014] The second semiconductor layer 13 is laminated over the entire surface side of the crystalline silicon substrate 11. The second semiconductor layer 13 is a semiconductor layer having a second conductivity type different from that of the first semiconductor layer 12, and selectively extracts carriers with a polarity different from that of the first semiconductor layer 12. The second semiconductor layer 13 can be formed from a thin film of amorphous silicon with a different dopant type from that of the first semiconductor layer 12. In this embodiment, the second semiconductor layer 13 is formed from an n-type semiconductor to extract electrons. The second semiconductor layer 13 can be formed by a film deposition technique such as CVD or PVD, similar to the first semiconductor layer 12.

[0015] The back electrode layer 14 is laminated over the entire back side of the first semiconductor layer 12. The back electrode layer 14 is a conductor for guiding the charge extracted by the first semiconductor layer 12 to the outside. The back electrode layer 14 can be formed from metal, a metal-based conductive paste, a transparent conductive oxide (TCO), etc., and may have a configuration having multiple of these. In particular, to improve adhesion with the second semiconductor layer 13, it is preferable that the back electrode layer 14 has a layer of transparent conductive oxide on the surface in contact with the second semiconductor layer 13. As the transparent conductive oxide, for example, it can be formed from indium oxide, tin oxide, zinc oxide, titanium oxide, and composite oxides thereof, and among these, it is preferable that it be formed from ITO (Indium Tin Oxide), which is indium oxide with tin added. The intermediate layer 15 can be formed by methods such as CVD, PVD, printing, coating, plating, etc., depending on its material.

[0016] The intermediate layer 15 is laminated over the entire surface side of the second semiconductor layer 13. The intermediate layer 15 is conductive and interposed between the first semiconductor layer 12 and the third semiconductor layer 16 to electrically connect the second semiconductor layer 13 and the third semiconductor layer 16. The intermediate layer 15 can be formed from a transparent conductive oxide, such as indium oxide, tin oxide, zinc oxide, titanium oxide, and composite oxides thereof, and among these, it is preferably formed from ITO, which is indium oxide with added tin. The intermediate layer 15 can be formed by film deposition techniques such as CVD and PVD.

[0017] The third semiconductor layer 16 is laminated over the entire surface side of the intermediate layer 15, and extracts charges from the perovskite photoelectric conversion layer 17 that have a different polarity from the charges extracted by the second semiconductor layer 13 from the crystalline silicon substrate 11. In this embodiment, the third semiconductor layer 16 is a hole transport layer (HTL) that extracts holes. The main material of the third semiconductor layer 16, which is a hole transport layer, is preferably a material whose highest occupied orbital is close to the valence band of the perovskite compound that performs photoelectric conversion, in order to facilitate hole transfer, and is also preferably a material whose lowest unoccupied orbital is smaller than the conduction band in order to block electrons. Specific main materials for the third semiconductor layer 16 include metal oxides such as nickel oxide (NiO) and copper oxide (Cu2O), organic materials that form self-assembled monolayers (SAMs) such as 2PACz ([2-(9H-Carbazol-9-yl)ethyl]phosphonic Acid), MeO-2PACz ([2-(3,6-Dimethoxy-9H-carbazol-9-yl)ethyl]phosphonic Acid), Me-4PACz ([4-(3,6-Dimethyl-9H-carbazol-9-yl)butyl]phosphonic Acid), and DMAcPA ((4-(2,7-dibromo-9,9-dimethylacridin-10(9H)-yl)butyl)phosphonic acid), such as PTAA (poly(triaryl amine)) and Spiro-MeOTAD ([2,2',7,7'-Tetrakis(N,N Examples of organic materials include [-di-p-methoxyphenylamino)-9,9'-spirobifluorene]). The third semiconductor layer 16 may also have a multilayer structure. The third semiconductor layer 16 can be formed by film deposition techniques such as CVD or PVD in the case of a metal oxide, or by methods such as coating in the case of an organic material.

[0018] The perovskite photoelectric conversion layer 17 is laminated over the entire surface side of the third semiconductor layer 16, contains a perovskite compound that performs photoelectric conversion, absorbs incident light and generates photocarriers. As the perovskite compound contained in the perovskite photoelectric conversion layer 17, there can be used a compound represented by ABX₃, which includes: an organic atomic group A containing at least one of a monovalent organic ammonium ion and an amidinium-based ion; a metal atom B that generates a divalent metal ion; and a halogen atom X containing at least one of iodide ion I, bromide ion Br, chloride ion Cl, and fluoride ion F. Further, the perovskite photoelectric conversion layer 17 can be formed by methods such as, for example, a sol-gel method in which the perovskite compound is synthesized in a liquid-phase coating film, and a coating method in which a solution containing a pre-synthesized perovskite compound is applied. Further, the perovskite photoelectric conversion layer 17 can also be formed by, for example, sequentially forming films of a material containing a metal halide BX and a material containing an organic atomic group halide AX, and reacting the thin films of these materials at a reaction temperature.

[0019] Examples of organic atomic group A include methylammonium MA (CH3NH3) and formamidinium FA (CH3N2). Substitution of part or all of organic atomic group A with alkali metal Am is also being considered, and such perovskite compounds are not excluded from the present invention. Examples of alkali metal Am include potassium K, cesium Cs, and rubidium Rb. Among these, cesium Cs and rubidium Rb are preferred when durability and water resistance of the solar cell 1 are important, with cesium Cs being particularly preferred from the viewpoint of cost and availability. Examples of metal atom B include lead Pb and tin Sn. When power generation efficiency of the solar cell 1 is important, it is preferable that metal atom B is mainly lead. The lower limit of the lead content in metal atom B is preferably 50% by weight, more preferably 80% by weight, and even more preferably 90% by weight, in order to achieve the desired performance. On the other hand, when the environmental impact of lead is important, it is preferable that metal atom B is mainly tin Sn. The lower limit of the proportion of tin in metal atom B is preferably 50% by weight, more preferably 80% by weight, and particularly preferably 90% by weight, in order to achieve the desired performance. As halogen atom X, at least one of iodide I, bromide Br, and chloride Cl is preferred.

[0020] Specifically, preferred perovskite compounds include, for example, methylammonium lead halides (MAPbX3) such as MAPbI3, MAPbBr3, and MAPbCl3, and formamidinium lead halides (FAPbX3) such as FAPbI3, FAPbBr3, and FAPbCl3. Note that the halogen atom X may contain multiple types, and the organic atomic group A may contain both methylammonium and formamidinium. y MA 1-y PbX3 may also be used. Furthermore, if it contains the alkali metal Am, Am y FA z MA 1-y-z PbI X AmyFA 1-y PbI XExamples include the foregoing. Am may be a single species selected from Cs, Rb and K, or may contain a plurality of species (wherein y and z are any positive integers).

[0021] The fourth semiconductor layer 18 is laminated on the entire surface side of the perovskite photoelectric conversion layer 17, and extracts charges having a polarity different from that of the third semiconductor layer 16 from the perovskite photoelectric conversion layer 17. In the present embodiment, the fourth semiconductor layer 18 is an electron transport layer (ETL) that extracts electrons. The fourth semiconductor layer 18, which is an electron transport layer, can be formed of, for example, a material mainly composed of fullerene or the like. Examples of fullerenes include C60, C70, hydrides, oxides, metal complexes thereof, and derivatives added with alkyl groups, such as PCBM ([6,6]-Phenyl-C61-Butyric Acid Methyl Ester). Further, the fourth semiconductor layer 18 may be formed of an organic material such as bathocuproine (BCP), or may be formed of an inorganic oxide such as lithium fluoride (LiF), tin oxide (SnO2), aluminum-doped zinc oxide (ZnO), or titanium oxide (TiO2). The inorganic oxide forming the fourth semiconductor layer 18 may be doped with another metal material.

[0022] The surface electrode layer 19 is an electrode paired with the back electrode layer 14, and is laminated on the entire surface side of the fourth semiconductor layer 18. The back electrode layer 14 can be formed of a transparent conductive oxide, for example, indium oxide, tin oxide, zinc oxide, titanium oxide, composite oxides thereof, etc. Among these, it is preferably formed of ITO in which tin is added to indium oxide. The surface electrode layer 19 can be formed by a film formation technique such as CVD or PVD, for example.

[0023] The separation groove 20 is formed in an endless manner to separate (continuously cut) the outer edges of the third semiconductor layer 16, the perovskite photoelectric conversion layer 17, the fourth semiconductor layer 18, and the surface electrode layer 19. This isolates the region of the second photoelectric converter where the current may be limited by defects in the crystalline silicon substrate 11, and prevents the current limitation due to defects in the crystalline silicon substrate 11 from extending to the inner region of the second photoelectric converter in a plan view. This prevents the optimal operating point of the solar cell 1 from shifting, suppressing a decrease in photoelectric conversion efficiency and heat generation at the outer edges. Preferably, the separation groove 20 is formed to further separate the intermediate layer 15 in order to more reliably eliminate the influence of the crystalline silicon substrate 11. The separation groove 20 can be formed by laser ablation. Preferably, the separation groove 20 does not penetrate (or even locally cut) the second semiconductor layer 13 so as not to create new defects in the crystalline silicon substrate 11 due to the heat of the laser forming the separation groove 20. The distance from the separation groove 20 to the outer edge of the solar cell 1 is preferably 0.1 mm or more and 3 mm or less, and more preferably 0.3 mm or more and 2 mm or less, taking into consideration the balance between the reduction in the effective area of ​​the solar cell 1 and the suppression of the shift in the optimal operating point. Furthermore, the width of the separation groove 20 is preferably 10 μm or more and 200 μm or less, and more preferably 20 μm or more and 100 μm or less, in order to ensure the reliable separation of the second photoelectric converter.

[0024] As described above, in this embodiment, the solar cell 1 is configured so that the outer edge of the second photoelectric converter is separated and not used by the separation groove 20. This prevents the rate-limiting current due to defects in the outer edge of the crystalline silicon substrate 11 from spreading to a wide area of ​​the second photoelectric converter, thereby suppressing the shift in the optimal operating point and resulting in a relatively high overall photoelectric conversion efficiency.

[0025] Although embodiments of the present invention have been described above, the present invention is not limited to the embodiments described above, and various modifications and variations are possible. In the solar cell according to the present invention, if the crystalline silicon substrate is obtained by cutting a single wafer, depending on the cutting method, a separation groove may not be formed on the cut outer edge where defects are reduced. The solar cell according to the present invention may have a multilayer structure for each layer, and may further include layers that perform additional functions. For example, the solar cell according to the present invention may be provided with a passivation layer that suppresses the recombination of photocarriers at the interface of the crystalline silicon substrate or the perovskite photoelectric conversion layer, a bonding layer interposed to improve the adhesion of each layer, and so on. Furthermore, the solar cell according to the present invention may include further configurations such as finger electrodes for guiding current from the surface electrode layer to the outside. [Explanation of symbols]

[0026] 1 solar cell 11. Crystalline silicon substrate 12. First Semiconductor Layer 13. Second Semiconductor Layer 14 Back electrode layer 15 Middle Class 16 Third Semiconductor Layer 17 Perovskite photoelectric conversion layer 18. Fourth Semiconductor Layer 19 Surface electrode layer 20 Separation groove

Claims

1. Crystalline silicon substrate and A first semiconductor layer is laminated on the back side of the crystalline silicon substrate, A second semiconductor layer is laminated on the surface side of the crystalline silicon substrate, A back electrode layer stacked on the back side of the first semiconductor layer, An intermediate layer stacked on the surface side of the second semiconductor layer, A third semiconductor layer is stacked on the surface side of the intermediate layer, A perovskite photoelectric conversion layer is stacked on the surface side of the third semiconductor layer, A fourth semiconductor layer is stacked on the surface side of the perovskite photoelectric conversion layer, A surface electrode layer stacked on the surface side of the fourth semiconductor layer, Equipped with, A solar cell having separation grooves formed to separate the outer edges of the third semiconductor layer, the perovskite photoelectric conversion layer, the fourth semiconductor layer, and the surface electrode layer.

2. The solar cell according to claim 1, wherein the separation groove further separates the intermediate layer.

3. The solar cell according to claim 2, wherein the separation groove does not penetrate the second semiconductor layer.

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