Semiconductor equipment

Abstract

The present invention provides a semiconductor device suitable for improving the junction reliability of semiconductor elements mounted using flip-chip mounting. [Solution] The semiconductor device comprises a conductive member 1 having a main surface 101 etc. facing one side in the thickness direction, and a semiconductor element 3 located on one side in the thickness direction relative to the conductive member 1 and supported by the main surface 101 etc., wherein the semiconductor element 3 has an element body 30 which is rectangular in thickness direction, a plurality of columnar portions 36A which protrude from the element body 30 to the other side in the thickness direction and are joined to the main surface 101, and a plurality of columnar portions 36B which protrude from the element body 30 to the other side in the thickness direction and are joined to the main surface 101 etc. The columnar portions 36A have a first joining surface facing the main surface 101, and the columnar portions 36B have a second joining surface which faces the main surface 101 etc. The second area of ​​the second joining surface differs from the first area of ​​the first joining surface, and of the plurality of columnar portions 36A and the plurality of columnar portions 36B, four columnar portions 36B1 are closest to each of the four corners 301 of the element body 30.

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device. [Background Art]

[0002] Various configurations have been proposed for semiconductor devices including semiconductor elements. Patent Document 1 discloses an example of a conventional semiconductor device. The semiconductor device disclosed in this document includes a lead, a semiconductor element, and a sealing resin. The semiconductor element is supported by the lead. The sealing resin covers a portion of the lead and the semiconductor element.

[0003] In the semiconductor device described in Patent Document 1, the semiconductor element is mounted on the lead by flip-chip mounting. The lead has a main surface facing one side in the thickness direction. The semiconductor element has a plurality of electrodes provided on a side opposite to the main surface, and the plurality of electrodes are bonded to the main surface of the lead via a bonding layer made of, for example, solder. Each of the plurality of electrodes includes a cylindrical pillar portion protruding toward the lead. The pillar portion is formed by electrolytic plating. The pillar portion is bonded to the lead via the bonding layer.

[0004] If the diameters of the pillar portions are different, the thickness of each of the pillar portions may vary. When there is a difference in the thickness of the pillar portions, the semiconductor element bonded to the lead may be tilted. If the semiconductor element is disposed tilted with respect to the lead, problems such as bonding defects may occur. [Prior Art Literature] [Patent Literature]

[0005] [Patent Document 1] Japanese Unexamined Patent Publication No. 2020-77694

[0006] [Summary] This disclosure was conceived under the circumstances described above, and its primary objective is to provide a semiconductor device suitable for improving the junction reliability of semiconductor elements mounted by flip-chip packaging.

[0007] A semiconductor device provided by this disclosure comprises a conductive member having a main surface facing one side in the thickness direction, and a semiconductor element located on one side in the thickness direction with respect to the conductive member and supported by the main surface, wherein the semiconductor element has a rectangular element body when viewed in the thickness direction, a plurality of first conductive columnar portions, each protruding from the element body to the other side in the thickness direction and joined to the main surface, and a plurality of second conductive columnar portions, each protruding from the element body to the other side in the thickness direction and joined to the main surface, wherein the first conductive columnar portions have a first bonding surface facing the main surface, the second conductive columnar portions have a second bonding surface facing the main surface, the second area of ​​the second bonding surface differs from the first area of ​​the first bonding surface, and of the plurality of first conductive columnar portions and the plurality of second conductive columnar portions, four of the second conductive columnar portions are closest to each of the four corners of the element body.

[0008] Other features and advantages of this disclosure will become more apparent from the detailed description below, with reference to the accompanying drawings. [Brief explanation of the drawing]

[0009] [Figure 1] Figure 1 is a perspective view showing a semiconductor device according to the first embodiment of this disclosure. [Figure 2] Figure 2 is a plan view (through the sealing resin) showing a semiconductor device according to the first embodiment of this disclosure. [Figure 3] Figure 3 is a plan view (through the encapsulating resin and semiconductor element) showing a semiconductor device according to the first embodiment of this disclosure. [Figure 4] Figure 4 is a bottom view showing a semiconductor device according to the first embodiment of this disclosure. [Figure 5] Figure 5 is a front view showing a semiconductor device according to the first embodiment of this disclosure. [Figure 6] Figure 6 is a rear view showing a semiconductor device according to the first embodiment of this disclosure. [Figure 7] Figure 7 is a right side view showing a semiconductor device according to the first embodiment of this disclosure. [Figure 8] Figure 8 is a left side view showing a semiconductor device according to the first embodiment of this disclosure. [Figure 9] Figure 9 is a cross-sectional view along the line IX-IX in Figure 3. [Figure 10] Figure 10 is a cross-sectional view along line XX in Figure 3. [Figure 11] Figure 11 is a cross-sectional view along the line XI-XI in Figure 3. [Figure 12] Figure 12 is a cross-sectional view along the line XII-XII in Figure 3. [Figure 13] Figure 13 is a cross-sectional view along the line XIII-XIII in Figure 3. [Figure 14] Figure 14 is an enlarged view of Figure 10. [Figure 15] Figure 15 is a magnified view of a portion of Figure 14 (near the first conductive columnar section). [Figure 16] Figure 16 is a magnified view of a portion of Figure 14 (near the second conductive columnar section). [Figure 17] Figure 17 is a magnified view of a portion of Figure 14 (near the second conductive columnar section). [Figure 18] Figure 18 is a plan view (through the encapsulating resin and semiconductor element) showing a semiconductor device according to the second embodiment of this disclosure. [Figure 19] Figure 19 is a partially enlarged cross-sectional view showing a semiconductor device according to a second embodiment of the present disclosure. [Figure 20] Figure 20 is a partially enlarged cross-sectional view along the line XX-XX in Figure 19. [Figure 21] Figure 21 is a partial plan view (transparent through the encapsulating resin and semiconductor element) showing a semiconductor device according to the third embodiment of this disclosure.

[0010] [Detailed explanation] Hereinafter, preferred embodiments of the present disclosure will be specifically described with reference to the drawings.

[0011] Hereinafter, identical or similar components are denoted by the same reference numerals, and duplicate descriptions are omitted. The terms "first", "second", "third" and the like in the present disclosure are used merely as labels, and are not necessarily intended to impose an order on their objects.

[0012] In the present disclosure, the phrases "a certain object A is formed on a certain object B" and "a certain object A is formed on (top of) a certain object B" include, unless otherwise specifically stated, both "a certain object A is directly formed on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B". Similarly, the phrases "a certain object A is disposed on a certain object B" and "a certain object A is disposed on (top of) a certain object B" include, unless otherwise specifically stated, both "a certain object A is directly disposed on a certain object B" and "a certain object A is disposed on a certain object B with another object interposed between the certain object A and the certain object B". Similarly, the phrase "a certain object A is located on (top of) a certain object B" includes, unless otherwise specifically stated, both "a certain object A is located on (top of) a certain object B in contact with the certain object B" and "a certain object A is located on (top of) a certain object B with another object interposed between the certain object A and the certain object B". In addition, the phrase "when viewed in a certain direction, a certain object A overlaps a certain object B" includes, unless otherwise specifically stated, both "a certain object A overlaps the entire of a certain object B" and "a certain object A overlaps a part of a certain object B". Furthermore, the phrase "(the material of) a certain object A contains a certain material C" includes both "the (material of the) certain object A consists of the certain material C" and "the main component of the (material of the) certain object A is the certain material C". In addition, in the present disclosure, the phrase "a certain surface A faces (one side or the other side of) a direction B" is not limited to the case where the angle of the surface A relative to the direction B is 90°, and also includes the case where the surface A is inclined relative to the direction B.

[0013] <First Embodiment> A semiconductor device according to the first embodiment of the present disclosure will be described with reference to FIGS. 1 to 17. The semiconductor device A10 of the present embodiment includes first leads 10A, 10B, 10C, a plurality of second leads 21, a pair of third leads 22, a semiconductor element 3, a plurality of bonding materials 5, a plurality of metal layers 6, and a sealing resin 40. The package type of the semiconductor device A10 is not particularly limited, and in the present embodiment, as shown in FIG. 1, it is a QFN (Quad Flat Non-leaded package) type. In addition, the application and function of the semiconductor device A10 are not limited at all. Examples of applications of the semiconductor device A10 include electronic device applications, general industrial equipment applications, automotive applications, and the like. In addition, as functions of the semiconductor device A10, for example, a DC / DC converter, an AC / DC converter, and the like can be appropriately mentioned. The semiconductor element 3 is a flip-chip type LSI. A switching circuit 321 and a control circuit 322 (details of each will be described later) are formed inside the semiconductor element 3. In the semiconductor device A10, DC power (voltage) is converted into AC power (voltage) by the switching circuit 321. The semiconductor device A10 is used, for example, as one element constituting a circuit of a DC / DC converter.

[0014] Figure 1 is a perspective view showing semiconductor device A10. Figure 2 is a plan view showing semiconductor device A10. In Figure 2, for ease of understanding, the outline of the sealing resin 40 is shown by dashed lines (double-dotted lines) through the sealing resin 40. Figure 3 is a plan view showing semiconductor device A10. In Figure 3, for ease of understanding, the outlines of the sealing resin 40 and semiconductor element 3 are shown by dashed lines (double-dotted lines) through the sealing resin 40 and semiconductor element 3. Figure 4 is a bottom view showing semiconductor device A10. Figure 5 is a front view showing semiconductor device A10. Figure 6 is a rear view showing semiconductor device A10. Figure 7 is a right side view showing semiconductor device A10. Figure 8 is a left side view showing semiconductor device A10. Figure 9 is a cross-sectional view along the line IX-IX in Figure 3. Figure 10 is a cross-sectional view along the line XX in Figure 3. Figure 11 is a cross-sectional view along the line XI-XI in Figure 3. Figure 12 is a cross-sectional view along the line XII-XII in Figure 3. Figure 13 is a cross-sectional view along the line XIII-XIII in Figure 3. Figure 14 is an enlarged view of Figure 10. Figure 15 is a partially enlarged view of Figure 14 (near the first conductive columnar portion 36A, which will be described later). Figure 16 is a partially enlarged view of Figure 14 (near the second conductive columnar portion 36B, which will be described later). Figure 17 is a partially enlarged view of Figure 14 (near the corner-adjacent columnar portion 36B1, which will be described later).

[0015] The semiconductor device A10 is plate-shaped, and its shape in the thickness direction (plan view) is rectangular. In describing the semiconductor device A10, the thickness direction (plan view direction) of the semiconductor device A10 is an example of the "thickness direction" in this disclosure and is called the "thickness direction z". The direction along one side of the semiconductor device A10 that is perpendicular to the thickness direction z is called the "first direction x". The direction perpendicular to both the thickness direction z and the first direction x is called the "second direction y". As shown in Figures 1 and 2, the semiconductor device A10 is square when viewed in the thickness direction z. Also, one side of the thickness direction z corresponds to the "one side of the thickness direction" in this disclosure and is called the "z1 side of the thickness direction z", and the other side of the thickness direction z corresponds to the "other side of the thickness direction" in this disclosure and is called the "z2 side of the thickness direction z". One side of the first direction x is called the "x1 side of the first direction x", and the other side of the first direction x is called the "x2 side of the first direction x". One side of the second direction y is referred to as the "y1 side of the second direction y," and the other side of the second direction y is referred to as the "y2 side of the second direction y." The shape and dimensions of the semiconductor device A10 are not limited.

[0016] As shown in Figure 2, the first leads 10A, 10B, 10C, the multiple second leads 21, and the pair of third leads 22 support the semiconductor element 3 and also form terminals for mounting the semiconductor device A10 onto a wiring board. As shown in Figures 9 to 13, each of the first leads 10A, 10B, 10C, the multiple second leads 21, and the pair of third leads 22 is partially covered by the sealing resin 40. In Figures 1 and 4 to 8, the portions of the first leads 10A, 10B, 10C, the multiple second leads 21, and the pair of third leads 22 that are exposed from the sealing resin 40 are hatched with multiple discrete dots. Hereafter, when the first leads 10A, 10B, 10C, the multiple second leads 21, and the pair of third leads 22 are referred to collectively as "conductive member 1".

[0017] The conductive member 1 is formed, for example, by etching a metal plate. Alternatively, the conductive member 1 may be formed by punching or bending a metal plate. The first leads 10A, 10B, 10C, the plurality of second leads 21, and the pair of third leads 22 are arranged spaced apart from each other. The constituent material of the conductive member 1 is, for example, Cu or a Cu alloy, but is not limited thereto.

[0018] Each of the first leads 10A, 10B, and 10C is a strip-shaped element extending in the first direction x when viewed in the thickness direction z, as shown in Figures 3 and 4. Each of the first leads 10A, 10B, and 10C has a first main surface 101 and a first back surface 102 that face opposite each other in the thickness direction z. The first main surface 101 faces the z1 side in the thickness direction z and faces the semiconductor element 3. The first main surface 101 is covered with sealing resin 40. The first back surface 102 faces the z2 side in the thickness direction z. The first back surface 102 is exposed from the sealing resin 40. In the first leads 10A, 10B, and 10C, the semiconductor element 3 is supported by the first main surface 101. Furthermore, as shown in Figures 3 and 4, in the illustrated examples, the area of ​​the first main surface 101 is larger than the area of ​​the first back surface 102 for each of the first leads 10A, 10B, and 10C. The portion of each first lead 10A, 10B, and 10C in which the first main surface 101 does not overlap with the first back surface 102 in the thickness direction z is formed, for example, by a half-etching process from the first back surface 102 side. This portion prevents each of the first leads 10A, 10B, and 10C from falling off the resin back surface 42 of the sealing resin 40 by an anchoring effect.

[0019] The first leads 10A and 10B receive DC power (voltage) to be converted in the semiconductor device A10. In this embodiment, the first lead 10A is the positive terminal (P terminal). The first lead 10B is the negative terminal (N terminal). The first lead 10C outputs AC power (voltage) converted by the switching circuit 321 of the semiconductor element 3, which will be described later. As shown in Figure 3, the first leads 10A, 10B, and 10C are arranged along the second direction y in the order of first lead 10A, first lead 10C, and first lead 10B, from the y1 side to the y2 side in the second direction y. The first lead 10A is located between a plurality of second leads 21 and the first lead 10C in the second direction y. The first lead 10C is located between the first lead 10A and the first lead 10B in the second direction y.

[0020] As shown in Figures 3 and 4, each of the first leads 10A and 10C includes a main portion 11 and a pair of side portions 12. The main portion 11 extends in a first direction x. The pair of side portions 12 are connected to both ends of the main portion 11 in the first direction x and are smaller in dimension in the second direction y than the main portion 11. Each of the pair of side portions 12 has a first end face 121. As shown in Figure 11, the first end face 121 is connected to both the first main surface 101 and the first back surface 102 and faces in the first direction x. The first end face 121 is exposed from the sealing resin 40.

[0021] As shown in Figures 3 and 4, the first lead 10B includes a main portion 11, four side portions 12, and a plurality of projections 13. The main portion 11 extends in a first direction x. Two side portions 12 connect to the x1 side end of the main portion 11 in the first direction x. The other two side portions 12 connect to the x2 side end of the main portion 11 in the first direction x. Each of the four side portions 12 has a first end face 121. As shown in Figure 12, the first end face 121 connects to both the first main surface 101 and the first back surface 102 and faces the first direction x. The first end face 121 is exposed from the sealing resin 40. The plurality of projections 13 project from the y2 side of the main portion 11 in a second direction y. The sealing resin 40 is filled between two adjacent projections 13. Each of the plurality of projections 13 has a secondary end face 131. As shown in Figure 9, the sub-end face 131 connects to both the first main face 101 and the first back surface 102, and faces the y2 side of the second direction y. The sub-end face 131 is exposed from the sealing resin 40. As shown in Figure 7, the multiple sub-end faces 131 are arranged at predetermined intervals along the first direction x. Note that the first leads 10A, 10B, and 10C are not limited to having a main portion 11 and a side portion 12.

[0022] In each of the first leads 10A, 10B, and 10C, the first back surface 102, the pair of first end faces 121, and the multiple sub-end faces 131 exposed from the sealing resin 40 may be plated with, for example, Sn. Alternatively, instead of Sn plating, multiple metal platings, such as Ni, Pd, and Au, layered in that order, may be used.

[0023] As shown in Figure 3, the multiple second leads 21 are located on the y1 side of the second direction y than the first lead 10A. One of the multiple second leads 21 is the ground terminal of the control circuit 322 of the semiconductor element 3, which will be described later. Power (voltage) to drive the control circuit 322, or an electrical signal to be transmitted to the control circuit 322, is input to each of the other multiple second leads 21. As shown in Figures 3 and 4, each of the multiple second leads 21 has a second main surface 211, a second back surface 212, and a second end surface 213. The shape of the second leads 21 is not limited in any way.

[0024] The second main surface 211 faces the same side as the first main surface 101 of the first leads 10A, 10B, and 10C in the thickness direction z, and faces the semiconductor element 3. The second main surface 211 is covered with sealing resin 40. The semiconductor element 3 is supported by the second main surface 211. The second back surface 212 faces the opposite side from the second main surface 211. The second back surface 212 is exposed from the sealing resin 40. The second end surface 213 connects to both the second main surface 211 and the second back surface 212, and faces the y1 side of the second direction y. The second end surface 213 is exposed from the sealing resin 40. As shown in Figure 8, the multiple second end surfaces 213 are arranged at predetermined intervals along the first direction x. In addition, the two second leads 21 located at both ends of the first direction x further have a fourth end surface 214. The fourth end face 214 is a face facing the first direction x and is exposed from the sealing resin 40. Also, in the illustrated example, as shown in Figures 3 and 4, in each of the multiple second leads 21, the area of ​​the second main surface 211 is larger than the area of ​​the second back surface 212. In each second lead 21, the portion of the second main surface 211 that does not overlap with the second back surface 212 in the thickness direction z is formed, for example, by a half-etching process from the second back surface 212 side. This portion prevents each second lead 21 from falling out from the resin back surface 42 of the sealing resin 40 by an anchoring effect.

[0025] The second back surface 212, second end face 213, and fourth end face 214 of the multiple second leads 21 exposed from the sealing resin 40 may be plated with, for example, Sn. Alternatively, instead of Sn plating, multiple metal platings, such as Ni, Pd, and Au, layered in that order, may be used.

[0026] As shown in Figure 3, the pair of third leads 22 are positioned between the first lead 10A and the plurality of second leads 21 in the second direction y. The pair of third leads 22 are spaced apart from each other in the first direction x. An electrical signal or the like is input to each of the pair of third leads 22 for transmission to the control circuit 322 configured in the semiconductor element 3. As shown in Figures 3 and 4, each of the pair of third leads 22 has a third main surface 221, a third back surface 222, and a third end surface 223. The shape of the third leads 22 is not limited in any way.

[0027] The third main surface 221 faces the same side as the first main surfaces 101 of the first leads 10A, 10B, and 10C in the thickness direction z, and faces the semiconductor element 3. The third main surface 221 is covered with sealing resin 40. The semiconductor element 3 is supported by the third main surface 221. The third back surface 222 faces the opposite side from the third main surface 221. The third back surface 222 is exposed from the sealing resin 40. The third end surface 223 connects to both the third main surface 221 and the third back surface 222, and faces the first direction x. The third end surface 223 is exposed from the sealing resin 40. The third end surface 223 is arranged along the second direction y together with the first end surfaces 121 of the first leads 10A, 10B, and 10C. In the illustrated example, in each of the pair of third leads 22, the area of ​​the third main surface 221 is larger than the area of ​​the third back surface 222. In each third lead 22, the portion of the third main surface 221 that does not overlap with the third back surface 222 in the thickness direction z is formed, for example, by a half-etching process from the third back surface 222 side. This portion prevents each third lead 22 from falling out of the resin back surface 42 of the sealing resin 40 by an anchoring effect.

[0028] The third back surface 222 and third end surface 223 of the pair of third leads 22 exposed from the sealing resin 40 may be plated with, for example, Sn. Alternatively, instead of Sn plating, multiple metal platings, such as Ni, Pd, and Au, may be used in that order. The number, shape, and arrangement of the first leads 10A, 10B, 10C, the second lead 21, and the third lead 22 are not limited.

[0029] As shown in Figure 2, the semiconductor element 3 is positioned in the center of the semiconductor device A10 in the z-direction of thickness. As shown in Figures 9 to 17, the semiconductor element 3 is located on the z1 side of the z-direction of thickness with respect to the conductive member 1 (first leads 10A, 10B, 10C, a plurality of second leads 21, and a pair of third leads 22). The semiconductor element 3 is supported by the first leads 10A, 10B, 10C, a plurality of second leads 21, and a pair of third leads 22. The semiconductor element 3 is covered with a sealing resin 40. The semiconductor element 3 has an element body 30, a passivation film 33, a plurality of conductive pads 34, an insulating layer 35, a plurality of first conductive columnar portions 36A, and a plurality of second conductive columnar portions 36B. The semiconductor element 3 is a flip-chip type LSI with a circuit configured inside it.

[0030] As shown in Figure 2, the element body 30 is rectangular in the z-direction of thickness, and as shown in Figures 9 to 13, it is plate-shaped. The element body 30 forms the main part of the semiconductor element 3. As shown in Figures 9 to 13, the element body 30 has a semiconductor substrate 31 and a semiconductor layer 32.

[0031] As shown in Figures 15 to 17, the semiconductor substrate 31 has a semiconductor layer 32, a passivation film 33, a plurality of conductive pads 34, an insulating layer 35, a plurality of first conductive columnar portions 36A, and a plurality of second conductive columnar portions 36B on the z2 side in the thickness direction z. The constituent material of the semiconductor substrate 31 is, for example, Si (silicon) or silicon carbide (SiC).

[0032] As shown in Figures 9 to 13, the semiconductor layer 32 is stacked on the z2 side of the thickness direction z of the semiconductor substrate 31. The semiconductor layer 32 contains multiple types of p-type and n-type semiconductors based on differences in the amount of doped elements. The semiconductor layer 32 comprises a switching circuit 321 and a control circuit 322 that conducts to the switching circuit 321. The switching circuit 321 is a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor). In the example shown in semiconductor device A10, the switching circuit 321 is divided into two regions: a high-voltage region (upper arm circuit) and a low-voltage region (lower arm circuit). Each region is composed of one n-channel type MOSFET. The control circuit 322 comprises a gate driver for driving the switching circuit 321, a bootstrap circuit corresponding to the high-voltage region of the switching circuit 321, and controls the switching circuit 321 to drive it normally. Furthermore, the semiconductor layer 32 is further configured with a wiring layer (not shown). The switching circuit 321 and the control circuit 322 are electrically connected to each other by this wiring layer. The switching circuit 321 and the control circuit 322 are examples of the "circuit section" of this disclosure.

[0033] As shown in Figures 15 to 17, the passivation film 33 covers the z2 side surface of the semiconductor layer 32 in the thickness direction z. The passivation film 33 has electrical insulating properties. The passivation film 33 is composed of, for example, a silicon oxide film (SiO2) laminated in contact with the semiconductor layer 32 and a silicon nitride film (Si3N4) laminated on the silicon oxide film.

[0034] Multiple conductive pads 34 are formed on the z2 side of the passivation film 33 in the thickness direction z. Each of the multiple conductive pads 34 (excluding some conductive pads 34 described later) is connected to a wiring layer in the semiconductor layer 32 through an opening (not shown) provided in the passivation film 33. As a result, the conductive pads 34 (excluding some conductive pads 34) are electrically connected to either the switching circuit 321 or the control circuit 322 of the semiconductor layer 32. In this embodiment, the conductive pads 34 are composed of multiple metal layers stacked from the passivation film 33 toward the z2 side in the thickness direction z, and include a first layer 34a, a second layer 34b, and a third layer 34c. The first layer 34a is in contact with the passivation film 33 and is made of Cu. The second layer 34b is in contact with the first layer 34a and is made of Ni. The third layer 34c is in contact with the second layer 34b and is made of Pd. The configuration of the conductive pad 34 is not limited.

[0035] As shown in Figures 15 to 17, the insulating layer 35 is formed on the z2 side of the thickness direction z of the passivation film 33 and covers a portion of the passivation film 33 and the conductive pad 34. The insulating layer 35 has electrical insulating properties. In this embodiment, the constituent material of the insulating layer 35 is a phenolic resin. However, the constituent material of the insulating layer 35 is not limited, and other insulating materials such as polyimide resin may also be used. The insulating layer 35 has a plurality of openings 35a. One of the conductive pads 34 is exposed from each of the plurality of openings 35a. The insulating layer 35 is formed, for example, by applying photolithography technology to a photosensitive resin material coated by a spin coater.

[0036] As shown in Figures 9 to 14, the multiple first conductive columnar portions 36A and the multiple second conductive columnar portions 36B are interposed in the thickness direction z between the element body 30 and the first main surface 101, second main surface 211, and third main surface 221 of the conductive member 1 (first leads 10A, 10B, 10C, multiple second leads 21, and a pair of third leads 22). The multiple first conductive columnar portions 36A and the multiple second conductive columnar portions 36B protrude from the side of the element body 30 facing the first main surface 101, second main surface 211, and third main surface 221 of the conductive member 1 toward the first main surface 101, second main surface 211, and third main surface 221 of the conductive member 1. Furthermore, as shown in Figures 15 to 17, each of the multiple first conductive columnar portions 36A and the multiple second conductive columnar portions 36B is in contact with one of the conductive pads 34 through an opening 35a in the insulating layer 35. Each first conductive columnar portion 36A and each second conductive columnar portion 36B is in contact with the conductive pad 34 at its central portion in the z-direction of thickness and overlaps with the insulating layer 35 at its peripheral portion. Each first conductive columnar portion 36A and each second conductive columnar portion 36B is conductive.

[0037] As shown in Figures 15 to 17, each of the multiple first conductive columnar portions 36A and the multiple second conductive columnar portions 36B comprises a seed layer 361, a first plating layer 362, and a second plating layer 363. The seed layer 361 is in contact with the conductive pad 34 and the insulating layer 35 and contains Cu. The seed layer 361 is formed, for example, by electroless plating. The constituent material and formation method of the seed layer 361 are not limited. For example, the seed layer 361 may be formed by sputtering. The first plating layer 362 is laminated on the seed layer 361 and consists of, for example, Cu or a Cu alloy. The first plating layer 362 is formed by electroplating. The constituent material of the first plating layer 362 is not limited. The second plating layer 363 is laminated on the first plating layer 362. The second plating layer 363 is interposed between the first plating layer 362 and the bonding material 5, and serves to suppress the chemical reaction between the first plating layer 362 and the bonding material 5. The constituent material of the second plating layer 363 is not particularly limited, and a metal that can suppress the chemical reaction is appropriately selected, for example, Ni or Fe. In this embodiment, since the first plating layer 362 contains Cu and the bonding material 5 contains Sn, the second plating layer 363 is made of Ni, for example. In this embodiment, the second plating layer 363 is formed by electroplating. The constituent material and formation method of the second plating layer 363 are not limited. Also, the second plating layer 363 is not necessarily required. Each first conductive columnar portion 36A has a first bonding surface 365A. Each second conductive columnar portion 36B has a second bonding surface 365B. The first bonding surface 365A and the second bonding surface 365B are surfaces facing away from the conductive pad 34 (surfaces facing the first main surface 101, the second main surface 211, and the third main surface 221), and are bonded to the metal layer 6 formed on the first main surface 101, the second main surface 211, or the third main surface 221 via the bonding material 5.

[0038] Multiple first conductive columnar portions 36A are electrically connected to the switching circuit 321 of the semiconductor layer 32. Furthermore, multiple first conductive columnar portions 36A are electrically connected to the first main surface 101 of the first leads 10A, 10B, and 10C. As a result, the first leads 10A, 10B, and 10C are electrically connected to the switching circuit 321. The z-shaped (planar) aspect ratio in the thickness direction of the first conductive columnar portion 36A is circular, and the first bonding surface 365A of the first conductive columnar portion 36A is also circular. The diameter D1 of the first bonding surface 365A (see Figure 15) is not particularly limited, but one example is 150 μm.

[0039] Multiple second conductive columnar portions 36B (excluding some of the second conductive columnar portions 36B described later) are electrically connected to the control circuit 322 of the semiconductor layer 32. Also, as shown in Figure 3, two second conductive columnar portions 36B are electrically connected to the third main surface 221 of a pair of third leads 22. The other seven second conductive columnar portions 36B are electrically connected to the second main surface 211 of multiple second leads 21. As a result, the pair of third leads 22 and the multiple second leads 21 are electrically connected to the control circuit 322. On the other hand, the remaining two second conductive columnar portions 36B are not electrically connected to either the switching circuit 321 or the control circuit 322, and are insulated from the switching circuit 321 and the control circuit 322 (circuit section). In this embodiment, the remaining two second conductive columnar portions 36B are electrically connected to the first main surface 101 of the first lead 10B. The z-shaped aspect ratio (planar shape) of the second conductive columnar portion 36B is circular, and the second bonding surface 365B of the second conductive columnar portion 36B is also circular. The diameter D2 of the second bonding surface 365B (see Figures 16 and 17) is not particularly limited, but one example is 100 μm.

[0040] The second area S2 of the second bonding surface 365B is different from the first area S1 of the first bonding surface 365A in the first conductive columnar portion 36A. In this embodiment, the diameter D2 of the second bonding surface 365B is smaller than the diameter D1 of the first bonding surface 365A, and the second area S2 of the second bonding surface 365B is smaller than the first area S1 of the first bonding surface 365A. The first area S1 of the first bonding surface 365A is, for example, 1.2 times or more the second area S2 of the second bonding surface 365B. Preferably, the first area S1 of the first bonding surface 365A is 1.2 times or more and 5.0 times or less the second area S2 of the second bonding surface 365B. Since a larger current flows through the first conductive columnar portion 36A than through the second conductive columnar portion 36B, the first area S1 is made larger than the second area S2.

[0041] As described above, the diameter D1 of the first conductive columnar portion 36A (first area S1 of the first bonding surface 365A) is larger than the diameter D2 of the second conductive columnar portion 36B (second area S2 of the second bonding surface 365B). In forming the first conductive columnar portion 36A and the second conductive columnar portion 36B, the plating process for forming the first conductive columnar portion 36A and the second conductive columnar portion 36B is performed by the same process. With respect to the thickness of the plating layer formed by such a same process, the thickness decreases as the diameter (area) increases, and the thickness increases as the diameter (area) decreases. In this embodiment, since the diameter D2 (second area S2) is smaller than the diameter D1 (first area S1), the thickness t2 (dimension in the thickness direction z) of the second conductive columnar portion 36B is larger than the thickness t1 (dimension in the thickness direction z) of the first conductive columnar portion 36A.

[0042] One or more metal layers 6 are formed on each of the first main surfaces 101 of the first leads 10A, 10B, and 10C, each of the second main surfaces 211 of the multiple second leads 21, and each of the third main surfaces 221 of the pair of third leads 22. Each metal layer 6 is positioned to match the location of the first conductive columnar portion 36A or the second conductive columnar portion 36B of the semiconductor element 3. As shown in Figures 15 to 17, each metal layer 6 is interposed between the first main surface 101 of the first leads 10A, 10B, and 10C, the second main surface 211 of the multiple second leads 21, and the third main surface 221 of the third lead 22 and the first conductive columnar portion 36A or the second conductive columnar portion 36B, and the first conductive columnar portion 36A and the second conductive columnar portion 36B are joined by a bonding material 5. The metal layer 6 suppresses the chemical reaction between the first leads 10A, 10B, 10C, the second lead 21, and the third lead 22 and the bonding material 5, and also restricts the extent to which the bonding material 5 spreads when the semiconductor element 3 is bonded.

[0043] In this embodiment, the metal layer 6 is configured by laminating multiple metal layers, for example. The metal layer 6 has, for example, a first layer, a second layer, and a third layer (not shown). The first layer is laminated in contact with any of the first main surfaces 101 of the first leads 10A, 10B, 10C, the second main surfaces 211 of the multiple second leads 21, and the third main surface 221 of the third lead 22. In this embodiment, since the first leads 10A, 10B, 10C, the multiple second leads 21, and the third lead 22 contain Cu, and the bonding material 5 contains Sn, the first layer is made of, for example, Ni. The second layer is laminated in contact with the first layer. The constituent material of the second layer is not particularly limited and includes, for example, Pd. The third layer is laminated in contact with the second layer. The third layer is made of a constituent material that has relatively good wettability for the bonding material 5 (solder). The constituent material of the third layer is not particularly limited and includes, for example, Au. The method for forming the metal layer 6 is not limited. Furthermore, the metal layer 6 is not limited to having the first, second, and third layers described above.

[0044] The multiple metal layers 6 include multiple metal layers 6A and multiple metal layers 6B.

[0045] As shown in Figure 3, each metal layer 6A is positioned on the first main surface 101 of the first leads 10A, 10B, and 10C. The first conductive columnar portion 36A of the semiconductor element 3 is bonded to each metal layer 6A. The shape of each metal layer 6A in the z-direction of thickness is circular, matching the shape of the first bonding surface 365A of the first conductive columnar portion 36A. As shown in Figure 15, the diameter D3 of the metal layer 6A is larger than the diameter D1 of the first bonding surface 365A. Also, as shown in Figure 3, in the z-direction of thickness, the first conductive columnar portion 36A (first bonding surface 365A) is enclosed within the metal layer 6A.

[0046] As shown in Figure 3, each metal layer 6B is positioned on each second main surface 211, each third main surface 221, and the first main surface 101 of the first lead 10B. The second conductive columnar portion 36B of the semiconductor element 3 is bonded to each metal layer 6B. The shape of each metal layer 6B in the z-direction of thickness is circular, matching the shape of the second bonding surface 365B of the second conductive columnar portion 36B. As shown in Figures 16 and 17, the diameter D4 of the metal layer 6B is larger than the diameter D2 of the second bonding surface 365B. Also, as shown in Figure 3, in the z-direction of thickness, the second conductive columnar portion 36B (second bonding surface 365B) is enclosed within the metal layer 6B.

[0047] The bonding material 5 is conductive and is interposed between the first conductive columnar portion 36A or the second conductive columnar portion 36B and the metal layer 6, thereby making them electrically connected. In this embodiment, the bonding material 5 is made of, for example, solder containing Sn (such as SnAg). However, the constituent material of the bonding material 5 is not limited.

[0048] The multiple bonding materials 5 include multiple first bonding materials 5A and multiple second bonding materials 5B. As shown in Figure 15, the first bonding material 5A is interposed between the first bonding surface 365A of the first conductive columnar portion 36A and the metal layer 6A, and bonds them together. The shape of the first bonding material 5A is a frustoconical shape, with the upper surface (the surface facing the z1 side in the thickness direction z) in contact with the first bonding surface 365A and the lower surface (the surface facing the z2 side in the thickness direction z) in contact with the metal layer 6A. As shown in Figures 16 and 17, the second bonding material 5B is interposed between the second bonding surface 365B of the second conductive columnar portion 36B and the metal layer 6B, and bonds them together. The shape of the second joining material 5B is a frustoconical shape, with its upper surface (the surface facing z1 in the thickness direction z) in contact with the second joining surface 365B and its lower surface (the surface facing z2 in the thickness direction z) in contact with the metal layer 6B.

[0049] In this embodiment, as shown in Figure 3, among the multiple first conductive columnar portions 36A and multiple second conductive columnar portions 36B, four second conductive columnar portions 36B are arranged at positions closest to each of the four corners (four corner portions 301) of the element body 30. These four second conductive columnar portions 36B may be referred to as "corner-adjacent columnar portions 36B1" as appropriate to distinguish them from the other second conductive columnar portions 36B.

[0050] In this embodiment, the multiple first conductive columnar portions 36A are joined to the first main surfaces 101 of the first leads 10A, 10B, and 10C, and are positioned closer to the y2 side of the second direction y in a view of the thickness direction z. Most of the multiple second conductive columnar portions 36B are joined to the second main surfaces 211 of the multiple second leads 21 and the third main surfaces 221 of the pair of third leads 22, and are positioned closer to the y1 side of the second direction y in a view of the thickness direction z. The remaining two second conductive columnar portions 36B are joined to the first main surface 101 of the first lead 10B, and are positioned closer to the y2 side of the second direction y than the multiple first conductive columnar portions 36A in a view of the thickness direction z. Of the four second conductive columnar portions 36B (corner-adjacent columnar portions 36B1), two corner-adjacent columnar portions 36B1 are located on the y1 side of the second direction y and are closest to each of the two corner portions 301 on the y1 side of the element body 30 in the second direction y. These two corner-adjacent columnar portions 36B1 are joined to the second main surface 211 of the second lead 21 and are electrically connected to the control circuit 322. Of the four second conductive columnar portions 36B (corner-adjacent columnar portions 36B1), the remaining two corner-adjacent columnar portions 36B1 are located on the y2 side of the second direction y and are closest to each of the two corner portions 301 on the y1 side of the element body 30 in the second direction y. The remaining two corner-adjacent columnar portions 36B1 are joined to the first main surface 101 of the first lead 10B and are insulated from the switching circuit 321 and the control circuit 322 (circuit section).

[0051] The encapsulating resin 40 covers the entire semiconductor element 3 and parts of each of the first leads 10A, 10B, 10C, the plurality of second leads 21, and the pair of third leads 22. The encapsulating resin 40 is made of a material including, for example, a black epoxy resin. However, the material of the encapsulating resin 40 is not limited. The encapsulating resin 40 has a rectangular shape in the z-direction of its thickness and, as shown in Figures 5 to 8, has a resin main surface 41, a resin back surface 42, a pair of first resin side surfaces 431, and a pair of second resin side surfaces 432.

[0052] As shown in Figures 9 to 14, the resin main surface 41 faces the same side as the first main surface 101 of the first leads 10A, 10B, and 10C in the thickness direction z. As shown in Figures 5 to 8, the resin back surface 42 faces the opposite side from the resin main surface 41. As shown in Figure 4, the first back surface 102 of the first leads 10A, 10B, and 10C, the second back surface 212 of the multiple second leads 21, and the third back surface 222 of the pair of third leads 22 are exposed from the resin back surface 42.

[0053] As shown in Figures 7 and 8, the pair of first resin side surfaces 431 are connected to both the main resin surface 41 and the back resin surface 42 and face the first direction x. The pair of first resin side surfaces 431 are separated from each other in the first direction x. As shown in Figures 5, 6, and 11 to 13, the first end faces 121 of the first leads 10A, 10B, and 10C, the fourth end face 214 of the second lead 21, and the third end face 223 of the third lead 22 are exposed from each of the pair of first resin side surfaces 431 so as to be flush with the first resin side surface 431.

[0054] As shown in Figures 5 and 6, the pair of second resin sides 432 are connected to the main resin surface 41, the back resin surface 42, and the pair of first resin sides 431, and face the second direction y. The pair of second resin sides 432 are separated from each other in the second direction y. As shown in Figures 9, 10, and 14, the second end faces 213 of the multiple second leads 21 are exposed from the second resin side 432 located on the y1 side of the second direction y, flush with the second resin side 432. The multiple sub-end faces 131 of the first leads 10B are exposed from the second resin side 432 located on the y2 side of the second direction y, flush with the second resin side 432.

[0055] Next, we will explain the effects and benefits of semiconductor device A10.

[0056] In the semiconductor device A10, the semiconductor element 3 has a rectangular element body 30 in the z-thickness direction, a plurality of first conductive columnar portions 36A, and a plurality of second conductive columnar portions 36B. The plurality of first conductive columnar portions 36A protrude from the element body 30 toward the z2 side in the z-thickness direction and are joined to the first main surface 101 of the conductive member 1 (first leads 10A, 10B, 10C). The plurality of second conductive columnar portions 36B protrude from the element body 30 toward the z2 side in the z-thickness direction and are joined to the first main surface 101, second main surface 211, and third main surface 221 of the conductive member 1 (first lead 10B, a plurality of second leads 21, and a pair of third leads 22). Of the multiple first conductive columnar portions 36A and multiple second conductive columnar portions 36B, four second conductive columnar portions 36B (corner-adjacent columnar portions 36B1) are closest to each of the four corners (four corner portions 301) of the element body 30.

[0057] In the semiconductor device A10, the first area S1 of the first bonding surface 365A (first conductive columnar portion 36A) and the second area S2 of the second bonding surface 365B (second conductive columnar portion 36B) are different, and the thickness t1 of the first conductive columnar portion 36A and the thickness t2 of the second conductive columnar portion 36B are different. In this embodiment, among the multiple first conductive columnar portions 36A and the multiple second conductive columnar portions 36B, four second conductive columnar portions 36B (corner-adjacent columnar portions 36B1) with the same dimension in the thickness direction z (thickness t2) are arranged at the positions closest to each of the four corner portions 301 of the element body 30. With this configuration, the bonding conditions with the bonding material 5, etc. are the same for the second conductive columnar portions 36B (corner-adjacent columnar portions 36B1) located at the four corners among the multiple first conductive columnar portions 36A and the multiple second conductive columnar portions 36B. Therefore, even if there is an imbalance in the arrangement of the multiple first conductive columnar portions 36A and the multiple second conductive columnar portions 36B in the z-direction of thickness, a high degree of parallelism is maintained between the first main surface 101, the second main surface 211, and the third main surface 221 of the conductive member 1 and the element body 30 (semiconductor element 3). Consequently, it is possible to prevent tilting of the semiconductor element 3 flip-chip mounted on the conductive member 1 (first leads 10A, 10B, 10C, multiple second leads 21, and a pair of third leads 22), and the bonding reliability of the semiconductor element 3 mounted by flip-chip mounting is improved.

[0058] In this embodiment, the second area S2 of the second bonding surface 365B (second conductive columnar portion 36B) is smaller than the first area S1 of the first bonding surface 365A (first conductive columnar portion 36A). The thickness t2 (dimension in the thickness direction z) of the second conductive columnar portion 36B is larger than the thickness t1 (dimension in the thickness direction z) of the first conductive columnar portion 36A. In this embodiment, the thickness t2 of the four second conductive columnar portions 36B (corner-adjacent columnar portions 36B1) that are closest to each of the four corners (four corner portions 301) of the element body 30 is increased, so the support state of the semiconductor element 3 mounted on the conductive member 1 (first leads 10A, 10B, 10C, a plurality of second leads 21 and a pair of third leads 22) by flip-chip mounting becomes more stable. This is more suitable for improving the bonding reliability of the semiconductor element 3 mounted by flip-chip mounting.

[0059] In this embodiment, the four corner-adjacent columnar portions 36B1 include those that are isolated from the switching circuit 321 and the control circuit 322 (circuit section). With this configuration, by providing corner-adjacent columnar portions 36B1 that do not contribute electrically and by devising the arrangement of said corner-adjacent columnar portions 36B1, the junction reliability of the semiconductor element 3 mounted by flip-chip mounting as described above can be improved.

[0060] Figures 18 to 21 illustrate other embodiments of the present disclosure. In these figures, elements identical or similar to those in the above embodiments are denoted by the same reference numerals, and redundant descriptions are omitted.

[0061] <Second Embodiment> Figures 18 to 20 are diagrams illustrating a semiconductor device A20 according to a second embodiment of this disclosure. Figure 18 is a plan view of the semiconductor device A20 and corresponds to Figure 3. In Figure 18, for ease of understanding, the outlines of the sealing resin 40 and semiconductor element 3 are shown by dashed lines (double-dotted lines) that penetrate the sealing resin 40 and semiconductor element 3. Figure 19 is a partially enlarged cross-sectional view of the semiconductor device A20 and corresponds to Figure 15. Figure 20 is a partially enlarged cross-sectional view along the line XX-XX in Figure 19. The semiconductor device A20 of this embodiment differs from the first embodiment in the shape of the first conductive columnar portion 36A and the metal layer 6A. The configuration and operation of other parts of this embodiment are the same as in the first embodiment.

[0062] In this embodiment, the z-shaped profile (planar view) in the thickness direction of each first conductive columnar portion 36A is the same elliptical shape. Therefore, the first bonding surface 365A of each first conductive columnar portion 36A is also the same elliptical shape. As shown in Figures 18 and 19, the longitudinal direction (direction of the major axis) of the first bonding surface 365A of the first conductive columnar portion 36A is perpendicular to the direction in which the first leads 10A, 10C, and 10B extend. Note that the relationship between the longitudinal direction of the first bonding surface 365A and the direction in which the first leads 10A, 10C, and 10B extend is not limited to this relationship. The dimensions of the first bonding surface 365A are not particularly limited, but as an example, the major axis L1 (dimension in the second direction y, see Figure 19) is, for example, 300 μm, and the minor axis L2 (dimension in the first direction x, see Figure 20) is, for example, 100 μm. The first area S1 of the first joint surface 365A is greater than the second area S2 of the second joint surface 365B. The first area S1 of the first joint surface 365A is, for example, 1.2 times or more the second area S2 of the second joint surface 365B. Preferably, the first area S1 is 1.2 times or more and 5.0 times or less the second area S2.

[0063] Furthermore, in this embodiment, the shape of each metal layer 6B in the z-direction of thickness is also elliptical, matching the shape of each first bonding surface 365A. As shown in Figure 19, the major axis L3 (dimension in the second direction y) of the metal layer 6B is larger than the major axis L1 of the first bonding surface 365A, and as shown in Figure 20, the minor axis L4 (dimension in the first direction x) of the metal layer 6B is larger than the minor axis L2 of the first bonding surface 365A. Also, as shown in Figure 18, in the z-direction of thickness, the first conductive columnar portion 36A (first bonding surface 365A) is enclosed within the metal layer 6B.

[0064] In the semiconductor device A20, among the multiple first conductive columnar portions 36A and multiple second conductive columnar portions 36B, four second conductive columnar portions 36B (corner-adjacent columnar portions 36B1) with the same dimension in the thickness direction z (thickness t2) are arranged at the positions closest to each of the four corner portions 301 of the element body 30. With this configuration, the bonding conditions with the bonding material 5, etc. are the same for the four corner-adjacent second conductive columnar portions 36B (corner-adjacent columnar portions 36B1) among the multiple first conductive columnar portions 36A and multiple second conductive columnar portions 36B. Therefore, even if there is a bias in the arrangement of the multiple first conductive columnar portions 36A and multiple second conductive columnar portions 36B in the thickness direction z, a high degree of parallelism is maintained between the first main surface 101, second main surface 211, and third main surface 221 of the conductive member 1 and the element body 30 (semiconductor element 3). Therefore, it is possible to prevent tilting of the semiconductor element 3 flip-chip mounted on the conductive member 1 (first leads 10A, 10B, 10C, a plurality of second leads 21, and a pair of third leads 22), and the reliability of the junction of the semiconductor element 3 mounted by flip-chip mounting is improved. In addition, the semiconductor device A20 provides the same effects as the semiconductor device A10 in the above embodiment.

[0065] <Third Embodiment> Figure 21 is a diagram illustrating a semiconductor device A30 according to the third embodiment of this disclosure. Figure 21 is a partial plan view of the semiconductor device A30 and corresponds to Figure 3. In Figure 21, for ease of understanding, the outline of the semiconductor element 3 is shown by dashed lines (double-dotted lines) that are transparent to the sealing resin 40 and the semiconductor element 3. The semiconductor device A30 of this embodiment differs from the first embodiment in that the semiconductor element 3 is mounted on a wiring board rather than on leads. The configuration and operation of other parts of this embodiment are the same as in the first embodiment. Note that the parts of the first and second embodiments described above may be combined in any way.

[0066] In the first and second embodiments described above, the semiconductor element 3 is mounted on first leads 10A, 10B, 10C, a plurality of second leads 21, and a pair of third leads 22, and the first conductive columnar portion 36A and the second conductive columnar portion 36B are joined to these leads. However, the semiconductor element 3 may be joined to conductive members other than leads. In the third embodiment, a semiconductor device A30 is described in which the semiconductor element 3 is mounted on a wiring board, and the first conductive columnar portion 36A and the second conductive columnar portion 36B are joined to the wiring of the wiring board.

[0067] The semiconductor device A30 does not have first leads 10A, 10B, 10C, second lead 21, and third lead 22, but instead has a wiring board 80. The wiring board 80 comprises an insulating substrate 81 and a plurality of wirings 82. The insulating substrate 81 is a rectangular plate made of an electrically insulating material such as glass epoxy resin or ceramic. The material and shape of the insulating substrate 81 are not limited. The wirings 82 are made of, for example, Cu and are formed on the insulating substrate 81. The material and shape of the wirings 82 are not limited.

[0068] The semiconductor element 3 is flip-chip mounted on a wiring board 80. Each first conductive columnar portion 36A and each second conductive columnar portion 36B are bonded to the upper surface (main surface) of one of the plurality of wirings 82 on the wiring board 80. One or more metal layers 6 are formed on each wiring 82. Each metal layer 6 is positioned to match the location of the first conductive columnar portion 36A or the second conductive columnar portion 36B of the semiconductor element 3. Each metal layer 6 is interposed between one of the wirings 82 and the first conductive columnar portion 36A or the second conductive columnar portion 36B, and the first conductive columnar portion 36A or the second conductive columnar portion 36B is bonded by the bonding material 5. The metal layer 6 suppresses the chemical reaction between the wiring 82 and the bonding material 5, and also restricts the extent to which the bonding material 5 spreads when bonding the semiconductor element 3. Similar to the first embodiment, the plurality of metal layers 6 include a plurality of metal layers 6A and a plurality of metal layers 6B. A first conductive columnar portion 36A of the semiconductor element 3 is bonded to each metal layer 6A. A second conductive columnar portion 36B of the semiconductor element 3 is bonded to each metal layer 6B. The entire semiconductor element 3 and at least a portion of the wiring board 80 are covered with a sealing resin 40 (omitted in Figure 21). Other electronic components may be mounted on the wiring board 80, and leads for mounting the semiconductor device A30 to the wiring board may be bonded to it.

[0069] In the semiconductor device A30, among the multiple first conductive columnar portions 36A and multiple second conductive columnar portions 36B, four second conductive columnar portions 36B (corner-adjacent columnar portions 36B1) with the same dimension in the thickness direction z are arranged at the positions closest to each of the four corner portions 301 of the element body 30. With this configuration, the bonding conditions with the bonding material 5, etc. are the same for the four corner-located second conductive columnar portions 36B (corner-adjacent columnar portions 36B1) among the multiple first conductive columnar portions 36A and multiple second conductive columnar portions 36B. Therefore, even if there is a bias in the arrangement of the multiple first conductive columnar portions 36A and multiple second conductive columnar portions 36B in the thickness direction z, a high degree of parallelism between the wiring 82 (wiring board 80) and the element body 30 (semiconductor element 3) is maintained. Therefore, it is possible to prevent tilting of the semiconductor element 3 mounted on the wiring board 80 using a flip-chip mounting method, and the reliability of the junction of the semiconductor element 3 mounted using flip-chip mounting is improved. In addition, the semiconductor device A30 provides the same effects as the semiconductor device A10 in the above embodiment.

[0070] The semiconductor device relating to this disclosure is not limited to the embodiments described above. The specific configuration of each part of the semiconductor device relating to this disclosure can be modified in various ways.

[0071] In the above embodiment, the case where the semiconductor element 3 is an LSI was described, but this disclosure is not limited thereto. The type of semiconductor element 3 is not limited. Also, in the above embodiment, some of the four second conductive columnar portions 36B (corner-adjacent columnar portions 36B1) were insulated from the switching circuit 321 and the control circuit 322 (circuit section) and joined to the first main surface 101 of the first lead 10B, but this disclosure is not limited thereto. For example, the corner-adjacent columnar portion 36B1 joined to the first main surface 101 of the first lead 10B may be configured to be conductive with the switching circuit 321. In this case, the corner-adjacent columnar portion 36B1 (second conductive columnar portion 36B) joined to the first main surface 101 plays the role of a current path between the first lead 10B and the switching circuit 321 (semiconductor layer 32), similar to the first conductive columnar portion 36A joined to the first lead 10B.

[0072] This disclosure includes the following annotations: [Note 1] A conductive member (1) having a main surface (101, 211, 221) facing one side (z1 side) in the thickness direction (z), The semiconductor element (3) is located on one side (z1 side) in the thickness direction (z) relative to the conductive member (1) and is supported on the main surface (101, 211, 221), The semiconductor element (3) comprises a rectangular element body (30) when viewed in the thickness direction (z), a plurality of first conductive columnar portions (36A) each protruding from the element body (30) to the other side (z2) in the thickness direction (z) and joined to the main surface (101), and a plurality of second conductive columnar portions (36B) each protruding from the element body (30) to the other side (z2) in the thickness direction (z) and joined to the main surface (101, 211, 221), The first conductive columnar portion (36A) has a first bonding surface (365A) facing the main surface (101), The second conductive columnar portion (36B) has a second bonding surface (365B) facing the main surface (101, 211, 221), The second area (S2) of the second joint surface (365B) is different from the first area (S1) of the first joint surface (365A), A semiconductor device wherein, of the plurality of first conductive columnar portions (36A) and the plurality of second conductive columnar portions (36B), four of the second conductive columnar portions (36B1) are closest to each of the four corners (301) of the element body (30). [Note 2] The semiconductor device described in Appendix 1, wherein the second area (S2) is smaller than the first area (S1). [Note 3] The semiconductor device described in Appendix 2, wherein the first area (S1) is 1.2 times or more the second area (S2). [Note 4] The element body (30) includes circuit sections (321, 322), Each of the plurality of first conductive columnar portions (36A) is electrically connected to the circuit portion (321), as described in any of Appendix 1 to 3. [Note 5] The semiconductor device according to Appendix 4, wherein at least one of the four second conductive columnar portions (36B1) is insulated from the circuit portions (321, 322). [Note 6] The semiconductor device according to Appendix 2 or 3, wherein the dimension (t1) in the thickness direction (z) of the second conductive columnar portion (36B) is greater than the dimension (t1) in the thickness direction (z) of the first conductive columnar portion (36A). [Note 7] The semiconductor device according to any one of the appendices 1 to 6, wherein the first bonding surface (365A) is circular in shape and the second bonding surface (365B) is circular in shape. [Note 8] The semiconductor device according to any one of the appendices 1 to 6, wherein the first bonding surface (365A) is elliptical in shape and the second bonding surface (365B) is circular in shape. [Note 9] A first joining material (5A) is interposed between the first joining surface (365A) and the main surface (101), A semiconductor device according to any one of the appendices 1 to 8, further comprising a second bonding material (5B) interposed between the second bonding surface (365B) and the main surfaces (101, 211, 221). [Note 10] The semiconductor device described in Appendix 9, wherein the first bonding material (5A) and the second bonding material (5B) include solder. [Note 11] The conductive member (1) is a semiconductor device according to any one of the appendices 1 to 10, comprising Cu. [Note 12] The semiconductor device according to any one of the appendices 1 to 11, wherein the first conductive columnar portion (36A) and the second conductive columnar portion (36B) contain Cu. [Note 13] The conductive member (1) is a semiconductor device according to any one of the appendices 1 to 12, wherein the conductive member (1) is composed of leads. [Note 14] The conductive member (1) includes a first lead (10A, 10B, 10C), a second lead (21), and a third lead (22). Each of the plurality of first conductive columnar portions (36A) is joined to the first leads (10A, 10B, 10C), The semiconductor device according to Appendix 2 or 3, wherein at least one of the four second conductive columnar portions (36B1) among the plurality of second conductive columnar portions (36B) is joined to the first lead (10B), and each of the other second conductive columnar portions (36B) is joined to the second lead (21) or the third lead (22). [Note 15] The element body (30) includes circuit sections (321, 322), Each of the plurality of first conductive columnar portions (36A) is electrically connected to the circuit portion (321), The semiconductor device according to Appendix 14, wherein the second conductive columnar portion (36B1) joined to the first lead (10B) among the four second conductive columnar portions (36B1) is insulated from the circuit portions (321, 322). [Note 16] Further comprising an insulating substrate (81), The semiconductor device according to any one of appendices 1 to 12, wherein the conductive member is a wiring (82) formed on the insulating substrate (81). [Explanation of Symbols]

[0073] A10, A20, A30: Semiconductor equipment 1: Conductive material 10A, 10B, 10C: First lead 101: First principal surface (principal surface) 102: Reverse side 1 11: Subject 12: Side 121: First end surface 13:Protrusion 131: Minor end face 21: Second lead 211: Second principal surface (principal surface) 212: Reverse side of the second page 213: Second end surface 214: 4th end face 22: Third lead 221: Third principal surface (principal surface) 222: Reverse side of the third card 223: Third end surface 3: Semiconductor elements 30: Element body 301: Corner 31: Semiconductor substrate 32: Semiconductor layer 321: Switching circuit (circuit section) 322: Control circuit (circuit section) 33: Passivation membrane 34: Conductive pads 34a: 1st layer 34b: 2nd layer 34c: 3rd layer 35: Insulating layer 35a: opening 36A: First conductive columnar part 36B: Second conductive columnar part 361: Seed layer 362: First plating layer 363: Second plating layer 365A: 1st joint surface 365B: 2nd joint surface 40: Sealing resin 41:Top surface 42: Bottom 431 :1st side 432:Second side 5: Bonding material 5A: 1st bonding material 5B:Second bonding material 6,6A,6B: Metal layer 80: Wiring board 81: Insulating substrate 82: Wiring

Claims

1. A conductive member having a main surface facing one side in the thickness direction, The semiconductor element is located on one side in the thickness direction relative to the conductive member and is supported on the main surface, The semiconductor element comprises a rectangular element body when viewed in the thickness direction, a plurality of first conductive columnar portions, each protruding from the element body to the other side in the thickness direction and joined to the main surface, and a plurality of second conductive columnar portions, each protruding from the element body to the other side in the thickness direction and joined to the main surface. The first conductive columnar portion has a first joining surface facing the main surface, The second conductive columnar portion has a second joining surface facing the main surface, The second area of ​​the second joint surface is different from the first area of ​​the first joint surface. A semiconductor device wherein, of the plurality of first conductive columnar portions and the plurality of second conductive columnar portions, four of the second conductive columnar portions are closest to each of the four corners of the element body.

2. The semiconductor device according to claim 1, wherein the second area is smaller than the first area.

3. The semiconductor device according to claim 2, wherein the first area is 1.2 times or more the second area.

4. The element body includes a circuit section, The semiconductor device according to claim 1, wherein each of the plurality of first conductive columnar portions is electrically connected to the circuit portion.

5. The semiconductor device according to claim 4, wherein at least one of the four second conductive columnar portions is insulated from the circuit portion.

6. The semiconductor device according to claim 2 or 3, wherein the dimension in the thickness direction of the second conductive columnar portion is greater than the dimension in the thickness direction of the first conductive columnar portion.

7. The semiconductor device according to claim 1, wherein the first bonding surface is circular and the second bonding surface is circular.

8. The semiconductor device according to claim 1, wherein the first bonding surface is elliptical and the second bonding surface is circular.

9. A first joining material interposed between the first joining surface and the main surface, The semiconductor device according to claim 1, further comprising a second bonding material interposed between the second bonding surface and the main surface.

10. The semiconductor device according to claim 9, wherein the first bonding material and the second bonding material include solder.

11. The semiconductor device according to claim 1, wherein the conductive member includes Cu.

12. The semiconductor device according to claim 1, wherein the first conductive columnar portion and the second conductive columnar portion contain Cu.

13. The semiconductor device according to claim 1, wherein the conductive member is composed of leads.

14. The conductive member includes a first lead, a second lead, and a third lead. Each of the plurality of first conductive columnar portions is joined to the first lead, The semiconductor device according to claim 2 or 3, wherein at least one of the four second conductive columnar portions is joined to the first lead, and each of the other second conductive columnar portions is joined to the second lead or the third lead.

15. The element body includes a circuit section, Each of the plurality of first conductive columnar portions is electrically connected to the circuit portion. The semiconductor device according to claim 14, wherein the second conductive columnar portion joined to the first lead among the four second conductive columnar portions is insulated from the circuit portion.

16. Further equipped with an insulating substrate, The semiconductor device according to claim 1, wherein the conductive member is a wiring formed on the insulating substrate.

Images