Printed wiring board and method for manufacturing the same

JP2026143886APending Publication Date: 2026-09-09IBIDEN CO LTD
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
JP2025030856
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-02-28
Publication Date
2026-09-09

Smart Images

  • Figure 2026143886000001_ABST
    Figure 2026143886000001_ABST
Patent Text Reader

Abstract

To provide a printed circuit board with solder bumps that, even if the protective film of the conductive layer of the printed circuit board contains palladium, does not cause the palladium to segregate onto the solder bumps, thereby resulting in a printed circuit board with a uniformly spherical surface and uniform height of solder bumps after reflow. [Solution] A printed wiring board comprising a conductor layer exposed from an opening in a solder resist layer formed in a solder resist layer located in the outermost layer of the printed wiring board, a Ni layer formed on the surface of the conductor layer, an alloy layer formed on the surface of the Ni layer, and a solder bump layer formed on the surface of the alloy layer, wherein the solder bump layer contains a Sn-Pd alloy, and the Pd content in the Sn-Pd alloy is 0.5 at% or less.
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] The present invention relates to a printed wiring board and a method for manufacturing the same. More specifically, the present invention relates to a printed wiring board having a palladium-containing alloy film and a method for manufacturing the same. [Background Art]

[0002] Generally, a solder resist layer is formed on the outermost layer of a printed wiring board to protect the conductive circuit. When forming solder bumps on such a printed wiring board, a solder pad is formed by partially opening and exposing the solder resist layer for connection to a conductive circuit. Solder bumps are formed by applying a nickel layer and a gold layer on the portion that serves as a solder pad, then printing solder paste and performing reflow.

[0003] However, when the opening diameter of the solder pad is 200 μm or less, if solder paste is formed on the solder pad by printing, insufficient filling or unfilled solder on the solder pad may make it impossible to maintain the shape of the solder bump, and the solder bump may fail to fulfill its function. Furthermore, as the opening diameter of the solder pad decreases, the connection area between the solder pad and the solder bump becomes smaller, which reduces the adhesion between the solder pad and the solder bump, and may lead to a decrease in the electrical connectivity and reliability of the printed wiring board.

[0004] From such a technical point of view, a printed wiring board that has a solder pad structure excellent in strength and adhesion, and is excellent in adhesion, electrical connectivity, and reliability has been proposed (for example, Patent Document 1). Figures 3(A) and 3(B) are enlarged views, respectively, of a solder pad 44 provided on a conventional printed circuit board. As shown in Figure 3(A), solder paste 46α is printed onto the solder pad 44. The solder pad 44 consists of three composite layers: a Ni layer 60, a Pd layer 62, and an Au layer 64, which are sequentially formed on the conductive circuit 34D. Next, solder bumps 46 are formed by reflowing in a nitrogen atmosphere at 250°C. During this reflow, the Pd layer 62 and the Au layer 64 diffuse into the solder bumps 46 and disappear. As shown in Figure 3(B), a Cu-Ni-Sn alloy layer 68, consisting of the Ni layer and the solder composition metal, is formed at the interface between the Ni layer 60 and the solder bumps 46. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2006-114705 [Overview of the Initiative] [Problems that the invention aims to solve]

[0006] The technology disclosed in Patent Document 1 does not acknowledge any problems caused by the Sn-Pd alloy formed by the diffusion of palladium contained in the Pd layer into the solder bumps. Specifically, the palladium contained in the Sn-Pd alloy formed by the diffusion of palladium contained in the Pd layer into the solder bumps may segregate within the Sn-Pd alloy. This segregation of palladium within the Sn-Pd alloy prevents the solder from melting uniformly after reflow. As a result, even if a Sn-Pd alloy with segregated palladium is reflowed, the surface of the solder bumps after reflow does not become round, leading to the problem that the solder bumps as a whole do not form a uniform spherical shape. Therefore, the present invention aims to provide a printed circuit board equipped with solder bumps in which, even if the protective film of the conductor layer of the printed circuit board contains palladium (Pd) such as Ni-Pd or Ni-Pd-Au, the palladium is not segregated into the solder bumps, and the palladium is uniformly melted into the solder bumps by reflow, resulting in a printed circuit board with a uniform spherical surface and uniform height of solder bumps after reflow. [Means for solving the problem]

[0007] The printed wiring board according to the present invention comprises a solder resist layer formed to cover an insulating layer and a conductor layer located in the outermost layer of the printed wiring board, a conductor layer exposed from an opening in the solder resist layer, a Ni layer formed on the surface of the conductor layer, an alloy layer formed on the surface of the Ni layer, and a solder bump layer formed on the surface of the alloy layer, wherein the solder bump layer contains a Sn-Pd alloy, and the Pd content in the Sn-Pd alloy is 0.5 at% or less.

[0008] Furthermore, the present invention relates to a method for manufacturing a printed circuit board, comprising: forming a conductor layer on a resin insulating layer located in the outermost layer of the printed circuit board; forming a solder resist layer so as to cover the resin insulating layer and the conductor layer; exposing the conductor layer by forming a solder resist layer opening in the solder resist layer; forming a Ni layer on the surface of the conductor layer; forming a Pd layer on the surface of the Ni layer; forming a solder paste layer on the surface of the Pd layer; and reflowing a composite layer including the Ni layer and the Pd layer, and the solder paste layer, wherein the thickness of the Pd layer is 0.01 to 0.03 μm. [Brief explanation of the drawing]

[0009] [Figure 1A] This is a cross-sectional view illustrating one embodiment of a printed circuit board according to the present invention. [Figure 1B]This is a cross-sectional view illustrating one embodiment of a printed circuit board according to the present invention. [Figure 2A] This is a cross-sectional view illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. [Figure 2B] This is a cross-sectional view illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. [Figure 2C] This is a cross-sectional view illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. [Figure 2D] This is a cross-sectional view illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. [Figure 2E] This is a cross-sectional view illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. [Figure 2F] This is a cross-sectional view illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. [Figure 2G] This is a cross-sectional view illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. [Figure 2H] This is a cross-sectional view illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. [Figure 3] (A) and (B) are cross-sectional views illustrating an example of a conventional method for manufacturing printed circuit boards. [Modes for carrying out the invention]

[0010] <Regarding the printed circuit board according to the present invention> An embodiment of the printed circuit board according to the present invention will be described with reference to the drawings. In the example shown in Figures 1 and 2, the dimensions of each component, particularly the height dimension, are described using dimensions different from the actual dimensions in order to better understand the features of the present invention.

[0011] Figure 1 is a cross-sectional view illustrating one embodiment of a printed circuit board according to the present invention. In Figure 1A, the printed circuit board 100 may be a core-type substrate formed by alternately laminating a predetermined resin insulating layer 101 and a conductor layer 102 having a circuit pattern on one or both sides of a core substrate (not shown). When the conductor layer 102 is formed on both sides of the core substrate, the opposing conductor layers may be connected via through-hole conductors (not shown) across the core substrate. Alternatively, the printed circuit board 100 may be a coreless substrate formed by alternately laminating the resin insulating layer 101 and the conductor layer 102 on a support plate (not shown) instead of a core substrate, and then removing the support plate.

[0012] As shown in Figure 1A, the printed circuit board 100 comprises a resin insulating layer 101 located as the outermost layer of at least one resin insulating layer, and a conductor layer 102 having a predetermined arrangement pattern formed on the resin insulating layer 101. In the printed circuit board 100 shown in Figure 1, there are often multiple other conductor layers 102 and resin insulating layers 101 arranged alternately below the resin insulating layer 101, but these are omitted in the figure.

[0013] The resin insulating layer 101 may be formed by including inorganic particles and an insulating resin. The inorganic particles may be inorganic fillers such as silica, alumina, talc, barium sulfate, titanium oxide, and zinc oxide. The insulating resin may be epoxy resin, polyimide resin, or phenolic resin. The conductor layer 102 is formed on the surface of the resin insulating layer 101. The conductor layer 102 consists of a seed layer made of a thin metal film and a metal plating film formed on the seed layer. The seed layer may be formed from an electroless copper plating film. The metal plating film may be formed from, for example, an electrolytic copper plating film. The conductor layer 102 consists of a conductor circuit, a via conductor, etc.

[0014] The printed wiring board 100 includes a solder resist layer 103 formed so as to cover a resin insulating layer 101 located at the outermost layer and a conductor layer 102 formed on the resin insulating layer 101. The solder resist layer 103 is formed with a solder resist layer opening 103X that reaches the upper surface of the conductor layer 102 located at the outermost layer. The conductor layer 102 included in the printed wiring board 100 is formed to be exposed from the solder resist layer opening 103X formed in the solder resist layer 103. The solder resist layer 103 may contain an alkali-soluble resin, a polyfunctional acrylic monomer, a photopolymerization initiator, an epoxy resin, an inorganic filler, and the like. The solder resist layer 103 may optionally contain a dye or pigment such as phthalocyanine green. From the viewpoints of functionality and processability, the thickness of the solder resist layer 103 is preferably 4 to 40 μm.

[0015] The solder resist layer opening 103X has a recessed shape to expose the conductor layer 102 formed on the surface of the resin insulating layer 101, and allow a solder bump layer 106 to be formed on the exposed surface of the conductor layer 102 via a Ni layer 104 and an alloy layer 105 formed on said surface. The recessed shape of the solder resist layer opening 103X can be appropriately set according to the thickness of the Ni layer 104, the thickness of the alloy layer 105, and the size of the solder bump layer 106.

[0016] The printed wiring board 100 has the Ni layer 104 on the surface of the conductor layer 102 exposed from the solder resist layer opening 103X. The Ni layer 104 may be composed of only Ni, or may be composed of a Ni-containing alloy such as Ni-Cu alloy, Ni-P alloy, or Ni-Cu-P alloy. Among these, the Ni layer 104 is preferably composed of Ni-P alloy or Ni-Cu-P alloy. The reason for this is that even if unevenness is formed on the surface of the conductor layer 102 of the printed wiring board 100, the unevenness can be offset, and the conductor layer 102 formed of a coating with a flat surface layer can be obtained. The thickness of the Ni layer 104 is preferably 1.5 to 3.0 μm.

[0017] Further, the printed wiring board 100 includes an alloy layer 105 formed on the surface of the Ni layer 104. The alloy layer 105 is formed at the interface between the Ni layer 104 and the solder bump layer 106, and improves the bonding strength between the Ni layer 104 and the solder bump layer 106. That is, the alloy layer 105 can improve the tensile rigidity at the interface between the Ni layer 104 and the solder bump layer 106. As a result, the peel strength at the interface between the Ni layer 104 and the solder bump layer 106 can be improved. The alloy layer 105 may contain, for example, a Ni-Sn alloy, a Cu-Ni-Sn alloy, a Ag-Ni-Sn alloy, or the like.

[0018] By setting the thickness of the alloy layer 105 within a predetermined range, the bonding strength at the interface between the Ni layer 104 and the solder bump layer 106 can be further increased, and the tensile strength at the interface between the Ni layer 104 and the solder bump layer 106 can be further improved. Note that the thickness of the alloy layer 105 is preferably 1.0 to 2.5 μm. By setting the thickness of the alloy layer 105 within this range, the rigidity of the alloy layer 105 can be increased, and the tensile strength and the like at the interface between the Ni layer 104 and the solder bump layer 106 can be improved.

[0019] As shown in FIG. 1B, the alloy layer 105 is manufactured by reflowing a composite layer including a Ni layer 104 and a Pd layer 107, or a composite layer including a Ni layer 104, a Pd layer 107, and a corrosion-resistant layer 108 made of a noble metal such as Au, which is formed in the manufacturing step included in the method for manufacturing a printed wiring board described later. Pd contained in the Pd layer 107 constituting the composite layer and Au contained in the corrosion-resistant layer 108 diffuse into the solder bump layer 106 by reflow. For this reason, at the interface between the Ni layer 104 and the solder bump layer 106, the alloy layer 105 made of an alloy containing Ni, which is the main component of the Ni layer 104, and Sn, which is the main component of the solder bump layer 106, is formed. Note that the thickness of the Pd layer 107 is preferably 0.01 to 0.03 μm.

[0020] The printed circuit board 100 is further equipped with a solder bump layer 106 formed on the surface of the alloy layer 105. The solder bump layer 106 is formed on the surface of the conductor layer 102 that is exposed through the solder resist layer opening 103X via the Ni layer 104 and the alloy layer 105. The solder bump layer 106 is made of a metal with a low melting point that melts during reflow processing and is formed from a spherical to a substantially hemispherical shape, such as a metal mainly composed of tin (Sn). Specifically, the solder bump layer 106 may be composed of a two-component solder, a three-component solder, a four-component solder, etc.

[0021] Examples of binary solders that constitute the solder bump layer 106 include tin (Sn) / copper (Cu), tin (Sn) / zinc (Zn), tin (Sn) / silver (Ag), tin (Sn) / lead (Pb), and tin (Sn) / antimony (Sb). Examples of ternary solders include tin (Sn) / silver (Ag) / copper (Cu), tin (Sn) / silver (Ag) / lead (Pb), tin (Sn) / silver (Ag) / antimony (Sb), tin (Sn) / lead (Pb) / copper (Cu), tin (Sn) / silver (Ag) / indium (In), and tin (Sn) / antimony (Sb) / copper (Cu). Examples of tetracomponent solders include tin (Sn) / silver (Ag) / copper (Cu) / antimony (Sb), tin (Sn) / silver (Ag) / copper (Cu) / bismuth (Bi), and so on.

[0022] The solder bump layer 106 provided in the printed circuit board 100 according to the present invention is characterized in that it contains a Sn-Pd alloy, and the Pd content in the Sn-Pd alloy is 0.5 at% or less. That is, the solder bump layer 106 contains a Sn-Pd alloy, and the Sn-Pd alloy contains Pd. Preferably, the Pd content of the solder bump layer 106 is 0.01 at% or more and 0.5 at% or less. A Pd content of 0.01 at% or more in the solder bump layer 106 is preferable because it promotes the formation of the alloy layer 105. A Pd content of 0.5 at% or less in the solder bump layer 106 is preferable because the Pd atoms diffuse uniformly within the solder bump layer 106 without segregation. By uniformly diffusing the Pd atoms within the solder bump layer 106 without segregation, the solder paste layer 106A can be uniformly melted, and the surface shape of the solder bump layer 106 can be made spherical after the solder paste is reflowed.

[0023] Thus, in the printed circuit board 100 according to the present invention, the Pd content of the Pd contained in the solder bump layer 106 is 0.5 at% or less, thereby uniformly diffusing a predetermined amount of Pd atoms into the interior of the solder paste layer 106A. As a result, the printed circuit board 100 according to the present invention has a nearly spherical solder bump layer 106 due to the uniform melting of the solder paste layer 106A.

[0024] The solder bump layer 106 provided on the printed circuit board 100 according to the present invention constitutes the outermost surface of the printed circuit board 100. In other words, the solder bump layer 106 is used to connect the printed circuit board 100 to external semiconductor elements. That is, the outermost surface of the printed circuit board 100 on which the solder bump layer 106 is formed becomes the electronic component mounting surface to which external semiconductor elements are connected. Examples of semiconductor elements mounted on the printed circuit board 100 include semiconductor chips, semiconductor integrated circuits, transistors, and the like.

[0025] <Regarding one embodiment of the manufacturing method for printed circuit boards according to the present invention> Figures 2A to 2H are cross-sectional views illustrating one embodiment of the method for manufacturing a printed circuit board according to the present invention. Hereinafter, one embodiment of the method for manufacturing a printed circuit board according to the present invention will be described with reference to Figures 2A to 2H.

[0026] First, as shown in Figure 2A, a conductor layer 102 is formed on the resin insulating layer 101 located on the outermost layer of the printed circuit board 100. The conductor layer 102 on the resin insulating layer 101 can be formed, for example, using a subtractive method. Furthermore, after forming the conductor layer 102 on the resin insulating layer 101, a roughening layer (not shown) may be provided on the conductor layer 102. Providing a roughening layer on the conductor layer 102 is preferable because it ensures good adhesion between the conductor layer 102 and the solder resist layer 103.

[0027] Next, as shown in Figure 2B, a solder resist layer 103 is formed to cover the resin insulating layer 101 and the conductive layer 102. The solder resist layer 103 may be formed by applying a commercially available solder resist composition to the upper surface of the resin insulating layer 101 and the conductor layer 102 to a predetermined thickness, and then drying the solder resist composition.

[0028] Next, as shown in Figure 2C, the conductor layer 102 is exposed by forming a solder resist layer opening 103X in the solder resist layer 103. The surface of the conductor layer is exposed as the conductor layer 102 is exposed through the solder resist layer opening 103X. The solder resist layer opening 103X is formed so as to reach the conductor layer 102 formed in the resin insulating layer 101. The solder resist layer openings 103X may be formed by exposing the solder resist layer 103 to ultraviolet light after bringing a photomask (not shown) on which a solder bump formation opening pattern is drawn into close contact with the solder resist layer 103, and then developing it with a DMTG solution or the like. The solder resist layer openings 103X may also be formed by laser processing.

[0029] Next, as shown in Figure 2D, a Ni layer 104 is formed on the surface of the conductor layer 102. The Ni layer 104 may be formed on the surface of the conductor layer by immersing the conductor layer 102 in an electroless nickel plating solution and drying it. The thickness of the Ni layer 104 can be set as appropriate, and is preferably, for example, 1.5 to 3.0 μm. Furthermore, by forming the Ni layer 104, even if a roughening layer is applied to the surface of the conductor layer 102, the uneven portion can be completely covered, improving the adhesion between the solder resist layer 103 and the conductor layer 102.

[0030] Next, as shown in Figure 2E, a Pd layer 107 is formed on the surface of the Ni layer 104. The formation of the Pd layer 107 on the surface of the Ni layer may be done by immersing the Ni layer 104 in an electroless palladium solution and drying it. The thickness of the Pd layer 107 is preferably 0.01 to 0.03 μm. By setting the thickness of the Pd layer 107 to 0.01 to 0.03 μm, in the process of reflowing the composite layer containing the Ni layer 104 and the Pd layer 107 with the solder paste layer 106A, the Pd atoms do not segregate inside the solder bump layer 106 but diffuse uniformly, thereby allowing the solder paste layer 106A to melt uniformly. In other words, by setting the thickness of the Pd layer 107 to 0.01 to 0.03 μm, palladium can be uniformly diffused into the solder paste layer 106A, the solder paste layer 106A can be uniformly melted, the surface shape of the solder bump layer 106 can be made spherical, and the height of the solder bumps can be made uniform.

[0031] Next, as shown in Figure 2F, a corrosion-resistant layer 108 is formed on the surface of the Pd layer 107. The corrosion-resistant layer 108 is formed from the composite layer by reflow and plays a role in promoting the formation of the alloy layer 105 formed on the Ni layer surface of the Ni layer 104. Preferably, the corrosion-resistant layer 108 is formed from at least one type selected from noble metals such as Au, Ag, Pt, or Sn. Furthermore, the corrosion-resistant layer 108 may be formed by employing a two-stage plating process consisting of displacement plating, electroless plating, displacement plating, and electroless plating using the same metal.

[0032] In this way, by forming the corrosion-resistant layer 108, it is possible to form an alloy layer 105 that is not affected by the Ni layer 104 located beneath the alloy layer 105 formed from the composite layer, thereby suppressing the deterioration of the shape and function of the solder bump layer 106. Furthermore, when the corrosion-resistant layer 108 is formed from an Au layer, the shape, corrosion resistance, and function of the solder bump layer 106 can be controlled by the ratio of the Au layer to the composite layer.

[0033] Forming a corrosion-resistant layer 108 made of gold or the like on the surface of the Pd layer 107 may be done by immersing the Pd layer 107 in an electroless precious metal plating solution (for example, an electroless gold plating solution) and drying it. The thickness of the corrosion-resistant layer 108 is preferably 0.01 to 0.03 μm. By setting the thickness of the corrosion-resistant layer 108 to 0.01 to 0.03 μm, the strength and corrosion resistance of the printed circuit board 100 obtained after reflow can be improved, and the deterioration of the shape and function of the solder bump layer 106 can be further suppressed.

[0034] Next, as shown in Figure 2G, a solder paste layer 106A is formed on the surface of the corrosion-resistant layer 108. The solder paste layer 106A on the surface of the corrosion-resistant layer 108 may be formed by printing solder paste onto the surface of the corrosion-resistant layer 108.

[0035] Finally, as shown in Figure 2H, the composite layer containing the Ni layer 104, the Pd layer 107, and the corrosion-resistant layer 108, and the solder paste layer 106A are reflowed. The reflow only needs to be able to form the alloy layer 105 from the composite layer containing the Ni layer 104, the Pd layer 107, and the corrosion-resistant layer 108, and to form the solder bump layer 106 from the solder paste layer 106A. For example, it may be carried out in a nitrogen atmosphere at 200 to 400°C, preferably 250 to 350°C.

[0036] Thus, the method for manufacturing a printed circuit board according to the present invention forms a solder bump layer 106 by reflowing a composite layer containing a Ni layer 104, a Pd layer 107, and a corrosion-resistant layer 108 with a solder paste layer 106A. For this reason, the solder bump layer 106 of the printed circuit board 100 contains a Sn-Pd alloy, and the Pd content in the Sn-Pd alloy can be 0.5 at% or less. As a result, the method for manufacturing printed circuit boards according to the present invention makes it possible to provide a printed circuit board equipped with solder bumps in which palladium is uniformly melted into the solder bump layer without segregation by reflow, resulting in a solder bump surface that is uniformly spherical and has a uniform height after reflow. [Explanation of Symbols]

[0037] 100 Printed Wiring Boards 101 Resin insulating layer 102 Conductor layer 103 Solder Resist Layer 103X Solder Resist Layer Opening 10⁴ Ni layer 105 alloy layer 106 Handa Bump Layer 106A Solder paste layer 107 Pd layer 108 Corrosion-resistant layer

Claims

1. The solder resist layer, which is formed to cover the insulating layer and the conductor layer located in the outermost layer of the printed circuit board, has an opening in the solder resist layer that exposes the conductor layer, A Ni layer formed on the surface of the conductive layer, The alloy layer formed on the surface of the Ni layer, A printed circuit board comprising a solder bump layer formed on the surface of the alloy layer, The solder bump layer is characterized by containing a Sn-Pd alloy, wherein the Pd content in the Sn-Pd alloy is 0.5 at% or less.

2. The printed circuit board according to claim 1, characterized in that the solder bump layer is formed by reflowing a composite layer including a Pd layer formed on the surface of the Ni layer and a solder paste layer formed on the surface of the Pd layer.

3. The printed circuit board according to claim 1, characterized in that the solder bump layer is formed by reflowing a composite layer including a Pd layer formed on the surface of the Ni layer, a corrosion-resistant layer formed on the surface of the Pd layer, and a solder paste layer.

4. The printed circuit board according to claim 2 or 3, characterized in that the thickness of the Pd layer is 0.01 to 0.03 μm.

5. A method for manufacturing a printed circuit board according to claim 1, Forming a conductive layer on the resin insulating layer located in the outermost layer of the printed circuit board, A solder resist layer is formed to cover the resin insulating layer and the conductor layer, The conductive layer is exposed by forming solder resist layer openings in the solder resist layer, Forming a Ni layer on the surface of the conductor layer, Forming a Pd layer on the surface of the Ni layer, Forming a solder paste layer on the surface of the Pd layer, The process includes reflowing the composite layer comprising the Ni layer and the Pd layer, and the solder paste layer. A method for manufacturing a printed wiring board, characterized in that the thickness of the Pd layer is 0.01 to 0.03 μm.

6. The method for manufacturing a printed circuit board according to claim 5, characterized in that the composite layer has a corrosion-resistant layer formed on the surface of the Pd layer.

Citation Information

Patent Citations

  • Multilayer printed circuit board and method of manufacturing the same

    JP2006114705A