Semiconductor device and method thereof

Abstract

Conventional semiconductor devices have had the problem of difficulty in reducing the noise level of side lobes without increasing the number of digital control bits. [Solution] A semiconductor device according to one embodiment includes a plurality of amplifiers 11 to 13 that amplify an input phase-modulated signal and generate an output signal RFout by adding and combining their respective output voltages, and an amplitude control circuit 16 that outputs a selection signal EN for switching the number of amplifiers among the plurality of amplifiers that are controlled to be in operation simultaneously. The number of stages in which the amplitude control circuit 16 changes the number of amplifiers that are controlled to be in operation simultaneously is defined as the switching stage number. The plurality of amplifiers include at least one first amplifier 11 that changes the voltage level of the output signal RFout by an amount of change smaller than the unit amplitude Vu obtained by dividing the maximum amplitude of the output signal by the switching stage number, and at least one second amplifier 13 that changes the voltage level of the output signal RFout by an amount of change larger than the unit amplitude Vu.

Description

[[Technical Field]]

[0001] The present disclosure relates to a semiconductor device and a method thereof, and particularly relates to a semiconductor device having a plurality of amplifiers and a control method thereof. [[Background Art]]

[0002] A semiconductor device used for wireless communication is equipped with a power amplifier that drives an antenna. In recent years, many techniques have been proposed for discretely changing the signal level of an output signal by digitally controlling the signal level of the output signal of the power amplifier. A technique related to such a power amplifier is disclosed in Non-Patent Document 1.

[0003] The power amplifier described in Non-Patent Document 1 performs amplitude control of an output signal with 4-bit accuracy (16 steps). Furthermore, in the power amplifier described in Non-Patent Document 1, a pseudo pulse waveform is generated by equally dividing the maximum amplitude of a desired pulse waveform to be generated into 16 parts, and setting the time of an intersection between the waveform and each of the 16 equal dividing lines as the delay for each step. [[Prior Art Document]] [[Non-Patent Literature]]

[0004] [[Non-Patent Document 1]] Minyoung Song, et al. "A Low Power 6-9GHz IEEE 802.15.4a / 4z Compliant IR-UWB Transceiver With Pulse Pre-Emphasis Achieving High ToA Precision,” IEEE Solid State Circuits Letters, November 2023, p.297-300. [[Summary of the Invention]] [[Problem to be Solved by the Invention]]

[0005] However, Non-Patent Literature 1 states that increasing the number of bits in digital control and improving the resolution are necessary to address the increase in sidelobes and noise. Therefore, in order to reduce sidelobes and noise, Non-Patent Literature 1 states that measures such as increasing the number of power amplifier units, increasing the circuit size of the control circuit to increase the number of bits in digital control, and increasing the number of signal lines are necessary, which leads to numerous problems such as an increase in chip area, increased complexity of signal line layout, and increased power consumption.

[0006] Other challenges and novel features will become apparent from the description and accompanying drawings in this specification. [Means for solving the problem]

[0007] A semiconductor device according to one embodiment includes a plurality of amplifiers that amplify an input phase-modulated signal and generate an output signal by adding and combining their respective output voltages, and an amplitude control circuit that outputs a selection signal to sequentially switch the number of amplifiers among the plurality of amplifiers that are controlled to be in operation simultaneously at non-equal time intervals and in multiple stages based on a predetermined sequence, wherein the number of stages in which the number of amplifiers controlled to be in operation simultaneously is changed is defined as the number of switching stages, and the plurality of amplifiers include at least one first amplifier that changes the voltage level of the output signal by an amount of change smaller than the unit amplitude obtained by dividing the maximum amplitude of the output signal by the number of switching stages, and at least one second amplifier that changes the voltage level of the output signal by an amount of change larger than the unit amplitude. [Effects of the Invention]

[0008] According to one embodiment of the semiconductor device, the noise level of the side lobes can be reduced without increasing the number of digital control bits. [Brief explanation of the drawing]

[0009] [Figure 1] This is a block diagram of a semiconductor device according to Embodiment 1. [Figure 2]This is an example of an amplitude control table applied to the semiconductor device according to Embodiment 1. [Figure 3] This is a timing chart illustrating the operation of the semiconductor device according to Embodiment 1. [Figure 4] This graph illustrates the frequency spectrum characteristics of the output signal of the semiconductor device according to Embodiment 1. [Figure 5] This is a block diagram of a semiconductor device according to Embodiment 2. [Figure 6] This is a first example of an amplitude control table applied to a semiconductor device according to Embodiment 2. [Figure 7] This is a second example of an amplitude control table applied to the semiconductor device according to Embodiment 2. [Figure 8] This is a block diagram of the amplifier according to Embodiment 3. [Figure 9] This is a block diagram of a semiconductor device according to Embodiment 4. [Modes for carrying out the invention]

[0010] Embodiment 1 Embodiments of the present invention will now be described with reference to the drawings. First, Figure 1 shows a block diagram of a semiconductor device 1 according to Embodiment 1. As shown in Figure 1, the semiconductor device 1 according to Embodiment 1 includes a phase modulation signal generator 10, amplifier units 11, 12, and 13, an impedance matching circuit 14, an antenna 15, and an amplitude control circuit 16. In addition, the semiconductor device 1 only needs to have at least the amplifier units 11, 12, and 13 formed on a semiconductor substrate. Furthermore, in the semiconductor device 1, the impedance matching circuit 14 and the antenna 15 may be provided separately from the semiconductor device 1 as individual components. In other words, which processing blocks are formed on the semiconductor substrate is determined by the product specifications and is not particularly limited.

[0011] The phase modulation signal generator 10 generates a phase modulation signal and provides the phase modulation signal to the amplifier units 11, 12, and 13 as an input signal RFin. In the semiconductor device 1 according to Embodiment 1, the input signal RFin is amplified using multiple amplifiers and an amplitude control circuit 16 and output as an output signal RFout. The semiconductor device 1 outputs the output signal RFout by adding and combining the output voltages of the multiple amplifiers. The semiconductor device 1 also outputs a selection signal that sequentially switches the number of amplifiers among the multiple amplifiers that are controlled to be in an operating state simultaneously at non-equal time intervals and in multiple stages, based on a sequence determined by the amplitude control circuit 16.

[0012] In semiconductor device 1, the amplitude of the output signal RFout is modulated by changing the number of amplifiers that are in the operating state over time. Here, in the following explanation, the number of stages in which the amplitude control circuit 16 controls the number of amplifiers that are simultaneously in the operating state is referred to as the switching stage. Then, semiconductor device 1 transmits the output signal RFout to antenna 15 via impedance matching circuit 14.

[0013] Here, the configuration of the multiple amplifiers in the semiconductor device 1 will be described in detail. In the semiconductor device 1 according to Embodiment 1, the multiple amplifiers include at least one first amplifier and at least one second amplifier. The first amplifier changes the voltage level of the output signal RFout by an amount of change smaller than the unit amplitude Vu obtained by dividing the maximum amplitude of the output signal RFout by the number of switching stages. The second amplifier changes the voltage level of the output signal RFout by an amount of change larger than the unit amplitude.

[0014] In the example shown in Fig. 1, amplifier units 11 and 12 are shown as the first amplifier. Here, the semiconductor device 1 according to the first embodiment includes, as the first amplifier, a first small-amplitude amplifier (e.g., amplifier unit 11) and a second small-amplitude amplifier (e.g., amplifier unit 12). The amplifier unit 11 changes the signal level of an output signal with an amplitude variation smaller than a unit amplitude Vu. The amplifier unit 12 changes the amplitude of the output signal with a variation larger than that of the first small-amplitude amplifier and smaller than the unit amplitude. Further, an amplifier unit 13 is shown as a second amplifier.

[0015] Here, the maximum amplitude, unit amplitude, amplitude variation, and number of variation stages of the output signal RFout in the present specification will be described. In the present specification, N is defined as the maximum amplitude of the output signal RFout. A value obtained by dividing the maximum amplitude N by the number of variation stages n of the output signal RFout is defined as the unit amplitude Vu. The unit amplitude Vu is set to "1" for example. The number of variation stages is equal to the number of amplifiers (the number of amplification elements) included in the amplifier units 11, 12, and 13 in the semiconductor device 1 shown in Fig. 1, and 16 stages are assumed for example. Further, Vd1 is defined as an amplitude variation by which one amplifier included in the amplifier unit 11 changes the output signal RFout. Vd2 is defined as an amplitude variation by which one amplifier included in the amplifier unit 12 changes the output signal RFout. Vd3 is defined as an amplitude variation by which one amplifier included in the amplifier unit 13 changes the output signal RFout.

[0016] In the following description, an example in which, with respect to the unit amplitude Vu, the amplitude variation Vd1 of each amplifier included in the amplifier unit 11 is set to 4 / 9, the amplitude variation Vd2 of each amplifier included in the amplifier unit 12 is set to 8 / 9, and the amplitude variation Vd3 of each amplifier included in the amplifier unit 13 is set to 12 / 9 in the first embodiment will be described. Note that when the amplitude variation of each amplifier is set in this manner, the sum of the voltage variations of the plurality of amplifiers becomes the same value as the maximum amplitude N.

[0017] Furthermore, as shown in FIG. 1, in the semiconductor device 1 according to the first embodiment, the amplitude control circuit 16 includes a timing generator 17 and a selection signal generation circuit 18. The timing generator 17 instructs the selection signal generation circuit 18 of the timing to raise the selection signal EN and the timing to lower the selection signal EN based on a preset sequence. In the semiconductor device 1, the rise and fall timings of the selection signal EN provided by the timing generator 17 are non-equidistant. The selection signal generation circuit 18 switches the logic level of the selection signal EN based on an instruction from the timing generator 17. In the semiconductor device 1 according to the first embodiment, since the total number of amplifiers included in the amplifier units 11, 12, and 13 is 16, the selection signal generation circuit 18 outputs selection signals EN<1> to EN<16>. That is, in the example shown in FIG. 1, n is 16.

[0018] Here, the control sequence of the amplitude control circuit 16 will be described. FIG. 2 shows an example of an amplitude control table applied to the semiconductor device according to the first embodiment. The example shown in FIG. 2 assumes generation of an output signal RFout having a shape along one period of a waveform derived by a Blackman window function.

[0019] In the semiconductor device 1 according to the first embodiment, waveform shaping is performed by the first amplifier having a small amplitude change width near the start point and end point of the waveform where the curvature of the Blackman window function waveform is large and near the upper vertex of the Blackman window function waveform. Furthermore, in the semiconductor device 1 according to the first embodiment, waveform shaping is performed by the second amplifier having a large amplitude change width in a portion having a small curvature and high linearity. Furthermore, the amplitude control circuit 16 of the semiconductor device 1 defines sequences from the 1st to 32nd in the control order, and switches amplifiers from a standby state to an operating state, or from an operating state to a standby state in accordance with the sequences. That is, in the first embodiment, the sequence of the amplitude control circuit 16 is defined such that a waveform in a portion where the curvature of the output signal is large is shaped by the output voltage of the first amplifier, and a waveform in a portion where the curvature of the output signal is small is shaped by the output voltage of the second amplifier.

[0020] In the example shown in Figure 2, the first two control steps sequentially switch the amplifiers in amplifier unit 11, where the amplitude change is 4 / 9, to the operating state. The next three control steps, the third and fourth, sequentially switch the amplifiers in amplifier unit 12, where the amplitude change is 8 / 9, to the operating state. Next, the fifth through twelfth control steps sequentially switch the amplifiers in amplifier unit 13, where the amplitude change is 12 / 9, to the operating state. The next three control steps, the thirteenth and fourteenth, sequentially switch the amplifiers in amplifier unit 12, where the amplitude change is 8 / 9, to the operating state. The next two control steps, the fifteenth and sixteenth, sequentially switch the amplifiers in amplifier unit 11, where the amplitude change is 4 / 9, to the operating state. Through these sixteenth control steps, the waveform is raised from the lowest voltage to the highest voltage.

[0021] Subsequently, in the 17th and 18th control steps, the amplifiers included in amplifier unit 11 whose amplitude change is 4 / 9 are sequentially switched to standby mode. In the next 19th and 20th control steps, the amplifiers included in amplifier unit 12 whose amplitude change is 8 / 9 are sequentially switched to standby mode. Next, in the 21st to 28th control steps, the amplifiers included in amplifier unit 13 whose amplitude change is 12 / 9 are sequentially switched to standby mode. In the next 29th and 30th control steps, the amplifiers included in amplifier unit 12 whose amplitude change is 8 / 9 are sequentially switched to standby mode. In the next 31st and 32nd control steps, the amplifiers included in amplifier unit 11 whose amplitude change is 4 / 9 are sequentially switched to standby mode. Through these 17th to 32nd control steps, the waveform is raised from the highest voltage to the lowest voltage.

[0022] The waveform formed by the control shown in Figure 2 will be explained. Figure 3 shows a timing chart illustrating the operation of the semiconductor device according to Embodiment 1. In Figure 3, the upper part shows a waveform graph with time on the horizontal axis and the amplitude of the output signal RFout on the vertical axis, and the lower part shows the signal level transition waveform of the selection signal EN with time on the horizontal axis.

[0023] As shown in Figure 3, the semiconductor device 1 according to Embodiment 1 generates an output signal RFout that reproduces the waveform derived by the Blackman window function as discrete values. At this time, the timing at which each amplifier transitions from the standby state to the operating state (for example, the timing at which the selection signal EN switches from a low level to a high level) is set so that the waveform of the Blackman window function intersects near the midpoint of the voltage maintenance period after the voltage level of the output signal RFout changes (the period during which the voltage of the output signal RFout remains constant). With this setting, the timing at which the amplitude control circuit 16 switches the logic level of the selection signal EN is not unequal.

[0024] Furthermore, as shown in Figure 3, the semiconductor device 1 according to Embodiment 1 uses an amplifier with a smaller amplitude change in the portion of the Blackman window function waveform where the curvature is larger. By doing so, the semiconductor device 1 according to Embodiment 1 makes it possible to reduce the quantization error of the output signal RFout with respect to the Blackman window function waveform without increasing the number of control bits from 4 bits.

[0025] Next, Figure 4 shows a graph illustrating the frequency spectrum characteristics of the output signal of the semiconductor device 1 according to Embodiment 1. As a comparative example, Figure 4 shows the frequency spectrum characteristics when all amplifiers are operated with amplitude changes obtained by dividing the maximum amplitude of the output signal RFout into 16 equal parts to generate a Blackman window function waveform.

[0026] As shown in Figure 4, the semiconductor device 1 according to Embodiment 1 has almost the same frequency spectrum characteristics of the main lobe as the comparative example, but there is a difference in the frequency spectrum characteristics of the side lobes in the region with higher frequencies than the main lobe. The signal in the frequency band of these side lobes becomes quantization noise (hereinafter simply referred to as noise). Specifically, in the frequency band of the side lobes that is close to the main lobe, the semiconductor device 1 according to Embodiment 1 has lower frequency spectrum characteristics than the comparative example. Noise in this frequency band is close in frequency to the main lobe and is difficult to remove with a low-pass filter or the like. On the other hand, noise in the frequency band far from the main lobe is easy to remove with a low-pass filter or the like.

[0027] As described above, the semiconductor device 1 according to Embodiment 1 can generate highly accurate waveforms with reduced quantization noise without increasing the number of control bits by using multiple amplifiers with different amplitude changes. This makes it possible to reduce the noise of the side lobes close to the main lobe frequency band of the output signal RFout. By reducing the noise of the side lobes close to the main lobe frequency band of the output signal RFout, it becomes possible to suppress unwanted radiation and achieve good EMC characteristics.

[0028] Furthermore, in the semiconductor device 1 according to Embodiment 1, good frequency spectrum characteristics can be obtained with fewer control bits, making it possible to realize a circuit with good frequency spectrum characteristics on a small circuit scale.

[0029] Furthermore, in the semiconductor device 1 according to Embodiment 1, the noise level in the sidelobe frequency band can be reduced by making the timing of switching the logic level of the selection signal EN uneven.

[0030] Furthermore, as described above, Embodiment 1 can be considered a method for generating an output signal by amplifying an input phase-modulated signal using multiple amplifiers and summing their respective output voltages. Specifically, the method according to Embodiment 1 includes the steps of: outputting a selection signal that sequentially switches the number of amplifiers among the multiple amplifiers that are simultaneously controlled to be in operation state based on a predetermined sequence by an amplitude control circuit at non-equally spaced timings and in multiple stages; setting the number of stages in which the number of amplifiers simultaneously controlled to be in operation state by the amplitude control circuit as the number of switching stages, changing the voltage level of the output signal by a change amount smaller than the unit amplitude obtained by dividing the maximum amplitude of the output signal by the number of switching stages in at least one first amplifier among the multiple amplifiers; changing the voltage level of the output signal by a change amount larger than the unit amplitude in at least one second amplifier among the multiple amplifiers; and generating an output signal in which the waveform of the part of the output signal with large curvature is shaped by the output voltage of the first amplifier and the waveform of the part of the output signal with small curvature is shaped by the output voltage of the second amplifier, controlled by the amplitude control circuit.

[0031] Embodiment 2 Embodiment 2 describes a semiconductor device 2, which is a modified version of the semiconductor device 1 according to Embodiment 1. In the description of Embodiment 2, components that are the same as those described in Embodiment 1 are denoted by the same reference numerals as in Embodiment 1 and their descriptions are omitted.

[0032] Figure 5 shows a block diagram of the semiconductor device according to Embodiment 2. As shown in Figure 5, the semiconductor device 2 according to Embodiment 2 is the semiconductor device 1 according to Embodiment 1 with the addition of an amplifier unit 20. In other words, the semiconductor device 2 according to Embodiment 2 uses amplifiers with four different amplitude change amounts. In the semiconductor device 2 according to Embodiment 2, the amplitude change amount of the amplifier unit 20 is set to the same value as the unit amplitude Vu. The semiconductor device 2 according to Embodiment 2 is set to an amplitude change amount of 1 / 3 of the unit amplitude Vu as the amplitude change amount Vd1 of the amplifier unit 11, an amplitude change amount of 2 / 3 of the unit amplitude Vu as the amplitude change amount Vd2 of the amplifier unit 12, and an amplitude change amount of 4 / 3 of the unit amplitude Vu as the amplitude change amount Vd3 of the amplifier unit 13.

[0033] Next, Figure 6 shows a first example of an amplitude control table applied to the semiconductor device according to Embodiment 2. Figure 7 shows a second example of an amplitude control table applied to the semiconductor device according to Embodiment 2.

[0034] The example shown in Figure 6 is one in which one third amplifier is set up with an amplitude change amount Vd4 equal to the unit amplitude Vu. The example shown in Figure 7 is one in which two third amplifiers are set up with an amplitude change amount Vd4 equal to the unit amplitude Vu. As shown in the first and second examples, in the semiconductor device 2 as well, the allocation of amplitude changes is set so that the total amount of amplitude changes of the 16 amplifiers is 16, which is set to the maximum amplitude N.

[0035] Based on the above explanation, the multiple amplifiers included in the semiconductor device 2 may include an amplifier whose amplitude change amount Vd4 is the same as the unit amplitude Vu.

[0036] Embodiment 3 Embodiment 3 describes specific examples of amplifiers included in the semiconductor device 1 according to Embodiment 1 and the semiconductor device 2 according to Embodiment 2. In the description of Embodiment 2, components that are the same as those described in Embodiment 1 are denoted by the same reference numerals as in Embodiment 1 and their descriptions are omitted.

[0037] Figure 8 shows a block diagram of the amplifier according to Embodiment 3. Figure 8 shows specific circuit examples of AMP1 corresponding to amplifier unit 11, specific circuit examples of AMP2 corresponding to amplifier unit 12, and specific circuit examples of AMP3 corresponding to amplifier unit 13. In Embodiment 3, the amplitude change amounts of the multiple amplifiers included in the semiconductor device are set so that the smallest amplitude change amount Vd1 is 1x, the amplitude change amount Vd2 is 2x, and the amplitude change amount Vd3 is 3x. By setting the amplitude change amounts Vd1, Vd2, and Vd3 in this way, as shown in Figure 8, it is possible to configure amplifiers with multiple amplitude change amounts simply by changing the number of unit amplifiers connected in parallel, thus simplifying the design.

[0038] In the example shown in Figure 8, AMP1, which has an amplitude change of 1 / 3, includes an AND gate 40, a unit amplifier 41, and a coupling capacitor 42. The AND gate 40 gates the input signal RFin with a selection signal EN. The unit amplifier 41 amplifies the input signal RFin that has passed through the AND gate 40 and outputs it. The coupling capacitor 42 outputs the AC component of the signal output from the unit amplifier 41 as the output signal RFout.

[0039] Furthermore, AMP2, which has an amplitude change of 2 / 3 times, is obtained by adding a unit amplifier 43 and a coupling capacitor 44 to AMP1. The unit amplifier 43 and coupling capacitor 44 are connected in parallel with the unit amplifier 41 and coupling capacitor 42. AMP3, which has an amplitude change of 1 times, is obtained by adding a unit amplifier 45 and a coupling capacitor 46 to AMP2. The unit amplifier 45 and coupling capacitor 46 are connected in parallel with the unit amplifiers 41 and 43 and the coupling capacitors 42 and 44.

[0040] Here, we will explain how to calculate the amplitude change of a unit amplifier. If the number of amplifiers is n, the maximum amplitude of the output signal RFout is N, the number of inflection stages is n, h is a number less than n, and m is the number of types of change amounts set for the amplifiers included in the multiple amplifiers, then the smallest change amount among the amplifiers included in the multiple amplifiers (for example, the amplitude change amount of the unit amplifier) ​​is set to a magnitude calculated by (N / h) / m.

[0041] Specifically, the amplifier configuration according to Embodiment 1 can be calculated with N=16, h=12, and m=3, and in this case the amplitude change of the unit amplifier is 4 / 9. Furthermore, the amplifier configuration according to Embodiment 2 can be calculated with N=16, h=12, and m=4, and in this case the amplitude change of the unit amplifier is 1 / 3.

[0042] By setting the amplitude change amount of the unit amplifier in this way and changing the number of unit amplifiers connected in parallel within a single amplifier, it becomes easy to design multiple amplifiers with different amplitude change amounts.

[0043] Embodiment 4 Embodiment 4 describes a semiconductor device 3 which is a modified version of the semiconductor device 1 according to Embodiment 1. In the description of Embodiment 4, components that are the same as those described in Embodiment 1 are denoted by the same reference numerals as in Embodiment 1 and their descriptions are omitted.

[0044] Figure 9 shows a block diagram of the semiconductor device 3 according to Embodiment 4. As shown in Figure 9, the semiconductor device 3 according to Embodiment 4 has power units 30, 31, and 32, each containing one set of the amplifier units 11 to 13 of Embodiment 1. In other words, the semiconductor device 3 according to Embodiment 4 has multiple power units, each containing the same number of amplifiers as the number of stages of change, as a single control unit.

[0045] Furthermore, the semiconductor device 3 according to Embodiment 4 has a power control circuit 50 added to the semiconductor device 1. The power control circuit 50 outputs a power control signal POW that switches the number of power units to operate according to a specified power value. The specified power value is a control value provided from another processing block (not shown) or from outside the semiconductor device. The semiconductor device 3 according to Embodiment 4 increases or decreases the output power of the output signal RFout by changing the number of power units that operate simultaneously in parallel using the power control signal POW.

[0046] As described above, the semiconductor device according to Embodiment 4 is capable of increasing or decreasing the output power of the output signal RFout.

[0047] It should be noted that the present invention is not limited to the embodiments described above, and can be modified as appropriate without departing from the spirit of the invention. In the above embodiments, the number of first amplifiers that change the voltage level of the output signal by a change amount smaller than a unit amplitude is greater than the number of second amplifiers that change the voltage level of the output signal by a change amount larger than a unit amplitude, but the number of second amplifiers can also be increased to be greater than the number of first amplifiers. In other words, the second amplifier can also be configured to include a first large-amplitude amplifier that changes the amplitude of the output signal by a change amount larger than that of the first large-amplitude amplifier, and a second large-amplitude amplifier that changes the amplitude of the output signal by a change amount larger than that of the first large-amplitude amplifier. [Explanation of Symbols]

[0048] 1-3 Semiconductor devices 10 Phase Modulation Signal Generator 11-13, 20 Amplifier Unit 14 Impedance Matching Circuit 15 Antennas 16 Amplitude control circuit 17 Timing Generator 18. Selection signal generation circuit 30-32 Power Unit 50 Power control circuit RF and other input signals RFout output signal EN selection signal POW Power Control Signal

Claims

1. Multiple amplifiers that amplify the input phase-modulated signal and generate an output signal by adding and combining their respective output voltages, The system includes an amplitude control circuit that outputs a selection signal to sequentially switch the number of amplifiers among the plurality of amplifiers that are controlled to be in operation simultaneously, based on a predetermined sequence, at non-equal time intervals and in multiple stages. The number of stages in which the amplitude control circuit controls the number of amplifiers to be in operation simultaneously is defined as the switching stage. The plurality of amplifiers comprises a semiconductor device having at least one first amplifier that changes the voltage level of the output signal by an amount of change smaller than the unit amplitude obtained by dividing the maximum amplitude of the output signal by the number of switching stages, and at least one second amplifier that changes the voltage level of the output signal by an amount of change larger than the unit amplitude.

2. The first amplifier is, A first small-amplitude amplifier having a unit amplitude smaller than the aforementioned, A second small-amplitude amplifier that changes the amplitude of the output signal by a larger amount of change than the first small-amplitude amplifier and by a smaller amount of change than the unit amplitude, A semiconductor device according to claim 1, having the following features.

3. The second amplifier described above is A first large-amplitude amplifier with an amplitude greater than the aforementioned unit amplitude, A second large-amplitude amplifier that changes the amplitude of the output signal with a larger change than the first large-amplitude amplifier, A semiconductor device according to claim 1, having the following features.

4. The semiconductor device according to claim 1, wherein the plurality of amplifiers include a third amplifier that changes the amplitude of the output signal by the same amount of change as the unit amplitude.

5. The semiconductor device according to claim 1, wherein the number of the plurality of amplifiers is the same as the number of the change stages.

6. The power unit comprises multiple units, each consisting of the same number of amplifiers as the number of inflation stages, as a single control unit. The semiconductor device according to claim 4, further comprising a power control circuit for switching the number of power units to be operated according to a specified power value.

7. The semiconductor device according to claim 1, wherein the second amount of change when the second amplifier changes the signal level of the output signal is an integer multiple of the first amount of change when the first amplifier changes the signal level of the output signal.

8. n is the number of the aforementioned amplifiers. The maximum amplitude of the output signal is N, Let the number of the aforementioned change stages be n. Let h be a number less than n. When m is the number of types of change amounts set in the amplifiers included in the plurality of amplifiers, The semiconductor device according to claim 1, wherein the smallest change amount among the amplifiers included in the plurality of amplifiers is set to a magnitude calculated by (N / h) / m.

9. The above (N / h) / m is defined as the unit change, A unit amplifier capable of outputting the aforementioned unit change amount is used. The semiconductor device according to claim 8, wherein the first amplifier and the second amplifier are each configured by connecting a number of the unit amplifiers in parallel according to the magnitude of a set amount of change.

10. A method for generating an output signal by amplifying an input phase-modulated signal using multiple amplifiers and summing their respective output voltages, The process involves outputting a selection signal that sequentially switches the number of amplifiers among the plurality of amplifiers that are controlled to be in an operating state simultaneously, based on a predetermined sequence by the amplitude control circuit, at non-equal time intervals and in multiple stages. The number of stages in which the amplitude control circuit controls the number of amplifiers to be in operation simultaneously is defined as the switching stage. A step of changing the voltage level of the output signal in at least one first amplifier among the plurality of amplifiers by an amount of change smaller than the unit amplitude obtained by dividing the maximum amplitude of the output signal by the number of switching stages, A step of changing the voltage level of the output signal by a change amount greater than the unit amplitude in at least one second amplifier among the plurality of amplifiers, A method for generating an output signal in which the amplitude control circuit controls the waveform of the output signal, shaping the waveform of the portion with large curvature using the output voltage of the first amplifier, and shaping the waveform of the portion with small curvature using the output voltage of the second amplifier.

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