Wiring boards and mounting structures

Abstract

To provide a wiring board that can efficiently transmit high-frequency signals and has high connectivity reliability. [Solution] The wiring board according to this disclosure includes an insulating layer and a conductor layer having a first surface and a second surface opposite to the first surface. The conductor layer 2 includes a first via-hole conductor 21V and a second via-hole conductor 22V located in the insulating layer, a first wiring conductor 21 located on the first surface and connected to the first via-hole conductor 21V, and a second wiring conductor 22 located on the second surface and connected to the second via-hole conductor 22V. In plan view, the second via-hole conductor 22V is positioned to surround at least a portion of the first via-hole conductor 21V. An insulator 1a is located between the first via-hole conductor 21V and the second via-hole conductor 22V.

Description

[Technical Field]

[0001] The present invention relates to a wiring board and a mounting structure using the same. [Background Art]

[0002] In a conventional high-density wiring board as described in Patent Document 1, it has been considered to improve the connection reliability between a fine wiring conductor layer and a small-diameter via conductor. [Prior Art Literature] [Patent Literature]

[0003] [Patent Document 1] Japanese Unexamined Patent Publication No. 2008-192938 [Disclosure of the Invention] [Problem to be Solved by the Invention]

[0004] However, high-frequency signals (for example, high-frequency signals of 20 GHz or higher, the same applies hereinafter) are susceptible to noise, and may not be transmitted efficiently. Furthermore, since the via-hole conductor is relatively small (small diameter), it is easily affected by stress. As a result, for example, cracks may occur between the signal wiring and the via-hole conductor, leading to a decrease in connection reliability.

[0005] An object of the present disclosure is to provide a wiring board that can efficiently transmit high-frequency signals and has high connection reliability. [Means for Solving the Problem]

[0006] The wiring board according to this disclosure includes an insulating layer having a first surface and a second surface opposite to the first surface, and a conductor layer. The conductor layer includes a first via-hole conductor and a second via-hole conductor located in the insulating layer, a first wiring conductor located on the first surface and connected to the first via-hole conductor, and a second wiring conductor located on the second surface and connected to the second via-hole conductor. In a plan view, the second via-hole conductor is positioned to surround at least a portion of the first via-hole conductor. An insulator is located between the first via-hole conductor and the second via-hole conductor.

[0007] The implementation structure relating to this disclosure includes the above-mentioned wiring board and electronic components connected to the wiring board. [Effects of the Invention]

[0008] The wiring board relating to this disclosure has the configuration described in the section on means for solving the problem, which enables efficient transmission of high-frequency signals and also provides high connection reliability. [Brief explanation of the drawing]

[0009] [Figure 1] This is an enlarged explanatory diagram illustrating a mounting structure in which electronic components are mounted on a wiring board according to one embodiment of the present disclosure. [Figure 2A] Figure 1 shows a perspective view illustrating one embodiment of region X (the insulating layer is omitted). [Figure 2B] This is a plan view of the conductive layer shown in Figure 2A. [Figure 3A] Figure 1 shows a perspective view illustrating another embodiment of region X (with the insulating layer omitted). [Figure 3B] This is a plan view of the conductive layer shown in Figure 3A. [Figure 4] Figure 1 shows a perspective view illustrating yet another embodiment of region X (with the insulating layer omitted). [Figure 5] Figures 5A to 5F are explanatory diagrams illustrating one embodiment of a method for forming via-hole conductors. [Figure 6] Figures 6A to 6E are explanatory diagrams illustrating other embodiments of the method for forming via hole conductors. [Modes for carrying out the invention]

[0010] A wiring board according to one embodiment of the present disclosure will be described with reference to Figures 1 to 4. Figure 1 is an enlarged explanatory diagram for illustrating a mounting structure 20 on which electronic components 5 are mounted on a wiring board 10 according to one embodiment of the present disclosure. Specifically, Figure 1 shows a cross-section of a part of the mounting structure 20. The wiring board 10 according to one embodiment includes an insulating layer 1, a conductor layer 2, and a solder resist 3, as shown in Figure 1.

[0011] As shown in Figure 1, in a wiring board 10 according to one embodiment, the insulating layer 1 includes a core insulating layer and a build-up insulating layer. The conductor layer 2 includes a core conductor layer and a build-up conductor layer.

[0012] The core insulating layer is located approximately in the center of the wiring board 10 in the thickness direction and is an insulating layer 1 with a relatively large thickness. The core insulating layer is not particularly limited as long as it is made of an insulating material. Examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin, as well as glass. Only one of these insulating materials may be used, or two or more may be used in combination. The thickness of the core insulating layer is not particularly limited and may be, for example, 200 μm or more and 1500 μm or less.

[0013] The core insulating layer may optionally contain a reinforcing material. Examples of the reinforcing material include insulating cloth materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber and polyester fiber. Only one type of reinforcing material may be used, or two or more types may be used in combination. Further, the core insulating layer may optionally contain an inorganic insulating filler. Examples of the inorganic insulating filler include silica, barium sulfate, talc, clay, glass, calcium carbonate and titanium oxide. Only one type of inorganic insulating filler may be used, or two or more types may be used in combination.

[0014] On both surfaces of the core insulating layer, a core conductor layer that is part of the conductor layer 2 is disposed. The core conductor layer is not particularly limited as long as it is made of a conductive material. Examples of the conductive material include metals such as copper. The thickness of the core conductor layer is not limited, and may be, for example, 10 µm or more and 35 µm or less.

[0015] As shown in FIG. 1, a through-hole conductor is disposed in the core insulating layer to electrically connect the upper and lower surfaces of the core insulating layer. The through-hole conductor is disposed in a through-hole penetrating from the upper surface to the lower surface of the core insulating layer. The through-hole conductor is not particularly limited as long as it is made of a conductive material. Examples of the conductive material include metals such as copper. The through-hole conductor is also part of the conductor layer 2.

[0016] The through-hole conductor is connected to the core conductor layers disposed on both surfaces of the core insulating layer. The through-hole conductor may be formed integrally with the core insulating layer. The through-hole conductor may be disposed only on the inner wall surface of the through-hole, or may be filled in the through-hole.

[0017] A layer including the core insulating layer and the core conductor layer corresponds to a core layer. Although the wiring board 10 shown in FIG. 1 includes a core layer, the core layer is not an essential member. For example, like a coreless substrate, the wiring board 10 may not include a core layer in some cases.

[0018] As shown in Fig. 1, buildup layers are located on both surfaces of the core layer. The buildup layer has a structure in which build-up insulating layers and build-up conductor layers are alternately laminated. As described above, in the case of the wiring board 10 that does not include a core layer, the wiring board 10 includes only the buildup layer.

[0019] A build-up insulating layer is an insulating layer 1 other than a core insulating layer. The build-up insulating layer is not particularly limited as long as it is an insulating material. Examples of the insulating material include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin and polyphenylene ether resin. Only one of these resins may be used, or two or more thereof may be used in combination.

[0020] The build-up insulating layers may be made of the same resin or different resins, respectively. The build-up insulating layer and the core insulating layer may be made of the same resin or different resins. The thickness of the build-up insulating layer is not particularly limited, and may be, for example, 25 µm or more and 45 µm or less. The build-up insulating layers may each have the same thickness or different thicknesses.

[0021] The build-up insulating layer may contain a reinforcing material. Examples of the reinforcing material include insulating cloth materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber and polyester fiber. Only one reinforcing material may be used, or two or more reinforcing materials may be used in combination. Furthermore, the build-up insulating layer may contain an inorganic insulating filler. Examples of the inorganic insulating filler include silica, barium sulfate, talc, clay, glass, calcium carbonate and titanium oxide. Only one type of inorganic insulating filler may be used, or two or more types may be used in combination.

[0022] A build-up conductor layer, which is part of the conductor layer 2, is located on the surface of the build-up insulating layer. The build-up conductor layer is not particularly limited as long as it is made of a conductive material. Examples of conductive materials include metals such as copper. The thickness of the build-up conductor layer is not limited and may be, for example, 10 μm or more and 30 μm or less.

[0023] The build-up conductor layers may be made of the same metal or different metals. The second build-up conductor layer and the core conductor layer may be made of the same metal or different metals. The build-up conductor layers may have the same thickness or different thicknesses.

[0024] As shown in Figure 1, solder resist 3 may be located on both sides of the wiring board 10. The solder resist 3 is made of resin, and examples of the resin include acrylic-modified epoxy resin.

[0025] The build-up insulating layer has via-hole conductors 2V for electrically connecting the upper and lower surfaces of the build-up insulating layer. In the wiring board 10, the via-hole conductors 2V include a first via-hole conductor 21V and a second via-hole conductor 22V, as shown in Figures 2A and 2B. Figure 2A is a perspective view illustrating one embodiment of region X shown in Figure 1 (however, insulating layer 1 is omitted). Figure 2B is a plan view of the conductor layer 2 shown in Figure 2A. The first via-hole conductor 21V and the second via-hole conductor 22V are located in insulating layer 1 (build-up conductor layer).

[0026] As shown in Figures 2A and 2B, the first via hole conductor 21V has a columnar shape, and the second via hole conductor 22V has a shape that surrounds at least a portion of the first via hole conductor 21V. In Figures 2A and 2B, the first via hole conductor 21V has a cylindrical shape, but it may also be a prismatic shape such as a rectangular prism or a frustoconical shape. The second via hole conductor 22V may have a shape that surrounds at least a portion of the first via hole conductor 21V in any of the above forms.

[0027] The first via hole conductor 21V and the second via hole conductor 22V are not particularly limited as long as they are made of conductive material. Examples of conductive materials include metals such as copper. The first via hole conductor 21V and the second via hole conductor 22V may be made of the same metal or different metals. The thickness of the second via hole conductor 22V is not limited. For example, the second via hole conductor 22V may have a thickness of 10 μm or more and 30 μm or less.

[0028] As shown in Figures 2A and 2B, an insulator 1a is located between the first via-hole conductor 21V and the second via-hole conductor 22V. That is, the first via-hole conductor 21V and the second via-hole conductor 22V are not in direct contact, but are located via the insulator 1a. With this structure, high-frequency signals are transmitted by capacitive coupling, while low-frequency signals (low-frequency signals below 10 GHz) are easily cut off. Therefore, the system is less susceptible to low-frequency noise, and high-frequency signals are transmitted efficiently.

[0029] The insulator 1a is not particularly limited as long as it is an insulating material. Examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin, or insulating materials highly filled with ceramic particles (such as barium titanate). Only one of these resins may be used, or two or more may be used in combination. The insulator 1a may also be part of the insulating layer 1 (build-up insulating layer). The relative permittivity of the insulator 1a is not limited; for example, the insulator 1a may have a relative permittivity of 25 to 43. In this case, capacitive coupling becomes easier even when the distance between the first via hole conductor 21V and the second via hole conductor 22V is relatively large. This makes it possible to allow for a margin of error in manufacturing precision, for example. Furthermore, the insulator 1a may have a relative permittivity of 3.0 to 4.5. When the insulator 1a has a relative permittivity of 3.0 to 4.5, the insulator 1a has a relative permittivity similar to that of insulating materials used in existing package substrates. Therefore, for example, the insulator 1a can be made of the insulating layer 1 without the need to prepare a separate component, and high-frequency signals are transmitted more efficiently.

[0030] The width between the first via conductor 21V and the second via conductor 22V is not limited. The width between the first via conductor 21V and the second via conductor 22V may be, for example, 0.5 μm or more and 2.0 μm or less. When the width between the first via conductor 21V and the second via conductor 22V is 0.5 μm or more and 2.0 μm or less, a coupling capacitor structure is formed, and high-frequency signals are transmitted more efficiently. Furthermore, it is less affected by surface roughness, and the occurrence of via cracks is reduced.

[0031] The second via-hole conductor 22V may have a gap (width W) as shown in Figures 2A and 2B in a plan view, or it may be cylindrical without a gap (width W) as shown in Figures 3A and 3B. Figure 3A is a perspective view illustrating another embodiment of region X shown in Figure 1 (however, the insulating layer 1 is omitted). Figure 3B is a plan view of the conductor layer 2 shown in Figure 3A in a plan view. When the second via-hole conductor 22V is cylindrical, capacitive coupling is easily generated between the first via-hole conductor 21V and the second via-hole conductor 22V. In such a case, the occurrence of via cracks is reduced, and a coupling capacitor structure is formed, making it easier to transmit high-frequency signals.

[0032] If the second via-hole conductor 22V has a gap, the gap may be located in a region that overlaps with the first wiring conductor 21 in a plan view, as shown in Figures 2A and 2B. If the second via-hole conductor 22V has a gap in a region that overlaps with the first wiring conductor 21, it forms a coupling capacitor structure. As a result, the DC component is blocked, and low-frequency noise such as power supply noise components is less likely to be transmitted. The width W of the gap is not limited and may be, for example, 0.05 μm or more and 65 μm or less.

[0033] As shown in Figure 4, in the wiring board 10 according to one embodiment, a third via hole conductor 23V may be located further apart from the first via hole conductor 21V and the second via hole conductor 22V. Figure 4 is a perspective view illustrating yet another embodiment of region X shown in Figure 1 (with the insulating layer 1 omitted). The third via hole conductor 23V is connected to both the first wiring conductor 21 and the second wiring conductor 22.

[0034] When the third via hole conductor 23V is present, parallel resonance occurs between the third via hole conductor 23V and the first via hole conductor 21V and the second via hole conductor 22V. As a result, a filter is formed that cuts out signals in a specific frequency band, and unwanted signals are cut out. Consequently, the system becomes less susceptible to noise, and high-frequency signals are transmitted efficiently. The third via hole conductor 23V may be positioned at a distance of 100 μm to 500 μm at its shortest point from the first via hole conductor 21V and the second via hole conductor 22V.

[0035] In one embodiment of the wiring board 10, the method for forming the first via hole conductor 21V and the second via hole conductor 22V is not limited. The method for forming the first via hole conductor 21V and the second via hole conductor 22V will be described with reference to Figures 5A to 5F. Figures 5A to 5F are explanatory diagrams illustrating one embodiment of the method for forming the via hole conductor 2V.

[0036] As shown in Figure 5A, a conductor layer 2 corresponding to the second wiring conductor 22 is formed on one surface of the insulating layer 1. Then, as shown in Figure 5B, another insulating layer 1 is formed on the second wiring conductor 22 and on the surface of the insulating layer 1 on which the second wiring conductor 22 is located. In this other insulating layer 1, the surface on which the conductor layer 2 corresponding to the second wiring conductor 22 is located is designated as the second surface 12, and the surface opposite to the second surface 12 is designated as the first surface 11.

[0037] Next, as shown in Figure 5C, via holes for filling the first via hole conductor 21V are formed in a region that does not overlap with the conductor layer 2 corresponding to the second wiring conductor 22 in a planar perspective view, extending from the first surface 11 to the second surface 12. The via holes for filling the first via hole conductor 21V may or may not penetrate from the first surface 11 to the second surface 12. The via holes for filling the first via hole conductor 21V are formed, for example, by a laser.

[0038] The method for forming the first via hole conductor 21V is not limited and can be, for example, by plating. Specifically, the first via hole conductor 21V is formed by first forming a base metal layer by electroless plating, and then forming an electroplated layer on the surface of the base metal layer by electroplating.

[0039] Next, as shown in Figure 5D, via holes for filling the second via hole conductor 22V are formed from the first surface 11 toward the second surface 12 so that a portion of the via holes contact the conductor layer 2 corresponding to the second wiring conductor 22. In Figure 5D, the view from the direction of arrow A in the left-hand diagram is the plan view on the right.

[0040] The via holes for filling the second via hole conductor 22V are formed so as not to come into contact with the first via hole conductor 21V. As a result, the insulator 1a located between the first via hole conductor 21V and the second via hole conductor 22V corresponds to a part of the insulating layer 1.

[0041] Next, as shown in Figure 5E, the second via hole conductor 22V is formed in the via hole for filling the second via hole conductor 22V, and then the first wiring conductor 21 is formed. In Figure 5E, the view from the direction of arrow B in the left-hand diagram is the plan view on the right.

[0042] The method for forming the second via hole conductor 22V and the first wiring conductor 21 is not limited and can be, for example, by plating. Specifically, after forming a base metal layer by electroless plating, a dry film resist (DFR) is formed according to the desired shape of the first wiring conductor 21. Then, by subjecting the material to electroplating to remove the DFR, the second via hole conductor 22V and the first wiring conductor 21 are formed as shown in Figure 5E. The first wiring conductor 21 is in contact with the first via hole conductor 21V.

[0043] Through this procedure, the first via hole conductor 21V and the second via hole conductor 22V are formed. As shown in Figure 5F, an insulating layer 1 may be formed, and if necessary, the first via hole conductor 21V and the second via hole conductor 22V may be formed using the same procedure.

[0044] Next, other methods for forming the first via hole conductor 21V and the second via hole conductor 22V will be described based on Figures 6A to 6E. Figures 6A to 6E are explanatory diagrams illustrating other embodiments of the method for forming the via hole conductor 2V.

[0045] First, Figures 6A and 6B are the same as Figures 5A and 5B above, and a detailed explanation is omitted. Next, as shown in Figure 6C, via holes are formed to fill the first via hole conductor 21V. Via holes for filling the first via hole conductor 21V are formed from the first surface 11 toward the second surface 12 so that they partially contact the conductor layer 2 corresponding to the second wiring conductor 22.

[0046] Next, a base metal layer is formed on the inner wall surface of the via hole for filling the first via hole conductor 21V, for example, by electroless plating. This base metal layer corresponds to the second via hole conductor 22V. Then, as shown in Figure 6D, an insulating film is formed on the surface of the base metal layer. This film corresponds to the insulator 1a.

[0047] Next, as shown in Figure 6E, the first via-hole conductor 21V and the first wiring conductor 21 are formed by sequentially applying electroless plating and electrolytic plating to the surface of the coating. As shown in Figure 6E, the second via-hole conductor 22V has a bottom conductor (part of the second via-hole conductor 22V) located on the second surface 12 side of the insulating layer 1, spaced apart from the bottom surface of the first via-hole conductor 21V. In this way, a part of the second via-hole conductor 22V (bottom conductor) may be located between the bottom surface of the first via-hole conductor 21V and the second surface 12 of the insulating layer 1.

[0048] Next, a verification model was prepared to verify the electrical characteristics of the wiring board 10 according to one embodiment. Specifically, it included a first via-hole conductor 21V having a diameter of 55 μm and a second via-hole conductor 22V having a diameter of 65 μm, with an insulator 1a having a width of 1 μm positioned between the first via-hole conductor 21V and the second via-hole conductor 22V. The insulator 1a is part of the insulating layer 1. The first wiring conductor 21 and the second wiring conductor 22 each had a length of 15 mm. The first via-hole conductor 21V, the second via-hole conductor 22V, the first wiring conductor 21, and the second wiring conductor 22 were made of copper. The width W of the gap located in the second via-hole conductor 22V was 30 μm.

[0049] For comparison, a comparative model was fabricated in which a wiring conductor was connected to a standard via-hole conductor. The surface of the via-hole conductor had a diameter of 65 μm, and the bottom surface of the via-hole conductor had a diameter of 55 μm. The lands located on the surface of the via-hole conductor had a diameter of 100 μm. The wiring conductors connected to the via-hole conductors were each 15 mm long. Both the via-hole conductors and the wiring conductors were made of copper.

[0050] Simulations were performed using the obtained verification and comparison models. In the comparison model, all signals, from low-frequency to high-frequency, were transmitted without being cut off. Therefore, in the comparison model, the transmission of high-frequency signals was affected by noise from low-frequency signals. On the other hand, in the verification model, low-frequency signals were cut off, and high-frequency signals were transmitted without being affected by noise.

[0051] Next, the mounting structure according to this disclosure will be described with reference to Figure 1. The mounting structure 20 according to one embodiment includes a wiring board 10 according to one embodiment and an electronic component 5 located in the mounting area of ​​the wiring board 10.

[0052] In the mounting area where the electronic component 5 is mounted, a mounting structure 20 according to one embodiment is obtained by connecting the conductive layer 2 (pad) exposed from an opening in the solder resist 3 located on the surface of the build-up layer to the electrodes of the electronic component 5 via solder 4. Examples of electronic components 5 include semiconductor integrated circuit elements and optoelectronic elements. In the mounting structure 20 according to one embodiment, a conductive layer 2 (pad) exposed from an opening in the solder resist 3 is also located on the side opposite to the side on which the electronic component 5 is mounted. A motherboard, for example, may be connected to this pad via solder 4, and further electronic components 5 may be connected via solder 4.

[0053] The embodiments of this disclosure have been described above. However, the invention relating to this disclosure is not limited to the embodiments described above, and various modifications and improvements are possible within the scope of this disclosure as shown in (1) to (10) below.

[0054] (1) The wiring board according to the present disclosure includes an insulating layer and a conductor layer having a first surface and a second surface opposite to the first surface. The conductor layer includes a first via-hole conductor and a second via-hole conductor located in the insulating layer, a first wiring conductor located on the first surface and connected to the first via-hole conductor, and a second wiring conductor located on the second surface and connected to the second via-hole conductor. In a plan view, the second via-hole conductor is positioned to surround at least a portion of the first via-hole conductor. An insulator is located between the first via-hole conductor and the second via-hole conductor. (2) In the wiring board described in (1) above, the distance between the first via hole conductor and the second via hole conductor is 0.5 μm or more and 2.0 μm or less. (3) In the wiring board described in (1) or (2) above, in a plan view, the second via hole conductor has a gap in the region including the portion that overlaps with the first wiring conductor. (4) In the wiring board described in any of (1) to (3) above, the second via hole conductor has a thickness of 10 μm or more and 30 μm or less when viewed in plan. (5) In the wiring board described in any of (1) to (4) above, the insulator has a relative permittivity of 25 to 43. (6) In the wiring board described in any of (1) to (5) above, the insulator is part of the insulating layer. (7) In the wiring board described in any of (1) to (6) above, a third via hole conductor is located further apart from the first via hole conductor and the second via hole conductor, and the third via hole conductor is connected to both the first wiring conductor and the second wiring conductor. (8) In the wiring board described in (7) above, the third via hole conductor is located at a distance of 100 μm or more and 500 μm or less from the first via hole conductor and the second via hole conductor at the shortest distance. (9) In the wiring board described in any of (1) to (8) above, the second via hole conductor has a bottom conductor that is spaced apart from and facing the bottom surface of the first via hole conductor on the second surface side. (10) The implementation structure relating to this disclosure includes a wiring board as described in any of (1) to (9) above, and an electronic component connected to the wiring board. [Explanation of Symbols]

[0055] 1. Insulating layer 11 Page 1 12 Side 2 1a Insulator 2 Conductor layers 2V via hole conductor 21 First Wiring Conductor 21V First via hole conductor 22 Second Wiring Conductor 22V Second via hole conductor 23V Third via hole conductor 3 Solder Resist 4 Handa 5 Electronic Components 10 Wiring board 20 Implementation Structures

Claims

1. An insulating layer having a first surface and a second surface on the opposite side of the first surface, Conductor layer, Includes, The conductor layer includes a first via-hole conductor and a second via-hole conductor located in the insulating layer, a first wiring conductor located on the first surface and connected to the first via-hole conductor, and a second wiring conductor located on the second surface and connected to the second via-hole conductor. In a plan view, the second via hole conductor is positioned to surround at least a portion of the first via hole conductor. An insulator is located between the first via-hole conductor and the second via-hole conductor. Wiring board.

2. The wiring board according to claim 1, wherein the space between the first via hole conductor and the second via hole conductor has a width of 0.5 μm or more and 2.0 μm or less.

3. The wiring board according to claim 1, wherein, in a plan view, the second via hole conductor has a gap in a region that includes a portion overlapping with the first wiring conductor.

4. The wiring board according to claim 1, wherein, in a plan view, the second via hole conductor has a thickness of 10 μm or more and 30 μm or less.

5. The wiring board according to claim 1, wherein the insulator has a relative permittivity of 25 or more and 43 or less.

6. The wiring board according to claim 1, wherein the insulator is a part of the insulating layer.

7. A third via hole conductor is located further apart from the first via hole conductor and the second via hole conductor. The third via-hole conductor is connected to both the first wiring conductor and the second wiring conductor. The wiring board according to claim 1.

8. The wiring board according to claim 7, wherein the third via hole conductor is located at a distance of 100 μm or more and 500 μm or less from the first via hole conductor and the second via hole conductor at its shortest point.

9. The wiring board according to claim 1, wherein the second via hole conductor has a bottom conductor that is spaced apart from and facing the bottom surface of the first via hole conductor on the second surface side.

10. A mounting structure comprising a wiring board according to any one of claims 1 to 9 and an electronic component connected to the wiring board.

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