Stimulation voltage circuit, controller, and electrical stimulator

Abstract

This makes it possible to deliver the desired electrical stimulation even under heavy loads. [Solution] The stimulation voltage circuit is a circuit that generates a voltage to provide electrical stimulation to the human body between a first electrode and a second electrode that are electrically in contact with the human body, respectively. This stimulation voltage circuit includes a first high-side transistor and a first low-side transistor connected in series, a first connection point to be connected to the first electrode, a second high-side transistor and a second low-side transistor connected in series, a second connection point to be connected to the second electrode, and a parallel transistor connected in parallel with the first high-side transistor, the second high-side transistor, the first low-side transistor, or the second low-side transistor.

Description

[Technical Field]

[0001] The present invention relates to a stimulation voltage circuit, a controller, and an electrical stimulation device. [Background technology]

[0002] Electrical stimulation devices that deliver electrical stimulation to a user's muscles have been known for some time. These devices can cause muscles to tense and relax by passing a weak electric current through them. For example, Patent Document 1 discloses an electrical stimulation device that utilizes an H-bridge circuit to generate a voltage for delivering electrical stimulation. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] International Publication No. 2013 / 134763 [Overview of the project] [Problems that the invention aims to solve]

[0004] However, the inventors have come to recognize the following problem: When it is necessary to apply a large electrical stimulus to a heavily stressed part of the human body (for example, the lower body), the H-bridge circuit requires a high current capacity.

[0005] The present invention has been made in view of these circumstances, and one of its exemplary objectives is to provide a stimulation voltage circuit, controller, and electrical stimulation device that can deliver desired electrical stimulation even under heavy loads. [Means for solving the problem]

[0006] A stimulation voltage circuit according to one aspect of the present invention is a circuit that generates a voltage for applying electrical stimulation to a human body between a first electrode and a second electrode that are electrically in contact with the human body, respectively. This stimulation voltage circuit includes a high-side line, a low-side line, a first high-side transistor and a first low-side transistor connected in series between the high-side line and the low-side line, a first connection point between the first high-side transistor and the first low-side transistor to be connected to the first electrode, a second high-side transistor and a second low-side transistor connected in series between the high-side line and the low-side line, a second connection point between the second high-side transistor and the second low-side transistor to be connected to the second electrode, and a parallel transistor connected in parallel with the first high-side transistor, the second high-side transistor, the first low-side transistor, or the second low-side transistor.

[0007] Furthermore, any combination of the above components, as well as conversions of the expression of the present invention between methods, apparatus, systems, recording media, computer programs, etc., are also valid embodiments of the present invention. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide a stimulation voltage circuit, controller, and electrical stimulation device that can deliver desired electrical stimulation even under heavy loads. [Brief explanation of the drawing]

[0009] [Figure 1] This is a schematic diagram of an electrical stimulation device according to the first embodiment. [Figure 2] This is a block diagram of the controller according to the same embodiment. [Figure 3] This is a circuit diagram of the power supply circuit according to the same embodiment. [Figure 4] This is a circuit diagram of the stimulation voltage circuit according to the same embodiment. [Figure 5] This is a timing chart illustrating an example of the operation of the controller according to the same embodiment. [Figure 6] This is a circuit diagram illustrating an example of operation in the first phase of the stimulation voltage circuit according to the same embodiment. [Figure 7] This is a circuit diagram illustrating an example of operation in the third phase of the stimulation voltage circuit according to the same embodiment. [Figure 8] Figure 8(a) is a circuit diagram showing a part of the stimulation voltage circuit according to the first embodiment, and Figure 8(b) is a circuit diagram in which the first high-side transistor is replaced with a MOS transistor in the circuit diagram shown in Figure 8(a). [Figure 9] Figure 9 is a circuit diagram partially showing the stimulation voltage circuit when three first high-side transistors are provided. [Figure 10] Figure 10(a) is a diagram showing a circuit that drives a load using two transistors, and Figure 10(b) is a circuit diagram partially showing the stimulation voltage circuit according to the first embodiment. [Figure 11] This is a circuit diagram of a boost circuit related to comparative technology. [Figure 12] This is a circuit diagram illustrating the high-side circuit of the stimulation voltage circuit related to comparative technology. [Figure 13] Figure 13(a) shows the maximum voltage, minimum voltage, and inter-electrode voltage of the controller according to comparison technique 1 with respect to a set voltage level. Figure 13(b) shows the maximum voltage, minimum voltage, and inter-electrode voltage of the controller according to comparison technique 2 with respect to a set voltage level. Figure 13(c) shows the maximum voltage, minimum voltage, and inter-electrode voltage of the controller according to the first embodiment with respect to a set voltage level. [Figure 14] This is a timing chart showing an example of the control signal and inductor current of a boost circuit according to the first embodiment, as well as an example of the control signal and inductor current of a boost circuit according to the comparative technology. [Figure 15] This is a circuit diagram illustrating the stimulation voltage circuit according to the second embodiment. [Modes for carrying out the invention]

[0010] (Embodiment) Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings. In the description of the drawings, the same elements will be denoted by the same reference numerals, and redundant explanations will be omitted as appropriate.

[0011] In this specification, "member A is connected to member B" includes not only cases where member A and member B are directly connected physically, but also cases where member A and member B are indirectly connected via other members that do not substantially affect their electrical connection or impair the functions or effects produced by their combination.

[0012] Similarly, "member C is connected (provided) between member A and member B" includes not only cases where member A and member C, or member B and member C, are directly connected, but also cases where they are indirectly connected via other members that do not substantially affect their electrical connection state or impair the function or effect produced by their combination.

[0013] In this specification, the symbols attached to electrical signals such as voltage signals and current signals, or to circuit elements such as resistors, capacitors, and inductors, shall represent the respective voltage values, current values, or circuit constants (resistance values, capacitance values, and inductance) as needed.

[0014] (First Embodiment) Figure 1 is a schematic diagram of the electrical stimulation device 1 according to the first embodiment. The electrical stimulation device 1 is an EMS (Electrical Muscle Stimulation) device that provides electrical stimulation to the user's muscles. The electrical stimulation device 1 according to this embodiment mainly comprises a belt 2, a controller 10, a first electrode 18a, and a second electrode 18b. The controller 10, the first electrode 18a, and the second electrode 18b are each provided on the belt 2.

[0015] The belt 2 may be fixed to any part of the human body, but the belt 2 according to this embodiment is configured to be fixed to the user's thigh. For example, the belt 2 may be wrapped around the user's thigh and fixed to the user's thigh using a connecting member (not shown) that connects one end 20 and the other end 22 of the belt 2. The connecting member may be a member configured to connect two parts of various known types, such as fasteners and hook-and-loop fasteners.

[0016] The first electrode 18a and the second electrode 18b each make electrical contact with the human body. The first electrode 18a and the second electrode 18b may not only make direct contact with the human body, but may also make electrical contact with the human body via other conductive materials. The first electrode 18a and the second electrode 18b may each be electrodes that do not require a consumable gel pad, for example, and may specifically be cloth electrodes. Cloth electrodes can be used after being moistened with water.

[0017] In this embodiment, the first electrode 18a and the second electrode 18b are positioned to provide electrical stimulation to the user's thigh. Specifically, the first electrode 18a and the second electrode 18b each make electrical contact with the user's thigh when the belt 2 is fixed to the user's thigh.

[0018] A voltage is generated between the first electrode 18a and the second electrode 18b in accordance with the operation of the controller 10. When these electrodes are in electrical contact with the human body and a voltage is generated between them, an electrical stimulus is applied to the human body. For example, the muscles of the lower body (or thigh), such as the quadriceps, adductor muscles, and hamstrings, may be electrically stimulated. In this specification, the lower body refers mainly to the part of the human body below the buttocks. Figure 1 shows an example of one pair of electrodes (first electrode 18a and second electrode 18b) for applying electrical stimulation, but there may be two or three such pairs of electrodes, or four or more.

[0019] Figure 2 is a block diagram of the controller 10 according to the present embodiment. The controller 10 according to the present embodiment includes an operation unit 100, a control unit 110, a power supply circuit 120, and a stimulation voltage circuit 140.

[0020] The operation unit 100 is configured to transmit an instruction signal S INS to the control unit 110 in accordance with an operation by a user. The operation unit 100 may include, for example, a power button and a button for setting an output voltage level of the stimulation voltage circuit 140. The instruction signal S INS may include, for example, a signal indicating a voltage level set in accordance with a user's operation.

[0021] The power supply circuit 120 generates an output voltage V OUT_1 supplied to the stimulation voltage circuit 140. The power supply circuit 120 according to the present embodiment includes a booster circuit (described later in detail) that boosts an input voltage from a battery (not shown) to generate a DC output voltage V OUT_1 .

[0022] The stimulation voltage circuit 140 generates an inter-electrode voltage V EMS_1 for applying electrical stimulation to a human body between the first electrode 18a and the second electrode 18b. The inter-electrode voltage V EMS_1 is a voltage V generated at the first electrode 18a A1 and a voltage V generated at the second electrode 18b B1 , which is the difference between the two. When the inter-electrode voltage V EMS_1 is generated, electrical stimulation is applied to the human body (the thigh in the present embodiment) through the first electrode 18a and the second electrode 18b. The stimulation voltage circuit 140 according to the present embodiment includes an H-bridge circuit for generating the inter-electrode voltage V EMS_1 .

[0023] The control unit 110 comprehensively controls the operation of the controller 10. The control unit 110 may consist of one of the following: a microcontroller, an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), a gate IC, or other LSI (Large Scale Integration), or any combination thereof.

[0024] In this embodiment, the control unit 110 controls the operation of the power supply circuit 120 and the stimulation voltage circuit 140. The control unit 110 may, if necessary, have a skin detection circuit for detecting whether the first electrode 18a and the second electrode 18b are in contact with the user's skin.

[0025] The control unit 110 in this embodiment receives a feedback signal S FB Accordingly, control signal S for PWM (Pulse Width Modulation) control of the boost circuit of the power supply circuit 120. PWM_1 Generates control signal S. PWM_1 The duty cycle may be, for example, a value corresponding to the set voltage level. Specifically, the duty cycle is such that the higher the set voltage level, the higher the output voltage V of the power supply circuit 120. OUT_1 It may be adjusted to increase. The control unit 110 according to this embodiment controls the control signal S of the switching element of the stimulation voltage circuit 140. SW_A ,S SW_B Generates.

[0026] Figure 3 is a circuit diagram of the power supply circuit 120 according to this embodiment. The power supply circuit 120 according to this embodiment includes a boost circuit 122, a discharge circuit 124, a feedback circuit 126, and an output line 128.

[0027] The boost circuit 122 receives the input voltage V from the battery (not shown). BAT The voltage is boosted and the output voltage V is supplied to output line 128. OUT_1 The boost circuit 122 according to this embodiment generates the input voltage V BATThe input lines supplied are 123, resistors R1, R2, inductor L1, capacitors C1, C2, and output capacitor C. OUT This includes diodes D1 and D2 and transistor MN1.

[0028] Transistor MN1 is composed of an N-channel MOS (Metal Oxide Semiconductor) transistor. The source of transistor MN1 is grounded, and the gate of transistor MN1 is connected to a control signal S for PWM control. PWM_1 The voltage V obtained by dividing the voltage through resistors R1 and R2. PWM_1 The following is entered.

[0029] One end of capacitor C1 is connected to input line 123, and the other end of capacitor C1 is grounded. One end of inductor L1 is connected to input line 123, and the other end of inductor L1 is connected to the drain of transistor MN1.

[0030] The anode of diode D1 is connected to the drain of transistor MN1, and the cathode of diode D1 is connected to the anode of diode D2. The cathode of diode D2 is connected to output line 128.

[0031] Output capacitor C OUT The output voltage V depends on whether transistor MN1 is on or off. OUT_1 It is designed to be charged by output capacitor C. OUT One end is connected to output line 128, and output capacitor C OUT The other end is grounded.

[0032] Control signal S PWM_1 When transistor MN1 is driven accordingly, inductor L1 receives an inductor current I corresponding to the operation of transistor MN1. L1 The current flows. Output capacitor C OUT The inductor current I L1 Output voltage V OUT_1 It is charged by the output voltage V. OUT_1 is the control signal S PWM_1It has a size corresponding to its duty cycle.

[0033] The discharge circuit 124 has an output capacitor C OUT The circuit is configured to discharge. The discharge circuit 124 according to this embodiment includes a transistor BT1 and a resistor R3. Transistor BT1 is composed of an npn type bipolar transistor. The emitter of transistor BT1 is grounded, and the collector of transistor BT1 is connected to the output line 128. One end of the resistor R3 is connected to a control signal S for controlling the on / off state of transistor BT1. DIS A power supply is provided, and the other end of resistor R3 is connected to the base of transistor BT1. Control signal S DIS When transistor BT1 is turned on, output capacitor C OUT Current flows from transistor BT1 to output capacitor C. OUT The following is discharged: Control signal S DIS This may be generated by the control unit 110.

[0034] The feedback circuit 126 outputs V OUT_1 Feedback signal S for feeding back to the control unit 110 FB The output voltage V is generated. The feedback circuit 126 according to this embodiment includes resistors R4 to R6 and a capacitor C2. One end of resistor R6 is connected between resistors R4 and R5. One end of capacitor C2 is connected to one end of resistor R6, and the other end of capacitor C2 is grounded. Between resistors R4 and R5, the output voltage V OUT_1 The feedback voltage V obtained by dividing the voltage FB This is generated. At the other end of resistor R6, the feedback voltage V FB Feedback signal S corresponding to this FB This is generated.

[0035] Figure 4 is a circuit diagram of the stimulation voltage circuit 140 according to this embodiment. The stimulation voltage circuit 140 according to this embodiment has a circuit configuration based on an H-bridge circuit, and specifically includes a high-side line 142, a low-side line 144, a high-side circuit 146, a low-side circuit 148, a first switch circuit 150, a second switch circuit 152, a diode D3, a first connection point CP1, and a second connection point CP2.

[0036] The anode of diode D3 has the output voltage V. OUT_1 The voltage is supplied, and the cathode of diode D3 is connected to the high-side line 142. The high-side line 142 is connected to the output voltage V OUT_1 The corresponding voltage V H This is the line through which voltage V is supplied, and in this embodiment, voltage V is supplied via diode D3. H The forward voltage drop across diode D3 is V. F Expressed as, the voltage of high-side line 142 is V H V H =V OUT_1 -V F It is represented as follows. Lowside line 144 is a line connected to the ground.

[0037] The high-side circuit 146 is provided between the high-side line 142 and the low-side circuit 148. The high-side circuit 146 consists of first high-side transistors BH11, BH12, second high-side transistors BH21, BH22 and resistors R7~R 10 This includes the first high-side transistors BH11 and BH12 and the second high-side transistors BH21 and BH22. Hereinafter, when no particular distinction is made between them, they may be collectively referred to simply as "high-side transistors."

[0038] The first high-side transistors BH11, BH12 and the second high-side transistors BH21, BH22 in this embodiment are each composed of identical pnp bipolar transistors. The emitters of the first high-side transistors BH11, BH12 and the second high-side transistors BH21, BH22 are connected to the high-side line 142. The bases of the first high-side transistors BH11, BH12 are connected between resistors R7 and R8. The bases of the second high-side transistors BH21, BH22 are connected between resistors R9 and R 10 It is connected between the two.

[0039] In this embodiment, the first high-side transistor BH12 is a first parallel transistor connected in parallel with the first high-side transistor BH11 between the high-side line 142 and the first connection point CP1. In this embodiment, the second high-side transistor BH22 is a second parallel transistor connected in parallel with the second high-side transistor BH21 between the high-side line 142 and the second connection point CP2.

[0040] Resistor R7 is the pull-up resistor for the first high-side transistors BH11 and BH12, and one end of resistor R7 is connected to the high-side line 142. Resistor R8 is the base resistor for the first high-side transistors BH11 and BH12, and one end of resistor R8 is connected to the other end of resistor R7. Resistor R9 is the pull-up resistor for the second high-side transistors BH21 and BH22, and one end of resistor R9 is connected to the high-side line 142. 10 These are the base resistors of the second high-side transistors BH21 and BH22, respectively, and resistor R 10 One end is connected to the other end of resistor R9.

[0041] The ratio of resistor R7 to resistor R8 and the ratio of resistor R9 to resistor R 10 The ratios are, for example, 1 / 100 (i.e., R7:R8=R9:R 10The ratio may be approximately 100:1. In this embodiment, resistors R7 and R9 have the same resistance value (i.e., R7=R9), and resistors R8 and R 10 These have the same resistance value (i.e., R8 = R 10 ).

[0042] The low-side circuit 148 is provided between the high-side circuit 146 and the low-side line 144. The low-side circuit 148 consists of first low-side transistors BL11, BL12, second low-side transistors BL21, BL22, and resistor R 11 ~R 15 and diode D4. Hereinafter, when the first low-side transistors BL11, BL12 and the second low-side transistors BL21, BL22 are not specifically distinguished, they may be collectively referred to simply as "low-side transistors".

[0043] In this embodiment, the first low-side transistors BL11, BL12 and the second low-side transistors BL21, BL22 are each composed of pnp bipolar transistors. The emitters of the first low-side transistors BL11, BL12 are connected to the collectors of the first high-side transistors BH11, BH12. The bases of the first low-side transistors BL11, BL12 are connected to resistor R 11 and resistor R 12 It is connected between the two. The emitters of the second low-side transistors BL21 and BL22 are connected to the collectors of the second high-side transistors BH21 and BH22. The bases of the second low-side transistors BL21 and BL22 are connected to resistor R 13 and resistor R 14 It is connected between the two.

[0044] Thus, the first low-side transistor BL1 is connected in series with the first high-side transistor BH11 between the high-side line 142 and the low-side line 144. Similarly, the second low-side transistor BL2 is connected in series with the second high-side transistor BH21 between the high-side line 142 and the low-side line 144.

[0045] Resistance R 11 One end is connected to the emitters of the first low-side transistors BL11 and BL12, respectively. Resistor R 11 The other end is resistor R, which is the base resistor of the first low-side transistors BL11 and BL12. 12 It is connected to one end of the resistor R. 13 One end is connected to the emitters of the second low-side transistors BL21 and BL22, respectively. Resistor R 13 The other end is resistor R, which is the base resistor of the second low-side transistors BL21 and BL22. 14 It is connected to one end.

[0046] In this embodiment, the first low-side transistor BL12 is a third parallel transistor connected in parallel with the first low-side transistor BL11 between the low-side line 144 and the first connection point CP1. Furthermore, the second low-side transistor BL22 in this embodiment is a fourth parallel transistor connected in parallel with the second low-side transistor BL21 between the low-side line 144 and the second connection point CP2. Hereinafter, when the first to fourth parallel transistors are not specifically distinguished, they will be collectively referred to simply as "parallel transistors."

[0047] Resistance R 11 and resistor R 12 The ratio and resistance R 13 and resistor R 14 The ratios are, for example, 1 / 100 (i.e., R 11 :R 12 =R 13 :R 14 The ratio may be approximately 100:1. In this embodiment, the resistance R 11and resistor R 13 have the same resistance value (i.e., R 11 =R 13 ), and resistor R 12 and resistor R 14 have the same resistance value (i.e., R 12 =R 14 ).

[0048] The base resistances of the first high-side transistors BH11, BH12 and the second high-side transistors BH21, BH22 may have larger resistance values than the base resistances of the first low-side transistors BL11, BL12 and the second low-side transistors BL21, BL22. For example, the ratio of R8 to R 12 may be about 1 / 10 (i.e., R8:R 12 =10:1).

[0049] One end of resistor R 15 is connected to the respective collectors of the first low-side transistors BL11, BL12 and the second low-side transistor ML2, and the other end of resistor R 15 is connected to the low-side line 144. Further, between one end of resistor R 15 and the collector of the low-side transistor, a connection may be made to the skin detection circuit of the control unit 110. Diode D4 is a Zener diode, and is connected in parallel with resistor R 15 . Specifically, the anode of diode D4 is connected to the low-side line 144, and the cathode of diode D3 is connected to one end of resistor R 15 .

[0050] The first connection point CP1 is a node to be connected to the first electrode 18a, and is located between the first high-side transistors BH11, BH12 and the first low-side transistors BL11, BL12. A voltage V corresponding to the states (on, off) of the high-side transistors and the low-side transistors is applied to the first connection point CP1 A1 is generated.

[0051] The second connection point CP2 is a node that should be connected to the second electrode 18b, and is located between the second high-side transistors BH21, BH22 and the second low-side transistors BL21, BL22. A voltage V corresponding to the state (on, off) of the high-side and low-side transistors is applied to the second connection point CP2. B1 This will occur.

[0052] With the first electrode 18a connected to the first connection point CP1 and the second electrode 18b connected to the second connection point CP2, the voltage V A1 and voltage V B1 When this occurs, an inter-electrode voltage V is applied between the first electrode 18a and the second electrode 18b to provide electrical stimulation to the human body. EMS_1 (=V A1 -V B1 ) occurs. Electrode voltage V EMS_1 An electric current flows through the body according to the current, and electrical stimulation is applied to the body.

[0053] The first switch circuit 150 is a circuit for controlling the on / off state of the first high-side transistors BH11, BH12 and the second low-side transistors BL21, BL22. The first switch circuit 150 is controlled by resistor R 16 and includes transistor BT2. Transistor BH2 ​​is composed of an npn type bipolar transistor. The emitter of transistor BT2 is connected to the low-side line 144, and the collector of transistor BT2 is connected to the other end of resistor R8 and resistor R 14 It is connected to the other end of the resistor R. 16 At one end is the control signal S SW_A A resistor R is supplied. 16 The other end is connected to the base of transistor BT2.

[0054] The on / off state of transistor BT2 is controlled by control signal S. SW_AIt is controlled by the following: When transistor BT2 is ON, the first high-side transistors BH11 and BH12 and the second low-side transistors BL21 and BL22 are turned ON, respectively. Also, when transistor BT2 is OFF, the first high-side transistors BH11 and BH12 and the second low-side transistors BL21 and BL22 are turned OFF, respectively.

[0055] The second switch circuit 152 is a circuit for controlling the on / off state of the second high-side transistors BH21, BH22 and the first low-side transistors BL11, BL12. The second switch circuit 152 is controlled by resistor R 17 and includes transistor BT3. Transistor BT3 is composed of an npn type bipolar transistor. The emitter of transistor BT3 is connected to the low-side line 144, and the collector of transistor BT3 is connected to resistor R 10 The other end and resistor R 12 It is connected to the other end of the resistor R. 17 At one end is the control signal S SW_B A resistor R is supplied. 16 The other end is connected to the base of transistor BT3.

[0056] The on / off state of transistor BT3 is controlled by control signal S. SW_B It is controlled by the following: When transistor BT3 is ON, the second high-side transistors BH21 and BH22 and the first low-side transistors BL11 and BL12 are turned ON, respectively. Also, when transistor BT3 is OFF, the second high-side transistors BH21 and BH22 and the first low-side transistors BL11 and BL12 are turned OFF, respectively.

[0057] Figure 5 is a timing chart illustrating an example of the operation of the controller 10 according to this embodiment. In this embodiment, the stimulation period T during which electrical stimulation is applied to the human body. STM and suspension period T STP And, period T1 (=T STM +T STP ) repeats periodically.

[0058] Stimulation period T STM Now, the positive electrode voltage V EMS_1 The first phase φ1 generates a pulse, and the inter-electrode voltage V EMS_1 The second phase φ2 is 0, and the pulse's negative electrode voltage V EMS_1 Electrical stimulation is applied to the human body by arbitrarily switching between the third phase φ3, in which pulses are generated. In one example shown in Figure 5, the phases switch in the order φ1→φ2→φ3→φ2→φ1→φ2→φ3→φ2→φ1. Therefore, the stimulation period T STM Now, the positive electrode voltage V EMS_1 Three pulses occur, and the negative electrode voltage V EMS_1 Two pulses occur.

[0059] In the first phase φ1 and the third phase φ3, the inter-electrode voltage V EMS_1 A current corresponding to this current flows between the first electrode 18a and the second electrode 18b, causing the output capacitor C of the boost circuit 122 to flow. OUT The battery is discharged. Therefore, the output voltage V OUT_1 As shown in Figure 5, the stimulation period T STM It gradually decreases, reaching a maximum voltage V TOP_1 From the lowest voltage V BTM_1 It decreases to this level. Stimulation period T STM The subsequent suspension period T STP At the output capacitor C OUT The battery is charged, and the output voltage V OUT_1 The maximum voltage is V TOP_1 After rising to that point, stimulation period T STM It will begin.

[0060] Figure 6 is a circuit diagram illustrating an example of operation in the first phase φ1 of the stimulation voltage circuit 140 according to this embodiment. In the first phase φ1, transistor BT2 of the first switch circuit 150 is on, and transistor BT3 of the second switch circuit 152 is off. As a result, the first high-side transistors BH11 and BH12 and the second low-side transistors BL21 and BL22 are turned on, respectively, and the second high-side transistors BH21 and BH22 and the first low-side transistors BL11 and BL12 are turned off, respectively.

[0061] At this time, the collector current I is applied to the first high-side transistors BH11 and BH12, respectively. C11 ,I C12 A current flows. Between the first electrode 18a and the second electrode 18b, there is an inter-electrode voltage V EMS_1 (>0) occurs, and the collector current I C11 ,I C12 The total stimulation current I is substantially equal to the sum of the currents. EMS_1 However, current flows from the first electrode 18a to the second electrode 18b. Stimulation current I EMS_1 This mainly consists of the second low-side transistors BL21 and BL22 and resistor R 15 It flows through to the low side line 144.

[0062] Figure 7 is a circuit diagram illustrating an example of operation in the third phase φ3 of the stimulation voltage circuit 140 according to this embodiment. In the third phase φ3, transistor BT2 of the first switch circuit 150 is off, and transistor BT3 of the second switch circuit 152 is on. As a result, the first high-side transistors BH11 and BH12 and the second low-side transistors BL21 and BL22 are turned off, and the second high-side transistors BH21 and BH22 and the first low-side transistors BL11 and BL12 are turned on, respectively.

[0063] At this time, the collector current I of the second high-side transistors BH21 and BH22 is as follows: C21 ,I C22 A current flows. Between the first electrode 18a and the second electrode 18b, there is an inter-electrode voltage VEMS_1 (<0) occurs, and the collector current I C21 ,I C22 The total stimulation current I is substantially equal to the sum of the currents. EMS_2 However, current flows from the second electrode 18b to the first electrode 18a. Stimulation current I EMS_2 This mainly consists of the first low-side transistors BL11 and BL12 and resistor R 15 It flows through to the low side line 144.

[0064] The configuration of the electrical stimulation device 1 and an example of the operation of its controller 10 according to this embodiment have been described above.

[0065] The electrical stimulation device 1 according to this embodiment primarily provides electrical stimulation to the muscles of the user's lower body. Generally, the muscles of the human lower body have a larger volume than the muscles of the human upper body or glutes (for example, the rectus abdominis and gluteus maximus) (see references below). Therefore, the load on the lower body is greater than the load on the upper body and glutes, and the electrical stimulation device 1 requires a higher current capacity when providing electrical stimulation to the muscles of the lower body than when providing electrical stimulation to the upper body and glutes. Reference: Alex S. Ribeiro, Brad J. Schoenfeld, and Joao P. Nunes. "Large and Small Muscles in Resistance Training: Is It Time for a Better Definition?" Strength and Conditioning Journal. 2017. vol 47. p. 33-35.

[0066] The stimulation voltage circuit 140 of the controller 10 of the electrical stimulation device 1 according to this embodiment has a parallel transistor connected in parallel with the first high-side transistor BH11, the second high-side transistor BH21, the first low-side transistor BL11, or the second low-side transistor BL21. According to this embodiment, even when the load is heavy and a relatively large current capacity is required, the stimulation current can be supplied to the human body using the parallel transistor in addition to the first high-side transistor BH11, the second high-side transistor BH21, the first low-side transistor BL11, or the second low-side transistor BL21. Therefore, according to the stimulation voltage circuit 140 of this embodiment, it is possible to provide the desired electrical stimulation even when the load is heavy.

[0067] For example, it is conceivable to increase the current capability of a high-side transistor by reducing its base resistance (and consequently reducing its pull-up resistance). However, there are limits to how much these resistances can be reduced. Therefore, it is preferable to improve the current capability of the high-side and low-side transistors by providing parallel transistors, as in the stimulation voltage circuit 140 according to this embodiment.

[0068] In this embodiment, pnp bipolar transistors are used for the high-side and low-side transistors of the stimulation voltage circuit 140. The advantages of using bipolar transistors will be explained with reference to Figure 8. Figure 8(a) is a circuit diagram showing a part of the stimulation voltage circuit 140 according to this embodiment, and Figure 8(b) is a circuit diagram in which the first high-side transistor BH11 is replaced with a MOS transistor in the circuit diagram shown in Figure 8(a).

[0069] The transistor MP shown in Figure 8(b) is a P-channel MOS transistor, with its source connected to the high-side line 142 and its gate connected between resistors R7 and R8. The voltage V across the high-side line 142 is located between the gate and source of transistor MP. H The corresponding voltage V GSThis occurs. For example, if the ratio of resistor R7 to resistor R8 is 1 / 100, the voltage V across the high-side line 142 will be H Approximately 100 / (100+1) of this is the gate-source voltage V of transistor MP. GS This is the result.

[0070] The rated voltage of a MOS transistor varies depending on the type, but for example, if it is around ±20V, then the voltage V H For example, when the voltage becomes around 40V, the voltage between the gate and source V GS The voltage exceeds the rated voltage. By adjusting the ratio of resistors R7 and R8, the voltage V GS It is also possible to adjust this, but adjusting only this resistance ratio will not change the voltage V GS It can be difficult to ensure that the voltage does not exceed the rated voltage. Therefore, when using a MOS transistor, the gate-source voltage V GS Additional circuit configurations will be required to prevent the voltage from exceeding the rated voltage.

[0071] In contrast, in this embodiment shown in Figure 8(a), the first high-side transistor BH11 is composed of a pnp type bipolar transistor. In this case, the voltage V of the high-side line 142 H Even if the base current I increases, B1 Although the base-emitter voltage V increases, BE The voltage V remains constant and does not change. Therefore, when using a bipolar transistor, the voltage V between the base and emitter must be constant. BE Since the voltage will not exceed the rated voltage, circuit design becomes easier compared to when using MOS transistors.

[0072] Referring to Figure 9, the advantages of using bipolar transistors will be explained from another perspective. Figure 9 is a circuit diagram partially showing the stimulation voltage circuit when three first high-side transistors BH11 to BH13 are provided. As shown in Figure 9, when three first high-side transistors BH11 to BH13 are provided, the base current I of these transistors B2The base current is almost the same as when two first high-side transistors BH11 and BH2 are provided, as in the embodiment described above. Thus, even if the number of transistors connected in parallel is changed, the base current remains almost unchanged, and there is no impact on the ratings of the components constituting the stimulation voltage circuit. For this reason, circuit design becomes easier by using bipolar transistors.

[0073] Referring to Figure 10, further advantages of the circuit configuration in which multiple bipolar transistors are connected in parallel, as in this embodiment, will be explained. Figure 10(a) is a diagram showing a circuit that drives a load 90 using two transistors BT91 and BT92, and Figure 10(b) is a circuit diagram partially showing the stimulation voltage circuit 140 according to this embodiment.

[0074] The two transistors BT91 and BT92 shown in Figure 10(a) are each composed of npn bipolar transistors. The collectors of each of the two transistors BT91 and BT92 are connected to the load 90. The on / off state of transistor BT91 is controlled by a resistor R connected to its gate. 91 Control signal S supplied to SW_91 Controlled by the on / off state of transistor BT92, the on / off state is controlled by the resistor R connected to the gate. 92 Control signal S supplied to SW_92 It is controlled by [something].

[0075] If there are variations in the components that make up transistors BT91 and BT92, the collector current I flowing through transistors BT91 and BT92 will be different. C_91 ,I C_92 A difference arises. For example, I C_91 >I C_92 Consequently, transistor BT91 generates more heat than transistor BT92, and the temperature of transistor BT91 becomes higher than that of transistor BT92. This causes a collector current I in transistor BT91. C_91 This increases further, accelerating the heat generation of transistor BT91. This collector current I C_91 The increase in [amount] and the acceleration of heat generation create a loop that can cause transistor BT91 to experience thermal runaway.

[0076] Variations may occur in the elements constituting each of the two first high-side transistors BH11 and BH12 according to this embodiment, as shown in Figure 10(b). However, according to the circuit configuration of this embodiment, the collector current of one of the first high-side transistors BH11 and BH12 (for example, collector current I) C11 ) is the collector current of the other (for example, collector current I C12 Even if it becomes larger than ), the collector current of one of them is limited. As a result, the concentration of collector current on one of the first high-side transistors BH11 and BH12 is suppressed, and thermal runaway is prevented.

[0077] Furthermore, assuming the collector current I C11 ,I C12 Even if an overcurrent occurs, the boost energy is low (the impedance of the power supply circuit 120 is high), so from this point of view, there is no concern about thermal damage.

[0078] The advantages of the electrical stimulation device 1 (or its controller 10 and stimulation voltage circuit 140) according to this embodiment will become even clearer by referring to comparative art.

[0079] Figure 11 is a circuit diagram of the boost circuit 922 relating to the comparative technology. The boost circuit 922 relating to the comparative technology differs from the boost circuit 122 according to this embodiment mainly in that the transistors are composed of NPN bipolar transistors.

[0080] In the comparative technique, the emitter of transistor BT93 is grounded, and the collector of transistor BT93 is connected to the anode of diode D1. The on / off state of transistor BT93 is controlled by resistor R connected to its gate. 93 Control signal S supplied to PWM_9 It is controlled by the inductor L1, which has an inductor current I corresponding to the operation of transistor BT93. L9 When the current flows, the output voltage V OUT_9 This is generated on output line 128.

[0081] Figure 12 is a circuit diagram showing the stimulation voltage circuit 940 related to the comparative technology. The stimulation voltage circuit 940 related to the comparative technology differs from the stimulation voltage circuit 140 according to this embodiment in that none of the first high-side transistor BH11, the second high-side transistor BH21, the first low-side transistor BL11, and the second low-side transistor BL22 are connected in parallel. In other words, in the high-side circuit 946 and low-side circuit 948 of the stimulation voltage circuit 940 related to the comparative technology, the number of first high-side transistors, the number of second high-side transistors, the number of first low-side transistors, and the number of second low-side transistors are each one.

[0082] In the controller 10 according to this embodiment, the boost circuit 122 is replaced with the boost circuit 922 according to the comparative technology, and the stimulation voltage circuit 140 is further replaced with the stimulation voltage circuit 940 according to the comparative technology to obtain the controller according to comparative technology 1. Also, in the controller 10 according to this embodiment, the stimulation voltage circuit 140 is replaced with the stimulation voltage circuit 940 according to the comparative technology to obtain the controller according to comparative technology 2. In summary, the boost circuit and stimulation voltage circuit of comparative technologies 1 and 2 are as follows. Comparative Technique 1: Boost circuit related to comparative technique + Stimulation voltage circuit related to comparative technique Comparative Technique 2: Boost circuit according to the embodiment + Stimulation voltage circuit according to the comparative technique

[0083] Figure 13(a) shows the maximum voltage V of the controller according to comparison technique 1 against a set voltage level. TOP_91 Minimum voltage V BTM_91 and the inter-electrode voltage V EMS_91 This is a diagram. Figure 13(b) shows the maximum voltage V of the controller related to comparison technique 2 with respect to the set voltage level. TOP_92 Minimum voltage V BTM_92 and the inter-electrode voltage V EMS_92 This figure shows the maximum voltage V of the controller 10 according to this embodiment relative to the set voltage level. TOP_1 Minimum voltage V BTM_1and the inter-electrode voltage V EMS_1 This figure shows the result. In Figures 13(a) to 13(c), the horizontal axis represents the set voltage level, and the vertical axis represents the voltage.

[0084] Looking at the areas enclosed by the dashed lines in Figures 13(b) and (c), we can see the maximum voltage V related to comparative technology 2. TOP_92 and minimum voltage V BTM_92 Furthermore, the maximum voltage V according to this embodiment TOP_1 and minimum voltage V BTM_2 These values ​​increase linearly as the voltage level increases. In contrast, looking at the area enclosed by the dashed line in Figure 13(a), the maximum voltage V related to comparative technology 1 is TOP_91 and minimum voltage V BTM_91 It does not rise even when the voltage level increases.

[0085] Referring to Figure 14, the differences in the changes of the maximum and minimum voltages with respect to the voltage level between Comparative Technique 1, Comparative Technique 2, and this embodiment will be explained. Figure 14 shows the control signal S of the boost circuit 122 according to this embodiment. PWM_1 and inductor current I L1 Furthermore, the control signal S of the boost circuit 922 relating to the comparative technology PWM_9 and inductor current I L9 This is a timing chart illustrating one example.

[0086] Figure 14 shows the control signal S according to this embodiment. PWM_1 Control signal S related to comparative technology PWM_9 The two are shown with the same waveform. Transistor MN1 of the boost circuit 122 according to this embodiment controls the control signal S PWM_1 It turns on when the signal level is high (H), and the control signal S PWM_1 It is assumed that it turns off when the signal level is low (L). Also, the transistor BT93 of the boost circuit 922 related to the comparative technology is controlled by the signal S PWM_9 It turns on when the signal level is high, and the control signal S PWM_9 It is assumed that it turns off when the level is low.

[0087] In the boost circuit 122 according to this embodiment, the inductor current IL1 is the control signal S PWM_1 During periods of high levels, the maximum current I L_MAX It rises to this level. In contrast, in the boost circuit 922 of the comparative technology, the inductor current I L9 is the control signal S PWM_1 During periods of high levels, the maximum current I L_MAX It did not rise to the maximum current I L_MAX A lower saturation current I L_SAT It saturates at this point. Inductor current I L9 is the control signal S PWM_1 When the current is at a high level, it flows through transistor BT93 as collector current. At this time, if transistor BT93 does not have a sufficiently large current amplification factor, transistor BT93 enters the saturation region and the collector current saturates, causing the inductor current I to decrease. L9 Saturation current I L_SAT It becomes saturated.

[0088] By configuring the low-side transistor with a MOS transistor, as in the boost circuit 122 according to this embodiment, inductor current saturation does not occur, unlike in the boost circuit 922 according to the comparative technology. Therefore, with the boost circuit 122 according to this embodiment, even when a high voltage level is set, an appropriate output voltage V can be maintained. OUT_1 It is possible to generate this. As a result, there is a difference in the change of the maximum and minimum voltage levels with respect to the voltage level, as shown in Figures 13(a) to (c).

[0089] Returning to Figure 13, if we look at the regions enclosed by the dashed lines in Figures 13(b) and (c), we see the electrode voltage V according to this embodiment. EMS_1 While the voltage level increases as the voltage level rises, the inter-electrode voltage V in comparative technique 1 EMS_92The voltage hardly rises even when the voltage level increases. In comparative technique 1, as described above, the high-side circuit 946 of the stimulation voltage circuit 940 is provided with one first high-side transistor BH11 and one second high-side transistor BH21, and the low-side circuit 948 of the stimulation voltage circuit 940 is provided with one first low-side transistor BL11 and one second low-side transistor BL21. One high-side transistor and one low-side transistor each do not have sufficient current capability, and as a result the inter-electrode voltage V is as seen in the area enclosed by the dashed line in Figure 13(b). EMS_92 It will reach a plateau.

[0090] In contrast, the stimulation voltage circuit 140 according to this embodiment is provided with multiple first high-side transistors BH11, BH12, multiple second high-side transistors BH21, BH22, multiple first low-side transistors BL11, BL12, and multiple second low-side transistors BL21, BL22, making it possible to increase the current capability. As a result, as can be seen in the area enclosed by the dashed line in Figure 13(c), the inter-electrode voltage V increases as the voltage level rises. EMS_1 It becomes possible to increase it.

[0091] (Second Embodiment) Figure 15 is a circuit diagram illustrating the stimulation voltage circuit according to the second embodiment. The stimulation voltage circuit according to the second embodiment differs from the stimulation voltage circuit 140 according to the first embodiment mainly in the configuration of the high-side circuit. Figure 15 shows the circuit mainly on the first high-side transistor BH1, BH2 side of the high-side circuit according to the second embodiment.

[0092] In the second embodiment, the base current I of the first high-side transistor BH11 B11 The path through which the current flows is through the base current I of the first high-side transistor BH12. B12It is provided independently of the path through which the current flows. Specifically, a separate base resistor is provided for each of the first high-side transistors BH11 and BH12. More specifically, in addition to the resistor R8 of the first high-side transistor BH11, a resistor R is provided as the base resistor for the first high-side transistor BH12. 22 A resistor R is provided. 22 One end is connected to the base of the first high-side transistor BH12, and resistor R 22 The other end of this resistor is connected to the collector of transistor BT2 (not shown in Figure 15), in common with the other end of resistor R8.

[0093] According to this configuration, the base current I of the first high-side transistor BH11 B11 This current flows through resistor R8, and the base current I of the first high-side transistor BH12 flows through it. B12 This is the resistor R 22 The current flows through this path. By making the paths through which the base current flows in the first high-side transistors BH11 and B12 independent in this way, it becomes possible to more reliably supply the required base current.

[0094] In this embodiment, a resistor R is used as the pull-up resistor for the first high-side transistor BH12, in addition to resistor R7. 21 A resistor R is provided. 21 One end is connected to the high-side line 142, and resistor R 21 The other end is connected to the base of the first high-side transistor BH12.

[0095] In this embodiment, a resistor R, which is the first emitter resistor, is placed between the high-side line 142 and the first high-side transistor BH11. 23 A resistor R, which is the second emitter resistor, is provided between the high-side line 142 and the first high-side transistor BH12. 24 This is provided. This suppresses the concentration of collector current in one of the first high-side transistors BH11 and BH12.

[0096] For example, variations in the elements constituting the first high-side transistors BH11 and BH12 can cause the collector current I of the first high-side transistor BH12 to be affected. C12 The collector current I of the first high-side transistor BH11 C11 Let's assume it becomes larger than (I C12 >I C11 ). At this time, the emitter current I of the first high-side transistor BH12 E12 The voltage V between the collector and emitter of the first high-side transistor BH12 also increases. CE12 This becomes smaller. As a result, the collector current I of the first high-side transistor BH12 decreases. C12 The increase will be limited.

[0097] Conversely, I C11 >I C12 In the same case, the collector current I of the first high-side transistor BH11 is also determined in the same way. C11 The increase is limited. In this way, the emitter resistor (resistor R) is limited. 23 and resistor R 24 By providing this, the concentration of collector current in one of the first high-side transistors BH11 and BH12 is suppressed.

[0098] Here, referring to Figure 15, the configurations in which the base current flows through an independent path and the configuration in which an emitter resistor is provided for the first high-side transistors BH11 and BH12 have been explained. Similarly, for the second high-side transistors BH21 and BH22, the same effect can be achieved by adding the configurations in which the base current flows through an independent path and the configuration in which an emitter resistor is provided.

[0099] Specifically, the path through which the base current of the second high-side transistor BH21 flows may be provided independently of the path through which the base current of the second high-side transistor BH22 flows. In addition, a third emitter resistor may be provided between the emitter of the second high-side transistor BH21 and the high-side line 142, and a fourth emitter resistor may be provided between the emitter of the second high-side transistor BH22 and the high-side line 142.

[0100] (First variation) In the above embodiment, an example was described in which multiple transistors connected in parallel are provided for each of the high-side and low-side transistors in the stimulation voltage circuit 140. However, the example is not limited to this, and multiple transistors connected in parallel may be provided for either the high-side or low-side transistor. For example, multiple transistors connected in parallel may be provided for the high-side transistor, and additional transistors connected in parallel (third parallel transistor and fourth parallel transistor) may not be provided for the low-side transistor. The base resistor (resistor R) of the low-side transistor. 12 ,R 14 ) is the base resistor of the high-side transistor (resistor R8, R 10 It is lower than the current capacity of the low-side transistor. Therefore, the current capacity of the low-side transistor is higher than that of the high-side transistor. This means that sufficient current capacity can be achieved without adding an additional transistor connected in parallel with the low-side transistor.

[0101] (Second variation) In the above embodiment, an example was mainly described in which the high-side transistor and low-side transistor of the stimulation voltage circuit 140 are each composed of pnp-type bipolar transistors. The transistors that make up the high-side transistor and low-side transistor are not limited to pnp-type bipolar transistors. For example, the high-side transistor may be composed of a P-channel type MOS transistor, and the low-side transistor may be composed of an N-channel type MOS transistor or an npn-type bipolar transistor.

[0102] The present invention has been described above based on embodiments. These embodiments are illustrative, and it will be understood by those skilled in the art that various modifications are possible in combinations of these components and processing processes, and that such modifications also fall within the scope of the present invention. [Explanation of Symbols]

[0103] 1 Electrical stimulator, 2 Belt, 10 Controller, 18a First electrode, 18b Second electrode, 100 Operating unit, 110 Control unit, 120 Power supply circuit, 122 Boost circuit, 123 Input line, 124 Discharge circuit, 126 Feedback circuit, 128 Output line, 140 Stimulation voltage circuit, 142 High-side line, 144 Low-side line, 146 High-side circuit, 148 Low-side circuit, 150 First switch circuit, 152 Second switch circuit, R1~R 17 ,R 21 ~R 24 Resistor, L1 inductor, C1~C2 capacitors, C OUT Output capacitor, D1~D4 diodes, BT1~BT3,MN1 transistors, BH11~BH13 first high-side transistors, BH21,BH22 second high-side transistors, BL11,BL12 first low-side transistors, BL21,BL22 second low-side transistors, CP1 first connection point, CP2 second connection point.

Claims

1. A stimulation voltage circuit that generates a voltage for applying electrical stimulation to a human body between a first electrode and a second electrode that are electrically in contact with the human body, respectively, Highside line and, Low sideline, A first high-side transistor and a first low-side transistor are connected in series between the high-side line and the low-side line. A first connection point located between the first high-side transistor and the first low-side transistor, which is to be connected to the first electrode, A second high-side transistor and a second low-side transistor are connected in series between the high-side line and the low-side line, A second connection point located between the second high-side transistor and the second low-side transistor, which is to be connected to the second electrode, The system comprises the first high-side transistor, the second high-side transistor, the first low-side transistor, or a parallel transistor connected in parallel with the second low-side transistor, Stimulation voltage circuit.

2. The aforementioned parallel transistor is designated as the first parallel transistor, and further comprises a second parallel transistor. The first parallel transistor is connected in parallel with the first high-side transistor between the high-side line and the first connection point. The second parallel transistor is connected in parallel with the second high-side transistor between the high-side line and the second connection point. The stimulation voltage circuit according to claim 1.

3. The first high-side transistor, the second high-side transistor, the first parallel transistor, and the second parallel transistor are each pnp-type bipolar transistors. The stimulation voltage circuit according to claim 2.

4. The path through which the base current of the first high-side transistor flows is provided independently of the path through which the base current of the first parallel transistor flows. The path through which the base current of the second high-side transistor flows is provided independently of the path through which the base current of the second parallel transistor flows. The stimulation voltage circuit according to claim 3.

5. A first emitter resistor is provided between the emitter of the first high-side transistor and the high-side line, A second emitter resistor is provided between the emitter of the first parallel transistor and the high-side line, A third emitter resistor is provided between the emitter of the second high-side transistor and the high-side line, The present invention further comprises a fourth emitter resistor provided between the emitter of the first parallel transistor and the high-side line, The stimulation voltage circuit according to claim 3.

6. It further comprises a third parallel transistor and a fourth parallel transistor, The third parallel transistor is connected in parallel with the first low-side transistor between the low-side line and the first connection point. The fourth parallel transistor is connected in parallel with the second low-side transistor between the low-side line and the second connection point. The stimulation voltage circuit according to claim 2.

7. A stimulation voltage circuit according to any one of claims 1 to 6, It includes a boost circuit that increases the input voltage to generate an output voltage, A voltage corresponding to the output voltage is supplied to the high-side line. controller.

8. The boost circuit includes a transistor and an output capacitor provided to be charged by the output voltage in accordance with the on / off state of the transistor. The aforementioned transistor is composed of a MOS transistor. The controller according to claim 7.

9. The controller according to claim 7, The first electrode connected to the first connection point, The second electrode connected to the second connection point, The controller, the first electrode and the second electrode are provided on a belt, The aforementioned belt is configured to be secured to the user's thigh, The first electrode and the second electrode are positioned to deliver electrical stimulation to the user's thigh muscles. Electrical stimulation device.

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